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SIFANG - CSC-326 - V1.02 - Transformer Protection IED Technical Application Manual - 2014-03
SIFANG - CSC-326 - V1.02 - Transformer Protection IED Technical Application Manual - 2014-03
Standardized:Li lianchang
Inspected:Nie juanhong
Version: V1.02
Doc.Code:0SF.450.085(E)
Issued Date:2014.3.31
Version:V1.02
Doc. Code:0SF.450.085(E)
Issued Date:2014.3
Copyright owner: Beijing Sifang Automation Co., Ltd
Note: the company keeps the right to perfect the instruction. If equipment does not agree
with the instruction at anywhere, please contact our company in time. We will provide you
with corresponding service.
®
is registered trademark of Beijing Sifang Automation Co., Ltd.
We reserve all rights to this document, even in the event that a patent is issued and a different
commercial proprietary right is registered. Improper use, in particular reproduction and dis-
semination to third parties, is not permitted.
This document has been carefully checked. If the user nevertheless detects any errors, he is
asked to notify us as soon as possible.
The data contained in this manual is intended solely for the product description and is not to be
deemed to be a statement of guaranteed properties. In the interests of our customers, we
constantly seek to ensure that our products are developed to the latest technological stand-
ards as a result; it is possible that there may be some differences between the hard-
ware/software product and this information product.
Manufacturer:
Beijing Sifang Automation Co., Ltd.
Tel: +86-10-62961515
Fax: +86-10-62981900
Internet: http://www.sf-auto.com
Add: No.9, Shangdi 4th Street, Haidian District, Beijing, P.R.C.100085
Preface
Purpose of this manual
This manual describes the functions, operation, installation, and placing into service
of device CSC-326. In particular, one will find:
Information on how to configure the device scope and a description of the device
functions and setting options;
A compilation of the most significant data for experienced users in the Appendix.
Target Audience
This manual is valid for SIFANG Distance Protection IED CSC-326; firmware version
V1.00 and higher
Indication of Conformity
Additional Support
Safety information
Avoid to touching the circuitry when covers are removed. The IED
contains electirc circuits which can be damaged if exposed to static
electricity. Lethal high voltage circuits are also exposed when covers
are removed
Using the isolated test pins when measuring signals in open circuitry.
Potentially lethal voltages and currents are present
Changing the setting value group will inevitably change the IEDs
operation. Be careful and check regulations before making the
change
Contents
Chapter 1 Introduction ........................................................................................................... 11
1 Overview ...............................................................................................................................2
2 Features................................................................................................................................3
Chapter 2 Basic protection elements .........................................................................................9
1 Startup element .................................................................................................................. 10
1.1 Introduction .......................................................................................................... 10
1.2 Sudden-change current startup element ........................................................... 10
1.3 Differential current startup element.................................................................... 10
2 Input and output signals .................................................................................................... 11
3 Settings ............................................................................................................................... 13
4 Report ................................................................................................................................. 16
Chapter 3 Differential protection ............................................................................................ 17
1 Introduction ......................................................................................................................... 18
2 Applications ........................................................................................................................ 18
3 Protection algorithm ........................................................................................................... 19
3.1 Differential and restraint current calculation ........................................................... 20
3.2 Automatic Ratio compensation ............................................................................... 22
3.3 Automatic Vector group and zero sequence current compensation .......................... 26
4 Protection principle ............................................................................................................ 32
4.1 Instantaneous differential protection characteristic.................................................. 32
4.2 Treble slope percent differential protection characteristic........................................ 34
4.3 Selective inrush stabilization schemes .................................................................... 37
4.3.1 2nd harmonic stabilization ..................................................................................... 38
4.3.2 Fuzzy recognition of inrush based on the waveform ............................................... 38
4.4 Overexcitation stabilization .................................................................................... 40
4.5 CT Failure supervision ........................................................................................... 42
4.6 CT Saturation supervision ...................................................................................... 43
4.7 Differential current supervision .............................................................................. 44
5 Input and output signals .................................................................................................... 46
6 Settings ............................................................................................................................... 47
7 Report ................................................................................................................................. 50
8 Technical data .................................................................................................................... 51
Chapter 4 Restricted earth fault protection .............................................................................. 53
1 Introduction ......................................................................................................................... 54
2 Applications ........................................................................................................................ 54
3 Protection principle ............................................................................................................ 56
3.1 Differential and restraint current calculation ........................................................... 57
3.2 Automatic Ratio compensation ............................................................................... 59
3.3 Positive sequence current blocking ......................................................................... 61
3.4 Restricted earth fault current alarm......................................................................... 62
4 Input and output signals .................................................................................................... 63
5 Settings ............................................................................................................................... 64
6 Report ................................................................................................................................. 66
7 Technical data .................................................................................................................... 67
Chapter 5 Overexcitation protection ....................................................................................... 69
1 Introduction ......................................................................................................................... 70
2 Protection principle ............................................................................................................ 70
2.1 Protection principle ................................................................................................ 70
2.2 Voltage channel configuration ................................................................................ 76
3 Input and output signals .................................................................................................... 77
4 Settings ............................................................................................................................... 78
5 Report ................................................................................................................................. 79
6 Technical data .................................................................................................................... 80
Chapter 6 Overcurrent protection ........................................................................................... 83
1 Introduction ......................................................................................................................... 84
2 Protection principle ............................................................................................................ 84
2.1 Protection Elements ............................................................................................... 84
2.2 Inrush Restraint Feature ......................................................................................... 86
2.3 Direction Determination Feature ............................................................................ 87
2.4 CBF initiation Feature............................................................................................ 90
3 Input and output signals .................................................................................................... 91
4 Setting ................................................................................................................................. 92
5 Report ................................................................................................................................. 99
6 Technical data .................................................................................................................... 99
Chapter 7 Earth fault protection ........................................................................................... 101
1 Protection principle .......................................................................................................... 102
1.1 Protection elements .............................................................................................. 102
1.2 Inrush Restraint Feature ....................................................................................... 104
1.3 Direction Determination Feature .......................................................................... 105
1.4 CBF initiation Feature.......................................................................................... 107
2 Input and output signals .................................................................................................. 108
3 Setting ............................................................................................................................... 109
4 Report ............................................................................................................................... 115
5 Technical data .................................................................................................................. 116
Chapter 8 Neutral earth fault protection ................................................................................ 119
1 Protection principle .......................................................................................................... 120
1.1 Protection Elements ............................................................................................. 120
1.2 Inrush Restraint Feature ....................................................................................... 122
1.3 Direction Determination Feature .......................................................................... 122
1.4 CBF initiation Feature.......................................................................................... 124
2 Input and output signals .................................................................................................. 125
3 Setting ............................................................................................................................... 126
4 Report ............................................................................................................................... 132
5 Technical data .................................................................................................................. 133
Chapter 9 Thermal overload protection ................................................................................ 135
1 Introduction ....................................................................................................................... 136
2 Protection principle .......................................................................................................... 136
3 Input and output signals .................................................................................................. 138
4 Setting ............................................................................................................................... 138
5 Report ............................................................................................................................... 140
6 Technical data .................................................................................................................. 141
Chapter 10 Overload protection ............................................................................................. 143
1 Protection principle .......................................................................................................... 144
2 Input and output signals .................................................................................................. 145
3 Setting ............................................................................................................................... 146
4 Report ............................................................................................................................... 148
Chapter 11 Overvoltage protection ......................................................................................... 149
1 Introduction ....................................................................................................................... 150
2 Protection principle .......................................................................................................... 150
2.1 Phase to phase overvoltage protection .................................................................. 150
2.2 Phase to earth overvlotage protection ................................................................... 151
3 Logic diagram................................................................................................................... 151
4 Input and output signals .................................................................................................. 151
5 Setting ............................................................................................................................... 152
6 Report ............................................................................................................................... 154
7 Technical data .................................................................................................................. 154
Chapter 12 Undervoltage protection ....................................................................................... 156
1 Introduction ........................................................................................................................ 157
2 Protection principle ............................................................................................................ 157
2.1.1 Phase to phase underovltage protection ................................................. 157
2.1.2 Phase to earth undervoltage protection ................................................... 158
3 Logic diagram................................................................................................................... 159
4 Input and output signals ...................................................................................................... 160
5 Setting parameters .............................................................................................................. 160
6 Reports ............................................................................................................................... 162
7 Technical data..................................................................................................................... 162
Chapter 13 Circuit breaker failure protection .......................................................................... 165
1 Introduction ....................................................................................................................... 166
2 Protection principle .......................................................................................................... 166
3 Logic diagram................................................................................................................... 169
4 Input and output signals .................................................................................................. 171
5 Setting ............................................................................................................................... 172
6 Report ............................................................................................................................... 175
7 Technical data .................................................................................................................. 175
Chapter 14 Dead zone protection ........................................................................................... 177
1 Introduction ....................................................................................................................... 178
2 Protection principle .......................................................................................................... 178
2.1 Function description ............................................................................................. 179
3 Logic diagram................................................................................................................... 179
4 Input and output signals .................................................................................................. 180
5 Setting ............................................................................................................................... 181
6 Report ............................................................................................................................... 182
7 Technical data .................................................................................................................. 182
Chapter 15 STUB protection .................................................................................................. 183
1 Introduction ....................................................................................................................... 184
2 Protection principle .......................................................................................................... 184
2.1 Function description............................................................................................. 184
3 Logic diagram................................................................................................................... 185
4 Input and output signals .................................................................................................. 185
5 Setting ............................................................................................................................... 186
6 Report ............................................................................................................................... 188
7 Technical data .................................................................................................................. 189
Chapter 16 Poles discordance protection ................................................................................ 191
1 Introdcution ....................................................................................................................... 192
2 Protection principle .......................................................................................................... 192
2.1 Function description............................................................................................. 192
3 Logic diagram................................................................................................................... 193
4 Input and output signals .................................................................................................. 194
5 Setting ............................................................................................................................... 195
6 Report ............................................................................................................................... 196
7 Technical data .................................................................................................................. 196
Chapter 17 Secondary system supervision .............................................................................. 197
1 VT failure supervision function........................................................................................ 198
2 Function principle ............................................................................................................. 198
3 Input and output signals .................................................................................................. 201
4 Setting ............................................................................................................................... 202
5 Report ............................................................................................................................... 203
6 Technical data .................................................................................................................. 204
Chapter 18 External BIs to trip BOs ....................................................................................... 205
1 Introduction ....................................................................................................................... 206
2 Function principle ............................................................................................................. 206
3 BI Trigger Record ............................................................................................................. 207
4 BI Switch SetGroup ......................................................................................................... 208
5 BI “Blk Rem Access” and “RELAY TEST” ...................................................................... 208
6 BI “BI_Config1~ BI_Config2” and “BI TRIGGER DR1~ 10” ......................................... 209
7 Setting ............................................................................................................................... 209
Chapter 19 Station communication......................................................................................... 211
1 Overview........................................................................................................................... 212
1.1 Protocol ............................................................................................................... 212
1.1.1 LON communication protocol.................................................................... 212
1.1.2 IEC61850-8 communication protocol ....................................................... 212
1.1.3 IEC60870-5-103 communication protocol ............................................... 213
1.2 Communication port ............................................................................................ 213
1.2.1 Front communication port ......................................................................... 213
1.2.2 RS485 communication ports ..................................................................... 213
1.2.3 Ethernet communication ports .................................................................. 213
1.3 Technical data ...................................................................................................... 213
Front communication port .......................................................................................................... 214
RS485 communication port ........................................................................................................ 214
2 Typicalcommunication scheme ....................................................................................... 216
2.1 Typical substation communication scheme ........................................................... 216
2.2 Typical time synchronizing scheme ...................................................................... 216
Chapter 20 Hardware ............................................................................................................. 219
This chapter describes the IED hardware. ............................................................................ 219
3 Introduction ....................................................................................................................... 220
3.1 IED structure ....................................................................................................... 220
3.2 IED appearance.................................................................................................... 220
3.3 IED module arrangement ..................................................................................... 221
3.4 The rear view of the protection IED ..................................................................... 221
4 Local human-machine interface ..................................................................................... 222
4.1 Human machine interface ..................................................................................... 222
4.2 LCD .................................................................................................................... 223
4.3 Keypad ................................................................................................................ 223
4.4 Shortcut keys and functional keys ........................................................................ 224
4.5 LED ..................................................................................................................... 225
4.6 Front communication port .................................................................................... 226
5 Analog input module ........................................................................................................ 227
5.1 Introduction ......................................................................................................... 227
5.2 Terminals of Analogue Input Module (AIM) ........................................................ 227
5.3 Technical data ...................................................................................................... 228
5.3.1 Internal current transformer....................................................................... 228
5.3.2 Internal voltage transformer ...................................................................... 229
6 Communication module................................................................................................... 230
6.1 Introduction ......................................................................................................... 230
6.2 Substaion communication port ............................................................................. 230
6.2.1 RS232 communication ports ..................................................................... 230
6.2.2 RS485 communication ports ..................................................................... 230
6.2.3 Ethernet communication ports .................................................................. 230
6.2.4 Time synchronization port ......................................................................... 231
6.3 Terminals of Communication Module .................................................................. 231
6.4 Operating reports ................................................................................................. 232
6.5 Technical data ...................................................................................................... 232
6.5.1 Front communication port.......................................................................... 232
6.5.2 RS485 communication port ....................................................................... 233
6.5.3 Ethernet communication port .................................................................... 233
6.5.4 Time synchronization ................................................................................. 234
7 Binary input module ......................................................................................................... 235
7.1 Introduction ......................................................................................................... 235
7.2 Terminals of Binary Input Module (BIM) ............................................................. 235
7.3 Technical data ...................................................................................................... 237
8 Binary output module....................................................................................................... 238
8.1 Introduction ......................................................................................................... 238
8.2 Terminals of Binary Output Module (BOM) ......................................................... 238
8.2.1 Binary Output Module A ............................................................................ 238
8.2.2 Binary Output Module C ............................................................................ 241
8.3 Technical data ...................................................................................................... 242
9 Power supply module ...................................................................................................... 244
9.1 Introduction ......................................................................................................... 244
9.2 Terminals of Power Supply Module (PSM) .......................................................... 244
9.3 Technical data ...................................................................................................... 246
10 Techinical data .......................................................................................................... 247
10.1 Basic data ............................................................................................................ 247
10.1.1 Frequency................................................................................................... 247
10.1.2 Internal current transformer....................................................................... 247
10.1.3 Internal voltage transformer ...................................................................... 247
10.1.4 Auxiliary voltage ......................................................................................... 247
10.1.5 Binary inputs ............................................................................................... 248
10.1.6 Binary outputs ............................................................................................ 248
10.2 Type tests ............................................................................................................. 249
10.2.1 Product safety-related Tests...................................................................... 249
10.2.2 Electromagnetic immunity tests ................................................................ 250
10.2.3 DC voltage interruption test....................................................................... 252
10.2.4 Electromagnetic emission test .................................................................. 252
10.2.5 Mechanical tests ........................................................................................ 252
10.2.6 Climatic tests .............................................................................................. 253
10.2.7 CE Certificate ............................................................................................. 254
10.3 IED design ........................................................................................................... 254
Chapter 21 Appendix ............................................................................................................. 255
1 General setting list ........................................................................................................... 256
1.1 Function setting list .............................................................................................. 256
1.2 Binary setting list ................................................................................................. 274
2 General report list ............................................................................................................ 296
3 Time inverse characteristic ............................................................................................. 303
3.1 11 kinds of IEC and ANSI inverse time characteristic curves ................................ 303
3.2 User defined characteristic ................................................................................... 304
4 CT Requirement ............................................................................................................... 304
4.1 Overview ............................................................................................................. 304
4.2 Current transformer classification......................................................................... 304
4.3 Abbreviations (according to IEC 60044-1, -6, as defined)..................................... 305
4.4 General current transformer requirements............................................................. 306
4.4.1 Protective checking current ....................................................................... 306
4.4.2 CT class ...................................................................................................... 307
4.4.3 Accuracy class ........................................................................................... 309
4.4.4 Ratio of CT.................................................................................................. 309
4.4.5 Rated secondary current ........................................................................... 309
4.4.6 Secondary burden...................................................................................... 310
4.5 Rated equivalent secondary e.m.f requirements .................................................... 310
4.5.1 Transformer differential protection............................................................ 311
Chapter 1 Introduction
1 Overview
It is selective, reliable and high speed IED (Intelligent Electronic Device)
for transformer protection with powerful capabilities to cover following
applications:
Work as main protection unit only or full functions unit for the
complicated application
The IED is able to provide all main protection functions and backup pro-
tection functions in one case, including differential protection, restricted
earth fault (REF), overexcitation, thermal overload, overcurrent, earth
fault protection, etc.
The integrated flexible logic make the IED suitable to be applied to (au-
to)transformers with all the possible vector groups, with/without earthing
connection inside the protected zone.
The wide application flexibility makes the IED an excellent choice for both
new installations and retrofitting of the existing stations.
2
Chapter 1 Introduction
2 Features
Protection and monitoring IED with extensive functional library, user
configuration possibility and expandable hardware design to meet with
user’s special requirements
CT saturation detection
CT secondarycircuit supervison
CT saturation recognition
3
Chapter 1 Introduction
4
Chapter 1 Introduction
5
Chapter 1 Introduction
Protection functions
IEC 61850
IEC 60617
Description ANSI Code Logical Node
graphical symbol
Name
Differential protection
Current protection
3IINV>
Overcurrent protection 50,51,67 PTOC 3I >>
3I >>>
I0INV>
Earth fault protection 50N, 51N, 67N PEFM I0>>
I0>>>
Voltage protection
3U>
Overvoltage protection 59 PTOV
3U>>
3I> BF
Breaker failure protection 50BF RBRF I0>BF
I2>BF
3I< PD
Poles discordance protection 50PD RPLD I0>PD
I2>PD
Other functions
6
Chapter 1 Introduction
Monitoring functions
Description
Self-supervision
Fault recorder
Station communication
Description
Communication protocols
Functions
Setting
IED testing
IED configuration
Printing
7
Chapter 1 Introduction
8
Chapter 2 Basic protection elements
9
Chapter 2 Basic protection elements
1 Startup element
1.1 Introduction
Startup elements are designed to detect a faulty condition in the power
system and initiate all necessary procedures for selective clearance of
the fault. The main startup element of CSC-326 is current
sudden-change startup element(abrupt current), the backup startup
element is diffrential current startup elment.
i I _ startup
i i (t ) 2 i (t T ) i (t 2T )
where
10
Chapter 2 Basic protection elements
Sudden-change current
startup element
IA1 Relay Startup
IB1
IC1
IA2
IB2
IC2
IA3
IB3
IC3
IA4
IB4
IC4
IA5
IB5
IC5
11
Chapter 2 Basic protection elements
Differential current
startup element
IA1 Relay Startup
IB1
IC1
IA2
IB2
IC2
IA3
IB3
IC3
IA4
IB4
IC4
IA5
IB5
IC5
Signal Description
12
Chapter 2 Basic protection elements
Signal Description
Signal Description
3 Settings
Table 3 Settings of basic protection element
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
0 1 0 Connection for HV winding,
HV Wind Conn/Y-0
0:wye connection, 1:delta
D-1
connection
MV Wind Conn/Y-0 0 1 0 Connection for MV winding,
0:wye connection, 1:delta
D-1
connection
(Only for
three-winding
transformers)
0 1 1 Connection for LV winding,
LV Wind Conn/Y-0
0:wye connection, 1:delta
D-1
connection
Vet Grp Angle 0 12 11 Vector Group Angle( VET
GRP ANGLE)
SN MVA 1.000 3000. 120 Capacity of the transformer
HV VT Ratio 1.000 9999. 2200 Voltage transformer(VT) Ra-
tio in HV side
A 50.00 9999. 1200.0 CT Primary(PRI) current in
HV CT Pri
HV side
A 1.000 5.000 1.0 CT Secondary(SEC) current
HV CT Sec
in HV side
13
Chapter 2 Basic protection elements
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
HV Voltage Chan 1 3 1
HV voltage channel location
Sel
MV Voltage Chan 1 3 2 MV voltage channel loca-
Sel tion
A 50.00 9999. 1200.0 Neutral CT (NCT) Prima-
HV NCT Pri(REF) ry(PRI) current in HV side
for REF
A 1.000 5.000 1.0 Neutral CT (NCT) Second-
HV NCT Sec(REF) ary(SEC) current in HV side
for REF
A 50.00 9999. 1200.0 Neutral CT (NCT) Prima-
HV NCT Pri(BU) ry(PRI) current in HV side
for backup protection
A 1.000 5.000 1.0 Neutral CT (NCT) Second-
HV NCT Sec(BU) ary(PRI) current in HV side
for backup protection
kV 1.000 1000. 110.0 Nominal voltage (UN) in
MV UN
Middle voltage (MV)side
1.000 9999. 1100.0 Voltage transformer(VT) Ra-
MV VT Ratio
tio in MV side
A 50.00 9999. 1200.0 CT Primary(PRI) current in
MV CT Pri
MV side
A 1.000 5.000 1.0 CT Secondary(SEC) current
MV CT Sec
in MV side
A 50.00 9999. 1200.0 Neutral CT (NCT) Prima-
MV NCT Pri(REF) ry(PRI) current in MV side
for REF
A 1.000 5.000 1.0 Neutral CT (NCT) Second-
MV NCT Sec(REF) ary(SEC) current in MV
side for REF
A 50.00 9999. 1200.0 Neutral CT (NCT) Prima-
MV NCT Pri(BU) ry(PRI) current in MV side
for backup protection
A 1.000 5.000 1.0 Neutral CT (NCT) Second-
MV NCT Sec(BU) ary(PRI) current in MV side
for backup protection
14
Chapter 2 Basic protection elements
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
kV 1.000 1000. 10.50 Nominal voltage (UN) in Low
LV UN
voltage (LV)side
1.000 9999. 105.0 Voltage transformer(VT) Ra-
LV VT Ratio
tio in LV side
A 50.00 9999. 3000.0 CT Primary(PRI) current in
LV CT Pri
LV side
A 1.000 5.000 1.0 CT Secondary(SEC) current
LV CT Sec
in LV side
LV Sec Inside A 1.000 5.000 1.0 CT Secondary(SEC) cur-
Delta rent in LV inside delta
A 0 9999 Rated primary current for
HV Rated Cur Pri HV side (calculated value,
read only)
A 0 9999 Rated secondary current for
HV Rated Cur Sec HV side (calculated value,
read only)
0 9999 HV ratio factor for differen-
Ratio Factor KTAH tial protection (calculated
value, read only)
0 9999 MV ratio factor for differen-
Ratio Factor KTAM tial protection (calculated
value, read only)
0 9999 LV ratio factor for differential
Ratio Factor KTAL protection (calculated
value, read only)
0 9999 HV ratio factor, with ze-
ro-sequence current calcu-
Ratio REF KTAH lated, for REF protection
(calculated value, read
only)
0 9999 HV ratio factor with ze-
ro-sequence current directly
Ratio REF KNH measured, for REF protec-
tion (calculated value,
read only)
Ratio REF KTAM 0 9999 MV ratio factor, with ze-
15
Chapter 2 Basic protection elements
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
ro-sequence current calcu-
lated, for REF protection
(calculated value, read
only)
0 9999 MV ratio factor with ze-
ro-sequence current directly
Ratio REF KNM measured, for REF protec-
tion (calculated value,
read only)
Default
Setting Unit Min. Max. Description
setting
Autotransformer not comm
on transformer
Auto Trans 0 1 0
1-autotransformer ;
0- not autotransformer
Two-Wind Trans Two-winding(TWO WIND )
not three -winding trans-
0 1 0 former (TRANS)
1-two-winding trans;
0-three-winding trans
CT Fail Detect VT Failure Detection On/Off
0 1 0
1-On, 0-Off.
4 Report
Table 5 Event report list
Information Description
16
Chapter 3 Differential protection
17
Chapter 3 Differential protection
1 Introduction
The numerical current differential protection represents the main protec-
tion function of the IED. It provides a fast short-circuit protection for
power transformers. The protected zone is selectively limited by the CTs
at its ends. The device is able to perform this function on 2 or 3 winding
transformers in a variety of voltage levels and protected object types.
2 Applications
The IED provides numerical differential protection function which can be
used to protect power transformers in various configurations. For exam-
ple, it is possible to use it for a two-winding transformer, three-winding
transformer as well as auto-transformer. Examples for some of applica-
tions are illustrated in the below figure.
HV LV
I A.1 Ia.2
A a
I B.1 Ib .2
B b
I C .1 Ic .2
C c
CSC-326
I A.1
A Ia.2
a
IB.1
Ib .2
B
b
IC .1
C Ic .2
c
CSC-326
18
Chapter 3 Differential protection
HV LV
I A.1 Ia.2
A a
IB.1 Ib .2
B b
IC .1 Ic .2
C c
CSC-326
CSC-326
3 Protection algorithm
This section describes basic principle of differential protection function.
19
Chapter 3 Differential protection
First, the case of a single phase transformer with two windings is con-
sidered. The basic principle is based on current comparison at two sides
of the protected object. Indeed, the differential protection function makes
use of the fact that a protected object carries always the same current at
its two sides in healthy operation condition. This current flows into one
side of the protected object and leaves it from the other side. A difference
in currents is an indication of a fault within this section. An example of this
condition is shown in below figure, when a fault inside the protected zone
causes a current I1prim. + I2prim. flowing in from both sides of the protected
object.
Protected Zone
I1-prim. I2-prim.
CT-1 CT-2
Protected
Transformer
I1 I2
CSC-326
For protected objects with three or more sides, the basic principle is ex-
panded in that the total of all currents flowing into the protected object is
zero in healthy operation, whereas in case of a fault the total in-flowing
current is equal to the fault current.
When an external fault causes a heavy current to flow through the pro-
tected transformer, differences in the magnetic characteristics of the
current transformers CT-1 and CT-2 under saturation condition may
cause a significant difference in the secondary currents I1 + I2 connected
to IED. If the difference is greater than the pickup threshold, the differen-
tial protection function can trip even though no fault occurred in the pro-
tected zone. To prevent the protection function from such erroneous op-
eration, a restraint (stabilizing) current is brought in. For differential pro-
tection IED, the restraint current is normally derived from the I1 and I2.
The next subsection goes on to demonstrate how the differential and re-
straint currents are calculated.
The differential current Idiff and the restraining current Ires are calculated
by the following equation. The following definitions apply for each phase
of the protected object.
N
I diff
i 1
Ii
N 1
1
I res
2
I j (max) i 1
I i (i j )
Equation 1
N 1
among the N current inputs of the IED, suppose it is side j; I i (i j ) is
i 1
the sum of the other current inputs of the IED, not including side j. Idiff is
derived from the fundamental frequency current and produces the trip-
ping effect quantity, whereas Ires counteracts this effect. To clarify the
situation, three important operating conditions with ideal and matched
measurement qualities are examined.
I1 flows into the protected zone, I2 leaves the protected zone, i.e. is
negative according to the definition of signs, therefore I2 = –I1.
Idiff = I1 + I2 = I1 – I1 = 0
No tripping effect (Idiff = 0); the restraint (Ires) corresponds to the exter-
nal fault current flowing through the protected object.
(b) Internal fault, fed with equal currents from both sides:
Idiff = I1 + I2 = I1 + I1 = 2 I1
21
Chapter 3 Differential protection
Tripping effect (Idiff) corresponds to double the fault current, and restraint
value (Ires) are equal to zero.
Idiff = I1 + I2 = I1 + 0 = I1
Tripping quantity (Idiff) and restraint quantity (Ires) are equal and corre-
spond to the single-sided fault current.
The results show that the device is capable to properly discriminate in-
ternal and external faults by using the definitions proposed for differential
and restraint current. However, the device is still subjected to some in-
fluences that induce differential currents even during normal operation
condition. These influences should be compensated in appropriate
manners. The specific treatments designed to cope with these influences
includes automatic ratio compensation and automatic vector group
compensation which are explored in the next subsections.
22
Chapter 3 Differential protection
SN
I 1N
3U 1N
Equation 2
I 1N
I 2N
nCT
Equation 3
Rated secondary current of the high voltage side is then taken as the
reference current. The currents of the other sides are automatically
matched to the rated current of the high voltage side by calculation of
correction factor KCT for MV and LV side, according to below equations,
respectively:
Equation 4
Equation 5
Where KCT-MV is the correction factor for middle voltage side and
KCT-LV is the correction factor for Low voltage side,
23
Chapter 3 Differential protection
I1N is the primary rated current of the transformer (I1N-HV for high volt-
age side, I1N-MV for middle voltage side and I1N-LV for low voltage
side),
I2N is the secondary rated current of the transformer (I2N-HV for high
voltage side, I2N-MV for middle voltage side, I2N-LV for low voltage
side),
nCT is CT ratio of the transformer (nCT-HV for high voltage side, nCT-MV
for middle voltage side, nCT-LV for low voltage side),
U1N is rated voltage of the transformer (U1N-HV for high voltage side,
U1N-MV for middle voltage side, U1N-LV for low voltage side).
SN=160MVA
U1N-HV=230kV U1N-LV=63kV
CTRATIO=500/1A CTRATIO=2000/1A
160MVA
I1N HV 402 A
3 230
I 1N HV 402
I 2 N HV 0.804 A
nCT 500
24
Chapter 3 Differential protection
160MVA
I 1N LV 1466 A
3 63
1466
I 2 N LV 0.733 A
2000
0.804
K CT LV 1.097
0.733
160MVA 160MVA
U1N-HV=230kV U1N-MV=63kV
CTRATIO=500/1A CTRATIO=2000/1A
U1N-LV=20kV 25MVA
CTRATIO=2500/1A
160MVA
I 1N LV 4619 A
3 20
I1N LV 4619
I 2 N HV 1.848 A
nCT 2500
0.804
K CT LV 0.435
1.848
25
Chapter 3 Differential protection
The IED removes this problem. To do so, all CTs at the power trans-
former are connected Wye (polarity markings pointing away from the
transformer). User-entered settings in the relay are then used to char-
acterize the power transformer and allow the relay to automatically per-
form all necessary phase angles, and zero sequence compensation. This
section describes the procedures that perform this compensation inside
the relay and produce the required calculated quantities for transformer
differential protection. The phase angle compensation as well as zero
sequence current elimination procedure is performed by programmed
coefficient matrices which are capable to simulate the difference in phase
angle of currents flowing through transformer windings. Thus, compen-
sation is possible for the entire commonly used transformer vector
groups. This simplifies application of the IED in various configurations, if
the setting corresponding to vector Group Angle, “Vet Grp Angle”, is
properly entered into the device, together with the settings for connection
type of transformer windings in each side, “HV WIND CONN/Y-0 D-1”,
“MV WIND CONN/Y-0 D-1”, “LV WIND CONN/Y-0 D-1”, which could be
set to 1-delta or 0-wye. The basic principle of numerical vector group and
zero-sequence compensation is shown through some examples. A
through review of all possible connection groups as well as device
26
Chapter 3 Differential protection
(1). Take example for Yy0 connection, including similar ones of Yy0
(separate or auto-connected windings), YNy0, Yyn0, YNyn0 (separate or
auto-connected windings) and so on. Below figure shows an example in
case of Yy0 connection group with no earthed starpoint. The figure
shows the windings (left) and the vector diagrams of symmetrical cur-
rents (right).
A B C
Yy0 c b
C B
a b c
I A 1 -1 0 IA
1
I B 0 1 -1 I B
I 3
-1 0 1 I C
C
Equation 6
I a 1 -1 0 Ia
1
I b 0 1 -1 I b
I 3
-1 0 1 I c
c
Equation 7
According to these matrices, if we deduct side 1 currents I A I B , the re-
27
Chapter 3 Differential protection
sulting current I A has the same direction as I A on side 2. Multiplying it
with 1 3 , matches the absolute value. The matrices describe the con-
version for all three phases. Using these matrices, the elimination of zero
sequence currents are warranted regardless of starpoint earth connec-
tion.
(2). Take example for Yd1 connection, including similar ones of Yd1 and
YNd1 without earthing transformer installed at delta side. Below figure
shows an example in case of Yd1 connection group with no earthed
starpoint.
A B C
A
a
Yd1 c
C b B
a b c
I A 1 0 -1 I A
1
I B -1 1 0 I B
I 3
0 -1 1 I C
C
28
Chapter 3 Differential protection
Equation 8
I A 1 0 -1 I A
1
I B -1 1 0 I B
I 3
0 -1 1 I C
C
Equation 9
I
I
a
2 1 1 a
1
. I
I b
3
. 1 2 1 b
1 1 2
I c I c
Equation 10
(3). Take example for Ydd3 connection, including similar ones of Ydd3
and YNdd3 without earthing transformer installed at delta sides. Below
figure shows an example in case of Ydd3 connection group with no
earthed starpoint in Wye side.
29
Chapter 3 Differential protection
A B C
A
c(c’)
Ydd3 a(a’)
C b(b’) B
I A 0 1 -1 I A
1
I B -1 0 1 I B
I 3
1 -1 0 I C
C
Equation 11
(4). Take example for Yd5 connection, including similar ones of Yd5 and
YNd5 with earthing transformer installed at delta side. Below figure
shows an example in case of Yd5 connection group with no earthed
starpoint.
A B C
A
c
Yd5 b
a
C B
c a b
30
Chapter 3 Differential protection
I A -1 1 0 I A
1
I B 0 -1 1 I B
I 3
1 0 -1 I C
C
Equation 12
I
I
a
2 1 1 a
1 . I
I b . 1 2 1 b
3 1 1 2
I c I c
Equation 13
(5). Take example for Dy1 connection, including similar ones of Dy1 and
Dyn1 without earthing transformer installed at delta side. Below figure
shows an example in case of Dy1 connection group with no earthed
starpoint.
A B C
Dy1 c
b
C B
a b c
31
Chapter 3 Differential protection
I a 1 -1 0 I a
1
I b 0 1 -1 I b
I 3
-1 0 1 I c
c
Equation 14
I
I
A
2 1 1 A
1
I B . 1 2 1. I B
3 1 1 2
I C I C
Equation 15
I a 1 -1 0 I a
1
I b 0 1 -1 I b
I 3
-1 0 1 I c
c
Equation 16
4 Protection principle
32
Chapter 3 Differential protection
Ia>I_Inst Diff
AND INST DIFF TripA
Func_Inst Diff On
Ib>I_Inst Diff
AND INST DIFF TripC
As mentioned previously and can be seen from the figure, the stage op-
erates as an unrestrained protection function. In other words, it is not in-
hibited by any of harmonic stabilization features of the percent differential
element as well as the CT failure detection. This means that it can oper-
ate even when, for example, a considerable second harmonic is present
in the differential current, which is caused by current transformer satura-
tion by a DC component in the fault current, and which could be inter-
preted by the inrush inhibit function as an inrush current.
33
Chapter 3 Differential protection
This high current stage evaluates the fundamental component of the dif-
ferential current as well as the instantaneous values. Instantaneous value
processing ensures fast tripping even in case the fundamental compo-
nent of the current is strongly reduced by current transformer saturation.
Fast trip area is shown in Figure 16.
IDiff
Fast trip area
I_Inst Diff
Differential current
Slope 3
Trip area
Slope 2
block area
Slope 1
IRest
I_Percent Diff
34
Chapter 3 Differential protection
ditions. The setting for slope of branch 1 is applicable for restraint cur-
rents of zero to the first break-point indicated on restraint axis (setting
"I_ResPoint1 Diff"). The slope (setting “Slope1_Diff”) defines the ratio of
differential to restraint current above which the percent differential stage
will operate. The first break-point on restraint axis defines the end of the
slope 1 region and the start of the second branch region. This setting
should be set just above the maximum operating current level of the
transformer. This level is somewhere between the maximum
forced-cooled rated current of the transformer and the maximum emer-
gency overload current level.
In the range of high through fault currents which may give rise to high
differential currents as a result of CT saturation, branch 3 is applicable to
provide additional stabilization. The setting for the slope of this branch
(setting “Slope3_Diff”) is applicable up to the point at which the branch
intersects the characteristic of instantaneous differential protection.
Equation 17
35
Chapter 3 Differential protection
ID> is the setting for the sensitivity threshold of the differential protection,
(setting “I_Percent Diff”),
IR1 is the setting for the first breakpoint restraint current, (setting
“I_ResPoint1 Diff”),
IR2 is the setting for the second breakpoint restraint current, (setting
“I_ResPoint2 Diff”).
If the operating point calculated from the quantities of differential and re-
straint current falls into the trip area, a trip signal is issued by the percent
differential protection. The issued signals are phase selective. They can
be found in event report as “Per Diff Trip A”, “Per Diff Trip B” and “Per Diff
Trip C”.
Func_Percent Diff on
Phase-A
I diff A , I rest A A
ID>
N PER DIFF Trip A
D
PER DIFF BLK A
Phase-B
I diff B , I rest B
ID>
A
N PER DIFF Trip B
PER DIFF BLK B D
Phase-C
I diff C , I rest C
ID>
A
N PER DIFF Trip C
PER DIFF BLK C D
It should be noted that when the IED is delivered, both the instantaneous
and percent differential protection functions are switched off. Setting of
“0-off” is applied for Binary settings “Func_Inst Diff” and “Func_Percent
36
Chapter 3 Differential protection
Diff”. This is because the fact that these protection functions should not
be used before at least the vector group and other essential parameters
for each side is correctly set. Without these settings the equipment may
show unpredictable behavior. (E.g. tripping)
The IED provides two schemes to detect inrush conditions. The first
scheme is 2nd harmonic stabilization; the second scheme is fuzzy
recognition of inrush conditions based on the waveform. The two
schemes are convenient for user to be selected by the setting “2nd HAR
NOT WAVE” (1-2nd harmonic on; 0-waveform on). The two implemented
algorithm work alternatively. As soon as an inrush condition is recognized
by each of them, a restraint condition is applied to the respective phase
evaluation of percent differential protection. Since the applied restraint by
2nd harmonic detection operates individually per phase, the protection is
fully operative even when the protected transformer is switched onto a
single-phase fault, whereas inrush currents may possibly be present in
one of the healthy phases. It is, however, possible to set the protection in
a way that when the 2nd harmonic recognition is fulfilled only in one sin-
gle phase, not only the phase with the inrush current, but also the re-
maining phases of the percent differential protection are blocked. This is
achieved by cross-blocking the differential protection for a certain period
to avoid spurious tripping. The setting corresponds to “T_2nd Harm
Block”. Within this time, all three phases are blocked as soon as an in-
37
Chapter 3 Differential protection
rush current is detected in any one phase. After the timer is expired, only
the phase with inrush current content is blocked.
I diff 2
K 2
I diff
Equation 18
I (k ) I (k n)
X (k ) , k 1,2,..., n
I (k ) I (k n)
Equation 19
The smaller values of X(k) represent that the calculated point corre-
38
Chapter 3 Differential protection
n
N A[ X (k )] / n
k 1
Equation 20
The derived value of N is used in the IED to assess the differential cur-
rent corresponds to inrush condition or not. To do so, the value of N is
compared with a threshold K, and inrush content is recognized in the
current waveform, if N>K.
Func_Percent Diff on
A
I diff A 2 2nd Harm Not Wave on
N
K 2 O Block Diff at Inrush on
I diff A D T_2nd Harm Block PER DIFF BLK A
R
A
I diff B 2 2nd Harm Not Wave on
N
K 2 O Block Diff at Inrush on
I diff B D T_2nd Harm Block
PER DIFF BLK B
R
39
Chapter 3 Differential protection
Func_Percent Diff on
Apart from the second harmonic, other harmonic contents can be se-
lected in the IED to cause stabilization of percent differential protection.
This is because the fact that unwanted differential currents caused by
transformer overexcitation may result in false tripping of the percent dif-
ferential protection. Since steady state overexcitation is characterized by
odd harmonics, the 3rd or the 5th harmonic can be selected in the IED to
judge for overexcitation stabilization. If it is desired to impose a blocking
condition to percent differential protection by these harmonics, Binary
setting “Block Diff at Overexcit” should be set to “1-on”. By applying this
setting, alarm report entitled “Diff 3/5har Blk” is issued whenever 3rd or
5th harmonic detection impose a blocking condition to differential protec-
tion. It should be noted that the latter, is generated when any condition
(2nd harmonic, 3rd/5th harmonic, CT fail) leads to blocking of differential
protection.
40
Chapter 3 Differential protection
The detection method used for 3rd or 5th harmonic is similar to those
applied for 2nd harmonic. However, setting “Ratio_3/5th Harm” is deci-
sive in this case. It means that 3rd or 5th harmonic is recognized if the
ratio between third or fifth harmonic and the fundamental frequency
component of the differential current exceeds the setting threshold. The
ratio is calculated by the below equation.
I diff 3 / 5
K 3 / 5
I diff
Equation 21
I diff A 3
K 3 / 5
I diff A Overexcit 3rd NOT 5th on A
A N
I diff A 5 Overexcit 3rd NOT 5 th
off N D O
K 3 / 5 D T_3/5th Harm Block R
PER DIFF BLK A
I diff A
I diff B 3
K 3 / 5
I diff B Overexcit 3rd NOT 5th on A
A N
Overexcit 3rd NOT 5th off N D T_3/5th Harm Block
O
I diff B 5 PER DIFF BLK B
K 3 / 5 D R
I diff B
I diff C 3
K 3 / 5 O
I diff C Overexcit 3rd NOT 5th on A PER DIFF BLK C
A N R
I diff C 5 Overexcit 3rd NOT 5th off N D T_3/5th Harm Block
K 3 / 5 D
I diff C
41
Chapter 3 Differential protection
The currents flowing through all three phases of CT secondary are nor-
mal at each side of the protected object. As a result, the differential cur-
rent is near to zero. When one or two phase current of one side is de-
creased to less than a threshold (half of the memory current), at the
same time all three phase currents in other side(s) are normal, and dif-
ferential current is more than a threshold (>0.3I_Percent Diff) at least in
one phase, the condition maybe an indication of CT failure in the muta-
tive phase(s). CT failure detection logic is illustrated in below figure.
42
Chapter 3 Differential protection
CT Fail Detect on
When Internal and external faults occurs, it is possible that transient and
steady fault currents induce the CT saturation. CT saturation may lead to
mal-operation of differential protection when an external fault occurs. In
order to avoid mal-operation of protection in such situations, CT satura-
tion supervision element is integrated in IED.
I 2 I 3
K har
I I
43
Chapter 3 Differential protection
Equation 22
Where:
Khar is the setting for comprehensive harmonic ratio, fixed in the soft-
ware.
If the 2nd and 3rd harmonic contents of any phase current are more than
Khar, then CT satisfies the above formulas and it is saturated. Usually
before the CT saturation status, there is a short time period in which CT
still works in its linear characteristic. By very fast CT saturation detection
of IED, it needs only 4ms before any CT saturation happening to detect
the fault which is internal or external fault. In order to distinguish satura-
tion caused by internal faults and external faults effectively, percent dif-
ferential protection based on sample values is used. If CT saturation is
induced by external fault, differential protection will be blocked. However
if CT saturation is induced by internal fault, differential protection will
send its trip signal.
44
Chapter 3 Differential protection
Equation 23
Func_Diff Alarm on
Idiff_A>ID.alarm
A
O N 5s DIFF Alarm
Idiff_B>ID.alarm
R D
Idiff_C>ID.alarm
45
Chapter 3 Differential protection
Differential Protection
IA4
IB4
IC4
IA5
IB5
IC5
46
Chapter 3 Differential protection
Signal Description
Signal Description
6 Settings
Table 8 Instruction for Vector Group Angle setting
47
Chapter 3 Differential protection
formers)
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
Instantaneous Differential
I_Inst Diff A 0.5Ir 20Ir 20
(ID>>) current setting
Percentage Differential (ID>)
I_Percent Diff A 0.08Ir 4Ir 2.1
current setting
The 1st breakpoint restraint
I_ResPoint1 Diff A 0.1Ir Ir 2
current (IR1)
The 2nd breakpoint restraint
I_ResPoint2 Diff A 0.1Ir 10Ir 2
current (IR2)
Slope1_Diff 0 0.2 0.2 the 1st slope
48
Chapter 3 Differential protection
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
Block monic block all three phas-
es. After the delay, then
only the local phase is
blocked.
Default
Setting Unit Min. Max. Description
setting
Instantaneous differential
Func_Inst Diff 0 1 0
protection ON 1-on; 0-off.
Func_Percent Diff Percentage differential pro-
0 1 0
tection ON 1-on; 0-off.
Block Diff at Inrush Inrush block differential pro-
0 1 0 tection
1-block; 0-not block.
2nd Harm Not 2nd harmonic (HAR) inhibit
Wave not the fuzzy recognition
based on the wave-
0 1 0
form(WAVE)
1-2nd harmonic on; 0-
waveform on
Block Diff at Overexcitation block differ-
Overexcit 0 1 0 ential protection
1-block; 0-not block.
Overexcitation stabilization
judgement
Overexcit 3rd NOT 3rd or 5th harmonic (HAR)
0 1 0
5th inhibit on
1-3rd harmonic; 0-5th har-
monic.
Differential current (DIFF)
Func_Diff Alarm 0 1 0 Alarming on
1-on; 0-off.
Block differential protection
Block Diff at
0 1 0 when there is CT failure
CT_Fail
1-block; 0-not block.
49
Chapter 3 Differential protection
Default
Setting Unit Min. Max. Description
setting
Eliminate calculated 3I0
HV D_side Elimi- when HV side winding is
0 1 0
nate I0 connected in Delta mode
1- eliminate; 0-not eliminate
Eliminate calculated 3I0
MV D_side Elimi- when MV side winding is
0 1 0
nate I0 connected in Delta mode
1- eliminate; 0-not eliminate
Eliminate calculated 3I0
LV D_side Elimi- when LV side winding is
0 1 0
nate I0 connected in Delta mode
1- eliminate; 0-not eliminate
LV current is included in
calculation of the differential
Diff Includes LV
0 1 0 protection.
Cur
1- Diff Includes LV Cur;
0-Diff NOT Includes LV Cur
7 Report
Table 11 Event report list
Information Description
Per Diff Trip B Treble slope percent Differential protection (ID>) trip for phase A/B/C
Inst Diff Trip B Instantaneous Differential protection (ID>>) trip for phase A/B/C
Information Description
50
Chapter 3 Differential protection
Information Description
Information Description
8 Technical data
Table 14 Differential protection technical data
51
Chapter 3 Differential protection
52
Chapter 4 Restricted earth fault protection
53
Chapter 4 Restricted earth fault protection
1 Introduction
The restricted earth fault protection detects earth faults in power trans-
formers with earthed starpoint or in non-earthed power transformers with
a starpoint former (earthing transformer/reactor) installed inside the pro-
tected zone. A precondition for using this function is that a CT should be
installed in the starpoint connection, i.e. between the starpoint and earth.
The starpoint CT and the phase CTs define the limits of the protected
zone by restricted earth fault protection.
2 Applications
The IED provides two restricted differential protection functions which
can be used independently at various locations. For example, it is possi-
ble to use them for both windings of YNyn transformer which is earthed at
both starpoints. Further, one of them can be implemented to protect an
earthed transformer winding and the other for an earthing transform-
er/reactor. In case of auto-transformers, one of them is sufficient to pro-
tect the auto-windings. Examples for some of applications are illustrated
in the below figure.
HV LV
I A.2
A a
IB.2
B b
IC .2
C c
54
Chapter 4 Restricted earth fault protection
HV LV
Ia .2
A a
Ib .2
B b
Ic.2
C c
3I01
3I02
Ia .2 Ib .2 Ic.2
CSC-326
HV LV
I A.2
Ia .2
A a
IB.2
Ib .2
B b
IC .2 Ic.2
C c
3I01 3I01
CSC-326
3I02
Ia .2 Ib .2 Ic.2
55
Chapter 4 Restricted earth fault protection
I A.2
A Ia.3
a
IB.2
Ib .3
B
b
IC .2
C Ic .3
c
3I01
3 Protection principle
During healthy operation condition, no starpoint current 3I01 flows
through the starpoint CT. Furthermore, the sum of the phase currents 3I 02
=IA.2 + IB.2 + IC.2 is almost zero. In case of auto-transformer, both the re-
sidual currents 3I02 =IA.2 + IB.2 + IC.2 and 3I03 =IA.3 + IB.3 + IC.3 are zero. With
an earth fault inside the protected zone, a starpoint current 3I01 flows.
Moreover, depending on the earthing conditions of the power system
outside the protected zone, a further earth current may be recognized in
the residual current path of the phase CTs (3I02 and 3I03). Since all the
currents flowing into the protected zone are defined positive, the residual
current from the system (3I02 and 3I03) is more or less in phase with the
starpoint current (3I01). With an earth fault outside the protected zone, a
starpoint current 3I01 flows into the protected zone, together with equal
residual current 3I02 and 3I03 which flows toward outside of the protected
zone, through the phase CTs. Keeping in mind positive direction current
flow, which is toward the protected zone, the starpoint current is in phase
opposition with 3I02 and 3I03.
56
Chapter 4 Restricted earth fault protection
The differential current Idiff0 and the restraining current Irest0 are calculated
according to below figure.
Equation 24
Idiff0 and Irest0 are compared by the restricted earth fault protection with
a dual-slope operating characteristic defined by below equation and
shown in below figure.
Equation 25
Where I0D is the setting for sensitivity threshold of restricted earth fault
protection (setting “HV 3I0_REF”, “MV 3I0_REF” or “LV 3I0_REF”), and
S0D is slope of the branch (setting “HV Slope_REF”, “MV Slope_REF” or
“LV Slope_REF”).
The trip logic for restricted earth fault protection is shown in below figure.
57
Chapter 4 Restricted earth fault protection
I Diff0
Trip area
Slope _ REF
3 I 0 _ REF
block area
I Res0
Func_REF Trip on
A
T_REF Trip
N REF Trip
D
Func_REF Alarm on
A
T_REF Alarm
N REF Alarm
D
Idiff0>HV 3I0_REF Alarm
External fault:
3I01 enters the protected zone, whereas 3I02 leaves the protected zone,
i.e. is negative according to the definition of signs, therefore 3I02 = –3I01.
58
Chapter 4 Restricted earth fault protection
Both the tripping (Idiff0) and the restraint (Irest0) quantities correspond to
the fault current flowing through the starpoint.
Internal fault, fed from the starpoint and from the system, e.g. with equal
earth current magnitude:
Both the 3I01 and 3I02 enter the protected zone, thus having positive sign.
The condition results in 3I02 = 3I01.
The results show that the device is capable to properly discriminate in-
ternal and external earth faults by using the definitions proposed for dif-
ferential and restraint current. However, the device is still subjected to
some influences that induce differential currents even during normal op-
eration condition. These influences should be compensated in appropri-
ate manner. The specific treatments designed to cope with these influ-
ences includes automatic ratio compensation which is explored as fol-
lows.
59
Chapter 4 Restricted earth fault protection
nStarpoint HV
K Starpoint HV
nPhase HV
Equation 26
nStarpoint MV
K Starpoint MV
nPhase MV
Equation 27
nStarpoint LV
K Starpoint LV
nPhase LV
Equation 28
K Starpoint HV
Where is the ratio compensation factor for HV starpoint
K Starpoint MV
CT; is the ratio compensation for MV starpoint CT
K Starpo int LV
and is the ratio compensation for LV starpoint CT;
nPhaseMV
K MV
nPhase HV
Equation 29
nStarpoint
K Starpoint
nPhase HV
60
Chapter 4 Restricted earth fault protection
Equation 30
K Starpoint
is the ratio compensation factor for common winding starpoint
CT.
2 winding HV CT --- LV CT
3 winding HV CT MV CT ---
CT2 HV LV
I A.2
A a
IB.2
B b
IC .2
C c
When an external fault causes a heavy current to flow through the pro-
tected transformer, differences in the magnetic characteristics of the
current transformer CT2 under saturation condition may cause a signifi-
cant difference in the secondary currents I02 connected to IED. If the
difference is greater than the pickup threshold, the REF protection func-
tion can trip even though no fault occurred in the protected zone. To
prevent the protection function from such erroneous operation, a restraint
(stabilizing) ratio, zero-sequence current divides positive-sequence cur-
rent, is brought in.
61
Chapter 4 Restricted earth fault protection
I0
15%
I1
Only when the ratio is greater than 15% can the REF protection trip.
62
Chapter 4 Restricted earth fault protection
Restricted Earth
Fault Protection
IA1 REF Alarm
IA2
IB2
IC2
IREF
Signal Description
Signal Description
63
Chapter 4 Restricted earth fault protection
5 Settings
Table 18 Settings of Restricted earth fault protection for HV side of transformer
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
Current setting for HV Restrict-
HV 3I0_REF A 0.08Ir 2Ir 2
ed Earth Fault protection
HV Slope setting for HV Restricted
0.2 0.95 0.5
Slope_REF Earth Fault protection
HV T_REF HV Restricted Earth Fault trip
s 0 60 0.03
Trip time setting
HV 3I0_REF HV Restricted Earth Fault alarm
A 0.08Ir 2Ir 2
Alarm current setting
HV T_REF HV Restricted Earth Fault alarm
s 0 60 0.03
Alarm time setting
De-
Setting Unit Min. Max. fault Description
setting
HV Restricted earth fault trip-stage
HV Func_REF
0 1 0 ON
Trip
1-on; 0-off.
HV Restricted earth fault
HV Func_REF
0 1 0 Alarm-stage ON
Alarm
1-on; 0-off.
Block HV REF Block HV REF when CT failure,
0 1 0
at HV CT_Fail 1-Block;0-unblock
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
Current setting for MV Restrict-
MV 3I0_REF A 0.08Ir 2Ir 2
ed Earth Fault protection
64
Chapter 4 Restricted earth fault protection
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
MV Slope setting for MV Restricted
0.2 0.95 0.5
Slope_REF Earth Fault protection
MV T_REF MV Restricted Earth Fault trip
s 0 60 0.03
Trip time setting
MV 3I0_REF MV Restricted Earth Fault alarm
A 0.08Ir 2Ir 2
Alarm current setting
MV T_REF MV Restricted Earth Fault alarm
s 0 60 0.03
Alarm time setting
De-
Setting Unit Min. Max. fault Description
setting
MV Func_REF MV Restricted earth fault trip-stage
0 1 0
Trip ON 1-on; 0-off.
MV Restricted earth fault
MV Func_REF
0 1 0 Alarm-stage ON
Alarm
1-on; 0-off.
Block MV REF Block MV REF when CT failure,
0 1 0
at MV CT_Fail 1-Block;0-unblock
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
Current setting for LV Restricted
LV 3I0_REF A 0.08Ir 2Ir 2
Earth Fault protection
Slope setting for LV Restricted
LV Slope_REF 0.2 0.95 0.5
Earth Fault protection
LV Restricted Earth Fault trip
LV T_REF Trip s 0 60 0.03
time setting
LV 3I0_REF LV Restricted Earth Fault alarm
A 0.08Ir 2Ir 2
Alarm current setting
65
Chapter 4 Restricted earth fault protection
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
LV T_REF LV Restricted Earth Fault alarm
s 0 60 0.03
Alarm time setting
De-
Setting Unit Min. Max. fault Description
setting
LV Func_REF LV Restricted earth fault trip-stage
0 1 0
Trip ON 1-on; 0-off.
LV Restricted earth fault
LV Func_REF
0 1 0 Alarm-stage ON
Alarm
1-on; 0-off.
Block LV REF at Block LV REF when CT failure,
0 1 0
LV CT_Fail 1-Block;0-unblock
6 Report
Table 24 Event report list
Information Description
Information Description
66
Chapter 4 Restricted earth fault protection
Information Description
7 Technical data
Table 27 Restricted earth fault protection technical data
67
Chapter 4 Restricted earth fault protection
68
Chapter 5 Overexcitation protection
69
Chapter 5 Overexcitation protection
1 Introduction
The overexcitation protection is used to detect impermissible overexcitation
conditions which can endanger power transformers. An increase in trans-
former flux beyond the rated values leads to saturation of the iron core and to
large eddy current losses which cause impermissible temperature rise in
transformer core.
2 Protection principle
B U f
N
BN U N f N
Equation 31
U and f are the measured voltage and frequency, and UN and fN are the rated
voltage and frequency (50Hz or 60Hz) of the device. While the rated fre-
quency is fixed to 50Hz or 60Hz in software, device is informed about rated
voltage by setting “Reference Voltage” which corresponds to nominal
phase-neutral voltage of the protected transformer when is transferred to
70
Chapter 5 Overexcitation protection
secondary value, using the turn ratio of voltage transformer. Thus, the use of
the overexcitation protection presumes that measured voltage is connected to
the device. Calculation of voltage/hertz ratio above is performed based on the
maximum voltage of the three phase-neutral or phase-phase voltages. Binary
setting “V/F Voltage(0-VPP,1-VPN)” determines whether phase-to-phase
voltage or phase-neutral voltage should be used for overexcitation protection,
by setting “0-VPP” or “1-VPN”, respectively.
V<0.7Un
O 150ms U or F EXCEED
R
f<0.5fn or
f>1.3fn
71
Chapter 5 Overexcitation protection
age(0-VPP,1-VPN)”.
If the definite alarm stage is enabled in one side, and the calculated volt/hertz
ration exceeds the threshold defined by setting “Func_Overexcit Alarm Def”,
an alarm report “Def V/F Alarm ” is generated by the device, after the time
delay “T_Definite Alarm” elapsed. The logic for the definite alarm stage of
overexcitation protection is shown in below figure when it is applied to HV
side. The logic is the same when the protection function is applied to other
sides.
HV Func_Overexcit on
A
N
Func_Overexcit Alarm Def on D
A
V/F Voltage(0-VPP,1-VPN) on N
D
O HV T_REF Alarm
DEF V/F Alarm
R
A
N
NUA_ Hv , f DEF Alarm V / F D
U or F EXCEED
Similarly, if the definite trip stage is enabled in one side, and the calculated
volt/hertz ration exceeds the threshold defined by setting “V/F_Definite Trip”,
an event report “Def V/F Trip” is generated by the device, subsequent to the
72
Chapter 5 Overexcitation protection
expiration of time delay “T_Definite Trip”. Tripping Logic of the definite trip
stage of overexcitation protection is shown in below figure.
HV Func_Overexcit on
A
N
Func_Overexcit Trip Def on D
N U AC _ Hv , f DEF Trip V / F
A
V/F Voltage(0-VPP,1-VPN) on N
D
O T_Definite Trip
DEF V/F Trip
R
A
N
N U A_ Hv , f DEF Trip V / F D
N U B _ Hv , f DEF Trip V / F O
R
U or F EXCEED
Figure 34 Tripping logic of the definite trip stage for overexcitation protection
73
Chapter 5 Overexcitation protection
u/f
1.50
1.45
1.40
1.35
1.30
1.25
1.20
1.15
1.10
1.05
T10 T9 T8 T7 T6 T5 T4 T3 T2 T1 t(s)
As can be seen from the above figure, N=1.05 works as a pickup threshold for
thermal stage. The thermal replica is implemented in IED by a counter which
is incremented from 0% to 100%, as soon as the calculated voltage/hertz ra-
tio of exceeds the pickup threshold (N=1.05). If the counter reaches to 100%
corresponding to expiration of trip time delay according to the trip character-
istic, the event report “Inv V/F Trip” is given. The trip signal is cancelled as
soon as the calculated voltage/hertz ratio falls below the pickup threshold
(N=1.05). However, the counter is decremented to zero according to cool
down time of the transformer (the time by which the thermal replica counter
reaches from 100% to 0%). The cool down time is informed to the device by
setting “T_Cool Down”.
74
Chapter 5 Overexcitation protection
HV Func_Overexcit on
A
N
Func_Overexcit Trip Inv on D
u/f
1.50
1.45
1.40
1.35
N (U AB HV , f ) 1.30
1.25
1.20
1.15
1.10
1.05
T10T9 T8 T7 T6 T5 T4 T3 T2 T1 t(s)
u/f
1.50
1.45 O
1.40
1.35 R
N (U BC HV , f ) 1.30
1.25
1.20
1.15
1.10
1.05
T10T9 T8 T7 T6 T5 T4 T3 T2 T1 t(s)
u/f
1.50
1.45
1.40
1.35
N (U AC HV , f ) 1.30
1.25
1.20
1.15
1.10
1.05
T10T9 T8 T7 T6 T5 T4 T3 T2 T1 t(s)
A
V/F Voltage(0-VPP,1-VPN) on N
D
u/f
5
1.
0
4
1.
1.
1.
45
0
3 O
3
5
N (U B HV , f ) 1.
1.2
1.5
0
2 R
0
1
1.
1
5
1.
0
1.
5
T10T9 T8 T7 T6 T5 T4 T3 T2 T1 t(s)
u/f
5
1.
0
4
1.
45
1.
0
3
1.
3
5
N (U C HV , f ) 1.
1.2
1.5
0
2
0
1
1.
1
5
1.
0
1.
5
T10T9 T8 T7 T6 T5 T4 T3 T2 T1 t(s)
U or F EXCEED
Figure 36 Tripping logic of the thermal trip stage for overexcitation protection
75
Chapter 5 Overexcitation protection
V/F=1.05”) should be set to 9999s. The same approach can be taken when, for
compound of 10 points at most, and it maybe contains less than 10 points. The
thermal characteristic would be disabled if all the delay time settings are set to
9999s.
UA/B/C voltage input channel of 1st Analog input module (hereinafter is ref-
ered as AIM) is provided with the high accurate frequency measurement
hardware circuit. In order to offer the high performance overexcitation function
for HV, MV or LV side, the applied voltage input of HV side, MV side or LV
side must be connected with the UA/B/C voltage input channel of 1st Analog
input module (AIM1).
For example of HV side; the setting “HV Voltage Chan Sel” can be set as 1, 2
and 3 which means voltage channels are connected to the corresponding
analog input module (see below table).
volage inputs
If Binary setting “HV Func_Overexcit” is set 1 and “HV Voltage Chan Sel” is
set 2 or 3 (not 1), alarm report “Setting Err” will be given by the device. If Bi-
nary setting “MV Func_Overexcit” is set 1 and “MV Voltage Chan Sel” is set 2
or 3 (not 1), alarm report “Setting Err” will be given by the device. If “LV
76
Chapter 5 Overexcitation protection
Func_Overexcit”, anyone of “HV Voltage Chan Sel” and “MV Voltage Chan
Sel” is set 1, alarm report “Setting Err” will be given by the device.
Overexcitation
Protection
UA Def V/F Alarm
Relay Startup
Signal Description
Signal Description
77
Chapter 5 Overexcitation protection
4 Settings
Table 31 Settings of overexcitation protection
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
Reference Volt- Nominal phase voltage in HV
V 40 130 57.3
age side
V/F_Definite
1 1.5 1.1 Alarming setting of volt/hertz
Alarm
Timer setting for volt/hertz
T_Definite Alarm s 0.1 9999 10
alarming stage
V/F_Definite Tripping setting of definite
1 1.5 1.2
Trip volt/hertz stage
Timer setting for definite
T_Definite Trip s 0.1 9999 1
volt/hertz stage
T1_Inverse Timer setting for
s 0.1 9999 10
V/F=1.05 volt/hertz=1.05
T2_Inverse Timer setting for
s 0.1 9999 90
V/F=1.10 volt/hertz=1.10
T3_Inverse Timer setting for
s 0.1 9999 80
V/F=1.15 volt/hertz=1.15
T4_Inverse Timer setting for
s 0.1 9999 70
V/F=1.20 volt/hertz=1.20
T5_Inverse Timer setting for
s 0.1 9999 60
V/F=1.25 volt/hertz=1.25
T6_Inverse Timer setting for
s 0.1 9999 50
V/F=1.30 volt/hertz=1.30
T7_Inverse Timer setting for
s 0.1 9999 45
V/F=1.35 volt/hertz=1.35
T8_Inverse Timer setting for
s 0.1 9999 40
V/F=1.40 volt/hertz=1.40
T9_Inverse Timer setting for
s 0.1 9999 35
V/F=1.45 volt/hertz=1.45
T10_Inverse Timer setting for
s 0.1 9999 30
V/F=1.50 volt/hertz=1.50
Cool down time delay for
T_Cool Down s 0.1 9999 25
overexcitation protection
78
Chapter 5 Overexcitation protection
De-
fault
Setting Unit Min. Max. Description
set-
ting
HV Overexcitation (V/F) on
HV Func_Overexcit 0 1 0
1-on; 0-off.
MV Overexcitation (V/F) on
MV Func_Overexcit 0 1 0
1-on; 0-off.
LV Overexcitation (V/F) on
LV Func_Overexcit 0 1 0
1-on; 0-off.
Definite Overexcitation (V/F)
Func_Overexcit
0 1 0 Alarming on
Alarm Def
1-on; 0-off.
Definite (DEF)Overexcitation
Func_Overexcit Trip
0 1 0 (V/F) on
Def
1-on; 0-off.
Inverse (IVR)Overexcitation
Func_Overexcit Trip
0 1 0 (V/F) on
Inv
1-on; 0-off.
Overexcitation protection uses
V/F Volt- phase-to-phase voltage (VPP)
0 1 0
age(0-VPP,1-VPN) or phase-to-earth voltage (VPN)
0-VPP; 1-VPN.
5 Report
Table 33 Event report list
Information Description
Def V/F Trip Overexcitation protection(V/F) tripping (Trip) with definite (DEF)
Information Description
79
Chapter 5 Overexcitation protection
Information Description
Information Description
6 Technical data
Table 36 Overexcitation protection technical data
80
Chapter 5 Overexcitation protection
81
Chapter 5 Overexcitation protection
82
Chapter 6 Overcurrent protection
83
Chapter 6 Overcurrent protection
1 Introduction
The non-directional overcurrent elements can be applied as backup protec-
tion functions for transformer as well as power system protection in networks
with radial nature and those which are supplied from a single source. The
directional overcurrent protection can also be applied in systems where pro-
tection coordination depends on both the magnitude of the fault current and
the direction of power flow to the fault location, for instance in case of par-
allel transformers supplied from a single source.
2 Protection principle
Each voltage side of the protected transformer is provided with three over-
current protection elements from which two elements operate as definite
overcurrent stages and the other one operates with inverse time-current
characteristic. All the elements can operate in conjunction with the integrated
inrush restraint and directional functions.
Various stages of the elements are independent from each other and can be
combined as desired. They can be enabled or disabled in each side using
dedicated Binary settings. These Binary settings include “HV Func_OC1”,
“HV Func_OC2” and “HV Func_OC Inv”, for HV side overcurrent protection,
“MV Func_OC1”, “MV Func_OC2” and “MV Func_OC Inv”, for MV side
overcurrent protection, “LV Func_OC1”, “LV Func_OC2” and “LV Func_OC
Inv”, for LV side overcurrent protection. For example by applying setting
“1-on” to “HV Func_OC1”, respective stage of overcurrent protection would
be enabled in HV side.
Individual pickup value for each definite stage can be defined by setting “HV
I_OC1” and “HV I_OC2” for HV side, “MV I_OC1” and “MV I_OC2” for MV
side, “LV I_OC1” and “LV I_OC2” for LV side. By applying these settings, each
phase current is compared separately with the setting value for each stage. If
the respective value is exceeded, a trip time delay timer is started. The con-
dition for start of the delay timer is expressed mathematically by below equa-
tion, in which a, b and c represent three phases.
I I set a, b, c
( )
Equation 32
The timer is set to count up to a user-defined time delay. The time delay can
be set for each definite stage individually through settings “HV T_OC1” and
84
Chapter 6 Overcurrent protection
“HV T_OC2” for HV side, “MV T_OC1” and “MV T_OC2” for MV side, “LV
T_OC1” and “LV T_OC2” for LV side. After the user-defined time delays have
been elapsed, a trip signal is issued if the inrush restraint feature is applied
and no inrush current is detected or if inrush restraint is disabled. However,
the overcurrent protection would be blocked and therefore, no tripping takes
place if the inrush restraint feature is enabled and an inrush condition exists.
Further, an alarm report is issued as “HV Inrush Blk BU”, “MV Inrush Blk BU”
or “LV Inrush Blk BU” indicating that a blocking condition is imposed to over-
current element by inrush condition detection.
The pickup value for the inverse time-current stage can be defined by setting
“HV I_OC Inv”, “MV I_OC Inv” and “LV I_OC Inv” for HV, MV and LV sides,
respectively. Each phase current is separately compared with corresponding
setting value. If a current exceeds 1.1 times the setting value, corresponding
stage picks up. If an inverse time-current stage picks up, the tripping time is
calculated from the actual fault current flowing, using the selected tripping
curve. Maximum tripping time is limited to 100s.
A _ OC Inv
t K _ OC Inv P _ OC Inv
B _ OC Inv
I
I S
-1
85
Chapter 6 Overcurrent protection
By applying pickup current and time multiplier settings, the device calculates
the tripping time from the measured current in each phase separately, based
on the selected inverse curve. Once the calculated time has been elapsed, a
trip signal is issued provided that no inrush current is detected or inrush re-
straint is disabled. If the inrush restraint feature is enabled and an inrush
condition exists, the overcurrent protection would be blocked and therefore no
tripping takes place. However, an alarm report is generated as “HV Inrush Blk
BU”, “MV Inrush Blk BU” or “LV Inrush Blk BU”, indicating the blocking condi-
tion which is imposed to overcurrent element by detection of inrush condition.
The trip signals and corresponding event reports are available separately for
each stage. These include “HV OC1 Trip”, “HV OC2 Trip” and “HV OC Inv
Trip” for HV side, “MV OC1 Trip”, “MV OC2 Trip” and “MV OC Inv Trip” for MV
side, “LV OC1 Trip”, “LV OC2 Trip” and “LV OC Inv Trip” for LV side overcur-
rent elements.
86
Chapter 6 Overcurrent protection
NOTE: The direction mentioned above is based on that the positive polarity is
87
Chapter 6 Overcurrent protection
at the side of the busbar and the negative polarity is at the side the trans-
former.
A Ia U bc
B Ib U ca
C Ic U ab
As can be seen, the healthy voltages are used in direction determination. This
allows for a correct direction determination even if the fault voltage has col-
lapsed entirely because of a single-phase short-line fault. With three-phase
short-line faults, memory voltage values are used to clearly determine the
direction if the measurement voltages are not sufficient. The directional ele-
ment of each side uses the voltage on itself side.
Forward 90° IA
Bisector
Angle_Range
OC
Angle_OC
0°
U BC_Ref
-IA
where:
88
Chapter 6 Overcurrent protection
The logic for Definite and Inverse time IDMTL overcurrent protection is shown
in below figure.
HV Func_OC on
A O
DIR Positive N Direction Unit OK
R
D
VT failure
A
N
Direct OK at VT FAIL D
HV Func_OC1 (2) on
A
N HV T_OC1(2)
I>HV I_OC1 (2) OC 1 (2)Trip
D
Direction Unit OK
89
Chapter 6 Overcurrent protection
More detail information about the initiation conditions and related Binary set-
tings can be found as below.
90
Chapter 6 Overcurrent protection
Overcurrent
Protection
IA1 OC1 Trip
IB2
IC2
UA
UB
UC
Signal Description
91
Chapter 6 Overcurrent protection
Signal Description
4 Setting
Table 40 Settings of overcurrent protection for HV side of transformer
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
HV overcurrent (O/C) current
HV I_OC1 A 0.05Ir 20Ir 5
setting for Stage 1
Time setting for HV OC, Stage
HV T_OC1 s 0 60 60
1
HV overcurrent (O/C) current
HV I_OC2 A 0.05Ir 20Ir 5
setting for Stage 2
Time setting for HV OC, Stage
HV T_OC2 s 0 60 60
2
HV
Curve_OC
1 12 1 Ref to IEC and ANSI Curves
Inv
92
Chapter 6 Overcurrent protection
tection
De-
fault
Setting Unit Min. Max. Description
set-
ting
HV Func_OC1 The 1st stage of HV OC (OC_1)
0 1 0 protection is switched ON
1-on; 0-off.
HV OC1 Direc- Direction (DIR) detection of HV OC
tion 0 1 0 Stage 1 is switched ON
1-on; 0-off.
HV OC1 Dir To Direction unit of HV OC Stage 1
Sys points to system
0 1 0
0 - point to the protected transformer
1- point to system
HV OC1 Inrush Inrush 2nd harmonic detection HV
Block 0 1 0 OC Stage 1 is switched ON
1-on; 0-off.
HV Func_OC2 The 2nd stage of HV OC (OC_2)
0 1 0 protection is switched ON
1-on; 0-off.
HV OC2 Direc- Direction (DIR) detection of HV OC
tion 0 1 0 Stage 2 is switched ON
1-on; 0-off.
HV OC2 Dir To Direction unit of HV OC Stage 2
Sys points to system
0 1 0
0 - point to the protected transformer
1- point to system
HV OC2 Inrush Inrush 2nd harmonic detection HV
Block 0 1 0 OC Stage 2 is switched ON
1-on; 0-off.
93
Chapter 6 Overcurrent protection
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
MV overcurrent (O/C) current
MV I_OC1 A 0.05Ir 20Ir 5
setting for Stage 1
Time setting for MV OC, Stage
MV T_OC1 s 0 60 60
1
MV overcurrent (O/C) current
MV I_OC2 A 0.05Ir 20Ir 5
setting for Stage 2
Time setting for MV OC, Stage
MV T_OC2 s 0 60 60
2
MV
1 12 1 Ref to IEC and ANSI Curves
Curve_OC
94
Chapter 6 Overcurrent protection
Inv
De-
fault
Setting Unit Min. Max. Description
set-
ting
MV Func_OC1 The 1st stage of MV OC (OC_1)
0 1 0 protection is switched ON
1-on; 0-off.
MV OC1 Direc- Direction (DIR) detection of MV OC
tion 0 1 0 Stage 1 is switched ON
1-on; 0-off.
MV OC1 Dir To Direction unit of MV OC Stage 1
Sys points to system
0 1 0
0 - point to the protected transformer
1- point to system
MV OC1 Inrush Inrush 2nd harmonic detection MV
Block 0 1 0 OC Stage 1 is switched ON
1-on; 0-off.
95
Chapter 6 Overcurrent protection
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
96
Chapter 6 Overcurrent protection
De-
fault
Setting Unit Min. Max. Description
set-
ting
LV Func_OC1 The 1st stage of LV OC (OC_1) pro-
0 1 0 tection is switched ON
1-on; 0-off.
LV OC1 Direc- 0 1 0 Direction (DIR) detection of LV OC
97
Chapter 6 Overcurrent protection
98
Chapter 6 Overcurrent protection
5 Report
Table 46 Event report list
Information Description
Information Description
6 Technical data
Table 48 Overcurrent protection technical data
99
Chapter 6 Overcurrent protection
Long inverse
ANSI Inverse; ≤ ±5% setting + 40ms, at 2
Moderately inverse;
Very inverse;
Extremely inverse;
Definite inverse
user-defined characteristic ≤ ±5% setting + 40ms, at 2
T= <I/ISETTING < 20, in accordance
with IEC60255-151
Time factor of inverse time, A 0.005 to 200.0s, step 0.001s
Delay of inverse time, B 0.000 to 60.00s, step 0.01s
Index of inverse time, P 0.005 to 10.00, step 0.005
set time Multiplier for step n: k 0.05 to 999.0, step 0.01
Minimum operating time 20ms
Maximum operating time 100s
Reset mode instantaneous
Reset time approx. 40ms,
Directional element
Operating area range 170° ≤ ±3°, at phase to phase volt-
Characteristic angle 0°to 90°, step 1° age >1V
100
Chapter 7 Earth fault protection
101
Chapter 7 Earth fault protection
1 Protection principle
Each voltage side of the protected transformer is provided with three earth
fault protection elements from which two elements operate as definite earth
fault stages and the other one operates with inverse time-current characteris-
tic. All the elements can operate in conjunction with the integrated inrush re-
straint and directional functions.
Various stages of each element are independent from each other and can be
combined as desired. They can be enabled or disabled in each side using
dedicated Binary settings. These Binary settings include “HV Func_EF1”, “HV
Func_EF2” and “HV Func_EF Inv” on, for HV side earth fault protection, “MV
Func_EF1”, “MV Func_EF2” and “MV Func_EF Inv”, for MV side earth fault
protection, “LV Func_EF1”, “LV Func_EF2” and “LV Func_EF Inv”, for LV side
earth fault protection. For example by applying setting “1-on” to “HV
Func_EF1”, respective stage of earth fault protection would be enabled in HV
side.
Individual pickup value for each definite stage can be defined by setting “HV
3I0_EF1” and “HV 3I0_EF2” for HV side, “MV 3I0_EF1” and “MV 3I0_EF2” for
MV side, “LV 3I0_EF1” and “LV 3I0_EF2” for LV side. By applying these set-
tings, each earth current (quantity 3I0) calculated from the three phase cur-
rents is compared separately with the setting value for each stage. If the re-
spective value is exceeded, a trip time delay timer is started. The condition for
start of the delay timer is expressed mathematically:
3I 0 3I 0 set
Equation 33
The timer is set to count up to a user-defined time delay. The time delay can
be set for each definite stage individually through settings “HV T_EF1” and
“HV T_EF2” for HV side, “MV T_EF1” and “MV T_EF2” for MV side, “LV
T_EF1” and “LV T_EF2” for LV side. After the user-defined time delay has
been elapsed, a trip signal is issued if the inrush restraint feature is applied
and no inrush current is detected or inrush restraint is disabled. The earth
fault protection would be blocked and therefore, no tripping takes place if the
inrush restraint feature is enabled and an inrush condition exists. However, an
alarm report is issued nominated as “HV EF1 Inrush Block”, “HV EF2 Inrush
Block” or “HV EF Inv Inrush Block”, indicating the blocking condition of earth
fault element caused by inrush condition detection.
Pickup value for the inverse time-current stage can be set by setting “HV
3I0_EF Inv”, “MV 3I0_EF Inv” and “LV 3I0_EF Inv” for HV, MV and LV sides,
respectively. Each earth current (quantity 3I0) calculated from the three phase
102
Chapter 7 Earth fault protection
A _ EF Inv
t K _ EF Inv HP _ EF Inv
B _ EF Inv
I
I S
-1
Equation 34
By applying the desired setting values, the device calculates the tripping time
from the zero sequence current. Once the calculated time elapsed, report “EF
Inv Trip” will be issued.
By applying pickup current and time multiplier settings, the device determines
the tripping time from the calculated earth current, based on the selected in-
verse curve. Once the calculated time has been elapsed, a trip signal is is-
sued provided that no inrush current is detected or inrush restraint is disabled.
If the inrush restraint feature is enabled and an inrush condition exists the
earth fault protection would be blocked and therefore no tripping takes place.
103
Chapter 7 Earth fault protection
However, an alarm report is issued designated as “HV Inrush Blk BU”, “MV
Inrush Blk BU” or “LV Inrush Blk BU”, indicating the blocking condition of
overcurrent element caused by inrush condition detection.
The trip signals and corresponding event reports are available separately for
each stage. They include “HV EF_1 Trip”, “HV EF_2 Trip” and “HV IDMTL EF
Trip” for HV side, “MV EF_1 Trip”, “MV EF_2 Trip” and “MV IDMTL EF Trip” for
MV side, “LV EF_1 Trip”, “LV EF_1 Trip” and “LV IDMTL EF Trip” for LV side
earth fault elements.
The transformer earth fault protection may detect large magnetizing inrush
currents flowing when transformer is energized. The inrush current may be
several times of the nominal current, and may last from several tens of milli-
seconds to several seconds.
Since the inrush current contains a relatively large second harmonic compo-
nent which is nearly absent during a fault current, the inrush restraint oper-
ates based on the evaluation of the second harmonic content which is present
in the phase currents. The inrush condition is recognized if the ratio of second
harmonic current to the fundamental component exceeds the setting value
“HV Ratio_I2/I1_EF”, “MV Ratio_I2/I1_EF” or “LV Ratio_I2/I1_EF” in each
phase current. The setting is applicable to both the definite stages of earth
fault protection element as well as the inverse time-current stage. As soon as
the measured ratio exceeds the set threshold, a restraint is applied to those
stages for which corresponding setting is applied to make them blocked in
inrush condition detection (“HV EF1 Inrush Block”, “HV EF2 Inrush Block” and
“HV EF Inv Inrush Block” on for HV side, “MV EF1 Inrush Block”, “MV EF2
Inrush Block” and “MV EF Inv Inrush Block” for MV side, “LV EF_1 Inrush
Detect ON”, “LV EF1 Inrush Block”, “LV EF2 Inrush Block” and “LV EF Inv
Inrush Block” for LV side).
104
Chapter 7 Earth fault protection
The integrated directional function can be applied to each stage of earth fault
elements via Binary settings. The Binary settings include “HV EF1 Direction”,
“HV EF2 Direction” and “HV EF Inv Direction” on for HV side earth fault
stages, “MV EF1 Direction”, “MV EF2 Direction” and “MV EF Inv Direction” for
MV side earth fault stages and “LV EF1 Direction”, “LV EF2 Direction” and “LV
EF Inv Direction” for LV side earth fault stages.
Furthermore, the directional orientation can be set individually for each stage
of earth fault elements in various sides of the protected transformer. This can
be performed by Binary settings “HV EF1 Dir To Sys”, “HV EF2 Dir To Sys”
and “HV EF Inv Dir To Sys” for HV side, “MV EF1 Dir To Sys”, “MV EF2 Dir To
Sys” and “MV EF Inv Dir To Sys” for MV side, “LV EF1 Dir To Sys”, “LV EF2
Dir To Sys” and “LV EF Inv Dir To Sys” for LV side. The possible settings for
these Binary setting comprise “0-toward transformer” and “1-toward system”.
NOTE: The direction mentioned above is based on that the positive polarities of
105
Chapter 7 Earth fault protection
90°
3I 0
0°
3U 0_Ref
Angle_EF
Angle_Range
EF
Forward Bisector
-3 I 0
where:
It is possible to block earth fault protection elements in each side of the pro-
tected transformer if a CT fail is detected in the same side. This can be per-
formed by Binary settings “Block HV EF at HV CT_Fail”, “Blk MV EF at MV
CT_FAIL” and “Blk LV EF at LV CT FAIL” in each voltage side. If setting 1 is
applied to these Binary settings, any CT fail detection in a given side of the
power transformer would bring blocking condition to all stages of the earth
106
Chapter 7 Earth fault protection
The logic for definite and inverse time IDMTL earth fault protection is shown in
below figure.
HV EF Direction
A O
DIR Positive N R
E/F Direction Unit OK
VT failure D
A
Direct OK at VT FAIL N
D
HV Func_EF1 (2) on
A
HV T_EF1(2)
3I0>HV 3I0_EF1(2) N E/F Trip
D
Direction Unit OK
Inrush BLK EF
HV Func_EF1 (2) on
HV Func_EF Inv on
A
t
Inverse Curve> N IDMTL E/F Trip
D
E/F Direction OK
Inrush BLK EF
It is possible to set whether the earth fault protection elements can initiate the
integrated CBF protection or not. The available choices depend on the volt-
age side of the power transformer at which earth fault protection is applied. In
this context, HV side earth fault protection element always initiates HV side
CBF function with no additional setting. However, it is possible to select
whether it can initiate MV and LV CBF protection functions via Binary settings
“HV EF Initiate LV CBF” and “HV EF Initiate MV CBF” on, respectively.
MV side earth fault protection element always initiates MV side CBF function
with no additional setting. However, it is possible to select whether it can ini-
tiate HV side CBF protection function via Binary setting “MV EF Initiate HV1
CBF” on.
More detail information about the initiation conditions and related Binary set-
tings can be found in below table.
107
Chapter 7 Earth fault protection
Earth Fault
Protection
IA1 EF1 Trip
IB2
IC2
UA
UB
UC
Signal Description
Signal Description
108
Chapter 7 Earth fault protection
Signal Description
3 Setting
Table 51 Settings of earth fault protection for HV side of transformer
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
HV earth fault (E/F) protection
HV 3I0_EF1 A 0.05Ir 20Ir 5
current setting for Stage 1
HV T_EF1 s 0 60 60 Time setting for HV E/F, Stage 1
HV earth fault (E/F) current set-
HV 3I0_EF2 A 0.05Ir 20Ir 5
ting for Stage 2
HV T_EF2 s 0 60 60 Time setting for HV E/F, Stage 2
HV
Curve_EF 1 12 1 Ref to IEC and ANSI Curves
Inv
HV 3I0_EF
A 0.05Ir 20Ir 1.2 Ref to IEC and ANSI Curves
Inv
HV K_EF
0.05 999 1 Ref to IEC and ANSI Curves
Inv
HV A_EF
s 0 200 0.14 Ref to IEC and ANSI Curves
Inv
HV B_EF
s 0 60 0 Ref to IEC and ANSI Curves
Inv
HV P_EF
0 10 0.02 Ref to IEC and ANSI Curves
Inv
HV An- The angle setting for voltage
° 0 90 45
gle_EF ahead of current.
HV The maximum 1st -harmonic cur-
Imax_2H_U A 0.25Ir 20Ir 5 rent setting to remove the inrush
nBlk_EF block, in HV EF protection
The maximum 1st -harmonic cur-
HV Ra-
0.07 0.5 0.2 rent setting to remove the inrush
tio_I2/I1_EF
block, in HV EF protection
109
Chapter 7 Earth fault protection
De-
fault
Setting Unit Min. Max. Description
set-
ting
The 1st stage of HV earth fault
HV Func_EF1 0 1 0 (EF_1) protection is switched ON
1-on; 0-off.
Direction (DIR) detection of HV EF
HV EF1 Direction 0 1 0 Stage 1 is switched ON
1-on; 0-off.
Direction unit of HV EF Stage 1
HV EF1 Dir To points to system
0 1 0
Sys 0 - point to the protected transformer
1- point to system
Inrush 2nd harmonic detection HV
HV EF1 Inrush
0 1 0 EF Stage 1 is switched ON
Block
1-on; 0-off.
The 2nd stage of HV earth fault
HV Func_EF2 0 1 0 (EF_2) protection is switched ON
1-on; 0-off.
Direction (DIR) detection of HV EF
HV EF2 Direction 0 1 0 Stage 2 is switched ON
1-on; 0-off.
Direction unit of HV EF Stage 2
HV EF2 Dir To points to system
0 1 0
Sys 0 - point to the protected transformer
1- point to system
nd
Inrush 2 harmonic detection HV
HV EF2 Inrush
0 1 0 EF Stage 2 is switched ON
Block
1-on; 0-off.
The IDMTL inverse time stage of HV
HV Func_EF Inv 0 1 0 EF protection is switched ON
1-on; 0-off.
Direction (DIR) detection of HV EF
HV EF Inv Direc-
0 1 0 IDMTL inverse time is switched ON
tion
1-on; 0-off.
HV EF Inv Dir To Direction unit of HV EF IDMTL in-
0 1 0
Sys verse time points to system
110
Chapter 7 Earth fault protection
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
MV MV earth fault (E/F) protection
A 0.05Ir 20Ir 5
3I0_EF1 current setting for Stage 1
MV T_EF1 s 0 60 60 Time setting for MV E/F, Stage 1
MV MV earth fault (E/F) current set-
A 0.05Ir 20Ir 5
3I0_EF2 ting for Stage 2
MV T_EF2 s 0 60 60 Time setting for MV E/F, Stage 2
MV
Curve_EF 1 12 1 Ref to IEC and ANSI Curves
Inv
MV 3I0_EF
A 0.05Ir 20Ir 5 Ref to IEC and ANSI Curves
Inv
MV K_EF
0.05 999 1 Ref to IEC and ANSI Curves
Inv
MV A_EF
s 0 200 0.14 Ref to IEC and ANSI Curves
Inv
111
Chapter 7 Earth fault protection
MV B_EF
s 0 60 0 Ref to IEC and ANSI Curves
Inv
MV P_EF
0 10 0.02 Ref to IEC and ANSI Curves
Inv
MV An- The angle setting for voltage
° 0 90 45
gle_EF ahead of current.
MV The maximum 1st -harmonic cur-
Imax_2H_U A 0.25Ir 20Ir 5 rent setting to remove the inrush
nBlk_EF block, in MV E/F protection
MV Ra- Inrush 2nd harmonic ratio setting
0.07 0.5 0.2
tio_I2/I1_EF for blocking MV E/F protection
De-
fault
Setting Unit Min. Max. Description
set-
ting
The 1st stage of MV earth fault
MV Func_EF1 0 1 0 (EF_1) protection is switched ON
1-on; 0-off.
Direction (DIR) detection of MV EF
MV EF1 Direction 0 1 0 Stage 1 is switched ON
1-on; 0-off.
Direction unit of MV EF Stage 1
MV EF1 Dir To points to system
0 1 0
Sys 0 - point to the protected transformer
1- point to system
nd
Inrush 2 harmonic detection MV
MV EF1 Inrush
0 1 0 EF Stage 1 is switched ON
Block
1-on; 0-off.
nd
The 2 stage of MV earth fault
MV Func_EF2 0 1 0 (EF_2) protection is switched ON
1-on; 0-off.
Direction (DIR) detection of MV EF
MV EF2 Direction 0 1 0 Stage 2 is switched ON
1-on; 0-off.
Direction unit of MV EF Stage 2
MV EF2 Dir To points to system
0 1 0
Sys 0 - point to the protected transformer
1- point to system
112
Chapter 7 Earth fault protection
nd
Inrush 2 harmonic detection MV
MV EF2 Inrush
0 1 0 EF Stage 2 is switched ON
Block
1-on; 0-off.
The IDMTL inverse time stage of MV
MV Func_EF Inv 0 1 0 EF protection is switched ON
1-on; 0-off.
Direction (DIR) detection of MV EF
MV EF Inv Direc-
0 1 0 IDMTL inverse time is switched ON
tion
1-on; 0-off.
Direction unit of MV EF IDMTL in-
MV EF Inv Dir To verse time points to system
0 1 0
Sys 0 - point to the protected transformer
1- point to system
nd
Inrush 2 harmonic detection MV
MV EF Inv Inrush EF IDMTL inverse time is switched
0 1 0
Block ON
1-on; 0-off.
Select to block MV EF protection or
Block MV EF at exit direction unit, when MV VT fails
0 1 0
MV VT_Fail 0 - MV Direct OK at MV VT Fail
1 - Blk MV EF at MV VT Fail
Block MV EF when there is MV CT
Block MV EF at
0 1 0 failure
MV CT_Fail
1-Block; 0-NOT block
MV EF protection initiate HV1 side
MV EF Initiate
0 1 0 CBF
HV CBF
0 - initiate, 1 – not initiate
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
LV earth fault (E/F) protection
LV 3I0_EF1 A 0.05Ir 20Ir 5
current setting for Stage 1
LV T_EF1 s 0 60 60 Time setting for LV E/F, Stage 1
LV earth fault (E/F) current setting
LV 3I0_EF2 A 0.05Ir 20Ir 5
for Stage 2
LV T_EF2 s 0 60 60 Time setting for LV E/F, Stage 2
113
Chapter 7 Earth fault protection
LV
Curve_EF 1 12 1 Ref to IEC and ANSI Curves
Inv
LV 3I0_EF
A 0.05Ir 20Ir 5 Ref to IEC and ANSI Curves
Inv
LV K_EF Inv 0.05 999 1 Ref to IEC and ANSI Curves
LV A_EF Inv s 0 200 0.14 Ref to IEC and ANSI Curves
De-
fault
Setting Unit Min. Max. Description
set-
ting
The 1st stage of LV earth fault
LV Func_EF1 0 1 0 (EF_1) protection is switched ON
1-on; 0-off.
Direction (DIR) detection of LV EF
LV EF1 Direction 0 1 0 Stage 1 is switched ON
1-on; 0-off.
Direction unit of LV EF Stage 1
LV EF1 Dir To points to system
0 1 0
Sys 0 - point to the protected transformer
1- point to system
Inrush 2nd harmonic detection LV EF
LV EF1 Inrush
0 1 0 Stage 1 is switched ON
Block
1-on; 0-off.
nd
The 2 stage of LV earth fault
LV Func_EF2 0 1 0 (EF_2) protection is switched ON
1-on; 0-off.
114
Chapter 7 Earth fault protection
4 Report
Table 57 Event report list
Information Description
115
Chapter 7 Earth fault protection
Information Description
Information Description
5 Technical data
Table 59 Earth fault protection technical data
116
Chapter 7 Earth fault protection
Long inverse
ANSI Inverse; ANSI/IEEE C37.112,
Moderately inverse;
Very inverse;
Extremely inverse;
Definite inverse
user-defined characteristic IEC60255-151
T= ≤ ±5% setting + 40ms, at 2
<I/ISETTING < 20
Time factor of inverse time, A 0.005 to 200.0s, step
0.001s
Delay of inverse time, B 0.000 to 60.00s, step 0.01s
Index of inverse time, P 0.005 to 10.00, step 0.005
set time Multiplier for step n: k 0.05 to 999.0, step 0.01
Minimum operating time 20ms
Maximum operating time 100s
Reset mode instantaneous
Reset time approx. 40ms
Directional element
Operating area range of zero ≤ ±3°, at 3U0≥1V
160°
sequence directional element
Characteristic angle 0°to 90°, step 1°
Operating area range of negative ≤ ±3°, at 3U2≥2V
160°
sequence directional element
Characteristic angle 50°to 90°, step 1°
117
Chapter 7 Earth fault protection
118
Chapter 8 Neutral earth fault protection
119
Chapter 8 Neutral earth fault protection
1 Protection principle
1.1 Protection Elements
Each voltage side of the protected transformer is provided with three neutral
earth fault protection elements from which two elements operate as definite
earth fault stages and the other one operates with inverse time-current char-
acteristic. All the elements can operate in conjunction with the integrated in-
rush restraint and directional functions.
Various stages of each element are independent from each other and can be
combined as desired. They can be enabled or disabled in each side using
dedicated Binary settings. These Binary settings include “HV Func_Neu OC1”,
“HV Func_Neu OC2” and “HV Func_Neu OC Inv”, for HV side earth fault
protection, “MV Func_Neu OC1”, “MV Func_Neu OC2” and “MV Func_Neu
OC Inv”, for MV side earth fault protection, “LV Func_Neu OC1”, “LV
Func_Neu OC2” and “LV Func_Neu OC Inv”, for LV side earth fault protection.
For example by applying setting “1-on” to “HV Func_Neu OC1”, respective
stage of neutral earth fault protection would be enabled in HV side.
Individual pickup value for each definite stage can be defined by setting “HV
3I0_Neutral OC1” and “HV 3I0_Neutral OC2” for HV side, “MV 3I0_Neutral
OC1” and “MV 3I0_Neutral OC2” for MV side, “LV 3I0_Neutral OC1” and “LV
3I0_Neutral OC2” for LV side. By applying these settings, each neutral current
(quantity IN) measured from the installed neutral CT is compared separately
with the setting value for each stage. If the respective value is exceeded, a
trip time delay timer is started. The condition for start of the delay timer is ex-
pressed mathematically:
I N I N _ set
Equation 35
The timer is set to count up to a user-defined time delay. The time delay can
be set for each definite stage individually through settings “HV T_Neutral
OC1” and “HV T_Neutral OC2” for HV side, “MV T_Neutral OC1” and “MV
T_Neutral OC2” for MV side, “LV T_Neutral OC1” and “LV T_Neutral OC2”
for LV side. After the user-defined time delay has been elapsed, a trip signal is
issued if the inrush restraint feature is applied and no inrush current is de-
tected or inrush restraint is disabled. The neutral earth fault protection would
be blocked and therefore, no tripping takes place if the inrush restraint feature
is enabled and an inrush condition exists. However, an alarm report is issued
nominated as “HV Inrush Blk BU”, “MV Inrush Blk BU” or “LV Inrush Blk BU”,
indicating the blocking condition of neutral earth fault element caused by in-
rush condition detection.
Pickup value for the inverse time-current stage can be set by setting “HV
3I0_NOC Inv”, “MV 3I0_NOC Inv” and “LV 3I0_NOC Inv” for HV, MV and LV
sides, respectively. Each neutral current (quantity IN) measured by installed
neutral CT is separately compared with corresponding setting value. If a cur-
rent exceeds 1.1 times the setting value, corresponding stage picks up. When
120
Chapter 8 Neutral earth fault protection
an inverse time-current stage picks up, the tripping time is calculated from the
measured quantity IN, using the selected tripping curve. Maximum tripping
time is limited to 100s.
A _ NOC Inv
t K _ NOC Inv P _ NOC Inv
B _ NOC Inv
I
I S
-1
Equation 36
where:
A_NOC Inv: Time factor for inverse time stage
B_ NOC Inv: Time delay for inverse time stage
P_ NOC Inv: index for inverse time stage
K_ NOC Inv: Time multiplier
By applying pickup current and time multiplier settings, the device determines
the tripping time from the measured neutral current, based on the selected
inverse curve. Once the calculated time has been elapsed, a trip signal is
issued provided that no inrush current is detected or inrush restraint is disa-
bled. If the inrush restraint feature is enabled and an inrush condition exists,
the neutral earth fault protection would be blocked and therefore no tripping
takes place. However, alarm report of “HV Inrush Blk BU”, “MV Inrush Blk BU”
or “LV Inrush Blk BU” is issued, indicating the blocking condition of neutral
earth fault element caused by inrush condition detection.
The trip signals and corresponding event reports are available separately for
each stage. They include “HV Neu OC_1 Trip”, “HV Neu OC_2 Trip” and “HV
Neu OC IDMTL” for HV side, “MV Neu OC_1 Trip”, “MV Neu OC_2 Trip” and
“MV Neu OC IDMTL” for MV side, “LV Neu OC_1 Trip”, “LV Neu OC_1 Trip”
121
Chapter 8 Neutral earth fault protection
and “LV Neu OC IDMTL” for LV side neutral earth fault elements.
Since the inrush current contains a relatively large second harmonic compo-
nent which is nearly absent during a fault current, the inrush restraint oper-
ates based on the evaluation of the second harmonic content which is present
in the measured neutral current (quantity IN), or in the phase currents, based
on setting. The inrush condition is recognized if the ratio of second harmonic
current to the fundamental component exceeds the setting value “HV Ra-
tio_I2/I1_NOC”, “MV Ratio_I2/I1_NOC” or “LV Ratio_I2/I1_NOC” in the
measured neutral current. The setting is applicable to both the definite stages
of neutral earth fault protection element as well as the inverse time-current
stage. As soon as the measured ratio exceeds the set threshold, a restraint is
applied to those stages for which corresponding setting is applied to make
them blocked in inrush condition detection (“HV Neu OC1 Inrush Block”, “HV
Neu OC2 Inrush Block” and “HV Neu OC Inv Inrush Block” for HV side, “MV
Neu OC1 Inrush Block”, “MV Neu OC2 Inrush Block” and “MV Neu OC Inv
Inrush Block” for MV side, “LV Neu OC1 Inrush Block”, “LV Neu OC2 Inrush
Block” and “LV Neu OC Inv Inrush Block” for LV side).
122
Chapter 8 Neutral earth fault protection
Neu OC1 Direction”, “LV Neu OC2 Direction” and “LV Neu OC Inv Direction”
for LV side earth fault stages.
Furthermore, the directional orientation can be set individually for each stage
of neutral earth fault elements in various sides of the protected transformer.
This can be performed by Binary settings “HV Neu OC1 Dir To Sys”, “HV Neu
OC2 Dir To Sys” and “HV Neu OC Inv Dir To Sys” for HV side, “MV Neu OC1
Dir To Sys”, “MV Neu OC2 Dir To Sys” and “MV Neu OC Inv Dir To Sys” for
MV side, “LV Neu OC1 Dir To Sys”, “LV Neu OC2 Dir To Sys” and “LV Neu OC
Inv Dir To Sys” for LV side. The possible settings for these Binary setting
comprise “0-toward transformer” and “1-toward system”.
90°
3I 0
0°
3U 0_Ref
Angle_EF
Angle_Range
EF
Forward Bisector
-3 I 0
where:
123
Chapter 8 Neutral earth fault protection
The logic for definite and inverse time IDMTL neutral earth fault protection is
shown in below figure.
Func_Neu OC1( 2( on
And
Dir_Forward
Or NEF Direction Unit OK
VT failure
And
Direct OK at VT FAIL
Func_Neu OC1( 2( on
Func_Neu OC Inv on
3I0>3I0_NOC Inv
t
And NEF Inv Trip
NEF Direction Unit OK
124
Chapter 8 Neutral earth fault protection
It is possible to set whether the neutral earth fault protection elements can in-
itiate the integrated CBF protection or not. The available choices depend on
the voltage side of the power transformer at which neutral earth fault protec-
tion is applied. In this context, HV side neutral earth fault protection element
always initiates HV side CBF function with no additional setting. However, it is
possible to select whether it can initiate MV and LV CBF protection functions
via Binary settings “HV Neu OC Init LV CBF” and “HV Neu OC Init MV CBF”,
respectively.
MV side neutral earth fault protection element always initiates MV side CBF
function with no additional setting.
Neutral Earth
Fault Protection
INBK NEF1 Trip
UA NEF2 Trip
UC Relay Startup
Signal Description
Signal Description
125
Chapter 8 Neutral earth fault protection
3 Setting
Table 62 Settings of neutral earth fault protection for HV side of transformer
Default
Min. Max.
Setting setting
Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
HV neutral over-current (NOC)
c A 0.05Ir 20Ir 5 protection current setting for Stage
1
HV Time setting for HV NOC, Stage
T_Neutral s 0 60 60
1
OC1
HV HV neutral over-current (NOC)
3I0_Neutral A 0.05Ir 20Ir 5 protection current setting for Stage
OC2 2
HV Time setting for HV NOC, Stage
T_Neutral s 0 60 60
1
OC2
HV
Curve_NOC 1 12 1 Ref to IEC and ANSI Curves
Inv
HV 3I0_NOC
A 0.05Ir 20Ir 5 Ref to IEC and ANSI Curves
Inv
HV K_NOC
0.05 999 1 Ref to IEC and ANSI Curves
Inv
HV A_NOC
s 0 200 0.14 Ref to IEC and ANSI Curves
Inv
HV B_NOC
s 0 60 0 Ref to IEC and ANSI Curves
Inv
Table 63 Binary settings of neutral earth fault protection for HV side of transformer
De-
fault
Setting Unit Min. Max. Description
set-
ting
126
Chapter 8 Neutral earth fault protection
127
Chapter 8 Neutral earth fault protection
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
MV MV neutral over-current (NOC)
3I0_Neutral A 0.05Ir 20Ir 5 protection current setting for
OC1 Stage 1
MV Time setting for MV NOC, Stage
T_Neutral s 0 60 60
1
OC1
MV MV neutral over-current (NOC)
3I0_Neutral A 0.05Ir 20Ir 5 protection current setting for
OC2 Stage 2
MV Time setting for MV NOC, Stage
T_Neutral s 0 60 60
1
OC2
MV
Curve_NOC 1 12 1 Ref to IEC and ANSI Curves
Inv
MV
A 0.05Ir 20Ir 5 Ref to IEC and ANSI Curves
3I0_NOC Inv
MV A_NOC
s 0 200 0.14 Ref to IEC and ANSI Curves
Inv
MV P_NOC
0 10 0.02 Ref to IEC and ANSI Curves
Inv
128
Chapter 8 Neutral earth fault protection
Table 65 Binary settings of neutral earth fault protection for MV side of transformer
De-
fault
Setting Unit Min. Max. Description
set-
ting
The 1st stage of MV neutral OC
MV Func_Neu 0 1 0
(OC_1) protection is switched
OC1 ON
1-on; 0-off.
Direction (DIR) detection of MV
MV Neu OC1 Di- neutral OC Stage 1 is switched
0 1 0
rection ON
1-on; 0-off.
Direction unit of MV neutral OC
Stage 1 points to system
MV Neu OC1 Dir 0 1 0 0 - point to the protected trans-
To Sys
former
1- point to system
Inrush 2nd harmonic detection
MV Neu OC1 In- MV neutral OC Stage 1 is
0 1 0
rush Block switched ON
1-on; 0-off.
The 2nd stage of MV neutral OC
MV Func_Neu (OC_2) protection is switched
0 1 0
OC2 ON
1-on; 0-off.
Direction (DIR) detection of MV
MV Neu OC2 Di- neutral OC Stage 2 is switched
0 1 0
rection ON
1-on; 0-off.
Direction unit of MV neutral OC
Stage 2 points to system
MV Neu OC2 Dir 0 1 0 0 - point to the protected trans-
To Sys
former
1- point to system
Inrush 2nd harmonic detection
MV Neu OC2 In- MV neutral OC Stage 2 is
0 1 0
rush Block switched ON
1-on; 0-off.
The IDMTL inverse time stage
MV Func_Neu OC of MV neutral OC protection is
0 1 0
Inv switched ON
1-on; 0-off.
MV Neu OC Inv Direction (DIR) detection of MV
0 1 0
Direction neutral OC IDMTL inverse time
129
Chapter 8 Neutral earth fault protection
stage is switched ON
1-on; 0-off.
Direction unit of MV neutral OC
IDMTL inverse time stage points
MV Neu OC Inv to system
0 1 0
Dir To Sys 0 - point to the protected trans-
former
1- point to system
Inrush 2nd harmonic detection
MV Neu OC Inv MV neutral OC IDMTL inverse
0 1 0
Inrush Block time stage is switched ON
1-on; 0-off.
Select to block MV neutral OC
protection or exit direction unit,
Block MV NOC at 0 1 0 when MV VT fails
MV VT_Fail 0 - MV Direct OK at MV VT Fail
1 - Blk MV NOC at MV VT Fail
MV neutral OC protection initi-
MV Neu OC Init 0 1 0 ate LV side CBF
MV CBF
0 - initiate, 1 – not initiate
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
LV LV neutral over-current (NOC)
3I0_Neutral A 0.05Ir 20Ir 5 protection current setting for
OC1 Stage 1
LV T_Neutral
s 0 60 60 Time setting for LV NOC, Stage 1
OC1
LV LV neutral over-current (NOC)
3I0_Neutral A 0.05Ir 20Ir 5 protection current setting for
OC2 Stage 2
LV T_Neutral
s 0 60 60 Time setting for LV NOC, Stage 1
OC2
LV
Curve_NOC 1 12 1 Ref to IEC and ANSI Curves
Inv
LV 3I0_NOC Ref to IEC and ANSI Curves
A 0.05Ir 20Ir 5
Inv
LV K_NOC
0.05 999 1 Ref to IEC and ANSI Curves
Inv
LV A_NOC
s 0 200 0.14 Ref to IEC and ANSI Curves
Inv
LV B_NOC
s 0 60 0 Ref to IEC and ANSI Curves
Inv
130
Chapter 8 Neutral earth fault protection
LV P_NOC
0 10 0.02 Ref to IEC and ANSI Curves
Inv
Table 67 Binary settings of neutral earth fault protection for LV side of transformer
De-
fault
Setting Unit Min. Max. Description
set-
ting
The 1st stage of LV neutral OC
(OC_1) protection is switched
LV Func_Neu OC1 0 1 0
ON
1-on; 0-off.
Direction (DIR) detection of LV
LV Neu OC1 Di- neutral OC Stage 1 is switched
0 1 0
rection ON
1-on; 0-off.
Direction unit of LV neutral OC
Stage 1 points to system
LV Neu OC1 Dir 0 1 0 0 - point to the protected trans-
To Sys
former
1- point to system
Inrush 2nd harmonic detection
LV Neu OC1 In- LV neutral OC Stage 1 is
0 1 0
rush Block switched ON
1-on; 0-off.
The 2nd stage of LV neutral OC
(OC_2) protection is switched
LV Func_Neu OC2 0 1 0
ON
1-on; 0-off.
Direction (DIR) detection of LV
LV Neu OC2 Di- neutral OC Stage 2 is switched
0 1 0
rection ON
1-on; 0-off.
Direction unit of LV neutral OC
Stage 2 points to system
LV Neu OC2 Dir 0 1 0 0 - point to the protected trans-
To Sys
former
1- point to system
LV Neu OC2 In- Inrush 2nd harmonic detection
0 1 0
rush Block LV neutral OC Stage 2 is
131
Chapter 8 Neutral earth fault protection
switched ON
1-on; 0-off.
The IDMTL inverse time stage
LV Func_Neu OC of LV neutral OC protection is
0 1 0
Inv switched ON
1-on; 0-off.
Direction (DIR) detection of LV
LV Neu OC Inv neutral OC IDMTL inverse time
0 1 0
Direction stage is switched ON
1-on; 0-off.
Direction unit of LV neutral OC
IDMTL inverse time stage points
LV Neu OC Inv Dir to system
0 1 0
To Sys 0 - point to the protected trans-
former
1- point to system
Inrush 2nd harmonic detection
LV Neu OC Inv LV neutral OC IDMTL inverse
0 1 0
Inrush Block time stage is switched ON
1-on; 0-off.
Select to block LV neutral OC
protection or exit direction unit,
Block LV NOC at 0 1 0 when LV VT fails
LV VT_Fail 0 - LV Direct OK at LV VT Fail
1 - Blk LV NOC at LV VT Fail
LV neutral OC protection initiate
LV Neu OC Init LV 0 1 0 LV side CBF
CBF
0 - initiate, 1 – not initiate
4 Report
Table 68 Event report list
Information Description
132
Chapter 8 Neutral earth fault protection
Information Description
5 Technical data
Table 70 Neutral earth fault protection technical data
133
Chapter 8 Neutral earth fault protection
134
Chapter 9 Thermal overload protection
135
Chapter 9 Thermal overload protection
1 Introduction
The insulating material surrounding the transformer windings ages rapidly if
the temperature exceeds the design limit value. Furthermore, by using less
and less metal per MVA of transformed power, the designed limit value is
reduced in modern power transformers. Hence, it represents an essential
requirement to provide thermal protection to supplement the winding temper-
ature device. The thermal overload protection estimates winding temperature
and therefore prevents damage to transformer caused by thermal overload-
ing.
2 Protection principle
The thermal overload protection includes two stages (alarm and trip). They
work by using an approximate replica of the temperature rise in the protected
object caused by overload. The thermal replica is implemented based on
thermal models (Cold / Hot Curve) of IEC60255-8 Std., without ambient
temperature influence.
Both of the alarm and trip stages can be enabled or disabled by using Binary
setting “HV Func_Thermal OvLd”, “MV Func_Thermal OvLd” or “LV
Func_Thermal OvLd” on. The thermal overload protection can be assigned to
any desired side (HV, MV or LV) of the protected object. However, for trans-
formers with tap changer, it is recommended to use the function on the
non-regulated side. To enable the protection on each side, setting of “1-on”
should be applied to corresponding Binary setting.
Both of the thermal overload stages can use cold curve or hot curve in their
calculations, based on the setting applied at Binary setting “HV Cold Curve”,
“MV Cold Curve” or “LV Cold Curve”. If the protection is enabled in one side,
and the measured current in each phase of the protected transformer in cor-
responding side exceeds the threshold defined by setting “HV I_Therm OL
Alarm”, “MV I_Therm OL Alarm” or “LV I_Therm OL Alarm”, a counter is in-
cremented from 0% to 100%. When the counter is accumulated to its alarm
setting which correspond to the expiration of alarm time delay according to
the selected cold/hot characteristic, the alarm report “HV Load Alarm”, “MV
Load Alarm” or “LV Load Alarm” is given to allow a preventive load reduction.
The alarm signal is cancelled as soon as the measured phase current falls
below the threshold defined by setting “HV I_Therm OL Alarm”, “MV I_Therm
OL Alarm” or “LV I_Therm OL Alarm”. However, the counter is decremented to
zero according to cool down time of the transformer (the time by which the
thermal replica counter reaches from 100% to 0%). The cool down time is
informed to the device by setting “HV T_Const Cool Down”, “MV T_Const
Cool Down” and “LV T_Const Cool Down”.
136
Chapter 9 Thermal overload protection
given. The alarm signal is cancelled as soon as the measured phase current
falls below the threshold defined by setting “HV I_Therm OL Trip”, “MV
I_Therm OL Trip” or “LV I_Therm OL Trip”. However, the counter is decre-
mented to zero according to cool down time of the transformer which is en-
tered into the device by setting “HV T_Const Cool Down”, “MV T_Const Cool
Down” and “LV T_Const Cool Down”.
The cold and hot curves used in each thermal overload stages, is based on
thermal curves defined in IEC 60255-8 Std.
I ph
2
t ln 2 2
I ph I
Equation 37
I ph I P
2 2
t ln 2 2
I ph I
Equation 38
Where,
IΘ is the setting for alarm and trip stages of the thermal overload protection, in
rms. It should be set considering the maximum permissible thermal continu-
ous overload current of the transformer windings and insulations. The setting
is applied by using “HV I_Therm OL Alarm” and “HV I_Therm OL Trip” for HV
side, “MV I_Therm OL Alarm” and “HV I_Therm OL Trip” for MV side, and
“H\LV I_Therm OL Alarm” and “HV I_Therm OL Trip” for LV side of the power
transformer.
137
Chapter 9 Thermal overload protection
steady-state temperature.
NOTE: When Binary setting “xx Curve/Hot Curve” is set to 0, and fundamental
current is less than the settings, and the heat accumulation is cleared and set
as “0” automatically.
Thermal Overload
Protection
IA1 Therm OL Trip
IA2
IB2
IC2
Signal Description
Signal Description
4 Setting
Table 73 Settings of thermal overload protection for HV side of transformer
138
Chapter 9 Thermal overload protection
De-
fault
Setting Unit Min. Max. Description
set-
ting
Thermal overload in HV
HV Func_Thermal
0 1 0 side is switched on
OvLd
0 - OFF, 1 - ON
HV side using hot/cold
curve type
HV Cold Curve 0 1 0
0 – Hot curve, 1 – Cold
curve
HV thermal overload pro-
HV Thermal Init LV
0 1 0 tection initiate LV side CBF
CBF
0 - initiate, 1 – not initiate
HV thermal overload pro-
HV Thermal Init MV tection initiate MV side
0 1 0
CBF CBF
0 - initiate, 1 – not initiate
Default
Min. Max.
setting
Setting Unit (Ir:5A/ (Ir:5A/ Description
(Ir:5A/
1A) 1A)
1A)
Setting for MV-side thermal
MV I_Therm OL Trip A 0.1Ir 5Ir 2 overload trip-stage current
Setting for MV-side thermal
MV I_Therm OL
A 0.1Ir 5Ir 2 overload alarm-stage cur-
Alarm
rent
Time const for MV-side
MV T_Const Therm s 1 9999 10 thermal overload protection
MV T_Const Cool Cool down time delay for
Down
s 1 9999 10 MV-side thermal overload
139
Chapter 9 Thermal overload protection
De-
fault
Setting Unit Min. Max. Description
set-
ting
Thermal overload in MV
MV Func_Thermal
0 1 0 side is switched on
OvLd
0 - OFF, 1 - ON
MV side using hot/cold
0 1 0
curve type
MV Cold Curve
0 – Hot curve, 1 – Cold
curve
MV thermal overload pro-
MV Thermal Init HV1 0 1 0
tection initiate HV side
CBF CBF
0 - initiate, 1 – not initiate
5 Report
Table 77 Event report list
Information Description
Information Description
Information Description
140
Chapter 9 Thermal overload protection
6 Technical data
Table 80 Thermal overload protection technical data
I eq2
IEC cold curve t ln 2 2
IEC 60255–8,
≤ ±5% setting or +40ms
I eq I
I eq2 I P2 IEC 60255–8,
IEC hot curve t ln 2 2 ≤ ±5% setting or +40ms
I eq I
141
Chapter 9 Thermal overload protection
142
Chapter 10 Overload protection
143
Chapter 10 Overload protection
1 Protection principle
Overload protection is equipped for each voltage side and LV delta winding.
The function is to protect all sides of windings of transformer continuous
overload currents.
HV Func_OverLoad on HV T_OverLoad
A
Load Alarm
Max(IA,IB,IC)>HV N
I_OverLoad D
The LV winding overload includes one alarm and two definite time tripping
stages, namely low-setting tripping stage and high-setting tripping stage. The
two tripping stage can be set respective to initiate each side CBF or not
LW Func_OvLd Alarm on
144
Chapter 10 Overload protection
Overload Protection
IC1
IA2
IB2
IC2
Delta Winding
Overload Protection
IA Overload high set trip
IC Overload Alarm
Relay Startup
Signal Description
Signal Description
145
Chapter 10 Overload protection
3 Setting
Table 83 Setting of overload protection for HV side of transformer
De-
fault
Min. Max.
set-
Setting Unit (Ir:5A/ (Ir:5A/ Description
ting
1A) 1A)
(Ir:5A/
1A)
HV I_OverLoad A 0.1Ir 4Ir 2 Overcurrent Setting of overload
De-
fault
Setting Unit Min. Max. Description
set-
ting
Overload (LOAD) protection in
HV Func_OverLoad 0 1 0 HV side is switched ON
1-on; 0-off.
De-
fault
Min. Max.
set-
Setting Unit (Ir:5A/ (Ir:5A/ Description
ting
1A) 1A)
(Ir:5A/
1A)
MV I_OverLoad A 0.1Ir 4Ir 2 Overcurrent Setting of overload
De-
fault
Setting Unit Min. Max. Description
set-
ting
Overload (LOAD)in MV side
MV Func_OverLoad 0 1 0
on
De-
fault
Min. Max.
set-
Setting Unit (Ir:5A/ (Ir:5A/ Description
ting
1A) 1A)
(Ir:5A/
1A)
LV I_OverLoad A 0.1Ir 4Ir 2 Overcurrent Setting of overload
146
Chapter 10 Overload protection
De-
fault
Setting Unit Min. Max. Description
set-
ting
LV Func_OverLoad 0 1 0 Overload (LOAD)in LV side on
De-
fault
Min. Max.
set-
Setting Unit (Ir:5A/ (Ir:5A/ Description
ting
1A) 1A)
(Ir:5A/
1A)
Alarm current setting of LV delta
LW I_OvLd Alarm A 0.1Ir 4Ir 20 winding overload protection
Alarm time setting of LV delta
LW T_OvLd Alarm s 0.1 3600 10 winding overload protection
LW I_OvLd Low
A 0.1Ir 4Ir 20 Low stage tripping current setting
Trip
LW T_OvLd Low Low stage tripping time setting
Trip
s 0.1 3600 10
LW I_OvLd High
A 0.1Ir 4Ir 20 High stage tripping current setting
Trip
LW T_OvLd High High stage tripping time setting
Trip
s 0.1 3600 10
De-
fault
Setting Unit Min. Max. Description
set-
ting
Alarm stage of LV delta wind-
LW Func_OvLd ing (LWIND) overload (LOAD)
0 1 0
Alarm protection is switched ON.
1-on; 0-off.
Low-setting trip stage of LV
LW Func_OvLd Low delta winding overload protec-
0 1 0
Trip tion is switched ON.
1-on; 0-off.
High-setting trip stage of LV
LW Func_OvLd High delta winding overload protec-
0 1 0
Trip tion is switched ON.
1-on; 0-off.
Low-setting trip stage of LV
delta winding overload protec-
Low Trip Init HV1 CBF 0 1 0
tion initiate HV1 side CBF
0 - initiate, 1 – not initiate
147
Chapter 10 Overload protection
4 Report
Table 91 Event report list
Information Description
LW Load Low_Stg LV delta winding (LWIND) overload (LOAD) protection low setting
trip
LW Load High_Stg LV delta winding (LWIND) overload (LOAD) protection high setting
trip
Information Description
Information Description
148
Chapter 11 Overvoltage protection
149
Chapter 11 Overvoltage protection
1 Introduction
Voltage protection has the function to protect electrical equipment against
overvoltage condition. Abnormally high voltages often occur e.g. in low
loaded, long distance transmission lines, in islanded systems when generator
voltage regulation fails, or after full load shutdown of a generator from the
system. Even if compensation reactors are used to avoid line overvoltage by
compensation of the line capacitance and thus reduction of the overvoltage,
the overvoltage will endanger the insulation if the reactors fail (e.g. fault
clearance). The line must be disconnected within very short time.
2 Protection principle
All the three phase voltages are measured continuously, and compared with
the corresponding setting value. If a phase voltage exceeds the set thresh-
olds, “HV U_OV1” or “HV U_OV2” for HV said, “MV U_OV1” or “MV U_OV2”
for MV said, after expiry of the time delays, “HV T_OV1’ or “HV T_OV2”, and
“MV T_OV1’ or “MV T_OV2”, the protection IED will issue alarm signal or trip
command according to the user’s requirement.
There are two stages included in overvoltage protection, each stage can be
set to alarm or trip separately in binary setting, and the time delay for each
stage can be individually set. Thus, the alarming or tripping can be
time-coordinated based on how severe the voltage increase, e.g. in case of
high overvoltage, the trip command will be issued with a short time delay,
whereas for the less severe overvoltage, trip or alarm signal can be issued
with a longer time delay.
150
Chapter 11 Overvoltage protection
Additionaly, the dropout ratio of the overvoltage protection can be set in set-
ting “Dropout_OV”. Therefore, the trip command of overvoltage is reset if the
measured voltage comes bellow the ratio value mentioned in this setting.
The phase to earth overvoltage protection operates just like the phase to
phase protection except that it detects phase to earth voltages.
3 Logic diagram
Ua>HV U_OV1
O HV OV Chk PE on
Ub>HV U_OV1
R
Uc>HV U_OV1
HV OV1 Trip on
Trip
Uab>HV U_OV1
O
HV T_OV1
Ubc>HV U_OV1 O R
HV OV Chk PE off
R HV OV1 Trip off
Alarm
Uca>HV U_OV1
Overvoltage Protection
UA OV1 Trip
UB OV2 Trip
UC OV1 Alarm
OV2 Alarm
Relay Startup
Signal Description
151
Chapter 11 Overvoltage protection
Signal Description
Signal Description
5 Setting
Table 96 Function setting list for overvoltage protection for HV side of transformer
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
HV voltage setting for stage 1
HV U_OV1 V 40 200 200
of overvoltage protection
HV time setting for stage 1 of
HV T_OV1 s 0 60 60
overvoltage protection
HV voltage setting for stage 2
HV U_OV2 V 40 200 200
of overvoltage protection
HV time setting for stage 2 of
HV T_OV2 s 0 60 60
overvoltage protection
HV dropout ratio for overvolt-
HV Dropout_OV 0.9 0.99 0.95
age protection
Table 97 Binary setting list for overvoltage protection for HV side of transformer
Default
Setting Unit Min. Max. Description
setting
HV Func_OV1 0 1 0 HV overvoltage stage 1 enabled
152
Chapter 11 Overvoltage protection
Default
Setting Unit Min. Max. Description
setting
or disabled
HV Func_OV2 HV overvoltage stage 1 trip or
0 1 0
alarm
HV Func_OV2 HV overvoltage stage 2 enabled
0 1 0
or disabled
HV OV2 Trip HV overvoltage stage 2 trip or
0 1 0
alarm
HV OV Chk PE HV phase to phase voltage or
0 1 0 phase to earth measured for
overvoltage protection
Table 98 Function setting list for overvoltage protection for MV side of transformer
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
MV voltage setting for stage 1
MV U_OV1 V 40 200 200
of overvoltage protection
MV time setting for stage 1 of
MV T_OV1 s 0 60 60
overvoltage protection
MV voltage setting for stage 2
MV U_OV2 V 40 200 200
of overvoltage protection
MV time setting for stage 2 of
MV T_OV2 s 0 60 60
overvoltage protection
MV dropout ratio for overvolt-
MV Dropout_OV 0.9 0.99 0.95
age protection
Table 99 Binary setting list for overvoltage protection for MV side of transformer
Default
Setting Unit Min. Max. Description
setting
MV Func_OV1 MV overvoltage stage 1 enabled
0 1 0
or disabled
MV Func_OV2 MV overvoltage stage 1 trip or
0 1 0
alarm
MV Func_OV2 MV overvoltage stage 2 enabled
0 1 0
or disabled
MV OV2 Trip MV overvoltage stage 2 trip or
0 1 0
alarm
MV OV Chk PE MV phase to phase voltage or
0 1 0
phase to earth measured for
153
Chapter 11 Overvoltage protection
Default
Setting Unit Min. Max. Description
setting
overvoltage protection
6 Report
Table 100 Event report list
Information Description
Information Description
7 Technical data
Table 103 Technical data for overvoltage protection
154
Chapter 11 Overvoltage protection
155
Chapter 11 Overvoltage protection
156
Chapter 12 Undervoltage protection
1 Introduction
Undervoltage protection has the function to protect electrical equipment
against undervoltage condition. It can detect voltage collapses on transmis-
sion lines, power transformer and electrical machines and prevents inadmis-
sible operation condition and a possible stability problem.
2 Protection principle
2.1.1 Phase to phase underovltage protection
All the three phase voltages are measured continuously, and compared with
the corresponding setting value. If phase to phase voltage falls below the set
threshold and after expiry of the time delay, the protection IED will issue
alarm signal or trip command according to the user’s requirement.
There are two stages included in undervoltage protection, each stage can be
set to alarm or trip separately in binary setting, and the time delay for each
stage can be individually set. Thus, the alarming or tripping can be
time-coordinated based on how severe the voltage collapse, e.g. in case of
severe undervoltage happens, the trip command will be issued with a short
time delay, whereas for the less severe undervoltage, trip or alarm signal can
157
Chapter 11 Overvoltage protection
The phase to earth undervoltage protection operates just like the phase to
phase protection except that it detects phase to earth voltages.
158
Chapter 12 Undervoltage protection
3 Logic diagram
Ua<U_UV
Uc<U_UV
UV Chk PE On
OR
Ua<U_UV
Ub<U_UV AND
UV Chk All Phase On
Uc<U_UV
OR
Uab<U_UV
Uca<U_UV
UV Chk PE Off
OR
Uab<U_UV
Ubc<U_UV AND
UV Chk All Phase On
Uca<U_UV
OR
UV Trip On
CB 3 Poles Close
Trip
UV Chk CB status On
AND Func_UV
OR
Max(Ia,Ib,Ic)>I_Uv Alarm
UV Chk Current On UV Trip Off
VT fail
159
Chapter 11 Overvoltage protection
UA UV1 Trip
UB UV2 Trip
UC UV1 Alarm
IA UV2 Alarm
IB Relay Startup
IC
CB 3 Poles Close
Signal Description
UA Phase A voltage input
UB Phase B voltage input
UC Phase C voltage input
IA Phase A current input
IB Phase B current input
IC Phase C current input
Signal Description
CB 3 Poles Close 3 poles of circuit breaker(CB) is close
Signal Description
UV1 Alarm Undervoltage protection stage 1 alarm
UV2 Alarm Undervoltage protection stage 2 alarm
UV1_Trip Undervoltage protection stage 1 trip
UV2_Trip Undervoltage protection stage 2 trip
Relay Startup Relay Startup
5 Setting parameters
Setting lists
160
Chapter 12 Undervoltage protection
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (sIr:5A/ Description
(Ir:5A/1
A) 1A)
A)
Voltage setting for undervolt-
U_UV1 V 5.00 150.0 40
age protection stage 1
Time setting for undervoltage
T_UV1 s 0.00 120.00 0.3
protection stage 1
Voltage setting for undervolt-
U_UV2 V 5.00 150.0 45
age protection stage 2
Time setting for undervoltage
T_UV2 s 0.00 120.00 0.6
protection stage 2
Dropout ratio for undervoltage
Dropout_UV 1.01 2.00 1.05
protection
Current setting for undervolt-
I_UV_Chk A 0.05 10.00 0.1In
age
Default
Setting Unit Min. Max. Description
setting
Undervoltage stage 1 enabled or
Func_UV1 0 1 1
disabled
Undervotage stage 1 tripping
UV1 Trip 0 1 0
enabled or disabled
Undervoltage stage 2 enabled or
Func_UV2 0 1 1
disabled
Undervotage stage 2 tripping
UV2 Trip 0 1 0
enabled or disabled
Checking current for undervolt-
UV Chk Current 0 1 1
age protection
Checking CB aux. contact for
UV Chk CB Status 0 1 1
undervoltage protection
Phase to phase or phase to earth
UV Chk PE 0 1 1 measured for undervoltage pro-
tection
Checking three phase voltage for
UV Chk All Phase 0 1 0
undervoltage protection
UV Init CBF 0 1 0 UV protection initiate other side
161
Chapter 11 Overvoltage protection
Default
Setting Unit Min. Max. Description
setting
CBF
6 Reports
Table 109 Event report list
Information Description
UV1 Trip Undervoltage stage 1 trip
UV2 Trip Undervoltage stage 2 trip
Information Description
UV1 Alarm Undervoltage stage 1 alarm
UV2 Alarm Undervoltage stage 2 alarm
7 Technical data
Table 111 Technical data for undervoltage protection
162
Chapter 12 Undervoltage protection
163
Chapter 12 Circuit breaker failure protection
164
Chapter 12 Circuit breaker failure protection
165
Chapter 12 Circuit breaker failure protection
1 Introduction
The circuit breaker failure (CBF) protection function monitors proper tripping
of the relevant circuit breaker. There are two separate CBF protection inte-
grated in the IED. They are dedicated to HV and MV sides of the protected
transformer.
2 Protection principle
Normally, the circuit breaker should be tripped and therefore interrupt the fault
current whenever a short circuit protection function issues a trip command.
The circuit breaker failure protection provides rapid back-up fault clearance,
in the event of circuit breaker malfunction to respond to a trip command. This
feature can be enabled or disabled at each side of the protected transformer
via Binary settings “HV1 CBF ON”, “MV CBF ON”. If setting “1-On” is applied
at these Binary settings, respective CBF protection will be switched on. In this
case, by operation of a protection function, and subsequent CBF initiation by
respective protection function, a report nominated as “HV1 CBF INIT” or “MV
CBF INIT” is generated by the IED. Furthermore, CBF initiation causes a
programmed timer to run toward a preset time delay limit. This time delay is
set by user under the settings “HV1 T1_CBF” or “MV1 T1_CBF”. If the circuit
breaker has not been opened after expiration of the preset time limit, the cir-
cuit breaker failure protection issues a command to trip circuit breaker (e.g.
via a second trip coil). Furthermore, event report of “HV1 CBF T1” or “MV
CBF T1”is generated by the device. If the circuit breaker doesn’t respond to
the repeated trip command, until another preset delay time which is set at
“HV1 T2_CBF” or “MV1 T2_CBF”, the protection issues a trip command to
isolate the fault by tripping other surrounding backup circuit breakers (e.g. the
other CBs connected to the same bus section as the faulty CB). Furthermore,
event report of “HV1 CBF T2” or “MV CBF T2” is generated in this case.
Initiation of CBF protection can be carried out by both the internal and exter-
nal protection functions. If it is desired to initiate the CBF protection by means
of external protection functions, they should be marshaled to Binary input (BI)
of “HV1 CBF EXT. INT” or “MV CBF EXT. INT” for HV or MV CBF protection
respectively. Internal protection functions can initiate the CBF protection in-
tegrated in IED (HV and/or MV CBF), according to the mapping shown in
below table.
166
Chapter 12 Circuit breaker failure protection
CBF INITIATION
PROTECTION FUNCTIONS
HV1 MV
CW CW
HV Thermal Overload Protection Trip ●
[0/1] [0/1]
CW
MV Thermal Overload Protection Trip ● -
[0/1]
CW
LV Thermal Overload Protection Trip - ●
[0/1]
CW CW
HV Overcurrent Protection Trip [INV / DEF (Stage-1,2)] ●
[0/1] [0/1]
CW
LV Overcurrent Protection Trip [INV / DEF (Stage-1,2)] - ●
[0/1]
CW CW
HV Earth Fault Protection Trip [INV / DEF (Stage-1,2)] ●
[0/1] [0/1]
CW
MV Earth Fault Protection Trip [INV / DEF (Stage-1,2)] ● -
[0/1]
CW
LV Earth Fault Protection Trip [INV / DEF (Stage-1,2)] - ●
[0/1]
167
Chapter 12 Circuit breaker failure protection
CW CW CW
DI1 Trip
[0/1] [0/1] [0/1]
CW CW CW
DI2 Trip
[0/1] [0/1] [0/1]
In above table,
● :means that the protection function working at a given side of the protected
transformer always initiate the CBF protection applied in specified side of the
power transformer. As can be seen, differential, restricted earth fault and
overexcitation protection functions initiate CBF protection in each side of
protected transformer with no additional settings.
The statement CW [0/1] means that the protection function can initiate CBF
protection according to the setting which is applied at respective Binary set-
ting. The setting includes “1: Initiate the CBF” and “0: Don’t initiate the CBF”.
Related Binary settings are available for specific functions which include
thermal overload, overcurrent, earth fault and neutral earth fault protections.
Furthermore, the dash sign means that it is not possible to initiate CBF pro-
tection of respective side by operation of a protection function working at a
given side of the protected transformer.
There are two criteria for breaker failure detection: the first one is to check
whether the actual current flow effectively disappeared after a tripping com-
mand had been issued. The second one is to evaluate the circuit breaker
auxiliary contact status. Since circuit breaker is supposed to be open when
current disappears from the circuit, the first criterion (current monitoring) is
the most reliable means for relay to be informed about proper operation of
circuit breaker. Therefore, current monitoring is applied to detect circuit
breaker failure condition. In this context, the monitored current of each phase
is compared with the pre-defined setting. The settings are applied at “HV1
I_CBF OC” or “MV I_CBF OC”, for HV or MV CBF protection.
168
Chapter 12 Circuit breaker failure protection
For protection functions where the tripping criterion is not dependent on cur-
rent, current flow is not a suitable criterion for proper operation of the breaker.
In this case, the position of the circuit breaker auxiliary contact should be
used to determine if the circuit breaker properly operated. It is possible to
evaluate the circuit breaker operation from its auxiliary contact status. To do
so, Binary settings “HV1 CB Status Check On” or “MV CB Status Check On”
should be set to “1-On” to integrate circuit breaker auxiliary contacts into CBF
function..
3 Logic diagram
BI_HV1 CB EXT.INT
O
Init HV CBF
Inter 3Ph Init CBF R
169
Chapter 12 Circuit breaker failure protection
Ib >HV1 I_CBF
OC
HV 3I0/3I2 Check Off
3I0 > HV1
3I0_CBF ZS
A O
3I2 > HV1
3I2_CBF NS N R
O HV 3I0/3I2 Check On
Ic > HV1 I_CBF D
OC R
Ia >HV1 I_CBF OC
Ic >HV1 I_CBF
OC
HV 3I0/3I2 Check Off
3I0 > HV1
3I0_CBF ZS
A O
3I2 > HV1
3I2_CBF NS N R
O HV 3I0/3I2 Check On
Ib > HV1 I_CBF D
OC R
Ia > HV1 I_CBF
OC O
R Curr. Crit.
BI_HV1 CB Open A
A A
BI_HV1 CB Open B N N CB is closed
D D
BI_HV1 CB Open C
Init HV CBF A
N
CBF Curr. Crit. 3P O D
R
170
Chapter 12 Circuit breaker failure protection
CB is closed
CB Status Check On O
A
Curr. crit. R Func_CBF on
N
D T1_CBF CBF stg1
Init HV CBF
T2_CBF CBF stg2
Circuit Breaker
Failure Proteciton
IA CBF Stage 1 Trip
IC Relay Startup
CB Pole A Open
CB Pole B Open
CB Pole C Open
Signal Description
Signal Description
171
Chapter 12 Circuit breaker failure protection
Signal Description
Signal Description
5 Setting
Table 116 Settings of CBF protection for HV side of transformer
Default
Min. Max.
Setting Unit setting Description
(Ir:5A/1A) (Ir:5A/1A)
(Ir:5A/1A)
Phase current setting value for
HV I_CBF
A 0.05Ir 20Ir 5 HVcircuit breaker failure (CBF)
OC
protection
Negative sequence (NS) cur-
HV
3I2_CBF A 0.05Ir 20Ir 5 rent setting 3I 2 value for HV
NS
CBF protection
Zero sequence (ZS) current
HV
3I0_CBF A 0.05Ir 20Ir 5 setting 3I 0 value for HV1
ZS
CBF protection
Time setting value of Stage 1,
HV T1_CBF s 0 32 10
for HV CBF protection
Time setting value of Stage 2,
HV T2_CBF s 0.1 32 10
for HV CBF protection
172
Chapter 12 Circuit breaker failure protection
De-
Setting Unit Min. Max. fault Description
setting
HV Circuit breaker failure (CBF)
HV Func_CBF 0 1 0 protection is switched ON
1-on; 0-off.
HV CBF protection detect nega-
HV 3I0/3I2 Check tive or zero sequence current
0 1 0
On 3I0 or 3I2.
1-Detect; 0- Not Detect
HV CBF protection detect HV1
HV CB Status
0 1 0 CB status
Check On
1-Detect; 0- Not Detect
Default
Min. Max.
Setting Unit setting Description
(Ir:5A/1A) (Ir:5A/1A)
(Ir:5A/1A)
MVI_CBF Phase current setting value for
A 0.05Ir 20Ir 5
OC MV CBF protection
Negative sequence (NS) cur-
MV
3I2_CBF A 0.05Ir 20Ir 5 rent setting 3I 2 value for MV
NS
CBF protection
Zero sequence (ZS) current
MV
3I0_CBF A 0.05Ir 20Ir 5 setting 3I 0 value for MV CBF
ZS
protection
Time setting value of Stage 1,
MV T1_CBF s 0 32 10
for MV CBF protection
Time setting value of Stage 2,
MV T2_CBF s 0.1 32 10
for MV CBF protection
De-
Setting Unit Min. Max. fault Description
setting
173
Chapter 12 Circuit breaker failure protection
Default
Min. Max.
Setting Unit setting Description
(Ir:5A/1A) (Ir:5A/1A)
(Ir:5A/1A)
LV I_CBF Phase current setting value for
A 0.05Ir 20Ir 5
OC LV CBF protection
Negative sequence (NS) cur-
LV 3I2_CBF
A 0.05Ir 20Ir 5 rent setting 3I 2 value for LV
NS
CBF protection
Zero sequence (ZS) current
LV 3I0_CBF
A 0.05Ir 20Ir 5 setting 3I 0 value for LV CBF
ZS
protection
Time setting value of Stage 1,
LV T1_CBF s 0 32 10
for LV CBF protection
Time setting value of Stage 2,
LV T2_CBF s 0.1 32 10
for LV CBF protection
De-
Setting Unit Min. Max. fault Description
setting
LV Circuit breaker failure (CBF)
LV Func_CBF 0 1 0 protection is switched ON
1-on; 0-off.
LV CBF protection detect nega-
LV 3I0/3I2 Check
0 1 0 tive or zero sequence current
On
3I0 or 3I2.
174
Chapter 12 Circuit breaker failure protection
6 Report
Table 122 Event report list
Information Description
7 Technical data
Item Rang or Value Tolerance
phase current 0.08 Ir to 20.00 Ir ≤ ±3% setting or ±0.02Ir
Negative sequence current
zero sequence current
Time delay of stage 1 0.00s to 32.00 s, step 0.01s ≤ ±1% setting or +25 ms, at
175
Chapter 12 Circuit breaker failure protection
Time delay of stage 2 0.00s to 32.00 s, step 0.01s 200% energizing setting
Reset ratio >0.95
Reset time < 25ms
176
Chapter 13 Dead zone protection
177
Chapter 13 Dead zone protection
1 Introduction
The IED provides this protection function to protect dead zone, namely the
area between circuit breaker and CT in the case that CB is open. Therefore,
by occurrence of a fault in dead zone, the short circuit current is measured by
protection relay while CB auxiliary contacts indicate the CB is open.
When one bus side CT of feeder is applied, once a fault occurs in the dead
zone, the IED trips the relevant busbar zone. Tripping logic is illustrated in
below figure.
2 Protection principle
In the case of feeders with bus side CTs, once a fault occurs in the dead zone,
the IED trips the relevant busbar zone CBs. Tripping concept is illustrated in
the below figure.
Trip trip
Bus1 Bus1
IFAULT
IFAULT
T1
Ln L1 Ln L1
Bus2 T1 Bus2
Bus3 Bus3
Legend: Legend:
Opened CB Opened CB
Closed CB Closed CB
178
Chapter 13 Dead zone protection
Figure 60 Tripping logic for applying bus side CT and for applying line side CT
Internal/external initiation
Self-adaptive for bus side CT or line side CT. For bus side CTs, the dead
zone protection will select to trip breakers on other lines connected to the
same busbar. For line side CTs, the dead zone protection will select trip op-
posite side breakers on the same line.
3 Logic diagram
Func_HV CBF
On
Init HV CBF
A Func_Dead Zone On
CBF.Curr. Crit. N T_Dead Zone Dead Zone Trip
D
BI_HV PhA CB Open A
BI_HV PhB CB Open N A
D N
BI_HV PhC CB Open D
BI_HV 3Ph CB Close
179
Chapter 13 Dead zone protection
Dear Zone
Protection
IA DZ Trip
IB Relay Startup
IC
CB Pole A Open
CB Pole B Open
CB Pole C Open
CB 3 Poles Close
Signal Description
Signal Description
Signal Description
180
Chapter 13 Dead zone protection
5 Setting
Table 127 Dead zone protection function setting list for HV side of transformer
Default
Min. Max.
setting
Setting Unit (Ir:5A/1A (Ir:5A/1A Description
(Ir:5A/1A
) )
)
HV T_Dead Zone Time delay setting for HV
s 0 32 10
dead zone protection
Table 128 Dead zone protection binary setting list for HV side of transformer
Table 129 Dead zone protection function setting list for MV side of transformer
Default
Min. Max.
setting
Setting Unit (Ir:5A/1A (Ir:5A/1A Description
(Ir:5A/1A
) )
)
MV T_Dead Zone Time delay setting for MV
s 0 32 10
dead zone protection
Table 130 Dead zone protection binary setting list for MV side of transformer
Table 131 Dead zone protection function setting list for LV side of transformer
Default
Min. Max.
setting
Setting Unit (Ir:5A/1A (Ir:5A/1A Description
(Ir:5A/1A
) )
)
LV T_Dead Zone s 0 32 10 Time delay setting for LV
181
Chapter 13 Dead zone protection
Table 132 Dead zone protection binary setting list for LV side of transformer
6 Report
Table 133 Event report list
Information Description
HV Dead Zone HV Dead zone trip
MV Dead Zone MV Dead zone trip
LV Dead Zone LV Dead zone trip
Information Description
HV Func_DZ On HV DZ function on
HV Func_DZ Off HV DZ function off
MV Func_DZ On MV DZ function on
MV Func_DZ Off MV DZ function off
LV Func_DZ On LV DZ function on
LV Func_DZ Off LV DZ function off
7 Technical data
NOTE:
Ir: CT rated secondary current, 1A or 5A;
Item Rang or Value Tolerance
Current 0.08 Ir to 20.00 Ir ≤ ±3% setting or ±0.02Ir
Time delay 0.00s to 32.00s, step 0.01s ≤ ±1% setting or +40 ms, at
200% energizing setting
Reset ratio >0.95
182
Chapter 14 STUB protection
183
Chapter 14 STUB protection
1 Introduction
The STUB protection protects the zone between the CTs and the open dis-
connector. The STUB protection is enabled when the open position of the
disconnector is informed to the IED through connected binary input. The
function supports one definite stage with the logic shown inbelow figure.
2 Protection principle
Busbar A
CT1-1
CB1
CT1-2
Fault
Feeder1
Feeder 1 Disconnector
CT3-1
CB3
CT3-2
Feeder2
Feeder 2 Disconnector
CT2-1
CB2
CT2-2
Busbar B
If IED detects short circuit current flowing while the line disconnector is open,
STUB fault is detected for the short circuit in the area between the current
transformers and the line disconnector. Here, the summation of CT1 and CT3
presents the short circuit current.
184
Chapter 14 STUB protection
3 Logic diagram
Ia>I_STUB
Ib>I_STUB O
R
Ic>I_STUB
Func_STUB A
T_STUB
N Permanent trip
STUB Protection
IC1
IA2
IB2
IC2
185
Chapter 14 STUB protection
Signal Description
Signal Description
Signal Description
5 Setting
Table 138 Setting value list for STUB protection for HV side of transformer
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
current threshold of STUB protec-
HV I_STUB A 0.05Ir 20Ir 100
tion
HV T_STUB s 0 60 60 delay time of STUB protection
186
Chapter 14 STUB protection
Table 139 Binary setting list for STUB protection for HV side of transformer
Default
Setting Unit Min. Max. Description
setting
HV Func_STUB Enable or disable STUB
0 1 0
protection
HV STUB Init LV STUB protection initiate
CBF 0 1 0 LV side CBF
0 - initiate, 1 – not initiate
HV STUB Init MV STUB protection initiate
CBF 0 1 0 HV side CBF
0 - initiate, 1 – not initiate
Table 140 Setting value list for STUB protection for MV side of transformer
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
current threshold of STUB protec-
MV I_STUB A 0.05Ir 20Ir 100
tion
MV T_STUB s 0 60 60 delay time of STUB protection
Table 141 Binary setting list for STUB protection for MV side of transformer
Default
Setting Unit Min. Max. Description
setting
MV Func_STUB Enable or disable STUB
0 1 0
protection
MV STUB Init LV STUB protection initiate
CBF 0 1 0 LV side CBF
0 - initiate, 1 – not initiate
MV STUB Init MV STUB protection initiate
CBF 0 1 0 MV side CBF
0 - initiate, 1 – not initiate
Table 142 Setting value list for STUB protection for LV side of transformer
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
LV I_STUB A 0.05Ir 20Ir 100 current threshold of STUB protec-
187
Chapter 14 STUB protection
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
tion
LV T_STUB s 0 60 60 delay time of STUB protection
Table 143 Binary setting list for STUB protection for LV side of transformer
Default
Setting Unit Min. Max. Description
setting
LV Func_STUB Enable or disable STUB
0 1 0
protection
LV STUB Init LV STUB protection initiate
CBF 0 1 0 LV side CBF
0 - initiate, 1 – not initiate
LV STUB Init MV STUB protection initiate
CBF 0 1 0 LV side CBF
0 - initiate, 1 – not initiate
6 Report
Table 144 Event report list
Information Description
Information Description
HV Func_STUB On HV STUB function on
HV Func_STUB Off HV STUB function Off
MV Func_STUB On MV STUB function on
MV Func_STUB Off MV STUB function Off
LV Func_STUB On LV STUB function on
LV Func_STUB Off LV STUB function Off
188
Chapter 14 STUB protection
7 Technical data
NOTE:
Ir: CT rated secondary current, 1A or 5A;
189
Chapter 14 STUB protection
190
Chapter 15 Poles discordance protection
191
Chapter 15 Poles discordance protection
1 Introdcution
Under normal operating condition, all three poles of the circuit breaker must
be closed or open at the same time. The phase separated operating circuit
breakers can be in different positions (close-open) due to electrical or me-
chanical failures. This can cause negative and zero sequence currents which
gives thermal stress on rotating machines and can cause unwanted operation
of zero sequence or negative sequence current functions.
Single pole opening of the circuit breaker is permitted only in the short period
related to single pole dead times, otherwise the breaker is tripped three pole
to resolve the problem. If the problem still remains, the remote end can be
intertripped via circuit breaker failure protection function to clear the unsym-
metrical load situation.
2 Protection principle
2.1 Function description
The CB position signals are connected to IED via binary input in order to
monitor the CB status. Poles discordance condition is established when bi-
nary setting “HV Func_PD” for HV said, or “MV Func_PD” for MV said is set
to “1/on”, and at least one pole is open and at the same time not all three
poles are closed. The auxiliary contacts of the circuit breakers are checked
with corresponding phase currents for plausibility check. Error alarm “CB Err
Blk PD” is reported after 5 sec whenever CB auxiliary contacts indicate that
one pole is open but at the same time current is flowing through the pole.
Additionally the function can be informed via binary setting “HV PD Chk
3I0/3I2” and “MV PD Chk 3I0/3I2”for additionaly zero and negative sequence
current as well as current criteria involved in CBF protection. Pole discord-
ance can be detected when current is not flowing through all three poles.
When current is flowing through all three poles, all three poles must be closed
even if the breaker auxiliary contacts indicate a different status.
192
Chapter 15 Poles discordance protection
3 Logic diagram
BI_CB Open A A
N
Ia > 0.06Ir
D
BI_CB Open B A O
N R
Ib > 0.06Ir
D
BI_CB Open C A A
N N
5s
CB Err Blk PD
Ic > 0.06Ir
D D
BI_CB Open A
A
BI_CB Open B N
D
BI_CB Open C
BI_CB Open A A
N
Ia < 0.06Ir
D
Func_PD On T_PD
BI_CB Open B A
O A PD Trip
N
Ib < 0.06Ir R N
D
D
BI_CB Open C A
N
Ic< 0.06Ir
D
193
Chapter 15 Poles discordance protection
Pole Discordance
Protection
IA PD Trip
IB Relay Startup
IC
INBK
CB Pole A Open
CB Pole B Open
CB Pole C Open
Signal Description
Signal Description
Signal Description
PD Trip PD Trip
Relay Startup Relay Startup
194
Chapter 15 Poles discordance protection
5 Setting
Table 150 Function setting list for poles discordance protection for HV side of
tranformer
De-
fault
Setting Unit Min. Max. Description
set-
ting
zero sequence current threshold of
HV 3I0_PD A 0.05Ir 20Ir 5 pole discordance protection
negative sequence current thresh-
HV 3I2_PD A 0.05Ir 20Ir 5 old of pole discordance protection
delay time of pole discordance
HV T_PD s 0 60 10 protection
Table 151 Binary setting list for poles discordance protection for HV side of
tranformer
Default
Setting Unit Min. Max. Description
setting
0 1 0 Enable or disable MV poles
MV Func_PD
discordance protection
MV PD Chk 0 1 0 Enable or disable 3I0/3I2
3I0/3I2 criteria
Table 152 Function setting list for poles discordance protection for MV side of
tranformer
De-
fault
Setting Unit Min. Max. Description
set-
ting
zero sequence current threshold of
MV 3I0_PD A 0.05Ir 20Ir 5 pole discordance protection
negative sequence current thresh-
MV 3I2_PD A 0.05Ir 20Ir 5 old of pole discordance protection
delay time of pole discordance
MV T_PD s 0 60 10 protection
Table 153 Binary setting list for poles discordance protection for MV side of
tranformer
Default
Setting Unit Min. Max. Description
setting
0 1 0 Enable or disable MV poles
MV Func_PD
discordance protection
MV PD Chk 0 1 0 Enable or disable 3I0/3I2
3I0/3I2 criteria
195
Chapter 15 Poles discordance protection
6 Report
Table 154 Event report list
Information Description
Information Description
Information Description
HV Func_PD On HV poles discordance function on
HV Func_PD Off HV poles discordance function off
MV Func_PD On MV poles discordance function on
MV Func_PD Off MV poles discordance function off
7 Technical data
NOTE:
Ir: CT rated secondary current, 1A or 5A;
196
Chapter 16 Secondary system supervision
197
Chapter 16 Secondary system supervision
2 Function principle
VT failure supervision function can be enabled or disabled in each side
through Binary setting “HV VT Fail Detect”, “MV VT Fail Detect” and “LV VT
Fail Detect”. By applying setting “1-On” to these Binary settings, respective
VT failure supervision function would monitor the voltage transformer circuit
of corresponding side. Each VT failure supervision function is able to detect
single-phase broken, two-phase broken or three-phase broken faults in re-
spective voltage transformer. There are three main criteria for VT failure de-
tection; from them the first one is dedicated to detect three-phase broken
faults. The second and third one is dedicated to detect single or two-phase
broken faults in solid earthed and isolated/resistance earthed systems, re-
spectively. A precondition to meet these three criteria is that the relay should
not be picked up and the calculated zero sequence and negative sequence
currents should be less than setting of “HV I_VT Fail”, “MV I_VT Fail” or “LV
I_VT Fail”. These criteria are as follows:
The calculated zero sequence voltage 3U0 of respective side of the protected
transformer is more than the setting of “HV Upe_VT Fail”, “MV Upe_VT Fail”
or “LV Upe_VT Fail”. This condition may correspond to single or two-phase
broken fault in secondary circuit of the voltage transformer in respective side
of the protected transformer, if the system starpoint is solidly earthed.
The calculated zero sequence voltage 3U0 of respective side of the protected
transformer is more than the setting of “HV Upe_VT Fail”, “MV Upe_VT Fail”
or “LV Upe_VT Fail”, and at the same time, the difference between the max-
imum and minimum phase-to-phase voltages of respective side is more than
the setting of “HV Upp_VT Fail”, “MV Upp_VT Fail” or “LV Upp_VT Fail”. This
condition may correspond to single or two-phase broken fault in secondary
circuit of the voltage transformer in respective side of the protected trans-
former, if the system starpoint is isolated or resistance earthed.
198
Chapter 16 Secondary system supervision
informed about the VT MCB failure through its binary inputs. These inputs in-
clude “HV MCB FAIL BI”, “MV MCB FAIL BI” and “LV MCB FAIL BI”. In this
context, VT fail is detected in corresponding side, if the respective binary in-
puts are active.
199
Chapter 16 Secondary system supervision
Max(Ia,Ib,Ic)>I_ VT Fail
A
Max{Ua,Ub,Uc}<Upe_VT Fail N
D
Solid Earth on
O
R
3U0 >= (Upe_VT Fail-1)
A
Solid Earth off N
D A
N
D
Max{Uab,Ubc,Uca}-
Min{Uab,Ubc,Uca}>
Upp_VT Fail
A
Relay Pickup N
D O
R
BI MCB Fail
A
VT Fail
N
Detected
10s Alarm report
D
HV VT Fail Detect on
VT Fail Detected
A
Min{Ua,Ub,Uc}>Upe_VT Normal A N 500ms
N D
D
A
O
3I0>3I0_VT Fail or
N No VT Fail
3I2>3I2_VT Fail
R
D
A
N A
min{Ua,Ub,Uc}>Upe_VT Normal N 10s
D
D
200
Chapter 16 Secondary system supervision
VT Secondary
Circuit Supervision
IA1 VT Failure
IC1
IA2
IB2
IC2
UA
UB
UC
Signal Description
Signal Description
201
Chapter 16 Secondary system supervision
Signal Description
VT Failure VT Failure
Relay Startup Relay Startup
4 Setting
Table 161 Settings of VT failure supervision for HV side of transformer
Default
Setting Title Unit Min. Max. Comment
setting
HV I_VT Fail Minimum Current of VT failure
A 0.05Ir 0.2Ir 0.05 for HV side
HV 3I02_ VT Fail Minimum zero or negative Cur-
A 0.05Ir 0.2Ir 0.5 rent of HV VT fail
HV Upe_VT Fail Maximum phase to earth voltage
V 7 20 8
of HV VT fail
HV Upp_VT Fail Maximum phase to phase volt-
V 10 30 16
age of HV VT fail
HV Upe_VT Minimum phase to phase volt-
Normal V 40 65 40
age of HV VT normal
De-
Setting Title Unit Min. Max. Comment
fault
HV VT Failure Detection
HV VT FAIL Detect 0 0 1 On/Off
1-On, 0-Off.
HV Earthing mode:
HV Solid Earth 1: Solid earthed system ;
0 0 1
0: isolated system or re-
sistance earthed.
202
Chapter 16 Secondary system supervision
De- Comment
Setting Title Unit Min. Max.
fault
MV VT Failure Detection
MV VT FAIL Detect 0 0 1 On/Off
1-On, 0-Off.
MV Earthing mode:
MV Solid Earth 1: Solid earthed system ;
0 0 1
0: isolated system or re-
sistance earthed.
Default
Setting Title Unit Min. Max. Comment
setting
Minimum Current of VT failure
LV I_VT Fail A 0.05Ir 0.2Ir 0.05
for LV side
Minimum zero or negative Cur-
LV 3I02_VT Fail A 0.05Ir 0.2Ir 0.5 rent of LV VT fail
Maximum phase to earth voltage
LV Upe_VT Fail V 7 20 8
of LV VT fail
Maximum phase to phase volt-
LV Upp_VT Fail V 10 30 16
age of LV VT fail
LV Upe_VT Minimum phase to phase volt-
V 40 65 40
Normal age of LV VT normal
De-
Setting Title Unit Min. Max. Comment
fault
LV VT Failure Detection On/Off
LV VT FAIL Detect 0 0 1
1-On, 0-Off.
LV Earthing mode:
LV Solid Earth 1: Solid earthed system ;
0 0 1
0: isolated system or re-
sistance earthed.
5 Report
Table 167 Alarm report list
Information Description
Information Description
HV Func_VT On HV VT failure supervision function on
HV Func_VT Off HV VT failure supervision function off
MV Func_VT On MV VT failure supervision function on
203
Chapter 16 Secondary system supervision
Information Description
MV Func_VT Off MV VT failure supervision function off
LV Func_VT On LV VT failure supervision function on
LV Func_VT Off LV VT failure supervision function off
6 Technical data
Item Range or value Tolerances
Minimum current 0.08Ir to 0.20Ir, step 0.01A ≤ ±3% setting or ±0.02Ir
Minimum zero or negative se- 0.08Ir to 0.20Ir, step 0.01A ≤ ±5% setting or ±0.02Ir
quence current
Maximum phase to earth voltage 7.0V to 20.0V, step 0.01V ≤ ±3% setting or ±1 V
Maximum phase to phase volt- 10.0V to 30.0V, step 0.01V ≤ ±3% setting or ±1 V
age
Normal phase to earth voltage 40.0V to 65.0V, step 0.01V ≤ ±3% setting or ±1 V
204
Chapter 17 External Bis to trip BOs
205
Chapter 17 External Bis to trip BOs
1 Introduction
Two special binary inputs (BI_Config1, BI_Config2) are provided which can
be used to activate respective binary outputs (BO1 and BO2), according to
the setting applied at Binary settings “BI1 Enable BO1” and “BI2 Enable BO2”.
By applying setting “1-enable” to these Binary settings, BO1 will be activated
if BI1 is energized. Similarly, BO2 will be activated if BI2 is energized. Fur-
thermore, 7th LED in front plate of the device would be lighted when BO1 or
BO2 is activated.
2 Function principle
The external BIs can be used in conjunction with the mechanical protections
of the protected transformer (such as Buchholz, Winding temperature, and so
on). In this context, trip commands of the main and backup mechanical pro-
tections can be marshaled to BI1 and BI2, respectively. By doing so, the
output trip commands would be provided at BO1 and BO2 respectively.
Since the trip command of mechanical protection has latched nature, two
operating modes are provided for the Bos activation. The operating modes
include direct and pulse tripping modes. In direct tripping mode, each BO
contact is active as long as respective BI is energized, and after BI disap-
pearance 20ms the BO contacts are deactivated. Whereas in pulse tripping
mode, by each up-edge of BI, respective BO contacts remain active during a
settable pulse time, and after the settable time, the BO contacts are inactive.
The tripping modes can be selected for the BOs by Binary settings “BO1
Pulse Tripping” and “BO2 Pulse Tripping”. Pulse tripping mode would be
possible if setting “1-Pulse Tripping” is applied to the Binary settings. Similarly,
setting “0-Direct Tripping” activates direct tripping mode for respective BOs.
The logic is shown in below figure.
BI Enable BO on
A
N
D
Pulse Tripping Time
1
BO Pulse Tripping 0
A
N BI trip BO
1 D
BIx up edge 0
1
0
A A
N N BI trip BO
D D
206
Chapter 17 External Bis to trip BOs
3 BI Trigger Record
In the IED, it is possible for Binary inputs (BIs) to trigger disturbance record
(DR). The exceptions are “Switch SetGroup”, “Blk Rem Access”, “Relay Test”
and “Reset”. In this context, each Binary input can be set independently
whether it can trigger DR or not. Further, it is possible to set whether BI trig-
gers DR in its up or down edge. Example logic of BI “HV CB Open Status”
triggering DR is given in below figure. The same logic is applied for the other
BIs.
BI “HV1 CB Open A”
Change from “1”to “0”
A
N
Equipment parameter D
“HV1 CB OPEN STATUS DOWN” = 1
O Trigger
R Record
BI “HV1 CB OPEN STATUS ENABLE”
=1
207
Chapter 17 External Bis to trip BOs
4 BI Switch SetGroup
BI “Switch SetGroup” is used to switch setting group of the device. Both “BI
SetGrp Switch”and “Normal Set Switch” are selected by making change in the
content of special Binary setting “BI SetGrp Switch” which can be set under
“Common Para” submenu. When the Binary setting is set to 1, BI setting
group switch mode is applied, on the contrary, Normal setting group switch
mode (shortcut key or operate through the menu) is applied. For “BI SetGrp
Switch” mode, When BI “Switch SetGroup” is deactivated, the content of Bi-
nary setting “BI SetGrp Switch” is set to 0 and it means that no switching in
setting groups is desired. In this case, Group 1 is applied to the device. When
the BI is activated, the content of Binary setting “BI SetGrp Switch” is set to 1
and it means that “BI SetGrp Switch” mode is applied. Thus, the current set-
ting-value would automatically be switched to Group 2. For the other switch
mode, whether the BI is activated or not, setting group change is valid for
shortcut key or operate through the menu.
When BI “Blk Rem Access” is activated, or the content of Binary setting “NOT
Blk Remote Access” is set to 0, SCADA remote access is blocked to the de-
vice and therefore, only local operation is permitted.
When BI “Blk Rem Access” is deactivated, and the content of Binary setting
“NOT Blk Remote Access” is set to 1, both SCADA commands and local op-
eration can be executed by the device.
Similarly, there are two methods to select test or normal operating mode of
the device, BI “Relay Test” or making change in the content of special Binary
setting “Relay Test Mode” which can be set under “Common Para” submenu.
When BI “Relay Test” is activated, or the content of Binary setting “Relay Test
Mode” is set to 1, the relay is in test mode.
When BI “Relay Test” is deactivated, and the content of Binary setting “Relay
Test Mode” is set to 0, the relay is in normal operation mode
208
Chapter 17 External Bis to trip BOs
7 Setting
Table 169 Setting of external BIs to trip BOs
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
T_Pulse
s 0.2 5 5 delay time of STUB protection
Tripping
Setting Default
Setting Title Comment
options setting
To select whether the 1st binary input (BI1) trip
BI1 Enable
1/0 0 the 1st binary output (BO1) or not.
BO1
1-enable, 0-disable
To select BO1 tripping in pulse mode or in direct
BO1 Pulse mode
1/0 0
Tripping 0- BO1 Direct Tripping, without delay
1- BO1 Pulse Tripping, with preset delay time
nd
To select whether the 2 binary input (BI2) trip
BI2 Enable nd
1/0 0 the 2 binary output (BO2) or not.
BO2
1-enable, 0-disable
209
Chapter 17 External Bis to trip BOs
Setting Default
Setting Title Comment
options setting
0 - initiate, 1 – not initiate
210
Chapter 18 Station communication
211
Chapter 18 Station communication
1 Overview
Each IED is provided with a communication interface, enabling it to connect to
one or many substation level systems or equipment.
1.1 Protocol
IEC 61850-8-1 allows two or more intelligent electronic devices (IEDs) from
one or several vendors to exchange information and to use it in the perfor-
mance of their functions and for correct co-operation.
212
Chapter 18 Station communication
There is a serial RS232 port on the front plate of all IEDs. Through this port,
the IED can be connected to the personal computer for setting, testing, and
configuration using the dedicated Sifang software tool.
213
Chapter 18 Station communication
Item Data
Number 1
Connection Isolated, RS232; front panel
9-pin subminiature connector, for CSmart
Communication speed 9600 baud
Max. length of communication cable 15 m
Item Data
Number 0~2
Connection 2-wire connector
Rear port in communication module
Max. length of communication cable 1.0 km
IEC 60870-5-103 protocol
Communication speed Factory setting 9600 baud
Min. 1200 baud, Max. 19200 baud
Item Data
Electrical communication port
Number 0~3
Connection RJ45 connector
Rear port in communication module
Max. length of communication cable 100m
IEC 61850 protocol
Communication speed 100 Mbit/s
IEC 60870-5-103 protocol
Communication speed 100 Mbit/s
214
Chapter 18 Station communication
Item Data
Optical cable type Multi-mode
Max. length of communication cable 2.0km
IEC 61850 protocol
Communication speed 100 Mbit/s
IEC 60870-5-103 protocol
Communication speed 100 Mbit/s
Time synchronization
Item Data
Mode Pulse mode
IRIG-B signal format IRIG-B000
Connection 2-wire connector
Rear port in communication module
Voltage levels differential input
215
Chapter 18 Station communication
2 Typicalcommunication scheme
Server or Server or
Work Station 1 Work Station 2
Switch
Work Station 3 Work Station 4
216
Chapter 18 Station communication
217
Chapter 18 Station communication
218
Chapter 19 Hardware
Chapter 20 Hardware
219
Chapter 19 Hardware
3 Introduction
The modules can be combined through the bus on the rear board. Both
the equipment and the other system can be combined through the rear in-
terfaces.
220
Chapter 19 Hardware
Spare slot
Spare slot
ule
Figure 75 Module arrangement (front view, when open the front panel)
221
Chapter 19 Hardware
Front panel adopts little arc streamline and beelines sculpt, and function keys
for MMI are reasonably distributed in faceplate. Panel layout are shown as
below figures.
222
Chapter 19 Hardware
1
5
4
CSC-326
6 7
3 8
1
5
4
CSC-326
6 7
3 8
4.2 LCD
4.3 Keypad
The keypad is used to monitor and operate the IED. The keypad has the
223
Chapter 19 Hardware
same look and feel in all IEDs in the CSC series. LCD screens and other
details may differ but the way the keys function is identical. The keys used to
operate the IED are described below.
Key function
SET SET key:
Enters main menu or sub-menu, and confirms the setting changes
QUIT QUIT key:
Navigates backward the upper menu.
Cancels current operation and navigates backward the upper
menu.
Returns normal rolling display mode
Locks and unlocks current display in the normal scrolling display
mode; (the locked display mode is indicated by a key type icon
on the upright corner of LCD.)
Right arrow key:
Moves right in menu.
Left arrow key:
Moves left in menu.
Up arrow key:
Moves up in menu
Page up between screens
Increases value of setting.
Down arrow key
Moves down in menu
Page down between screens
Decreases the value of setting.
RESET key:
Reset LEDs
Return to normal scrolling display mode directly
RESET
The shortcut keys and functional keys are below the LCD on the front panel. These
keys are designated to execute the frequent menu operations for user’s convenience.
The keys used to operate the IED are described below.
Key function
224
Chapter 19 Hardware
F1 Reserved
F2 Reserved
F3 Reserved
F4 Reserved
+ Plus key:
Switch next setting group forward as active setting group, meaning
4.5 LED
The definitions of the LEDs are fixed and described below for 20 LEDs.
225
Chapter 19 Hardware
The other LEDs which are not described above can be configured.
There is a serial RS232 port on the front plate of all the IEDs. Through this
port, the IED can be connected to the personal computer for setting, testing,
and configuration using the dedicated Sifang software tool.
226
Chapter 19 Hardware
5.1 Introduction
The analogue input module is used to galvanically separate and transform the
secondary currents and voltages generated by the measuring transformers.
There are two types of current transformer: Rated current 5A with linearity
range 50mA~150A and rated current 1A with linearity range 100mA~30A
(please indicate clearly when order the product).
b a
b01 a01
b02 a02
b03 a03
b04 a04
b05 a05
b06 a06
b07 a07
b08 a08
b09 a09
b10 a10
b11 a11
b12 a12
227
Chapter 19 Hardware
Input
b01 I’A
b02 I’B
b03 I’C
a04 I’N
a05 I’NM
a06 Null
a07 Null
a08 Null
a09 Null
b09 Null
b10 U’4
b12 UN
228
Chapter 19 Hardware
CT
Power consumption (per phase) ≤ 0.1 VA at Ir = 1 A;
≤ 0.5 VA at Ir = 5 A
≤ 0.5 VA for sensitive CT
Thermal overload capability IEC 60255-1 100 Ir for 1 s
IEC 60255-27 4 Ir continuous
Thermal overload capability for IEC 60255-27 100 A for 1 s
sensitive CT DL/T 478-2001 3 A continuous
229
Chapter 19 Hardware
6 Communication module
6.1 Introduction
The time synchronization port is equipped, which can work in pulse mode or
IRIG-B mode. SNTP mode can be applied through communication port.
There is a serial RS232 port on the front plate of all the IEDs. Through this
port, the IED can be connected to the personal computer for setting, testing,
and configuration using the dedicated Sifang software tool.
230
Chapter 19 Hardware
01
02 Ethernet port A
03
04
05
06
07 Ethernet port B
08
09
10
11
Ethernet port C
12
13
14
15
16
Terminal Definition
01 Null
02 Null
03 Null
04 Null
231
Chapter 19 Hardware
09 Time synchronization
11 Null
12 Null
13 Null
14 Null
15 Null
16 Null
Information Description
DI Comm Fail DI communication error
DO Comm Fail DO communication error
Item Data
Number 1
Connection Isolated, RS232; front panel,
9-pin subminiature connector, for software tools
232
Chapter 19 Hardware
Item Data
Number 0 to 2
Connection 2-wire connector
Rear port in communication module
Max. length of communication cable 1.0 km
Test voltage 500 V AC against earth
For IEC 60870-5-103 protocol
Communication speed Factory setting 9600 baud,
Min. 1200 baud, Max. 19200 baud
Item Data
Electrical communication port
Number 0 to 3
Connection RJ45 connector
Rear port in communication module
Max. length of communication cable 100m
For IEC 61850 protocol
Communication speed 100 Mbit/s
For IEC 60870-5-103 protocol
Communication speed 100 Mbit/s
Optical communication port ( optional )
Number 0 to 2
Connection SC connector
Rear port in communication module
Optical cable type Multi-mode
Max. length of communication cable 2.0km
IEC 61850 protocol
Communication speed 100 Mbit/s
IEC 60870-5-103 protocol
Communication speed 100 Mbit/s
233
Chapter 19 Hardware
Item Data
Mode Pulse mode
IRIG-B signal format IRIG-B000
Connection 2-wire connector
Rear port in communication module
Voltage levels differential input
234
Chapter 19 Hardware
7.1 Introduction
The binary input module is used to connect the input signals and alarm sig-
nals such as the auxiliary contacts of the circuit breaker (CB), etc.
The negative terminal of power supply for BI module, 220V or 110V, should
be connected to the terminal.
c a
c02 a02
c04 a04
c06 a06
c08 a08
c10 a10
c12 a12
c14 a14
c16 a16
c18 a18
c20 a20
c22 a22
c24 a24
c26 a26
c28 a28
c30 a30
c32 DC - DC - a32
235
Chapter 19 Hardware
236
Chapter 19 Hardware
237
Chapter 19 Hardware
8.1 Introduction
The binary output modules mainly provide tripping output contacts, initiating
output contacts and signaling output contacts. All the tripping output relays
have contacts with a high switching capacity and are blocked by protection
startup elements.
The module provides 16 output relays for tripping or initiating, with total 16
contacts.
238
Chapter 19 Hardware
R R R R R R R R
1 3 5 7 9 11 13 15
c a
c02 a02
c04 a04
c06 a06
c08 a08
c10 a10
c12 a12
c14 a14
c16 a16
c18 a18
c20 a20
c22 a22
c24 a24
c26 a26
c28 a28
c30 a30
c32 a32
R R R R R R R R
2 4 6 8 10 12 14 16
239
Chapter 19 Hardware
240
Chapter 19 Hardware
The module provides 16 output relays for signal, with total 19 contacts.
R R R R R R R
4 5 1 2 3 6 7
c a
c02 a02
c04 a04
c06 a06
c08 a08
c10 a10
c12 a12
c14 a14
c16 a16
c18 a18
c20 a20
c22 a22
c24 a24
c26 a26
c28 a28
c30 a30
c32 a32
R R R R R R R R R
8 9 10 11 12 13 14 15 16
241
Chapter 19 Hardware
242
Chapter 19 Hardware
243
Chapter 19 Hardware
9.1 Introduction
The power supply module is used to provide the correct internal voltages and
full isolation between the terminal and the battery system. Its power input is
DC 220V or 110V (according to the order code), and its outputs are five
groups of power supply.
(1) +24V two groups provided: Power for inputs of the corresponding bi-
nary inputs of the CPU module
c a
c02 DC 24V + a02
OUTPUTS
c04 a04
c06 a06
c08 a08
DC 24V -
c10 OUTPUTS
a10
c12 a12
c14 a14
c16 a16
c18 a18
c24 a24
c26 AUX. DC - a26
INPUT
c28 a28
c30 a30
c32 a32
244
Chapter 19 Hardware
Terminal Definition
245
Chapter 19 Hardware
Item Data
Rated auxiliary voltage Vaux 110~250V DC
Permissible tolerance ±%20 Uaux
Power consumption
Normal operation ≤ 30 W
Tripping condition ≤ 50 W
246
Chapter 19 Hardware
10 Techinical data
10.1.1 Frequency
Item Data
System rated frequency 50 Hz or 60Hz
Item Data
Rated current Ir 1 or 5 A
Nominal current range (0.05 – 20)x Ir
Power consumption (per phase) ≤ 0.1 VA at Ir = 1 A;
≤ 0.5 VA at Ir = 5 A
Thermal overload capability 100 x Ir for 1 s
4 x Ir continuous
Item Data
Rated voltage Vr (ph-ph) 100-120
Nominal range (ph-e) 0.4 V to 120 V
Power consumption at Vr = 110 V ≤ 0.1 VA per phase
247
Chapter 19 Hardware
248
Chapter 19 Hardware
249
Chapter 19 Hardware
250
Chapter 19 Hardware
251
Chapter 19 Hardware
252
Chapter 19 Hardware
253
Chapter 19 Hardware
10.2.7 CE Certificate
Item Data
EN 61000-6-2 and EN61000-6-4 (EMC
EMC Directive
Council Directive 2004/108/EC)
EN 60255-27 (Low-voltage directive 2006/95
Low voltage directive
EC).
Item Data
Case size 4U×19inch
Weight ≤ 8kg
254
Chapter 20 Appendix
Chapter 21 Appendix
255
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
HV Wind Conn/Y 0 1 0 Connection for HV winding,
0:wye connection, 1:delta
connection
MV Wind Conn/Y 0 1 0 Connection for MV winding,
0:wye connection, 1:delta
connection
LV Wind Conn/Y 0 1 1 Connection for LV winding,
0:wye connection, 1:delta
connection
Vet Grp Angle MVA 1.000 3000. 120.0 Vector Group Angle( VET
GRP ANGLE)
SN kV 1.000 1000. 220.0 Capacity of the transformer
HV VT Ratio MVA 1.000 9999. 2200.0 Voltage transformer(VT) Ra-
tio in HV side
A 50.00 9999. 1200.0 CT Primary(PRI) current in
HV CT Pri
HV side
A 1.000 5.000 1.0 CT Secondary(SEC) current
HV CT Sec
in HV side
HV Voltage Chan 1 3 1
HV voltage channel location
Sel
MV Voltage Chan 1 3 2 MV voltage channel loca-
Sel tion
A 50.00 9999. 1200.0 Neutral CT (NCT) Prima-
HV NCT Pri(REF) ry(PRI) current in HV side
for REF
A 1.000 5.000 1.0 Neutral CT (NCT) Second-
HV NCT Sec(REF) ary(SEC) current in HV side
for REF
HV NCT Pri(BU) A 50.00 9999. 1200.0 Neutral CT (NCT) Prima-
256
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
ry(PRI) current in HV side
for backup protection
A 1.000 5.000 1.0 Neutral CT (NCT) Second-
HV NCT Sec(BU) ary(PRI) current in HV side
for backup protection
kV 1.000 1000. 110.0 Nominal voltage (UN) in
MV UN
Middle voltage (MV)side
1.000 9999. 1100.0 Voltage transformer(VT) Ra-
MV VT Ratio
tio in MV side
A 50.00 9999. 1200.0 CT Primary(PRI) current in
MV CT Pri
MV side
A 1.000 5.000 1.0 CT Secondary(SEC) current
MV CT Sec
in MV side
A 50.00 9999. 1200.0 Neutral CT (NCT) Prima-
MV NCT Pri(REF) ry(PRI) current in MV side
for REF
A 1.000 5.000 1.0 Neutral CT (NCT) Second-
MV NCT Sec(REF) ary(SEC) current in MV
side for REF
A 50.00 9999. 1200.0 Neutral CT (NCT) Prima-
MV NCT Pri(BU) ry(PRI) current in MV side
for backup protection
A 1.000 5.000 1.0 Neutral CT (NCT) Second-
MV NCT Sec(BU) ary(PRI) current in MV side
for backup protection
kV 1.000 1000. 10.50 Nominal voltage (UN) in Low
LV UN
voltage (LV)side
1.000 9999. 105.0 Voltage transformer(VT) Ra-
LV VT Ratio
tio in LV side
A 50.00 9999. 3000.0 CT Primary(PRI) current in
LV CT Pri
LV side
A 1.000 5.000 1.0 CT Secondary(SEC) current
LV CT Sec
in LV side
LV Sec Inside A 1.000 5.000 1.0 CT Secondary(SEC) cur-
Delta rent in LV inside delta
HV Rated Cur Pri A 0 9999 Rated primary current for
257
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
HV side (calculated value,
read only)
A 0 9999 Rated secondary current for
HV Rated Cur Sec HV side (calculated value,
read only)
0 9999 HV ratio factor for differen-
Ratio Factor KTAH tial protection (calculated
value, read only)
0 9999 MV ratio factor for differen-
Ratio Factor KTAM tial protection (calculated
value, read only)
0 9999 LV ratio factor for differential
Ratio Factor KTAL protection (calculated
value, read only)
0 9999 HV ratio factor, with ze-
ro-sequence current calcu-
Ratio REF KTAH lated, for REF protection
(calculated value, read
only)
0 9999 HV ratio factor with ze-
ro-sequence current directly
Ratio REF KNH measured, for REF protec-
tion (calculated value,
read only)
0 9999 MV ratio factor, with ze-
ro-sequence current calcu-
Ratio REF KTAM lated, for REF protection
(calculated value, read
only)
0 9999 MV ratio factor with ze-
ro-sequence current directly
Ratio REF KNM measured, for REF protec-
tion (calculated value,
read only)
A 0.5Ir 20Ir 20 Instantaneous Differential
I_Inst Diff
(ID>>) current setting
258
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
A 0.08Ir 4Ir 2.1 Percentage Differential
I_Percent Diff
(ID>) current setting
A 0.1Ir Ir 2 The 1st breakpoint restraint
I_ResPoint1 Diff
current (IR1)
A 0.1Ir 10Ir 2 The 2nd breakpoint re-
I_ResPoint2 Diff
straint current (IR2)
Slope1_Diff 0 0.2 0.2 the 1st slope
259
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
stricted Earth Fault protec-
tion
0.2 0.95 0.5 Slope setting for MV Re-
MV Slope_REF stricted Earth Fault protec-
tion
s 0 60 0.03 MV Restricted Earth Fault
MV T_REF Trip
trip time setting
MV 3I0_REF A 0.08Ir 2Ir 2 MV Restricted Earth Fault
Alarm alarm current setting
s 0 60 0.03 MV Restricted Earth Fault
MV T_REF Alarm
alarm time setting
A 0.08Ir 2Ir 2 Current setting for LV Re-
LV 3I0_REF stricted Earth Fault protec-
tion
0.2 0.95 0.5 Slope setting for LV Re-
LV Slope_REF stricted Earth Fault protec-
tion
s 0 60 0.03 LV Restricted Earth Fault
LV T_REF Trip
trip time setting
A 0.08Ir 2Ir 2 LV Restricted Earth Fault
LV 3I0_REF Alarm
alarm current setting
s 0 60 0.03 LV Restricted Earth Fault
LV T_REF Alarm
alarm time setting
V 40 130 57.3 Nominal phase voltage in
Reference Voltage
HV side
1 1.5 1.1 Alarming setting of
V/F_Definite Alarm
volt/hertz
s 0.1 9999 10 Timer setting for volt/hertz
T_Definite Alarm
alarming stage
1 1.5 1.2 Tripping setting of definite
V/F_Definite Trip
volt/hertz stage
s 0.1 9999 1 Timer setting for definite
T_Definite Trip
volt/hertz stage
T1_Inverse s 0.1 9999 10 Timer setting for
V/F=1.05 volt/hertz=1.05
T2_Inverse s 0.1 9999 90 Timer setting for
260
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
V/F=1.10 volt/hertz=1.10
261
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
s 0 60 0 Ref to IEC and ANSI
HV B_OC Inv
Curves
0 10 0.02 Ref to IEC and ANSI
HV P_OC Inv
Curves
° 0 90 45 The angle setting for volt-
HV Angle_OC
age ahead of current.
A 0.25Ir 20Ir 5 The maximum 1st
HV -harmonic current setting to
Imax_2H_UnBlk remove the inrush block, in
HV O/C protection
0.07 0.5 0.2 Inrush 2nd harmonic ratio
HV Ratio_I2/I1 setting for blocking HV O/C
protection
s 0 60 20 Inrush 2nd harmonic
HV T2h_Cross_Blk cross-block time for HV O/C
protection
A 0.05Ir 20Ir 5 MV overcurrent (O/C) cur-
MV I_OC1
rent setting for Stage 1
s 0 60 60 Time setting for MV OC,
MV T_OC1
Stage 1
A 0.05Ir 20Ir 5 MV overcurrent (O/C) cur-
MV I_OC2
rent setting for Stage 2
s 0 60 60 Time setting for MV OC,
MV T_OC2
Stage 2
MV Curve_OC Inv 1 12 1 Ref to IEC and ANSI
Curves
A 0.05Ir 20Ir 5 Ref to IEC and ANSI
MV I_OC Inv
Curves
0.05 999 1 Ref to IEC and ANSI
MV K_OC Inv
Curves
s 0 200 0.14 Ref to IEC and ANSI
MV A_OC Inv
Curves
s 0 60 0 Ref to IEC and ANSI
MV B_OC Inv
Curves
0 10 0.02 Ref to IEC and ANSI
MV P_OC Inv
Curves
262
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
° 0 90 45 The angle setting for volt-
MV Angle_OC
age ahead of current.
A 0.25Ir 20Ir 5 The maximum 1st
MV -harmonic current setting to
Imax_2H_UnBlk remove the inrush block, in
MV O/C protection
0.07 0.5 0.2 Inrush 2nd harmonic ratio
MV Ratio_I2/I1 setting for blocking MV O/C
protection
s 0 60 20 Inrush 2nd harmonic
MV
cross-block time for MV O/C
T2h_Cross_Blk
protection
A 0.05Ir 20Ir 5 LV overcurrent (O/C) cur-
LV I_OC1
rent setting for Stage 1
s 0 60 60 Time setting for LV OC,
LV T_OC1
Stage 1
A 0.05Ir 20Ir 5 LV overcurrent (O/C) cur-
LV I_OC2
rent setting for Stage 2
s 0 60 60 Time setting for LV OC,
LV T_OC2
Stage 2
MV Curve_OC Inv 1 12 1 Ref to IEC and ANSI
Curves
A 0.05Ir 20Ir 5 Ref to IEC and ANSI
LV I_OC Inv
Curves
0.05 999 1 Ref to IEC and ANSI
LV K_OC Inv
Curves
s 0 200 0.14 Ref to IEC and ANSI
LV A_OC Inv
Curves
s 0 60 0 Ref to IEC and ANSI
LV B_OC Inv
Curves
0 10 0.02 Ref to IEC and ANSI
LV P_OC Inv
Curves
0 90 45 The angle setting for volt-
LV Angle_OC
age ahead of current.
LV 0.25Ir 20Ir 5 The maximum 1st
Imax_2H_UnBlk -harmonic current setting to
263
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
remove the inrush block, in
LV O/C protection
0.07 0.5 0.2 Inrush 2nd harmonic ratio
LV Ratio_I2/I1 setting for blocking LV O/C
protection
0 60 20 Inrush 2nd harmonic
LV T2h_Cross_Blk cross-block time for LV O/C
protection
A 0.05Ir 20Ir 5 HV earth fault (E/F) protec-
HV 3I0_EF1 tion current setting for Stage
1
s 0 60 60 Time setting for HV E/F,
HV T_EF1
Stage 1
A 0.05Ir 20Ir 5 HV earth fault (E/F) current
HV 3I0_EF2
setting for Stage 2
s 0 60 60 Time setting for HV E/F,
HV T_EF2
Stage 2
1 12 1 Ref to IEC and ANSI
HV Curve_EF Inv
Curves
A 0.05Ir 20Ir 1.2 Ref to IEC and ANSI
HV 3I0_EF Inv
Curves
0.05 999 1 Ref to IEC and ANSI
HV K_EF Inv
Curves
s 0 200 0.14 Ref to IEC and ANSI
HV A_EF Inv
Curves
s 0 60 0 Ref to IEC and ANSI
HV B_EF Inv
Curves
0 10 0.02 Ref to IEC and ANSI
HV P_EF Inv
Curves
° 0 90 45 The angle setting for volt-
HV Angle_EF
age ahead of current.
A 0.25Ir 20Ir 5 The maximum 1st
HV
-harmonic current setting to
Imax_2H_UnBlk_E
remove the inrush block, in
F
HV EF protection
HV Ratio_I2/I1_EF 0.07 0.5 0.2 The maximum 1st
264
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
-harmonic current setting to
remove the inrush block, in
HV EF protection
A 0.05Ir 20Ir 5 MV earth fault (E/F) protec-
MV 3I0_EF1 tion current setting for Stage
1
s 0 60 60 Time setting for MV E/F,
MV T_EF1
Stage 1
A 0.05Ir 20Ir 5 MV earth fault (E/F) current
MV 3I0_EF2
setting for Stage 2
s 0 60 60 Time setting for MV E/F,
MV T_EF2
Stage 2
1 12 1 Ref to IEC and ANSI
MV Curve_EF Inv
Curves
A 0.05Ir 20Ir 5 Ref to IEC and ANSI
MV 3I0_EF Inv
Curves
0.05 999 1 Ref to IEC and ANSI
MV K_EF Inv
Curves
s 0 200 0.14 Ref to IEC and ANSI
MV A_EF Inv
Curves
s 0 60 0 Ref to IEC and ANSI
MV B_EF Inv
Curves
0 10 0.02 Ref to IEC and ANSI
MV P_EF Inv
Curves
° 0 90 45 The angle setting for volt-
MV Angle_EF
age ahead of current.
A 0.25Ir 20Ir 5 The maximum 1st
MV
-harmonic current setting to
Imax_2H_UnBlk_E
remove the inrush block, in
F
MV E/F protection
0.07 0.5 0.2 Inrush 2nd harmonic ratio
MV Ratio_I2/I1_EF setting for blocking MV E/F
protection
A 0.05Ir 20Ir 5 LV earth fault (E/F) protec-
LV 3I0_EF1 tion current setting for Stage
1
265
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
s 0 60 60 Time setting for LV E/F,
LV T_EF1
Stage 1
A 0.05Ir 20Ir 5 LV earth fault (E/F) current
LV 3I0_EF2
setting for Stage 2
s 0 60 60 Time setting for LV E/F,
LV T_EF2
Stage 2
1 12 1 Ref to IEC and ANSI
LV Curve_EF Inv
Curves
A 0.05Ir 20Ir 5 Ref to IEC and ANSI
LV 3I0_EF Inv
Curves
0.05 999 1 Ref to IEC and ANSI
LV K_EF Inv
Curves
s 0 200 0.14 Ref to IEC and ANSI
LV A_EF Inv
Curves
s 0 60 0 Ref to IEC and ANSI
LV B_EF Inv
Curves
0 10 0.02 Ref to IEC and ANSI
LV P_EF Inv
Curves
° 0 90 45 The angle setting for volt-
LV Angle_EF
age ahead of current.
A 0.25Ir 20Ir 5 The maximum 1st
LV
-harmonic current setting to
Imax_2H_UnBlk_E
remove the inrush block, in
F
LV E/F protection
0.07 0.5 0.2 Inrush 2nd harmonic ratio
LV Ratio_I2/I1_EF setting for blocking LV E/F
protection
A 0.05Ir 20Ir 5 HV neutral over-current
HV 3I0_Neutral
(NOC) protection current
OC1
setting for Stage 1
s 0 60 60 Time setting for HV NOC,
HV T_Neutral OC1
Stage 1
A 0.05Ir 20Ir 5 HV neutral over-current
HV 3I0_Neutral
(NOC) protection current
OC2
setting for Stage 2
HV T_Neutral OC2 s 0 60 60 Time setting for HV NOC,
266
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
Stage 1
267
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
0.05 999 1 Ref to IEC and ANSI
MV K_NOC Inv
Curves
s 0 200 0.14 Ref to IEC and ANSI
MV A_NOC Inv
Curves
s 0 60 0 Ref to IEC and ANSI
MV B_NOC Inv
Curves
0 10 0.02 Ref to IEC and ANSI
MV P_NOC Inv
Curves
° 0 90 45 The angle setting for volt-
MV Angle_NOC
age ahead of current.
A 0.25Ir 20Ir 5 The maximum 1st
MV
-harmonic current setting to
Imax_2H_UnBlk_
remove the inrush block, in
NOC
MV NOC protection
0.07 0.5 0.2 Inrush 2nd harmonic ratio
MV Ra-
setting for blocking MV
tio_I2/I1_NOC
NOC protection
A 0.05Ir 20Ir 5 LV neutral over-current
LV 3I0_Neutral
(NOC) protection current
OC1
setting for Stage 1
s 0 60 60 Time setting for LV NOC,
LV T_Neutral OC1
Stage 1
A 0.05Ir 20Ir 5 LV neutral over-current
LV 3I0_Neutral
(NOC) protection current
OC2
setting for Stage 2
s 0 60 60 Time setting for LV NOC,
LV T_Neutral OC2
Stage 1
1 12 1 Ref to IEC and ANSI
LV Curve_NOC Inv
Curves
A 0.05Ir 20Ir 5 Ref to IEC and ANSI
LV 3I0_NOC Inv
Curves
0.05 999 1 Ref to IEC and ANSI
LV K_NOC Inv
Curves
s 0 200 0.14 Ref to IEC and ANSI
LV A_NOC Inv
Curves
LV B_NOC Inv s 0 60 0 Ref to IEC and ANSI
268
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
Curves
0 10 0.02 Ref to IEC and ANSI
LV P_NOC Inv
Curves
° 0 90 45 The angle setting for volt-
LV Angle_NOC
age ahead of current.
A 0.25Ir 20Ir 5 The maximum 1st
LV
-harmonic current setting to
Imax_2H_UnBlk_
remove the inrush block, in
NOC
LV NOC protection
0.07 0.5 0.2 Inrush 2nd harmonic ratio
LV Ra-
setting for blocking LV NOC
tio_I2/I1_NOC
protection
HV I_Therm OL A 0.1Ir 5Ir 2 Setting for HV-side thermal
Trip overload trip-stage current
A 0.1Ir 5Ir 2 Setting for HV-side thermal
HV I_Therm OL
overload alarm-stage cur-
Alarm
rent
HV T_Const s 1 9999 10 Time const for HV-side
Therm thermal overload protection
HV T_Const Cool s 1 9999 10 Cool down time delay for
Down HV-side thermal overload
MV I_Therm OL A 0.1Ir 5Ir 2 Setting for MV-side thermal
Trip overload trip-stage current
A 0.1Ir 5Ir 2 Setting for MV-side thermal
MV I_Therm OL
overload alarm-stage cur-
Alarm
rent
MV T_Const s 1 9999 10 Time const for MV-side
Therm thermal overload protection
MV T_Const Cool s 1 9999 10 Cool down time delay for
Down MV-side thermal overload
A 0.1Ir 4Ir 2 Overcurrent Setting of
HV I_OverLoad
overload
HV T_OverLoad s 0.1 3600 10 Time setting for overload
A 0.1Ir 4Ir 2 Overcurrent Setting of
MV I_OverLoad
overload
269
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
MV T_OverLoad s 0.1 3600 10 Time setting for overload
A 0.1Ir 4Ir 2 Overcurrent Setting of
LV I_OverLoad
overload
LV T_OverLoad s 0.1 3600 10 Time setting for overload
A 0.1Ir 4Ir 20 Alarm current setting of LV
LW I_OvLd Alarm delta winding overload pro-
tection
s 0.1 3600 10 Alarm time setting of LV
LW T_OvLd Alarm delta winding overload pro-
tection
LW I_OvLd Low A 0.1Ir 4Ir 20 Low stage tripping current
Trip setting
LW T_OvLd Low s 0.1 3600 10 Low stage tripping time set-
Trip ting
LW I_OvLd High A 0.1Ir 4Ir 20 High stage tripping current
Trip setting
LW T_OvLd High s 0.1 3600 10 High stage tripping time
Trip setting
V 40 200 200 HV voltage setting for stage
HV U_OV1
1 of overvoltage protection
s 0 60 60 HV time setting for stage 1
HV T_OV1
of overvoltage protection
V 40 200 200 HV voltage setting for stage
HV U_OV2
2 of overvoltage protection
s 0 60 60 HV time setting for stage 2
HV T_OV2
of overvoltage protection
0.9 0.99 0.95 HV dropout ratio for over-
HV Dropout_OV
voltage protection
V 40 200 200 MV voltage setting for stage
MV U_OV1
1 of overvoltage protection
s 0 60 60 MV time setting for stage 1
MV T_OV1
of overvoltage protection
V 40 200 200 MV voltage setting for stage
MV U_OV2
2 of overvoltage protection
s 0 60 60 MV time setting for stage 2
MV T_OV2
of overvoltage protection
270
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
0.9 0.99 0.95 MV dropout ratio for over-
MV Dropout_OV
voltage protection
A 0.05Ir 20Ir 5 Phase current setting value
HV I_CBF OC for HVcircuit breaker failure
(CBF) protection
A 0.05Ir 20Ir 5 Negative sequence (NS)
HV 3I0_CBF ZS setting
3I 0 value for HV1
CBF protection
s 0 32 10 Time setting value of Stage
HV T1_CBF
1, for HV CBF protection
s 0.1 32 10 Time setting value of Stage
HV T2_CBF
2, for HV CBF protection
A 0.05Ir 20Ir 5 Phase current setting value
MVI_CBF OC
for MV CBF protection
A 0.05Ir 20Ir 5 Negative sequence (NS)
MV 3I0_CBF ZS setting
3I 0 value for MV
CBF protection
s 0 32 10 Time setting value of Stage
MV T1_CBF
1, for MV CBF protection
s 0.1 32 10 Time setting value of Stage
MV T2_CBF
2, for MV CBF protection
A 0.05Ir 20Ir 5 Phase current setting value
LV I_CBF OC
for LV CBF protection
A 0.05Ir 20Ir 5 Negative sequence (NS)
271
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
A 0.05Ir 20Ir 5 Zero sequence (ZS) current
LV 3I0_CBF ZS setting
3I 0 value for LV
CBF protection
s 0 32 10 Time setting value of Stage
LV T1_CBF
1, for LV CBF protection
s 0.1 32 10 Time setting value of Stage
LV T2_CBF
2, for LV CBF protection
HV T_Dead Zone s 0 32 10 Time delay setting for HV
dead zone protection
MV T_Dead Zone s 0 32 10 Time delay setting for MV
dead zone protection
LV T_Dead Zone s 0 32 10 Time delay setting for LV
dead zone protection
A 0.05Ir 20Ir 100 current threshold of STUB
HV I_STUB
protection
s 0 60 60 delay time of STUB protec-
HV T_STUB
tion
A 0.05Ir 20Ir 100 current threshold of STUB
MV I_STUB
protection
s 0 60 60 delay time of STUB protec-
MV T_STUB
tion
A 0.05Ir 20Ir 100 current threshold of STUB
LV I_STUB
protection
s 0 60 60 delay time of STUB protec-
LV T_STUB
tion
A 0.05Ir 20Ir 5 zero sequence current
HV 3I0_PD threshold of pole discord-
ance protection
A 0.05Ir 20Ir 5 negative sequence current
HV 3I2_PD threshold of pole discord-
ance protection
s 0 60 10 delay time of pole discord-
HV T_PD
ance protection
A 0.05Ir 20Ir 5 zero sequence current
MV 3I0_PD
threshold of pole discord-
272
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
ance protection
A 0.05Ir 20Ir 5 negative sequence current
MV 3I2_PD threshold of pole discord-
ance protection
s 0 60 10 delay time of pole discord-
MV T_PD
ance protection
A 0.05Ir 0.2Ir 0.05 Minimum Current of VT
HV I_VT Fail
failure for HV side
A 0.05Ir 0.2Ir 0.5 Minimum zero or negative
HV 3I02_ VT Fail
Current of HV VT fail
V 7 20 8 Maximum phase to earth
HV Upe_VT Fail
voltage of HV VT fail
V 10 30 16 Maximum phase to phase
HV Upp_VT Fail
voltage of HV VT fail
HV Upe_VT Nor- V 40 65 40 Minimum phase to phase
mal voltage of HV VT normal
A 0.05Ir 0.2Ir 0.05 Minimum Current of VT
MV I_VT Fail
failure for MV side
A 0.05Ir 0.2Ir 0.5 Minimum zero or negative
MV 3I02_VT Fail
Current of MV VT fail
V 7 20 8 Maximum phase to earth
MV Upe_VT Fail
voltage of MV VT fail
V 10 30 16 Maximum phase to phase
MV Upp_VT Fail
voltage of MV VT fail
MV Upe_VT Nor- V 40 65 40 Minimum phase to phase
mal voltage of MV VT normal
A 0.05Ir 0.2Ir 0.05 Minimum Current of VT
LV I_VT Fail
failure for LV side
A 0.05Ir 0.2Ir 0.5 Minimum zero or negative
LV 3I02_VT Fail
Current of LV VT fail
V 7 20 8 Maximum phase to earth
LV Upe_VT Fail
voltage of LV VT fail
V 10 30 16 Maximum phase to phase
LV Upp_VT Fail
voltage of LV VT fail
LV Upe_VT Nor- V 40 65 40 Minimum phase to phase
mal voltage of LV VT normal
273
Chapter 20 Appendix
Default
Min. Max.
setting
Setting Unit (Ir:5A/1 (Ir:5A/1 Description
(Ir:5A/1
A) A)
A)
s 0.2 5 5 delay time of STUB protec-
T_Pulse Tripping
tion
Default
Setting Unit Min. Max. Description
setting
Autotransformer not comm
on transformer
Auto Trans 0 1 0
1-autotransformer ;
0- not autotransformer
Two-Wind Trans Two-winding(TWO WIND )
not three -winding trans-
0 1 0 former (TRANS)
1-two-winding trans;
0-three-winding trans
CT Fail Detect VT Failure Detection On/Off
0 1 0
1-On, 0-Off.
Setting Default
Unit Min. Max. Description
setting
Func_Inst Diff Instantaneous differential
0 1 0
protection ON 1-on; 0-off.
Func_Percent Diff Percentage differential pro-
0 1 0
tection ON 1-on; 0-off.
Block Diff at Inrush Inrush block differential pro-
0 1 0 tection
1-block; 0-not block.
2nd Harm Not 2nd harmonic (HAR) inhibit
Wave not the fuzzy recognition
based on the wave-
0 1 0
form(WAVE)
1-2nd harmonic on; 0-
waveform on
Block Diff at Overexcitation block differ-
Overexcit 0 1 0 ential protection
1-block; 0-not block.
Overexcit 3rd NOT Overexcitation stabilization
0 1 0
5th judgement
274
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
3rd or 5th harmonic (HAR)
inhibit on
1-3rd harmonic; 0-5th har-
monic.
Func_Diff Alarm Differential current (DIFF)
0 1 0 Alarming on
1-on; 0-off.
Block Diff at Block differential protection
CT_Fail 0 1 0 when there is CT failure
1-block; 0-not block.
HV D_side Elimi- Eliminate calculated 3I0
nate I0 when HV side winding is
0 1 0
connected in Delta mode
1- eliminate; 0-not eliminate
MV D_side Elimi- Eliminate calculated 3I0
nate I0 when MV side winding is
0 1 0
connected in Delta mode
1- eliminate; 0-not eliminate
LV D_side Elimi- Eliminate calculated 3I0
nate I0 when LV side winding is
0 1 0
connected in Delta mode
1- eliminate; 0-not eliminate
Diff Includes LV LV current is included in
Cur calculation of the differential
0 1 0 protection.
1- Diff Includes LV Cur;
0-Diff NOT Includes LV Cur
HV Func_REF Trip HV Restricted earth fault
0 1 0 trip-stage ON
1-on; 0-off.
HV Func_REF HV Restricted earth fault
Alarm 0 1 0 Alarm-stage ON
1-on; 0-off.
Block HV REF at Block HV REF when CT
HV CT_Fail 0 1 0 failure,
1-Block;0-unblock
MV Func_REF Trip MV Restricted earth fault
0 1 0
trip-stage ON 1-on; 0-off.
MV Func_REF MV Restricted earth fault
Alarm 0 1 0 Alarm-stage ON
1-on; 0-off.
275
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
Block MV REF at Block MV REF when CT
MV CT_Fail 0 1 0 failure,
1-Block;0-unblock
LV Func_REF Trip LV Restricted earth fault
0 1 0
trip-stage ON 1-on; 0-off.
LV Func_REF LV Restricted earth fault
Alarm 0 1 0 Alarm-stage ON
1-on; 0-off.
Block LV REF at Block LV REF when CT fail-
LV CT_Fail 0 1 0 ure,
1-Block;0-unblock
HV HV Overexcitation (V/F) on
0 1 0
Func_Overexcit 1-on; 0-off.
MV MV Overexcitation (V/F) on
0 1 0
Func_Overexcit 1-on; 0-off.
LV Func_Overexcit LV Overexcitation (V/F) on
0 1 0
1-on; 0-off.
Func_Overexcit Definite Overexcitation (V/F)
Alarm Def 0 1 0 Alarming on
1-on; 0-off.
Func_Overexcit Definite (DEF)Overexcitation
Trip Def 0 1 0 (V/F) on
1-on; 0-off.
Func_Overexcit Inverse (IVR)Overexcitation
Trip Inv 0 1 0 (V/F) on
1-on; 0-off.
V/F Volt- Overexcitation protection
age(0-VPP,1-VPN) uses phase-to-phase volt-
0 1 0 age (VPP) or phase-to-earth
voltage (VPN)
0-VPP; 1-VPN.
HV Func_OC1 The 1st stage of HV OC
(OC_1) protection is
0 1 0
switched ON
1-on; 0-off.
HV OC1 Direction Direction (DIR) detection of
HV OC Stage 1 is switched
0 1 0
ON
1-on; 0-off.
HV OC1 Dir To Sys Direction unit of HV OC
0 1 0
Stage 1 points to system
276
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
0 - point to the protected
transformer
1- point to system
HV OC1 Inrush Inrush 2nd harmonic detec-
Block tion HV OC Stage 1 is
0 1 0
switched ON
1-on; 0-off.
HV Func_OC2 The 2nd stage of HV OC
(OC_2) protection is
0 1 0
switched ON
1-on; 0-off.
HV OC2 Direction Direction (DIR) detection of
HV OC Stage 2 is switched
0 1 0
ON
1-on; 0-off.
HV OC2 Dir To Sys Direction unit of HV OC
Stage 2 points to system
0 1 0 0 - point to the protected
transformer
1- point to system
HV OC2 Inrush Inrush 2nd harmonic detec-
Block tion HV OC Stage 2 is
0 1 0
switched ON
1-on; 0-off.
HV Func_OC Inv The IDMTL inverse time
stage of HV OC protection is
0 1 0
switched ON
1-on; 0-off.
HV OC Inv Direc- Direction (DIR) detection of
tion HV OC IDMTL inverse time
0 1 0
is switched ON
1-on; 0-off.
HV OC Inv Dir To Direction unit of HV OC ID-
Sys MTL inverse time points to
system
0 1 0
0 - point to the protected
transformer
1- point to system
HV OC Inv Inrush Inrush 2nd harmonic detec-
Block 0 1 0 tion HV OC IDMTL inverse
time is switched ON
277
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
1-on; 0-off.
278
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
transformer
1- point to system
MV OC2 Inrush Inrush 2nd harmonic detec-
Block tion MV OC Stage 2 is
0 1 0
switched ON
1-on; 0-off.
MV Func_OC Inv The IDMTL inverse time
stage of MV OC protection is
0 1 0
switched ON
1-on; 0-off.
MV OC Inv Direc- Direction (DIR) detection of
tion MV OC IDMTL inverse time
0 1 0
is switched ON
1-on; 0-off.
MV OC Inv Dir To Direction unit of MV OC
Sys IDMTL inverse time points to
system
0 1 0
0 - point to the protected
transformer
1- point to system
MV OC Inv Inrush Inrush 2nd harmonic detec-
Block tion MV OC IDMTL inverse
0 1 0
time is switched ON
1-on; 0-off.
Block MV OC at Select to block MV OC pro-
MV VT_Fail tection or exit direction unit,
when MV VT fails
0 1 0
0- MV Direct OK at MV VT
Fail
1- Blk MV OC at MV VT Fail
MV OC Initiate MV OC protection initiate
HV1 CBF 0 1 0 HV1 side CBF
0 - initiate, 1 – not initiate
LV Func_OC1 The 1st stage of LV OC
(OC_1) protection is
0 1 0
switched ON
1-on; 0-off.
LV OC1 Direction Direction (DIR) detection of
LV OC Stage 1 is switched
0 1 0
ON
1-on; 0-off.
279
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
LV OC1 Dir To Sys Direction unit of LV OC
Stage 1 points to system
0 1 0 0 - point to the protected
transformer
1- point to system
LV OC1 Inrush Inrush 2nd harmonic detec-
Block tion LV OC Stage 1 is
0 1 0
switched ON
1-on; 0-off.
LV Func_OC2 The 2nd stage of LV OC
(OC_2) protection is
0 1 0
switched ON
1-on; 0-off.
LV OC2 Direction Direction (DIR) detection of
LV OC Stage 2 is switched
0 1 0
ON
1-on; 0-off.
LV OC2 Dir To Sys Direction unit of LV OC
Stage 2 points to system
0 1 0 0 - point to the protected
transformer
1- point to system
LV OC2 Inrush Inrush 2nd harmonic detec-
Block tion LV OC Stage 2 is
0 1 0
switched ON
1-on; 0-off.
LV Func_OC Inv The IDMTL inverse time
stage of LV OC protection is
0 1 0
switched ON
1-on; 0-off.
LV OC Inv Direc- Direction (DIR) detection of
tion LV OC IDMTL inverse time is
0 1 0
switched ON
1-on; 0-off.
LV OC Inv Dir To Direction unit of LV OC ID-
Sys MTL inverse time points to
system
0 1 0
0 - point to the protected
transformer
1- point to system
LV OC Inv Inrush 0 1 0 Inrush 2nd harmonic detec-
280
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
Block tion LV OC IDMTL inverse
time is switched ON
1-on; 0-off.
Block LV OC at LV Select to block LV OC pro-
VT_Fail tection or exit direction unit,
0 1 0 when LV VT fails
0- LV Direct OK at LV VT Fail
1- Blk LV OC at LV VT Fail
LV OC Initiate HV1 LV OC protection initiate
CBF 0 1 0 HV1 side CBF
0 - initiate, 1 – not initiate
HV Func_EF1 The 1st stage of HV earth
fault (EF_1) protection is
0 1 0
switched ON
1-on; 0-off.
HV EF1 Direction Direction (DIR) detection of
HV EF Stage 1 is switched
0 1 0
ON
1-on; 0-off.
HV EF1 Dir To Sys Direction unit of HV EF
Stage 1 points to system
0 1 0 0 - point to the protected
transformer
1- point to system
HV EF1 Inrush Inrush 2nd harmonic detec-
Block tion HV EF Stage 1 is
0 1 0
switched ON
1-on; 0-off.
HV Func_EF2 The 2nd stage of HV earth
fault (EF_2) protection is
0 1 0
switched ON
1-on; 0-off.
HV EF2 Direction Direction (DIR) detection of
HV EF Stage 2 is switched
0 1 0
ON
1-on; 0-off.
HV EF2 Dir To Sys Direction unit of HV EF
Stage 2 points to system
0 1 0 0 - point to the protected
transformer
1- point to system
281
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
HV EF2 Inrush Inrush 2nd harmonic detec-
Block tion HV EF Stage 2 is
0 1 0
switched ON
1-on; 0-off.
HV Func_EF Inv The IDMTL inverse time
stage of HV EF protection is
0 1 0
switched ON
1-on; 0-off.
HV EF Inv Direc- Direction (DIR) detection of
tion HV EF IDMTL inverse time is
0 1 0
switched ON
1-on; 0-off.
HV EF Inv Dir To Direction unit of HV EF ID-
Sys MTL inverse time points to
system
0 1 0
0 - point to the protected
transformer
1- point to system
HV EF Inv Inrush Inrush 2nd harmonic detec-
Block tion HV EF IDMTL inverse
0 1 0
time is switched ON
1-on; 0-off.
Block HV EF at HV Select to block HV EF pro-
VT_Fail tection or exit direction unit,
when HV VT fails
0 1 0
0 - HV Direct OK at HV VT
Fail
1 - Blk HV EF at HV VT Fail
Block HV EF at HV Block HV EF when there is
CT_Fail 0 1 0 HV CT failure
1-Block; 0-NOT block
HV EF Initiate LV HV EF protection initiate LV
CBF 0 1 0 side CBF
0 - initiate, 1 – not initiate
HV EF Initiate MV HV EF protection initiate MV
CBF 0 1 0 side CBF
0 - initiate, 1 – not initiate
MV Func_EF1 The 1st stage of MV earth
fault (EF_1) protection is
0 1 0
switched ON
1-on; 0-off.
282
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
MV EF1 Direction Direction (DIR) detection of
MV EF Stage 1 is switched
0 1 0
ON
1-on; 0-off.
MV EF1 Dir To Sys Direction unit of MV EF
Stage 1 points to system
0 1 0 0 - point to the protected
transformer
1- point to system
MV EF1 Inrush Inrush 2nd harmonic detec-
Block tion MV EF Stage 1 is
0 1 0
switched ON
1-on; 0-off.
MV Func_EF2 The 2nd stage of MV earth
fault (EF_2) protection is
0 1 0
switched ON
1-on; 0-off.
MV EF2 Direction Direction (DIR) detection of
MV EF Stage 2 is switched
0 1 0
ON
1-on; 0-off.
MV EF2 Dir To Sys Direction unit of MV EF
Stage 2 points to system
0 1 0 0 - point to the protected
transformer
1- point to system
MV EF2 Inrush Inrush 2nd harmonic detec-
Block tion MV EF Stage 2 is
0 1 0
switched ON
1-on; 0-off.
MV Func_EF Inv The IDMTL inverse time
stage of MV EF protection is
0 1 0
switched ON
1-on; 0-off.
MV EF Inv Direc- Direction (DIR) detection of
tion MV EF IDMTL inverse time
0 1 0
is switched ON
1-on; 0-off.
MV EF Inv Dir To Direction unit of MV EF ID-
Sys 0 1 0 MTL inverse time points to
system
283
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
0 - point to the protected
transformer
1- point to system
MV EF Inv Inrush Inrush 2nd harmonic detec-
Block tion MV EF IDMTL inverse
0 1 0
time is switched ON
1-on; 0-off.
Block MV EF at Select to block MV EF pro-
MV VT_Fail tection or exit direction unit,
when MV VT fails
0 1 0
0 - MV Direct OK at MV VT
Fail
1 - Blk MV EF at MV VT Fail
Block MV EF at Block MV EF when there is
MV CT_Fail 0 1 0 MV CT failure
1-Block; 0-NOT block
MV EF Initiate HV MV EF protection initiate
CBF 0 1 0 HV1 side CBF
0 - initiate, 1 – not initiate
LV Func_EF1 The 1st stage of LV earth
fault (EF_1) protection is
0 1 0
switched ON
1-on; 0-off.
LV EF1 Direction Direction (DIR) detection of
LV EF Stage 1 is switched
0 1 0
ON
1-on; 0-off.
LV EF1 Dir To Sys Direction unit of LV EF Stage
1 points to system
0 1 0 0 - point to the protected
transformer
1- point to system
LV EF1 Inrush Inrush 2nd harmonic detec-
Block tion LV EF Stage 1 is
0 1 0
switched ON
1-on; 0-off.
LV Func_EF2 The 2nd stage of LV earth
fault (EF_2) protection is
0 1 0
switched ON
1-on; 0-off.
LV EF2 Direction 0 1 0 Direction (DIR) detection of
284
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
LV EF Stage 2 is switched
ON
1-on; 0-off.
LV EF2 Dir To Sys Direction unit of LV EF Stage
2 points to system
0 1 0 0 - point to the protected
transformer
1- point to system
LV EF2 Inrush Inrush 2nd harmonic detec-
Block tion LV EF Stage 2 is
0 1 0
switched ON
1-on; 0-off.
LV Func_EF Inv The IDMTL inverse time
stage of LV EF protection is
0 1 0
switched ON
1-on; 0-off.
LV EF Inv Direction Direction (DIR) detection of
LV EF IDMTL inverse time is
0 1 0
switched ON
1-on; 0-off.
LV EF Inv Dir To Direction unit of LV EF ID-
Sys MTL inverse time points to
system
0 1 0
0 - point to the protected
transformer
1- point to system
LV EF Inv Inrush Inrush 2nd harmonic detec-
Block tion LV EF IDMTL inverse
0 1 0
time is switched ON
1-on; 0-off.
Block LV EF at LV Select to block LV EF pro-
VT_Fail tection or exit direction unit,
when LV VT fails
0 1 0
0 - LV Direct OK at LV VT
Fail
1 - Blk LV EF at LV VT Fail
Block LV EF at LV Block LV EF when there is
CT_Fail 0 1 0 LV CT failure
1-Block; 0-NOT block
LV EF Initiate HV LV EF protection initiate HV1
0 1 0
CBF side CBF
285
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
0 - initiate, 1 – not initiate
286
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
verse time stage is switched
ON
1-on; 0-off.
HV Neu OC Inv Dir Direction unit of HV neutral
To Sys OC IDMTL inverse time
stage points to system
0 1 0
0 - point to the protected
transformer
1- point to system
HV Neu OC Inv Inrush 2nd harmonic detec-
Inrush Block tion HV neutral OC IDMTL
0 1 0 inverse time stage is
switched ON
1-on; 0-off.
Block HV NOC at Select to block HV neutral
HV VT_Fail OC protection or exit direc-
tion unit, when HV VT fails
0 1 0 0 - HV Direct OK at HV VT
Fail
1 - Blk HV NOC at HV VT
Fail
HV Neu OC Init HV neutral OC protection
MV CBF 0 1 0 initiate LV side CBF
0 - initiate, 1 – not initiate
MV Func_Neu The 1st stage of MV neutral
OC1 OC (OC_1) protection is
0 1 0
switched ON
1-on; 0-off.
MV Neu OC1 Di- Direction (DIR) detection of
rection MV neutral OC Stage 1 is
0 1 0
switched ON
1-on; 0-off.
MV Neu OC1 Dir Direction unit of MV neutral
To Sys OC Stage 1 points to system
0 1 0 0 - point to the protected
transformer
1- point to system
MV Neu OC1 In- Inrush 2nd harmonic detec-
rush Block tion MV neutral OC Stage 1
0 1 0
is switched ON
1-on; 0-off.
287
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
MV Func_Neu The 2nd stage of MV neutral
OC2 OC (OC_2) protection is
0 1 0
switched ON
1-on; 0-off.
MV Neu OC2 Di- Direction (DIR) detection of
rection MV neutral OC Stage 2 is
0 1 0
switched ON
1-on; 0-off.
MV Neu OC2 Dir Direction unit of MV neutral
To Sys OC Stage 2 points to system
0 1 0 0 - point to the protected
transformer
1- point to system
MV Neu OC2 In- Inrush 2nd harmonic detec-
rush Block tion MV neutral OC Stage 2
0 1 0
is switched ON
1-on; 0-off.
MV Func_Neu OC The IDMTL inverse time
Inv stage of MV neutral OC
0 1 0
protection is switched ON
1-on; 0-off.
MV Neu OC Inv Direction (DIR) detection of
Direction MV neutral OC IDMTL in-
0 1 0 verse time stage is switched
ON
1-on; 0-off.
MV Neu OC Inv Dir Direction unit of MV neutral
To Sys OC IDMTL inverse time
stage points to system
0 1 0
0 - point to the protected
transformer
1- point to system
MV Neu OC Inv Inrush 2nd harmonic detec-
Inrush Block tion MV neutral OC IDMTL
0 1 0 inverse time stage is
switched ON
1-on; 0-off.
Block MV NOC at Select to block MV neutral
MV VT_Fail OC protection or exit direc-
0 1 0
tion unit, when MV VT fails
0 - MV Direct OK at MV VT
288
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
Fail
1 - Blk MV NOC at MV VT
Fail
MV Neu OC Init MV neutral OC protection
MV CBF 0 1 0 initiate LV side CBF
0 - initiate, 1 – not initiate
LV Func_Neu OC1 The 1st stage of LV neutral
OC (OC_1) protection is
0 1 0
switched ON
1-on; 0-off.
LV Neu OC1 Di- Direction (DIR) detection of
rection LV neutral OC Stage 1 is
0 1 0
switched ON
1-on; 0-off.
LV Neu OC1 Dir To Direction unit of LV neutral
Sys OC Stage 1 points to system
0 1 0 0 - point to the protected
transformer
1- point to system
LV Neu OC1 In- Inrush 2nd harmonic detec-
rush Block tion LV neutral OC Stage 1 is
0 1 0
switched ON
1-on; 0-off.
LV Func_Neu OC2 The 2nd stage of LV neutral
OC (OC_2) protection is
0 1 0
switched ON
1-on; 0-off.
LV Neu OC2 Di- Direction (DIR) detection of
rection LV neutral OC Stage 2 is
0 1 0
switched ON
1-on; 0-off.
LV Neu OC2 Dir To Direction unit of LV neutral
Sys OC Stage 2 points to system
0 1 0 0 - point to the protected
transformer
1- point to system
LV Neu OC2 In- Inrush 2nd harmonic detec-
rush Block tion LV neutral OC Stage 2 is
0 1 0
switched ON
1-on; 0-off.
LV Func_Neu OC 0 1 0 The IDMTL inverse time
289
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
Inv stage of LV neutral OC pro-
tection is switched ON
1-on; 0-off.
LV Neu OC Inv Direction (DIR) detection of
Direction LV neutral OC IDMTL in-
0 1 0 verse time stage is switched
ON
1-on; 0-off.
LV Neu OC Inv Dir Direction unit of LV neutral
To Sys OC IDMTL inverse time
stage points to system
0 1 0
0 - point to the protected
transformer
1- point to system
LV Neu OC Inv Inrush 2nd harmonic detec-
Inrush Block tion LV neutral OC IDMTL
0 1 0 inverse time stage is
switched ON
1-on; 0-off.
Block LV NOC at Select to block LV neutral
LV VT_Fail OC protection or exit direc-
tion unit, when LV VT fails
0 1 0
0 - LV Direct OK at LV VT
Fail
1 - Blk LV NOC at LV VT Fail
LV Neu OC Init LV LV neutral OC protection
CBF 0 1 0 initiate LV side CBF
0 - initiate, 1 – not initiate
HV Func_Thermal Thermal overload in HV side
OvLd 0 1 0 is switched on
0 - OFF, 1 - ON
HV Cold Curve HV side using hot/cold curve
0 1 0 type
0 – Hot curve, 1 – Cold curve
HV Thermal Init LV HV thermal overload protec-
CBF 0 1 0 tion initiate LV side CBF
0 - initiate, 1 – not initiate
HV Thermal Init HV thermal overload protec-
MV CBF 0 1 0 tion initiate MV side CBF
0 - initiate, 1 – not initiate
MV Func_Thermal 0 1 0 Thermal overload in MV side
290
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
OvLd is switched on
0 - OFF, 1 - ON
MV Cold Curve MV side using hot/cold curve
0 1 0 type
0 – Hot curve, 1 – Cold curve
MV Thermal Init MV thermal overload protec-
HV1 CBF 0 1 0 tion initiate HV side CBF
0 - initiate, 1 – not initiate
HV Overload (LOAD) protection
Func_OverLoad 0 1 0 in HV side is switched ON
1-on; 0-off.
MV Overload (LOAD)in MV side
0 1 0
Func_OverLoad on
LV Overload (LOAD)in LV side
0 1 0
Func_OverLoad on
LW Func_OvLd Alarm stage of LV delta
Alarm winding (LWIND) overload
0 1 0 (LOAD) protection is
switched ON.
1-on; 0-off.
LW Func_OvLd Low-setting trip stage of LV
Low Trip delta winding overload pro-
0 1 0
tection is switched ON.
1-on; 0-off.
LW Func_OvLd High-setting trip stage of LV
High Trip delta winding overload pro-
0 1 0
tection is switched ON.
1-on; 0-off.
Low Trip Init HV1 Low-setting trip stage of LV
CBF delta winding overload pro-
0 1 0
tection initiate HV1 side CBF
0 - initiate, 1 – not initiate
High Trip Init HV1 High-setting trip stage of LV
CBF delta winding overload pro-
0 1 0
tection initiate HV1 side CBF
0 - initiate, 1 – not initiate
Low Trip Init MV Low-setting trip stage of LV
CBF delta winding overload pro-
0 1 0
tection initiate MV side CBF
0 - initiate, 1 – not initiate
291
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
High Trip Init MV High-setting trip stage of LV
CBF delta winding overload pro-
0 1 0
tection initiate MV side CBF
- initiate, 1 – not initiate
HV Func_OV1 HV overvoltage stage 1 en-
0 1 0
abled or disabled
HV Func_OV2 HV overvoltage stage 1 trip
0 1 0
or alarm
HV Func_OV2 HV overvoltage stage 2 en-
0 1 0
abled or disabled
HV OV2 Trip HV overvoltage stage 2 trip
0 1 0
or alarm
HV OV Chk PE HV phase to phase voltage
0 1 0 or phase to earth measured
for overvoltage protection
MV Func_OV1 MV overvoltage stage 1 en-
0 1 0
abled or disabled
MV Func_OV2 MV overvoltage stage 1 trip
0 1 0
or alarm
MV Func_OV2 MV overvoltage stage 2 en-
0 1 0
abled or disabled
MV OV2 Trip MV overvoltage stage 2 trip
0 1 0
or alarm
MV OV Chk PE MV phase to phase voltage
0 1 0 or phase to earth measured
for overvoltage protection
HV Func_CBF HV Circuit breaker failure
(CBF) protection is switched
0 1 0
ON
1-on; 0-off.
HV 3I0/3I2 Check HV CBF protection detect
On negative or zero sequence
0 1 0
current 3I0 or 3I2.
1-Detect; 0- Not Detect
HV CB Status HV CBF protection detect
Check On 0 1 0 HV1 CB status
1-Detect; 0- Not Detect
MV Func_CBF MV Circuit breaker failure
(CBF) protection is switched
0 1 0
ON
1-on; 0-off.
292
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
MV 3I0/3I2 Check MV CBF protection detect
On negative or zero sequence
0 1 0
current 3I0 or 3I2.
1-Detect; 0- Not Detect
MV CB Status MV CBF protection detect
Check On 0 1 0 MV CB status
1-Detect; 0- Not Detect
LV Func_CBF LV Circuit breaker failure
(CBF) protection is switched
0 1 0
ON
1-on; 0-off.
LV 3I0/3I2 Check LV CBF protection detect
On negative or zero sequence
0 1 0
current 3I0 or 3I2.
1-Detect; 0- Not Detect
LV CB Status LV CBF protection detect LV
Check On 0 1 0 CB status
1-Detect; 0- Not Detect
HV Func_Dead Dead zone protection is
Zone 0 1 0 switched ON
1-on; 0-off.
MV Func_Dead Dead zone protection is
Zone 0 1 0 switched ON
1-on; 0-off.
LV Func_Dead Dead zone protection is
Zone 0 1 0 switched ON
1-on; 0-off.
HV Func_STUB Enable or disable STUB
0 1 0
protection
HV STUB Init LV STUB protection initiate LV
CBF 0 1 0 side CBF
0 - initiate, 1 – not initiate
HV STUB Init MV STUB protection initiate HV
CBF 0 1 0 side CBF
0 - initiate, 1 – not initiate
MV Func_STUB Enable or disable STUB
0 1 0
protection
MV STUB Init LV STUB protection initiate LV
CBF 0 1 0 side CBF
0 - initiate, 1 – not initiate
293
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
MV STUB Init MV STUB protection initiate MV
CBF 0 1 0 side CBF
0 - initiate, 1 – not initiate
LV Func_STUB Enable or disable STUB
0 1 0
protection
LV STUB Init LV STUB protection initiate LV
CBF 0 1 0 side CBF
0 - initiate, 1 – not initiate
LV STUB Init MV STUB protection initiate LV
CBF 0 1 0 side CBF
0 - initiate, 1 – not initiate
MV Func_PD Enable or disable MV poles
0 1 0
discordance protection
MV PD Chk 3I0/3I2 Enable or disable 3I0/3I2
0 1 0
criteria
MV Func_PD Enable or disable MV poles
0 1 0
discordance protection
MV PD Chk 3I0/3I2 Enable or disable 3I0/3I2
0 1 0
criteria
HV VT FAIL Detect HV VT Failure Detection
0 0 1 On/Off
1-On, 0-Off.
HV Solid Earth HV Earthing mode:
1: Solid earthed system ;
0 0 1
0: isolated system or re-
sistance earthed.
MV VT FAIL Detect MV VT Failure Detection
0 0 1 On/Off
1-On, 0-Off.
MV Solid Earth MV Earthing mode:
1: Solid earthed system ;
0 0 1
0: isolated system or re-
sistance earthed.
LV VT FAIL Detect LV VT Failure Detection
0 0 1 On/Off
1-On, 0-Off.
LV Solid Earth LV Earthing mode:
1: Solid earthed system ;
0 0 1
0: isolated system or re-
sistance earthed.
294
Chapter 20 Appendix
Default
Setting Unit Min. Max. Description
setting
st
To select whether the 1
binary input (BI1) trip the 1st
BI1 Enable BO1 0 0 1
binary output (BO1) or not.
1-enable, 0-disable
To select BO1 tripping in
pulse mode or in direct mode
BO1 Pulse Trip- 0- BO1 Direct Tripping,
0 0 1
ping without delay
1- BO1 Pulse Tripping, with
preset delay time
To select whether the 2nd
nd
binary input (BI2) trip the 2
BI2 Enable BO2 0 0 1
binary output (BO2) or not.
1-enable, 0-disable
To select BO2 tripping in
pulse mode or in direct mode
BO2 Pulse Trip- 0- BO2 Direct Tripping,
0 0 1
ping without delay
1- BO2 Pulse Tripping, with
preset delay time
whether BI1 initiate HV side
BI1 Init HV CBF 0 0 1 CBF or not
0 - initiate, 1 – not initiate
whether BI1 initiate MV side
BI1 Init MV CBF 0 0 1 CBF or not
0 - initiate, 1 – not initiate
whether BI1 initiate LV side
BI1 Init LV CBF 0 0 1 CBF or not
0 - initiate, 1 – not initiate
whether BI2 initiate HV side
BI2 Init HV CBF 0 0 1 CBF or not
0 - initiate, 1 – not initiate
whether BI2 initiate MV side
BI2 Init MV CBF 0 0 1 CBF or not
0 - initiate, 1 – not initiate
whether BI2 initiate LV side
BI2 Init LV CBF 0 0 1 CBF or not
0 - initiate, 1 – not initiate
295
Chapter 20 Appendix
Information Description
Per Diff Trip B Treble slope percent Differential protection (ID>) trip for phase A/B/C
Inst Diff Trip B Instantaneous Differential protection (ID>>) trip for phase A/B/C
Def V/F Trip Overexcitation protection(V/F) tripping (Trip) with definite (DEF) and
Inv V/F Trip inverse(IVR) time characteristic
296
Chapter 20 Appendix
Information Description
297
Chapter 20 Appendix
Information Description
4
BI Comm Fail Binary input communication fail
5
BI Config Err Binary input configuration is error
6
BI EEPROM Err The EEPROM of binary input is error
11
BO EEPROM Err The EEPROM of binary output is error
12
BO No Response No response of binary output
13
BOConfig Err Binary output configuration is error
14
CB auxiliary contacts indicate that one
CB Err Blk PD pole is open but at the same time current is
flowing through the pole.
15
CB Open A Err Binary input error of CB Open A
16
CB Open B Err Binary input error of CB Open B
298
Chapter 20 Appendix
17
CB Open C Err Binary input error of CB Open C
22
Differential current exceeds the threshold
Diff Cur Alarm
value
23
EquipPara Err Equipment parameter is error
26
H BI_V3P_MCB Err Binary input error of three phase MCB
29
a blocking condition is imposed to backup
HV Inrush Blk BU
protection by inrush condition detection
32
HV OV2 Alarm Stage 2 of overvoltage protection alarm
35 HV VT Fail HV VT Fail
36 Negative-sequence current exceeds a thresh-
HV1 I2 Alarm
old
37 Negative-sequence current exceeds a thresh-
HV2 I2 Alarm
old
38
L BI MCB VT Fail Binary input error of VT fail of MCB
39
L BI_V3P_MCB Err Binary input error of three phase MCB
299
Chapter 20 Appendix
42
a blocking condition is imposed to backup
LV Inrush Blk BU
protection by inrush condition detection
46 LV VT Fail LV VT Fail
47 LW Load Alarm LW Load Alarm
48
M BI MCB VT Fail Binary input error of VT fail of MCB
49
M BI_V3P_MCB Err Binary input error of three phase MCB
53
a blocking condition is imposed to backup
MV Inrush Blk BU
protection by inrush condition detection
56
MV OV2 Alarm Stage 2 of overvoltage protection alarm
59 MV VT Fail MV VT Fail
60 NO/NC Discord NO/NC discord
61 Ph_A CT Fail Phase A CT Fail
62 Ph_B CT Fail Phase B CT Fail
63 Ph_C CT Fail Phase C CT Fail
64 ROM Verify Err ROM verifying is error
65 Sampling Err Sampling is error
66 Set Group Err Setting group is error
67 Setting Err Setting value is error
68 Soft Version Err Soft version is error
69 SRAM Check Err SRAM checking is error
70
Sys Config Err System configuration is error
300
Chapter 20 Appendix
71
Test BO Un_reset Do not reset after testing binary output
No Information Description
301
Chapter 20 Appendix
No Information Description
302
Chapter 20 Appendix
No Information Description
303
Chapter 20 Appendix
INV.
Equation 39
where:
4 CT Requirement
4.1 Overview
In practice, the conventional magnetic- core current transformer (hereinafter
as referred CT) is not able to transform the current signal accurately in whole
fault period of all possible faults because of manufactured cost and installa-
tion space limited. CT Saturation will cause distortion of the current signal
and can result in a failure to operate or cause unwanted operations of some
functions. Although more and more protection IEDs have been designed to
permit CT saturation with maintained correct operation, the performance of
protection IED is still depended on the correct selection of CT.
304
Chapter 20 Appendix
Class P CT
Class PR CT
CT with limited remanence factor for which, in some cased, a value of the
secondary loop time constant and/or a limiting value of the winding re-
sistance may also be specified.
Class PX CT
Class TPS CT
Class TPX CT
Class TPY CT
Class TPZ CT
305
Chapter 20 Appendix
Abbrev. Description
Esl Rated secondary limiting e.m.f
Eal Rated equivalent limiting secondary e.m.f
Ek Rated knee point e.m.f
Uk Knee point voltage (r.m.s.)
Kalf Accuracy limit factor
Kssc Rated symmetrical short-circuit current factor
K’ssc Effective symmetrical short-circuit current factor
K”ssc based on different Ipcf
Kpcf Protective checking factor
Ks Specified transient factor
Kx Dimensioning factor
Ktd Transient dimensioning factor
Ipn Rated primary current
Isn Rated secondary current
Ipsc Rated primary short-circuit current
Ipcf protective checking current
Isscmax Maximum symmetrical short-circuit current
Rct Secondary winding d.c. resistance at 75 °C /
167 °F (or other specified temperature)
Rb Rated resistive burden
R’b = Rlead + Rrelay = actual connected resistive
burden
Rs Total resistance of the secondary circuit, inclu-
sive of the secondary winding resistance cor-
rected to 75℃, unless otherwise specified, and
inclusive of all external burden connected.
Rlead Wire loop resistance
Zbn Rated relay burden
Zb Actual relay burden
Tp Specified primary time constant
Ts Secondary loop time constant
The current error of CT should be within the accuracy limit required at speci-
fied fault current.
306
Chapter 20 Appendix
For different protections, Ipcf is the selected fault current in proper fault po-
sition of the corresponding fault, which will flow through the verified CT.
Last but not least, Ipcf calculation should be based on the future possible
system power capacity
To reduce the influence of transient state, Kalf, Accuracy limit factor of CT,
should be larger than the following requirement
4.4.2 CT class
The selected CT should guarantee that the error is within the required ac-
curacy limit at steady symmetric short circuit current. The influence of short
circuit current DC component and remanence should be considered, based
on extent of system transient influence, protection function characteristic,
consequence of transient saturation and actual operating experience. To ful-
fill the requirement on a specified time to saturation, the rated equivalent
secondary e.m.f of CTs must higher than the required maximum equivalent
secondary e.m.f that is calculated based on actual application.
307
Chapter 20 Appendix
For TPS class CT, Eal (rated equivalent secondary limiting e.m.f) is generally
determined as follows:
Where
For TPX, TPY and TPZ class CT, Eal (rated equivalent secondary limiting
e.m.f) is generally determined as follows:
Where
For the CTs applied to 110 - 220kV voltage level transmission line protection,
110 - 220kV voltage level transformer differential protection, 100-200MW
generator-transformer set differential protection, and large capacity motor
differential protection, the influence of system transient state to CT is so less
that the CT selection is based on system steady fault state mainly, and leave
308
Chapter 20 Appendix
For P class and PR class CT, Esl (the rated secondary limited e.m.f) is gen-
erally determined as follows:
For PX class CT, Ek (rated knee point e.m.f) is generally determined as fol-
lows:
For the CTs applied to protection for110kV voltage level and below system,
the CT should be selected based on system steady fault state condition. P
class CT is always applied.
The CT accuracy class should guarantee that the protection relay applied is
able to operate correctly even at a very sensitive setting, e.g. for a sensitive
residual overcurrent protection. Generally, the current transformer should
have an accuracy class, which have an current error at rated primary current,
that is less than ±1% (e.g. class 5P).
4.4.4 Ratio of CT
The current transformer ratio is mainly selected based on power system data
like e.g. maximum load. However, it should be verified that the current to the
protection is higher than the minimum operating value for all faults that are to
be detected with the selected CT ratio. The minimum operating current is
different for different functions and settable normally. So each function
should be checked separately.
309
Chapter 20 Appendix
Too high flux will result in CT saturation. The secondary e.m.f is directly
proportional to linked flux. To feed rated secondary current, CT need to
generate enough secondary e.m.f to feed the secondary burden. Conse-
quently, Higher secondary burden, need Higher secondary e.m.f, and then
closer to saturation. So the actual secondary burden R’b must be less than
the rated secondary burden Rb of applied CT, presented
Rb > R’b
R’b = Rlead + Zb
Where
Sr: the burden of IED current input channel per phase, in VA;
For earth faults, the loop includes both phase and neutral wire, normally
twice the resistance of the single secondary wire. For three-phase faults the
neutral current is zero and it is just necessary to consider the resistance up to
the point where the phase wires are connected to the common neutral wire.
The most common practice is to use four wires secondary cables so it nor-
mally is sufficient to consider just a single secondary wire for the three-phase
case.
310
Chapter 20 Appendix
It is recommended that the CT of each side could be same class and with
same characteristic to guarantee the protection sensitivity.
For the CTs applied to 330kV voltage level and above step-down transformer,
TPY class CT is preferred for each side.
For the CTs of high voltage side and middle voltage side, Eal should be ver-
ified at external fault C-O-C-O duty cycle.
For the CT of low voltage side in delta connection, Eal should be verified at
external three phase short circuit fault C-O duty cycle.
Where
Where
Where
311