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5 4 3 2 1

JM50 Ultrabook Block Diagram Rev 1.0

D D

VRAM
GPU PEG CPU DDR3 1333MHz DDR3 SO-DIMM
Page 76,77 nVidia N13PGL Sandy Bridge &
Page 70~79
Memory Down
Page 3~11 Page 16~18

eDP
LVDS
LCD Panel
Page 45

FDI
DMI x4
0 MiniCard (HALF)
HDMI
HDMI
2 WLAN + BT
Page 48
Page 53

PCIEx1
Debug Conn.
Page 44 4 Broadcom GigaLAN
C

BCM57780 RJ45 C

LPC Page 34
Touchpad EC Page 33

Keyboard NPCE794L
PCH
Panther Point
Page 31 Page 30 SATA 1 Realtek CardReader
RTS5209
SPI ROM 2 IN 1
(4M+2M) Page 40
Page 28
Page 20~28 Power

USB 3.0

USB 2.0
+VCC_CORE
FAN 3 +VGFX_CORE
1 MiniCard (FULL) Page 80
Page 50 0 SSD (mSATA) System
Page 53 Page 81

10
VTT
Speaker CMOS Camera 0 HDD Page 82
Page 37
Azalia Codec Azalia Page 45
Page 51
B ALC271
4 DDR3 B

Audio Jack ODD Page 83


Page 38 Bluetooth 2
(combo)
Page 61 Page 51
Page 37 +1.8VS
Discharge Circuit DC & BATT. Conn. 2 Page 84
Page 57 Page 60 2 USB Port(2)
Page 52 +VCCSA
Reset Circuit Skew Holes 3 Page 85
Page 65
Page 32 USB Port(3) +VGA_CORE
Page 52
1 Page 87

Charger Charger
Page 52 Page 88

1 USB Port(1)
Detect
Page 90
Page 52
Load Switch
A A
Page 91

Power Protect
Page 92

Title : Block Diagram


BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 1 of 93
5 4 3 2 1
5 4 3 2 1

PCH_CPT PCH_CPT
Internal & EC EC GPIO Use As Signal Name
Use As Signal Name External Power GPA0
GPIO GPIO Pull-up/down NPCE795L GPA1
GPIO 00
GPA2
GPIO 01
GPA3
GPIO [2:5]
GPA4
GPIO 06
GPA5
GPIO 07
GPA6
GPIO 08
GPA7
D GPIO 09 D
GPB0
GPIO 10
GPB1
GPIO 11
GPB2
GPIO 12
GPB3
GPIO 13
GPB4
GPIO 14
GPB5
GPIO 15
GPB6
GPIO 16
GPB7
GPIO 17
GPC0
GPIO 18
GPC1
GPIO 19
GPC2
GPIO 20
GPC3
GPIO 21
GPC4
GPIO 22
GPC5
GPIO 23
GPC6
GPIO 24
GPC7
GPIO 25
GPD0
GPIO 26
GPD1
GPIO 27
GPD2
C
GPIO 28 C
GPD3
GPIO 29
GPD4
GPIO 30
GPD5
GPD6
GPIO 31
GPD7
GPIO 32
GPE0
GPIO 33
GPE1
GPIO 34
GPE2
GPIO 35
GPE3
GPIO 36
GPE4
GPIO 37
GPE5
GPIO 38
GPE6
GPIO 39
GPE7
GPIO 40
GPF0
GPIO 41
GPF1
GPIO 42 SM_BUS ADDRESS :
GPF2
GPIO 43
GPF3 SM-Bus Device SM-Bus Address
GPIO 44
GPF4
GPIO 45
B GPF5 SO-DIMM 0 1010000x ( A0h ) B
GPIO 46
GPF6 SO-DIMM 1 1010001x ( A4h )
GPIO 47
GPF7
GPIO 48
GPG0
GPIO 49
GPG1
GPG2
GPIO 50
GPG6
GPIO 51
GPH0
GPIO 52
GPH1 PCIE 1 N/A USB 0 USB Port (1)
GPIO 53
GPH2 PCIE 2 Minicard WLAN USB 1 USB Port (2)
GPIO 54
GPH3 PCIE 3 N/A USB 2 USB 3.0 Port (3)
GPIO 55
GPH4 PCIE 4 USB3.0 USB 3 USB Port (4)
GPIO 56
GPH5 PCIE 5 N/A USB 4 N/A
GPIO 57
GPH6 PCIE 6 GLAN USB 5 N/A
GPIO 58
GPI0 PCIE 7 N/A USB 6 N/A
GPIO 59
GPI1 PCIE 8 N/A USB 7 N/A
GPIO 60
GPI2 USB 8 CMOS Camera
GPIO 61 SATA0 SATA HDD
GPI3 USB 9 WLAN
GPIO 62 SATA1 N/A
GPI4 USB 10 Card Reader
GPIO 63 SATA2 SATA ODD
A
GPI5 USB 11 N/A A
GPIO 64 SATA3 N/A
GPI6 USB 12 N/A
GPIO 65 SATA4 N/A
GPI7 USB 13 N/A
GPIO 66 SATA5 N/A
GPJ0
GPIO 67
GPJ1
GPIO 72
GPJ2
GPIO 73 Title : System Setting
GPJ3
GPIO 74 BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg
GPJ4

WWW.AliSaler.Com
Size Project Name
GPIO 75 Rev
GPJ5 C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 2 of 93
5 4 3 2 1
5 4 3 2 1

+VCCP +VCCP 4,6,7,30,32,57,82

D D

+VCCP

U0301A PEG_COMP R0301 1 1% 2 24.9Ohm


G3
PEG_ICOMPI
G1
PEG_ICOMPO
22 DMI_TXN0 M2 G4
DMI_RX#[0] PEG_RCOMPO
22 DMI_TXN1 P6 PCIENB_RXN[15:0] 70
DMI_RX#[1]
22 DMI_TXN2 P1
DMI_RX#[2] PCIENB_RXN15
22 DMI_TXN3 P10 H22
DMI_RX#[3] PEG_RX#[0] PCIENB_RXN14
J21
PEG_RX#[1] PCIENB_RXN13
22 DMI_TXP0 N3 B22
DMI_RX[0] PEG_RX#[2] PCIENB_RXN12
22 DMI_TXP1 P7 D21
DMI_RX[1] PEG_RX#[3]

DMI
22 DMI_TXP2 P3 A19 PCIENB_RXN11
DMI_RX[2] PEG_RX#[4] PCIENB_RXN10
22 DMI_TXP3 P11 D17
DMI_RX[3] PEG_RX#[5] PCIENB_RXN9
B14
PEG_RX#[6] PCIENB_RXN8
22 DMI_RXN0 K1 D13
DMI_TX#[0] PEG_RX#[7] PCIENB_RXN7
22 DMI_RXN1 M8 A11
DMI_TX#[1] PEG_RX#[8] PCIENB_RXN6
22 DMI_RXN2 N4 B10
DMI_TX#[2] PEG_RX#[9] PCIENB_RXN5
22 DMI_RXN3 R2 G8
DMI_TX#[3] PEG_RX#[10] PCIENB_RXN4
A8
PEG_RX#[11] PCIENB_RXN3
22 DMI_RXP0 K3 B6
DMI_TX[0] PEG_RX#[12] PCIENB_RXN2
22 DMI_RXP1 M7 H8
DMI_TX[1] PEG_RX#[13] PCIENB_RXN1
22 DMI_RXP2 P4 E5
DMI_TX[2] PEG_RX#[14] PCIENB_RXN0
22 DMI_RXP3 T3 K7 PCIENB_RXP[15:0] 70
DMI_TX[3] PEG_RX#[15]
K22 PCIENB_RXP15
PEG_RX[0] PCIENB_RXP14
22 FDI_TXN[7:0] K19
PEG_RX[1] PCIENB_RXP13
C21
FDI_TXN0 U7 PEG_RX[2] PCIENB_RXP12
C D19 C
FDI_TXN1 W11 FDI0_TX#[0] PEG_RX[3] PCIENB_RXP11
C19
FDI_TXN2 W1 FDI0_TX#[1] PEG_RX[4] PCIENB_RXP10 R2.1 01/09
D16
FDI_TXN3 AA6 FDI0_TX#[2] PEG_RX[5] PCIENB_RXP9
C13

PCI EXPRESS -- GRAPHICS


FDI_TXN4 W6 FDI0_TX#[3] PEG_RX[6] PCIENB_RXP8
D12
FDI_TXN5 V4 FDI1_TX#[0] PEG_RX[7] PCIENB_RXP7
C11
FDI_TXN6 Y2 FDI1_TX#[1] PEG_RX[8] PCIENB_RXP6
C9
FDI1_TX#[2] PEG_RX[9]

Intel(R) FDI
FDI_TXN7 AC9 F8 PCIENB_RXP5
FDI1_TX#[3] PEG_RX[10] PCIENB_RXP4
22 FDI_TXP[7:0] C8
PEG_RX[11] PCIENB_RXP3
C5
FDI_TXP0 U6 PEG_RX[12] PCIENB_RXP2
H6
FDI_TXP1 W10 FDI0_TX[0] PEG_RX[13] PCIENB_RXP1
F6 PCIEG_RXN[15:0] 70
FDI_TXP2 W3 FDI0_TX[1] PEG_RX[14] PCIENB_RXP0
K6
FDI_TXP3 AA7 FDI0_TX[2] PEG_RX[15]
FDI_TXP4 W7 FDI0_TX[3] PCIENB_TXN0 CX0301 0.22UF/10V /DGPU PCIEG_RXN15
G22
FDI_TXP5 T4 FDI1_TX[0] PEG_TX#[0] PCIENB_TXN1 CX0302 0.22UF/10V /DGPU PCIEG_RXN14
C23
FDI_TXP6 AA3 FDI1_TX[1] PEG_TX#[1] PCIENB_TXN2 CX0303 0.22UF/10V /DGPU PCIEG_RXN13
D23
FDI_TXP7 AC8 FDI1_TX[2] PEG_TX#[2] PCIENB_TXN3 CX0304 0.22UF/10V /DGPU PCIEG_RXN12
F21
FDI1_TX[3] PEG_TX#[3] PCIENB_TXN4 CX0305 0.22UF/10V /DGPU PCIEG_RXN11
H19
PEG_TX#[4] PCIENB_TXN5 CX0306 0.22UF/10V /DGPU PCIEG_RXN10
22 FDI_FSYNC0 AA11 C17
FDI0_FSYNC PEG_TX#[5] PCIENB_TXN6 CX0307 0.22UF/10V /DGPU PCIEG_RXN9
22 FDI_FSYNC1 AC12 K15
FDI1_FSYNC PEG_TX#[6] PCIENB_TXN7 CX0308 0.22UF/10V /DGPU PCIEG_RXN8
F17
PEG_TX#[7] PCIENB_TXN8 CX0309 0.22UF/10V /DGPU PCIEG_RXN7
22 FDI_INT U11 F14
FDI_INT PEG_TX#[8] PCIENB_TXN9 CX0310 0.22UF/10V /DGPU PCIEG_RXN6
A15
PEG_TX#[9] PCIENB_TXN10 CX0311 0.22UF/10V /DGPU PCIEG_RXN5
22 FDI_LSYNC0 AA10 J14
FDI0_LSYNC PEG_TX#[10] PCIENB_TXN11 CX0312 0.22UF/10V /DGPU PCIEG_RXN4
22 FDI_LSYNC1 AG8 H13
FDI1_LSYNC PEG_TX#[11] PCIENB_TXN12 CX0313 0.22UF/10V /DGPU PCIEG_RXN3
M10
+VCCP PEG_TX#[12] PCIENB_TXN13 CX0314 0.22UF/10V /DGPU PCIEG_RXN2
F10
PEG_TX#[13] PCIENB_TXN14 CX0315 0.22UF/10V /DGPU PCIEG_RXN1
D9
PEG_TX#[14]
24.9Ohm 2 1% 1 R0302 DP_COMP J4 PCIENB_TXN15 CX0316 0.22UF/10V /DGPU PCIEG_RXN0 PCIEG_RXP[15:0] 70
10KOhm PEG_TX#[15]
1 /LVDS 2 R0303 AF3
1KOhm eDP_COMPIO PCIENB_TXP0 PCIEG_RXP15
1 /eDP 2 R0315 AD2 F22 CX0317 0.22UF/10V /DGPU
eDP_ICOMPO PEG_TX[0] PCIENB_TXP1 CX0318 0.22UF/10V /DGPU PCIEG_RXP14
AG11 A23
eDP_HPD PEG_TX[1] PCIENB_TXP2 CX0319 0.22UF/10V /DGPU PCIEG_RXP13
45 DP_HPD#_PCH D24
PEG_TX[2] PCIENB_TXP3 CX0320 0.22UF/10V /DGPU PCIEG_RXP12
E21
PEG_TX[3] PCIENB_TXP4 CX0321 0.22UF/10V /DGPU PCIEG_RXP11
45 DP_AUXN_PCH AG4 G19
eDP_AUX# PEG_TX[4] PCIENB_TXP5 CX0322 0.22UF/10V /DGPU PCIEG_RXP10
45 DP_AUXP_PCH AF4 B18
eDP_AUX PEG_TX[5] PCIENB_TXP6 CX0323 0.22UF/10V /DGPU PCIEG_RXP9
K17
B PEG_TX[6] B
DP

G17 PCIENB_TXP7 CX0324 0.22UF/10V /DGPU PCIEG_RXP8


PEG_TX[7] PCIENB_TXP8 CX0325 0.22UF/10V /DGPU PCIEG_RXP7
45 DP_TXN0_PCH AC3 E14
eDP_TX#[0] PEG_TX[8] PCIENB_TXP9 CX0326 0.22UF/10V /DGPU PCIEG_RXP6
45 DP_TXN1_PCH AC4 C15
eDP_TX#[1] PEG_TX[9] PCIENB_TXP10 CX0327 0.22UF/10V /DGPU PCIEG_RXP5
AE11 K13
eDP_TX#[2] PEG_TX[10] PCIENB_TXP11 CX0328 0.22UF/10V /DGPU PCIEG_RXP4
AE7 G13
eDP_TX#[3] PEG_TX[11] PCIENB_TXP12 CX0329 0.22UF/10V /DGPU PCIEG_RXP3
K10
PEG_TX[12] PCIENB_TXP13 CX0330 0.22UF/10V /DGPU PCIEG_RXP2
45 DP_TXP0_PCH AC1 G10
eDP_TX[0] PEG_TX[13] PCIENB_TXP14 CX0331 0.22UF/10V /DGPU PCIEG_RXP1
45 DP_TXP1_PCH AA4 D8
eDP_TX[1] PEG_TX[14] PCIENB_TXP15 CX0332 0.22UF/10V /DGPU PCIEG_RXP0
AE10 K4
eDP_TX[2] PEG_TX[15]
AE6
eDP_TX[3]

ES1
01V010000003

A A

Title : CPU(1)_DMI,DP,PEG,FDI
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 3 of 93
5 4 3 2 1
5 4 3 2 1

U0301B +1.5VS_VCCDDQ +1.5VS_VCCDDQ 7


J3 CLK_EXP_P_R 0Ohm 2 1 R0422 +3VS
BCLK CLK_EXP_P 21 +3VS 17,20,21,22,23,24,25,26,27,28,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92
H2 CLK_EXP_N_R 0Ohm 2 1 R0423 CLK_EXP_N 21

CLOCKS
BCLK#

MISC
R0431 1 /LVDS 2 1KOhm +3VSUS +3VSUS 22,24,28,30,60,81,92
25 H_SNB_IVB# F49
PROC_SELECT#
AG3 CLK_DP_P_R RN0401A 1 0Ohm 2 /eDP 10VH40000001
CLK_DP_P 21 +VCCP +VCCP 3,6,7,30,32,57,82
DPLL_REF_CLK
AG1 CLK_DP_N_R RN0401B 3 0Ohm 4 /eDP 10VH40000001
CLK_DP_N 21
T0401 TP_SKTOCC#_R DPLL_REF_CLK#
1 C57 +3V +3V 24,45,57,59,61,91
PROC_DETECT# R0430 1 /LVDS 2 1KOhm +VCCP
N59
BCLK_ITP
N58
BCLK_ITP# CLK_XDP_ITP_P T0420
1
T0402 1 TP_CATERR#_R C49 CLK_XDP_ITP_N 1 T0421
CATERR#

THERMAL
D D
XDP_Debug
25 H_PECI A48
PECI SM_DRAMRST#
AT30 CPUDRAMRST# 5 DDR3 DRAM RESET
5%
+VCCP
62Ohm
2 1
R0404 BF44 SM_RCOMP_0 1 1% 2 System Memory Impedance Compensation
R.10 PU/PD for JTAG signals
H_PROCHOT# H_PROCHOT#_D SM_RCOMP[0]
2 5% 1 C45 BE43 SM_RCOMP_1 R0418 1 1% 2 140Ohm Huron River platform Design Guide 436735 P.88 Table 37.
PROCHOT# SM_RCOMP[1]

DDR3
MISC
56Ohm R0403 BG43 SM_RCOMP_2 R0419 1 1% 2 25.5Ohm
SM_RCOMP[2] R0420 200Ohm
10V240000028
+VCCP
25,32 H_THRMTRIP# D45
THERMTRIP# XDP_TMS R0438 51Ohm
1 2
XDP_TDI R0439 1 2 51Ohm
N53 XDP_PRDY# 1 T0404 XDP_TDO R0441 1 2 51Ohm
PRDY# XDP_PREQ# T0405 XDP_PREQ# R0440 @ 51Ohm
N55 1 1 2
PREQ# @
L56 XDP_TCK 1 T0406
TCK XDP_TMS T0407
L55 1
TMS

PWR MANAGEMENT
J58 XDP_TRST# 1 T0408 Remove XDP interface.
TRST#

JTAG & BPM


R0406
2 1 H_PM_SYNC_R C48 M60 XDP_TDI 1 T0409
22 H_PM_SYNC PM_SYNC TDI
L59 XDP_TDO 1 T0410 XDP_TCK R0443 1 2 51Ohm
NB_R0402_5MIL_SMALL TDO
2 1 XDP_TRST# R0442 1 2 51Ohm
10KOhm R0408 R0407
2 1 H_CPUPWRGD_R B46
25 H_CPUPWRGD UNCOREPWRGOOD
K58 XDP_DBRESET# 1 T0411
NB_R0402_5MIL_SMALL DBR#

2 1 VDDPWRGOOD_R BE45 G58 XDP_BPM0 1 T0412


22 PM_DRAM_PWRGD SM_DRAMPWROK BPM#[0]
130Ohm R0409 E55 XDP_BPM1 1 T0413
BPM#[1] XDP_BPM2 T0414
E59 1
R2.1 BPM#[2] XDP_BPM3 T0415
G55 1
BPM#[3] XDP_BPM4 T0416
G59 1
BUF_CPU_RST# BPM#[4] XDP_BPM5 T0417
24,30,32,33,53,59,70 BUF_PLT_RST# 1 2 D44 H60 1
R0416 1.5KOhm RESET# BPM#[5] XDP_BPM6 T0418
J59 1
BPM#[6] XDP_BPM7 T0419
J61 1
BPM#[7]
1

C R0417 C
750Ohm
2

ES1
01V010000003
R1.0 0119
Sandy Bridge:R0417 = 750 ohm (10V220000093)
Ivy Bridge:R0417 = 680 ohm (10V240000041)

PM_SYS_PWRGD is the power good for +1.5V_VCCDDQ Different from EVEREST


2 1
0Ohm R0460
@
+3VSUS

+1.5VS_VCCDDQ +3VSUS @
1

C0420
1 2 R0453 RB751V-40
@ 8.2KOhm 0.37V/30mA
1

0.1UF/10V 1 2 D0404 PM_PWROK 22,30,92


U0404
2

B B
R0449 5 VCC A 1
200Ohm
1% 1.57 Volt B 2 1@ 2C0413
2

R0451 10V220000034 1UF/6.3V


PM_DRAM_PWRGD 2 1 2 @ 1 4 GND 3 @
Y
+1.05VS_PWRGD 82,92
R0452 Vcc=2~5.5 @
1

NB_R0402_5MIL_SMALL 1.1KOhm
R0450 1%
1KOhm @
1%
2

R2.1

R1.1
80 VR_HOT# 2 1
add S3 power reduction 0Ohm R0461
@

If support S3 power reduction with power good. H_PROCHOT#


1. Mount U0404, D0404, C0413, C0420, R0450, R0452, R0453,
Unmount R0460
2. Change R0449 to 1kohm from 200ohm, change R0409 to 0ohm from 130ohm - Design Guide 1.0 page 106 R1.0 0224
2

Intel Comments C0401 D


3
47PF/50V Q0401
1

@ 2N7002
1 THRO_CPU
THRO_CPU 30
G
S 2

A A

Title : CPU(2)_CLK,MISC,JTAG
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 4 of 93
5 4 3 2 1
5 4 3 2 1

+1.5V +1.5V 16,17,18,57,60,83

U0301D
U0301C
17 M_B_DQ[63:0]
16 M_A_DQ[63:0]
M_B_DQ0 AL4
M_A_DQ0 M_B_DQ1 SB_DQ[0]
AG6 AL1 BA34 M_B_DIM0_CLK_DDR0 17
D
M_A_DQ1 SA_DQ[0] M_B_DQ2 SB_DQ[1] SB_CK[0] D
AJ6 AU36 M_A_DIM0_CLK_DDR0 16 AN3 AY34 M_B_DIM0_CLK_DDR#0 17
M_A_DQ2 AP11 SA_DQ[1] SA_CK[0] M_B_DQ3 SB_DQ[2] SB_CK#[0]
AV36 M_A_DIM0_CLK_DDR#0 16 AR4 AR22 M_B_DIM0_CKE0 17
M_A_DQ3 SA_DQ[2] SA_CK#[0] M_B_DQ4 SB_DQ[3] SB_CKE[0]
AL6 AY26 M_A_DIM0_CKE0 16 AK4
M_A_DQ4 AJ10 SA_DQ[3] SA_CKE[0] M_B_DQ5 SB_DQ[4]
AK3
M_A_DQ5 SA_DQ[4] M_B_DQ6 SB_DQ[5]
AJ8 AN4
M_A_DQ6 SA_DQ[5] M_B_DQ7 SB_DQ[6]
AL8 AR1
M_A_DQ7 SA_DQ[6] M_B_DQ8 SB_DQ[7]
AL7 AU4
M_A_DQ8 AR11 SA_DQ[7] M_B_DQ9 SB_DQ[8]
AT2 BA36 M_B_DIM0_CLK_DDR1 17
M_A_DQ9 SA_DQ[8] T0501 M_B_DQ10 SB_DQ[9] SB_CK[1]
AP6 AT40 1 AV4 BB36 M_B_DIM0_CLK_DDR#1 17
M_A_DQ10 AU6 SA_DQ[9] SA_CK[1] T0502 M_B_DQ11 SB_DQ[10] SB_CK#[1]
AU40 1 BA4 BF27 M_B_DIM0_CKE1 17
M_A_DQ11 AV9 SA_DQ[10] SA_CK#[1] T0503 M_B_DQ12 SB_DQ[11] SB_CKE[1]
BB26 1 AU3
M_A_DQ12 AR6 SA_DQ[11] SA_CKE[1] M_B_DQ13 SB_DQ[12]
AR3
M_A_DQ13 AP8 SA_DQ[12] M_B_DQ14 SB_DQ[13]
AY2
M_A_DQ14 AT13 SA_DQ[13] M_B_DQ15 SB_DQ[14]
BA3
M_A_DQ15 AU13 SA_DQ[14] M_B_DQ16 SB_DQ[15]
BE9
M_A_DQ16 BC7 SA_DQ[15] M_B_DQ17 SB_DQ[16]
BD9 BE41 M_B_DIM0_CS#0 17
M_A_DQ17 BB7 SA_DQ[16] M_B_DQ18 SB_DQ[17] SB_CS#[0]
BB40 M_A_DIM0_CS#0 16 BD13 BE47 M_B_DIM0_CS#1 17
M_A_DQ18 BA13 SA_DQ[17] SA_CS#[0] M_B_DQ19 SB_DQ[18] SB_CS#[1]
BC41 BF12
M_A_DQ19 BB11 SA_DQ[18] SA_CS#[1] M_B_DQ20 SB_DQ[19]
BF8
M_A_DQ20 BA7 SA_DQ[19] M_B_DQ21 SB_DQ[20]
BD10
M_A_DQ21 BA9 SA_DQ[20] M_B_DQ22 SB_DQ[21]
BD14
M_A_DQ22 BB9 SA_DQ[21] M_B_DQ23 SB_DQ[22]
BE13
M_A_DQ23 AY13 SA_DQ[22] M_B_DQ24 SB_DQ[23]
BF16 AT43 M_B_DIM0_ODT0 17
M_A_DQ24 AV14 SA_DQ[23] M_B_DQ25 SB_DQ[24] SB_ODT[0]
AY40 M_A_DIM0_ODT0 16 BE17 BG47 M_B_DIM0_ODT1 17
M_A_DQ25 AR14 SA_DQ[24] SA_ODT[0] M_B_DQ26 SB_DQ[25] SB_ODT[1]
BA41 BE18
M_A_DQ26 AY17 SA_DQ[25] SA_ODT[1] M_B_DQ27 SB_DQ[26]
BE21
M_A_DQ27 AR19 SA_DQ[26] M_B_DQ28 SB_DQ[27]
BE14
M_A_DQ28 BA14 SA_DQ[27] M_B_DQ29 SB_DQ[28]
BG14
M_A_DQ29 AU14 SA_DQ[28] M_B_DQ30 SB_DQ[29]
BG18 M_B_DQS#[7:0] 17
M_A_DQ30 BB14 SA_DQ[29] M_B_DQ31 SB_DQ[30] M_B_DQS#0
M_A_DQS#[7:0] 16 BF19 AL3
M_A_DQ31 BB17 SA_DQ[30] M_A_DQS#0 M_B_DQ32 SB_DQ[31] SB_DQS#[0] M_B_DQS#1
AL11 BD50 AV3
M_A_DQ32 BA45 SA_DQ[31] SA_DQS#[0] M_A_DQS#1 M_B_DQ33 SB_DQ[32] SB_DQS#[1] M_B_DQS#2
AR8 BF48 BG11
M_A_DQ33 AR43 SA_DQ[32] SA_DQS#[1] M_A_DQS#2 M_B_DQ34 SB_DQ[33] SB_DQS#[2] M_B_DQS#3
AV11 BD53 BD17
M_A_DQ34 AW48 SA_DQ[33] SA_DQS#[2] M_A_DQS#3 M_B_DQ35 SB_DQ[34] SB_DQS#[3] M_B_DQS#4
AT17 BF52 BG51
SA_DQ[34] SA_DQS#[3] SB_DQ[35] SB_DQS#[4]

DDR SYSTEM MEMORY B


M_A_DQ35 BC48 AV45 M_A_DQS#4 M_B_DQ36 BD49 BA59 M_B_DQS#5
DDR SYSTEM MEMORY A

M_A_DQ36 BC45 SA_DQ[35] SA_DQS#[4] M_A_DQS#5 M_B_DQ37 SB_DQ[36] SB_DQS#[5] M_B_DQS#6


AY51 BE49 AT60
M_A_DQ37 AR45 SA_DQ[36] SA_DQS#[5] M_A_DQS#6 M_B_DQ38 SB_DQ[37] SB_DQS#[6] M_B_DQS#7
AT55 BD54 AK59
M_A_DQ38 AT48 SA_DQ[37] SA_DQS#[6] M_A_DQS#7 M_B_DQ39 SB_DQ[38] SB_DQS#[7]
C AK55 BE53 C
M_A_DQ39 AY48 SA_DQ[38] SA_DQS#[7] M_B_DQ40 SB_DQ[39]
BF56
M_A_DQ40 BA49 SA_DQ[39] M_B_DQ41 SB_DQ[40]
BE57
M_A_DQ41 AV49 SA_DQ[40] M_B_DQ42 SB_DQ[41]
BC59
M_A_DQ42 BB51 SA_DQ[41] M_B_DQ43 SB_DQ[42]
AY60
M_A_DQ43 AY53 SA_DQ[42] M_B_DQ44 SB_DQ[43]
BE54
M_A_DQ44 BB49 SA_DQ[43] M_B_DQ45 SB_DQ[44]
M_A_DQS[7:0] 16 BG54 M_B_DQS[7:0] 17
M_A_DQ45 AU49 SA_DQ[44] M_A_DQS0 M_B_DQ46 SB_DQ[45] M_B_DQS0
AJ11 BA58 AM2
M_A_DQ46 BA53 SA_DQ[45] SA_DQS[0] M_A_DQS1 M_B_DQ47 SB_DQ[46] SB_DQS[0] M_B_DQS1
AR10 AW59 AV1
M_A_DQ47 BB55 SA_DQ[46] SA_DQS[1] M_A_DQS2 M_B_DQ48 SB_DQ[47] SB_DQS[1] M_B_DQS2
AY11 AW58 BE11
M_A_DQ48 BA55 SA_DQ[47] SA_DQS[2] M_A_DQS3 M_B_DQ49 SB_DQ[48] SB_DQS[2] M_B_DQS3
AU17 AU58 BD18
M_A_DQ49 AV56 SA_DQ[48] SA_DQS[3] M_A_DQS4 M_B_DQ50 SB_DQ[49] SB_DQS[3] M_B_DQS4
AW45 AN61 BE51
M_A_DQ50 AP50 SA_DQ[49] SA_DQS[4] M_A_DQS5 M_B_DQ51 SB_DQ[50] SB_DQS[4] M_B_DQS5
AV51 AN59 BA61
M_A_DQ51 AP53 SA_DQ[50] SA_DQS[5] M_A_DQS6 M_B_DQ52 SB_DQ[51] SB_DQS[5] M_B_DQS6
AT56 AU59 AR59
M_A_DQ52 AV54 SA_DQ[51] SA_DQS[6] M_A_DQS7 M_B_DQ53 SB_DQ[52] SB_DQS[6] M_B_DQS7
AK54 AU61 AK61
M_A_DQ53 AT54 SA_DQ[52] SA_DQS[7] M_B_DQ54 SB_DQ[53] SB_DQS[7]
AN58
M_A_DQ54 AP56 SA_DQ[53] M_B_DQ55 SB_DQ[54]
AR58
M_A_DQ55 AP52 SA_DQ[54] M_B_DQ56 SB_DQ[55]
AK58
M_A_DQ56 AN57 SA_DQ[55] M_B_DQ57 SB_DQ[56]
AL58
M_A_DQ57 AN53 SA_DQ[56] M_B_DQ58 SB_DQ[57]
AG58
M_A_DQ58 AG56 SA_DQ[57] M_B_DQ59 SB_DQ[58]
AG59
M_A_DQ59 AG53 SA_DQ[58] M_B_DQ60 SB_DQ[59]
AM60 M_B_A[15:0] 17
M_A_DQ60 AN55 SA_DQ[59] M_B_DQ61 SB_DQ[60] M_B_A0
M_A_A[15:0] 16 AL59 BF32
M_A_DQ61 AN52 SA_DQ[60] M_A_A0 M_B_DQ62 SB_DQ[61] SB_MA[0] M_B_A1
BG35 AF61 BE33
M_A_DQ62 AG55 SA_DQ[61] SA_MA[0] M_A_A1 M_B_DQ63 SB_DQ[62] SB_MA[1] M_B_A2
BB34 AH60 BD33
M_A_DQ63 AK56 SA_DQ[62] SA_MA[1] M_A_A2 SB_DQ[63] SB_MA[2] M_B_A3
BE35 AU30
SA_DQ[63] SA_MA[2] M_A_A3 SB_MA[3] M_B_A4
BD35 BD30
SA_MA[3] M_A_A4 SB_MA[4] M_B_A5
AT34 AV30
SA_MA[4] M_A_A5 SB_MA[5] M_B_A6
AU34 BG30
SA_MA[5] M_A_A6 SB_MA[6] M_B_A7
BB32 17 M_B_BS0 BG39 BD29
SA_MA[6] M_A_A7 SB_BS[0] SB_MA[7] M_B_A8
16 M_A_BS0 BD37 AT32 17 M_B_BS1 BD42 BE30
SA_BS[0] SA_MA[7] M_A_A8 SB_BS[1] SB_MA[8] M_B_A9
16 M_A_BS1 BF36 AY32 17 M_B_BS2 AT22 BE28
SA_BS[1] SA_MA[8] M_A_A9 SB_BS[2] SB_MA[9] M_B_A10
16 M_A_BS2 BA28 AV32 BD43
SA_BS[2] SA_MA[9] M_A_A10 SB_MA[10] M_B_A11
BE37 AT28
SA_MA[10] M_A_A11 SB_MA[11] M_B_A12
BA30 AV28
SA_MA[11] M_A_A12 SB_MA[12] M_B_A13
BC30 17 M_B_CAS# AV43 BD46
SA_MA[12] M_A_A13 SB_CAS# SB_MA[13] M_B_A14
16 M_A_CAS# BE39 AW41 17 M_B_RAS# BF40 AT26
SA_CAS# SA_MA[13] M_A_A14 SB_RAS# SB_MA[14] M_B_A15
16 M_A_RAS# BD39 AY28 17 M_B_WE# BD45 AU22
B SA_RAS# SA_MA[14] M_A_A15 SB_WE# SB_MA[15] B
16 M_A_WE# AT41 AU26
SA_WE# SA_MA[15]

ES1
ES1 01V010000003
01V010000003

R1.0 S3 circuit: DRAM_RST# to memory should be high during S3


R1.1 add S3 power reduction +1.5V
2

R0507
1KOhm always support S3 PWR Reduction
Remove bypass R
1

Q0501
2N7002

R0508 1 2 1KOhm
2 S

A A
D

16,17 DDR3_DRAMRST# CPUDRAMRST# 4


3

R0508 use 1k ohm


G
1

Design Guide 0.9 p107(436735)


Close to DIMM

9,21,30 DRAMRST_CNTRL_PCH
1

1%
R2.0 12/14 4.99KOhm
1

R0506
C0501 Title : CPU(3)_DDR3
2

0.1UF/10V
2

BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg


Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 5 of 93
5 4 3 2 1
5 4 3 2 1

+VCCP +VCCP 3,4,7,30,32,57,82

+VCORE +VCORE 9,11,80

U0301F

+VCCP
D D

+VCORE AF46
VCCIO34
AG48
VCCIO28

1
AG50
VCCIO27 C0628 C0631 C0632 C0635 C0634 C0636 C0637 C0613
A26 AG51
VCC74 VCCIO26 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
A29 AJ17

2
VCC73 VCCIO23
A31 AJ21
VCC72 VCCIO22
A34 AJ25
VCC71 VCCIO21
A35 AJ43
VCC70 VCCIO20
A38 AJ47
VCC69 VCCIO19
A39 AK50
VCC68 VCCIO18
A42 AK51
VCC67 VCCIO17

1
C26 AL14
VCC66 VCCIO16 C0610 C0609 C0606 C0611 C0607 C0623 C0616 C0614
C27 AL15
VCC65 VCCIO15 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
C32 AL16

2
VCC64 VCCIO14
C34 AL20
VCC63 VCCIO13
C37 AL22
VCC62 VCCIO12 vx_c0603_small vx_c0603_small vx_c0603_small
C39 AL26
VCC61 VCCIO11
C42 AL45
VCC60 VCCIO10

1
D27 AL48
VCC59 VCCIO9 C0618 C0619 C0621 C0620 C0617
D32 AM16
VCC58 VCCIO8 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
D34 AM17

2
VCC57 VCCIO7
D37 AM21
VCC56 VCCIO6 vx_c0603_small vx_c0603_small
D39 AM43
VCC55 VCCIO5
D42 AM47
VCC54 VCCIO4
E26 AN20
VCC53 VCCIO3
E28 AN42
VCC52 VCCIO2
E32 AN45
VCC51 VCCIO1
E34 AN48
VCC50 VCCIO0
E37
VCC49
E38
VCC48
CORE SUPPLY

F25
VCC47
F26
PEG AND DDR

VCC46
F28
VCC45 +VCCP
F32
VCC44
F34
VCC43
F37 AA14
VCC42 VCCIO47
C F38 AA15 C
VCC41 VCCIO46
F42 AB17
VCC40 VCCIO45
1

1
G42 AB20
VCC39 VCCIO44 C0612 C0615 C0608 C0624 C0625 C0626 C0627 C0629 C0630 C0633
H25 AC13
VCC38 VCCIO43 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
H26 AD16
2

2
VCC37 VCCIO42
H28 AD18
VCC36 VCCIO41
H29 AD21
VCC35 VCCIO40
H32 AE14
VCC34 VCCIO39
H34 AE15
VCC33 VCCIO38
H35 AF16
VCC32 VCCIO37 vx_c0603_small vx_c0603_small vx_c0603_small
H37 AF18
VCC31 VCCIO36
H38 AF20
VCC30 VCCIO35
H40 AG15
VCC29 VCCIO33

1
J25 AG16
VCC28 VCCIO32 C0602 C0603 C0605 C0604 C0601
J26 AG17
VCC27 VCCIO31 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
J28 AG20

2
VCC26 VCCIO30
J29 AG21
VCC25 VCCIO29
J32 AJ14
VCC24 VCCIO25
POWER

J34 AJ15 vx_c0603_small vx_c0603_small


VCC23 VCCIO24
J35
VCC22
J37
VCC21
J38
VCC20 +VCCP +3VA
J40
VCC19 R0601
J42
VCC18 +VCCIO_CPU_F
K26 W16 1 2
VCC17 VCCIO49
2

K27 W17
VCC16 VCCIO48 NB_R0603_32MIL_SMALL R0615
K29
VCC15 @
K32 10KOhm
VCC14
K34
VCC13
K35
1

VCC12
K37
VCC11
K39
VCC10 VCCP_SEL
K42 BC22
VCC9 VCCIO_SEL
L25
VCC8
L28
VCC7
L33
VCC6 R2.0 12/19
L36
VCC5
L40
QUIET RAILS

B VCC4 +VCCP B
N26
VCC3
N30 AM25
VCC2 VCCPQE1 +VCCP +VCCP +VCCP +VCCP
N34 AN22 1 2
VCC1 VCCPQE0 R0613 0Ohm
N38
VCC0
1

2
C0622

2
1UF/6.3V R0603 Close to VR R0605 Close to CPU Close to VR R0608
2

Close to CPU 75Ohm 54.9Ohm R0609 130Ohm


1% 1% 130Ohm 1%
1%
2

1
A44 H_CPU_SVIDALRT# 1 5% 2 SP0601
VR_SVID_ALERT# 80

1
VIDALERT# H_CPU_SVIDCLK R0602 43Ohm SP0602
B43 1 2
SVID

VIDSCLK VR_SVID_CLK 80
C44 H_CPU_SVIDDAT 10V240000039 1 2
VIDSOUT VR_SVID_DATA 80

SP0603
NB_R0402_20MIL_SMALL
F43 VCC_SENSE_R 1 2 VCCSENSE
VCCSENSE 80
SENSE LINES

VCC_SENSE VSS_SENSE_R VSSSENSE


G43 1 2 VSSSENSE 80
VSS_SENSE
@ SP0604
R0616 1 10Ohm2 1% +VCCP NB_R0402_20MIL_SMALL

AN16
VCCIO_SENSE +VCCP_SENSE 82
AN17
VSS_SENSE_VCCIO +VSSP_SENSE 82
R0614 1 10Ohm 21%

ES1
01V010000003
A A

Title : CPU(4)_PWR
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg
Size Project Name Rev

WWW.AliSaler.Com 5 4 3 2
C
Date:
JM50
Thursday, August 23, 2012

1
Sheet 6 of 93
3.1
5 4 3 2 1

Decoupling guide from Intel PDDG R0.8


+VGFX_CORE +VGFX_CORE
1uF * 11pcs 1uF * 11pcs +VCCP +VCCP 3,4,6,30,32,57,82
10uF * 6pcs 10uF * 6pcs
+1.5V +1.5V 5,16,17,18,57,60,83
22uF * 6pcs 22uF * 8pcs(power request)
+VCCSA +VCCSA 85

+1.8VS +1.8VS 25,26,57,80,84

Graphics core voltage +VGFX_CORE +VGFX_CORE 9,80

D
+VGFX_CORE Voltage range: 0 - 1.52V +1.5VS +1.5VS 26,53,57,91 D

+V_SM_VREF +V_SM_VREF 83
1

1
C0725 C0727 C0731 C0726 C0732 C0729 C0730 C0728 DDR3 Reference Voltage R1.1
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V +1.5VS_VCCDDQ
2

2
add S3 power reduction
U0301G
+V_SM_REF 10mil

2
R0703
1

AA46 +V_SM_VREF 1KOhm


C0717 C0719 C0722 VAXG21
AB47
1UF/6.3V 1UF/6.3V 1UF/6.3V VAXG20
AB50
2

1
VAXG19 +V_SM_VREF
AB51 AY43
VAXG18 SM_VREF
AB52
VAXG17

2
AB53
VAXG16

1
vx_c0603_small vx_c0603_small vx_c0603_small AB55 R0710 C0794
VAXG15 0.1UF/10V
AB56
VAXG14 1KOhm Processor I/O supply
1

1
AB58

2
C0790 C0791 C0788 C0789 C0787 C0786 AB59
VAXG13
AJ28 voltage for DDR3

1
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V VAXG12 VDDQ25
AC61 AJ33 (DC + AC specification)
2

2
VAXG11 VDDQ24
AD47 AJ36
VAXG10 VDDQ23
AD48 AJ40
vx_c0603_small vx_c0603_small vx_c0603_small VAXG9 VDDQ22 +1.5VS_VCCDDQ +1.5VS
AD50 AL30

- 1.5V RAILS
VAXG8 VDDQ21
AD51 AL34 ICCMAX_VDDQ 5A
VAXG7 VDDQ20 JP0701
AD52
VAXG6 VDDQ19
AL38 MAX:5A
AD53 AL42 2 1
VAXG5 VDDQ18 2 1
1

1
AD55 AM33
C0738 C0739 C0740 C0741 C0742 C0743 C0744 C0745 VAXG4 VDDQ17 @ 3MM_OPEN_5MIL
AD56 AM36
VAXG3 VDDQ16

1
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V AD58 AM40
2

2
VAXG2 VDDQ15 C0704 C0709 C0705 C0706 C0707 C0708 C0713 C0710 C0712 C0711
AD59 AN30
VAXG1 VDDQ14 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
AE46 AN34

2
VAXG0 VDDQ13
N45 AN38

POWER
VAXG55 VDDQ12
P47 AR26
VAXG54 VDDQ11
C P48 AR28 C
VAXG53 VDDQ10
P50 AR30
VAXG52 VDDQ9
P51
VAXG51 VDDQ8
AR32 R1.1
P52 AR34 vx_c0603_small vx_c0603_small vx_c0603_small vx_c0603_small

DDR3
P53
VAXG50 VDDQ7
AR36 add S3 power reduction
VAXG49 VDDQ6

1
P55 AR40
VAXG48 VDDQ5 C0775 C0774 C0772 C0769 C0767 C0765 C0770 C0768 CE0702
P56 AV41
VAXG47 VDDQ4 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 330UF/2V
P61 AW26

2
VAXG46 VDDQ3
T48 BA40
VAXG45 VDDQ2

GRAPHICS
T58 BB28
VAXG44 VDDQ1 vx_c0603_small vx_c0603_small vx_c0603_small vx_c0603_small
T59 BG33
VAXG43 VDDQ0
T61
VAXG42
U46 Chief River
VAXG41
V47
VAXG40
V48 Decoupling guide from Intel (EE)
VAXG39
V50
VAXG38
V51 +1.5VS_VCCDDQ
VAXG37
V52
VAXG36
V53
VAXG35
1uF * 10pcs
V55
V56
VAXG34 10uF * 8pcs
VAXG33
V58
VAXG32 330uF * 1pcs
V59
VAXG31
W50
VAXG30
W51
VAXG29
W52
VAXG28
W53
VAXG27
W55
VAXG26
W56
VAXG25
W61
VAXG24
Y48
VAXG23
Y61
VAXG22
Filtered(BGA Only)
>0 SUSB_EC#
+1.5VS_VCCDDQ
SP0701
QUIET RAILS

NB_R0402_20MIL_SMALL AM28 1 2 +1.5V_VCCDDQ


B VCCDQ1 B
LINES
SENSE

1 2 F45 AN26 R0707 0Ohm


80 VCCGT_SENSE VAXG_SENSE VCCDQ0

1
80 VSSGT_SENSE 1 2 G45
VSSAXG_SENSE C0714
PLL supply voltage SP0702 1UF/6.3V +1.5V_VCCDDQ Power Good

2
(DC + AC specification) NB_R0402_20MIL_SMALL (U0404 pin 4)
+1.8VS
1.8V RAIL

MAX:1.2A +0.75VS
TDC: 1.2A BB3
VCCPLL2
BC1 >100 ns
VCCPLL1
1

BC4
CE0701 C0761 C0764 VCCPLL0
330UF/2V 1UF/6.3V 1UF/6.3V R1.0 0209
2

+VCCSA BC43 1 T0701 Intel Comments


VDDQ_SENSE
MAX:10A BA43 1 T0702
SENSE LINES

VSS_SENSE_VDDQ
vx_c0603_small vx_c0603_small TDC: 6A L17 +VCCP
VCCSA15
L21
VCCSA14
N16
VCCSA13 R2.2, 03/05
N20
VCCSA12
1

2
SA RAIL

N22
vx_c0603_small C0783 C0781 C0792 C0777 C0793 VCCSA11 R0708 R0709
P17
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V VCCSA10
P20 U10 VCCSA_SENSE 85 1KOhm 1KOhm
2

R16
VCCSA9 VCCSA_SENSE
1 @ 2 +VCCSA_SEL0 +VCCSA_SEL1 VCCSA @ @
VCCSA8 R0704 0Ohm
R18 Close to CPU

1
R21
VCCSA7 L L 0.9V VCCSA_SEL0
vx_c0603_small vx_c0603_small VCCSA6
U15
V16
VCCSA5 L H 0.85V VCCSA_SEL1
VCCSA4 VCCSA_SEL0
V17 D48 VCCSA_SEL0 85
V18
VCCSA3 VCCSA_VID[0]
D49 VCCSA_SEL1 H L 0.775V
VCCSA2 VCCSA_VID[1] VCCSA_SEL1 85

2
V21
VCCSA1 H H 0.75V
1

W20 R0701 R0702


C0735 C0736 C0733 C0734 C0737 VCCSA0
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
Chief River 1KOhm 1KOhm
2

1
A A
ES1
01V010000003

Decoupling guide for A14 (EE)


+VCCSA
1uF * 5pcs
10uF * 5pcs
Title : CPU(5)_GFX_PWR
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 7 of 93
5 4 3 2 1
5 4 3 2 1

D D

U0301H U0301I

BG17 M4
VSS8 VSS230
A13 AM38 BG21 M58
VSS299 VSS98 VSS7 VSS226
A17 AM4 BG24 M6
VSS298 VSS105 VSS6 VSS229
A21 AM42 BG28 N1
VSS297 VSS97 VSS5 VSS225
A25 AM45 BG37 N17
VSS296 VSS96 VSS4 VSS224
A28 AM48 BG41 N21
VSS295 VSS95 VSS3 VSS223
A33 AM58 BG45 N25
VSS294 VSS94 VSS2 VSS222
A37 AN1 BG49 N28
VSS293 VSS93 VSS1 VSS221
A40 AN21 BG53 N33
VSS292 VSS92 VSS0 VSS220
A45 AN25 BG9 N36
VSS291 VSS91 VSS10 VSS219
A49 AN28 C29 N40
VSS290 VSS90 VSS288 VSS218
A53 AN33 C35 N43
VSS289 VSS89 VSS287 VSS217
A9 AN36 C40 N47
VSS300 VSS88 VSS286 VSS216
AA1 AN40 D10 N48
VSS177 VSS87 VSS283 VSS215
AA13 AN43 D14 N51
VSS175 VSS86 VSS282 VSS214
AA50 AN47 D18 N52
VSS174 VSS85 VSS281 VSS213
AA51 AN50 D22 N56
VSS173 VSS84 VSS280 VSS212
AA52 AN54 D26 N61
VSS172 VSS83 VSS279 VSS211
AA53 AP10 D29 P14
VSS171 VSS81 VSS278 VSS209
AA55 AP51 D35 P16
VSS170 VSS80 VSS277 VSS208
AA56 AP55 D4 P18
VSS169 VSS79 VSS285 VSS207
AA8 AP7 D40 P21
VSS176 VSS82 VSS276 VSS206
AB16 AR13 D43 P58
AB18
AB21
VSS168
VSS167
VSS166
VSS77
VSS76
VSS75
AR17
AR21
D46
D50
VSS275
VSS274
VSS273
VSS VSS205
VSS204
VSS210
P59
P9
AB48 AR41 D54 R17
VSS165 VSS74 VSS272 VSS202
AB61 AR48 D58 R20
VSS164 VSS73 VSS271 VSS201
C AC10 AR61 D6 R4 C
VSS162 VSS72 VSS284 VSS203
AC14 AR7 E25 R46
VSS161 VSS78 VSS269 VSS200
AC46 AT14 E29 T1
VSS160 VSS70 VSS268 VSS199
AC6 AT19 E3 T47
VSS163 VSS69 VSS270 VSS198
AD17 AT36 E35 T50
VSS158 VSS68 VSS267 VSS197
AD20 AT4 E40 T51
VSS157 VSS71 VSS266 VSS196
AD4 AT45 F13 T52
AD61
AE13
VSS159
VSS156
VSS154
VSS VSS67
VSS66
VSS65
AT52
AT58
F15
F19
VSS265
VSS264
VSS263
VSS195
VSS194
VSS193
T53
T55
AE8 AU1 F29 T56
VSS155 VSS64 VSS262 VSS192
AF1 AU11 F35 U13
VSS153 VSS62 VSS261 VSS190
AF17 AU28 F40 U8
VSS152 VSS61 VSS260 VSS191
AF21 AU32 F55 V20
VSS151 VSS60 VSS259 VSS189
AF47 AU51 G48 V61
VSS150 VSS59 VSS257 VSS188
AF48 AU7 G51 W13
VSS149 VSS63 VSS256 VSS186
AF50 AV17 G6 W15
VSS148 VSS58 VSS258 VSS185
AF51 AV21 G61 W18
VSS147 VSS57 VSS255 VSS184
AF52 AV22 H10 W21
VSS146 VSS56 VSS253 VSS183
AF53 AV34 H14 W46
VSS145 VSS55 VSS252 VSS182
AF55 AV40 H17 W8
VSS144 VSS54 VSS251 VSS187
AF56 AV48 H21 Y4
VSS143 VSS53 VSS250 VSS181
AF58 AV55 H4 Y47
VSS142 VSS52 VSS254 VSS180
AF59 AW13 H53 Y58
VSS141 VSS50 VSS249 VSS179
AG10 AW43 H58 Y59
VSS139 VSS49 VSS248 VSS178
AG14 AW61 J1
VSS138 VSS48 VSS247
AG18 AW7 J49
VSS137 VSS51 VSS246
AG47 AY14 J55
VSS136 VSS45 VSS245
AG52 AY19 K11
VSS135 VSS44 VSS243
AG61 AY30 K21
VSS134 VSS43 VSS242
AG7 AY36 K51 A5
VSS140 VSS42 VSS241 VSS_NCTF13
AH4 AY4 K8 A57
VSS133 VSS47 VSS244 VSS_NCTF12
AH58 AY41 L16 BC61
VSS132 VSS41 VSS240 VSS_NCTF6
AJ13 AY45 L20 BD3
VSS130 VSS40 VSS239 VSS_NCTF5
AJ16 AY49 L22 BD59
VSS129 VSS39 VSS238 VSS_NCTF4

NCTF
AJ20 AY55 L26 BE4
VSS128 VSS38 VSS237 VSS_NCTF3
AJ22 AY58 L30 BE58
VSS127 VSS37 VSS236 VSS_NCTF2
AJ26 AY9 L34 BG5
VSS126 VSS46 VSS235 VSS_NCTF1
AJ30 BA1 L38 BG57
B VSS125 VSS36 VSS234 VSS_NCTF0 B
AJ34 BA11 L43 C3
VSS124 VSS35 VSS233 VSS_NCTF11
AJ38 BA17 L48 C58
VSS123 VSS34 VSS232 VSS_NCTF10
AJ42 BA21 L61 D59
VSS122 VSS33 VSS231 VSS_NCTF9
AJ45 BA26 M11 E1
VSS121 VSS32 VSS228 VSS_NCTF8
AJ48 BA32 M15 E61
VSS120 VSS31 VSS227 VSS_NCTF7
AJ7 BA48
VSS131 VSS30
AK1 BA51
VSS119 VSS29
AK52 BB53
VSS118 VSS28
AL10 BC13
VSS117 VSS26
AL13 BC5
VSS116 VSS27 ES1
AL17 BC57
VSS115 VSS25
AL21 BD12 01V010000003
VSS114 VSS23
AL25 BD16
VSS113 VSS22
AL28 BD19
VSS112 VSS21
AL33 BD23
VSS111 VSS20
AL36 BD27
VSS110 VSS19
AL40 BD32
VSS109 VSS18
AL43 BD36
VSS108 VSS17
AL47 BD40
VSS107 VSS16
AL61 BD44
VSS106 VSS15
AM13 BD48
VSS104 VSS14
AM20 BD52
VSS103 VSS13
AM22 BD56
VSS102 VSS12
AM26 BD8
VSS101 VSS24
AM30 BE5
VSS100 VSS11
AM34 BG13
VSS99 VSS9

ES1
01V010000003

A A

Title : CPU(6)_GND
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 8 of 93
5 4 3 2 1
5 4 3 2 1

CFG strapping information:

CFG[2]: PCIE Static Numbering Lane Reversal- CFG[2] is for the 16x
- 1: (Default) Normal Operation, Lane # definition matches sockect pin map definition
- 0: Lane Numbers Reversed U0301E
Chief River
CFG[4]: Embedded DisplayPort Detection
T0918 1 CFG0 B50 BE7 DDR_WR_VREF01
T0901 CFG1 CFG[0] RSVD7 DDR_WR_VREF02
- 1: (Default) Disabled ; No Physical Display Port attached to Embedded DisplayPort 1 C51
CFG[1] RSVD2
BG7
T0919 1 CFG2 B54
D - 0: Enabled ; An external Display Port device is connected to the Embedded Display Port T0902 1 CFG3 D53
CFG[2] D

T0923 CFG4 CFG[3]


1 A51 N42
T0920 CFG5 CFG[4] RSVD31
1 C53 L42
T0921 CFG6 CFG[5] RSVD36
CFG[6:5]: PCI Express Port Bifurcation Straps 1 C55
CFG[6] RSVD35
L45
T0922 1 CFG7 H49 L47
T0903 CFG8 CFG[7] RSVD34
- 11 : (Default) x 1 6 1 A55
CFG[8]
T0904 1 CFG9 H51
- 10 : x 8,x8 T0905 1 CFG10 K49
CFG[9]
M13
CFG[10] RSVD33
- 01 : Reserved T0906 1 CFG11 K53
CFG[11] RSVD32
M14
T0907 1 CFG12 F53 U14
- 00 : x8,x4,x4 T0908 1 CFG13 G53
CFG[12] RSVD28
W14
T0909 CFG14 CFG[13] RSVD27
1 L51 P13
T0910 CFG15 CFG[14] RSVD29
CFG[7]: PEG DEFER TRAINING 1 F51
CFG[15]
T0911 1 CFG16 D52
T0912 CFG17 CFG[16]
- 1: (Default) PEG Train immediately following xxRESETB de assertion 1 L53
CFG[17] RSVD21
AT49
K24
- 0: PEG Wait for BIOS training RSVD38

RESERVED
T0913 1 VCC_VAL_SENSE H43
T0914 VSS_VAL_SENSE VCC_VAL_SENSE
1 K43 AH2
VSS_VAL_SENSE RSVD25
AG13
RSVD26
AM14
Joyoung R1.0 T0915 VAXG_VAL_SENSE RSVD24
1 H45 AM15
CFG2 1% T0916 VSSAXG_VAL_SENSE VAXG_VAL_SENSE RSVD23
1 2 1 K45
R0902 /DGPU 1KOhm VSSAXG_VAL_SENSE
N50
T0917 VCC_DIE_SENSE RSVD30
1 F48
CFG4 1% VCC_DIE_SENSE
1 2
R0903 /eDP 1KOhm
H48
R2.1 01/09 RSVD39
K48
CFG5 1% RSVD37
1 2 A4
R0904 @ 1KOhm DC_TEST_A4
C4
DC_TEST_C4
BA19 D3
RSVD15 DC_TEST_D3
AV19 D1
CFG6 1% RSVD18 DC_TEST_D1
1 2 AT21 A58
R0905 @ 1KOhm RSVD22 DC_TEST_A58
BB21 A59
RSVD12 DC_TEST_A59
BB19 C59
RSVD13 DC_TEST_C59
C AY21 A61 C
CFG7 1% RSVD17 DC_TEST_A61
1 2 BA22 C61
R0906 @ 1KOhm RSVD14 DC_TEST_C61
AY22 D61
RSVD16 DC_TEST_D61
AU19 BD61
RSVD20 DC_TEST_BD61
AU21 BE61
RSVD19 DC_TEST_BE61
BD21 BE59
RSVD11 DC_TEST_BE59
BD22 BG61
RSVD10 DC_TEST_BG61
BD25 BG59
RSVD9 DC_TEST_BG59
BD26 BG58
RSVD8 DC_TEST_BG58
BG22 BG4
RSVD1 DC_TEST_BG4
BE22 BG3
RSVD6 DC_TEST_BG3
BG26 BE3
RSVD0 DC_TEST_BE3
BE26 BG1
RSVD4 DC_TEST_BG1
BF23 BE1
RSVD3 DC_TEST_BE1
BE24 BD1
RSVD5 DC_TEST_BD1

ES1
01V010000003

For iFDIM testing


PROCESSOR DRIVEN Vref PATH WAS STUFFED BY DEFAULT: R0912~ R0917 close to pin < 1 inch R1.1 0512
B B

R0907 1 2 0Ohm
+VGFX_CORE +VCORE

@ Q0901A

1
UM6K1N
DDR_WR_VREF01 1 6 R0912 R0915
DIMM0_VREF_DQ 18
@ 49.9Ohm @ 49.9Ohm
1 R0909

1% 1%
2

2
VAXG_VAL_SENSE VCC_VAL_SENSE
2

2
1%
R0913 R0916
@ 100Ohm @ 100Ohm
2

1% 1%
1KOhm

1
VSSAXG_VAL_SENSE VSS_VAL_SENSE
1

1
5,21,30 DRAMRST_CNTRL_PCH R0914 R0917
@ 49.9Ohm @ 49.9Ohm
1% 1%
R0908 1 2 0Ohm
2

2
@ Q0901B
UM6K1N
DDR_WR_VREF02 4 3 DIMM1_VREF_DQ 18
1 R910

A A
1%
2
1KOhm

Title : CPU(7)_RSVD
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 9 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

Check Connector
CPU XDP connector

PCH XDP connector

B B

A A

Title : CPU_PCH_XDP
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg
Size Project Name Rev

WWW.AliSaler.Com
5 4 3 2
Custom
Date:
JM50
Thursday, August 23, 2012
1
Sheet 10 of 93
3.1
5 4 3 2 1

D D

+VCORE

vx_c0402_small vx_c0402_small vx_c0402_small vx_c0402_small vx_c0402_small


Chief River

1
C1101 C1102 C1103 C1104 C1105 C1106 C1107 C1108 C1109 C1110
Decoupling guide from Intel PDDG R0.8 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V

2
+VCORE 2.2uF * 16 pcs vx_c0402_small vx_c0402_small vx_c0402_small vx_c0402_small vx_c0402_small
22uF * 12 pcs
vx_c0402_small vx_c0402_small vx_c0402_small

1
C1111 C1112 C1113 C1114 C1115 C1117

2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V

2
vx_c0402_small vx_c0402_small vx_c0402_small

Chief River

+VCORE 2.2uF * 16 pcs


C 22uF * 18 pcs (power request) C
1

1
C1136 C1137 C1138 C1139 C1140 C1141 C1142 C1143 C1153
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
2

2
1

1
C1144 C1145 C1146 C1147 C1148 C1149 C1150 C1151 C1152
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
2

2
B B

A A

Title : CPU DECOUPLING


BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 11 of 93
5 4 3 2 1
5 4 3 2 1

Memory Down CH A
R1.1 11/04
+1.5V U1602 U1603
+1.5V 5,17,18,57,60,83
M_A_A0 K3 A1 M_A_A0 K3 A1 U1604
U1601 M_A_A1 A0 VSS1 M_A_A1 A0 VSS1 M_A_A0
L7 A8 L7 A8 K3 A1
M_A_A0 M_A_A2 A1 VSS2 M_A_A2 A1 VSS2 M_A_A1 A0 VSS1
+0.75VS +0.75VS 17,57,83 K3 A1 L3 B1 L3 B1 L7 A8
M_A_A1 A0 VSS1 M_A_A3 A2 VSS3 M_A_A3 A2 VSS3 M_A_A2 A1 VSS2
L7 A8 K2 D8 K2 D8 L3 B1
M_A_A2 A1 VSS2 M_A_A4 A3 VSS4 M_A_A4 A3 VSS4 M_A_A3 A2 VSS3
L3 B1 L8 F2 L8 F2 K2 D8
M_A_A3 A2 VSS3 M_A_A5 A4 VSS5 M_A_A5 A4 VSS5 M_A_A4 A3 VSS4
17,18 +V_VREF_DQ_DIMM0 FBA_VREF_DQ0_MD K2 D8 L2 F8 L2 F8 L8 F2
M_A_A4 A3 VSS4 M_A_A6 A5 VSS6 M_A_A6 A5 VSS6 M_A_A5 A4 VSS5
L8 F2 M8 J1 M8 J1 L2 F8
M_A_A5 A4 VSS5 M_A_A7 A6 VSS7 M_A_A7 A6 VSS7 M_A_A6 A5 VSS6
17,18 +V_VREF_CA_DIMM0 FBA_VREF_CA0_MD L2 F8 M2 J9 M2 J9 M8 J1
M_A_A6 A5 VSS6 M_A_A8 A7 VSS8 M_A_A8 A7 VSS8 M_A_A7 A6 VSS7
M8 J1 N8 L1 N8 L1 M2 J9
M_A_A7 A6 VSS7 M_A_A9 A8 VSS9 M_A_A9 A8 VSS9 M_A_A8 A7 VSS8
5 M_A_DQ[63:0] M2 J9 M3 L9 M3 L9 N8 L1
M_A_A8 A7 VSS8 M_A_A10 A9 VSS10 M_A_A10 A9 VSS10 M_A_A9 A8 VSS9
N8 L1 H7 N1 H7 N1 M3 L9
M_A_A9 A8 VSS9 M_A_A11 A10/AP VSS11 M_A_A11 A10/AP VSS11 M_A_A10 A9 VSS10
M3 L9 M7 N9 M7 N9 H7 N1
D M_A_A10 A9 VSS10 M_A_A12 A11 VSS12 M_A_A12 A11 VSS12 M_A_A11 A10/AP VSS11 D
5 M_A_DQS[7:0] H7 N1 K7 K7 M7 N9
M_A_A11 A10/AP VSS11 M_A_A13 A12/BC# M_A_A13 A12/BC# M_A_A12 A11 VSS12
M7 N9 N3 B2 N3 B2 K7
M_A_A12 A11 VSS12 M_A_A14 A13 VSSQ1 M_A_A14 A13 VSSQ1 M_A_A13 A12/BC#
5 M_A_DQS#[7:0] K7 N7 B8 N7 B8 N3 B2
M_A_A13 A12/BC# M_A_A15 A14 VSSQ2 M_A_A15 A14 VSSQ2 M_A_A14 A13 VSSQ1
N3 B2 J7 C9 J7 C9 N7 B8
M_A_A14 A13 VSSQ1 A15 VSSQ3 A15 VSSQ3 M_A_A15 A14 VSSQ2
N7 B8 D1 D1 J7 C9
M_A_A15 A14 VSSQ2 M_A_BS0 VSSQ4 M_A_BS0 VSSQ4 A15 VSSQ3
5 M_A_BS[2:0] J7 C9 J2 D9 J2 D9 D1
A15 VSSQ3 M_A_BS1 BA0 VSSQ5 M_A_BS1 BA0 VSSQ5 M_A_BS0 VSSQ4
5 M_A_A[15:0] D1 K8 K8 J2 D9
M_A_BS0 VSSQ4 M_A_BS2 BA1 M_A_BS2 BA1 M_A_BS1 BA0 VSSQ5
J2 D9 J3 A2 +1.5V J3 A2 +1.5V K8
M_A_BS1 BA0 VSSQ5 BA2 VDD1 BA2 VDD1 M_A_BS2 BA1
K8 A9 A9 J3 A2 +1.5V
M_A_BS2 BA1 M_A_DQ23 VDD2 M_A_DQ8 VDD2 BA2 VDD1
J3 A2 +1.5V B3 D7 B3 D7 A9
BA2 VDD1 M_A_DQ21 DQ0 VDD3 M_A_DQ14 DQ0 VDD3 M_A_DQ30 VDD2
A9 C7 G2 C7 G2 B3 D7
M_A_DQ3 VDD2 M_A_DQ22 DQ1 VDD4 M_A_DQ13 DQ1 VDD4 M_A_DQ27 DQ0 VDD3
B3 D7 C2 G8 C2 G8 C7 G2
M_A_DQ0 DQ0 VDD3 M_A_DQ20 DQ2 VDD5 M_A_DQ11 DQ2 VDD5 M_A_DQ28 DQ1 VDD4
C7 G2 C8 K1 C8 K1 C2 G8
M_A_DQ5 DQ1 VDD4 M_A_DQ19 DQ3 VDD6 M_A_DQ15 DQ3 VDD6 M_A_DQ29 DQ2 VDD5
C2 G8 E3 K9 E3 K9 C8 K1
DQ2 VDD5 DQ4 VDD7 DQ4 VDD7 DQ3 VDD6
M_A_DQ4 C8
DQ3 VDD6
K1 2 M_A_DQ17 E8
DQ5 VDD8
M1 M_A_DQ10 E8
DQ5 VDD8
M1 M_A_DQ25 E3
DQ4 VDD7
K9
C1631 0 M_A_DQ6
M_A_DQ2
E3
DQ4 VDD7
K9 M_A_DQ18
M_A_DQ16
D2
DQ6 VDD9
M9 1 M_A_DQ9
M_A_DQ12
D2
DQ6 VDD9
M9 M_A_DQ26
M_A_DQ24
E8
DQ5 VDD8
M1

2 1 M_A_DQ7
E8
D2
DQ5 VDD8
M1
M9
E7
DQ7
B9
E7
DQ7
B9
3 M_A_DQ31
D2
E7
DQ6 VDD9
M9

M_A_DQ1 DQ6 VDD9 M_A_DQS2 VDDQ1 M_A_DQS1 VDDQ1 DQ7


E7 C3 C1 C3 C1 B9
DQ7 M_A_DQS#2 DQS VDDQ2 M_A_DQS#1 DQS VDDQ2 M_A_DQS3 VDDQ1
1.6PF/16V B9 D3 E2 D3 E2 C3 C1
M_A_DQS0 VDDQ1 DQS# VDDQ3 DQS# VDDQ3 M_A_DQS#3 DQS VDDQ2
C3 C1 E9 E9 D3 E2
1AV200000069 M_A_DQS#0 DQS VDDQ2 M_A_CAS# VDDQ4 M_A_CAS# VDDQ4 DQS# VDDQ3
D3 E2 G3 G3 E9
DQS# VDDQ3 M_A_DIM0_CLK_DDR0 CAS# M_A_DIM0_CLK_DDR0 CAS# M_A_CAS# VDDQ4
E9 F7 A3 F7 A3 G3
M_A_CAS# VDDQ4 M_A_DIM0_CLK_DDR#0 CK NC1 M_A_DIM0_CLK_DDR#0 CK NC1 M_A_DIM0_CLK_DDR0 CAS#
5 M_A_CAS# G3 G7 F1 G7 F1 F7 A3
M_A_DIM0_CLK_DDR0 CAS# M_A_DIM0_CKE0 CK# NC2 M_A_DIM0_CKE0 CK# NC2 M_A_DIM0_CLK_DDR#0 CK NC1
5 M_A_DIM0_CLK_DDR0 F7 A3 G9 F9 G9 F9 G7 F1
M_A_DIM0_CLK_DDR#0 CK NC1 M_A_DIM0_CS#0 CKE NC3 M_A_DIM0_CS#0 CKE NC3 M_A_DIM0_CKE0 CK# NC2
5 M_A_DIM0_CLK_DDR#0 G7 F1 H2 H1 H2 H1 G9 F9
M_A_DIM0_CKE0 CK# NC2 M_A_RAS# CS# NC4 M_A_RAS# CS# NC4 M_A_DIM0_CS#0 CKE NC3
5 M_A_DIM0_CKE0 G9 F9 F3 H9 F3 H9 H2 H1
M_A_DIM0_CS#0 CKE NC3 RAS# NC5 RAS# NC5 M_A_RAS# CS# NC4
5 M_A_DIM0_CS#0 H2 H1 F3 H9
M_A_RAS# CS# NC4 DDR3_DRAMRST# FBA_VREF_CA0_MD DDR3_DRAMRST# FBA_VREF_CA0_MD RAS# NC5
5 M_A_RAS# F3 H9 N2 J8 N2 J8
RAS# NC5 M_A_W E# RESET# VREFCA FBA_VREF_DQ0_MD M_A_W E# RESET# VREFCA FBA_VREF_DQ0_MD DDR3_DRAMRST# FBA_VREF_CA0_MD
H3 E1 H3 E1 N2 J8
DDR3_DRAMRST# FBA_VREF_CA0_MD WE# VREFDQ WE# VREFDQ M_A_WE# RESET# VREFCA FBA_VREF_DQ0_MD
5,17 DDR3_DRAMRST# N2 J8 H3 E1
Near Memory Controller M_A_W E# RESET# VREFCA FBA_VREF_DQ0_MD M_A_DIM0_ODT0 M_A_DIM0_ODT0 WE# VREFDQ
5 M_A_W E# H3 E1 G1 B7 G1 B7
WE# VREFDQ ODT DM/TDQS ODT DM/TDQS M_A_DIM0_ODT0
H8 A7 H8 A7 G1 B7
M_A_DIM0_ODT0 ZQ NU/TDQS# ZQ NU/TDQS# ODT DM/TDQS
5 M_A_DIM0_ODT0 G1 B7 H8 A7
ODT DM/TDQS ZQ NU/TDQS#

1
H8 A7
ZQ NU/TDQS#

1
R1602 R1603
1

Follow design guide 460452 / 2.6.14 240Ohm EDJ4208BASE-DJ-F 240Ohm EDJ4208BASE-DJ-F R1604
R1601 03V150000026 03V150000026 240Ohm EDJ4208BASE-DJ-F
240Ohm EDJ4208BASE-DJ-F 03V150000026

2
03V150000026

2
2

U1605 U1607
M_A_A0 K3 A1 U1606 M_A_A0 K3 A1 U1608
C M_A_A1 A0 VSS1 M_A_A0 M_A_A1 A0 VSS1 M_A_A0 C
L7 A8 K3 A1 L7 A8 K3 A1
M_A_A2 A1 VSS2 M_A_A1 A0 VSS1 M_A_A2 A1 VSS2 M_A_A1 A0 VSS1
L3 B1 L7 A8 L3 B1 L7 A8
M_A_A3 A2 VSS3 M_A_A2 A1 VSS2 M_A_A3 A2 VSS3 M_A_A2 A1 VSS2
K2 D8 L3 B1 K2 D8 L3 B1
M_A_A4 A3 VSS4 M_A_A3 A2 VSS3 M_A_A4 A3 VSS4 M_A_A3 A2 VSS3
L8 F2 K2 D8 L8 F2 K2 D8
M_A_A5 A4 VSS5 M_A_A4 A3 VSS4 M_A_A5 A4 VSS5 M_A_A4 A3 VSS4
L2 F8 L8 F2 L2 F8 L8 F2
M_A_A6 A5 VSS6 M_A_A5 A4 VSS5 M_A_A6 A5 VSS6 M_A_A5 A4 VSS5
M8 J1 L2 F8 M8 J1 L2 F8
M_A_A7 A6 VSS7 M_A_A6 A5 VSS6 M_A_A7 A6 VSS7 M_A_A6 A5 VSS6
M2 J9 M8 J1 M2 J9 M8 J1
M_A_A8 A7 VSS8 M_A_A7 A6 VSS7 M_A_A8 A7 VSS8 M_A_A7 A6 VSS7
N8 L1 M2 J9 N8 L1 M2 J9
M_A_A9 A8 VSS9 M_A_A8 A7 VSS8 M_A_A9 A8 VSS9 M_A_A8 A7 VSS8
M3 L9 N8 L1 M3 L9 N8 L1
M_A_A10 A9 VSS10 M_A_A9 A8 VSS9 M_A_A10 A9 VSS10 M_A_A9 A8 VSS9
H7 N1 M3 L9 H7 N1 M3 L9
M_A_A11 A10/AP VSS11 M_A_A10 A9 VSS10 M_A_A11 A10/AP VSS11 M_A_A10 A9 VSS10
M7 N9 H7 N1 M7 N9 H7 N1
M_A_A12 A11 VSS12 M_A_A11 A10/AP VSS11 M_A_A12 A11 VSS12 M_A_A11 A10/AP VSS11
K7 M7 N9 K7 M7 N9
M_A_A13 A12/BC# M_A_A12 A11 VSS12 M_A_A13 A12/BC# M_A_A12 A11 VSS12
N3 B2 K7 N3 B2 K7
M_A_A14 A13 VSSQ1 M_A_A13 A12/BC# M_A_A14 A13 VSSQ1 M_A_A13 A12/BC#
N7 B8 N3 B2 N7 B8 N3 B2
M_A_A15 A14 VSSQ2 M_A_A14 A13 VSSQ1 M_A_A15 A14 VSSQ2 M_A_A14 A13 VSSQ1
J7 C9 N7 B8 J7 C9 N7 B8
A15 VSSQ3 M_A_A15 A14 VSSQ2 A15 VSSQ3 M_A_A15 A14 VSSQ2
D1 J7 C9 D1 J7 C9
M_A_BS0 VSSQ4 A15 VSSQ3 M_A_BS0 VSSQ4 A15 VSSQ3
J2 D9 D1 J2 D9 D1
M_A_BS1 BA0 VSSQ5 M_A_BS0 VSSQ4 M_A_BS1 BA0 VSSQ5 M_A_BS0 VSSQ4
K8 J2 D9 K8 J2 D9
M_A_BS2 BA1 M_A_BS1 BA0 VSSQ5 M_A_BS2 BA1 M_A_BS1 BA0 VSSQ5
J3 A2 +1.5V K8 J3 A2 +1.5V K8
BA2 VDD1 M_A_BS2 BA1 BA2 VDD1 M_A_BS2 BA1
A9 J3 A2 +1.5V A9 J3 A2 +1.5V
M_A_DQ33 VDD2 BA2 VDD1 M_A_DQ44 VDD2 BA2 VDD1
B3 D7 A9 B3 D7 A9
M_A_DQ32 DQ0 VDD3 M_A_DQ50 VDD2 M_A_DQ45 DQ0 VDD3 M_A_DQ63 VDD2
C7 G2 B3 D7 C7 G2 B3 D7
M_A_DQ35 DQ1 VDD4 M_A_DQ49 DQ0 VDD3 M_A_DQ40 DQ1 VDD4 M_A_DQ57 DQ0 VDD3
C2 G8 C7 G2 C2 G8 C7 G2
M_A_DQ39 DQ2 VDD5 M_A_DQ54 DQ1 VDD4 M_A_DQ47 DQ2 VDD5 M_A_DQ56 DQ1 VDD4
C8 K1 C2 G8 C8 K1 C2 G8
M_A_DQ34 DQ3 VDD6 M_A_DQ52 DQ2 VDD5 M_A_DQ46 DQ3 VDD6 M_A_DQ61 DQ2 VDD5
E3 K9 C8 K1 E3 K9 C8 K1
M_A_DQ37 DQ4 VDD7 M_A_DQ51 DQ3 VDD6 M_A_DQ41 DQ4 VDD7 M_A_DQ62 DQ3 VDD6
E8 M1 E3 K9 E8 M1 E3 K9
M_A_DQ38 DQ5 VDD8 M_A_DQ48 DQ4 VDD7 M_A_DQ42 DQ5 VDD8 M_A_DQ60 DQ4 VDD7
4 M_A_DQ36
D2
E7
DQ6 VDD9
M9 6 M_A_DQ55
E8
D2
DQ5 VDD8
M1
M9
5 M_A_DQ43
D2
E7
DQ6 VDD9
M9
M_A_DQ58
E8
D2
DQ5 VDD8
M1
M9
DQ7 M_A_DQ53 DQ6 VDD9 DQ7 M_A_DQ59 DQ6 VDD9
M_A_DQS4 C3
VDDQ1
B9
C1
E7
DQ7
B9 M_A_DQS5 C3
VDDQ1
B9
C1
7 E7
DQ7
B9
M_A_DQS#4 DQS VDDQ2 M_A_DQS6 VDDQ1 M_A_DQS#5 DQS VDDQ2 M_A_DQS7 VDDQ1
D3 E2 C3 C1 D3 E2 C3 C1
DQS# VDDQ3 M_A_DQS#6 DQS VDDQ2 DQS# VDDQ3 M_A_DQS#7 DQS VDDQ2
E9 D3 E2 E9 D3 E2
M_A_CAS# VDDQ4 DQS# VDDQ3 M_A_CAS# VDDQ4 DQS# VDDQ3
G3 E9 G3 E9
M_A_DIM0_CLK_DDR0 CAS# M_A_CAS# VDDQ4 M_A_DIM0_CLK_DDR0 CAS# M_A_CAS# VDDQ4
F7 A3 G3 F7 A3 G3
M_A_DIM0_CLK_DDR#0 CK NC1 M_A_DIM0_CLK_DDR0 CAS# M_A_DIM0_CLK_DDR#0 CK NC1 M_A_DIM0_CLK_DDR0 CAS#
G7 F1 F7 A3 G7 F1 F7 A3
M_A_DIM0_CKE0 CK# NC2 M_A_DIM0_CLK_DDR#0 CK NC1 M_A_DIM0_CKE0 CK# NC2 M_A_DIM0_CLK_DDR#0 CK NC1
G9 F9 G7 F1 G9 F9 G7 F1
M_A_DIM0_CS#0 CKE NC3 M_A_DIM0_CKE0 CK# NC2 M_A_DIM0_CS#0 CKE NC3 M_A_DIM0_CKE0 CK# NC2
H2 H1 G9 F9 H2 H1 G9 F9
M_A_RAS# CS# NC4 M_A_DIM0_CS#0 CKE NC3 M_A_RAS# CS# NC4 M_A_DIM0_CS#0 CKE NC3
F3 H9 H2 H1 F3 H9 H2 H1
RAS# NC5 M_A_RAS# CS# NC4 RAS# NC5 M_A_RAS# CS# NC4
F3 H9 F3 H9
DDR3_DRAMRST# FBA_VREF_CA0_MD RAS# NC5 DDR3_DRAMRST# FBA_VREF_CA0_MD RAS# NC5
N2 J8 N2 J8
M_A_W E# RESET# VREFCA FBA_VREF_DQ0_MD DDR3_DRAMRST# FBA_VREF_CA0_MD M_A_W E# RESET# VREFCA FBA_VREF_DQ0_MD DDR3_DRAMRST# FBA_VREF_CA0_MD
H3 E1 N2 J8 H3 E1 N2 J8
WE# VREFDQ M_A_W E# RESET# VREFCA FBA_VREF_DQ0_MD WE# VREFDQ M_A_WE# RESET# VREFCA FBA_VREF_DQ0_MD
H3 E1 H3 E1
M_A_DIM0_ODT0 WE# VREFDQ M_A_DIM0_ODT0 WE# VREFDQ
G1 B7 G1 B7
ODT DM/TDQS M_A_DIM0_ODT0 ODT DM/TDQS M_A_DIM0_ODT0
H8 A7 G1 B7 H8 A7 G1 B7
ZQ NU/TDQS# ODT DM/TDQS ZQ NU/TDQS# ODT DM/TDQS
H8 A7 H8 A7
ZQ NU/TDQS# ZQ NU/TDQS#
1

1
R1605 R1606 R1607
240Ohm EDJ4208BASE-DJ-F 240Ohm 240Ohm EDJ4208BASE-DJ-F R1608
03V150000026 EDJ4208BASE-DJ-F 03V150000026 240Ohm EDJ4208BASE-DJ-F
03V150000026 03V150000026
2

2
B B

2
+0.75VS

M_A_DIM0_ODT0 1 RN1601A
36Ohm 2
M_A_WE# 3 RN1601B
36Ohm 4
M_A_RAS# 5 RN1601C
36Ohm 6
M_A_CAS# 7 RN1601D
36Ohm 8

M_A_DIM0_CKE0 1 RN1602A
36Ohm 2
M_A_A10 3 RN1602B
36Ohm 4
M_A_A15 5 RN1602C
36Ohm 6
Place each cap close to each VrefDQ or VrefCA Dram Ball M_A_DIM0_CS#0 7 RN1602D
36Ohm 8

M_A_BS2 1 RN1603A
36Ohm 2
FBA_VREF_CA0_MD M_A_A0 3 RN1603B
+1.5V 36Ohm 4
M_A_A7 5 RN1603C
36Ohm 6
Layout Note: Place these caps near SO DIMM 0 M_A_BS0 7 RN1603D
36Ohm 8
1

C1642 C1643 C1644 C1645 C1646 C1647 C1648 C1649 M_A_A14 1 RN1604A
36Ohm 2
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V M_A_A13 3 RN1604B
36Ohm 4
2

2
1

M_A_DIM0_CLK_DDR0 M_A_A9 5 RN1604C


36Ohm 6
C1620 C1621 C1622 C1623 C1624 C1625 M_A_A2 7 RN1604D
36Ohm 8
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2

R1613 M_A_A5 1 RN1605A


36Ohm 2
@ 3 RN1605B
30OHM 36Ohm 4
M_A_A1 5 RN1605C
10V220000217 +0.75VS 36Ohm 6
FBA_VREF_DQ0_MD M_A_A3 7 RN1605D
36Ohm 8
1

+1.5V
M_A_A11 1 RN1606A
36Ohm 2
1

Layout Note: Place these caps near SODIMM 0 2 M_A_A4 3 36Ohm 4


RN1606B

1
C1656 C1657 C1650 C1651 C1652 C1653 C1655 C1654 R1614 C1628 M_A_A6 5 RN1606C
A 36Ohm 6 A
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V C1613 C1614 C1630 C1629 C1615 C1616 C1617 C1618 C1619 M_A_A8 7 RN1606D
30OHM 0.1UF/16V 36Ohm 8
2

1
1

10V220000217 0.1UF/10V0.1UF/10V1UF/6.3V 1UF/6.3V 0.1UF/10V 0.1UF/10V0.1UF/10V 0.1UF/10V 0.1UF/10V

2
C1601 C1602 C1603 C1604 C1605 C1606 C1607 C1608 M_A_A12 1 RN1607A
36Ohm 2
1

0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V M_A_BS1 3 RN1607B
36Ohm 4
2

M_A_DIM0_CLK_DDR#0 5 RN1607C
36Ohm 6
7 RN1607D
36Ohm 8
GND
place close to balls

Title : DDR3(1)_SO-DIMM0
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg
Size Project Name Rev
D JM50 3.1
Date: Thursday, August 23, 2012 Sheet 16 of 93
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

+1.5V +0.75VS
+1.5V +1.5V 5,16,18,57,60,83 +1.5V
Layout Note: Place these caps near SO DIMM 1

1
+0.75VS +0.75VS 16,57,83 +
CE1703

1
+3VS +3VS 20,21,22,23,24,25,26,27,28,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92 220UF/4V
@ C1709 C1710 C1711 C1712 C1713 C1718 C1716 C1717 C1719 C1730

2
+V_VREF_CA_DIMM1 +V_VREF_CA_DIMM1 16,18 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
@ @ @ @ @ @
+V_VREF_DQ_DIMM1 +V_VREF_DQ_DIMM1 16,18

D D

+1.5V +1.5V
5 M_B_A[15:0] M_B_DQ[63:0] 5
J1701A J1701B
M_B_A0 M_B_DQ1
M_B_A1
98
97
A0 DQ0
5
7 M_B_DQ5
0~7 75
81
VDD1 VDD2
76
82
A1 DQ1 VDD3 VDD4

1
M_B_A2 96 15 M_B_DQ7 87 88
M_B_A3 A2 DQ2 M_B_DQ2 C1705 C1706 VDD5 VDD6 C1707 C1708
95 17 93 94
M_B_A4 A3 DQ3 M_B_DQ4 0.1UF/16V 0.1UF/16V VDD7 VDD8 0.1UF/16V 0.1UF/16V
92 4 99 100

2
M_B_A5 A4 DQ4 M_B_DQ0 VDD9 VDD10
91 6 105 106
M_B_A6 A5 DQ5 M_B_DQ6 VDD11 VDD12
M_B_A7
90
86
A6 0 DQ6
16
18 M_B_DQ3
111
117
VDD13 VDD14
112
118
M_B_A8 A7 DQ7 M_B_DQ8 VDD15 VDD16
M_B_A9
89
85
A8 DQ8
21
23 M_B_DQ12
8~15 Layout Note: Place these caps near SO DIMM 1 123
VDD17 VDD18
124

M_B_A10 A9 DQ9 M_B_DQ10


107 33
M_B_A11 A10/AP DQ10 M_B_DQ15
84 35 2 3
M_B_A12 A11 DQ11 M_B_DQ9 VSS1 VSS2
83 22 8 9
M_B_A13 A12/BC# DQ12 M_B_DQ13 VSS3 VSS4
119 24 13 14
M_B_A14 A13 DQ13 M_B_DQ11 VSS5 VSS6
M_B_A15
80
A14 1 DQ14
34
M_B_DQ14
19
VSS7 VSS8
20
78
A15 DQ15
36
39 M_B_DQ16
16~23 25
31
VSS9 VSS10
26
32
DQ16 M_B_DQ20 VSS11 VSS12
41 37 38
DQ17 M_B_DQ21 VSS13 VSS14
5 M_B_DIM0_CLK_DDR1 102 51 43 44
CK1 DQ18 M_B_DQ17 VSS15 VSS16
5 M_B_DIM0_CLK_DDR#1 104 53 48 49
M_B_DIM0_CLK_DDR0 CK1# DQ19 M_B_DQ23 VSS17 VSS18
5 M_B_DIM0_CLK_DDR0 101 40 54 55
CK0 DQ20 VSS19 VSS20
1

@ 103 42 M_B_DQ22 60 61
5 M_B_DIM0_CLK_DDR#0 CK0# DQ21 VSS21 VSS22
1

M_B_DQ19
C1720 150Ohm 2 DQ22
50
M_B_DQ18
65
VSS23 VSS24
66

10PF/50V R1707 5 M_B_DIM0_CS#1 121


114
S1# DQ23
52
57 M_B_DQ25
24~31 71
127
VSS25 VSS26
72
128
5 M_B_DIM0_CS#0
2

M_B_DIM0_CLK_DDR#0 @ S0# DQ24 M_B_DQ28 VSS27 VSS28


59 133 134
2

DQ25 M_B_DQ30 VSS29 VSS30


5 M_B_DIM0_ODT1 120 67 138 139
ODT1 DQ26 M_B_DQ26 VSS31 VSS32
C
5 M_B_DIM0_ODT0 116 69 144 145 C
M_B_DIM0_CLK_DDR1 ODT0 DQ27 M_B_DQ29 VSS33 VSS34
56 150 151
DQ28 VSS35 VSS36
1

@ 113 58 M_B_DQ24 155 156


5 M_B_WE# WE# DQ29 VSS37 VSS38
1

M_B_DQ27
C1721 150Ohm 5 M_B_RAS# 110
RAS# 3 DQ30
68
M_B_DQ31
161
VSS39 VSS40
162

10PF/50V R1708 5 M_B_CAS# 115


CAS# DQ31
70
129 M_B_DQ32
32~39 167
172
VSS41 VSS42
168
173
2

M_B_DIM0_CLK_DDR#1 @ DQ32 M_B_DQ33 VSS43 VSS44


5 M_B_BS2 79 131 178 179
2

BA2 DQ33 M_B_DQ38 VSS45 VSS46


5 M_B_BS1 108 141 184 185
BA1 DQ34 M_B_DQ34 VSS47 VSS48
5 M_B_BS0 109 143 189 190
BA0 DQ35 M_B_DQ36 VSS49 VSS50
PLACE CLOSE TO SODIMM 74
DQ36
130
132 M_B_DQ37
195
VSS51 VSS52
196
5 M_B_DIM0_CKE1 CKE1 DQ37 M_B_DQ39
5 M_B_DIM0_CKE0 73
CKE0 4 DQ38
140
142 M_B_DQ35 T1701 1 PM_EXTTS#0_DIM_B 198
GND1
207
208
R1709 1 DQ39 M_B_DQ44 EVENT# GND2
+3VS 210KOhm 201 147 40~47 125
SP1703 2 SA1 DQ40 M_B_DQ40 TEST
SMBus Slave Address: A4H 1 197 149 Reserve 205
SA0 DQ41 M_B_DQ46 NP_NC1
157 77 206
DQ42 M_B_DQ41 NC1 NP_NC2
take care if can't boot or S3 issue DQ43
159 122
NC2
M_B_DQS7 188 146 M_B_DQ42 203 +0.75VS
5 M_B_DQS[7:0] DQS7 DQ44 +V_VREF_CA_DIMM1 VTT1
M_B_DQS#7 M_B_DQ45
5 M_B_DQS#[7:0]
M_B_DQS6
186
171
DQS#7 5 DQ45
148
158 M_B_DQ47 VTT2
204
+3VS
M_B_DQS#6 DQS6 DQ46 M_B_DQ43
169 160 126
M_B_DQS5 DQS#6 DQ47 M_B_DQ53 VREFCA
M_B_DQS#5
154
152
DQS5 DQ48
163
165 M_B_DQ52
48~55 1
VREFDQ VDDSPD
199
DQS#5 DQ49

1
M_B_DQS4 137 175 M_B_DQ55
M_B_DQS#4 DQS4 DQ50 M_B_DQ54 C1724 C1723 C1715 C1714
135 177
M_B_DQS3 DQS#4 DQ51 M_B_DQ49 0.1UF/16V 0.1UF/16V
64 164 2.2UF/6.3V 2.2UF/6.3V

2
M_B_DQS#3 DQS3 DQ52 M_B_DQ48 @ @
62 166
M_B_DQS2 DQS#3 DQ53 M_B_DQ50
M_B_DQS#2
47
45
DQS2 6 DQ54
174
176 M_B_DQ51
M_B_DQS1 DQS#2 DQ55 M_B_DQ63 +V_VREF_DQ_DIMM1
M_B_DQS#1
29
27
DQS1 DQ56
181
183 M_B_DQ61
56~63 Frank
M_B_DQS0 DQS#1 DQ57 M_B_DQ57
12 191 20110513 VREFCA and VREFDQ need to separate
M_B_DQS#0 DQS0 DQ58 M_B_DQ59
10 193 It follow EVEREST and Intel spec.
DQS#0 DQ59

1
180 M_B_DQ60
DQ60 M_B_DQ56 C1722 C1725
187 182
DM7 DQ61 M_B_DQ58 0.1UF/16V
170 7 192 2.2UF/6.3V

2
DM6 DQ62 M_B_DQ62 @
153 194
DM5 DQ63
DM should connect to GND directly 136
B DM4 B
Design Guide 1.0 P.88 (436735) 63
DM3
46
DM2
28
DM1
11
DM0

28,53,59 SMB_CLK_S
SP1701 2 1 R0402 SMB_CLK_S_CHB 202 30 DDR3_DRAMRST# 5,16
SCL RESET#
28,53,59 SMB_DAT_S
SP1702 2 1 R0402 SMB_DAT_S_CHB 200
SDA
DDR3_DIMM_204P DDR3_DIMM_204P
12V02GBRM000 12V02GBRM000

H:5.2mm

A A

Title : DDR3(2)_SO-DIMM1
PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 17 of 93
5 4 3 2 1
5 4 3 2 1

+1.5V +1.5V 5,16,17,57,60,83

DDR3 Vref +V_VREF_CA_DIMM0 +V_VREF_CA_DIMM0 16,17

+V_VREF_DQ_DIMM0 +V_VREF_DQ_DIMM0 16,17

M1: Fixed SO-DIMM VREF_DQ +1.5V +V_VREF_DDR3


+V_VREF_CA_DIMM0

2
D D

R1811 +V_VREF_CA_DIMM1
+3V +3V 24,45,57,59,61,91
1KOhm
+5VSUS +5VSUS 51,57,59,91

1
+5VA +5VA 37,60,81,91

1
C1803 R1813
0.1UF/16V 1KOhm
For DDR3_VREF command & address.

2
R1814

2
0Ohm
+1.5V

2
Default M1 R1812
1KOhm
+V_VREF_DQ_DIMM0

1
+V_VREF_DQ_DIMM1

1
R1815 C1804
1KOhm 0.1UF/16V

2
R1.0 1231

2
R1805 1 @ 2 0Ohm
9 DIMM0_VREF_DQ

R1806 1 @ 2 0Ohm
9 DIMM1_VREF_DQ
C C

M3
M3: Processor Generated SO-DIMM VREFDQ
– New Requirement

If support M3 :
1. Mount R1802,R1803,R1805,R1806,R1810,R1811,C1802
2. Un mount R1801,R1804

B B

A A

Title : DDR3(3)_CA/DQ Voltage


BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 18 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

R1.4--2

Title : VID Controller


PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 19 of 93
5 4 3 2 1
5 4 3 2 1

+3VA
RTC battery
PR2.1
T2030 1 R1.0
+VCC_RTC
+VCC_RTC +VCC_RTC 22,27 Delete
D2002 +RTCBAT
1
3 +RTC_BAT +3VA +3VA 6,26,27,30,31,57,59,60,81,88,93
+RTCBAT R2001 1KOhm 2
+3VS +3VS 17,21,22,23,24,25,26,27,28,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

1
59,60 +RTCBAT 1V/0.2A C2003
+3VSUS_ORG +3VSUS_ORG 21,22,24,25,26,27,33
1UF/10V

2
D +VTT_PCH_VCCIO +VTT_PCH_VCCIO 26,27 D
GND

Request by CSC
for CMOS clear
+VCC_RTC RTCRST# RC delay function
should be 18ms~25ms C2001 SP2005
5%
CMOS Settings JRST2001
2 1 2 1RTC_X1_C 1 2
R2003 20KOhm Clear CMOS Shunt GND 15PF/50V

1
Open
1

1
Keep CMOS (Default) X2001
JRST2001 2 32.768KHZ R2002
1
1

C2004 10MOhm
2

SGL_JUMP GND 3
1UF/10V U2001A
@
2

2
RTC_X1 A20 C38 LPC_AD0 30,44,59

4
RTCX1 FWH0/LAD0
A38

LPC
FWH1/LAD1 LPC_AD1 30,44,59
T2015 2 1 RTC_X2 C20 B37 LPC_AD2 30,44,59
GND GND C2002 15PF/50V RTCX2 FWH2/LAD2
1 C37 LPC_AD3 30,44,59
GND
T2011 RTC_RST# FWH3/LAD3
D20
RTCRST#
1 D36 LPC_FRAME# 30,44,59
5% 1 T2012 SRTC_RST# FWH4/LFRAME#
2 G22
R2004 20KOhm SRTCRST# SNN_PCH_DRQ#0 T2032
1 E36 1 R1.0

RTC
SM_INTRUDER# LDRQ0# SNN_LPC_DRQ#1 T2033
K22 K36 1
INTRUDER# LDRQ1#/GPIO23
1

+VCC_RTC 330KOhm 2 1% 1 R2006 PCH_INTVRMEN C17 V5 Serial Interrupt Request INT_SERIRQ 30,44,59
INTVRMEN SERIRQ
2

JRST2002 INTVRMEN: Integrated SUS 1.05V VRM Enables 20110718 Frank C2006 @ 33PF/50V
1
1

R2005 C2005 Low: Enable External VRs add C2006 for EMI request GND 1 2
2

SGL_JUMP High:Enable Internal VRs AM3 SATA_RXN0 51


1MOhm 1UF/10V SP2009 ACZ_BCLK SATA0RXN
@ 36 ACZ_BCLK_AUD 1 2 N34 AM1 SATA_RXP0 51
2

HDA_BCLK SATA0RXP

SATA 6G
AP7 SATA_TXN0 51 HDD1
1

PCH_INTVRMEN R2030 1 @ ACZ_SYNC SATA0TXN


2 200KOhm 36 ACZ_SYNC_AUD SP2008 1 2 L34 AP5 SATA_TXP0 51
1% HDA_SYNC SATA0TXP
C 36 SB_SPKR T10 AM10 SATA_RXN1 53 C
GND GND SPKR SATA1RXN
AM8 SATA_RXP1 53
GND SP2010 ACZ_RST# SATA1RXP
36,37 ACZ_RST#_AUD 1 2 K34
HDA_RST# SATA1TXN
AP11 SATA_TXN1 53 HDD2
AP10 SATA_TXP1 53
SATA1TXP

TPM Settings JRST2002 36 ACZ_SDIN0_AUD E34 AD7 SATA_RXN2 51


HDA_SDIN0 SATA2RXN
AD5 SATA_RXP2 51
SATA2RXP
Clear ME RTC Shunt Remove TP G34
HDA_SDIN1 SATA2TXN
AH5 SATA_TXN2 51 ODD
AH4 SATA_TXP2 51
Registers T2021 1 ACZ_SDIN2_AUD C34
SATA2TXP

IHDA
HDA_SDIN2
Keep ME RTC Open SATA3RXN
AB8
T2022 1 ACZ_SDIN3_AUD A34 AB10 mSATA
Registers (Default) HDA_SDIN3 SATA3RXP
AF3
R1.1 10/31 IOAC SATA3TXN
AF1
SP2011 ACZ_SDOUT SATA3TXP
36 ACZ_SDOUT_AUD 1 2 A36

SATA
HDA_SDO
R2050 near R2008 Y7
T2001 SATA4RXN
Intel 1.5 Design Guide, page 260 Y5
HDA_DOCK_EN# SATA4RXP
1 C36 AD3
HDA_DOCK_EN#/GPIO33 SATA4TXN
AD1
T2002 CARDREADER_RESET SATA4TXP
1 N32
HDA_DOCK_RST#/GPIO13 R1.0
Y3
SATA5RXN
Y1
SATA5RXP
AB3
T2004 PCH_JTAG_TCK_BUF SATA5TXN
1 J3 AB1
JTAG_TCK SATA5TXP
T2005 1 PCH_JTAG_TMS H7 Y11

JTAG
JTAG_TMS SATAICOMPO
isolate schematic for ACZ _SYNC and SDOUT follow EIH31 T2006 1 PCH_JTAG_TDI K5 Y10 SATA_COMP R2007 1 1% 2 37.4Ohm +VTT_PCH_VCCIO
JTAG_TDI SATAICOMPI
T2007 1 PCH_JTAG_TDO H1
JTAG_TDO
AB12
SATA3RCOMPO
AB13 SATA3_COMP R2047 1 1% 2 49.9Ohm +VTT_PCH_VCCIO
SATA3COMPI

28 SPI_CLK T3 AH1 RBIAS_SATA3 R2048 1 1% 2 750Ohm GND


SPI_CLK SATA3RBIAS

28 SPI_CS#0 Y14
B SPI_CS0# B
1 2 +3VS
SPI_CS#1 T1 R2025 10KOhm

SPI
28 SPI_CS#1 SPI_CS1#
P3 SATA_LED#
SATALED#
28 SPI_SI V4 V14 SATA0GP 1 T2034
SPI_MOSI SATA0GP/GPIO21
28 SPI_SO U3 P1 BBS_BIT0 24
SPI_MISO SATA1GP/GPIO19
R1.1 11/04
COUGAR_POINT_ES1
02V000000001

R1.0
For JTAG to pull high and low.

Remove JTAG schematic


Strap information: Pull High +3VS

SB_SPKR: No reboot strap SB_SPKR R2020 1 @ 2 1KOhm +3VS


Low: Disable (Default) INT_SERIRQ 1 2
High:Enable R2026 10KOhm

SATA0GP 1 2
R2027 10KOhm
ACZ_SDOUT: ACZ_SDOUT R2034 1 @ 2 1KOhm +3VSUS_ORG
1.Flash descriptor security:
Sampled Low: in effect.
Sampled High: override

2.ACZ_SDOUTwhich sample high on the rising edge of PWROK


Will also disable Intel ME.

A A

ACZ_SYNC: On Die PLL VR voltage selector


Low: 1.8V (Default) ACZ_SYNC R2036 1 2 1KOhm +3VSUS_ORG
High: 1.5V
note : CRB has no strap VCCVRAM use +1.5VS in mobile
Hrron River Platform Schematic Design Checklist
(438390 page 48)

Title : PCH(1)_SATA,IHDA,RTC,LPC
PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 20 of 93
5 4 3 2 1
5 4 3 2 1

Frank
0513_Add USB3.0 and Card Reader PCIE and CLKRQ
+3VS +3VS 17,20,22,23,24,25,26,27,28,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92
Frank +VTT_PCH_ORG +VTT_PCH_ORG 22,26,27
0517_Add 3G PCIE and CLKRQ in Port3.
+3VSUS_ORG +3VSUS_ORG 20,22,24,25,26,27,33

U2001B CLK_BUF_CPYCLK_N RN2108B


Joyoung R1.0 3 10KOhm 4
CLK_BUF_CPYCLK_P 1 RN2108A
10KOhm 2
59 PCIE_RXN1_CR BG34
PERn1 EXT_SCI#
59 PCIE_RXP1_CR BJ34 E12 EXT_SCI# 30,59
D
C2112 PCIE_TXN1_CR_C PERp1 SMBALERT#/GPIO11 CLK_BUF_EXP_N D
59 PCIE_TXN1_CR 1 2 0.1UF/16V AV32 3 10KOhm 4 RN2109B
C2114 PCIE_TXP1_CR_C PETn1 SCL_3A CLK_BUF_EXP_P
59 PCIE_TXP1_CR 1 2 0.1UF/16V AU32 H14 SCL_3A 28 1 10KOhm 2 RN2109A
PETp1 SMBCLK CLK_BUF_DOT96_N RN2110B
3 10KOhm 4
BE34 C9 SDA_3A SDA_3A 28 CLK_BUF_DOT96_P 1 2 RN2110A
53 PCIE_RXN2_WLAN PERn2 SMBDATA 10KOhm
BF34 CLK_BUF_CKSSCD_N 3 4 RN2111B
53 PCIE_RXP2_WLAN PERp2 10KOhm
53 PCIE_TXN2_WLAN C2103 1 2 0.1UF/16V PCIE_TXN2_WLAN_C BB32 R2.0 12/14 CLK_BUF_CKSSCD_P 1 2 RN2111A
PETn2 10KOhm
C2104 1 2 0.1UF/16V PCIE_TXP2_WLAN_C AY32

SMBUS
53 PCIE_TXP2_WLAN PETp2
A12 DRAMRST_CNTRL_PCH_R 1/NON_DS3 2 CLK_BUF_REF14 R2116 1 2 10KOhm
SML0ALERT#/GPIO60 DRAMRST_CNTRL_PCH 5,9,30
BG36 R2161 0Ohm
53 PCIE_RXN3_mSATA PERn3
BJ36 C8 SML0_CLK 1 T2133
53 PCIE_RXP3_mSATA PERp3 SML0CLK
53 PCIE_TXN3_mSATA AV34 CLOCK TERMINATION for FCIM
PETn3 SML0_DAT T2134 GND
53 PCIE_TXP3_mSATA AU34 G12 1 Default power-on mode is ICC.
PETp3 SML0DATA

33 PCIE_RXN4_GLAN BF36
PERn4
33 PCIE_RXP4_GLAN BE36
PERp4 R1.0 +3VSUS_ORG
33 PCIE_TXN4_GLAN C2110 1 2 0.1UF/16V PCIE_TXN4_GLAN_C AY34 C13 SML1ALERT#
C2111 PCIE_TXP4_GLAN_C PETn4 SML1ALERT#/PCHHOT#/GPIO74
33 PCIE_TXP4_GLAN 1 2 0.1UF/16V BB34
PETp4 SML1_CLK
E14 SML1_CLK 28

PCI-E*
SML1CLK/GPIO58
T2101 1 BG37
PERn5
To EC
R1.1 T2102 1 BH37 M16 SML1_DAT SML1_DAT 28 EXT_SCI# R2117 1 2 10KOhm
T2108 PCIE_TXN5_CR_C PERp5 SML1DATA/GPIO75
1 AY36
remove /niAMT remark T2109 1 PCIE_TXP5_CR_C BB36
PETn5 SCL_3A RN2103B 4 3 2.2KOhm
PETp5
T2104 1 BJ38 SDA_3A RN2103A 2 1 2.2KOhm
T2105 PERn6 R2.0 12/20
1 BG38

Controller
T2106 PCIE_TXN6_USB30_C PERp6 R2.0 12/14
1 AU36 M7
T2107 PCIE_TXP6_USB30_C PETn6 CL_CLK1 DRAMRST_CNTRL_PCH_R R2120 1 @
1 AV36 R1.1 2 10KOhm
PETp6

Link
BG40 T11 S3 RAM reset CTRL
PERn7 CL_DATA1 SML0_CLK RN2104B
BJ40 3 2.2KOhm 4
PERp7
AY40
PETn7 SML0_DAT RN2104A
BB40 P10 1 2.2KOhm 2
PETp7 CL_RST1#
BE38 SML1_CLK 1 RN2105A
PERn8 2.2KOhm 2
BC38
PERp8 SML1_DAT RN2105B
AW38 3 2.2KOhm 4
PETn8
AY38
PETp8 SML1ALERT# R2125 1 @
C 2 10KOhm **UNSTUFF** C
M10 CLK_REQ_PEG_A# CLKREQ_PEG# 70
PEG_A_CLKRQ#/GPIO47
Y40
CLKOUT_PCIE0N 100MHz NB_R0402_20MIL_SMALL
Y39
CLKOUT_PCIE0P CLK_PCIE_PEG#_PCH_L R2103 2
AB37 1 CLK_PCIE_PEG#_PCH 70
CLKOUT_PEG_A_N

CLOCKS
CLK_REQ0# J2 100MHz AB38 CLK_PCIE_PEG_PCH_L R2104 2 1
PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P CLK_PCIE_PEG_PCH 70
NB_R0402_20MIL_SMALL
SP2112 1 2 AB49 AV22
59 CLK_PCIE_CR# CLKOUT_PCIE1N 100MHz 100MHz CLKOUT_DMI_N CLK_EXP_N 4
SP2114 1 2 AB47 AU22
59 CLK_PCIE_CR CLKOUT_PCIE1P CLKOUT_DMI_P CLK_EXP_P 4

59 CLK_REQ_CR# SP2110 1 2 CLK_REQ1# M1


PCIECLKRQ1#/GPIO18 CLK_DP_N
AM12 CLK_DP_N 4
120MHz CLKOUT_DP_N AM13 CLK_DP_P
CLKOUT_DP_P CLK_DP_P 4
SP2101 1 2 CLK_PCH_SRC2_N AA48
53 CLK_PCIE_WLAN#_PCH CLKOUT_PCIE2N 100MHz
53 CLK_PCIE_WLAN_PCH SP2102 1 2 CLK_PCH_SRC2_P AA47
CLKOUT_PCIE2P CLK_BUF_EXP_N
BF18
SP2103 CLK_REQ2# 100MHz CLKIN_DMI_N CLK_BUF_EXP_P
53 CLK_REQ1_WLAN# 1 2 V10 BE18
PCIECLKRQ2#/GPIO20 CLKIN_DMI_P

SP2117 1 2 CLK_PCH_SRC3_N Y37 BJ30 CLK_BUF_CPYCLK_N


Joyoung R1.0 PCH CLKREQ Setting:
53 CLK_PCIE_mSATA#_PCH CLKOUT_PCIE3N CLKIN_GND1_N
53 CLK_PCIE_mSATA_PCH SP2119 1 2 CLK_PCH_SRC3_P Y36
CLKOUT_PCIE3P
100MHz
CLKIN_GND1_P
BG30 CLK_BUF_CPYCLK_P modify CLK_REQ Not connected to device.
R1.0 0118 +3VSUS_ORG
53 CLK_REQ3_mSATA#
R2101 1 2 0Ohm /NON_mSATA CLK_REQ3# A8
PCIECLKRQ3#/GPIO25 CLK_BUF_DOT96_N
G24 25-MHz is required in:
COUGAR_POINT_ES1 96MHz CLKIN_DOT_96N E24 CLK_BUF_DOT96_P 1. FCIM
SP2107 1 CLK_PCH_SRC4_N CLKIN_DOT_96P
33 CLK_PCIE_LAN# 2 Y43 2. BTM for PCH Display Clock gereration
SP2108 1 CLK_PCH_SRC4_P CLKOUT_PCIE4N 100MHz
33 CLK_PCIE_LAN 2 Y45 in Integrated Graphics platforms
CLKOUT_PCIE4P CLK_BUF_CKSSCD_N
AK7
SP2109 1 2 CLK_REQ4# L12 100MHz CLKIN_SATA_N AK5 CLK_BUF_CKSSCD_P CLK_REQ0# R2150 1 @ 2 10KOhm **UNSTUFF**
33 CLK_REQ_LAN# PCIECLKRQ4#/GPIO26 CLKIN_SATA_P
CLK_REQ5# R2139 1 @ 2 10KOhm **UNSTUFF**
T2117 1 CLK_PCH_SRC5_N V45 14.31818MHz K45 CLK_BUF_REF14 C2101
T2119 CLK_PCH_SRC5_P CLKOUT_PCIE5N 100MHz REFCLK14IN CLK_REQ7# RN2107B
1 V46 1 2 GND 3 10KOhm 4
CLKOUT_PCIE5P

R2142

3
CLK_REQ5# L14 33MHz H45 10PF/50V CLK_REQ_PEG_B# 1 RN2107A
PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK CLK_PCI_FB 24 10KOhm 2

2
4 CLK_REQ6# R2143 1 @ 2 10KOhm **UNSTUFF**
B B
AB42 V47 XTAL25_IN
CLKOUT_PEG_B_N 100MHz XTAL25_IN XTAL25_OUT
AB40 V49 2 GND
CLKOUT_PEG_B_P XTAL25_OUT X2103
CLK_REQ_PEG_B# E6 25MHZ

1
PEG_B_CLKRQ#/GPIO56

1MOhm

1
Y47 XCLK_COMP R2106 1 2 90.9Ohm +VCCDIFFCLKN SP2111 C2102
T2114 CLK_PCH_SRC6_N XCLK_RCOMP XTAL25_OUT_C
1 V40 1 2 1 2 GND Connected to device.
T2115 CLK_PCH_SRC6_P CLKOUT_PCIE6N 100MHz
1 V42 Default : Clock free run. (PD 10K).
CLKOUT_PCIE6P 10PF/50V +3VS
Reserver 10K PU for power saving purpose.
T2116 1 CLK_REQ6# T13 Eric Fang to Alan Chien on 11/15/2010
PCIECLKRQ6#/GPIO45
V38 K43 SYSRAM00
CLKOUT_PCIE7N 100MHz CLKOUTFLEX0/GPIO64
FLEX CLOCKS

V37 CLK_REQ1# R2133 1 2 10KOhm


CLKOUT_PCIE7P SYSRAM01
F47
CLK_REQ7# CLKOUTFLEX1/GPIO65 CLK_REQ2# R2128
K12 1 2 10KOhm
PCIECLKRQ7#/GPIO46 SYSRAM02
H47
CLKOUTFLEX2/GPIO66
AK14
CLKOUT_ITPXDP_N 100MHz SYSRAM03 +3VSUS_ORG
Remove XDP. AK13 K49
CLKOUT_ITPXDP_P CLKOUTFLEX3/GPIO67
R2.0
CLK_REQ3# R2151 1 2 10KOhm
02V000000001 Modify RAM Strap PIN
CLK_REQ4# R2135 1 2 10KOhm
R2.0 12/15 +3VS +3VS +3VS +3VS

Joyoung R2.0 CLK_REQ_PEG_A# R2140 1 2 10KOhm


add GPIO Table for on board RAM Strap.
1

R2144 R2152 R2154 R2156


On Board RAM Setting 10KOhm 10KOhm 10KOhm 10KOhm CLK_REQ_PEG_A# R2141 1 @ 2 10KOhm
@ /2G /E /M\1600
CLK_REQ3# R2148 1 @ 2 10KOhm
GPIO67 GPIO66 GPIO65 GPIO64 On Board RAM Setting
2

SYSRAM00
SYSRAM01
0000 No on board RAM SYSRAM02 CLK_REQ4# R2146 1 @ 2 10KOhm
SYSRAM03
0001 Micron 1333MHz 4GB CLK_REQ1# R2138 1 @ 2 10KOhm
1

A
0010 Elpida 1333MHz 4GB R2149 R2153 R2155 R2157 CLK_REQ2# R2145 @
A
1 2 10KOhm
0110 Elpida 1333MHz 2GB 10KOhm 10KOhm
/4G
10KOhm
/M\H
10KOhm
/E\H
0101 Micron 1333MHz 2GB
2

GND
0100 Hynix 1333MHz 2GB
XXXX TBD
GND GND GND GND
1000 Common Definition 1333MHz 4GB
Title : PCH(2)_PCIE,CLK,SMB,PEG
1001 Common Definition 1600MHz 4GB
PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg
0111 Elpida 1600MHz 2GB Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 21 of 93
5 4 3 2 1
5 4 3 2 1

+3VSUS_ORG +3VSUS_ORG 20,21,24,25,26,27,33

+3VS +3VS 17,20,21,23,24,25,26,27,28,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+VTT_PCH_ORG +VTT_PCH_ORG 26,27


U2001C
+3VA +3VA 6,20,26,27,30,31,57,59,60,81,88,93

3 DMI_RXN0 BC24 BJ14 FDI_TXN0 3 +VCC_RTC +VCC_RTC 20,27


DMI0RXN FDI_RXN0
3 DMI_RXN1 BE20 AY14 FDI_TXN1 3
DMI1RXN FDI_RXN1
3 DMI_RXN2 BG18 BE14 FDI_TXN2 3 +3VSUS +3VSUS 4,24,28,30,60,81,92
DMI2RXN FDI_RXN2
3 DMI_RXN3 BG20 BH13 FDI_TXN3 3
DMI3RXN FDI_RXN3
BC12 FDI_TXN4 3 +5VSUS +5VSUS 51,57,59,91
FDI_RXN4
3 DMI_RXP0 BE24 BJ12 FDI_TXN5 3
DMI0RXP FDI_RXN5
3 DMI_RXP1 BC20 BG10 FDI_TXN6 3 +12VSUS +12VSUS 28,51,81,91
DMI1RXP FDI_RXN6
3 DMI_RXP2 BJ18 BG9 FDI_TXN7 3
DMI2RXP FDI_RXN7
3 DMI_RXP3 BJ20
DMI3RXP
BG14 FDI_TXP0 3
D FDI_RXP0 D
3 DMI_TXN0 AW24 BB14 FDI_TXP1 3
DMI0TXN FDI_RXP1
3 DMI_TXN1 AW20 BF14 FDI_TXP2 3
DMI1TXN FDI_RXP2
3 DMI_TXN2 BB18 BG13 FDI_TXP3 3
DMI2TXN FDI_RXP3
AV18 BE12

DMI
FDI
3 DMI_TXN3 DMI3TXN FDI_RXP4 FDI_TXP4 3
BG12 FDI_TXP5 3
FDI_RXP5
3 DMI_TXP0 AY24 BJ10 FDI_TXP6 3
DMI0TXP FDI_RXP6
3 DMI_TXP1 AY20 BH9 FDI_TXP7 3
DMI1TXP FDI_RXP7
3 DMI_TXP2 AY18
DMI2TXP
3 DMI_TXP3 AU18
DMI3TXP
AW16 FDI_INT 3
FDI_INT
BJ24 AV12 FDI_FSYNC0 3
DMI_ZCOMP FDI_FSYNC0

+VTT_PCH_ORG R2201 2 1% 1 49.9Ohm DMI_COMP_R BG25 BC10 FDI_FSYNC1 3


DMI_IRCOMP FDI_FSYNC1

GND R2202 2 1% 1 750Ohm RBIAS_CPY BH21 AV14 FDI_LSYNC0 3


DMI2RBIAS FDI_LSYNC0
BB10 FDI_LSYNC1 3
FDI_LSYNC1

R2215 1 @ 2 200KOhm 1% GND DSWODVREN - On Die DSW VR Enable


A18 DSWODVREN R2214 1 2 200KOhm 1% +VCC_RTC HIGH - Enabled(DEFAULT) ; LOW-Disabled
R2244 /DS3 1 0Ohm R1.1 DS3 10/31 DSWVRMEN
Remove SUSACK#. 30 SUSACK# 2

System Power Management


R1.1 DS3 10/31 /NON_DS3
SUS_PWR_ACK_R 2 1 0Ohm SUSACK#_R C12 E22 PCH_DPROK R2219 2 1 0Ohm PM_RSMRST_R
/NON_DS3 R2246 SUSACK# DPWROK R2218 2 1 0Ohm EC_RST# 30,32
R1.0 +3VS R2205 2 1 10KOhm /DS3 R1.1 IOAC, 10/31
1 2 PM_SYSRST#_R K3 B9 PCIE_WAKE# R2217 2 1 0Ohm LAN_WAKE# 30,33
Add XDP_DBRESET# 1.2V/0.1A @ D2201 SYS_RESET# WAKE# @

SYS_PWROK P12 N3 PM_CLKRUN# 30,59


SYS_PWROK CLKRUN#/GPIO32
T2203
4,30,92 PM_PWROK L22 G8 PM_SUS_STAT# 1
PWROK SUS_STAT#/GPIO61
Add ME_PWROK. R2240 2 1 0Ohm
30 ME_PWROK R2242 2 @ 1 0Ohm PM_APWROK_R L10 N14 SUSCLK 30
APWROK SUSCLK/GPIO62
C C
T2204
4 PM_DRAM_PWRGD B13 D10 SLP_S5# 1
DRAMPWROK SLP_S5#/GPIO63

PM_RSMRST# has pull down 10k ohm in EC R1.1 DS3 10/31 R2245 2 1 0Ohm PM_RSMRST_R C21 H4
30 PM_RSMRST# RSMRST# SLP_S4# PM_SUSC# 30

30 ME_SUSPWRDNACK R2243 2 1 0Ohm SUS_PWR_ACK_R K16 F4 PM_SUSB# 30


SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3#
R1.1 DS3 10/31 R1.0
R1.0 30 PM_PWRBTN# E20
PWRBTN# SLP_A#
G10 ME_PM_SLP_M# 30
Add PM_PWRBTN#_R R1.1 DS3 10/31
30 ME_AC_PRESENT R2241 2 1 0Ohm AC_PRESENT_R H20 G16 SLP_DSW#_R R2247 2 1 0Ohm SLP_SUS# 30,91
ACPRESENT/GPIO31 SLP_SUS#
R1.0
T2201
1 BATLOW# E10 AP14 H_PM_SYNC 4
BATLOW#/GPIO72 PMSYNCH
T2202
1 RI# A10 K14 ME_PM_SLP_LAN# 30 R1.0
RI# SLP_LAN#/GPIO29

02V000000001
COUGAR_POINT_ES1

R1.1 Remove some SP in P22


SYS_PWROK for PCH

+3VSUS

B B
U2201
PM_PWROK 1 A 5
VCC

92 DELAY_VR_AND_ALL_SYS 2 B

3 GND 4 SYS_PWROK
Y
Vcc=2~5.5

+3VSUS_ORG

RI# R2223 1 2 10KOhm

BATLOW# R2224 1 2 10KOhm

R1.0
PCIE_WAKE# R2225 1 2 1KOhm

+3VS
R1.0

PM_CLKRUN# R2220 1 2 10KOhm ME_PM_SLP_M# R2226 1 @ 2 10KOhm

A A

PM_PWROK R2221 1 2 10KOhm ME_SUSPWRDNACK R2227 1 @ 2 10KOhm

GND R1.1 11/10 ME_AC_PRESENT R2228 1 @ 2 10KOhm

ME_PM_SLP_LAN# R2229 1 @ 2 10KOhm


Title : PCH(3)_FDI,DMI,SYS PWR
PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 22 of 93
5 4 3 2 1
5 4 3 2 1

+3VS +3VS 17,20,21,22,24,25,26,27,28,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92 U2001D


+3VS SP2301 1 2 J47 AP43
45 LCD_BKEN_PCH L_BKLTEN SDVO_TVCLKINN
SP2302 1 2 M45 AP45
45 L_VDDEN_PCH L_VDD_EN SDVO_TVCLKINP

45 L_BKLT_CTRL P45 AM42


L_CTRL_CLK RN2301A L_BKLTCTL SDVO_STALLN
1 2.2KOhm 2 AM40
SDVO_STALLP
45 EDID_CLK_PCH T40
L_DDC_CLK
45 EDID_DATA_PCH K47 AP39
L_CTRL_DATA RN2301B L_DDC_DATA SDVO_INTN
3 2.2KOhm 4 AP40
L_CTRL_CLK SDVO_INTP
T45
L_CTRL_DATA L_CTRL_CLK
P39
EDID_CLK_PCH RN2302A L_CTRL_DATA
1 2.2KOhm 2
R2301 2 1 2.37KOhm LVD_IBG AF37 P38

SDVO
R2302 @ LVD_IBG SDVO_CTRLCLK
2 1 0Ohm LVD_VBG AF36 M39
LVD_VBG SDVO_CTRLDATA

Display Port B
EDID_DATA_PCH 3 RN2302B
2.2KOhm 4
SP2303 1 2 LVD_VREF AE48
D LVD_VREFH D
AE47 AT49
LVD_VREFL DDPB_AUXN
AT47
GND DDPB_AUXP
AT40
DDPB_HPD
AK39

LVDS
45 LVDS_LCLKN_PCH LVDSA_CLK#
45 LVDS_LCLKP_PCH AK40 AV42
LVDSA_CLK DDPB_0N
AV40
DDPB_0P
Pull up 2.2k ohm in DDC bus for LVDS . 45 LVDS_L0N_PCH AN48
LVDSA_DATA#0 DDPB_1N
AV45

Digital Display Interface


45 LVDS_L1N_PCH AM47 AV46
LVDSA_DATA#1 DDPB_1P
45 LVDS_L2N_PCH AK47 AU48
LVDSA_DATA#2 DDPB_2N
AJ48 AU47
LVDSA_DATA#3 DDPB_2P
AV47
DDPB_3N
45 LVDS_L0P_PCH AN47 AV49
LVDSA_DATA0 DDPB_3P
Remove LVDS net name and add port B. 45 LVDS_L1P_PCH AM49
LVDSA_DATA1
45 LVDS_L2P_PCH AK49
LVDSA_DATA2
AJ47 P46
LVDSA_DATA3 DDPC_CTRLCLK
R1.0 DDPC_CTRLDATA
P42

Display Port C
AF40
LVDSB_CLK#
AF39 AP47
LVDSB_CLK DDPC_AUXN
AP49
DDPC_AUXP
AH45 AT38
LVDSB_DATA#0 DDPC_HPD
AH47
LVDSB_DATA#1
AF49 AY47
LVDSB_DATA#2 DDPC_0N
AF45 AY49
LVDSB_DATA#3 DDPC_0P
AY43
DDPC_1N
AH43 AY45
LVDSB_DATA0 DDPC_1P
AH49 BA47
LVDSB_DATA1 DDPC_2N
AF47 BA48
LVDSB_DATA2 DDPC_2P
AF43 BB47
LVDSB_DATA3 DDPC_3N
BB49
DDPC_3P

N48 M43
CRT_BLUE DDPD_CTRLCLK HDMI_DDC_CLK_PCH 48
P49 M36
CRT_GREEN DDPD_CTRLDATA HDMI_DDC_DATA_PCH 48

Display Port D
T49
CRT_RED
AT45

CRT
DDPD_AUXN
C T39 AT43 C
CRT_DDC_CLK DDPD_AUXP
M40 BH41 HDMI_HPD_PCH 48
CRT_DDC_DATA DDPD_HPD
BB43 HDMI_TXN2_PCH 48
DDPD_0N
M47 BB45 HDMI_TXP2_PCH 48
CRT_HSYNC DDPD_0P
M49 BF44 HDMI_TXN1_PCH 48
CRT_VSYNC DDPD_1N
BE44 HDMI_TXP1_PCH 48
DDPD_1P
BF42 HDMI_TXN0_PCH 48
R2307 1 5% DDPD_2N
GND 2 1KOhm T43 BE42 HDMI_TXP0_PCH 48
DAC_IREF DDPD_2P
GND T42 BJ42 HDMI_CLKN_PCH 48
CRT_IRTN DDPD_3N
BG42 HDMI_CLKP_PCH 48
DDPD_3P

COUGAR_POINT_ES1
02V000000001

CRT Disable: (For discrete graphic)


DisPlay Port Disable: (For discrete graphic) LVDS Disable: (For discrete graphic)
1. NC:
1. NC: 1. NC:
CRT_RED,CRT_GREEN,CRT_BLUE
ALL LVDSA_DATA [3:0], LVDSA_DATA# [3:0],
CRT_HSYCN,CRT_VSYNC
LVDSA_CLK, LVDSA_CLK#, LVDSB_DATA [3:0],
2. 1-kΩ ±0.5% pull-down to GND:
LVDSB_DATA# [3:0], LVDSB_CLK, LVDSB_CLK#
DAC_IREF
L_VDD_EN, L_BKLTEN, L_BKLTCTL, LVD_VREFH
3. Connected to GND:
LVD_VREFL, LVD_IBG, LVD_VBG
CRT_ITRN
B 2. Connected to GND: B
4. Connect to +V3.3:
VccALVDS,VccTX_LVDS
VCCADAC

A A

Title : PCH(4)_DP,LVDS,CRT
PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 23 of 93
5 4 3 2 1
5 4 3 2 1

+3VSUS +3VSUS 4,22,28,30,60,81,92


+3VS
+3VS +3VS 17,20,21,22,23,25,26,27,28,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+3V +3V 45,57,59,61,91

1
R2430
10KOhm +3VSUS_ORG
U2001E +3VSUS_ORG 20,21,22,25,26,27,33
@
AY7 +12VS +12VS 28,36,48,91
RSVD1
AV7

2
RSVD2
BG26 AU3 +1.8VS +1.8VS 7,25,26,57,80,84
U2403 TP1 RSVD3
BJ26 BG4
R2415 @ DGPU_PWR_EN TP2 RSVD4
+3VSUS 5 1 1 2 0Ohm BH25
VCC A TP3
2 SUSB_EC# 30,57,91,92 BJ16 AT10
R2414 @ B TP4 RSVD5
91 VGA_PWRON 1 2 0Ohm 4 3 GND BG16 BC8
Y GND TP5 RSVD6
AH38
SN74LVC1G08DCKR TP6
AH37 AU2
D
@ TP7 RSVD7 D
AK43 AT4
TP8 RSVD8
AK45 AT3
TP9 RSVD9
C18 AT1
R2413 TP10 RSVD10
1 2 0Ohm N30 AY3
TP11 RSVD11
H3 AT5
TP12 RSVD12
/DGPU AH12 AV3
TP13 RSVD13
AM4 AV1
TP14 RSVD14
AM5 BB1
TP15 RSVD15
Y13 BA3
TP16 RSVD16
K24 BB5
TP17 RSVD17
L24 BB3
TP18 RSVD18
AB46 BB7
TP19 RSVD19
AB45 BE8

RSVD
TP20 RSVD20
BD4
RSVD21
BF6
RSVD22
B21 AV5
TP21 RSVD23 NV_RCOMP R2427 1 1%
M20 AV10 2 32.4Ohm GND
TP22 RSVD24 @
AY16
TP23
BG46 AT8
TP24 RSVD25
R1.0 0209 R3.1 0601
AY5
RSVD26
BA2
RSVD27
0 BE28 TP25
USB30 port 1 RXN USB PORT
52 USB3_RX1_N 1 BC30 USB30 port 2 RXN AT12
USB3_RX2_N TP26 RSVD28
T2408 1 2 BE32 TP27
USB30 port 3 RXN RSVD29
BF3 USB P00 Touch Panel
52 USB3_RX3_N 3 BJ32 TP28
USB30 port 4 RXN
0 BC28 USB30 port 1 RXP 0614 R3.1 USB P01 External 2.0/3.0
TP29
52 USB3_RX1_P 1 BE30 TP30
USB30 port 2 RXP
T2409 1 USB3_RX2_P 2 BF32 USB30 port 3 RXP USB P02 External Main
TP31 USB_PN0
52 USB3_RX3_P 3 BG32 TP32
USB30 port 4 RXP USBP0N
C24 USB_PN0 45
0 AV26 USB30 port 1 TXN A24 USB_PP0 USB P03 External Main
TP33 USBP0P USB_PP0 45
52 USB3_TX1_N
1 BB26 USB30 port 2 TXN C25 USB_PN1
USB_PN1 52
USB3_TX2_N TP34 USBP1N USB_PP1
T2410 1 2 AU28 TP35
USB30 port 3 TXN USBP1P
B25 USB_PP1 52 USB P04 BT
52 USB3_TX3_N 3 AY30 USB30 port 4 TXN C26 USB_PN2
USB_PN2 52
TP36 USBP2N USB_PP2
0 AU26 TP37
USB30 port 1 TXP USBP2P
A26 USB_PP2 52 USB P05
1 AY26 USB30 port 2 TXP K28 USB_PN3 USB_PN3 52
52 USB3_TX1_P TP38 USBP3N
C T2411 1 USB3_TX2_P 2 AV28 USB30 port 3 TXP H28 USB_PP3 USB_PP3 52 USB P08 Mini PCIE (mSATA) C
TP39 USBP3P USB_PN4
52 USB3_TX3_P 3 AW30 TP40
USB30 port 4 TXP USBP4N
E28 USB_PN4 61
D28 USB_PP4 USB_PP4 61 USB P09 Debug Port
USBP4P USB_PN5 T2414
C28 1
+3VS USBP5N USB_PP5
USBP5P
A28 1 T2415 USB P10 Camera
C29 USB_PN6 1 T2420
USBP6N USB_PP6
USBP6P
B29 1 T2421 USB P11 WiFi
3 4 RN2403B INT_PIRQA# K40 N28 0614 R3.1
10KOhm PIRQA# USBP7N
7 8 RN2403D INT_PIRQB# K38 M28 USB P12

PCI
10KOhm PIRQB# USBP7P
1 2 RN2403A INT_PIRQC# H38 L30 USB_PN8 USB_PN8 53
10KOhm PIRQC# USBP8N
5 10KOhm 6 RN2403C INT_PIRQD# G38 K30 USB_PP8 USB_PP8 53 USB P13
PIRQD# USBP8P USB_PN9
G30 USB_PN9 52
SP2401 1 USBP9N
Frank 2 R0402 DGPU_HOLD_RST#_R C46 E30 USB_PP9

USB
70 DGPU_HOLD_RST# REQ1#/GPIO50 USBP9P USB_PP9 52
20110608 SP2401 is removed in EIH31. T2407 1 DGPU_SELECT# C44 C30 USB_PN10
REQ2#/GPIO52 USBP10N USB_PN10 45
57 DGPU_PWR_EN DGPU_PWR_EN SP2402 1 2 R0402 DGPU_PWR_EN_R E40 A30 USB_PP10
SATA_ODD_DA# has short pin in EIH31. REQ3#/GPIO54 USBP10P USB_PN11
USB_PP10 45
L32 USB_PN11 53
BBS_BIT1 USBP11N USB_PP11
DGPU_PWR_EN is active high D47 K32 USB_PP11 53
T2404 DGPU_PWM_SELECT# GNT1#/GPIO51 USBP11P
1 E42 G32
STP_A16OVR GNT2#/GPIO53 USBP12N
F46 E32
GNT3#/GPIO55 USBP12P USB_PN13 1 T2428
C32
+3VS COUGAR_POINT_ES1 USBP13N USB_PP13 1 T2429
A32
R2405 1 @ MPC_PWR_CTRL# USBP13P
GND 2 1KOhm G42
R2431 @ PIRQE#/GPIO2
**UNSTUFF** 1 2 10KOhm MPC_PWR_CTRL# 51 SATA_ODD_DA# SATA_ODD_DA# G40
EXTTS_SNI_DRV0_PCH PIRQF#/GPIO3
C42
PIRQG#/GPIO4 USBRBIAS#
C33 A15: R2416=19.6 ohm for EA. +3VSUS_ORG
R1.1 add Zero Power ODD R2432 1 2 10KOhm SATA_ODD_DA# EXTTS_SNI_DRV1_PCH D44
PIRQH#/GPIO5
**UNSTUFF** R2433 1 @ 2 10KOhm EXTTS_SNI_DRV0_PCH B33 USB_BIAS R2424 1 1% 2 22.6Ohm GND
R2434 @ USBRBIAS
**UNSTUFF** 1 2 10KOhm EXTTS_SNI_DRV1_PCH T2401 1 PCI_PME# K10
PME#
PLT_RST# C6 A14 OC0#/GPIO59 1 2 RN2401A
PLTRST# OC0#/GPIO59 10KOhm
A15:R2409=100ohm for EA . K20 OC1#/GPIO40 5 6 RN2402C
OC1#/GPIO40 10KOhm
B17 OC2#/GPIO41 7 8 RN2401D
OC2#/GPIO41 10KOhm
59 CLK_TPM 22Ohm 2 1 R2412 CLK_TPM_R H49 C16 OC3#/GPIO42 5 6 RN2401C
CLKOUT_PCI0 OC3#/GPIO42 10KOhm
21 CLK_PCI_FB 22Ohm 2 1 R2409 CLK_PCI_FB_R H43 L16 OC4#/GPIO43 3 4 RN2402B
CLKOUT_PCI1 33MHz OC4#/GPIO43 10KOhm
30 CLK_KBCPCI_PCH 22Ohm 2 1 R2410 CLK_KBCPCI_PCH_R J48 A16 OC5#/GPIO9 1 2 RN2402A Remove OC# to XDP.
CLKOUT_PCI2 OC5#/GPIO9 10KOhm
44 CLK_DEBUG 22Ohm 2 1 R2411 CLK_DEBUG_R K42 D14 OC6#/GPIO10 7 8 RN2402D
CLKOUT_PCI3 OC6#/GPIO10 10KOhm
T2405 1 CLK_DBG_R H40 C14 OC7#/GPIO14 3 4 RN2401B
CLKOUT_PCI4 OC7#/GPIO14 10KOhm
B B

Place within 500 mils of PCH


02V000000001
2

C2404
10PF/50V C2403
@ 10PF/50V 1 2 USB_OC9# 52
1

@ R2436 0Ohm

2
/HRUSB20
R2437 R1.1
Reserved for Wireless team 0Ohm
GND GND /CRUSB30 add OC# pin for add USB port9

1
1 2 USB_OC1# 52
R2435 0Ohm

1 2 USB_OC0# 52
R2429 0Ohm

STP_A16OVR:
BBS_BIT0,BBS_BIT1 : Boot BIOS Strap +3VS +3V
A16 swap override Strap/
Boot BIOS Strap Top-Block swap override jumper **UNSTUFF** DGPU_PWM_SELECT# R2420 1 @ 2 10KOhm
**UNSTUFF** DGPU_SELECT# R2421 1 @ 2 10KOhm
BBS_BIT1 BBS_BIT0 Boot BIOS Location Low=Enabled A16 swap override/ DGPU_HOLD_RST#_R R2422 1 2 10KOhm
U2402
0 0 LPC Top-Block swap override DGPU_PWR_EN_R R2423 1 2 1KOhm 1 A 5
VCC
0 1 Reserved (NAND) PLT_RST# 2 B
High=Default
1 0 Reserved 3 GND 4 BUF_PLT_RST# 4,30,32,33,53,59,70
Y
1 1 SPI (PCH) Vcc=2~5.5
06V030000005

1
GND 1 @ 2
A Sampled on rising edge of PWROK. R2425 0Ohm A
R2426
This Signal has a weak internal pull-up. 10KOhm
20 BBS_BIT0 BBS_BIT0 R2417 1 @ 2 1KOhm STP_A16OVR R2419 1 @ 2 1KOhm

2
BBS_BIT1 R2418 1 @ 2 1KOhm
GND
R1.0 GND
GND
Add BBS_BIT1 signal.

Title : PCH(5)_PCI,NVRAM,USB
PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 24 of 93
5 4 3 2 1
5 4 3 2 1

+3VS +3VS 17,20,21,22,23,24,26,27,28,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+3VSUS +3VSUS 4,22,24,28,30,60,81,92

+3VSUS_ORG +3VSUS_ORG 20,21,22,24,26,27,33

R1.0
Remove CRIT_PCH_GPIO0_R to XDP
U2001F R1.1
add Zero Power ODD
D D
GPIO0 T7 C40 SATA_ODD_PWRGT SATA_ODD_PWRGT 51
JM50_T 05/08 BMBUSY#/GPIO0 TACH4/GPIO68

45 TPN_INT# 1 /TPN 2 R2522 GPIO1 A42 B41 1 T2508 **UNSTUFF**


0Ohm TACH1/GPIO1 TACH5/GPIO69
T2503 1 DGPU_HPD_INTR# H36 C41 1 T2507 **UNSTUFF**
+3VS +3VS TACH2/GPIO6 TACH6/GPIO70
GPIO7 E38 A40 1 T2505 **UNSTUFF**
TACH3/GPIO7 TACH7/GPIO71
USB30_EXT_SMI# C10 R1.1 11/04
R2.0 12/22 GPIO8
Frank
Add PM_LANPHY_EN SP2505 1 2 R0402 PM_LANPHY_EN C4 20110608 H_THRMTRIP# is not connected pull up resister but EIH 31 does not.
33 LAN_LPWR LAN_PHY_PWR_CTRL/GPIO12
1

R2525 R2527 Add HOST_ALERT#1_R. SP2501 1 2 HOST_ALERT#1_R G2 P4 A20GATE 30


30,44 EXT_SMI# GPIO15 A20GATE
/HR_IOAC 10KOhm
10KOhm /DS3 AU16 H_PECI_R 0Ohm 1 @ 2 R2514
PECI H_PECI 4
DGPU_PRSNT# U2 43Ohm 1 2 R2515 H_PECI_EC 30
2

SATA4GP/GPIO16
P5
RCIN# RCIN# 30

GPIO
DGPU_PWROK has 100 ms software delay , DGPU_PWROK D40 AY11

CPU/MISC
87,91 DGPU_PWROK TACH0/GPIO17 PROCPWRGD H_CPUPWRGD 4
PCB_ID0 no hardware delay requirement
T2141 1 WLAN_LED T5 AY10 PM_THRMTRIP# 390Ohm 1 1% 2 R2516
SCLOCK/GPIO22 THRMTRIP# H_THRMTRIP# 4,32
PCB_ID1 AOAC_ON E8 T14 INIT3_3V# 1 T2504 R1.0
Reserve PCH_GPIO24 53 AOAC_ON GPIO24/MEM_LED INIT3_3V#
R1.1 Change WLAN_ON to WLAN_ON_PCH
R1.0 0105 GPIO27 E16 AY1 NV_CLE R2502 1 2 1KOhm H_SNB_IVB# 4
GPIO27 DF_TVS
1

0Ohm 1 @ 2 R2517 WLAN_ON_R P8 R2503 1 2 2.2KOhm +1.8VS


30,53 RF_ON GPIO28
R2526 R2528 Frank AH8
/CR STP_PCI# TS_VSS1
0531 EE define GPIO for BROADCOM LAN chip. K1
10KOhm 10KOhm STP_PCI#/GPIO34
AK11
/NON_DS3 T2506 SATA_PWR_EN#1_R TS_VSS2
1 K4 TS Signal Disable Guideline
2

GPIO35
AH10 TS_VSS[1:4] should pull down to GND
Add SATA_ODD_PRSNT#_R and SATA_ODD_PRSNT#_R V8
TS_VSS3
Design Guide 0.9 (436735)
51 SATA_ODD_PRSNT#_R SATA2GP/GPIO36
FDI_OVRVLTG. TS_VSS4
AK10
R1.1 FDI_OVRVLTG M5
SATA3GP/GPIO37
GND GND add Zero Power ODD PCB_ID0 N2 P37
SLOAD/GPIO38 NC_1 GND
C C
R2.0 12/13 PCB_ID1 M3
SDATAOUT0/GPIO39

30,53,61 BT_ON BT_ON 0Ohm 1 @ 2 R2523 V13 BG2


SDATAOUT1/GPIO48 Vss_NCTF15
R1.1 DS3 10/31 T2512 1PCH_ALERT# V3 BG48
Add CRIT_TEMP_REP#_R. SATA5GP/GPIO49 Vss_NCTF16
T2511 1 BT_LED D6 BH3
GPIO57 Vss_NCTF17
+3VSUS_ORG Frank R1.0 0111 Vss_NCTF18
BH47
0502 NO BT module, but the GPIO control
pin will conntact to page 55. A4 BJ4
Vss_NCTF1 Vss_NCTF19
R1.0 Intel Comments It supports combo card.
EXT_SMI# R2529 1 2 1KOhm A44 BJ44
Vss_NCTF2 Vss_NCTF20
Frank
0502 No WLAN LED,so GPIO pin change test point A45 BJ45
USB30_EXT_SMI# R2531 @ 10KOhm Vss_NCTF3 Vss_NCTF21
**UNSTUFF** 2 1

NCTF
Joyoung R1.0 A46
Vss_NCTF4 Vss_NCTF22
BJ46
Frank
**UNSTUFF** PM_LANPHY_EN R2538 2 @ 1 10KOhm Joyoung R1.1 0504 CRIT_TEMP_REP#_R change net name A5 BJ5
Vss_NCTF5 Vss_NCTF23
remove /niAMT remark CRIT_TEMP_REP# and contact to EC(follow BIC50)
A6 BJ6
Vss_NCTF6 Vss_NCTF24
AOAC_ON R2541 2 @ 1 10KOhm Frank B3 C2
Vss_NCTF7 Vss_NCTF25
0516 Remove SATA_DET#4_R to XDP
B47 C48
Vss_NCTF8 Vss_NCTF26
Joyoung R1.0 Frank
0516 Remove PLL_ODVR_EN and SATA_PWR_EN#1_R to XDP BD1 D1
mount if suppot AOAC +3VS Vss_NCTF9 Vss_NCTF27
RCIN# has pull high at EC side BD49 D49
Vss_NCTF10 Vss_NCTF28
Frank
**UNSTUFF** 0516 Remove FDI_OVRVLTG to XDP BE1
Vss_NCTF11 Vss_NCTF29
E1
DGPU_HPD_INTR# R2534 2 @ 1 10KOhm
BE49 E49
Vss_NCTF12 Vss_NCTF30
R1.0 Frank
0516 Remove CRIT_TEMP_REP#_R to XDP BF1 F1
DGPU_PWROK R2539 10KOhm Vss_NCTF13 Vss_NCTF31
2 1
BF49 F49
B Vss_NCTF14 Vss_NCTF32 B

COUGAR_POINT_ES1 02V000000001
Unused GPIO

GPIO0 R2536 2 1 10KOhm

STP_PCI# R2537 2 1 10KOhm


**UNSTUFF** +3VS R2518 1 1% 2 1KOhm FDI_OVRVLTG R2519 1 2 100KOhm GND
WLAN_LED R2542 2 @ 1 10KOhm @
FDI TERMINATION VOLTAGE OVERRIDE
**UNSTUFF** GPIO27 R2548 2 @ 1 10KOhm - GPIO37 (FDI_OVRVLTG)
#438390 Checklist LOW - TX, RX terminated to same voltage
(DC Couplong Mode)
DEFAULT R2530
GND
+3VS R2520 1 2 200KOhm SATA_ODD_PRSNT#_R 1 @ 2 GND
DGPU_PWROK R2540 2 @ 1 10KOhm
DMI TERMINATION VOLTAGE OVERRIDE
GPIO1 100KOhm @ R2545 10KOhm
2 1 - GPIO36 (SATA_ODD_PRSNT#)
LOW - TX, RX terminated to same voltage
(DC Couplong Mode)
JM50_T 05/11
DEFAULT
GND

Joyoung R1.0 +3VS


R1.1
add Zero Power ODD

DGPU_PRSNT# R2126 1 /UMA 2 10KOhm


PLL ON DIE VR ENABLE
A DGPU_PRSNT# R2134 1 /DGPU 2 10KOhm WLAN_ON_R R2521 1 @ 2 1KOhm GND HIGH - DISABLED (DEFAULT) A
LOW - ENABLED

GND

Joyoung R1.0
for BIOS detect Panel +3VS

GPIO7 R2549 2 /LVDS 1 10KOhm

GPIO7 R2547 2 /eDP 1 10KOhm


Title : PCH(6)_CPU,GPIO,MISC
PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg
Size Project Name Rev
GND C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 25 of 93
5 4 3 2 1
5 4 3 2 1

U2001H
H5 +VCCA_DAC_1_2
VSS0 L2604
AA17 AK38 1 2 +3VS
VSS1 VSS80
AA2 AK4
VSS2 VSS81
AA3 AK42 1kOhm/100Mhz
VSS3 VSS82

1
AA33 AK46
VSS4 VSS83 C2613 C2612 C2614
AA34 AK8
VSS5 VSS84 0.01UF/25V 0.1UF/16V
AB11 AL16 R1.0 POWER 22UF/6.3V

2
VSS6 VSS85 U2001G
AB14 AL17
AB39
VSS7 VSS86
AL19 Intel Comments
VSS8 VSS87 @
AB4 AL2
VSS9 VSS88
AB43 AL21 +VTT_PCH_VCC 1.73A AA23 U48 63mA GND GND GND
VSS10 VSS89 VccCore1 VccADAC
AB5 AL23 AC23
VSS11 VSS90 VccCore2

CRT
AB7
VSS12 VSS91
AL26 AD21
VccCore3 R1.0
AC19 AL27 vx_c0603_small C2601 C2602 C2603 @ C2623 AD23 U47 GND
VSS13 VSS92 VccCore4 VssADAC +3VS_VCCA_LVD

VCC CORE
AC2 AL31 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V AF21

2
VSS14 VSS93 VccCore5 SP2607
AC21 AL33 AF23
D VSS15 VSS94 VccCore6 D
AC24
VSS16 VSS95
AL34 AG21
VccCore7
1mA 1 2 +3VS
AC33 AL48 GND GND GND GND AG23
VSS17 VSS96 VccCore8 NB_R0402_20MIL_SMALL
AC34 AM11 AG24 AK36
VSS18 VSS97 VccCore9 VccALVDS

1
AC48 AM14 AG26 C2624
VSS19 VSS98 VccCore10 10PF/50V
AD10 AM36 AG27 AK37 GND
VSS20 VSS99 VccCore11 VssALVDS
AD11 AM39 AG29

2
VSS21 VSS100 VccCore12
AD12 AM43 AJ23

LVDS
VSS22 VSS101 VccCore13
AD13 AM45 AJ26 AM37
VSS23 VSS102 VccCore14 VccTX_LVDS1
AD19 AM46 AJ27
VSS24 VSS103 VccCore15 +1.8VS_VCCTX_LVD GND +1.8VS
AD24 AM7 AJ29 AM38
VSS25 VSS104 VccCore16 VccTX_LVDS2
AD26 AN2 AJ31
VSS26 VSS105 +VTT_PCH_VCCDPLL_EXP VccCore17
AD27
VSS27 VSS106
AN29
VccTX_LVDS3
AP36 40mA 1kOhm/100Mhz 1 2 L2602
AD33 AN3
VSS28 VSS107

1
AD34 AN31 +VTT_PCH_VCCDPLL_EXP AP37
VSS29 VSS108 VccTX_LVDS4

1
AD36 AP12 +VTT_PCH_VCCIO SP2604 1 2 3.799A/29=131mA AN19 C2615 C2616 C2617 C2625
VSS30 VSS109 VccIO1 0.01UF/25V 0.01UF/25V 22UF/6.3V 10PF/50V
AD37 AP19

2
VSS31 VSS110 NB_R0402_20MIL_SMALL @
AD38 AP28

2
VSS32 VSS111 L2601
AD39 AP30 +VTT_PCH_ORG 2 1 1kOhm/100Mhz BJ22
VSS33 VSS112 @ VccAPLLEXP
AD4 AP32
VSS34 VSS113

1
AD40 AP38 V33

HVCMOS
VSS35 VSS114 vx_c0603_small C2605 Vcc3_3_2 GND GND GND GND
AD42 AP4 AN16
VSS36 VSS115 +VTT_PCH_VCCAPLL_EXP 10UF/6.3V VccIO2 +3VS_VCC_GIO
AD43 AP42

2
VSS37 VSS116 @
AD45 AP46 AN17
VSS38 VSS117 VccIO3
AD46
VSS39 VSS118
AP8
Vcc3_3_3
V34 178mA/8*2pin=45mA SP2608 1 2 +3VS_VCC3_3
AD8 AR2 R1.0 GND
VSS40 VSS119

1
AE2 AR48 AN21 NB_R0402_20MIL_SMALL
AE3
VSS41 VSS120
AT11 +VTT_PCH_VCC_EXP Intel Comments 3.799A/29*12= 1.572A VccIO4 C2618
VSS42 VSS121 0.1UF/16V
AF10 AT13 +VTT_PCH_VCCIO AN26

2
VSS43 VSS122 VccIO5
AF12
VSS44 VSS123
AT18 147mA/4=36.75mA
AD14 AT22 AN27 AT16 +VCCAFDI_VRM
VSS45 VSS124 VccIO6 VccVRM2

1
AD16 AT26 GND
VSS46 VSS125 vx_c0603_small C2606 C2607 C2608 @ C2609 C2610 +VCCIO_CPU_VCC_DMI R1.1 11/02 +VTT_PCH_ORG
AF16 AT28 AP21
VSS47 VSS126 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V VccIO7
AF19 AT30

2
VSS48 VSS127
AF24
VSS49 VSS128
AT32 AP23
VccIO8 VccDMI2
AT20 47mA/2=23.5mA SP2609 1 2
AF26 AT34

DMI
VSS50 VSS129

1
AF27 AT39 AP24 C2619 NB_R0402_20MIL_SMALL

VCCIO
VSS51 VSS130 VccIO9 1UF/6.3V
AF29 AT42
VSS52 VSS131
C AF31 AT46 AP26 AB36 75mA C

2
VSS53 VSS132 VccIO10 VccClkDMI +VTT_PCH_ORG_VCCCLKDMI
AF38 AT7
VSS54 VSS133 GND R1.1 11/04 +VTT_PCH_ORG
AF4 AU24 AT24
VSS55 VSS134 VccIO11 GND
AF42 AU30
VSS56 VSS135 R2614
AF46 AV16 2 1 0Ohm
VSS57 VSS136
AF5 AV20 AN33
VSS58 VSS137 VccIO12

1
AF7 AV24 C2620
VSS59 VSS138 10UF/10V
AF8 AV30 AN34 AG16
VSS60 VSS139 +3VS_VCCA3GBG VccIO13 VccDFTERM1 @
AG19 AV38

2
VSS61 VSS140 SP2605
AG2 AV4 +3VS_VCC3_3
VSS62 VSS141
AG31 AV43 1 2 178mA/8=22.25mA BH29 AG17

DFT / SPI
VSS63 VSS142 Vcc3_3_1 VccDFTERM2 GND +V_NVRAM_VCCPNAND +1.8VS
AG48 AV8
VSS64 VSS143

1
AH11 AW14 +VTT_PCH_VCCAPLL_FDI NB_R0402_20MIL_SMALL
VSS65 VSS144
AH3
VSS66 VSS145
AW18 C2611
VccDFTERM3
AJ16 20mA SP2610 1 2
AH36 AW2 +VTT_PCH_ORG R2605 2 @ 1 0Ohm 0.1UF/16V 147mA/4=36.75mA

2
VSS67 VSS146

1
AH39 AW22 +VCCAFDI_VRM AP16 NB_R0402_20MIL_SMALL
VSS68 VSS147 VccVRM1 C2621
AH40 AW26 AJ17
VSS69 VSS148 GND VccDFTERM4 0.1UF/16V
AH42 AW28

2
VSS70 VSS149
AH46 AW32 BG6
VSS71 VSS150 +VTT_PCH_VCCDPLL_FDI VccAFDIPLL
AH7 AW34
VSS72 VSS151 GND +3VM_VCCPSPI +3VA R2.0 12/13
AJ19
VSS73 VSS152
AW36 R1.2
AJ21
VSS74 VSS153
AW40 +VTT_PCH_VCCIO SP2606 1 2 3.799A/29=131mA AP17
VccIO14

FDI
AJ24 AW48 V1 10mA R2616 2 1 0Ohm
VSS75 VSS154 VccSPI
AJ33
VSS76 VSS155
AV11 NB_R0402_20MIL_SMALL 47mA/2=23.5mA

1
AJ34 AY12 AU20 +3VSUS_ORG
VSS77 VSS156 +VCCIO_CPU_VCC_DMI VccDMI1
AK12 AY22 C2622
VSS78 VSS157 0.1UF/16V R2617 @ R1.1 11/10
AK3 AY28 2 1 0Ohm

2
VSS79 VSS158 COUGAR_POINT_ES1 02V000000001

COUGAR_POINT_ES1 GND
GND 02V000000001 GND

R1.0
+VTT_PCH_VCCIO +VTT_PCH_VCCIO 20,27
B +VTT_PCH_ORG +VTT_PCH_ORG 22,27 B
+1.05VS +1.05VS 27,57,82,87
+1.05VS +VTT_PCH_ORG +VTT_PCH_VCC +1.5VS +1.5VS 7,53,57,91
JP2601 JP2602 +VCCAFDI_VRM +VCCAFDI_VRM 27
4.56A=330mA+1.3A+2.925A 1.3A +3VS +3VS 17,20,21,22,23,24,25,27,28,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92
1 2 1 2 +1.5VS +VCCAFDI_VRM
1 2 1 2 +3VS_VCC3_3 +3VS_VCC3_3 27
SR2602 160mA
3MM_OPEN_5MIL 2MM_OPEN_5MIL 1 2 +1.8VS +1.8VS 7,25,57,80,84
+VTT_PCH_VCCIO +VCCP +VCCP 3,4,6,7,30,32,57,82
NB_R0402_20MIL_SMALL
JP2603
Frank 2.925A
20110614 Follow Everest 1 2
1 2
VCCVRAM use +1.5VS in mobile R1.0
2MM_OPEN_5MIL HAD_SYNC should pull high to +3VSUS
Delete
+VTT_PCH_VCC
+VTT_PCH_VCCDPLL_EXP
Frank +VTT_PCH_VCCAPLL_EXP
20110608 EVERST remove 1.8VS and +VTT_PCH_ORG
+VTT_PCH_VCCDPLL_FDI
+VTT_PCH_VCCAPLL_FDI
+3VS_VCCA3GBG
+3VS_VCC_GIO
+VCCA_DAC_1_2
+3VS_VCCA_LVDS
+3VM_VCCPSPI
+V_NVRAM_VCCPNAND
+1.8VS_VCCTX_LVD
+VCCIO_CPU_VCC_DMI
+VTT_PCH_ORG_VCCCLKDMI

A A

Title : PCH(7)_POWER,GND
PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 26 of 93
5 4 3 2 1
5 4 3 2 1

U2001I

AY4
AY42
VSS159
VSS160
VSS259
VSS260
H46
K18
U2001J POWER +VTT_PCH_VCCUSBCORE
AY46 K26
VSS161 VSS261
AY8 K39 +VTT_PCH_ORG R2703 1 @ 2 0Ohm +VTT_PCH_VCCACLK AD49 N26 3.799A/29*5= 655mA SP2702 1 2 +VTT_PCH_VCCIO
VSS162 VSS262 VccAClk VccIO17
B11 K46
VSS163 VSS263 R2704 1/NON_DS3 2 0Ohm NB_R0603_32MIL_SMALL
B15 K7 +3VSUS_ORG P26
VSS164 VSS264 VccIO18

1
B19 L18 +3VA R2705 1 2 0Ohm +VCCPDSW 1mA T16
VSS165 VSS265 R1.1 DS3 10/31 /DS3 VccDSW3_3 C2726
B23 L2 P28
VSS166 VSS266 VccIO19

1
B27 L20 1UF/6.3V

2
VSS167 VSS267 C2705 PCH_VCCDSW
B31 L26 V12 T27
VSS168 VSS268 0.1UF/16V DcpSusByp VccIO20
B35 L28

2
VSS169 VSS269

1
B39 L36 C2706 +3VS_VCC_CLKF33 T29 GND
VSS170 VSS270 @ VccIO21
B7 L48 T38
VSS171 VSS271
F45 M12 GND 178mA/8=22.25mA Vcc3_3_4

2
VSS172 VSS272 +3VSUS_ORG_VCCPUSB
BB12
VSS173 VSS273
P16 0.1UF/16V
VccSus3_3_1
T23 65mA SP2703 1 2 +3VSUS_ORG
BB16 M18 @ L2704 1 2 1kOhm/100Mhz GND +VCCAPLL_CPY_PCH BH23 R1.1 10/31 Line up
VSS174 VSS274 +VTT_PCH_ORG VccAPLLDMI2

1
D D
BB20 M22 T24 NB_R0603_32MIL_SMALL
VSS175 VSS275 VccSus3_3_2

1
BB22 M24 @ C2707 +VTT_PCH_VCCIO SP2715 1 2 AL29 C2727
VSS176 VSS276 VccIO15
BB24 M30 3.799A/29=131mA V23 0.1UF/16V

USB

2
VSS177 VSS277 10UF/10V NB_R0402_20MIL_SMALL +VCCDPLL_CPY VccSus3_3_3
BB28 M32

2
VSS178 VSS278
BB30 M34 +VCCSUS1 120mA/3=40mA AL24 V24 +3VSUS_ORG
VSS179 VSS279 DcpSus1 VccSus3_3_4 GND
BB38 M38
VSS180 VSS280

1
BB4 M4 GND C2708 P24
VSS181 VSS281 1UF/6.3V VccSus3_3_5 D2701
BB46 M42
VSS182 VSS282
BC14 M46 @ AA19 3.799A/29=131mA 1V/0.2A

2
VSS183 VSS283 VccASW1 +VCCAUPLL
BC18 M8 T26 1 2 +VTT_PCH_VCCIO +5VSUS_PCH_VCC5REFSUS
VSS184 VSS284 GND VccIO22 SP2705
BC2 N18 AA21
VSS185 VSS285 VccASW2 NB_R0402_20MIL_SMALL
BC22 P30 Frank

3
VSS186 VSS286
BC26 N47 20110608 C2741,C2719, C2713,C2740 is mounted in EIH31 AA24 M26 1mA 1 R2711 2 +5VSUS_ORG
VSS187 VSS287 VccASW3 V5REF_Sus 100Ohm
BC32 P11
VSS188 VSS288

1
Clock and Miscellaneous
BC34 P18 AA26 +3VS
VSS189 VSS289 VccASW4 +VCCA_USBSUS C2729
BC36 T33 AN23
VSS190 VSS290 DcpSus4

1
BC40 P40 AA27 1UF/6.3V

2
VSS191 VSS291 VccASW5

1
BC42 P43 AN24 +3VSUS_ORG_VCCPSUS C2730 D2702
VSS192 VSS292 VccSus3_3_6 1UF/6.3V 1V/0.2A
BC48 P47 AA29
VSS193 VSS293 VccASW6 @ GND
BD46 P7

2
VSS194 VSS294 +5VS_PCH_VCC5REF
BD5 R2 AA31
VSS195 VSS295 VccASW7
BE22 R48

3
VSS196 VSS296
BE26 T12 AC26 P34 1mA GND 1 R2712 2 +5VS
VSS197 VSS297 VccASW8 V5REF +3VSUS_ORG_VCCPSUS 100Ohm
BE40 T31
VSS198 VSS298
BF10
VSS199 VSS299
T37 R1.0 AC27
VccASW9

1
BF12 T4 N20 SP2706 1 2 +3VSUS_ORG

PCI/GPIO/LPC
BF16
VSS200 VSS300
W34 Intel Comments AC29
VccSus3_3_7 C2731
VSS201 VSS301 VccASW10
BF20 T46 0.803A/23*20= 698mA N22 NB_R0402_20MIL_SMALL 1UF/6.3V

2
VSS202 VSS302 VccSus3_3_8

1
BF22 T47 +1.05VM_ORG AC31
VSS203 VSS303 VccASW11 C2732
BF24 T8 P20
VSS204 VSS304 VccSus3_3_9 1UF/6.3V
BF26 V11 AD29

2
VSS205 VSS305 VccASW12

1
BF28 V17 P22
VSS206 VSS306 C2709 C2710 C2711 C2712 @ C2741 VccSus3_3_10 +3VS_VCCPCORE GND
BD3 V26 AD31
VSS207 VSS307 22UF/6.3V 22UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V VccASW13
BF30 V27

2
VSS208 VSS308
BF38 V29 W21 AA16 178mA/8*2pin=44.5mA
GND SP2707 1 2 +3VS_VCC3_3
VSS209 VSS309 VccASW14 Vcc3_3_5
BF40 V31
VSS210 VSS310

1
BF8 V36 GND W23 W16 R1.1 10/31 Link NB_R0402_20MIL_SMALL
VSS211 VSS311 GND GND GND GND VccASW15 Vcc3_3_6 C2735 C2734 C2733
C BG17 V39 C
VSS212 VSS312
BG21 V43 W24 T34 187mA/8=22.25mA 0.1UF/16V 0.1UF/16V 0.1UF/16V

2
VSS213 VSS313 VccASW16 Vcc3_3_7
BG33 V7
VSS214 VSS314
BG44 W17 W26
VSS215 VSS315 VccASW17 GND
BG8 W19
VSS216 VSS316
BH11 W2 W29
VSS217 VSS317 VccASW18
BH15 W27
VSS218 VSS318
BH17 W48 W31 AJ2 187mA/8=22.25mA
VSS219 VSS319 VccASW19 Vcc3_3_8
BH19 Y12
VSS220 VSS320
H10 Y38 W33
VSS221 VSS321 VccASW20
BH27 Y4 AF13
VSS222 VSS322 VccIO23
BH31 Y42
VSS223 VSS323 +VCCRTCEXT +VTT_PCH_VCCIO_SATA3
BH33 Y46 N16
VSS224 VSS324 DcpRTC
BH35 Y8 AH13
VSS225 VSS325 VccIO24
BH39
VSS226 VSS326
BG29 3.799A/29*4= 0.524mA SP2709 1 2 +VTT_PCH_VCCIO

1
BH43 N24 +VCCAFDI_VRM 147mA/4=36.75mA Y49 AH14
VSS227 VSS327 VccVRM3 VccIO25

1
BH7 AJ3 C2714 C2736 NB_R0603_32MIL_SMALL
VSS228 VSS328 0.1UF/16V 1UF/6.3V
D3 AD47

2
VSS229 VSS329 +VTT_PCH_ORG_VCCAPLL_SATA3
D12 B43 AF14

2
VSS230 VSS330 VccIO26
D16 BE10 75mA BD47 @

SATA
VSS231 VSS331 +VTT_PCH_VCCA_A_DPL VccADPLLA
D18 BG41 AK1 GND 1kOhm/100Mhz 1 2 L2705 +VTT_PCH_ORG
VSS232 VSS332 VccAPLLSATA
D22
VSS233 VSS333
G14 GND +VTT_PCH_VCCA_B_DPL 75mA BF47
VccADPLLB

1
D24 H16
VSS234 VSS334
D26 T36 +VTT_PCH_VCCIO SP2716 AF11 147mA/4=36.75mA +VCCAFDI_VRM C2737
VSS235 VSS335 +VCCDIFFCLK VccVRM4
D30 BG22 1 2 3.799A/29=131mA AF17 10UF/10V

2
VSS236 VSS336 VccIO16
D32 BG24 +VTT_PCH_ORG 1 2 50mA AF33 @
VSS237 VSS337 VccDIFFCLKN1
1

D34 C22 NB_R0402_20MIL_SMALL 0Ohm R2708 AF34 AC16 +VTT_PCH_VCCIO_VCC_SATA


VSS238 VSS338 VccDIFFCLKN2 VccIO27
1

D38 AP13 C2715 +VCCDIFFCLKN AG34 GND


VSS239 VSS339 VccDIFFCLKN3
D42 M14 1UF/6.3V C2716 AC17 3.799A/29*3= 393mA SP2710 1 2 +VTT_PCH_VCCIO
2

VSS240 VSS340 1UF/6.3V +VTT_PCH_ORG_SSCVCC VccIO28


D8 AP3
2

VSS241 VSS341

1
E18 AP1 R2709 1 0Ohm 2 95mA AG33 AD17 NB_R0603_32MIL_SMALL
VSS242 VSS342 GND VccSSC VccIO29 C2738
E26 BE16 +VTT_PCH_ORG
VSS243 VSS343

1
G18 BC16 GND 0.1UF/16V 1UF/6.3V

2
VSS244 VSS344
G20 BG28 C2717 2 1 VCCSST V16 R1.0
VSS245 VSS345 1UF/6.3V C2718 DcpSST GND
G26 BJ28 GND

2
G28
VSS246 VSS346 GND Intel Comments
VSS247 +V1.05VM_ORG_VCCSUS T17
G36 +1.05VM_ORG R2710 1 @ 2 0Ohm T21 PCH_VCC_1_1_20 0.803A/23*3= 105mA +1.05VM_ORG
VSS248 DcpSus2 VccASW21
G48 V19

MISC
VSS249 DcpSus3
1
B B
H12 R1.0 @ C2719
VSS250 +VTT_CPU_VCCPCPU
H18 1UF/6.3V V21 PCH_VCC_1_1_21 Frank
H22
VSS251 SP2701 Intel Comments VccASW22
20110608 Remove short pins but EIH31 does not.

CPU
+VTT_PCH_ORG
2

VSS252
H24
VSS253
1 2 2mA BJ8
V_PROC_IO
H26 GND T19 PCH_VCC_1_1_22
VSS254 VccASW23
1

1
H30 R1.1 11/02 NB_R0603_32MIL_SMALL
VSS255 C2720 R1.1 10/31 Link C2722
H32
VSS256 4.7UF/6.3V 0.1UF/16V 10mil trace +3VSUS_ORG_VCCPAZSUS
H34
2

VSS257

RTC
F3 6uA A22 P32 10mA SP2714 1 2

HDA
VSS258 VccRTC VccSusHDA +3VSUS_ORG
Frank

1
GND GND R1.0 NB_R0603_32MIL_SMALL
20110608 C2739 is 1uF in EIH31.
COUGAR_POINT_ES1 C2739
Intel Comments 0.1UF/16V R1.0

2
02V000000001 +VCC_RTC
Delete
R1.0 GND +VTT_PCH_VCCUSBCORE
1

COUGAR_POINT_ES1
C2723 C2724 +VTT_PCH_VCCIO_SATA3
1UF/6.3V 0.1UF/16V +VTT_PCH_ORG_VCCAPLL_SATA3
2

GND GND
R1.1 11/04 +VTT_PCH_VCCA_A_DPL
GND GND +VTT_PCH_VCCA_B_DPL
Frank
0503 Remove Remove +1.05VM. +VTT_PCH_ORG_SSCVCC
Frank +VCCDPLL_CPY
+3VSUS_DS3 +3VSUS_ORG
20110608 R2701 is un-mounted and L2701 is mounted in EIH31 JP2701
109mA +VTT_PCH_VCCIO_VCC_SATA
2 1 +1.05VS +1.05VM_ORG
2 1 JP2705 +3VS_VCC_CLKF33
R1.0 1.01A
R1.0 R1.1 11/02 1MM_OPEN_M1M2 2 1 +3VS_VCCPCORE
+VTT_PCH_VCCA_A_DPL Intel Comments +VTT_PCH_ORG 2 1
+3VS_VCCPPCI
+3VS_VCC3_3 Intel Comments +3VS_VCC_CLKF33 +5VSUS_DS3 +5VSUS_ORG 1MM_OPEN_M1M2
L2702 JP2702 +VTT_CPU_VCCPCPU
1 2 2 1 +5VSUS_ORG
R2701 2 1
1 2 0Ohm Frank
1kOhm/100Mhz 1MM_OPEN_M1M2 20110614 Follow Everest +5VSUS_PCH_VCC5REFSUS
1

@ L2701 1 2 1kOhm/100Mhz C2703 C2713 +VCC_RTC +VCC_RTC 20,22 +5VS_PCH_VCC5REF


1

A +3VS +3VS_VCC3_3 A
JP2703 +3VA +3VA 6,20,26,30,31,57,59,60,81,88,93
R2702 1UF/6.3V 22UF/6.3V 266mA +1.05VS +1.05VS 26,57,82,87
+3VSUS_ORG_VCCPAZSUS
2

2
1

C2701 C2702 0Ohm 2 1


@ 2 1 +VTT_PCH_ORG +VTT_PCH_ORG 22,26 +3VSUS_ORG_VCCPSUS
+VTT_PCH_VCCIO +VTT_PCH_VCCIO 20,26
10UF/10V 1UF/6.3V 1MM_OPEN_M1M2
2

GND GND +VCCDIFFCLKN +VCCDIFFCLKN 21


+VCCAFDI_VRM +VCCAFDI_VRM 26
L2703 +3VS +3VS 17,20,21,22,23,24,25,26,28,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92
GND GND +VTT_PCH_VCCA_B_DPL 1 2 +3VS_VCC3_3 +3VS_VCC3_3 26
+VCCP +VCCP 3,4,6,7,30,32,57,82
1kOhm/100Mhz +5VSUS +5VSUS 51,57,59,91
1

+VTT_PCH_VCCA_B_DPL
C2704 C2740 +5VS +5VS 31,36,37,45,48,50,51,57,80,87,91 Title : PCH(8)_POWER,GND
+3VSUS_ORG +3VSUS_ORG 20,21,22,24,25,26,33
1UF/6.3V 22UF/6.3V +3VSUS Engineer: Joyoung_Chianhg
+3VSUS 4,22,24,28,30,60,81,92
2

PEGATRON COMPUTER INC


Size Project Name Rev

GND GND
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 27 of 93
5 4 3 2 1
5 4 3 2 1

PCH SPI ROM +3VS +3VS 17,20,21,22,23,24,25,26,27,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+12VS +12VS 36,48,91

PCH SPI ROM +12VSUS +12VSUS 51,81,91

+3VA_EC reserved for share ROM


+3VM_SPI +3VM_SPI2
R2.0 12/15 D2803
SHARE ROM CONFIG1 @ D2802 @
+3VA_EC 2 1 1 +3VA_EC 2 /SPI6M 1 1 co-lay
R2867 0Ohm R2872 0Ohm
U2801 @ +3VSUS 2 1 2
3
+3VSUS 2 1 2
3
(4MB)
R2863 @ 0Ohm R2870 @ 0Ohm U2805 /SPI4M

D
U2802 @ 2
1V/0.2A
1 R2868 2
1V/0.2A
1 0Ohm
1
2
CS#
DO(IO1)
VCC
HOLD#(IO3)
8
7 +3VM_SPI
D
R2848 0Ohm /SPI6M 3 6
WP#(IO2) CLK
U2803 ME+BIOS+EC 4MB 4
GND DI(IO0)
5

MX25L3206EM2I-12G

2
C2803
ummount: 05V000000005 0.1UF/25V R2836
R2855, R2856, R2864, R2865, R2853, 3.3KOhm

2
U2801
R2852, R2834, R2850, R2851, R2832, /SPI6M (2MB)

1
C2803, U2802,R2869, R2870, R2868, 30 SPI_CS#1_EC
R2858 2 /SPI4M 1 0Ohm SPI1_CS#0 20 SPI_CS#0
R2860 2 1 0Ohm SPI1_CS#0 1
CS# VCC
8
D2802, U2801 30 SPI_SO_EC
R2864 2 /SPI4M 1 0Ohm SPI1_SO 20 SPI_SO
R2859 1 1% 2 33Ohm SPI1_SO 2 7
SO/SIO1 HOLD#
+3VM_SPI R2834 1 2 3.3KOhm +3VM_SPI1_WP# 3 6 SPI1_CLK R2849 1 2 33Ohm 1%
SPI_CLK 20
R2855 2 /SPI6M WP#/ACC SCLK
1 0Ohm SPI2_CS#1 4 5 SPI1_SI R2852 1 2 33Ohm 1%
SPI_SI 20
GND SI/SIO0
R2856 2 /SPI6M 1 0Ohm SPI2_SO
MX25L1606EM2I-12G
SHARE ROM CONFIG2 05V000000010
R2866 2 /SPI4M 1 0Ohm SPI1_CLK +3VM_SPI2
U2801 ME Firmware 2MB 30 SPI_CLK_EC
30 SPI_SI_EC
R2869 2 /SPI4M 1 0Ohm SPI1_SI

R2871 2 /SPI6M 1 0Ohm SPI2_CLK


R2865 2 /SPI6M 1 0Ohm SPI2_SI
U2802 EC+BIOS 4MB

2
C2804
0.1UF/25V R2832
/SPI6M 3.3KOhm

2
U2804 /SPI6M
ummount: /SPI6M

1
R2858, R2862, R2866, R2867, U2803 20 SPI_CS#1
R2853 2 /SPI6M 1 0Ohm SPI2_CS#1 1
CS# VCC
8
R2854 1 /SPI6M 2 33Ohm 1% SPI2_SO 2 7 SPI2_HOLD#
R2835 1 /SPI6M DO(IO1) HOLD#(IO3)
+3VM_SPI2 2 3.3KOhm +3VM_SPI2_WP# 3 6 SPI2_CLK R2850 1 /SPI6M 2 33Ohm 1%
WP#(IO2) CLK SPI2_SI R2851 1 /SPI6M 33Ohm 1%
4 5 2
GND DI(IO0)

MX25L3206EM2I-12G
05V000000005 (4MB)

C
<6.5 inch <6.5 inch
32Mb (05V000000005) C

PCH EC 0500-00NF000 WINBOND/W25Q32BVSSIG


SPI ROM
0500-00VV000 MXIC/MX25L3206EM2I-12G

+3VS
SPI Debug Connector PCH SMBus
SMBUS Link device
eDP

1
+12VS WLAN
R2803 R2804 CPU XDP
4.7KOhm 4.7KOhm PCH XDP

2
+3VSUS
+3VS

2
layout space issue, so remove J2801.

21 SCL_3A 6 1 SMB_CLK_S 17,53,59


B B
Q2801A
PCH UM6K1N

5
21 SDA_3A 3 4 SMB_DAT_S 17,53,59

Q2801B
UM6K1N

1 @ 2 +12VSUS
R2801 0Ohm
1 2 +12VS
R2802 0Ohm

+3VS +3VSUS
2

Q2802A
UM6K1N
30,50,74 SMB1_CLK 1 6 SML1_CLK 21

PCH
EC, VGA Thermal
5

Q2802B
UM6K1N
30,50,74 SMB1_DAT 4 3 SML1_DAT 21

A
SMB1_CLK_Thermal 30,50,74
+3VS A

SMB1_DAT_Thermal 30,50,74 Plamrest Thermal


Joyoung R1.0

Title : PCH(9)_SPI,SMB
PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 28 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : CLK_ICS9LRS3197
PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg
Size Project Name Rev
Custom JM50 3.1
Date: Thursday, August 23, 2012 Sheet 29 of 93
5 4 3 2 1
5 4 3 2 1

+3VA_EC +3VA_EC 28,32


+3VS +3VS 17,20,21,22,23,24,25,26,27,28,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92
+3VSUS +3VSUS 4,22,24,28,60,81,92
+3VA +3VA 6,20,26,27,31,57,59,60,81,88,93

+3VA +3VA_EC

For NPCE795 Power L3001


120Ohm/100Mhz
EIH 1 2
GND

81 USBCHG_EN
KB_ID0 SCRL_LED#/NC 1 T3005 R1.1 IOAC 10/31

+3VA_EC
1 2 T3017 T3018 T3019
59 PWR_LED_standby# RF_ON 25,53 +3VA_EC
5,9,21 DRAMRST_CNTRL_PCH 1 /DS3 2 3G_ON#/NC R3010 0Ohm
USBP02_EN 52
D R3024 0Ohm VSUS_ON_EC SP3002 1 2 D
22 SUSACK# VSUS_ON 57,81,91,93

1
R1.1 11/02 Remove short pin, have 0 ohmat PCH side
25 A20GATE USBP03_EN 52 +3VA_EC
25 RCIN# CHG_LED_BLUE# 59 EIH

1
57,91 SUSC_EC# AC_IN_OC 74,88
AC_IN_OC is active high, C3004 C3005
24,57,91,92 SUSB_EC# VRM_PWRGD 80,92
EC_CLK_EN/NC 1 T3006 OD pull high at power 10UF/10V 0.1UF/16V
20,44,59 INT_SERIRQ

2
1

1
RF_DET#
RF_DET# 53
VREF C3001 C3002 C3003
EC_AGND
R2.1 01/18 10UF/10V 0.1UF/16V 0.1UF/16V GND

2
GND +3VACC
+3VACC
+3VS 1 2
GND R3001 0Ohm

1
1
R3047 1 2 C3007
1KOhm R3002 0Ohm C3006 0.1UF/16V

2
0.1UF/16V

2
20,44,59 LPC_AD0 1 47Ohm 2 RNX3004A LAD0

1
20,44,59 LPC_AD1 3 47Ohm 4 RNX3004B LAD1 GND EC_AGND EC_AGND
20,44,59 LPC_AD2 5 47Ohm 6 RNX3004C LAD2 GND
20,44,59 LPC_AD3 7 47Ohm 8 RNX3004D

2
U3001

1
NPCE794LA0DX R1.3 R3048 C3010

128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
100KOhm
1UF/10V

2
LAD2
LAD1
LAD0
SERIRQ
GPIO10/LPCPD#
GPIO67/PWUREQ#
KBRST#/GPIO86
GPIO85/GA20
GPIO31/SDA3
GPIO23/SCL3

GPIO20/TA2/IOX_DIN_DIO
GND6
VCC5
GPIO16

GPO84/IOX_SCLK/XORTR#
GPO83/SOUT_CR/TRIST#
GPO82/IOX_LDSH/TEST#
GPIO30
GPIO05
GPIO97
GPIO96/DA2
GPIO95/DA1
GPIO21/B_PWM

GPIO87/SIN_CR

VREF
AGND

1
EC_AGND Change to 5%
R1.3

LAD3 1 102
2
LAD3 AVCC
101
+3VACC For PU / PD
24 CLK_KBCPCI_PCH LCLK GPIO94/DA0 ME_PWROK 22
3 100 ME_PM_SLP_LAN# Remove short pin, have short pin at PCH side
20,44,59 LPC_FRAME# LFRAME# GPIO93/AD3 ME_PM_SLP_LAN# 22 +3VA_EC
+3VS 4 99 G_Y_OUT/ME_+VM_PWRGD/NC No cap sensor
R2.0 12/13 VDD GPIO92/AD2 ME_PM_SLP_M# +3VA_EC
GND 5 98 ME_PM_SLP_M# 22 Remove short pin, have short pin at PCH side
R1.1 IOAC, 10/31 GND1 GPIO91/AD1 R2.0 12/20
53,81 IOAC_EN 1 2 6 97 AD_IINP 88
R3023 /IOAC 0Ohm GPIO24 GPIO90/AD0 R1.1 IOAC /10/31 R3025
4,24,32,33,53,59,70 BUF_PLT_RST# 7 96 BAT1_IN_OC# 90 1 10KOhm 2 G_Y_OUT/ME_+VM_PWRGD/NC R3012 1 10KOhm 2 LID_SW#
LRESET# GPIO04
22,59 PM_CLKRUN# 8 95 PWR_SW# 59
GPIO11/CLKRUN# GPIO03 R3004
25,44 EXT_SMI# 9 94 1 2 BT_ON 25,53,61 1 2 100KOhm BAT1_IN_OC# R2.1 01/18
C GPIO65/SMI# GPIO07 no DISTP_LED# R3014 1 C
59 TP_CLK 10 93 no RF Switch 2 0Ohm LAN_WAKE# 22,33 R3026 1 10KOhm 2 WLAN_WAKE#
GPIO26/PSCLK2 GPIO06/IOX_DOUT F_SCK_EC R3003 0Ohm R3005 @
59 TP_DAT 11 92 SPI_CLK_EC 28 1 2 47KOhm BAT2_IN_OC# R2.0 12/13
SP3006 VCCIO_CPU_EC GPIO27/PSDAT2 F_SCK R3015
+VCCP 1 2 12 91 CPU_VRON 80 1 10KOhm 2 LAN_WAKE#
VTT GPIO81 F_CS0#_EC
25 H_PECI_EC
NB_R0402_20MIL_SMALL 13 90 SPI_CS#1_EC 28
R3029 2 1 4.7KOhm SMB0_CLK R1.1 IOAC
PECI F_CS0# R3030
ER 1129 22 ME_AC_PRESENT 14 89 GND 2 1 4.7KOhm SMB0_DAT 10/31
T3016 NUM_LED# GPIO34 GND5 R3016
Remvoe the VPS 1 15 88 +3VA_EC 1 10KOhm 2 PWR_SW#
GPIO36 VCC4 F_SDIO_EC
31 KB_LED_PWM 16 87 SPI_SI_EC 28
GPIO40/F_PWM F_SDIO&F_SDIO0 F_SDI_EC +3VS R3027
22 PM_PWRBTN# 17 86 SPI_SO_EC 28
0606 R3.1 1 10KOhm 2 @ RF_DET#
GPIO42/TCK F_SDI&F_SDIO1 R2.1 01/18
GND 18 85 EC_RST# 22,32
GND2 VCC_POR# PRECHG/NC T3011
+3VA_EC 19 84 1
VCC1 GPIO77 SHBM T3012 R3031
22 PM_RSMRST# 20 83 1 2 1 4.7KOhm SMB1_DAT
GPIO43/TMS GPO76/SHBM 3G_ON# T3023 R3032
92 ALL_SYSTEM_PWRGD 21 82 1 2 1 4.7KOhm SMB1_CLK
GPIO44/TDI GPIO75
59 CHG_LED_ORANGE# 22 81 FAN0_PWM 50
T3003 BAT2_IN_OC# GPIO45/E_PWM GPIO66/G_PWM WLAN_WAKE#
1 23 80 WLAN_WAKE# 53
GPIO46/TRST# GPIO41 Remove PU to TP CON side.
22 PM_SUSC# 24 79 ME_SUSPWRDNACK 22
GPIO47/SCL4 GPIO02
45 LCD_BACKOFF# 25 78 GND
T3008 CAP_LED# GPIO50/PSCLK3/TDO GND4
1 26 77 SUSCLK 22
GPIO51 GPIO00/EXTCLK PM_SUSB# R3006
4 THRO_CPU 27 76 +3VA_EC 1 2 100KOhm
GPIO52/PSDAT3/RDY# VCC3 PM_SUSC# R3007
81,92 SUS_PWRGD 28 75 LID_SW# 31,45 1 2 100KOhm Joyoung R1.0
GPIO53/SDA4 GPIO72 +3VS
21,59 EXT_SCI# 29
ECSCI#/GPIO54 GPIO71
74 PM_SUSB# 22 R1.1 for GPU off logic control.
22,91 SLP_SUS# 30 73 OP_SD# 37
USB_CB1 GPIO55/CLKOUT/IOX_DIN_DIO GPIO70 VGA_THRALARM# CPU_VRON R3009
52 USB_CB1 31 72 VGA_THRALARM# 74 JM50 ADPS FUNC 1 2 100KOhm R3022 1 10KOhm 2 VGA_THRALARM#
GPIO56/TA1 GPIO37/PSCLK1
59 PWR_LED# 32
33
GPIO15/A_PWM GPIO35/PSDAT1
71
70
KB_BL_DET 31 EIH R3017 1 10KOhm 2 A20GATE
31 KSO17 GPIO57/KBSOUT17 GPIO17/SCL1 SMB0_CLK 60,88
34 69 No cap sensor
31 KSO16 GPIO60/KBSOUT16 GPIO22/SDA1 SMB0_DAT 60,88
35 68 R3018 1 10KOhm 2 RCIN#
31 KSO15 KBSOUT15/GPIO61/XOR_OUT GPIO74/SDA2 SMB1_DAT 28,50,74
36 67 PM_RSMRST# R3011 1 2 10KOhm R3019 2 1 4.7KOhm SUSB_EC#
31 KSO14 KBSOUT14/GPIO62 GPIO73/SCL2 SMB1_CLK 28,50,74
37 66 R3021 2 1 4.7KOhm SUSC_EC#
31 KSO13 KBSOUT13/GPIO63 GPIO33/H_PWM EC_SPKR 36
31 KSO12 38 65 LCD_BL_PWM 45
KBSOUT12/GPIO64 GPIO32/D_PWM AC_IN_OC is pulled high at power
KBSOUT11&P80_DAT
KBSOUT10&P80_CLK

GND
KBSOUT9/SDP_VIS#

KBSOUT0/JENK#

+3VSUS
KBSOUT4/JEN0#

GND R2.0 12/14


KBSOUT6/RDY#

GPIO13/C_PWM
KBSOUT5/TDO

KBSOUT2/TMS
KBSOUT1/TCK

@
KBSOUT3/TDI

GPIO14/TB1
GPIO01/TB2

R3020 1 210KOhmPM_PWRBTN#
KBSOUT8
KBSOUT7

VSUS_ON R3008 2 100KOhm


794L:06V380000003 1
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

@
VCORF
GND3
VCC2

795L:06V380000001 (BOM use)


GND 10KOhm 2 1 R3013 3G_ON#
Remove Vsus_ON pull hight to +3VSUS
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

10KOhm 1 2 R3028 RF_DET#


B B
+3VA_EC R2.1 01/18 Pull down for nc
GND Joyoung R1.1
100KOhm 2 1 R3054 VSUS_ON

R1.1 For IOAC, 10/31 PLT_RST# R1.3 VSUS_ON Pull High to +3VA_EC

31 KSO11 FAN0_TACH 50
31 KSO10 WLAN_RST# 53 R1.1
31 KSO9 PM_PWROK 4,22,92
31 KSO8 KSI7 31 JRST3001
31 KSO7 KSI6 31
GND 1UF/10V 2 1 C3009 KSI5 31 2 1 SCRL_LED#/NC
GND KSI4 31 2 1
+3VA_EC KSI3 31
31 KSO6 KSI2 31 SGL_JUMP
31 KSO5 KSI1 31
@ Joyoung R1.0
31 KSO4 KSI0 31
EC REQUEST
31 KSO3 KSO0 31
for ROM clear
31 KSO2 KSO1 31

A A

Title : NPCE794L

WWW.AliSaler.Com
Engineer: Joyoung_Chianhg
Size Project Name Rev
Custom JM50 1.3
Date: Thursday, August 23, 2012 Sheet 30 of 93
5 4 3 2 1
5 4 3 2 1

+5VS +5VS 27,36,37,45,48,50,51,57,80,87,91

+3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+3VA +3VA 6,20,26,27,30,57,59,60,81,88,93

D D

KB backlight R3.1 Add 4P CON for KB Backlight Kevin 0601

LID Switch SR-85


R1.0 change net name. Joyoung 0630
0606 R3.1
+5VS
R3103
/KBL 0Ohm @ C3102 +3VA
12V18GWSM064
1 2 1 2 GND FPC_CON_4P
0.1UF/10V 1 5
1 SIDE1 C3101
2 1 2 0.1UF/10V
47KOhm KB_BL_DET_R 2
30 KB_BL_DET 2 /KBL 1 R3104 3
KB_LED_PWM_R 3
4 6
4 SIDE2
1

1
J3102 /KBL AH180-WG-7
R3102 R3101
100KOhm 0613 R3.1 EMI 100KOhm 1
0613 R3.1 EMI Vdd
3
GND
2

2
GND LID_SW# 2
+3VS 30,45 LID_SW# OUTPUT
GND U3101
1

1
/KBL D3150 D3151
1

1
R3105 Q3101 C3152 GND
10KOhm 3
D
C @ /KBL /KBL C
2

2
33PF/50V @ @
2

1 TVL040201AB0 C3153 TVL040201AB0


30 KB_LED_PWM
2

2
G 07V180000008 33PF/50V 07V180000008
S
IRFML8244TRPBF 2

GND GND GND

Keyboard
12V18ABSM012
FPC_CON_26P
B B

26 KSO0 KSO0 33PF/50V 7 8 CN3105D


26 KSO0 30
28 25 KSO1 KSO1 33PF/50V 5 6 CN3105C
GND2 25 KSO1 30
24 KSO2 KSO2 33PF/50V 3 4 CN3105B
24 KSO2 30
23 KSO3 KSO3 33PF/50V 1 2 CN3105A
23 KSO3 30
GND 22 KSO4 KSO4 33PF/50V 7 8 CN3102D
22 KSO4 30
21 KSO5 KSO5 33PF/50V 5 6 CN3102C
21 KSO5 30
20 KSO6 KSO6 33PF/50V 3 4 CN3102B
20 KSO6 30
19 KSO7 KSO7 33PF/50V 1 2 CN3102A
19 KSO7 30
18 KSO8 KSO8 33PF/50V 7 8 CN3103D
18 KSO8 30
17 KSO9 KSO9 33PF/50V 5 6 CN3103C
17 KSO9 30
16 KSO10 KSO10 33PF/50V 3 4 CN3103B
16 KSO10 30
15 KSO11 KSO11 33PF/50V 1 2 CN3103A
15 KSO11 30
14 KSO12 KSO12 33PF/50V 7 8 CN3101D
14 KSO12 30
13 KSO13 KSO13 33PF/50V 5 6 CN3101C
13 KSO13 30
12 KSO14 KSO14 33PF/50V 3 4 CN3101B
12 KSO14 30
11 KSO15 KSO15 33PF/50V 1 2 CN3101A
11 KSO15 30
10 KSO16 KSO16 33PF/50V 7 8 CN3106D
10 KSO16 30
9 KSO17 KSO17 33PF/50V 5 6 CN3106C
9 KSO17 30
8 KSI0 KSI0 33PF/50V 3 4 CN3106B
8 KSI0 30
7 KSI1 KSI1 33PF/50V 1 2 CN3106A
7 KSI1 30
6 KSI2 KSI2 33PF/50V 7 8 CN3104D
6 KSI2 30
5 KSI3 KSI3 33PF/50V 5 6 CN3104C
5 KSI3 30
4 KSI4 KSI4 33PF/50V 3 4 CN3104B
4 KSI4 30
3 KSI5 KSI5 33PF/50V 1 2 CN3104A
3 KSI5 30
27 2 KSI6 KSI6 33PF/50V 3 4 CN3107B
GND1 2 KSI6 30
1 KSI7 KSI7 33PF/50V 1 2 CN3107A
1 KSI7 30
GND
J3101 R2.1 01/17

The pin define is checked to keyboard spec. R is KSO, C is KSI. The connector pin define is the same the KB.

need check

A A

Title : EC_IT8512(2)KB, TP,FP


Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 31 of 93
5 4 3 2 1
5 4 3 2 1

+VCCP +VCCP 3,4,6,7,30,57,82

+3VA_EC +3VA_EC 28,30


D +3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,31,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92 D

R1.1 +3VS +3VS

add for NV FAE request


choke temp sense.
Thermal Policy

2
R3208 R3206
10KOhm 10KOhm
@

1
JM50_T 05/08
Q3203B Q3203A JM50_T 05/24

6
UM6K1N UM6K1N
@ @
87 VGA_HOT# 5 2

1
C C

74 VGA_OVERTEMP# SP3202 1 2 R0402

50 PR_OVERTEMP# 0Ohm 1 @ 2 R3207 PR_OVERTEMP#_R

+3VA_EC
NPCE795 has internal power-on reset circuit
Use 47k ohm to make sure that raising time of POR is less than 10us

50,92 CPU_THERM# SP3201 1 2


NB_R0402_20MIL_SMALL R3204 2 1 47KOhm

1
2
Q3202A D3202 2 1 1.2V/0.1A
UM6K1N

6
81,92 FORCE_OFF# D3203 2 1 1.2V/0.1A EC_RST# 22,30

1
Q3202B C3201
4,24,30,33,53,59,70 BUF_PLT_RST# 5 UM6K1N 4.7UF/6.3V
@

2
+VCCP 3
C
2 R3201 1 1 B Q3201
330Ohm PMBS3904
E
B 2 B

4,25 H_THRMTRIP#

A A

Title : RST_Reset Circuit


<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev

WWW.AliSaler.Com
5 4 3 2
Custom
Date:
JM50
Thursday, August 23, 2012
1
Sheet 32 of 93
3.1
5 4 3 2 1

+VDD1.2_LAN

+VDD1.2_LAN

1
D D
C3321 C3315 C3316 L3311
C3354 +VDD_GPHYPLL 1 2
0.1UF/10V 0.1UF/10V 0.1UF/10V
4.7UF/6.3V

2
Close to LAN chip within 250mils

1
C3351 1KOhm/100Mhz
C3350
0.1UF/10V 4.7UF/6.3V 09V010000038
PCIE_RXP4_LOM C3334 1 0.1UF/10V

2
2
PCIE_RXP4_GLAN 21
PCIE_RXN4_LOM C3339 2 1 0.1UF/10V PCIE_RXN4_GLAN 21

PCIE_TXP4_GLAN
PCIE_TXP4_GLAN 21
PCIE_TXN4_GLAN
PCIE_TXN4_GLAN 21 +VDD1.2_LAN

+VDD33_LOM L3318
CLK_PCIE_LAN
CLK_PCIE_LAN 21 +3VS +VDD_LANPLL 1 2
CLK_PCIE_LAN#
CLK_PCIE_LAN# 21
1KOhm/100Mhz

1
C3360 C3359 09V010000038
R3304
0.1UF/10V
1KOhm 4.7UF/6.3V

2
2
+VDD1.2_LAN
L_TRDP3 34 R1.1 R1.2-26 EMI
L3314 L_TRDN3 34
change pin define. L3317 +VDD1.2_LAN

EEDAT
EECLK
VDDC LX

AVDDL
VDDC
R1.0 Remove PU R for FAE suggestion.

VDDO
4.7UH
1

C3313 C3331 AVDDL


0.1UF/10V

1
10UF/6.3V R1.0 chnge VPR1.1
P/N. C3358 C3357
2

49
48
47
46
45
44
43
42
41
40
39
38
37
Delete R5308 for unuse. 0.1UF/10V 4.7UF/6.3V
U3301 1.5KOhm/100Mhz

2
09V010000039

LINKLED#
GND

SPD100LED#
SPD1000LED#
TRAFFICLED#

VDDC3

AVDDL3

TRD3_N
VDDO

VMAIN_PRSNT
EECLK
EEDATA

TRD3_P
@
C Frank 0Ohm
C
0503 LAN_LPWR is not defined GPIO in PCH . 25 LAN_LPWR
R3312 2 1 LAN_LPWR_R 1 36 AVDDH R1.1 10/31 EMI CHANGE
LOW_PWR AVDDH2
4,24,30,32,53,59,70 BUF_PLT_RST# 2 35 L_TRDN2 34
R3321 2 PERST# TRD2_N
21 CLK_REQ_LAN# 1 0Ohm 3 34 L_TRDP2 34
PCIE_WAKE#_LAN CLKREQ# TRD2_P AVDDL
4 33
+VDD33_LOM WAKE# AVDDL2 +VDD33_LOM
5
MODE TRD1_P
32 L_TRDP1 34 R1.1
R1.1 IOAC 10/31 VDDC 6 31
VDDC1 TRD1_N L_TRDN1 34 change pin define.
+VDD33_LOM 7 30 AVDDH L3312
+VDD1.2_LAN VREGPNP_CTL AVDDH1 AVDDH

PCIE_REFCLK_N
NB_R0603_32MIL_SMALL

PCIE_REFCLK_P
8 29 1 2

PCIE_PLLVDDL1

PCIE_PLLVDDL2

GPHY_PLLVDDL
SR_VFB TRD0_N L_TRDN0 34
SP3302 1 2 SR_VDD 9 28
SR_VDD TRD0_P L_TRDP0 34

PCIE_RXD_N
PCIE_RXD_P
PCIE_TXD_N
PCIE_TXD_P
10 27 AVDDL 1KOhm/100Mhz

XTALVDDH
SR_VDDP AVDDL1

1
BUF_PLT_RST# R3337 @ 4.7KOhm LX RDAC R3303 1 2 1.24KOhm C3337 C3340
1

1 2 11 26 09V010000038
XTALI SR_LX RDAC BIASVDD

1
12 25

VDDC2
XTALO
C3310 C3338 XTALI BIASVDDH 10V220000198 0.1UF/10V 0.1UF/10V
PCIE_WAKE#_LAN R3331 1 @ 2 4.7KOhm

2
4.7UF/6.3V 0.1UF/10V
2

2
BCM57780A0KMLG

13
14
15
16
17
18
19
20
21
22
23
24
02V0H0000001

+VDD33_LOM

+VDD_GPHYPLL
XTALO

VDDC

+VDD_LANPLL

+VDD_LANPLL
XTALVDD L3313
XTALVDD 1 2

1
C3353 1KOhm/100Mhz

PCIE_TXN4_GLAN
PCIE_TXP4_GLAN
R3110

PCIE_RXN4_LOM
PCIE_RXP4_LOM
X3303 25MHZ

CLK_PCIE_LAN#
09V010000038

CLK_PCIE_LAN
0.1UF/10V
XTALO 1 2 XTALO_R 1 3 XTALI

2
200Ohm
2

+VDD33_LOM
+VDD33_LOM
C3333 C3332 +VDD33_LOM
15PF/50V 15PF/50V
1AV200000005 1AV200000005 L3316
BIASVDD 1 2

1
C3314

1
C3356 1KOhm/100Mhz
B R3306 R3305 B
1KOhm 1KOhm 0.1UF/10V 0.1UF/10V 09V010000038

2
R1.1 @

2
U3302
change value for -R test report

1
8 1
VCC A0
7 2
EECLK WP A1
@ 6 3
EEDAT SCL A2
5 4
SDA GND

2
AT24C02C-XHM-T

R1.1 10/31 EMI CHANGE


R1.0 R3308 R3307
1KOhm 1KOhm
05V020000003

R2.0 12/15
+3VSUS_ORG +VDD33_LOM OTP mode @ @

1
L3320
1 2

1.5KOhm/100Mhz
1

C3320
1

09V010000039
C3352 0.1UF/10V
2

4.7UF/6.3V
2

R3340
10KOhm
1
G

LAN_WAKE# PCIE_WAKE#_LAN
3

S 2

22,30 LAN_WAKE#
D

R1.1 IOAC 10/31


2N7002
Q5306
@
0Ohm
A R3313 2 1 A

Title : LAN_BCM57780
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 33 of 93
5 4 3 2 1
5 4 3 2 1

Joyoung R1.0
FAE suggest common mode choke is on chip side.
LTRLM3 3 4 RN3400B LTRLM3_R
0Ohm
R1.1 Add 0 OHM for FAE suggestion 0809
JM50: FAE suggest remove
09V090000007

2
R1.1 Swap L_TRDP3 L_TRDN3 & L_TRDP1 L_TRDN1 67ohm
R1.1 remove CAP of V_DAC_3, V_DAC_2 and V_DAC_1 for FAE suggestion R1.1 Mount R3401~R3403 for FAE suggestion 0809 L3401 @
D D
R1.1 Remove R3405~R3407 & C3409

3
U3402
LTRLP3 1 2 RN3400A LTRLP3_R
0Ohm
33 L_TRDP0 23 2 LTRLP0
MX1+ TD1+
0.1UF/16V 2 1 C3407 V_DAC_0 24 1 L_CMT0 R3403 1 2 75Ohm
MCT1 TCT1

33 L_TRDN0 22 3 LTRLM0 LTRLP2 3 4 RN3402B LTRLP2_R


MX1- TD1- 0Ohm

33 L_TRDN1 20 5 LTRLM1 09V090000007


MX2+ TD2+

2
0.1UF/16V 2 V_DAC_1 21 L_CMT1 67ohm
1 C3406 4 R3404 1 2 75Ohm
MCT2 TCT2 L3402 @
33 L_TRDP1 19 6 LTRLP1

3
MX2- TD2-

33 L_TRDP2 17 8 LTRLP2 LTRLM2 1 2 RN3402A LTRLM2_R


MX3+ TD3+ 0Ohm
0.1UF/16V 2 1 C3404 V_DAC_2 18 7 L_CMT2 R3402 1 2 75Ohm
MCT3 TCT3

33 L_TRDN2 16 9 LTRLM2
MX3- TD3- LTRLM1 LTRLM1_R
3 0Ohm 4 RN3403B

33 L_TRDN3 14 11 LTRLM3
MX4+ TD4+
09V090000007

2
0.1UF/16V 2 1 C3403 V_DAC_3 15 10 L_CMT3 R3401 1 2 75Ohm
MCT4 TCT4 67ohm
13 12 LTRLP3 L3403 @
33 L_TRDP3 MX4- TD4-

3
GST5009
09V120000003
LTRLP1 1 2 RN3403A LTRLP1_R
0Ohm
R1.1 unmount C3409 for FAE suggestion
Joyoung R1.0 R1.0 Change Transformer to smaller

1
C but higher.(joyoung 0904) C3405
LTRLP0 LTRLP0_R
C
1500PF/2KV 3 4 RN3404B
0Ohm

2
Need check for Pin+/- Swap
09V090000007

2
67ohm
LAN_GND L3404 @
PR_S12

3
Co-lay C3409 & C3411
Co-lay C3410 & C3412 LTRLM0 1 2 RN3404A LTRLM0_R
0Ohm

LAN layout note: RJ45


MOAT J3401
LAN_GND P_GND2
9
GND LTRLP0_R 1
LTRLM0_R 1
2
LTRLP1_R 2
3
LTRLP2_R 3
4
LTRLM2_R 4
U3401 J3401 5
5
LTRLM1_R 6
LTRLP3_R 6
7
LTRLM3_R 7
8
8
10
P_GND1

LAN_JACK_8P
12V23GBSD008

B LAN_GND B

Change RJ45 CON3401


R1.0 Reserve D3401 for EMI.
EMI Req
R1.1 EMI Request 4.7PF & Set Close to Connector, then removed all R3409 1 2 0Ohm
10V440000001

R3408 1 2 0Ohm
10V440000001 R1.0 Mount R3408 for FAE suggestion
@
10PF/50V 2 1 C3420

10PF/50V 2 1 C3421

10PF/50V 2 1 C3422

LAN_GND

A A

Title : RJ45
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 34 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : MDC CONN


<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 35 of 93
5 4 3 2 1
5 4 3 2 1

+12VS +12VS

+5VS +5VS 27,31,37,45,48,50,51,57,80,87,91

1
SP3603 SP3604 +3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,31,32,33,37,44,45,48,50,51,53,57,59,61,80,91,92

2
2
UM6K1N

5
D D
Q3604A 6 1
UM6K1N
Q3604B 3 4
R3603 1 2 0Ohm ACZ_SYNC_AUD_R
20 ACZ_SYNC_AUD
@
R3618 1 2 0Ohm ACZ_SDOUT_AUD_R
20 ACZ_SDOUT_AUD
@
+5VS_AMP +5VS H_SPKR+ 37
H_SPKR- 37
H_SPKL- 37 R3609 1 2 0Ohm
SP3606 H_SPKL+ 37 @
1 2

R0805
+5VS_AMP +5VS_AMP R3608 1 2 0Ohm
@

R3607 1 2 0Ohm

1
vx_c0603_small
C3615 C3609 C3623 C3620
10UF/6.3V 0.1UF/16V 0.1UF/16V 10UF/6.3V

2
+5VS +5VS_AUDIO
vx_c0603_small R3604 1 2 0Ohm
L3603 @
1 2

80Ohm/100Mhz vx_c0603_small +5VS_AUDIO GND_AUDIO


09V010000023 37 EAPD

1
@

1
H_SPKR+

H_SPKL+
C3639 T3602 vx_c0603_small

H_SPKR-
1

H_SPKL-
10UF/6.3V C3608 C3610

2
+3VS +3VS_DVDD 0.1UF/16V 10UF/6.3V

2
L3602
1 2
C C
120Ohm/100Mhz GND_AUDIO

49
48
47
46
45
44
43
42
41
40
39
38
37
1

2
U3601A
C3616 C3617 C3618

PVDD2

PVSS2
PVSS1

PVDD1
AVDD2
AVSS2
GND

EAPD

SPK-OUT-R+

SPK-OUT-L+
SPDIFO

SPK-OUT-R-

SPK-OUT-L-
vx_c0603_small 10UF/6.3V 0.1UF/16V 0.1UF/16V
2

1
@

C3626
1 36 1 2 2.2UF/6.3V
DVDD CBP 2.2UF/6.3V
45 DMIC_DAT 2 35
GPIO0/DMIC-DATA CBN C3627 1
45 DMIC_CLK 3 34 2 GND_AUDIO
GPIO1/DMIC-CLK CPVEE AC_HP_R
37 MUTE_AMP# 4 33 AC_HP_R 37
ACZ_SDOUT_AUD_R PD# HPOUT-R(PORT-I-R) AC_HP_L
5 32 AC_HP_L 37
SDATA-OUT HPOUT-L(PORT-I-L)
2

C3634 20 ACZ_BCLK_AUD ACZ_BCLK_AUD 6 31 MIC1_VREFO 1 T3608


C3637 BCLK MIC1-VREFO-L MIC_VREFO T3609
7 30 1
150PF/50V 150PF/50V +3VS R3625 1 DVSS2 MIC1-VREFO-R
20 ACZ_SDIN0_AUD 2 33Ohm 8 29 MIC2_VREFO 37
1

SDATA-IN MIC2-VREFO AUD_LDO_CAP


9 28
DVDD-IO LDO-CAP

LINE1-R(PORT-C-R)
LINE2-R(PORT-E-R)
ACZ_SYNC_AUD_R VREF_CODEC

LINE1-L(PORT-C-L)
10 27

LINE2-L(PORT-E-L)

MIC1-R(PORT-B-R)
MIC2-R(PORT-F-R)

MIC1-L(PORT-B-L)
MIC2-L(PORT-F-L)
SYNC VREF
20,37 ACZ_RST#_AUD 11 26 GND_AUDIO
RESET# AVSS1
1

R2.1 01/10 PC_BEEP 12 25


PCBEEP AVDD1 +5VS_AUDIO
C3633 MIC1_VREFO

MONO-OUT
0.1UF/16V
2

MIC_VREFO

SenseA

SenseB
JDREF

1
ACZ_BCLK_AUD vx_c0603_small C3613
C3614 C3632 0.1UF/16V C3611 MIC2_VREFO
0.1UF/16V 10UF/6.3V 2.2UF/10V

2
1

ALC271X-VB6-CG AUD_LDO_CAP

13
14
15
16
17
18
19
20
21
22
23
24
@ C3629 02V0J0000016
22PF/50V
2

1
@ @ @
C3612 C3624 C3619 C3625
GND_AUDIO 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V

2
R3619 1 1% 2 39.2KOhm
37 HPOUT_JD#
T3607 1 MIC1_JD#

GND_AUDIO GND_AUDIO GND_AUDIO GND_AUDIO


T3610 1 INT_MIC_AC_IN_L vx_c0603_small vx_c0603_small vx_c0603_small vx_c0603_small
B B
T3611 1 INT_MIC_AC_IN_R
EXT_MIC_AC_IN_R 1 T3605
EXT_MIC_AC_IN_L 1 T3606
1

R3616
37 MIC2_L 20KOhm
37 MIC2_R 1%
2

R3620 2 1% 1 20KOhm
37 MIC2_JD#

GND_AUDIO

D3601
C3622
20 SB_SPKR 1
3 PC_BEEP_R 2 R3601 1 PC_BEEP_C 1 2 PC_BEEP
30 EC_SPKR 2 47KOhm
2

0.1UF/16V
1

1V/0.2A R3615
4.7KOhm C3621
100PF/50V
2

@ U3601B
1

50 57
GND1 GND8
51 56
GND2 GND7
52 55
GND3 GND6
53 54
GND4 GND5
ALC271X-VB6-CG
02V0J0000016

R2.1 01/10

R3606 1 @ 2 0Ohm R3602 1 @ 2 0Ohm

A A

R3611 1 2 0Ohm R3627 1 2 0Ohm


@ @

GND_AUDIO GND_AUDIO

Title : AUD(1)_ALC269
<OrgName> Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 36 of 93
5 4 3 2 1
5 4 3 2 1

+5VS +5VS 27,31,36,45,48,50,51,57,80,87,91

+3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,31,32,33,36,44,45,48,50,51,53,57,59,61,80,91,92

+5VS_AUDIO +5VS_AUDIO 36

D D

Internal Speaker Conn.


add R3706, R3707, R3708, R3709 for EMI request
J3704
36 H_SPKR+ R3706 1 2 0Ohm 1 5
R3707 1 SIDE1
36 H_SPKR- 1 2 0Ohm 2 MIC2_JD# 36
R3708 2
36 H_SPKL+ 1 2 0Ohm 3
R3709 3
36 H_SPKL- 1 2 0Ohm 4 6
4 SIDE2 3 R2.0 12/16
D
WtoB_CON_4P R1.1 10/31 KEVIN
12V17GIRM002 R3701 R1.1 10/31 KEVIN Q3701
COMBO_MIC 1 2 1 R3710 1 2 2.2KOhm
2N7002 36 MIC2_VREFO
G C3702 2.2UF/10V
22KOhm 2 S 1 2 MIC2_R 36

1
C3710 C3711 C3712 C3713
R3714
1000PF/50V 1000PF/50V 1000PF/50V 1000PF/50V C3701
@ @ @ @ 10UF/6.3V COMBO_MIC 1 2 1 2 MIC2_L 36

2
C3703 2.2UF/10V
1KOhm

2
GND_AUDIO GND_AUDIO
R3711
Need change 0702-0028000 in next stage 22KOhm
10V240000016
R1.1 Reserved for EMI & Change to 1000PF

1
GND_AUDIO

C C
add R3722, R3723 and C3723, C3725 change 100pFfor EMI request

ER1.11 J3701
COMBO_MIC L3701 1 2 120Ohm/100Mhz COMBO_MIC_CON M6

GND_AUDIO M5_1
M5_2
36 AC_HP_L 1 5% 2 L3703 1 2 120Ohm/100Mhz HP_L_CON M4
R3713 62Ohm
36 AC_HP_R 1 5% 2 L3702 1 2 120Ohm/100Mhz HP_R_CON M1
R3712 62Ohm GND_AUDIO MP

36 HPOUT_JD# HPOUT_JD# MQ

PHONE_JACK_7P

1
12V14GBSD015
R3716 R3715
@ 1KOhm @ 1KOhm need check

1
JM50_T 05/09 C3704 C3705 C3709

2
100PF/50V 100PF/50V 100PF/50V

2
GND_AUDIO GND_AUDIO
GND_AUDIO GND_AUDIO GND_AUDIO
JM50_T 05/11
+3VS +5VS
1

Close J6701
R3704 R3702 COMBO_MIC
@ 10KOhm 1KOhm COMBO_MIC
@ @

1
B B
D3702
2

1
RB751V-40 C3706 C3707 D3706
2 1 10PF/50V 33PF/50V
36 EAPD

2
@ @ ER1.32
D3701 BAT54AW
20,36 ACZ_RST#_AUD 1
3 GND_AUDIO
MUTE_AMP# 36
30 OP_SD# 2
@
1V/0.1A AZ2025-01H.R7G

2
R2.1 01/17 07V220000006

+5VA +5VS HPOUT_JD# HP_L_CON


HP_R_CON
GND_AUDIO
1

EMI request
R3705 R3703
100KOhm 10KOhm

1
D3704

1
D3705 D3703
C3708
2

MUTE_AMP#
1 2
3
D
Q3704 0.1UF/16V
1
G 2N7002
2 S AZ2025-01H.R7G GND GND_AUDIO

2
AZ2025-01H.R7G 07V220000006 AZ2025-01H.R7G
2

2
6

Q3705A 07V220000006 07V220000006


UM6K1N
OP_SD# 2
1

A A
3

Q3705B GND_AUDIO GND_AUDIO GND_AUDIO


UM6K1N
ACZ_RST#_AUD 5
4

Title : AUD(2)_AMP,JACK
GND <OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 37 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : AUD(3)_FM2010
<OrgName> Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 38 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : AUD(4)_****
<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
Custom JM50 3.1
Date: Thursday, August 23, 2012 Sheet 39 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : TPM_****
<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
B JM50 3.1
Date: Thursday, August 23, 2012 Sheet 40 of 93
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

D D

C C

B B

A A

Title : CB(2)_R5C833
<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 41 of 93
5 4 3 2 1
5 4 3 2 1

+3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+12V +12V 60,91

D D

C C

B B

A A

Title : CB(3)_4in1 CardReader


<OrgName> Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 42 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : CB(4)_NewCard
<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 43 of 93
5 4 3 2 1
5 4 3 2 1

+3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,31,32,33,36,37,45,48,50,51,53,57,59,61,80,91,92

D D

LPC Debug Port


C C

正正 cable.
0Ohm +3VS R1.1
R4410 @ FPC_CON_12P
1
change pin define to
LPC_AD0 1
20,30,59 LPC_AD0 2 2 SIDE1 13
3 3
20,30,59 LPC_AD1 LPC_AD1 4 4
25,30 EXT_SMI# 2 1 5 5
20,30,59 LPC_AD2 LPC_AD2 6 6
20,30,59 INT_SERIRQ 2 1 7 7
20,30,59 LPC_AD3 LPC_AD3 8 8
9 9
20,30,59 LPC_FRAME# LPC_FRAME# 10 10
11 11 SIDE2 14
24 CLK_DEBUG 12 12
0Ohm J4401
R4411
JM50_T 05/03
@

/DEBUG

B B

A A

Title : BUG_Debug
<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
B JM50 3.1
Date: Thursday, August 23, 2012 Sheet 44 of 93
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

+3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,31,32,33,36,37,44,48,50,51,53,57,59,61,80,91,92

LCD_BACK_EN +3VS_LCD +5VS +5VS 27,31,36,37,48,50,51,57,80,87,91

+12VS +12VS 28,36,48,91

+VCCP +VCCP 3,4,6,7,30,32,57,82

1
R4504 AC_BAT_SYS AC_BAT_SYS 53,81,87,88
D4501 10KOhm
1V/0.1A
30,31 LID_SW# LID_SW# 1

2
3
2
30 LCD_BACKOFF#
LCD VDDEN / +LED_VCC
D4502
D D
23 LCD_BKEN_PCH 2 1 LCD_BKEN_CON
0605 R3.1
RB751V-40 +LED_VCC AC_BAT_SYS

1
1 2 C4506 0Ohm R4523 use integreted IC to control +3VS_LCD
R4503 10KOhm 1UF/10V 1 2 Mount R4566=330ohm, No mount R4567 for G5244
@

2
10V340000001 C4526 C4527
C4508 C4507 47PF/50V 47PF/50V JM50_T 05/11
0.1UF/25V 0.1UF/25V R4568 560Ohm

1
@ 1 2
+3VS_LCD /LVDS +3VS
R4566 330Ohm
1 2
/EDP
U4503 0Ohm
1 5 1 R4567 2
OUT IN @
Touch Panel L_VDDEN_PCH
2
GND

23 L_VDDEN_PCH 3 4
/TPN EN DSG

1
24 USB_PP0 2 0Ohm 1 RN4524A G5244T11U
C4551

1
4.7UF/6.3V C4550

2
3

2
R2.3 04/27 USB_PP0_TP 1UF/6.3V
90Ohm/100Mhz USB_PN0_TP R4522

2
@ L4503 100KOhm
GND GND

1
+5VS TP_PWR D4503 D4504

1
/TPN L4501 24 USB_PN0 4 0Ohm 3 GND
1 2 RN4524B R1.1 Change R4566 to 560 ohm & C4551 to 4.7uf for LVDS Sequence
/TPN
1

80Ohm/100Mhz C4510 @ @ R2.0 Change R4566 to 330 ohm for eDP Sequence
09V010000023 0.1UF/16V JM50_T 04/27 TVL040201AB0 TVL040201AB0

2
/TPN 07V180000008 07V180000008 R3.1 Add R4568 560 ohm for LVDS Sequence
2

0614 R3.1
JM50_T 05/03
C GND JM50_T 05/03 C

R1.1 11/09

eDP +3VS LVDS Connector R1.1 11/03


+3VS_LCD
LVDS

1
C4512
1UF/10V

2
C4524 R1.1 11/07
3 DP_HPD#_PCH

2
12V371BSM002

2
3 Q4501 47PF/50V R2.0 12/15

32
D WTOB_CON_30P
2N7002 R4502 R4507 CMOS_PWR

1
/eDP 0Ohm 0Ohm 30

SIDE2
1 /LVDS USB_PN10_CON 30
29
G USB_PP10_CON 29
28

1
S 2 28

1
27
R4501 0614 R3.1 USB_PP0_TP 27
26 35
100KOhm JM50_T 0502 USB_PN0_TP 26 SIDE5
25
/eDP JM50_T 05/08 TP_PWR 25
24
TPN_INT# 24
25 TPN_INT# 23

2
23
22
DP_HPD R4508 0Ohm /eDP 22
1 2 21
R4509 0Ohm /LVDS EDID_CLK 21
23 EDID_CLK_PCH 1 2 20
R4510 0Ohm /LVDS EDID_DATA 20
23 EDID_DATA_PCH 1 2 19
R4511 0Ohm /eDP 19
1 2 18
C4501 LVDS_L0N LVDS_L0N 18
3 DP_TXN1_PCH 1 2 0.1UF/10V /eDP 23 LVDS_L0N_PCH R4514 1 0Ohm 2 /LVDS 17
C4502 LVDS_L0P LVDS_L0P 17
3 DP_TXP1_PCH 1 2 0.1UF/10V /eDP 23 LVDS_L0P_PCH R4515 1 0Ohm 2 /LVDS 16
16
15
C4503 LVDS_L1N LVDS_L1N 15
3 DP_TXN0_PCH 1 2 0.1UF/10V /eDP 23 LVDS_L1N_PCH R4516 1 0Ohm 2 /LVDS 14
C4504 14
3 DP_TXP0_PCH 1 2 0.1UF/10V /eDP LVDS_L1P 23 LVDS_L1P_PCH R4517 1 0Ohm 2 /LVDS LVDS_L1P 13 34
B 13 SIDE4 B
12
R4518 LVDS_L2N 12
23 LVDS_L2N_PCH 1 0Ohm 2 /LVDS 11
C4505 11
3 DP_AUXP_PCH 1 2 0.1UF/10V /eDP LVDS_L2N 23 LVDS_L2P_PCH R4519 1 0Ohm 2 /LVDS LVDS_L2P 10
C4509 LVDS_L2P 10
3 DP_AUXN_PCH 1 2 0.1UF/10V /eDP R4512 1 0Ohm 2 /eDP 9
R4520 9
23 LVDS_LCLKN_PCH 1 0Ohm 2 /LVDS LVDS_LCLKN 8
R4521 LVDS_LCLKP 8
23 LVDS_LCLKP_PCH 1 0Ohm 2 /LVDS 7
R4513 1 0Ohm 7
2 /eDP 6 33
C4515 @2 6 SIDE3
1 10PF/50V LCD_BACK_PWM 5
C4514 @2 LCD_BKEN_CON 5
1 10PF/50V 4
LCD_BL_PWM 3
4
3

SIDE1
ER1.27 +LED_VCC 2
2
1
1
L4506 1kOhm/100Mhz J4501

31
30 LCD_BL_PWM LCD_BL_PWM @ 2 1 LCD_BACK_PWM Frank
20110513 eDP and LVDS co-lay
1

L4507 1kOhm/100Mhz C4511


23 L_BKLT_CTRL L_BKLT_CTRL 2 1 1UF/10V
@
2

R1.3 Use PCH PWM for power saving

DMIC_PWR +3VS

Digital MIC R4505 R2.1 01/17 Camera


2 0Ohm 1
R2.0 12/20 R1.0
Remove unmount C R2.1 01/10
1

+3VS CMOS_PWR
C3721 L6806 24 USB_PN10 2 0Ohm 1 RN7423A
47PF/50V 2 1
2

0109
1

4
80Ohm/100Mhz C6808 USB_PN10_CON
C3735 C3738 0.1UF/16V 90Ohm/100Mhz USB_PP10_CON
47PF/50V 47PF/50V @ L6805
2

1
A 36 DMIC_DAT L4512 1 2 120Ohm/100Mhz DMIC_DAT_R A
GND 24 USB_PP10 4 0Ohm 3
L4513 1 2 120Ohm/100Mhz DMIC_CLK_R +3V @ RN7423B
36 DMIC_CLK
L6807
2 1
1

DMIC_PWR J4502
1

C3737 1 5 80Ohm/100Mhz
C3734 DMIC_DAT_R 1 SIDE1
47PF/50V 2
2

39PF/50V DMIC_CLK_R 2
3
2

3
4 6
4 SIDE2
WtoB_CON_4P
12V17GIRM002
Title : CRT(1)_LVDS
<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 45 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : CRT
BU1-RD Div.1-HW RD Dept.1 Engineer: Joyoung_Chianhg
Size Project Name Rev

WWW.AliSaler.Com
5 4 3 2
Custom
Date:
JM50
Thursday, August 23, 2012
1
Sheet 46 of 93
3.1
5 4 3 2 1

D D

C C

B B

A A

Title : CRT(3)_Display Port


<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 47 of 93
5 4 3 2 1
5 4 3 2 1

HDMI_TXP2 3 4 RN4801B HDMI_TXP2_CON


0Ohm
@

2
09V090000007

2
R4830
67ohm 220Ohm
L4801 @

1
HDMI_TXN2 1 2 RN4801A HDMI_TXN2_CON
D 0Ohm D

HDMI_TXP1 3 4 RN4802B HDMI_TXP1_CON


0Ohm
@

2
23 HDMI_CLKP_PCH C4832 1 2 0.1UF/16V HDMI_CLKP 09V090000007

2
R4831
C4834 1 67ohm
23 HDMI_CLKN_PCH 2 0.1UF/16V HDMI_CLKN 220Ohm
L4802 @
23 HDMI_TXP0_PCH C4833 1 2 0.1UF/16V HDMI_TXP0

1
23 HDMI_TXN0_PCH C4835 1 2 0.1UF/16V HDMI_TXN0
HDMI_TXN1 1 2 RN4802A HDMI_TXN1_CON
0Ohm
23 HDMI_TXP1_PCH C4828 1 2 0.1UF/16V HDMI_TXP1
@
23 HDMI_TXN1_PCH C4829 1 2 0.1UF/16V HDMI_TXN1

23 HDMI_TXP2_PCH C4830 1 2 0.1UF/16V HDMI_TXP2 HDMI_TXP0 3 4 RN4803B HDMI_TXP0_CON


0Ohm

23 HDMI_TXN2_PCH C4831 1 2 0.1UF/16V HDMI_TXN2 @

2
09V090000007

2
R4832
67ohm 220Ohm
L4803

R4828
@

R4826

R4829

R4825

R4823

R4824

R4822

R4827
Close to connector and do T routing

2
2

1
620Ohm
620Ohm

620Ohm

620Ohm

620Ohm

620Ohm

620Ohm

620Ohm
HDMI_TXN0 1 2 RN4803A HDMI_TXN0_CON
0Ohm

1
1

1
@

HDMI_CLKP 3 4 RN4804B HDMI_CLKP_CON


3 0Ohm
D
@

2
C Q4802 09V090000007 C

2
1 R4833
+5VS 2N7002 67ohm
G 220Ohm
2 S L4804 @

1
GND
HDMI_CLKN 1 2 RN4804A HDMI_CLKN_CON
Change from H2N7002, because not need special part 0Ohm
@

+12VS 20110909
R2.0 12/20 change Choke Value for EMI
add bridge R
Q4806
1

SI2308DS-T1-E3
G

F4801 0.35A/6V
2 1 +5VS_HDMI
2 S

+5VS
D

ER 1.7
3

D4801
1V/0.1A
+3VS
07V030000004
1

2
3
1

23
21
J4801
B B
RN4805B RN4805A RN4806A RN4806B

P_GND4
P_GND2
10KOhm 10KOhm 2.2KOhm 2.2KOhm
+3VS
4
2

+5VS_HDMI 18 19 HDMI_HPD_CON
18 19
2

Q4801A HDMI_SDA 16 17
UM6K1N 16 17 HDMI_SCL
HDMI_SCL & HDMI_SDA : no via , trace length should be as short as possible 14
14 15
15
23 HDMI_DDC_CLK_PCH HDMI_DDC_CLK_PCH 1 6 HDMI_SCL HDMI_CLKN_CON 12 13
23 HDMI_DDC_DATA_PCH HDMI_DDC_DATA_PCH HDMI_SDA HDMI_CLKP_CON 12 13
4 3 10 11
10 11 HDMI_TXN0_CON
8 9
+5VS_HDMI HDMI_TXN1_CON 8 9 HDMI_TXP0_CON
6 7
Q4801B HDMI_HPD_PCH 6 7
1 2 HDMI_HPD_CON HDMI_TXP1_CON 4 5
5

23 HDMI_HPD_PCH R4803 4.7KOhm 4 5 HDMI_TXN2_CON


UM6K1N 2 3
2 3 HDMI_TXP2_CON
1
1
1

+3VS

P_GND3
P_GND1
C4827 C4826
10PF/50V 10PF/50V D4802 R4804

1
2

@ @ 1.25V/0.15A 10KOhm
EMI_SPRING_PAD
U4801 HDMI_CON_19P

22
20
12V12GBRD001

1
need check

+3VS

R1.1 EMI Request for Spring PAD(close to HDMI conn)

A A

+12VS +12VS 28,36,91

Title : TV(1)_HDMI
+3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,31,32,33,36,37,44,45,50,51,53,57,59,61,80,91,92 <OrgName> Engineer: Joyoung_Chianhg

WWW.AliSaler.Com +5VS Size Project Name Rev


+5VS 27,31,36,37,45,50,51,57,80,87,91
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 48 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : TV(2)_****
<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 49 of 93
5 4 3 2 1
5 4 3 2 1

D D

+3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,31,32,33,36,37,44,45,48,51,53,57,59,61,80,91,92

+5VS +5VS 27,31,36,37,45,48,51,57,80,87,91

CPU Thermal Sensor


+3VS
+3VS
DIMM Thermal Sensor +3VS_THEM +3VS

1
PHILIP PMBS3904 R5023
C5007 R5003 1 2
0.1UF/10V 0Ohm Pleace in the center

1
U5001 @ of Plamrest. 150Ohm
1 5 C5008

2
SET VCC
2 0.1UF/10V

2
GND
2

3 4 Palmrest_THRM_DA
JM50_T 05/09 R5004 OT# HYST

1
22KOhm G709T1UF
06V220000007 R5002 U5002
0Ohm 3 1 8 SMB1_CLK_Thermal 28,30,74
1

VCC SMBCLK

1
C 2 7
1 B DXP SMBDATA SMB1_DAT_Thermal 28,30,74
C Q5001 C5001 3 6 C
CPU_THERM# 32,92
2
PMBS3904 DXN ALERT#
2200PF/50V 4 5

2
E THERM# GND
R1.0 2 G781
Place near CPU
(10°C for HYST =VCC)
Plamrest_THRM_DC
(2°C for HYST = GND)
PR_OVERTEMP# 32
Hysteresis prevents the output from oscillating
when the temperature is near the trip point. U5002 place neer power, CPU, PCH area,
SMBUS addr=1001100x (98)
U5002: Remote(Local) thermal sensor,use remote mode.

PWM Fan
C5002 put besides J5001.4
+5VS

B B
1

+3VS C5002
10UF/10V
R1.1
2
2

R5001
10KOhm
J5001
1 5
1

1 SIDE1
30 FAN0_PWM 2
2
3
3
30 FAN0_TACH 4 6
4 SIDE2
1

C5003 C5004 WtoB_CON_4P


100PF/50V 100PF/50V 12V17GIRM002
@ @
2

A A

Title : FAN_Fan,Sensor
<OrgName> Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 50 of 93
5 4 3 2 1
5 4 3 2 1

+3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,31,32,33,36,37,44,45,48,50,53,57,59,61,80,91,92

+5VS +5VS 27,31,36,37,45,48,50,57,80,87,91

D D

ODD ZERO POWER ODD SUPPORT


support Hokey turn off ODD power

J5102
4 S1
NP_NC4 S1 SATA_ODD_TXP2 0.01UF/25V
S2 1 2 C6011 SATA_TXP2 20
S2 SATA_ODD_TXN2 0.01UF/25V
2 S3 1 2 C6012 SATA_TXN2 20 R5102 1 0Ohm 2
NP_NC2 S3 +5VS /NON_Zero_ODD +5VS_ODD
S4
S4 SATA_ODD_RXN2 0.01UF/25V
S5 1 2 C6016 SATA_RXN2 20
S5 SATA_ODD_RXP2 0.01UF/25V
S6 1 2 C6014 SATA_RXP2 20
S6
S7

2 S
D
S7

3
SI2308DS-T1-E3

G
+5VS_ODD Q5103

1
/Zero_ODD
P1 SATA_ODD_PRSNT# 2 1 +12VSUS
P1 SATA_ODD_PRSNT#_R 25
P2 0Ohm R5105
P2
1 P3 /Zero_ODD
NP_NC1 P3

1
P4 SATA_ODD_DA 2 1 SATA_ODD_DA# 24 +
P4

1
3 P5 0Ohm R5106 CE5101 +3VS +5VSUS
NP_NC3 P5 C6015 R5103
P6 /Zero_ODD 100UF/6.3V
P6 560KOhm
R1.1 0.01UF/25V 1BV170000001

2
@ vx_r0402_small
add Zero Power ODD

2
SATA_CON_13P 5%

2
1
SR-90 12V24GBSD012 R5107 R5104
C6017 10KOhm 100KOhm
10UF/10V /Zero_ODD /Zero_ODD

1
2

1
UM6K1N R5108

1
5 Q5101B 10KOhm
/Zero_ODD C5125
/Zero_ODD

4
C 1UF/25V C

2
6
/Zero_ODD
UM6K1N
2 Q5101A
25 SATA_ODD_PWRGT
/Zero_ODD 3
D

1
Q5104
2N7002
1 /Zero_ODD
G
R1.1 2 S

add Zero Power ODD

Connector for Cable


B B

R2.0 12/15

12V37GBSM005 Joyoung R1.0

24
WTOB_CON_20P
SIDE4 SIDE1
21
HDD unmount for R1.0 test

1
R1.1 11/08 1 SATA_TXP0_W C5122
2 2 1 0.01UF/25V SATA_TXP0 20
2 SATA_TXN0_W C5121
3 2 1 0.01UF/25V SATA_TXN0 20
3
4
R1.1 11/09 4 SATA_RXN0_W C5124
5 2 1 0.01UF/25V SATA_RXN0 20
5 SATA_RXP0_W C5123
6 2 1 0.01UF/25V SATA_RXP0 20
6
7
7 R1.1 11/02 Remove HDD SATA CONN PART
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15 +5VS_HDD1 +5VS
16
16 SP5103
17
17
18 1 2
18
19
19 SHORT_PIN
20
20
1

23 22 C5120 C5105 C5119 For power measurement.


SIDE3 SIDE2 1000PF/50V 0.1UF/16V 10UF/10V
J5103 @ @
2

A A

CN1(MB) : pin 8, 9, 10, 17, 18, 19, 20, NC 不不不


CN2(HDD) : P1, P2, P3, P10, P11, P12,P13, P14, P15, NC 不不不

Title : XDD_HDD,ODD
<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 51 of 93
5 4 3 2 1
5 4 3 2 1

+5VO R1.1 +5VO


LV shift for U2404 VIH
+5V +5V 57,59,60,91
R1.1 Remove C5206 C5207 C5209 +5V_USB_0

1
R5203 L5201 80Ohm/100Mhz

1
100KOhm C5211 1 2
0.1UF/16V

1
G
U2404 C5202

2
1 A U5201 CE5201 0.1UF/16V

11
13
2 S

3
30 USBP02_EN VCC 5

D
GND 1 8 100UF/6.3V J5201 USB 3.0 USB 3.0 USB 2.0 AUDIO

2
GND OUT1
2 B GND 2 7 LAN HDMI

P_GND2
P_GND4
+5VO IN1 OUT2 With CHG
2N7002 3 6 SSRN1 5
IN2 OUT3 SSRX-
Q5201 3 GND 4 4 5 GND 4
Y EN#/EN OC# SSRP1 PGND
6
Vcc=2~5.5 G547G1P81U GND GND USB_PP1_C SSRX+
3
D+
06V030000005 06V290000010 GND 7
USB_CEN GND USB_PN1_C GND
2
Active High SSTN1 D-
USB_OC0# 24 8 TOP VIEW

P_GND1
P_GND3
1.5A SSTX-
1
SSTP1 VBUS
9
SSTX+
D D
R1.1
USB_CON_9P
Delete R5308 for unuse.

10
12
12V136URD007

@
RNX5214B4 3 GND
15Ohm
0604 R3.1 SSTN1
USB3.0 port name not follow Intel to prevent confuse. @ D5201

3
1 2 GND
C5214 1 2 0.1UF/10V SSTN1_C LX5201 N/A USB_PP1_C 1 6 USB_PN1_C
24 USB3_TX1_N
C5215 1 2 0.1UF/10V SSTP1_C 90Ohm/100MHz C5206 10PF/50V
24 USB3_TX1_P
09V090000001 U5206

2
SSTP1 +5V_USB_0 SSRN1 1 10 SSRN1
@ SSRP1 LINE_1 NC4 SSRP1
2 9
RNX5214A2 LINE_2 NC3
15Ohm 1 1 2 GND 2 5 GND 3
SSTN1 GND(Pin8) SSTN1
4 7
@ C5207 10PF/50V SSTP1 LINE_3 NC2 SSTP1
5 6
LINE_4 NC1

1
@ GND C5201 AZ1045_04F
RNX5216B4 3 Add C5206,C5207 for RF request Kevin 0601 3 4 0.1UF/16V
Add C5209,C5212 for RF request Kevin 0601 15Ohm

2
SSRN1 R1.1 11/04
CM1293_04SO
4

3
SSRN1_C 07V000000006
24 USB3_RX1_N
SSRP1_C LX5202 N/A
24 USB3_RX1_P
90Ohm/100MHz GND
09V090000001
1

2
1

@ @ SSRP1
C5209 C5212 @
10PF/50V 10PF/50V RNX5216A2 1
2

15Ohm

GND GND Add R5204,R5205,R5206,R5207 for RF request Kevin 0601

@
4 0Ohm 3
+5VO U5203 R5201 +5VO RNX5218B USB_PP1_C
5 4 2 100KOhm1
VDD SELCDP

1
24 USB_PP1 6 3
TDP DP LX5206
24 USB_PN1 7 2
TDM DM 90Ohm/100Mhz
30 USB_CB1 8 1
CB CEN
GND 9

4
GND USB_PN1_C
2 R5202 1 +5VO
SLG55584AVTR 10KOhm 2 0Ohm 1
C 06V150000009 R1.1 RNX5218A C
add for CHG IC OD PIN @ R1.1 10/31 EMI

Joyoung 110915 change to BC1.2


USB_CEN
20110718 Frank
add LX5501,LX5502 change 0909-000I000 for EMI request

USB_OC1# D5202
USB_OC1# 24 +5V_USB_1

USB 2.0 port L5202 80Ohm/100Mhz


USB_PN2_C 6 1 USB_PP2_C

1 2
1

C5208
CE5202 0.1UF/16V +5V_USB_1 5 2
100UF/6.3V
2

1
U5202 C5203 GND
GND 1 8 0.1UF/16V
GND OC1# +5V_USB_2 @ USB_PP3_C USB_PN3_C
+5VO 2 7 4 3

2
IN OUT1 GND GND
3 6
EN1/EN1# OUT2 L5203 80Ohm/100Mhz
30 USBP03_EN 4 5
EN2/EN2# OC2# CM1293_04SO 0606 R3.1
1 2
G546A1P1UF GND 07V000000006
1

C5210

11
13
06V290000011
Active High CE5203 0.1UF/16V J5204
2.0A 100UF/6.3V

P_GND2
P_GND4
2

R1.1 5
SSRX-
GND 4
Delete R5309 for EC strap pin. 6
PGND
SSRX+
GND GND R1.1 Remove C5206 C5207 C5209 USB_PP2_C 3
D+
R1.1 USB_OC9# GND 7
USB_OC9# 24 GND
USB_PN2_C 2
chagne USB 2.0 port to port9. +5V_USB_1 8
D-

P_GND1
P_GND3
+5V_USB_1 SSTX-
1
VBUS
9
SSTX+

USB_CON_9P

10
12
12V136URD007
@

GND
B B
+5V_USB_1
@
24 USB_PN2 4 0Ohm 3
RNX5227B C5204 2 1 0.1UF/16V
2 GND

1
LX5207 J5202
90Ohm/100Mhz 5
+5V_USB_1 P_GND1
1 7
3

@ USB_PN2_C VBUS P_GND3


2
USB_PP2_C D-
24 USB_PP2 2 0Ohm 1 3
RNX5227A D+
4 8
GND P_GND4
6
R1.1 10/31 EMI CHANGE P_GND2
USB_CON_4P
R1.1 GND /HRUSB20
12V136USD002 GND
add USB 2.0 Port

11
13
J5205

P_GND2
P_GND4
SSRN3 5
SSRX-
GND 4
SSRP3 PGND
4 0Ohm 3 6
RNX5233B /CRUSB30 SSTN3 U5208 USB_PP3_C SSRX+
3
SSRN3 SSRN3 D+
1 10 GND 7
LINE_1 NC4 GND
4

SSRP3 2 9 SSRP3 USB_PN3_C 2


C5221 LINE_2 NC3 D-
1 2 0.1UF/10V /CRUSB30 SSTN3_C LX5205 @ GND 3 SSTN3 8

P_GND1
P_GND3
24 USB3_TX3_N GND(Pin8) SSTX-
24 USB3_TX3_P
C5220 1 2 0.1UF/10V /CRUSB30 SSTP3_C 90Ohm/100MHz SSTN3 4 7 SSTN3 +5V_USB_2 1
SSTP3 LINE_3 NC2 SSTP3 SSTP3 VBUS
09V090000001 5 6 9
1

SSTP3 LINE_4 NC1 SSTX+


2 1 /CRUSB30 AZ1045_04F
0Ohm
RNX5233A R1.1 USB_CON_9P

10
12
/CRUSB30 12V136URD007
chagne USB 2.0 port to port9. /CRUSB30
R1.1 SWAP RXN5228 RXN5236 ,LX5208 Vertical SWAP
RNX5235B 4 3 /CRUSB30 +5V_USB_2
0Ohm
SSRN3 R1.1 10/31 EMI CHANGE GND
4

SSRN3_C
24 USB3_RX3_N
1

SSRP3_C LX5209 @ @ C5205


A 24 USB3_RX3_P A
90Ohm/100MHz 24 USB_PN9 2 0Ohm 1 0.1UF/16V
RNX5228A
09V090000001
1

SSRP3
3

need check RNX5235A 2 1 /CRUSB30


0Ohm
90Ohm/100Mhz J5203
LX5208 GND 5
P_GND1
1 7
2

USB_PN3_C VBUS P_GND3


2
USB_PP3_C D-
24 USB_PP9 4 0Ohm 3 @ 3
RNX5228B D+
4 8
Add for USB port 9 debug port GND P_GND4
6
P_GND2
USB_CON_4P
GND 12V136USD002
/HRUSB20 GND
24 USB_PN3 4 0Ohm 3 USB_PN3_C
RNX5236B /CRUSB30
2

@
LX5210
Title : USB_USB Port
90Ohm/100Mhz
<OrgName> Engineer: Joyoung_Chianhg
3

Size Project Name Rev


2 1 USB_PP3_C
24 USB_PP3
RNX5236A
0Ohm
/CRUSB30
D JM50 3.1
Date: Thursday, August 23, 2012 Sheet 52 of 93
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

H5301 H5302
CT256CB176D146
CT256CB176D146 +3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,31,32,33,36,37,44,45,48,50,51,57,59,61,80,91,92

+3VSUS +3VSUS 4,22,24,28,30,60,81,92


+3VS_W LAN
PR_S03 +3VS_W LAN
R2.1 01/18
WLAN +3VS_W LAN +1.5VS +1.5VS 7,26,57,91

R1.1 For IOAC, Change Wake Name to Wlan_IOAC

1
G
PCIE_W AKE#_W LAN +3VS /NON_IOAC

S 2
30 W LAN_W AKE# +1.5VS 1 2

D
R1.1 IOAC 10/31 R5327 10V340000001
2N7002 +3VO 0Ohm
Q5301
R5312 1 2 0Ohm
R1.1 For IOAC, 10/31 J5301 +3VS_WLAN R1.1 11/02
@ 1 2 R1.1 IOAC 10/31
R5303 WAKE# 3.3V_1 @
BT Disable Low for CHICONY 3 4
Reserved1 GND7

1
BT_ON 1 2 0Ohm 5 6 1 2
/CHICONYBT30 Reserved2 1.5V_1 C5310 R5325 0Ohm 10V340000001
21 CLK_REQ1_WLAN# 7 8
CLKREQ# UIM_PWR R5306
9 10 33PF/50V

2
D GND1 UIM_DATA R5302 @ D
21 CLK_PCIE_W LAN#_PCH 11 12
REFCLK- UIM_CLK 10KOhm 0Ohm
21 CLK_PCIE_W LAN_PCH 13 14
REFCLK+ UIM_RESET /IOAC
15 16

2 S
D
GND2 UIM_VPP D5301 AC_BAT_SYS

3
R1.1 For IOAC, 10/31 R1.1 IOAC 10/31 RB751V-40 SI2308DS-T1-E3

G
2
BT Disable Low for Intel W LAN_ON_C Q5303

1
17 18 1 2 RF_ON 25,30
1

C5312 C5311 BT_ON R5304 1 Reserved/UIM_C8 GND8


2 0Ohm 19 20 1 @ 2 BUF_PLT_RST# 4,24,30,32,33,59,70
R5320
10PF/50V 10PF/50V /IntelBT30 Reserved/UIM_C4
W_DISABLE# R5328 0Ohm Check PCH WLAN_ON power plan
21 22 1 2 W LAN_RST# 30 200KOhm
GND3 PERST# +3VS_Vaux_W LAN R5329 0Ohm R2.1 01/13 /IOAC
@ @ 23 24
2

21 PCIE_RXN2_W LAN PERn0 +3.3Vaux


25 26 SP5301 1 2 NB_R0603_32MIL_SMALL +3VS_WLAN

1
21 PCIE_RXP2_W LAN PERp0 GND9 R1.1 IOAC 10/31 R2.0 12/16
27 28
GND4 1.5V_2 SMBC R5305 1 @ +3VO
29 30 2 0Ohm SMB_CLK_S 17,28,59
GND5 SMB_CLK
21 PCIE_TXN2_W LAN 31
PETn0 SMB_DATA
32 SMBD R5301 1 @ 2 0Ohm SMB_DAT_S 17,28,59 for AOAC & FFS
21 LAN
PCIE_TXP2_W LAN 33 34 3 0Ohm 4 RN5301B USB_PN11 24
PETp0 GND10

2
+3VS_W 35 36 USB_PN11_C
GND6 USB_D- USB_PP11 24

2
37 38 USB_PP11_C R5318

2
Reserved3 USB_D+ R5319 1MOhm
39 40
Reserved4 GND11 @ 100KOhm /IOAC
+3VS_W LAN 41 42
R5311 Reserved5 LED_WWAN# 90Ohm/100Mhz
43 44

1
Reserved6 LED_WLAN#

3
10KOhm 45 46 L5301 /IOAC

1
Reserved7 LED_WPAN# UM6K1N
47 48
WLAN +3VS bypass capactor: WLAN +1.5VS bypass capactor:

1
R1.1 11/02 Reserved8 1.5V_3 Q5304B
49 50 1 0Ohm 2 RN5301A 5 C5329
BT_ON_R Reserved9 GND12
25,30,61 BT_ON 2 1 51 52 Place 0.1UF near pin 2,24,52,39 41. Place 0.1UF near pin 6,28,48.

4
Reserved10 3.3V_2 /IOAC 0.1UF/25V

2
6
RB751V-40 LED_W LAN# 1 T5313 Place 10UF near +3VS_WLAN source side. Place 10UF near +1.5VS source side.
D5302 53 56 need mount R2541 UM6K1N /IOAC
GND13 NP_NC2 +3VS_W LAN 0Ohm @ Q5304A
54 55 25 AOAC_ON 2 1 R5321 2
@ 0Ohm GND14 NP_NC1

1
MINI_PCI_LATCH_52P +3VS_WLAN +1.5VS /IOAC
R5307 12V44GBSD001
@ IOAC_EN0Ohm 2 /IOAC 1 R5326

1
30,81 IOAC_EN
DVR1035_Radio control pin design guide for the acer notebook PCI-E module

G
2N7002 Q5302
R1.1 11/02

2 S

3
H =4mm RF_DET# 30

1
D
C5302 C5303 C5304 C5305 C5307 C5301 C5308
C5306 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V C5309 0.1UF/16V 0.1UF/16V 0.1UF/16V
Vendor request RF_DET#_R 1 2 10UF/6.3V @ @ 10UF/6.3V @ @

2
R5330 0Ohm
vx_c0603_small vx_c0603_small

+3VS_mSATA

Place 0.1UF near pin 6,28,48.

H5305 H5303 H5304 Place 10UF near +1.5VS source side.


C CT256CB176D146 CT256CB176D146
CT256CB176D146 R5316 2 1 0Ohm C
+3VS
vx_r0805_h24_small
@ +1.5VS

R1.1 10/31 change

1
R1.1 C5321 C5322 C5323
1

C5320 0.1UF/16V 0.1UF/16V 0.1UF/16V


add NUT for Half card. C5314 10UF/6.3V @ @

2
33PF/50V
2

+1.5VS vx_c0603_small
R1.1 10/31 change
J5302
R1.1 11/02 T5314 1PCIE_W AKE#_W LAN_R 1 2
WAKE# 3.3V_1
3 4
Reserved1 GND7
5 6
Reserved2 1.5V_1 USIM_PW R T5308
21 CLK_REQ3_mSATA# 7 8 1
CLKREQ# UIM_PWR USIM_DATA T5309
9 10 1
GND1 UIM_DATA USIM_CLK T5310
21 CLK_PCIE_mSATA#_PCH 11 12 1
REFCLK- UIM_CLK USIM_RESET T5311
21 CLK_PCIE_mSATA_PCH 13
REFCLK+ UIM_RESET
14 1 Place 0.1UF near pin 2,24,52,39 41.
15 16
GND2 UIM_VPP
Internal Pull High Place 10UF near +3VS_WLAN source side.
17 18
Reserved/UIM_C8 GND8 W W AN_ON/OFF# T5312
19 20 1
Reserved/UIM_C4
W_DISABLE# BUF_PLT_RST# +3.3VS_Vaux +3VS_mSATA
21 22
RXN GND3 PERST# SP5303
23 24 1 2 NB_R0603_32MIL_SMALL +3VS
RXP PERn0 +3.3Vaux
25 26
PERp0 GND9
27 28
GND4 1.5V_2 SMB_CLK_S T5305
29 30 1

1
TXN GND5 SMB_CLK SMB_DAT_S T5306RN5302B /NON_mSATA C5316 C5317 C5318 C5319
31 32 1
TXP PETn0 SMB_DATA C5315 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
33 34 3 0Ohm 4 USB_PN8 24
PETp0 GND10 USB_PN8_C 10UF/6.3V @ @
35 36

2
GND6 USB_D- USB_PP8_C
37 38
Reserved3 USB_D+
3

39 40 90Ohm/100Mhz vx_c0603_small
+3VS_mSATA Reserved4 GND11
41 42 3G_LED# 1 T5307
Reserved5 LED_WWAN# @
43 44
T5301 Reserved6 LED_WLAN# L5302
1 45 46
2

T5302 Reserved7 LED_WPAN#


1 47 48
T5303 DAS Reserved8 1.5V_3
1 49 50 1 0Ohm 2 USB_PP8 24
T5304 Presence Detect Reserved9 GND12 /NON_mSATA
1 51 52
Reserved10 3.3V_2 RN5302A

53 56
GND13 NP_NC2
54 55
GND14 NP_NC1 0614 R3.1
MINI_PCI_LATCH_52P
12V44GBSD001
GND GND
B B

R5322 1 2 0Ohm /NON_mSATA RXP

H=4mm 21 PCIE_RXP3_mSATA

21 PCIE_RXN3_mSATA
R5323 1 2 0Ohm /NON_mSATA RXN

C5324 1 2 0.1UF/16V /NON_mSATA TXP


PCIe & mSATA co-lay 21 PCIE_TXP3_mSATA

21 PCIE_TXN3_mSATA
C5325 1 2 0.1UF/16V /NON_mSATA TXN

0.01UF/25V 1 2 C5328
20 SATA_RXN1
20 SATA_RXP1
0.01UF/25V 1 2 C5313 need close to J5302 connector
/mSATA
0.01UF/25V 2 C5326
1 /mSATA
20 SATA_TXP1
0.01UF/25V 1 2 C5327
20 SATA_TXN1
/mSATA
/mSATA
need close PCH (U2001)

A A

Title : WLAN/ 3G
<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
D JM50 3.1
Date: Thursday, August 23, 2012 Sheet 53 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : USB3.0
<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
B JM50 3.1
Date: Thursday, August 23, 2012 Sheet 54 of 93
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

D D

C C

B B

A A

Title : Fersco USB 3.0


BG1-CSC-HW R&D Dept.5 Engineer: Joyoung_Chianhg
Size Project Name Rev
A2 JM50 3.1
Date: Thursday, August 23, 2012 Sheet 55 of 93
5 4 3 2 1
5 4 3 2 1

+3VA +3VA 6,20,26,27,30,31,57,59,60,81,88,93

+3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+5VSUS +5VSUS 51,57,59,91

+5VA +5VA 37,60,81,91

+5V +5V 57,59,60,91

+5VS +5VS 27,31,36,37,45,48,50,51,57,80,87,91

AC_BAT_SYS AC_BAT_SYS 45,53,81,87,88


D D
+3V +3V 24,45,57,59,61,91

30,59 PWR_LED#

C C

30,59 PWR_LED_standby#

30,59 CHG_LED_BLUE#
B B

30,59 CHG_LED_ORANGE#

A A

Title : LED_Indicator
<OrgName> Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 56 of 93
5 4 3 2 1
5 4 3 2 1

+3VA +3VA 6,20,26,27,30,31,59,60,81,88,93

+VCORE +VCORE 6,9,11,80

+VGFX_CORE +VGFX_CORE 7,9,80

+VCCP +VCCP 3,4,6,7,30,32,82


D D
+0.75VS +0.75VS 16,17,83

+1.05VS +1.05VS 26,27,82,87

+1.5VS +1.5VS 7,26,53,91

+1.8VS +1.8VS 7,25,26,80,84

+3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,31,32,33,36,37,44,45,48,50,51,53,59,61,80,91,92

+5VS +5VS 27,31,36,37,45,48,50,51,80,87,91

+1.5V +1.5V 5,16,17,18,60,83

+3V +3V 24,45,59,61,91

+5V +5V 59,60,91

+0.75VS +3VS +1.5VS +1.8VS +1.05VS +VCCP +5VS

1
@ R5722 R5704 R5705 R5706 R5707 R5708 R5713
+3VA 330Ohm @ 330Ohm @ 330Ohm @ 330Ohm @ 330Ohm 330Ohm 330Ohm
@ @
C C
2

2
1

R5716 +0.75VS_DISCHRG +3VS_DISCHRG +1.5VS_DISCHRG +1.8VS_DISCHRG +VTT_PCH_DISCHRG +VTT_CPU_DISCHRG +5VS_DISCHRG


100KOhm
3

3
Q5701B Q5702A @ Q5702B @ Q5703A Q5703B Q5704A Q5704B
UM6K1N UM6K1N UM6K1N UM6K1N @ UM6K1N @ UM6K1N @ UM6K1N @
2

5 2 5 2 5 2 5
4

4
6

Q5701A
UM6K1N
2 Remove Vcc_Core & VGFX_Core discharge
24,30,91,92 SUSB_EC#
1

+5V +3V +1.5V


R1.1 10/31 YENPIN
1

1
R5710 R5711 R5712
+3VA 330Ohm 330Ohm 330Ohm
@
2

2
1

R5702 +5V_DISCHRG +3V_DISCHRG +1.5V_DISCHRG


100KOhm
3

Q5706B Q5707A Q5707B


UM6K1N UM6K1N UM6K1N
2

5 2 5
07V040000035
4

4
6

Q5706A
UM6K1N
30,91 SUSC_EC# 2
1

B B

+5VSUS
1

R5714
+3VA 330Ohm
@
2
1

R5703 +5VSUS_DISCHRG
100KOhm
3

Q5711B
UM6K1N
2

5
4
6

Q5711A
UM6K1N
30,81,91,93 VSUS_ON 2
1

+3VS_VGA +VGA_VCORE +1.5VS_VGA +1.05VS_VGA


1

+3VA R5719 R5709 R5717 R5718


330Ohm 330Ohm 330Ohm 330Ohm
@ @ @ @
1

A A
2

R5720
100KOhm +VGA_VCORE_DISCHRG +3VS_VGA_DISCHRG +1.5VS_VGA_DISCHRG +1.05VS_VGA_DISCHRG
/DGPU
6

@ @ @
2

Q5709A Q5709B Q5710B @ Q5710A


VGA_DISCHRG_EN 2 UM6K1N 5 UM6K1N 5 UM6K1N 2 UM6K1N
1

1
3

R5721
Q5708B
24 DGPU_PWR_EN 1 2 VGA_DISCHRG_CTL 5 UM6K1N
/DGPU Title : DSG_Discharge
4

/DGPU
100KOhm
6

Q5708A <OrgName> Engineer: Joyoung_Chianhg


2 UM6K1N Size Project Name Rev
/DGPU
Unmount +VGA_Vcore discharg C JM50 3.1
1

Date: Thursday, August 23, 2012 Sheet 57 of 93


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : System Setting


<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
Custom JM50 3.1
Date: Thursday, August 23, 2012 Sheet 58 of 93
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

12V371BSM002

32
WTOB_CON_30P
30 30 R1.1 11/03

SIDE2
GND
+3V 29 29
28 28
22,30 PM_CLKRUN# 27 27
D 20,30,44 INT_SERIRQ 26 26 SIDE5 35 D
20,30,44 LPC_FRAME# 25 25
20,30,44 LPC_AD3 24 24
20,30,44 LPC_AD2 23 23
20,30,44 LPC_AD1 22 22
20,30,44 LPC_AD0 21 21
GND 20 20
24 CLK_TPM 19 19
GND 18 18
+3VS 17 17
16 16
GND C5902 1 2 15 15
+RTCBAT 10UF/10V 14 14
20,60 +RTCBAT 13 13 SIDE4 34
4,24,30,32,33,53,70 BUF_PLT_RST# 12 12
21 CLK_REQ_CR# 11 11
GND 10 10
21 PCIE_TXP1_CR 9 9
C
21 PCIE_TXN1_CR 8 8 C
GND 7 7
6 6 33 TP_CLK @ C5916 1
@C5916 21000PF/50V
21 CLK_PCIE_CR SIDE3
5 5 TP_DAT @C5915
@ C5915 1 21000PF/50V
21 CLK_PCIE_CR#
GND 4 4 SMB_DAT_S @C5914
@ C5914 1 21000PF/50V
21 PCIE_RXP1_CR 3 3 SMB_CLK_S @C5913
@ C5913 1 21000PF/50V

SIDE1
21 PCIE_RXN1_CR 2 2
Card Reader GND 1 1
J5901
GND

31
GND
RN5901A 1 TP_CLK
+3VS 4.7KOhm2
R1.1 RN5901B TP_DAT
Power BTN and LED change for TP
3 4.7KOhm4

GND C5901 1 210UF/10V J5906


R2.0 12/19 8
B +3VS 8 B
R2.0 12/19 TP_CLK 7 10
30 TP_CLK 7 SIDE2
J5904 TP_DAT 6
30 TP_DAT 6
30 PWR_SW# GND 5 5
GND 11 SIDE1 17,28,53 SMB_DAT_S 4 4
PWR_SW# 1 3
1 17,28,53 SMB_CLK_S R1.1 11/10 3
GND 2 2 2 2 SIDE1 9
30 PWR_LED# PWR_LED# 3 +3VS R5901 2 @ 1 10KOhm 1
PWR_LED_standby# 3 1
30 PWR_LED_standby# 4 4
30 CHG_LED_BLUE# CHG_LED_BLUE# 5 +3VS 100KOhm 2 @ 1 R5915 FPC_CON_8P
CHG_LED_ORANGE# 5
6 12V18GWSM059

1
30 CHG_LED_ORANGE# 6 R2.0 12/14

G
GND 7 7 GND
8 Q5901

S 2
+5VSUS 8 21,30 EXT_SCI#
@ 2N7002

D
9 9
10 10
12 R3.1 Unmount for SMBus INT pin Kevin 0601
+5V GND SIDE2
R2.0 12/20
R1.1 +3VA
A change power plane FPC_CON_10P A
C5905 1
C5906 1
2
2
0.01UF/25V PWR_LED#
0.01UF/25V PWR_LED_standby#
12V18AWSM001 Title : B to B
C5907 1 2 0.01UF/25V CHG_LED_BLUE# R2.0 Engineer: Joyoung_Chianhg
C5908 1 0.01UF/25V CHG_LED_ORANGE# <OrgName>
2
change for Elan click pad Size Project Name Rev

GND
A JM50 3.1
Date: Thursday, August 23, 2012 Sheet 59 of 93
5 4 3 2 1
5 4 3 2 1

+VCC_RTC +VCC_RTC 20,22,27

DC Jack WtoB CONN +3VSUS +3VA +5VA +5V +1.5V +3VA_EC +3VA_EC 28,30,32
+V_DCJACK +3VA +3VA 6,20,26,27,30,31,57,59,81,88,93
Current setting=6A A/D_DOCK_IN
+5VA +5VA 37,81,91

1
T6020
Depend on the current
1
D
1 T6001 of the adaptor. T6031 T6030 T6032 T6033 T6034 T6035
D
+3VSUS +3VSUS 4,22,24,28,30,81,92
1 T6002 L6001 80Ohm/100Mhz
1 T6003 1 2 +5VSUS +5VSUS 51,57,59,91
1 T6004
J6002 L6006 80Ohm/100Mhz +12VS_VGA +12V +1.8VO
+12VSUS +12VSUS 28,51,81,91
5 1 1 2
SIDE1 1
2
2
3 C6002 +1.5V +1.5V 5,16,17,18,57,83
3
1

1
6 4 C6001 C6003 C6009
SIDE2 4 0.1UF/25V D6001 10UF/25V 1UF/25V 0.1UF/25V
10% @ +3V +3V 24,45,57,59,61,91
WTOB_CON_4P 0.51V/0.5A 10% T6037 T6038 T6039 T6040 T6036
2

2
12V17GBSM087 @ +5V +5V 57,59,91
GND +12V +12V 91
1 T6005
1 T6006 GND
1 T6007 +0.75VS +0.75VS 16,17,57,83
1 T6008
+1.05VS +1.05VS 26,27,57,82,87

+1.5VS +1.5VS 7,26,53,57,91


GND
+1.8VS +1.8VS 7,25,26,57,80,84

+3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,31,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

Battery Connector +5VS

+12VS
+5VS 27,31,36,37,45,48,50,51,57,80,87,91

+12VS 28,36,48,91

AC_BAT_SYS AC_BAT_SYS 45,53,81,87,88

A/D_DOCK_IN A/D_DOCK_IN 88
C BAT_CON C
BAT_CON BAT_CON 88
T6029 T6022 T6024
T6023 T6025 F6001
1 2
add for RF +VCCP +VCCP 3,4,6,7,30,32,57,82
1

15A/65V
1

1
07V100000004 +VCORE +VCORE 6,9,11,80
C6027 C6026
T6026 T6027 T6028 0.1UF/25V 39PF/50V +VGFX_CORE +VGFX_CORE 7,9,80
2

2
1211 change Battery CON @
+VTT_PCH_ORG +VTT_PCH_ORG 22,26,27
1

12V17GBSM089
1115_correct netname
WTOB_CON_10P +VTT_PCH_VCCIO +VTT_PCH_VCCIO 20,26,27
BAT_CON_C
1
1 SMB0_CLK_C L6002 1
2 21kOhm/100Mhz Irat=300mA
2 SMB0_DAT_C L6003 1 SMB0_CLK 30,88
3 21kOhm/100Mhz Irat=300mA
3 BI TS1#_C L6004 1 SMB0_DAT 30,88
4 21kOhm/100Mhz Irat=300mA
TS1# 90
4 TS1#_C
5
5 SMB0_CLK_C
6
6 SMB0_DAT_C
7
0.1UF/25V

7 D6002
8
47PF/50V

47PF/50V

47PF/50V

8 TS1#_C BI
C6028

C6029

C6030

C6031

9 1 5
9
10
10
1

J6001 2
2

SMB0_CLK_C 3 4 SMB0_DAT_C +V_VREF_DDR3 +V_VREF_DDR3 16,17,18

DF5A6.8FU

1 R6001 2
1KOhm

3
B D D6003 B
Q6001
2N7002 2 +RTCBAT
1 R6002 1 2 100KOhm 3
G 1 +3VA
S 2
0.1UF/25V

R1.1 11/02 1V/0.2A


C6032

SW6001
1

1 2
1 2
1

H6001
2

4 2 3 4
GND

4 2 3 4
3
3
TP_SWITCH_4P
12V09SBSM031
ST315D94
1

R2.2 03/21 @
D6004

For Battery Reset


AZ2025-01H.R7G
2

07V220000006

R1.1 Exchange GND_LED to GND

R1.1
close to H6001 modify battery reset CKT
A A

Title : DC_DC/BAT CONN


<OrgName> Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 60 of 93
5 4 3 2 1
5 4 3 2 1

2 0Ohm 1 B/T MODULE


RN6101A /BT_SINGLE

4
@
LX6101 /BT_SINGLE
D D
90Ohm/100Mhz J6101
GND 1 7

1
USB_PP4_C 1 SIDE1
24 USB_PP4 2 2
24 USB_PN4 RN6101B4 0Ohm 3 USB_PN4_C 3
/BT_SINGLE 3
4 4
+3VS_BT 5
+3VS_BT 5
6 6 SIDE2 8

WTOB_CON_6P

1
+3VS_BT
T6101 1
R6102
10KOhm PIN 5: LED Output
1
/BT_SINGLE GND

2
3

S 2
25,30,53 BT_ON
D

2N7002
/BT_SINGLE
C R1.1 IOAC 10/31 Q6101 C
JM50_T 04/27
/BT_SINGLE
R1.0 R6109
+3VS 1 2 @
prevent leakage curent. 0Ohm
C6101
R6110
R2.1 01/17 1 @ 2 1 2
+3V GND
0Ohm
0.1UF/16V

B B

A A
Title : Fersco USB 3.0
Pegatron Corp. Engineer: Joyoung_Chianhg
Size Project Name Rev
A JM50 3.1
Date: Thursday, August 23, 2012 Sheet 61 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : System Setting


<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
Custom JM50 3.1
Date: Thursday, August 23, 2012 Sheet 62 of 93
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

D D

C C

B B

A A
Title : B to B
<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
A JM50 3.1
Date: Thursday, August 23, 2012 Sheet 63 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : B to B
<OrgName> Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 64 of 93
5 4 3 2 1
5 4 3 2 1

CPU Bracket Hole place between J5204 /J5205


D D
H6501 +5VO
C217D126

H6502 CE6501
C217D126 100UF/6.3V
@

H6503 GND
C217D126

H6504
C217D126

ME B Type

VGA Bracket Hole


H6507
1 H6515
H6505 HOLE_NPTH 1
CT217B136ID106 S315D94
/DGPU H6508 H6514
1 1
CST315SB315D94 RT315x315CB315D94
H6506 GND
CT217B136ID106 GND GND
/DGPU
R2.0 12/15 H6509
R1.1 11/08 1
RT315x315CB315D94
C GND C

H6510
1
RT315x315CB315D94 R2.0 12/19
H6516
GND 1
RT315x315CB315D94
GND

H6511
1
RT315x315CB315D94
GND

H6512 H6513 H6517


1 1 1
RT315x346CB217D94 O138x110D138x110N RT315x315CB315D94
GND GND
This screw hole should be Upside down(TOP and BOTTOM).
B B

A A

Title : ME_CONN,Skew Hole


<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 65 of 93
5 4 3 2 1
5 4 3 2 1

Power Button
LEDCON1
1 PWR_SW#_LED
1
2 GND_LED
2 PWR_LED#_LED
3
3 PWR_LED_standby#_LED
4
4 CHG_LED_BLUE#_LED
5
5 CHG_LED_ORANGE#_LED
6
6
7 GND_LED
7
8 +5VSUS_LED
8
9 +5V_LED
9
10 +3VA_LED
10
D D
SMD28x126
SW6601
PWR_SW#_LED 1 2
1 2
3 4
3 4

TP_SWITCH_4P
12V09SBSM031 R1.1 exchange D6601 to C6605 for PWR_SW# noise

1
C6605
0.1UF/10V

2
GND_LED

GND_LED

+5VSUS_LED +3VA_LED
C +5VSUS_LED Charger LED C

+5V_LED
POWER LED Charger LED BLUE

1
need check after SR R6602
10KOhm

2
+5V_LED @ SR-65
Power LED LED02

Blue

Orange
2

+
BLUE&ORANGE
1

SR-66

Dual Color 07V130000024

1
R6601 Q6602A Q6602B
10KOhm LED01 UM6K1N UM6K1N C6602

Blue

Orange
@ @

+
BLUE&ORANGE 2 5 47PF/50V

2
07V130000024 1AV200000015
2

4
@ @
1

Dual Color

4
6

Q6601A Q6601B C6601 GND_LED


UM6K1N UM6K1N @ 47PF/50V GND_LED
2

2 5 1AV200000015 GND_LED
1

4
@

2
GND_LED GND_LED R2.1 02/08 R6603 R6604
GND_LED CHG_LED_BLUE#_LED R6607 1 2 0Ohm CHG_LED_BLUE#_R_LED 3.3KOhm 1.5KOhm
PWR_LED#_LED R6608 1 2 0Ohm PWR_BLUE_LED#_LED

2
R1.1

1
R6605 R6606 +3VA_LED
3.3KOhm 3.3KOhm CHG_LED_BLUE#_R_LED change power plane
CHG_LED_ORANGE#_R_LED
Charger LED ORANGE

1
1

1
R6609
+5V_LED need check after SR PWR_BLUE_LED#_LED 10KOhm
PWR_AMBER_LED#_LED @
R2.1 02/08

2
1

R6610

3
10KOhm Q6603A Q6603B
@ UM6K1N UM6K1N
B B
2 5
2

4
@ @
6

Q6604A Q6604B
UM6K1N UM6K1N GND_LED
2 5 GND_LED
1

@ @

GND_LED
GND_LED
PWR_LED_standby#_LED R6611 1 2 0Ohm PWR_AMBER_LED#_LED CHG_LED_ORANGE#_LED R6612 1 2 0Ohm CHG_LED_ORANGE#_R_LED

A A

Title : TP_M
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 66 of 93
5 4 3 2 1
5 4 3 2 1

+3VS_MB +3VS_CR
SD_CLK R6703 2 0Ohm 1 SD_CLK_R
R6706
1 2 H6701
1

1
0Ohm C6701 C6720 C315D110
trace width 60mils 10V340000001 trace width 60mils 1UF/10V C6704 10PF/50V
0.1UF/10V @ 1AV200000001 GND_CR H6703

2
R2.0 move back @ 1
20110909 Joyoung HOLE_NPTH
GND_CR GND_CR GND_CR
EMI request

D D
SDCLK trace length

From System's PCIE interface shorter,surround with GND.

H6704
R1.1 change to 30P 1
J6701 O110X138DO110X138N
WTOB_CON_30P
32

12V371BSM002 H6702
30 1
SIDE2

30 GND_CR
29 +3V_TPM C315D110
29
28
28 PM_CLKRUN#_TPM GND_CR
27
27 LPCSERIRQ_TPM
35 26
SIDE5 26 LPC_FRAME#_TPM R2.0 12/13
25
25 /TPM 1 RN6702A LPC_AD3_TPM
24 0Ohm 2
24 /TPM 3 RN6702B LPC_AD2_TPM
23 0Ohm 4
23 /TPM 5 RN6702C LPC_AD1_TPM
22 0Ohm 6
22 /TPM 7 RN6702D LPC_AD0_TPM
21 0Ohm 8
21
20 GND_CR T6706
20 LPCCLK_TPM
19
19 10PF/50V 1
18 GND_CR 2 C6711 GND_CR CR_LED# 1
18 @ 1AV200000042 J6703
17
17 C6724 0.1UF/16V
16 +3VS_TPM
16

BUF_PLT_RST#_CR
15 GND_CR 1 2 SD_D2 9
15 +3VS_MB SD_D3 9
14 +3V_CARD_CR 1 14

CLKREQ0_CR#
14 1 P_GND2
34 13 GND_CR 1 R6729 2 T6702 SD_CMD 2 13
SIDE4 13 BUF_PLT_RST#_CR T6703 2 P_GND1
12 3 12
12 T6704 3 12

+3VS_CR
11 CLKREQ0_CR# 6.2KOhm 4 11 SD_WP

SD_CD#
11 +3V_CARD 4 11
10 GND_CR 10V220000088 SD_CLK_R 5 10 SD_CD#
10 PCIE_TXP0_CR SD_WP 5 10
9 6

1
1
1
9 PCIE_TXN0_CR SD_D0 6
8 7
8 SD_D1 7
7 GND_CR 8
7 CLK_PCIE_CR_P 8
33 6
SIDE3 6 CLK_PCIE_CR_N
RTC

48
47
46
45
44
43
42
41
40
39
38
37
5
5 U6701 SD_SOCKET_9P
4 GND_CR
4 PCIE_RXP0_CR
C 3 12V211BSD000 C

3V3_IN2
CLK_REQ#
PERST#

MS_INS#
SD_CD#
SP15
SP14
GPIO/EEDI
RREF

EEDO
EECS
EESK
3
SIDE1

2 PCIE_RXN0_CR +RTCBAT_CR
2 GND_CR GND_CR
1 GND_CR
1 PCIE_TXP0_CR 1 36
PCIE_TXN0_CR HSIP SP13
2 35
31

CLK_PCIE_CR_P HSIN SP12


3 34
REFCLKP SP11
1

1AV200000042 C6723 CLK_PCIE_CR_N 4 33


J6702 C6722 0.1UF/16V GND_CR 4.7UF/6.3V AV12 REFCLKN SP10
3 1 2 5 32
BATT_HOLDER_2P PCIE_RXP0_CR 1 1AV300000023 HSOP_R AV12 SP9
4 2 6 31
PCIE_RXN0_CR 1 HSON_R HSOP SP8 C6726
2 7 30 1 2 4.7UF/6.3V
GND_CR C6719 0.1UF/16V GND_CR HSON SP7 1AV300000023
8 29
2

1AV200000042 DV12 GND1 SP6


1 2 9 28
C6717 0.1UF/16V DV12 SP5 DV12_S
12V20GBSM000 +3V_CARD
1AV200000042 +3VS_CR
10
Card1_3V3 DV12_S
27 1
C6725
2
0.1UF/16V
GND_CR
11 26
3V3_IN1 GND3 SD_D2
GND_CR trace width 40mils 12 25 1AV200000042

SD_CMD
Card2_3V3 SD_D2

DV33_18
1

SD_CLK
xD_CD#
C6736

SD_D1
SD_D0

SD_D3
GND2
10UF/10V C6735

SP1
SP2
SP3
SP4
0.1UF/16V +3V_CARD C4008 C4002 SD CARD CAP

2
1AV200000042
RTS5209-GR

13
14
15
16
17
18
19
20
21
22
23
24
GND_CR GND_CR

Part number:020J-007D000

1
C6702
C6703

SD_CMD
DV33_18

SD_CLK
10UF/10V

SD_D1
SD_D0

SD_D3
0.1UF/16V

2
AV12 R6731 1 @ 2 0Ohm DV12 1AV500000008
1AV200000042
vx_r0603_h28_small

Close to connector

C6730
GND_CR

C6728

1AV200000042
+3V_TPM +3VS_TPM +3VS_TPM

2
@

4.7UF/6.3V

0.1UF/16V
1AV300000023 1

1
R6707
B B
4.7KOhm
@
/TPM Pin Name Description
J6705
16 1 LPCSERIRQ_TPM GND_CR SP1 SD_D7/XD_RDY
16 1
15 2
15 2 LPC_AD0_TPM
14
14 3
3
LPC_AD1_TPM
SP2 SD_D6/XD_RE#
13 4
13 4 LPC_FRAME#_TPM
12
12 5
5
LPCCLK_TPM
SP3 SD_D5/XD_CE#
11 6
BUF_PLT_RST#_CR 11 6 LPC_AD2_TPM
PM_CLKRUN#_TPM
10
10 7
7
LPC_AD3_TPM
SP4 SD_D4/XD_WE#
9 8
9 8
BTOB_CON_16P
SP5 MS_BS/XD_CLE
12V162BSM003 SP6 MS_D5/XD_ALE
1

C6715 C6712 C6714 C6713 GND_CR


@ @ @ @ SP7 MS_D1/XD_WP#
1UF/6.3V 0.1UF/16V 1UF/6.3V 0.1UF/16V
2

SP8 MS_D4/XD_D0
SP9 MS_D0/XD_D1

GND_CR
SP10 MS_D2/XD_D2
SP11 MS_D6/XD_D3
SP12 MS_D3/XD_D4
SP13 MS_D7/XD_D5
SP14 MS_CLK/XD_D6
SP15 SD_WP/XD_D7
Remove Serial Flash
A A

Reserve for BIOS boot function


Title : RTS5209
Engineer: JAY TSAI
When EECS switch to be D3-Delink sideband signal, Serial Flash function is disabled.
Size Project Name Rev
C
JM50
3.1
Date: Thursday, August 23, 2012 Sheet 67 of 93

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : USB_USB Port


<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
B JM50 3.1
Date: Thursday, August 23, 2012 Sheet 69 of 93
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

Frank
20110513 Change N13P GPU.
+3VS_VGA

U7002
T7022
24 DGPU_HOLD_RST# 1 A VCC 5 1

4,24,30,32,33,53,59 BUF_PLT_RST# 2 B

3 GND 4 PEX_RST
D D
Y
SN74LVC1G08DCKR
/DGPU
R7020 2 1 0Ohm
@

2
R7009
+3VS_VGA +3VS_VGA 100KOhm U7001A
+1.05VS_VGA
/DGPU 1/19 PCI_EXPRESS

1
2
PLACE UNDER BGA
R7008 AJ11 PLACE BETWEEN BGA AND POWER SUPPLY
PEX_WAKE_N
10KOhm AG19
PEX_IOVDD1
AJ12 AG21

1
/DGPU PEX_RST_N PEX_IOVDD2

1
C7052 C7001 C7002 C7003 C7009 C7004 C7005 C7010

G
AG22

1
CLKREQ_PEG#_R PEX_IOVDD3
AK12 AG24

S 2
21 CLKREQ_PEG# PEX_CLKREQ_N PEX_IOVDD4
AH21 0.1UF/16V 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 10UF/6.3V 10UF/6.3V 22UF/6.3V 22UF/6.3V

2
PEX_IOVDD5 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU
21 CLK_PCIE_PEG_PCH AL13 AH25 /DGPU
Q7001 PEX_REFCLK PEX_IOVDD6
21 CLK_PCIE_PEG#_PCH AK13
2N7002 /DGPU PEX_REFCLK_N
/DGPU PCIENB_RXP0 C7032 0.22UF/10V PEX_TX0+ AK14
PCIENB_RXN0 C7021 0.22UF/10V PEX_TX0- AJ14 PEX_TX0
PEX_TX0_N
PCIEG_RXP0 /DGPU AN12
PCIEG_RXN0 PEX_RX0
AM12 AG13
/DGPU PEX_RX0_N PEX_IOVDDQ1
AG15
PEX_IOVDDQ2

1
PCIENB_RXP1 C7018 0.22UF/10V PEX_TX1+ AH14 AG16 C7053 C7008 C7006 C7007 C7011
PCIENB_RXN1 C7019 0.22UF/10V PEX_TX1- AG14 PEX_TX1 PEX_IOVDDQ3
AG18
PEX_TX1_N PEX_IOVDDQ4 0.1UF/16V 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 10UF/6.3V
AG25

2
PCIEG_RXP1 /DGPU PEX_IOVDDQ5 /DGPU /DGPU /DGPU /DGPU
AN14 AH15 /DGPU
PCIEG_RXN1 PEX_RX1 PEX_IOVDDQ6
AM14 AH18
/DGPU PEX_RX1_N PEX_IOVDDQ7
AH26
PCIENB_RXP2 C7024 0.22UF/10V PEX_TX2+ AK15 PEX_IOVDDQ8
AH27
PCIENB_RXN2 C7031 0.22UF/10V PEX_TX2- AJ15 PEX_TX2 PEX_IOVDDQ9
AJ27
PEX_TX2_N PEX_IOVDDQ10
AK27
PCIEG_RXP2 /DGPU PEX_IOVDDQ11 20110909 Joyoung
C AP14 AL27 C
PCIEG_RXN2 PEX_RX2 PEX_IOVDDQ12 EMI Request
AP15 AM28
/DGPU PEX_RX2_N PEX_IOVDDQ13
AN28
PCIENB_RXP3 C7020 0.22UF/10V PEX_TX3+ AL16 PEX_IOVDDQ14
PCIENB_RXN3 C7022 0.22UF/10V PEX_TX3- AK16 PEX_TX3
PEX_TX3_N
PCIEG_RXP3 /DGPU AN15
PCIEG_RXN3 PEX_RX3
AM15
/DGPU PEX_RX3_N 0928 Alfie
PCIENB_RXP4 C7023 0.22UF/10V PEX_TX4+ AK17
PEX_PLL_HVDD
PCIENB_RXN4 C7028 0.22UF/10V PEX_TX4- AJ17 PEX_TX4
PEX_TX4_N
N13P-GL N13P-GS
PCIEG_RXP4 /DGPU AN17
PCIEG_RXN4 PEX_RX4
AM17
PEX_RX4_N PEX_PLL_HVDD
/DGPU NC (3.3V) +3VS_VGA
PCIENB_RXP5 C7036 0.22UF/10V PEX_TX5+ AH17
PCIENB_RXN5 C7030 0.22UF/10V PEX_TX5- AG17 PEX_TX5
PEX_TX5_N R7021
AH12 2 1 0Ohm
PCIEG_RXP5 /DGPU PEX_PLL_HVDD
3 PCIENB_RXP[0..15] AP17 /GS
PEX_RX5

2
PCIEG_RXN5 AP18 AG12 C7016 C7017 C7015
3 PCIENB_RXN[0..15] PEX_RX5_N PEX_SVDD_3V3
/DGPU
PCIENB_RXP6 C7026 0.22UF/10V PEX_TX6+ AK18 0.1UF/16V 4.7UF/6.3V 4.7UF/6.3V

1
PCIENB_RXN6 C7025 0.22UF/10V PEX_TX6- AJ18 PEX_TX6 /DGPU /DGPU /DGPU
PEX=> From NB PCIEG_RXP6 /DGPU AN18
PEX_TX6_N

PCIEG_RXN6 PEX_RX6
EXP: VGA Card to NB PCIENB_RXP7 C7029
/DGPU
AM18

0.22UF/10V PEX_TX7+ AL19


PEX_RX6_N

PCIENB_RXN7 C7027 0.22UF/10V PEX_TX7- AK19 PEX_TX7


3 PCIEG_RXP[0..15] PEX_TX7_N
3 PCIEG_RXN[0..15]
PCIEG_RXP7 /DGPU AN20
PCIEG_RXN7 PEX_RX7
AM20
/DGPU PEX_RX7N
PCIENB_RXP8 C7034 0.22UF/10V PEX_TX8+ AK20
PCIENB_RXN8 C7033 0.22UF/10V PEX_TX8- AJ20 PEX_TX8
PEX_TX8_N
L4 NVDD_SENSE 87
PCIEG_RXP8 /DGPU VDD_SENSE
AP20
PCIEG_RXN8 PEX_RX8
AP21
B
/DGPU PEX_RX8_N B
L5 NVDD_GND_SENSE 87
PCIENB_RXP9 C7046 0.22UF/10V PEX_TX9+ AH20 GND_SENSE
PCIENB_RXN9 C7035 0.22UF/10V PEX_TX9- AG20 PEX_TX9
PEX_TX9_N
PCIEG_RXP9 /DGPU AN21
PCIEG_RXN9 PEX_RX9
AM21
/DGPU PEX_RX9_N
PCIENB_RXP10 C7038 0.22UF/10V PEX_TX10+ AK21
PCIENB_RXN10 C7037 0.22UF/10V PEX_TX10- AJ21 PEX_TX10
PEX_TX10_N
P8
PCIEG_RXP10 /DGPU NC12
AN23
PCIEG_RXN10 PEX_RX10
AM23
/DGPU PEX_RX10_N 0928 Alfie
PCIENB_RXP11 C7040 0.22UF/10V PEX_TX11+ AL22
PEX_PLLVDD
PCIENB_RXN11 C7039 0.22UF/10V PEX_TX11- AK22 PEX_TX11
PEX_TX11_N
N13P-GL N13P-GS
PCIEG_RXP11 /DGPU AP23 PEX_TSTCLK_OUT R7007 1 2 200Ohm
PCIEG_RXN11 PEX_RX11 @
AP24
PEX_RX11_N
/DGPU
PEX_TSTCLK_OUT
AJ26
PEX_TSTCLK_OUT#
L7001 R7022
PCIENB_RXP12 C7042 0.22UF/10V PEX_TX12+ AK23 AK26
PCIENB_RXN12 C7041 0.22UF/10V PEX_TX12- AJ23 PEX_TX12 PEX_TSTCLK_OUT_N
PEX_TX12_N
PCIEG_RXP12 /DGPU AN24
PCIEG_RXN12 PEX_RX12 PLACE NEAR PLACE NEAR BGA
AM24
/DGPU PEX_RX12_N +1.05VS_VGA
PCIENB_RXP13 C7047 0.22UF/10V PEX_TX13+ AH23 L7001
PCIENB_RXN13 C7043 0.22UF/10V PEX_TX13- AG23 PEX_TX13
AG26 1 2 /GL
PEX_TX13_N PEX_PLLVDD

2
PCIEG_RXP13 /DGPU AN26 C7061 C7044 C7045 30Ohm/100Mhz
PCIEG_RXN13 PEX_RX13
AM26
/DGPU PEX_RX13_N 0.1UF/16V 1UF/6.3V 4.7UF/6.3V 2 1

1
PCIENB_RXP14 C7049 0.22UF/10V PEX_TX14+ AK24 /DGPU /DGPU /DGPU R7022 /GS 0Ohm
PCIENB_RXN14 C7048 0.22UF/10V PEX_TX14- AJ24 PEX_TX14 R7004
AK11 1 2 10KOhm
PEX_TX14_N TESTMODE /DGPU
PCIEG_RXP14 /DGPU AP26
PCIEG_RXN14 PEX_RX14
AP27
/DGPU PEX_RX14_N
A PCIENB_RXP15 C7051 0.22UF/10V PEX_TX15+ AL25 A
PCIENB_RXN15 C7050 0.22UF/10V PEX_TX15- AK25 PEX_TX15
PEX_TX15_N R7003
PCIEG_RXP15 /DGPU AN27 AP29 PEX_TERMP 1 2
PCIEG_RXN15 PEX_RX15 PEX_TERMP 1%
AM27
PEX_RX15_N 2.49KOhm /DGPU

N13P-GS
02V0A0000011

/DGPU
Title : PEG
PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg
Size Project Name
JM50 Rev
C 3.1
P/N <OrgAddr2>
Date: Thursday, August 23, 2012 Sheet 70 of 93
5 4 3 2 1
5 4 3 2 1

77 FBCD[0..63]
76 FBAD[0..63] 77 FBC_CMD[0..31]
76 FBA_CMD[0..31] 77 FBCDQM[0..7]
76 FBADQM[0..7] 77 FBCDQS_WP[0..7]
76 FBADQS_WP[0..7] 77 FBCDQS_RN[0..7]
76 FBADQS_RN[0..7]
FB_CLAMP
U7001B N13P-GL N13P-GS U7001C
2/19 FBA 3/19 FBB

BOT SIDE NC PD 10K

FBAD0 L28 E1 R7120 2 1 10KOhm FBCD0 G9


D
FBAD1 FBA_D0 FB_CLAMP FBCD1 FBB_D0 U7001H
D
M29 E9
FBAD2 FBA_D1 /GS FBCD2 FBB_D1
L29 G8 10/19 XVDD
FBAD3 FBA_D2 FBCD3 FBB_D2
M28 F9
FBAD4 FBA_D3 FBCD4 FBB_D3
N31 F11 CONFIGURABLE
FBAD5 FBA_D4 FBB_D4
P29 K27 2 1+FB_PLLAVDD FBCD5 G11 POWER
FBA_D5 FB_DLL_AVDD FBB_D5

1
FBAD6 R29 R7118 /GS 0Ohm FBCD6 F12 CHANNELS
FBAD7 FBA_D6 C7115 FBCD7 FBB_D6
P28 G12 U1
FBAD8 FBA_D7 0.1UF/10V FBCD8 FBB_D7 XVDD_1
J28 G6 U2

2
FBAD9 FBA_D8 10% FBCD9 FBB_D8 XVDD_2
H29 F5 U3
FBAD10 FBA_D9 /DGPU FBCD10 FBB_D9 XVDD_3
J29 E6 U4
FBAD11 FBA_D10 FBCD11 FBB_D10 XVDD_4
H28 F6 U5
FBAD12 FBA_D11 FBCD12 FBB_D11 XVDD_5
FBAD13
G29
E31
FBA_D12 FB_DLL_AVDD FBCD13
F4
G4
FBB_D12 XVDD_6
U6
U7
FBAD14 FBA_D13 FBCD14 FBB_D13 XVDD_7
E32 E2 U8
FBA_D14 FBB_D14 XVDD_8
FBAD15 F30
FBA_D15 N13P-GL N13P-GS FBCD15 F3
FBB_D15
FBAD16 C34 FBCD16 C2
FBAD17 FBA_D16 FBCD17 FBB_D16
D32
FBA_D17 FB_DLL_AVDD D4
FBB_D17 XVDD_9
V1
FBAD18 B33
FBA_D18 NC (1.05V) FBCD18 D3
FBB_D18 XVDD_10
V2
FBAD19 C33 FBCD19 C1 V3
FBAD20 FBA_D19 FBCD20 FBB_D19 XVDD_11
F33 B3 V4
FBAD21 FBA_D20 FBCD21 FBB_D20 XVDD_12
F32 C4 V5
FBAD22 FBA_D21 FBCD22 FBB_D21 XVDD_13
H33 B5 V6
FBAD23 FBA_D22 FBCD23 FBB_D22 XVDD_14
H32 C5 V7
FBAD24 FBA_D23 FBCD24 FBB_D23 XVDD_15
P34 A11 V8
FBAD25 FBA_D24 FBCD25 FBB_D24 XVDD_16
P32 C11
FBAD26 FBA_D25 FBCD26 FBB_D25
P31 D11
FBAD27 FBA_D26 FBCD27 FBB_D26
P33 B11 W2
FBAD28 FBA_D27 FBCD28 FBB_D27 XVDD_17
L31 D8 W3
FBAD29 FBA_D28 FBCD29 FBB_D28 XVDD_18
L34 A8 W4
FBAD30 FBA_D29 FBCD30 FBB_D29 XVDD_19
L32 C8 W5
FBAD31 FBA_D30 FBCD31 FBB_D30 XVDD_20
L33 B8 W7
FBAD32 FBA_D31 FBCD32 FBB_D31 XVDD_21
AG28 F24 W8
FBAD33 FBA_D32 FBA_CMD0 FBCD33 FBB_D32 FBC_CMD0 XVDD_22
AF29 U30 G23 D13
FBAD34 FBA_D33 FBA_CMD0 Joyoung R1.0 FBCD34 FBB_D33 FBB_CMD0 Joyoung R1.0
AG29 T31 E24 E14
FBAD35 FBA_D34 FBA_CMD1 FBA_CMD2 remove TP FBCD35 FBB_D34 FBB_CMD1 FBC_CMD2 remove TP
AF28 U29 G24 F14
FBAD36 FBA_D35 FBA_CMD2 FBA_CMD3 FBCD36 FBB_D35 FBB_CMD2 FBC_CMD3
AD30 R34 D21 A12
FBAD37 FBA_D36 FBA_CMD3 FBA_CMD4 FBCD37 FBB_D36 FBB_CMD3 FBC_CMD4
AD29 R33 E21 B12 Y1
FBAD38 FBA_D37 FBA_CMD4 FBA_CMD5 FBCD38 FBB_D37 FBB_CMD4 FBC_CMD5 XVDD_23
C AC29 U32 G21 C14 Y2 C
FBAD39 FBA_D38 FBA_CMD5 FBA_CMD6 FBCD39 FBB_D38 FBB_CMD5 FBC_CMD6 XVDD_24
AD28 U33 F21 B14 Y3
FBAD40 FBA_D39 FBA_CMD6 FBA_CMD7 FBCD40 FBB_D39 FBB_CMD6 FBC_CMD7 XVDD_25
AJ29 U28 G27 G15 Y4
FBAD41 FBA_D40 FBA_CMD7 FBA_CMD8 FBCD41 FBB_D40 FBB_CMD7 FBC_CMD8 XVDD_26
AK29 V28 D27 F15 Y5
FBAD42 FBA_D41 FBA_CMD8 FBA_CMD9 FBCD42 FBB_D41 FBB_CMD8 FBC_CMD9 XVDD_27
AJ30 V29 G26 E15 Y6
FBAD43 FBA_D42 FBA_CMD9 FBA_CMD10 FBCD43 FBB_D42 FBB_CMD9 FBC_CMD10 XVDD_28
AK28 V30 E27 D15 Y7
FBAD44 FBA_D43 FBA_CMD10 FBA_CMD11 FBCD44 FBB_D43 FBB_CMD10 FBC_CMD11 XVDD_29
AM29 U34 E29 A14 Y8
FBAD45 FBA_D44 FBA_CMD11 FBA_CMD12 FBCD45 FBB_D44 FBB_CMD11 FBC_CMD12 XVDD_30
AM31 U31 F29 D14
FBAD46 FBA_D45 FBA_CMD12 FBA_CMD13 FBCD46 FBB_D45 FBB_CMD12 FBC_CMD13
AN29 V34 E30 A15
FBAD47 FBA_D46 FBA_CMD13 FBA_CMD14 FBCD47 FBB_D46 FBB_CMD13 FBC_CMD14
AM30 V33 D30 B15 AA1
FBAD48 FBA_D47 FBA_CMD14 FBA_CMD15 FBCD48 FBB_D47 FBB_CMD14 FBC_CMD15 XVDD_31
AN31 Y32 A32 C17 AA2
FBAD49 FBA_D48 FBA_CMD15 FBA_CMD16 FBCD49 FBB_D48 FBB_CMD15 FBC_CMD16 XVDD_32
AN32 AA31 C31 D18 AA3
FBAD50 FBA_D49 FBA_CMD16 Joyoung R1.0 FBCD50 FBB_D49 FBB_CMD16 Joyoung R1.0 XVDD_33
AP30 AA29 C32 E18 AA4
FBAD51 FBA_D50 FBA_CMD17 FBA_CMD18 remove TP FBCD51 FBB_D50 FBB_CMD17 FBC_CMD18 remove TP XVDD_34
AP32 AA28 B32 F18 AA5
FBAD52 FBA_D51 FBA_CMD18 FBA_CMD19 FBCD52 FBB_D51 FBB_CMD18 FBC_CMD19 XVDD_35
AM33 AC34 D29 A20 AA6
FBAD53 FBA_D52 FBA_CMD19 FBA_CMD20 FBCD53 FBB_D52 FBB_CMD19 FBC_CMD20 XVDD_36
AL31 AC33 A29 B20 AA7
FBAD54 FBA_D53 FBA_CMD20 FBA_CMD21 FBCD54 FBB_D53 FBB_CMD20 FBC_CMD21 XVDD_37
AK33 AA32 C29 C18 AA8
FBAD55 FBA_D54 FBA_CMD21 FBA_CMD22 FBCD55 FBB_D54 FBB_CMD21 FBC_CMD22 XVDD_38
AK32 AA33 B29 B18
FBAD56 FBA_D55 FBA_CMD22 FBA_CMD23 FBCD56 FBB_D55 FBB_CMD22 FBC_CMD23 N13P-GS
AD34 Y28 B21 G18
FBAD57 FBA_D56 FBA_CMD23 FBA_CMD24 FBCD57 FBB_D56 FBB_CMD23 FBC_CMD24
AD32 Y29 C23 G17 02V0A0000011
FBAD58 FBA_D57 FBA_CMD24 FBA_CMD25 FBCD58 FBB_D57 FBB_CMD24 FBC_CMD25
AC30 W31 A21 F17
FBAD59 FBA_D58 FBA_CMD25 FBA_CMD26 FBCD59 FBB_D58 FBB_CMD25 FBC_CMD26
AD33 Y30 C21 D16
FBAD60 FBA_D59 FBA_CMD26 FBA_CMD27 FBCD60 FBB_D59 FBB_CMD26 FBC_CMD27 /DGPU
AF31 AA34 B24 A18
FBAD61 FBA_D60 FBA_CMD27 FBA_CMD28 FBCD61 FBB_D60 FBB_CMD27 FBC_CMD28
AG34 Y31 C24 D17
FBAD62 FBA_D61 FBA_CMD28 FBA_CMD29 FBCD62 FBB_D61 FBB_CMD28 FBC_CMD29
AG32 Y34 B26 A17
FBAD63 FBA_D62 FBA_CMD29 FBA_CMD30 FBCD63 FBB_D62 FBB_CMD29 FBC_CMD30
AG33 Y33 C26 B17
FBA_D63 FBA_CMD30 Joyoung R1.0 FBB_D63 FBB_CMD30 Joyoung R1.0
V31 E17
FBA_CMD31 remove TP FBB_CMD31 remove TP
FBADQM0 P30 R32 FBCDQM0 E11 C12
FBADQM1 FBA_DQM0 FBA_CMD_RFU0 FBCDQM1 FBB_DQM0 FBB_CMD_RFU0
F31 AC32 E3 C20
FBADQM2 FBA_DQM1 FBA_CMD_RFU1 FBCDQM2 FBB_DQM1 FBB_CMD_RFU1
F34 A3
FBADQM3 FBA_DQM2 FBCDQM3 FBB_DQM2
M32 C9
FBADQM4 FBA_DQM3 FBCDQM4 FBB_DQM3
AD31 F23
FBADQM5 FBA_DQM4 /DGPU +1.5VS_VGA FBCDQM5 FBB_DQM4 /DGPU +1.5VS_VGA
AL29 F27
FBADQM6 FBA_DQM5 /DGPU FBCDQM6 FBB_DQM5 /DGPU
AM32 C30
FBADQM7 FBA_DQM6 FBA_DEBUG0 R7101 2 60.4Ohm 1% FBCDQM7 FBB_DQM6 FBC_DEBUG
AF34 R28 1 A24 G14 1 R7103 2 60.4Ohm 1%
FBA_DQM7 FBA_DEBUG0 FBA_DEBUG1 R7102 2 60.4Ohm 1% FBB_DQM7 FBB_DEBUG0
AC28 1 G20 1 R7104 2 60.4Ohm 1%
FBA_DEBUG1 FBB_DEBUG1
B B
FBADQS_WP0 M31 FBCDQS_WP0 D10
FBADQS_WP1 FBA_DQS_WP0 FBCDQS_WP1 FBB_DQS_WP0
G31 D5
FBADQS_WP2 FBA_DQS_WP1 FBCDQS_WP2 FBB_DQS_WP1
E33 R30 FBA_CLK0 76 C3 D12 FBC_CLK0 77
FBADQS_WP3 FBA_DQS_WP2 FBA_CLK0 FBCDQS_WP3 FBB_DQS_WP2 FBB_CLK0
M33 R31 FBA_CLK0# 76 B9 E12 FBC_CLK0# 77
FBADQS_WP4 FBA_DQS_WP3 FBA_CLK0_N FBCDQS_WP4 FBB_DQS_WP3 FBB_CLK0_N
AE31 AB31 FBA_CLK1 76 E23 E20 FBC_CLK1 77
FBADQS_WP5 FBA_DQS_WP4 FBA_CLK1 FBCDQS_WP5 FBB_DQS_WP4 FBB_CLK1
AK30 AC31 FBA_CLK1# 76 E28 F20 FBC_CLK1# 77
FBADQS_WP6 FBA_DQS_WP5 FBA_CLK1_N FBCDQS_WP6 FBB_DQS_WP5 FBB_CLK1_N
AN33 B30
FBADQS_WP7 FBA_DQS_WP6 FBCDQS_WP7 FBB_DQS_WP6
AF33 A23
FBA_DQS_WP7 FBB_DQS_WP7

FBADQS_RN0 M30 K31 FBCDQS_RN0 D9 F8


FBADQS_RN1 FBA_DQS_RN0 FBA_WCK01 FBCDQS_RN1 FBB_DQS_RN0 FBB_WCK01
H30 L30 E4 E8
FBADQS_RN2 FBA_DQS_RN1 FBA_WCK01_N FBCDQS_RN2 FBB_DQS_RN1 FBB_WCK01_N
E34 H34 B2 A5
FBADQS_RN3 FBA_DQS_RN2 FBA_WCK23 FBCDQS_RN3 FBB_DQS_RN2 FBB_WCK23
M34 J34 A9 A6
FBADQS_RN4 FBA_DQS_RN3 FBA_WCK23_N FBCDQS_RN4 FBB_DQS_RN3 FBB_WCK23_N
AF30 AG30 D22 D24
FBADQS_RN5 FBA_DQS_RN4 FBA_WCK45 FBCDQS_RN5 FBB_DQS_RN4 FBB_WCK45
AK31 AG31 D28 D25
FBADQS_RN6 FBA_DQS_RN5 FBA_WCK45_N FBCDQS_RN6 FBB_DQS_RN5 FBB_WCK45_N
AM34 AJ34 A30 B27
FBADQS_RN7 FBA_DQS_RN6 FBA_WCK67 FBCDQS_RN7 FBB_DQS_RN6 FBB_WCK67
AF32 AK34 B23 C27
FBA_DQS_RN7 FBA_WCK67_N FBB_DQS_RN7 FBB_WCK67_N

FBA_WCKB01
J30
J31
FBB_WCKB01
D6
D7
FBB_PLL_AVDD
FBA_WCKB01_N FBB_WCKB01_N
J32 C6
FBA_WCKB23 FBB_WCKB23
FBA_WCKB23_N
J33
FBB_WCKB23_N
B6 N13P-GL N13P-GS
AH31 F26
FBA_WCKB45 FBB_WCKB45
FBA_WCKB45_N
AJ31
FBB_WCKB45_N
E26 FBB_PLL_AVDD
FBA_WCKB67
AJ32
FBB_WCKB67
A26 NC (1.05V)
T7104 AJ33 A27
FBA_WCKB67_N FBB_WCKB67_N
1 FB_VREF H26 U27 +FB_PLLAVDD H17 2 1+FB_PLLAVDD
FB_VREF FBA_PLL_AVDD FBB_PLL_AVDD

1
R7119 /GS 0Ohm
C7120
/DGPU N13P-GS N13P-GS 0.1UF/10V

2
02V0A0000011 02V0A0000011 10%
/GS
/DGPU Frank /DGPU
20110613 Vender suggest C7119 change 22UF. FBA_ODT FBC_ODT
A A
/DGPU /DGPU
FBA_CMD2 R7108 2 1 10KOhm FBC_CMD2 R7114 2 1 10KOhm
+1.05VS_VGA FBA_CMD18 R7109 1 10KOhm FBC_CMD18 R7113 1 10KOhm
1.05V+-3% 100 mA 2 2
L7101 /DGPU
+FB_PLLAVDD 1 2 FBA_RST# /DGPU FBC_RST#
1

/DGPU /DGPU
1

C7109 C7112 30Ohm/100Mhz C7113 FBA_CMD5 R7110 2 1 10KOhm FBC_CMD5 R7115 2 1 10KOhm
0.1UF/10V 1UF/6.3V C7119 vx_l0603_h37_small 1UF/6.3V
2

10% 10% 22UF/6.3V 10% FBA_CKE FBC_CKE


/DGPU
2

/DGPU
/DGPU /DGPU /DGPU
/DGPU /DGPU FBA_CMD3 R7111 2 1 10KOhm FBC_CMD3 R7116 2 1 10KOhm

Place Under GPU Place Near GPU


FBA_CMD19 R7112 2 1 10KOhm FBC_CMD19 R7117 2
/DGPU
1 10KOhm Title : FrameBuffer
/DGPU Engineer: Joyoung_Chianhg
BG1-HW RD Div.2-NB RD Dept.5

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 71 of 93
5 4 3 2 1
5 4 3 2 1

+3VS_VGA

R1.1 Remove the TP(T7203 T7204) for DACA signal by Nvidia

2
RN7201B RN7201A
SKU OPT DIS_CRT 2.2KOhm
/DGPU
2.2KOhm
/DGPU
U7001N
0.1UF/16V 4/19 DACA
R7902 10K Ohm

1
1AV200000042
D
10V220000003 GF108/GKx GF117 GF117 GF108/GKx
D
DACA_VDD AG10 NC NC R4 I2CA_CLK
DACA_VDD I2CA_SCL I2CA_DAT
NC R5
I2CA_SDA
AP9 TSEN_VREF
DACA_VREF

2
AP8 NC NC AM9 CRT_HSYNC_VGA 1 T7201
R7201 DACA_RSET DACA_HSYNC CRT_VSYNC_VGA T7202
NC AN9 1
DACA_VSYNC
10KOhm

/DGPU NC AK9 DAC_VR 1 T7205

1
DACA_RED
NC AL10 DAC_VG 1 T7206
DACA_GREEN
NC AL9 DAC_VB 1 T7207
DACA_BLUE

+1.05VS_VGA N13P-GS
02V0A0000011 /DGPU

L7202 Remove 3 resistor


1 2 PLL_VDD near GPU
U7001O
1

1
30Ohm C7208 12/19 XTAL_PLL
C7207
/DGPU 22UF/6.3V 0.1UF/16V
2

2
+1.05VS_VGA /DGPU /DGPU AD8
PLLVDD
AE8
L7203 SP_PLLVDD
1 2 AD7 NC
VID_PLLVDD
180Ohm/100Mhz GF108/GKx GF117
1

1
C7209 C7210 C7214 0928 Alfie
C7211
/DGPU
22UF/6.3V 4.7UF/6.3V 0.1UF/16V 0.1UF/16V
2

2
/DGPU /DGPU /DGPU /DGPU XTALSSIN H1 J4 XTAL_OUTB
XTAL_SSIN XTAL_OUTBUFF

H3 H2
XTAL_IN XTAL_OUT

1
C Frank C
20110613 Follow Vender and spec suggest RN7203B N13P-GS /DGPU RN7203A
10KOhm 02V0A0000011 10KOhm
VGA_XTALIN 1 3 VGA_XTALOUT
/DGPU /DGPU

2
C7212 X7201 27MHZ C7213

4
10PF/50V 10PF/50V
1AV200000001 /DGPU 1AV200000001
/DGPU /DGPU

STUFF PDs on XTALSSIN and


R1.1 XTALOUTBUFF WHEN EXT_SS IS NOT USED R1.1
change value for -R test report change value for -R test report

B B

A A

Title : FRAME BUFFER C


PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg
Size Project Name
JM50 Rev
C 3.1
P/N <OrgAddr2>
Date: Thursday, August 23, 2012 Sheet 72 of 93
5 4 3 2 1
5 4 3 2 1

LVDS
R1.1 Remove the TP (T7301 T7311 T7302 T7307 T7303 T7304 T7305 T7306 T7308 T7309 T7310) by Nvidia
U7001J
6/19 IFPAB

ALL PINS NC FOR GF117

AN6
IFPA_TXC_N
AM6
IFPA_TXC
AJ8
IFPAB_RSET
AN3
IFPA_TXD0_N
Place Under GPU AP3
IFPA_TXD0
IFPAB_PLLVDD AH8
IFPAB_PLLVDD

2
D D
AM5
IFPA_TXD1_N
AN5
R7305 IFPA_TXD1
10KOhm
/DGPU AK6

1
IFPA_TXD2_N
AL6
IFPA_TXD2

AH6
IFPA_TXD3_N
AJ6
IFPA_TXD3 U7001M
9/19 IFPEF
AH9
IFPB_TXC_N
AJ9 ALL PINS NC FOR GF117
IFPB_TXC
IFPAB_IOVDD AG8
IFPA_IOVDD
AP5
IFPB_TXD4_N

2
DVI-DL DVI-SL/HDMI DP
AG9 AP6
IFPB_IOVDD IFPB_TXD4
R7306
10KOhm AL7 I2CY_SDA I2CY_SDA AB4
/DGPU IFPB_TXD5_N IFPE_AUX_I2CY_SDA_N
AM7 I2CY_SCL I2CY_SCL AB3

1
IFPB_TXD5 IFPE_PLLVDD IFPE_AUX_I2CY_SCL
AB8
IFPEF_PLLVDD
AM8 TXC TXC AC5
IFPB_TXD6_N IFPE_L3_N
AN8 AD6 TXC TXC AC4
IFPB_TXD6 IFPEF_RSET IFPE_L3

2
AC3
R7312 TXD0 TXD0 IFPE_L2_N
AL8 AC2
IFPB_TXD7_N TXD0 TXD0 IFPE_L2
AK8 10KOhm
IFPB_TXD7
TXD1 TXD1 AC1
/DGPU IFPE_L1_N
AD1
IFPE

1
TXD1 TXD1 IFPE_L1
AD3
TXD2 TXD2 IFPE_L0_N
AD2
TXD2 TXD2 IFPE_L0
N4
GPIO14
C
IFPAB C
N13P-GS
02V0A0000011
HPD_E HPD_E R1
GPIO18
/DGPU

HDMI
U7001K
7/19 IFPC
IFPE_IOVDD AC7
IFPE_IOVDD
ALL PINS NC FOR GF117 I2CZ_SDA AF2
IFPF_AUX_I2CZ_SDA_N
I2CZ_SCL AF3
IFPF_AUX_I2CZ_SCL
AC8
IFPF_IOVDD
AF8
IFPC_RSET

2
DVI/HDMI DP TXC AF1
R7310 IFPF_L3_N
Place Under GPU TXC AG1
IFPF_L3
10KOhm
IFPC_PLLVDD AF7 I2CW_SDA AG2 TXD3 TXD0 AD5
IFPC_PLLVDD IFPC_AUX_I2CW_SDA_N /DGPU IFPF_L2_N
I2CW_SCL AG3 TXD3 TXD0 AD4

1
IFPC_AUX_I2CW_SCL IFPF_L2
2

TXD4 TXD1 AF5


R7303 TXC IFPC_L3_N
AG4 IFPF TXD4 TXD1
IFPF_L1_N
IFPF_L1
AF4
10KOhm TXC AG5
/DGPU IFPC_L3
TXD5 TXD2 AE4
1

IFPF_L0_N
TXD0 AH4 TXD5 TXD2 AE3
IFPC IFPC_L2_N IFPF_L0
TXD0 AH3
IFPC_L2
TXD1 AJ2
IFPC_L1_N
TXD1 AJ3
IFPC_L1
HPD_F P3
GPIO19
TXD2 AJ1
IFPC_L0_N
TXD2 AK1
IFPC_L0
N13P-GS
02V0A0000011
IFPC_IOVDD AF6 P2
B IFPC_IOVDD GPIO15 B
HDMI_HP Pull-Down 10K at connnector /DGPU
2

N13P-GS
R7304 02V0A0000011
10KOhm
/DGPU
/DGPU
1

U7001L
8/19 IFPD

ALL PINS NC FOR GF117

AN2
IFPD_RSET
DVI/HDMI DP

IFPD_PLLVDD AG7 I2CX_SDA AK2


IFPD_PLLVDD IFPD_AUX_I2CX_SDA_N
2

I2CX_SCL AK3
R7308 IFPD_AUX_I2CX_SCL
10KOhm
/DGPU TXC AK5
IFPD_L3_N
TXC AK4
1

IFPD_L3

TXD0 AL4
IFPD IFPD_L2_N
TXD0 AL3
IFPD_L2
TXD1 AM4
IFPD_L1_N
TXD1 AM3
IFPD_L1
A A
TXD2 AM2
IFPD_L0_N
TXD2 AM1
IFPD_L0

IFPD_IOVDD AG6 M6
IFPD_IOVDD GPIO17
2

R7309
10KOhm N13P-GS
/DGPU 02V0A0000011
Title : FRAME BUFFER C
1

/DGPU
PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name
JM50 Rev
C 3.1
P/N <OrgAddr2>
Date: Thursday, August 23, 2012 Sheet 73 of 93
5 4 3 2 1
5 4 3 2 1

U7001P
13/19 MISC2 0928 Alfie change to N13P-GL strap
+3VS_VGA

H6 1 T7401
ROM_CS_N

2
H5 ROM_SI
ROM_SI ROM_SO R7410 R7412 R7414 R7417 R7418
H7
STRAP0 ROM_SO ROM_SCLK 45.3KOhm 45.3KOhm 10KOhm 45.3KOhm 45.3KOhm1%
J2 H4
STRAP1 STRAP0 ROM_SCLK 1% 1% 1% 1%
J7
STRAP2 STRAP1 /DGPU @ @ @ @
J6

1
STRAP3 STRAP2 STRAP0
J5
STRAP4 STRAP3 STRAP1
J3
STRAP4 STRAP2
STRAP3
STRAP4
R7402 10KOhm
D L2 2 1 D
BUFRST_N

2
+3VS_VGA
/DGPU R7411 R7413 R7415 R7416 R7419
R7403 10KOhm 45.3KOhm 4.99KOhm 15KOhm 4.99KOhm 45.3KOhm STRAP0 ROM_SI RAMCONFIG
STRAP_REFGND J1 L3 2 1 1% 1% 1% 1% 1% MONO RANK
2

MULTI_STRAP_REF0_GND CEC @ /DGPU /DGPU /DGPU /DGPU USER[3:0]

1
R7401 /GL 0928 Alfie 3 2 1 0 PANEL VS/HS Hynix 64Mx16 -> ram_cfg = 0x2
40.2KOhm 0 0 0 0 XGA -/- Samsung 64Mx16 -> ram_cfg = 0x3
1% CEC 0 0 0 1 XGA +/+ Hynix 128Mx16 -> ram_cfg = 0x6
0 0 1 0 SXGA +/+
1

/DGPU +3VS_VGA R2.0 12/20 Samsung 128Mx16 -> ram_cfg = 0x7


0 0 1 1 SXGA+ -/-
0 1 0 0 UXGA +/+
N13P-GS N13P-GL N13P-GS/N13M-GS 1 1 1 1 EDID N/A ROM_SO
02V0A0000011

1
PU 10K STRAP1 LOGICAL BIT
(3V3) NC R7404 R7405 R7406 3 XCLK_417
/DGPU 5.1KOhm 10KOhm 4.99KOhm 3GIO_PAD_CFG_ADR[3:0] 2 FB_0_BAR_SIZE
1% 1% 1% 3 2 1 0 PANEL 1 SMB_ALT_ADDR
@ @ /DGPU 0 0 0 0 RESERVED 0 VGA_DEVICE

2
ROM_SI .
ROM_SO 0 1 1 0 NOTEBOOK
ROM_SCLK . ROM_SCLK
.

2
1 1 1 1 RESERVED LOGICAL BIT
R7407 R7408 R7409 3 PCI_DEVID[4]
15KOhm 10KOhm 15KOhm STRAP2 2 SUB_VENDER
1% 1% 1% 1 SLOT_CLK_CFG
R2.1 01/09 /DGPU /DGPU @ LOGICAL BIT 0 PEX_PLL_EN_TERM

1
0 PCI_DEVID[0]
1 PCI_DEVID[1]
2 PCI_DEVID[2]
R1.1 Exchange R7408 to 10K PD (NV) 3 PCI_DEVID[3]

+3VS_VGA

C RN7413B 4 2.2KOhm 3 /DGPU VRAM need change BOM C


RN7413A 2 1 /DGPU +3VS_VGA
2.2KOhm
RN7411B 4 2.2KOhm 3 /DGPU
RN7411A 2 2.2KOhm 1 /DGPU Q7405A

2
U7001Q UM6K1N /DGPU
11/19 MISC1
T4 SMB_CLK_VGA 1 6
I2CS_SCL SMB1_CLK 28,30,50
T3 SMB_DAT_VGA 4 3
I2CS_SDA SMB1_DAT 28,30,50
R2
I2CC_SCL UM6K1N
R3

5
I2CC_SDA Q7405B /DGPU
R7 RN7415B 4 2.2KOhm 3 /DGPU +3VS_VGA
T7420 VGA_THERMDN K4 I2CB_SCL RN7415A /DGPU +3VS_VGA
1 R6 2 2.2KOhm 1
THERMDN I2CB_SDA
T7421 1 VGA_THERMDP K3 +3VS_VGA
THERMDP

T7422 1 VGA_JTAG_TCK
T7423 1 VGA_JTAG_TMS
AM10
AP11
JTAG_TCK
JTAG_TMS
CR R1.0 VID control change name
T7424 1 VGA_JTAG_TDI AM11

1
3
JTAG_TDI
T7425 1 VGA_JTAG_TDO AP12 R1.1 Remove L_VDDEN_VGA & LCD_BKEN_VGA signals, No function request on the pin (NV)
VGA_JTAG_TRST_N JTAG_TDO GPU_VID_4 RN7422A RN7422B
1 2 AN11 P6 VR_VID_4 87
10KOhm R7440 JTAG_TRST_N GPIO0 GPU_VID_3 10KOhm +3VS_VGA
M3 VR_VID_3 87 10KOhm
GPIO1 /DGPU /DGPU
/DGPU L6
GPIO2 R1.1 Remove 2 test point
P5
GPIO3
P7
2
4
T7426 GPIO4 GPU_VID_1
1 L7 VR_VID_1 87
GPIO5 GPU_VID_2 Q7403

1
M7 VR_VID_2 87
GPIO6

G
N8 2N7002
GPIO7 SL7401 1 2 R0402 VGA_OVERTEMP#_R

2 S

3
M1 VGA_OVERTEMP# 32
GPIO8

D
M2 SL7402 1 2 R0402 THERM_ALERT#
GPIO9 /DGPU
L1 Pull high +3VS at system
GPIO10 GPU_VID_0
M5 VR_VID_0 87
GPIO11 AC_BATT#
N3
GPIO12 GPU_VID_5
M4 VR_VID_5 87
GPIO13 VGA_DPRSLPVR_NV
R8 1 2 R0402 VGA_DPRSLPVR 87
0928 Alfie add VGA_DPRSLPVR
GPIO16 SL7403
P4
GPIO20 VPS
P1 1 2 +3VS_VGA
GPIO21 R7420 10KOhm
@
B B
R1.1 Remove the TP T7428 by Nvidia +3VS_VGA +3VS_VGA
2

N13P-GS R7421 R7422


02V0A0000011 10KOhm 10KOhm
/DGPU /DGPU
1

/DGPU AC_BATT#
Q7401A Q7401B
6

UM6K1N UM6K1N
/DGPU /DGPU
2 5 AC_IN_OC 30,88
1

R2.0 Joyoung
change to LV-shift cause chipset can't be pull low in DC mode.

+3VS_VGA

Q7402
1
G

2N7002
THERM_ALERT#
2 S

VGA_THRALARM# 30
D

/DGPU

A A

Title : FRAME BUFFER A


PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg
Size Project Name Rev
JM50
A2 3.1
P/N <OrgAddr2>
Date: Thursday, August 23, 2012 Sheet 74 of 93
5 4 3 2 1
5 4 3 2 1

+VGA_VCORE
U7001E
14/19 NVVDD Frank
PLACE UNDER GPU U7001F +3VS_VGA
AA12 18/19 NC/VDD33
20110613 Follow Vender and spec suggest=>Remove C7506, C7508
VDD1 R7501 0Ohm
AA14
VDD2

1
AA16 C7511 C7510 C7513 C7512 C7515 C7514 C7517 C7516 AC6 J8 2 1
VDD3 NC1 VDD33_1 /DGPU
AA19 AJ28 K8
VDD4 NC2 VDD33_2

2
AA21 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V AJ4 L8 C7507 C7501 C7504 C7505 C7502 C7503

2
VDD5 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU NC3 VDD33_3
AA23 AJ5 M8
VDD6 NC4 VDD33_4 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 1UF/6.3V 4.7UF/6.3V
AB13 AL11

1
VDD7 NC5 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU
AB15 C15
VDD8 GND NC6
AB17 D19
VDD9 NC7
AB18 D20
VDD10 NC8

2
AB20 C7519 C7518 C7521 C7520 C7523 C7522 C7525 C7524 D23 PLACE NEAR BALLS PLACE NEAR BGA
VDD11 NC9 GND
AB22 D26
D VDD12 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V NC10 D
AC12 H31

1
VDD13 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU NC11
AC14 T8
VDD14 NC13
AC16 V32
VDD15 NC14
AC19
VDD16
AC21
VDD17 GND
AC23
VDD18 N13P-GS
M12
VDD19 2

2
M14 C7527 C7526 C7528 C7529 C7531 C7530 C7532 02V0A0000011
VDD20
M16
VDD21 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V
M19
1

1
VDD22 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU
M21
VDD23
M23
VDD24
N13
VDD25
VDD26
N15 0928 Alfie change 15pcs 10uF to 4.7uF , follow NV suggest
N17 GND
VDD27
N18
VDD28
N20
VDD29
1

1
N22
+ C7534 C7533 C7535 C7536 C7537 C7552 C7553
VDD30
VDD31
P12 CE7501 Frank
P14 330UF/2V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 22UF/6.3V 47UF/4V
20110613 Follow Vender and spec suggest
2

2
VDD32 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU
P16 1BV080000010
2

VDD33 => Add C7542, C7543, C7544, C7545 and C7556 mount
P19
VDD34
P21 Remove C7540, C7561, C7558, C7649
VDD35 PLACE NEAR GPU +1.5VS_VGA +1.5VS_VGA
P23
VDD36
R13 GND U7001D Change C7541, C7557 to 10uF
VDD37
R15 15/19 FBVDDQ
VDD38
VDD39
R17 0929 Alfie change 5pcs 10uF to 4.7uF , follow NV suggest
R18 AA27
VDD40 FBVDDQ1

1
R20 AA30 C7539 C7559 C7542 C7544 C7538 C7555 C7554 C7541
VDD41 FBVDDQ2
R22 AB27
VDD42 FBVDDQ3 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 1UF/6.3V 4.7UF/6.3V 10UF/6.3V 10UF/6.3V
T12 AB33

2
VDD43 FBVDDQ4 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU
T14 AC27
VDD44 FBVDDQ5
T16 AD27
VDD45 FBVDDQ6
T19 AE27
VDD46 FBVDDQ7
T21 AF27
VDD47 FBVDDQ8 GND
T23 AG27
VDD48 FBVDDQ9
U13 B13
VDD49 FBVDDQ10

1
C U15 B16 C7551 C7556 C7543 C7545 C7560 C7562 C7550 C7557 C
VDD50 FBVDDQ11
U17 B19
VDD51 FBVDDQ12 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 1UF/6.3V 4.7UF/6.3V 10UF/6.3V 10UF/6.3V
U18 E13

2
VDD52 FBVDDQ13 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU
U20 E16
VDD53 FBVDDQ14
U22 E19
VDD54 FBVDDQ15
V13 H10
VDD55 FBVDDQ16
V15 H11
VDD56 U7001G FBVDDQ17
V17 H12
VDD57 FBVDDQ18 GND
V18 16/19 GND_1/2 H13
VDD58 FBVDDQ19
V20 A2 AM25 H14
VDD59 GND1 GND73 FBVDDQ20
V22 AA17 AN1 H15
VDD60 GND5 GND74 FBVDDQ21
W12 AA18 AN10 H16
VDD61 GND6 GND75 FBVDDQ22
W14 AA20 AN13 H18
VDD62 GND7 GND76 FBVDDQ23
W16 AA22 AN16 H19 CALIBRATION PIN GDDR5
VDD63 GND8 GND77 FBVDDQ24
W19 AB12 AN19 H20
VDD64 GND9 GND78 FBVDDQ25
W21 AB14 AN22 H21 FB_CALx_PD_VDDQ 40
VDD65 GND10 GND79 FBVDDQ26
W23 AB16 AN25 H22
VDD66 GND11 GND80 FBVDDQ27
Y13 AB19 AN30 H23 FB_CALx_PU_GND 40
VDD67 GND12 GND81 FBVDDQ28
Y15 AB2 AN34 H24
VDD68 GND13 GND82 FBVDDQ29
Y17 AB21 AN4 H8 FB_CALx_TERM_GND 60
VDD69 GND14 GND83 FBVDDQ30
Y18 A33 AN7 H9
VDD70 GND2 GND84 FBVDDQ31
Y20 AB23 AP2 L27
VDD71 GND15 GND85 FBVDDQ32
Y22 AB28 AP33 M27
VDD72 GND16 GND86 FBVDDQ33
AB30 B1 N27
GND17 GND87 FBVDDQ34
AB32 B10 P27
N13P-GS GND18 GND88 FBVDDQ35
AB5 B22 R27
GND19 GND89 FBVDDQ36
02V0A0000011 AB7 B25 T27
GND20 GND90 FBVDDQ37
AC13 B28 T30
GND21 GND91 FBVDDQ38
AC15 B31 T33
/DGPU GND22 GND92 FBVDDQ39
AC17 B34 V27
GND23 GND93 FBVDDQ40
AC18 B4 W27
GND24 GND94 FBVDDQ41
U7001I AA13 B7 W30
GND3 GND95 FBVDDQ42
17/19 GND_2/2 AC20 C10 W33
GND25 GND96 FBVDDQ43
AC22 C13 Y27
GND26 GND97 FBVDDQ44
N19 T28 AE2 C19 T7508
GND143 GND172 GND27 GND98
N2 T32 AE28 C22
GND144 GND173 GND28 GND99 FBVDDQ_SENSE
N21 T5 AE30 C25 F1 1
GND145 GND174 GND29 GND100 FB_VDDQ_SENSE
N23 T7 AE32 C28 T7509 PLACE CLOSE TO GPU BALLS
B GND146 GND175 GND30 GND101 B
N28 U12 AE33 C7
GND147 GND176 GND31 GND102 FBVDDQ_GND_SENSE
N30 U14 AE5 D2 F2 1
GND148 GND177 GND32 GND103 FB_GND_SENSE +1.5VS_VGA
N32 U16 AE7 D31
GND149 GND178 GND33 GND104 /DGPU R7507 40.2Ohm
N33 U19 AH10 D33
GND150 GND179 GND35 GND105 FB_CAL_PD_VDDQ
N5 U21 AA15 E10 J27 1 2
GND151 GND180 GND4 GND106 FB_CAL_PD_VDDQ
N7 U23 AH13 E22
GND152 GND181 GND37 GND107 R7509 42.2Ohm
P13 V12 AH16 E25
GND153 GND182 GND38 GND108 FB_CAL_PU_GND /DGPU
P15 V14 AH19 E5 H27 1 2
GND154 GND183 GND39 GND109 FB_CAL_PU_GND
P17 V16 AH2 E7
GND155 GND184 GND40 GND110 R7510
P18 V19 AH22 F28
GND156 GND185 GND41 GND111 FB_CAL_TERM_GND /DGPU
P20 V21 AH24 F7 H25 1 2
GND157 GND186 GND42 GND112 FB_CAL_TERM_GND
P22 V23 AH28 G10
GND158 GND187 GND43 GND113 51.1Ohm
R12 W13 AH29 G13
GND159 GND188 GND44 GND114 N13P-GS
R14 W15 AH30 G16 10V220000319
GND160 GND189 GND45 GND115 GND
R16 W17 AH32 G19 02V0A0000011
GND161 GND190 GND46 GND116
R19 W18 AH33 G2
GND162 GND191 GND47 GND117
R21 W20 AH5 G22
GND163 GND192 GND48 GND118 /DGPU
R23
GND164 GND193
W22 AH7
GND49 GND119
G25 Frank
T13 W28 AJ7 G28 20110613 Follow Vender and spec suggest=>Remove R7509 change 42.2 ohm
GND165 GND194 GND50 GND120
T15 Y12 AK10 G3
GND166 GND195 GND51 GND121 Joyoung
T17 Y14 AK7 G30
GND167 GND196 GND52 GND122
T18 Y16 AL12 G32 20110913 Follow Vendor spec PUN-05893-001_v02=>Change R7510 to 51.1 ohm
GND168 GND197 GND53 GND123
T2 Y19 AL14 G33
GND169 GND198 GND54 GND124
T20 Y21 AL15 G5
GND170 GND199 GND55 GND125
T22 Y23 AL17 G7
GND171 GND200 GND56 GND126
AL18 K2
GND57 GND127
AL2 K28
GND58 GND128
AL20 K30
GND59 GND129 0612 R3.1 EMI
AL21 K32
GND60 GND130
AL23 K33
GND61 GND131
AL24 K5
GND62 GND132
AG11 AH11 AL26 K7
GND34 GND36 GND63 GND133
AL28 M13
GND64 GND134
AL30 M15
GND65 GND135
AL32 M17
GND GND66 GND136
AL33 M18
GND67 GND137
AL5 M20
GND68 GND138
A AM13 M22 A
GND69 GND139
AM16 N12
GND70 GND140
C16 AM19 N14
GND_OPT1 GND71 GND141
W32 AM22 N16
GND_OPT2 GND72 GND142
Optional CMD GNDs (2)
NC for 4-Lyr cards
N13P-GS
N13P-GS GND 02V0A0000011
02V0A0000011 GND GND

/DGPU
/DGPU Title : FRAME BUFFER C
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg

WWW.AliSaler.Com
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 75 of 93
5 4 3 2 1
5 4 3 2 1

71 FBAD[0..63]
*BOT SIDE*
VRAM CH A R7601
*TOP SIDE*
U7601
71
71
71
71
FBA_CMD[0..31]
FBADQM[0..7]
FBADQS_WP[0..7]
FBADQS_RN[0..7]

+1.5VS_VGA
R7603
1 1KOhm 2
1%
FBA_VREF_CA0
FBA_VREF_DQ0
M8
H1
U7602
VREFCA
VREFDQ
DQL0
DQL1
E3
F7
F2
FBAD12
FBAD14
FBAD9

1
FBA_VREF_CA0 FBAD30 FBA_CMD9 DQL2 FBAD15
+1.5VS_VGA 1 1KOhm 2 M8 E3 N3 F8 1

1
1% FBA_VREF_DQ0 VREFCA DQL0 FBAD31 C7602 R7604 FBA_CMD11 A0 DQL3 FBAD13
H1 F7 /DGPU P7 H3
VREFDQ DQL1 A1 DQL4

1
F2 FBAD24 0.01UF/16V 1KOhm1% FBA_CMD8 P3 H8 FBAD10

1
C7601 R7602 FBA_CMD9 DQL2 FBAD25 FBA_CMD25 A2 DQL5 FBAD11
/DGPU N3 F8 3 10% N2 G2

2
0.01UF/16V 1KOhm1% FBA_CMD11 A0 DQL3 FBAD27 FBA_CMD10 A3 DQL6 FBAD8
P7 H3 P8 H7

2
10% FBA_CMD8 A1 DQL4 FBAD26 FBA_CMD24 A4 DQL7
P3 H8 P2

2
FBA_CMD25 A2 DQL5 FBAD29 /DGPU FBA_CMD22 A5
N2 G2 R8

2
A3 DQL6 A6
FBA_CMD10 P8 H7 FBAD28 place near VRAM /DGPU FBA_CMD7 R2 D7 FBAD18
/DGPU FBA_CMD24 A4 DQL7 FBA_CMD21 A7 DQU0 FBAD20
P2 T8 C3
place near VRAM /DGPU FBA_CMD22 A5 FBA_CMD6 A8 DQU1 FBAD16
R8 R3 C8
FBA_CMD7 A6 FBAD5 FBA_CMD29 A9 DQU2 FBAD23
R2 D7 L7 C2
FBA_CMD21 A7 DQU0 FBAD1 FBA_CMD23 A10/AP DQU3 FBAD17
D
FBA_CMD6
T8
R3
A8 DQU1
C3
C8 FBAD6 FBA_CMD28
R7
N7
A11 DQU4
A7
A2 FBAD22
2 D

FBA_CMD29 A9 DQU2 FBAD3 FBA_CMD20 A12/BC# DQU5 FBAD19


FBA_CMD23
L7
R7
A10/AP DQU3
C2
A7 FBAD4
0 FBA_CMD4
T3
T7
A13 DQU6
B8
A3 FBAD21
FBA_CMD28 A11 DQU4 FBAD0 FBA_CMD14 NC1 DQU7
N7 A2 M7
FBA_CMD20 A12/BC# DQU5 FBAD7 NC2
T3 B8 N1 +1.5VS_VGA
FBA_CMD4 A13 DQU6 FBAD2 FBA_CMD12 VDD6
T7 A3 M2 R1
FBA_CMD14 NC1 DQU7 FBA_CMD27 BA0 VDD8
M7 N8 B2
NC2 BA1 VDD1

2
N1 FBA_CMD26 M3 K2 C7614 C7615 C7616 C7618 C7619
VDD6 +1.5VS_VGA BA2 VDD4
FBA_CMD12 M2 R1 G7 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/6.3V
FBA_CMD27 BA0 VDD8 FBA_CLK0 VDD3 10% 10% 10% 10% 10%
N8 B2 J7 K8

1
BA1 VDD1 CK VDD5

2
FBA_CMD26 M3 K2 C7605 C7606 C7607 C7608 C7609 FBA_CLK0# K7 D9
BA2 VDD4 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/6.3V FBA_CMD3 CK# VDD2
G7 K9 N9
VDD3 10% 10% 10% 10% 10% CKE VDD7 /DGPU /DGPU /DGPU /DGPU /DGPU
71 FBA_CLK0 J7 K8 R9

1
CK VDD5 FBA_CMD2 VDD9
71 FBA_CLK0# K7 D9 K1
FBA_CMD3 CK# VDD2 FBA_CMD0 ODT
K9 N9 L2 A1
CKE VDD7 /DGPU /DGPU /DGPU /DGPU /DGPU FBA_CMD30 CS# VDDQ1
R9 J3 C1
FBA_CMD2 VDD9 FBA_CMD15 RAS# VDDQ3
K1 K3 F1
ODT CAS# VDDQ7

1
R7608 FBA_CMD0 L2 A1 FBA_CMD13 L3 D2 C7623 C7617 C7620 C7621 C7622
FBA_CMD30 CS# VDDQ1 WE# VDDQ5 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2 1 J3 C1 H2
162Ohm /DGPU FBA_CMD15 RAS# VDDQ3 FBADQS_WP1 VDDQ8 10% 10% 10% 10% 10%
K3 F1 F3 A8

2
CAS# VDDQ7 DQSL VDDQ2

1
FBA_CMD13 L3 D2 C7647 C7610 C7612 C7613 C7648 FBADQS_WP2 C7 C9
WE# VDDQ5 DQSU VDDQ4
place near VRAM VDDQ8
H2 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
VDDQ6
E9
FBADQS_WP3 F3 A8 10% 10% 10% 10% 10% FBADQM1 E7 H9 /DGPU /DGPU /DGPU /DGPU /DGPU

2
FBADQS_WP0 DQSL VDDQ2 FBADQM2 DML VDDQ9
C7 C9 D3
DQSU VDDQ4 DMU
E9 E1
FBADQM3 VDDQ6 FBADQS_RN1 VSS3
E7
DML VDDQ9
H9 /DGPU /DGPU /DGPU /DGPU /DGPU G3
DQSL# VSS7
M1 place close to balls
FBADQM0 D3 FBADQS_RN2 B7 P1
DMU DQSU# VSS9
E1 T1
FBADQS_RN3 VSS3 FBA_CMD5 VSS11
G3
DQSL# VSS7
M1 place close to balls T2
RESET# VSS5
J2
FBADQS_RN0 B7 P1 B3
DQSU# VSS9 VSS2
T1 L8 G8
FBA_CMD5 VSS11 ZQ VSS4
T2 J2 J8
RESET# VSS5 VSS6

1
B3 A9
VSS2 R7606 VSS1
L8 G8 M9
ZQ VSS4 243Ohm 1% VSS8
J8 J1 P9
VSS6 NC3 VSS10
1

A9 L1 T9
R7605 VSS1 NC4 VSS12
M9 J9

2
243Ohm 1% VSS8 NC5
J1 P9 L9 B1
NC3 VSS10 NC6 VSSQ1
L1 T9 D1
NC4 VSS12 /DGPU VSSQ3
J9 G1
2

NC5 VSSQ8
C L9 B1 E2 C
NC6 VSSQ1 VSSQ5
D1 D8
/DGPU VSSQ3 VSSQ4
G1 E8
VSSQ8 VSSQ6
E2 B9
VSSQ5 VSSQ2
D8 F9
VSSQ4 VSSQ7
E8 G9
VSSQ6 VSSQ9
B9
VSSQ2 BGA_96P_524x354_COLY
F9
VSSQ7
G9
VSSQ9
/DGPU
BGA_96P_524x354_COLY
/DGPU

*TOP SIDE* *BOT SIDE*


R7613 U7603 U7604
1 1KOhm 2 FBA_VREF_CA1 M8 E3 FBAD33 R7615 FBA_VREF_CA1 M8 E3 FBAD63
+1.5VS_VGA VREFCA DQL0 VREFCA DQL0
1% FBA_VREF_DQ1 H1 F7 FBAD34 1 1KOhm 2 FBA_VREF_DQ1 H1 F7 FBAD62
+1.5VS_VGA
1

VREFDQ DQL1 FBAD35 1% VREFDQ DQL1 FBAD61


F2 F2
DQL2 DQL2
1

1
C7625 R7614 FBA_CMD9 N3 F8 FBAD32 4 FBA_CMD9 N3 F8 FBAD60 7
/DGPU
1

0.01UF/16V 1KOhm1% FBA_CMD11 A0 DQL3 FBAD37 C7626 R7616 FBA_CMD11 A0 DQL3 FBAD59
P7 H3 /DGPU P7 H3
10% FBA_CMD8 A1 DQL4 FBAD38 0.01UF/16V 1KOhm1% FBA_CMD8 A1 DQL4 FBAD57
P3 H8 P3 H8
2

FBA_CMD25 A2 DQL5 FBAD36 10% FBA_CMD25 A2 DQL5 FBAD58


N2 G2 N2 G2
2

FBA_CMD10 A3 DQL6 FBAD39 FBA_CMD10 A3 DQL6 FBAD56


P8 H7 P8 H7

2
/DGPU FBA_CMD24 A4 DQL7 FBA_CMD24 A4 DQL7
P2 P2
A5 A5
place near VRAM /DGPU FBA_CMD22 R8 /DGPU FBA_CMD22 R8
FBA_CMD7 A6 FBAD47 A6
R2 D7 place near VRAM /DGPU FBA_CMD7 R2 D7 FBAD54
FBA_CMD21 A7 DQU0 FBAD41 FBA_CMD21 A7 DQU0 FBAD49
T8 C3 T8 C3
FBA_CMD6 A8 DQU1 FBAD46 FBA_CMD6 A8 DQU1 FBAD55
R3 C8 R3 C8
FBA_CMD29 A9 DQU2 FBAD42 FBA_CMD29 A9 DQU2 FBAD48
FBA_CMD23
L7
R7
A10/AP DQU3
C2
A7 FBAD45
5 FBA_CMD23
L7
R7
A10/AP DQU3
C2
A7 FBAD52
6
FBA_CMD28 A11 DQU4 FBAD43 FBA_CMD28 A11 DQU4 FBAD50
N7 A2 N7 A2
FBA_CMD20 A12/BC# DQU5 FBAD44 FBA_CMD20 A12/BC# DQU5 FBAD53
T3 B8 T3 B8
B FBA_CMD4 A13 DQU6 FBAD40 FBA_CMD4 A13 DQU6 FBAD51 B
T7 A3 T7 A3
FBA_CMD14 NC1 DQU7 FBA_CMD14 NC1 DQU7
M7 M7
NC2 NC2
N1 +1.5VS_VGA N1 +1.5VS_VGA
FBA_CMD12 VDD6 FBA_CMD12 VDD6
M2 R1 M2 R1
FBA_CMD27 BA0 VDD8 FBA_CMD27 BA0 VDD8
N8 B2 N8 B2
2

2
FBA_CMD26 BA1 VDD1 C7627 C7628 C7629 C7631 C7632 FBA_CMD26 BA1 VDD1 C7637 C7638 C7639 C7641 C7642
M3 K2 M3 K2
BA2 VDD4 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/6.3V BA2 VDD4 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/6.3V
G7 G7
VDD3 10% 10% 10% 10% 10% FBA_CLK1 VDD3 10% 10% 10% 10% 10%
71 FBA_CLK1 J7 K8 J7 K8
1

1
CK VDD5 FBA_CLK1# CK VDD5
71 FBA_CLK1# K7 D9 K7 D9
FBA_CMD19 CK# VDD2 FBA_CMD19 CK# VDD2
K9 N9 K9 N9
CKE VDD7 /DGPU /DGPU /DGPU /DGPU /DGPU CKE VDD7 /DGPU /DGPU /DGPU /DGPU /DGPU
R9 R9
FBA_CMD18 VDD9 FBA_CMD18 VDD9
R7611 K1 K1
FBA_CMD16 ODT FBA_CMD16 ODT
L2 A1 L2 A1
FBA_CMD30 CS# VDDQ1 FBA_CMD30 CS# VDDQ1
2 1 J3 C1 J3 C1
FBA_CMD15 RAS# VDDQ3 FBA_CMD15 RAS# VDDQ3
K3 F1 K3 F1
2

1
162Ohm FBA_CMD13 CAS# VDDQ7 C7636 C7630 C7633 C7634 C7635 FBA_CMD13 CAS# VDDQ7 C7646 C7640 C7643 C7644 C7645
L3 D2 L3 D2
/DGPU WE# VDDQ5 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V WE# VDDQ5 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
H2 H2
FBADQS_WP4 VDDQ8 10% 10% 10% 10% 10% FBADQS_WP7 VDDQ8 10% 10% 10% 10% 10%
F3 A8 F3 A8
1

2
FBADQS_WP5 DQSL VDDQ2 FBADQS_WP6 DQSL VDDQ2
C7 C9 C7 C9
place near VRAM DQSU VDDQ4 DQSU VDDQ4
E9 E9
FBADQM4 VDDQ6 /DGPU /DGPU /DGPU /DGPU /DGPU FBADQM7 VDDQ6 /DGPU /DGPU /DGPU /DGPU /DGPU
E7 H9 E7 H9
FBADQM5 DML VDDQ9 FBADQM6 DML VDDQ9
D3 D3
DMU DMU
E1 E1
FBADQS_RN4 VSS3 FBADQS_RN7 VSS3
G3
DQSL# VSS7
M1 place close to balls G3
DQSL# VSS7
M1 place close to balls
FBADQS_RN5 B7 P1 FBADQS_RN6 B7 P1
DQSU# VSS9 DQSU# VSS9
T1 T1
FBA_CMD5 VSS11 FBA_CMD5 VSS11
T2 J2 T2 J2
RESET# VSS5 RESET# VSS5
B3 B3
VSS2 VSS2
L8 G8 L8 G8
ZQ VSS4 ZQ VSS4
J8 J8
1

VSS6 VSS6
A9 A9
R7617 VSS1 R7618 VSS1
M9 M9
243Ohm 1% VSS8 243Ohm 1% VSS8
J1 P9 J1 P9
NC3 VSS10 NC3 VSS10
L1 T9 L1 T9
NC4 VSS12 NC4 VSS12
J9 J9
2

NC5 NC5
L9 B1 L9 B1
NC6 VSSQ1 NC6 VSSQ1
D1 D1
/DGPU VSSQ3 /DGPU VSSQ3
G1 G1
VSSQ8 VSSQ8
E2 E2
VSSQ5 VSSQ5
D8 D8
VSSQ4 VSSQ4
A VSSQ6
E8
B9
VSSQ6
E8
B9
Title : FRAME BUFFER A A
VSSQ2 VSSQ2
VSSQ7
F9
VSSQ7
F9
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg
G9 G9
VSSQ9 VSSQ9 Size Project Name Rev
BGA_96P_524x354_COLY BGA_96P_524x354_COLY
/DGPU /DGPU
A2 JM50 3.1
Date: Thursday, August 23, 2012 Sheet 76 of 93

5 4 3 2 1
5 4 3 2 1

VRAM CH C *TOP SIDE*


71
71
71
71
71
FBCD[0..63]
FBC_CMD[0..31]
FBCDQM[0..7]
FBCDQS_WP[0..7]
FBCDQS_RN[0..7]
*BOT SIDE*
R7701 U7701 U7702
+1.5VS_VGA 1 1KOhm 2 FBC_VREF_CA0 M8 E3 FBCD3 R7712 FBC_VREF_CA0 M8 E3 FBCD31
/DGPU 1% FBC_VREF_DQ0 VREFCA DQL0 FBCD0 FBC_VREF_DQ0 VREFCA DQL0 FBCD24
H1 F7 +1.5VS_VGA 1 1KOhm 2 H1 F7
VREFDQ DQL1 VREFDQ DQL1

1
F2 FBCD2 1% F2 FBCD29
DQL2 DQL2

1
C7701 R7702 FBC_CMD9 FBCD4 FBC_CMD9 FBCD30
N3
A0 DQL3
F8 0 N3
A0 DQL3
F8 3

1
0.01UF/16V 1KOhm 1% FBC_CMD11 P7 H3 FBCD6 /DGPU C7713 R7714 FBC_CMD11 P7 H3 FBCD27
10% FBC_CMD8 A1 DQL4 FBCD7 0.01UF/16V 1KOhm 1% FBC_CMD8 A1 DQL4 FBCD28
P3 H8 P3 H8

2
/DGPU FBC_CMD25 A2 DQL5 FBCD1 10% FBC_CMD25 A2 DQL5 FBCD26
N2 G2 N2 G2

2
FBC_CMD10 A3 DQL6 FBCD5 FBC_CMD10 A3 DQL6 FBCD25
P8 H7 P8 H7

2
/DGPU FBC_CMD24 A4 DQL7 FBC_CMD24 A4 DQL7
P2 P2
A5 A5
place near VRAM FBC_CMD22 R8 /DGPU FBC_CMD22 R8
D
FBC_CMD7 A6 FBCD8 FBC_CMD7 A6 FBCD20 D
R2
A7 DQU0
D7 place near VRAM /DGPU R2
A7 DQU0
D7
FBC_CMD21 T8 C3 FBCD12 FBC_CMD21 T8 C3 FBCD21
FBC_CMD6 A8 DQU1 FBCD11 FBC_CMD6 A8 DQU1 FBCD18
R3 C8 R3 C8
FBC_CMD29 A9 DQU2 FBCD15 FBC_CMD29 A9 DQU2 FBCD23
FBC_CMD23
L7
A10/AP DQU3
C2
FBCD9
1 FBC_CMD23
L7
A10/AP DQU3
C2
FBCD16
FBC_CMD28
R7
N7
A11 DQU4
A7
A2 FBCD14 FBC_CMD28
R7
N7
A11 DQU4
A7
A2 FBCD22
2
FBC_CMD20 A12/BC# DQU5 FBCD10 FBC_CMD20 A12/BC# DQU5 FBCD19
T3 B8 T3 B8
FBC_CMD4 A13 DQU6 FBCD13 FBC_CMD4 A13 DQU6 FBCD17
T7 A3 T7 A3
FBC_CMD14 NC1 DQU7 FBC_CMD14 NC1 DQU7
M7 M7
NC2 NC2
N1 +1.5VS_VGA N1 +1.5VS_VGA
FBC_CMD12 VDD6 FBC_CMD12 VDD6
M2 R1 M2 R1
FBC_CMD27 BA0 VDD8 FBC_CMD27 BA0 VDD8
N8 B2 N8 B2
BA1 VDD1 BA1 VDD1

2
FBC_CMD26 M3 K2 C7702 C7703 C7704 C7705 C7706 FBC_CMD26 M3 K2 C7715 C7716 C7717 C7718 C7719
BA2 VDD4 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/6.3V BA2 VDD4 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
G7 G7
VDD3 10% 10% 10% 10% 10% FBC_CLK0 VDD3 10% 10% 10% 10% 10%
71 FBC_CLK0 J7 K8 J7 K8

1
CK VDD5 FBC_CLK0# CK VDD5 /DGPU /DGPU /DGPU /DGPU /DGPU
71 FBC_CLK0# K7 D9 K7 D9
FBC_CMD3 CK# VDD2 FBC_CMD3 CK# VDD2
K9 N9 K9 N9
CKE VDD7 /DGPU /DGPU /DGPU /DGPU /DGPU CKE VDD7
R9 R9
FBC_CMD2 VDD9 FBC_CMD2 VDD9
R7703 K1 K1
FBC_CMD0 ODT FBC_CMD0 ODT
L2 A1 L2 A1
FBC_CMD30 CS# VDDQ1 FBC_CMD30 CS# VDDQ1
2 1 J3 C1 J3 C1
FBC_CMD15 RAS# VDDQ3 FBC_CMD15 RAS# VDDQ3
K3 F1 K3 F1
CAS# VDDQ7 CAS# VDDQ7

2
162Ohm FBC_CMD13 L3 D2 C7707 C7708 C7709 C7710 C7711 FBC_CMD13 L3 D2 C7720 C7721 C7722 C7723 C7724
/DGPU WE# VDDQ5 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V WE# VDDQ5 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
H2 H2
FBCDQS_WP0 VDDQ8 10% 10% 10% 10% 10% FBCDQS_WP3 VDDQ8 10% 10% 10% 10% 10%
F3 A8 F3 A8

1
FBCDQS_WP1 DQSL VDDQ2 FBCDQS_WP2 DQSL VDDQ2 /DGPU /DGPU /DGPU /DGPU /DGPU
C7 C9 C7 C9
DQSU VDDQ4 DQSU VDDQ4
E9 E9
FBCDQM0 VDDQ6 /DGPU /DGPU /DGPU /DGPU /DGPU FBCDQM3 VDDQ6
E7 H9 E7 H9
FBCDQM1 DML VDDQ9 FBCDQM2 DML VDDQ9
place near VRAM D3
DMU
D3
DMU
E1 E1
N12P-GV1 162ohm FBCDQS_RN0 VSS3 FBCDQS_RN3 VSS3
G3
DQSL# VSS7
M1 place close to balls G3
DQSL# VSS7
M1 place close to balls
N12M-GE 243ohm(1022-0101400) FBCDQS_RN1 B7 P1 FBCDQS_RN2 B7 P1
DQSU# VSS9 DQSU# VSS9
T1 T1
FBC_CMD5 VSS11 FBC_CMD5 VSS11
T2 J2 T2 J2
RESET# VSS5 RESET# VSS5
B3 B3
VSS2 VSS2
L8 G8 L8 G8
ZQ VSS4 ZQ VSS4
J8 J8
VSS6 VSS6
1

1
C A9 A9 C
R7704 VSS1 R7705 VSS1
M9 M9
243Ohm 1% VSS8 243Ohm 1% VSS8
J1 P9 J1 P9
/DGPU NC3 VSS10 NC3 VSS10
L1 T9 L1 T9
NC4 VSS12 NC4 VSS12
J9 J9
2

2
NC5 NC5
L9 B1 L9 B1
NC6 VSSQ1 NC6 VSSQ1
D1 D1
VSSQ3 /DGPU VSSQ3
G1 G1
VSSQ8 VSSQ8
E2 E2
VSSQ5 VSSQ5
D8 D8
VSSQ4 VSSQ4
E8 E8
VSSQ6 VSSQ6
B9 B9
VSSQ2 VSSQ2
F9 F9
VSSQ7 VSSQ7
G9 G9
VSSQ9 VSSQ9
BGA_96P_524x354_COLY BGA_96P_524x354_COLY
/DGPU /DGPU

*TOP SIDE* *BOT SIDE*


R7710 U7703 U7704
+1.5VS_VGA 1 1KOhm 2 FBC_VREF_CA1 M8 E3 FBCD36 R7706 FBC_VREF_CA1 M8 E3 FBCD60
1% FBC_VREF_DQ1 VREFCA DQL0 FBCD32 VREFCA DQL0
H1 F7 +1.5VS_VGA 1 1KOhm 2 FBC_VREF_DQ1 H1 F7 FBCD61
VREFDQ DQL1 VREFDQ DQL1
1

/DGPU F2 FBCD34 1% F2 FBCD63


DQL2 DQL2
1

2
C7714 R7708 FBC_CMD9 N3 F8 FBCD35 FBC_CMD9 N3 F8 FBCD62
A0 DQL3 A0 DQL3

1
0.01UF/16V 1KOhm 1% FBC_CMD11 FBCD39 C7712 R7717 FBC_CMD11 FBCD57
10% /DGPU FBC_CMD8
P7
P3
A1 DQL4
H3
H8 FBCD38
4 /DGPU
0.01UF/16V 1KOhm 1% FBC_CMD8
P7
P3
A1 DQL4
H3
H8 FBCD58
7
2

/DGPU FBC_CMD25 A2 DQL5 FBCD33 10% FBC_CMD25 A2 DQL5 FBCD59


N2 G2 N2 G2
2

2
FBC_CMD10 A3 DQL6 FBCD37 FBC_CMD10 A3 DQL6 FBCD56
P8 H7 P8 H7

1
FBC_CMD24 A4 DQL7 FBC_CMD24 A4 DQL7
P2 P2
B
FBC_CMD22 A5 FBC_CMD22 A5 B
place near VRAM R8
A6
/DGPU R8
A6
FBC_CMD7 R2 D7 FBCD45 place near VRAM /DGPU FBC_CMD7 R2 D7 FBCD54
FBC_CMD21 A7 DQU0 FBCD41 FBC_CMD21 A7 DQU0 FBCD49
T8 C3 T8 C3
FBC_CMD6 A8 DQU1 FBCD47 FBC_CMD6 A8 DQU1 FBCD55
R3 C8 R3 C8
FBC_CMD29 A9 DQU2 FBCD42 FBC_CMD29 A9 DQU2 FBCD51
FBC_CMD23
L7
R7
A10/AP DQU3
C2
A7 FBCD44 FBC_CMD23
L7
R7
A10/AP DQU3
C2
A7 FBCD52
6
FBC_CMD28 A11 DQU4 FBCD40 FBC_CMD28 A11 DQU4 FBCD50
FBC_CMD20
N7
T3
A12/BC# DQU5
A2
B8 FBCD46
5 FBC_CMD20
N7
T3
A12/BC# DQU5
A2
B8 FBCD53
FBC_CMD4 A13 DQU6 FBCD43 FBC_CMD4 A13 DQU6 FBCD48
T7 A3 T7 A3
FBC_CMD14 NC1 DQU7 FBC_CMD14 NC1 DQU7
M7 M7
NC2 NC2
N1 +1.5VS_VGA N1 +1.5VS_VGA
FBC_CMD12 VDD6 FBC_CMD12 VDD6
M2 R1 M2 R1
FBC_CMD27 BA0 VDD8 FBC_CMD27 BA0 VDD8
N8 B2 N8 B2
BA1 VDD1 BA1 VDD1
2

2
FBC_CMD26 M3 K2 C7755 C7766 C7767 C7768 C7769 FBC_CMD26 M3 K2 C7774 C7775 C7776 C7777 C7778
BA2 VDD4 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/6.3V BA2 VDD4 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/6.3V
G7 G7
VDD3 10% 10% 10% 10% 10% FBC_CLK1 VDD3 10% 10% 10% 10% 10%
71 FBC_CLK1 J7 K8 J7 K8
1

1
CK VDD5 FBC_CLK1# CK VDD5
71 FBC_CLK1# K7 D9 K7 D9
FBC_CMD19 CK# VDD2 FBC_CMD19 CK# VDD2
K9 N9 K9 N9
CKE VDD7 /DGPU /DGPU /DGPU /DGPU /DGPU CKE VDD7 /DGPU /DGPU /DGPU /DGPU /DGPU
R9 R9
FBC_CMD18 VDD9 FBC_CMD18 VDD9
R7713 K1 K1
FBC_CMD16 ODT FBC_CMD16 ODT
L2 A1 L2 A1
FBC_CMD30 CS# VDDQ1 FBC_CMD30 CS# VDDQ1
2 1 J3 C1 J3 C1
FBC_CMD15 RAS# VDDQ3 FBC_CMD15 RAS# VDDQ3
K3 F1 K3 F1
CAS# VDDQ7 CAS# VDDQ7
2

1
162Ohm FBC_CMD13 L3 D2 C7770 C7744 C7771 C7772 C7773 FBC_CMD13 L3 D2 C7779 C7780 C7781 C7782 C7783
WE# VDDQ5 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V WE# VDDQ5 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
H2 H2
FBCDQS_WP4 VDDQ8 10% 10% 10% 10% 10% FBCDQS_WP7 VDDQ8 10% 10% 10% 10% 10%
F3 A8 F3 A8
1

2
/DGPU FBCDQS_WP5 DQSL VDDQ2 FBCDQS_WP6 DQSL VDDQ2
C7 C9 C7 C9
DQSU VDDQ4 DQSU VDDQ4
E9 E9
FBCDQM4 VDDQ6 FBCDQM7 VDDQ6
place near VRAM E7
DML VDDQ9
H9 /DGPU /DGPU /DGPU /DGPU /DGPU E7
DML VDDQ9
H9 /DGPU /DGPU /DGPU /DGPU /DGPU
FBCDQM5 D3 FBCDQM6 D3
DMU DMU
E1 E1
FBCDQS_RN4 VSS3 FBCDQS_RN7 VSS3
G3
DQSL# VSS7
M1 place close to balls G3
DQSL# VSS7
M1 place close to balls
FBCDQS_RN5 B7 P1 FBCDQS_RN6 B7 P1
DQSU# VSS9 DQSU# VSS9
T1 T1
FBC_CMD5 VSS11 FBC_CMD5 VSS11
T2 J2 T2 J2
RESET# VSS5 RESET# VSS5
B3 B3
VSS2 VSS2
L8 G8 L8 G8
ZQ VSS4 ZQ VSS4
A J8 J8 A
VSS6 VSS6
1

A9 A9
R7711 VSS1 R7715 VSS1
M9 M9
243Ohm 1% VSS8 243Ohm 1% VSS8
J1 P9 J1 P9
NC3 VSS10 NC3 VSS10
L1 T9 L1 T9
NC4 VSS12 NC4 VSS12
J9 J9
2

NC5 NC5
L9 B1 L9 B1
NC6 VSSQ1 NC6 VSSQ1
D1 D1
/DGPU VSSQ3 /DGPU VSSQ3
G1 G1
VSSQ8 VSSQ8
E2 E2
VSSQ5 VSSQ5
D8 D8
VSSQ4 VSSQ4
VSSQ6
E8
B9
VSSQ6
E8
B9
Title : FRAME BUFFER B
VSSQ2 VSSQ2
VSSQ7
F9
VSSQ7
F9
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Joyoung_Chianhg
G9 G9
VSSQ9 VSSQ9 Size Project Name Rev
BGA_96P_524x354_COLY BGA_96P_524x354_COLY
/DGPU /DGPU
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 77 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg
Size Project Name
JM50 Rev
C 3.1
P/N <OrgAddr2>
Date: Thursday, August 23, 2012 Sheet 78 of 93
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : GPU PWR/GND


PEGATRON COMPUTER INC Engineer: Joyoung_Chianhg
Size Project Name
JM50 Rev
C 3.1
P/N <OrgAddr2>
Date: Thursday, August 23, 2012 Sheet 79 of 93
5 4 3 2 1
5 4 3 2 1

+VCORE & +VGFX POWER SUPPLY


93 CPU_VRON_PWR

1
C8046 @
0.047UF/16V
D vx_c0402_small D

2
SR8002 @ 10%
R0402
30 CPU_VRON 1 2 Input Current:4A
+5VO
6 VR_SVID_CLK

1
C8018 C8020 C8011 C8012
6 VR_SVID_DATA +1.8VS 1UF/10V 22UF/6.3V 22UF/6.3V 10UF/6.3V
6 VR_SVID_ALERT#
vx_c0402_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small

2
SR8003 @ 10% 20% 20% 10%
R0402

1
4 VR_HOT# 1 2 R_OSC set Vcore FREQ = 0.75 e5 / R_OSC C8001 Input Current:4A
4.7UF/6.3V +5VO
vx_c0402_h24_small

1
30,92 VRM_PWRGD
ATS short to GND , Vcore Boot voltage = 1.0V MLCC/+/-20% TSFAULT#1 A1
TS_FAULT# VX1
D1
+1.8VS
C8029 C8030 C8025 C8026
A2 D2 1UF/10V 22UF/6.3V 22UF/6.3V 10UF/6.3V
92 VGFX_PWRGD GND VX2 vx_c0402_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small
A4 D3

2
VCC VX3

1
D4 10% 20% 20% 10%
R8056 R8043 VX4
F1
VX5

1
620Ohm 10Ohm GND_1323S1 F2 BST1 C8024
VX6

2
vx_r0402_small vx_r0603_h28_small F3 4.7UF/6.3V

1
1% R8055 1% T8018 VX7 C8016 vx_c0402_h24_small
F4

2
VX8
ATS short to GND , VGFX Boot voltage = 1.0V 620Ohm TPC28T
VX9
H1 0.22UF/6.3V MLCC/+/-20% TSFAULT#2 A1
TS_FAULT# VX1
D1
T8033 vx_r0402_small H2 vx_c0402_small A2 D2

2
VX10 GND VX2

2
TPC28T 1% H3 10% A4 D3

1
VX11 VCC VX3

1
+3VS R8012 T8030 B1 H4 VX1 D4

1
+1.8VS R8015 374OHM TPC28T IPH1_1 VDD VX12 R8054 VX4
B2 F1

1
ISENSE VX5

1
196Ohm vx_r0603_h24_small C8017 PWM1_1 B3 10Ohm GND_1323S3 F2 BST2_1
PWM VX6
1

1
vx_r0402_small 1% R8017 0.1UF/25V BST1 B4 E1 vx_r0603_h28_small F3

1
BST VSS1 VX7
1

1
C8031 R8041 1% 20KOhm vx_c0402_small E2 R8035 @ 1% T8021 F4 C8027

2
VSS2 VX8

2
+5VS 10UF/6.3V 10Ohm vx_r0402_small 10% E3 2.2Ohm TPC28T H1 0.22UF/6.3V L8001

需需需需866K料料 vx_c0603_small vx_r0603_h28_smallR8004 R8019 R8005 1% JP8002 @ VSS3 vx_r0603_h28_small VX9 vx_c0402_small 0.1UH
E4 H2
2

2
VSS4 VX10

2
20% 1% 21.5Ohm 75KOhm 196Ohm SHORT_PIN G1 5% H3 10% Irat=32.5A
2

1
VSS5 VX11
1

2 1 vx_r0402_small vx_r0402_small vx_r0402_small R8022 1 2 G2 B1 H4 1 2


+VGFX_CORE

1
R8044 1% 1% 1% 191Ohm VSS6 IPH2_1 VDD VX12
G3 B2

ROSC 1

1
VSS7 ISENSE

1
VR_ON
ALERT
VR_TT
845KOhm C8000 1 2 vx_r0402_small G4 C8048 @ C8028 PWM2_1 B3 DCR = 1.7mOhm

VCLK
VDIO

1
PG2 VSS8 PWM
PG1
vx_r0402_small VCORE_A_GND 0.1UF/25V 1% GND_1323S1 C1 J1 1500PF/50V 0.1UF/25V BST2_1 B4 E1 VGFX / ULV_GT2

1
VDDH1 VSS9 BST VSS1

2
1% vx_c0402_small C2 J2 vx_c0603_small vx_c0402_small E2 R8036 @
2

2
10% R8024 R8025 VDDH2 VSS10 10% 10% VSS2 2.2Ohm
133Ohm 402Ohm
C3
VDDH3 VSS11
J3
JP8000 @ VSS3
E3
vx_r0603_h28_small
1.23V
49
48
47
46
45
44
43
42
41
40
39
38
37
C4 J4 E4
VDDH4 VSS12 VSS4
1

vx_r0402_small vx_r0402_h15_small SHORT_PIN G1 5% IccMax = 33A

2
1

R8049 C8003 1% 1% VSS5


1 2 G2
VR_READY2
VR_READY1
VR_TT#

ALERT#
VDIO
VCLK
VR_ENABLE
GND

R_OSC
R_SEL[6]

R_SEL[4]

R_SEL[0]
R_SEL[1]

1
C 100KOhm 0.1UF/25V VSS6 C
U8001 VSS7
G3 IccDyn = 20.2A

1
vx_r0402_small vx_c0402_small 1 36 VT1323SFCR G4 C8049 @
2

1% 10% SR8004 @ +1.8VS VDD3 R_SEL[2] GND_1323S3 VSS8 1500PF/50V


2 35 C1 J1 IccTDC = 21.5A
2

R0402 VDD_1 R_SEL[3] VDDH1 VSS9 vx_c0603_small


3 34 Input Current:4A C2 J2

2
VIN_UVLO VDD_2 R_REF R8033 @ VDDH2 VSS10 10%
1 2 4 33 C3 J3 Load Line = -3.9mV/A
PWM1_3 VIN_UVLO IPH2_2 0Ohm VDDH3 VSS11
5 32 C4 J4
PWM1_3 R_SEL[5] VDDH4 VSS12

1
VCORE_A_GND 1 R8039 2ONE_@ PWM1_2 6 31 PWM2_2 vx_r0402_small SR8000 @ C8009 C8010 C8005 C8006 L8002
0Ohm vx_r0402_small PWM1_1 PWM1_2 PWM2_2 PWM2_1 R0402 +1.8VS 1UF/10V 22UF/6.3V 22UF/6.3V 10UF/6.3V 0.1UH
7 30 1 2
TSFAULT#1 SR8001 @1 PWM1_1 PWM2_1
2 8 29 1 2 TSFAULT#2 vx_c0402_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small Irat=32.5A U8003

2
IPH1_2 TS_FAULT#1 TS_FAULT#2
R0402 9 28 1 2 IPH2_1 10% TWO_@ 20% TWO_@ 20% TWO_@ 10% TWO_@ ONE_@ VT1323SFCR
IPH1_3 IPH2_1 MRAMP2 VX1 1
10 27 2
IPH1_2 MRAMP2

1
IPH1_1 R8026 C8004
SENSE1+

11 26
A2_OUT1

A3_OUT1
A3_OUT2

A2_OUT2
SENSE1-

IPH1_1 SENSE2+
A_ERR1

A_ERR2

MRAMP1 12 25 1.96KOhm 4.7UF/6.3V DCR = 1.7mOhm


A2_IN1

A3_IN1

A3_IN2

A2_IN2

MRAMP1 SENSE2-
1

1
vx_r0402_small vx_c0402_h24_small
+VCORE

2
1

R8030 R8028 R8014 1% MLCC/+/-20% TSFAULT#1 A1 D1


TS_FAULT# VX1

1
1.96KOhm 1.96KOhm R8013 15.4KOHM C8044 TWO_@ A2 D2
vx_r0402_small vx_r0402_small 13.3KOHM vx_r0402_small 10PF/50V GND VX2
U8000A A4 D3 Vcore / ULV
13
14
15
16
17
18
19
20
21
22
23
24

VCC VX3

3
1% 1% TWO_@ vx_r0603_h24_small
VT1318MFQR VGFX_SENSE_N 1% vx_c0402_small D4
2

2
VX4
1

1% TWO_@ 5% R8047 F1 0.9V


2

R8038 VCORE_SENSE_P VGFX_SENSE_P 10Ohm GND_1323S2 VX5 BST2


F2 VCORE One phase Two phase
Vi3_2_IMON_GFX

VX6
Vi3_1_IMON_CORE
VERR1

VERR2

13KOhm vx_r0603_h28_small IccMax = 33A


Vo2_1

Vo3_1
Vo3_2

Vo2_2

F3
Vi2_1

Vi2_2

VX7
1

1
C8021 C8019 vx_r0402_small VCORE_SENSE_N 1% TWO_@ T8020 F4 C8007 L8000

2
10PF/50V 10PF/50V 0.01 ONE_@ TPC28T VX8 0.22UF/6.3V 50nH
H1 IccDyn = 28A R8000 @ 499Ohm
2

2
vx_c0402_small vx_c0402_small VX9 vx_c0402_small Irat=32A
H2
2

2
5% 5% TWO_@ VX10 10% TWO_@ TWO_@
H3 IccTDC = 25A R8001 @ 13.3kOhm

1
VX11 VX2
B1 H4
IPH1_2 VDD VX12
B2
ISENSE Load Line = -2.9mV/A R8008 680Ohm 665Ohm

1
C8008 PWM1_2 B3
PWM

1
0.1UF/25V BST2 B4 E1
R8052 vx_c0402_small BST VSS1
E2 R8034 @
R8012 274Ohm 374Ohm

2
52.3KOhm 10% TWO_@ VSS2 2.2Ohm
50 E3 R8013 @ 13.3kOhm
vx_r0402_small JP8001 @ GND1 JP8003 @ VSS3 vx_r0603_h28_small
51 E4
1% SHORT_PIN GND2 SHORT_PIN VSS4 5%
52 G1 R8019 63.4kOhm 75kOhm

2
MRAMP1 1 GND3 VSS5
2 +VCORE 1 2 53 1 2 G2
GND4 VSS6
G3 R8021 487Ohm 845Ohm
VSS7

1
R8053 U8000B G4 C8047 @
56.2KOHM VCORE_A_GND GND_1323S2 VSS8 1500PF/50V
VT1318MFQR C1
VDDH1 VSS9
J1 R8023 15kOhm 43.2kOhm
vx_r0402_small C2 J2 vx_c0603_small

2
1% VDDH2 VSS10 10%
C3 J3 R8024 0Ohm 133Ohm
MRAMP2 1 VDDH3 VSS11
2 +VGFX_CORE C4 J4
VDDH4 VSS12
T8014 T8013 T8037 T8011 T8016
R8027 2.7kOhm 1.33kOhm
B TPC28T TPC28T TPC28T TPC28T TPC28T B
U8002 R8028 @ 1.96kOhm
R8000 VT1323SFCR
C8013 C8014 499Ohm TWO_@
R8031 750Ohm 499Ohm

1
22PF/50V 22PF/50V vx_r0402_small
vx_c0402_small vx_c0402_small 1% TWO_@ T8010 T8026 T8036 T8012 T8039
5% 5% IPH1_2 VCORE_SENSE_N TPC28T TPC28T TPC28T TPC28T TPC28T
R8037 7.5kOhm @
2 1 1 2
1 2 VSSSENSE 6 Vcore for two phase Vcore for one phase
R8038 13kOhm @
R8023 C8023 R8050 @ C8015 @ R8031 REQUIRE:22UF*20PCS REQUIRE:22UF*26PCS

1
43.2KOHM 220PF/50V 10Ohm 10PF/50V 499Ohm VCORE_SENSE_P
vx_r0402_small vx_c0402_small vx_r0402_small vx_c0402_small vx_r0402_small
VCCSENSE 6
EE:22uF*12pcs+2.2uF*16pcs EE:22uF*12pcs+2.2uF*16pcs T8005 T8008 T8004 T8031 T8022
R8039 0Ohm @
1% 10% 1% 5% 1% TPC28T TPC28T TPC28T TPC28T TPC28T
IPH1_1 POWER:22uF*5PCS POWER:22uF*5PCS R8047 @ 10Ohm
1 2 2 1 1 2 1 2 1 2
1 2 +VCORE
+VCORE R8052 43kOhm 52.3kOhm

1
R8029 R8001 R8008 R8021 R8027 C8036
2

10KOhm 13.3KOHM 665Ohm 845Ohm 1.33KOhm 0.047UF/16V R8009 @ T8009 T8025 T8006 T8028 T8027
C8004 @ 4.7uF/6.3V
1

1
vx_r0402_small vx_r0603_h24_small vx_r0402_small vx_r0402_small vx_r0402_small vx_c0402_small 100Ohm R8006 C8038 C8039 C8040 C8041 C8042 TPC28T TPC28T TPC28T TPC28T TPC28T
1% 1% TWO_@ 1% 1% 1% 10% vx_r0402_small 100Ohm 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
VERR1 1 2 1 2 1 2 1 2 Vi3_1_IMON_CORE 1 2 2 1 Vo3_1 1% vx_r0402_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small
C8005 @ 22uF/6.3V
2

1
1% 20% 20% 20% 20% 20%
C8006 @ 10uF/6.3V
1

R8037 2 1 1 2 T8007 T8034 T8019 T8003 T8023


7.5KOhm TPC28T TPC28T TPC28T TPC28T TPC28T
vx_r0402_small R8048 @ R8002 @
C8007 @ 0.22uF/6.3V
1% ONE_@ 100Ohm 100Ohm
C8008 @ 0.1uF/25V

1
Vi2_1 1 2 vx_r0402_small vx_r0402_small
1% 1% T8002 T8024 T8000 T8035 T8032
Vo2_1 TPC28T TPC28T TPC28T TPC28T TPC28T
C8009 @ 1uF/10V
For IFDIM C8010 @ 22uF/6.3V

1
C8033 C8035
C8013 33pF/50V 22pF/50V
22PF/50V 22PF/50V
vx_c0402_small vx_c0402_small VGFX C8019 @ 10pF/50V
5% 5%
VGFX_SENSE_N
REQUIRE:22UF*23PCS C8023 680pF/50V 220pF/50V
2 1 2 1 VSSGT_SENSE 7
EE:22uF*6pcs/10uF*6/1uF*11 T8015 T8041 T8017 T8029
C8036 3300pF/25V 0.047uF/16V
R8003 C8043 R8045 @ C8002 @ R8018 TPC28T TPC28T TPC28T TPC28T
30.1KOhm 1000PF/50V 10Ohm 10PF/50V 1KOhm VGFX_SENSE_P POWER:22uF*4
vx_r0402_small vx_c0402_small vx_r0402_small vx_c0402_small vx_r0402_small
VCCGT_SENSE 7
+VGFX_CORE
L8000 @ 50nH

1
1% 10% 1% 5% 1%
IPH2_1 T8042 T8001 T8038 T8040
L8002 0.1uH @
1 2 2 1 1 2 1 2 1 2
1 2 TPC28T TPC28T TPC28T TPC28T
R8016 R8011 R8051 R8020 R8032 C8037 +VGFX_CORE U8002 @ VT1323SFCR
2

A 10KOhm 8.06KOhm 665Ohm 665Ohm 3.24KOhm 0.01UF/25V R8010 @ A

1
1

vx_r0402_small vx_r0402_small vx_r0402_small vx_r0402_small vx_r0402_small vx_c0402_small 10Ohm R8007 C8022 C8032 C8034 C8045
1% 1% 1% 1% 1% 10% vx_r0603_h28_small 100Ohm 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
VERR2 1 2 1 2 1 2 1 2 Vi3_2_IMON_GFX 1 2 2 1 Vo3_2 1% vx_r0402_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small
2

1% 20% 20% 20% 20%


1

Vi2_2 2 1 1 2

VO2_2 R8057 @ R8046 @


100Ohm 10Ohm
vx_r0402_small vx_r0603_h28_small
1% 1%
<Variant Name>
For IFDIM
Title : POWER_VCORE&VGFX
Engineer: Clark Liang
Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 80 of 94
5 4 3 2 1
5 4 3 2 1

+5VO & +3VO POWER SUPPLY


D D

T8121
JP8106 @ TPC26T +5VAO
1MM_OPEN_M1M2 (1.6A)
1 1 2 2
+5VA AC_BAT_SYS

1
+ C8119
(6A)

1
C8103 C8105 CE8103 1000PF/50V
AC_BAT_SYS 1UF/25V 0.1UF/25V 15UF/25V vx_c0603_small

2
1

1
+ C8101 vx_c0603_small vx_c0402_small 10%

2
CE8104 1000PF/50V 10% 10%
15UF/25V vx_c0603_small

2
10%

5
5V_LG 3V_LG

8
7
6
D 5
Q8104

15
14
13
12
11
FDMC7696 Q8105

S
Rdson 14.5mOhm(4.5V)
C8109 FDMC7200

10
G

DRVL1
VO1
VREG5

DRVL2
VIN

4
0.1UF/25V Q2 Rdson 20mOhm(4.5V)

1
2
3
4

G1

D1

D1

D1
D1
L8100 T8127 vx_c0603_small
(OCP:13.2A) 4.7UH TPC26T 10% SR8101 @ T8111 L8101
(OCP:5.6A) +3VO

Q1
Irat=10A 5V_HG nb_r0603_short_32mil_small16 3V_HG TPC26T 3.3UH
(12.5A) 1BOOT1_1 1 BOOT1 17 DRVH1 DRVH2
10
BOOT2 BOOT2_2 2
+5VO 1 2 2 2 9 1 2 1 Irat=6.6A (5A)

D2/S1

Q2
2 1
5V_DX VBST1 VBST2 3V_DX
18 8 1 2

2 1
SW1 SW2

G2

S2

S2

S2
DCR = 15mOhm VCLK 19 7 SR8100 @
VCLK PGOOD
1

+ + R8105 @ Enable1 20 6 Enable2 C8113


nb_r0603_short_32mil_small DCR = 25.4mOhm

9
8

5
EN1 EN2
1

1
C8120 @ 2.2Ohm 21 0.1UF/25V R8103 @ +
GND

1
0.1UF/25V CE8102 CE8101 vx_r0603_h28_small vx_c0603_small 2.2Ohm CE8100 C8117 @

VREG3
C vx_c0402_small 100UF/6.3V 100UF/6.3V 5% 10% vx_r0603_h28_small 100UF/6.3V 0.1UF/25V C

8
7
6
D 5

VFB1

VFB2
2

1 1

CS1

CS2
10% 20% 20% 5% 20% vx_c0402_small

1 1

2
1

C8108 @ Q8107 10%


1500PF/50V FDMC0310AS U8100A C8121 @
SUS_PWRGD 30,92

1
2
3
4
5
S

2
vx_c0603_small Rdson 5mOhm(4.5V) TPS51225CRUKR 1500PF/50V

G
2
JP8101@ JP8103@ 10% vx_c0603_small

1
2
3
4

2
SHORT_PIN SHORT_PIN 10%

1
JP8104 @
2

1 2 R8109 R8104 1 2 SHORT_PIN


71.5KOhm 110KOHM

1
22 C8118 vx_r0402_small vx_r0402_small C8115 @
GND1 39PF/50V 1% 1% 39PF/50V
23

2
GND2 vx_c0402_small vx_c0402_small
@ 5% 5%
U8100B 5V_FB1_1 1 2 FB1 FB2 2 1 3V_FB2_2
TPS51225CRUKR
R8107 R8100

2
15KOhm 6.65KOHM
vx_r0402_small R8102 R8101 vx_r0402_small
(Typ:5.00V;Max:5.111V;Min:4.891V) 1% 10KOhm 10KOhm 1% +3VO:3.3V( Max:3.39;Min:3.271)
vx_r0402_small vx_r0402_small
1% 1%
Frequency:300KHz Frequency:350KHz

1
T8120
JP8107 @ TPC26T
1MM_OPEN_M1M2
(0.07A) +3VA 2
2 1 1

1 1
C8110
1UF/25V
vx_c0603_small

2
R8137 10%
0Ohm
vx_r0603_h28_small
nonIOAC_@
B Enable1 Enable2 B
1 2
T8113 T8124 T8106 T8118 T8114 T8135
(0.7845A)
6

T8116 TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T


D8102 TPC26T
+3VO +3VSUS
2

2
2 1V/0.2A +5VA +5VO
92 FORCE_OFF_PWR

1
Q8109A 1
AC_BAT_SYS +5VO
1

1 1
UM6K1N SR8102 @ SR8103 @ +5VO_1_1 3 20mil T8138 T8137 T8129 T8133 T8101 T8100
2 S
D

R8127 nb_r0402_short_5mil_small nb_r0402_short_5mil_small C8104 @ TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T
3

2
Q8108 1KOhm 0.1UF/25V
G

1
2

R8130 IRFML8244TRPBF vx_r0402_small D8104 vx_c0603_small +3VA +3VO


1

1
1
86.6KOhm IOAC_@ 1% 1.2V/0.1A C8102 10%
vx_r0402_small 30 USBCHG_EN 1 2 0.1UF/25V T8108 T8105 T8115 T8103 T8128 T8110 T8123
1% IOAC_@ T8136 vx_c0603_small TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T

2
D8103 TPC26T 10%
1

1.2V/0.1A +10VO +3VSUS

1
VSUS_ON_EN 1 2 VCLK

1
2

1
20mil C8111 T8130 T8109 T8122 T8125
1

R8131 R8135 0.1UF/25V TPC26T TPC26T TPC26T TPC26T


6

510KOhm 100KOhm C8122 @ R8111 vx_c0603_small

2
1

1
vx_r0402_small IOAC_@ C8126 0.1UF/25V 470KOhm C8114 10%

1
1% IOAC_@ 1 2 2 0.1UF/25V vx_c0402_small vx_r0402_small 0.1UF/25V
+5VA
1

Q8106A vx_c0603_small 10% 5% vx_c0603_small


1

2
UM6K1N 10% IOAC_@ 10% T8112 T8131 T8107 T8134 T8102 T8104 T8119 T8117
IOAC_@ 1 TPC26T JP8105 @ TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T
3

C8129 +5VO_2_2 3 1MM_OPEN_M1M2


1000PF/50V 2 +12VO 1
1 2 2 +12VSUS

1 1

1
5 vx_c0402_small R8128 20mil
2

Q8106B 10% IOAC_@ 1KOhm D8106 D8100 C8106


32,92 FORCE_OFF# 2 1 11.41V-14.39V
4

UM6K1N vx_r0402_small 1.2V/0.1A 1V/0.2A 0.1UF/25V


D8108 @ IOAC_@ 1% IOAC_@ vx_c0603_small

2
1.2V/0.1A 1 2 10%
30,53 IOAC_EN
1

D8105
0,57,91,93 VSUS_ON VSUS_ON_EN 1.2V/0.1A R8112
VSUS_ON_EN 1 2 1MOhm
1

R8126 vx_r0402_small
1

3
@

A R8136 1KOhm C8130 5% A


2

470KOhm vx_r0402_small 0.1UF/25V


vx_r0402_small 1% vx_c0402_small 5
92 FORCE_OFF_PWR
2

5% 10% Q8109B
2

UM6K1N

<Variant Name>

Title : POWER_SYSTEM
Engineer: Clark Liang
Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 81 of 94
5 4 3 2 1
5 4 3 2 1

D +1.05VO POWER SUPPLY D

11/07/21
+1.05VS & +VCCP
REQUIRE:22UF*18PCS
EE:10UF*10PCS/1uF*26
PWR:22UF*3PCS
Input Current 2.8A
+VCCP_VDD_ +5VO
Check if meet or not

1
C8210 @ C8201 C8206

1
22UF/6.3V 22UF/6.3V 4.7UF/10V C8209
vx_c0805_h57_small vx_c0805_h57_small vx_c0603_small 0.1UF/25V
+1.05VO

2
20% 20% 10% vx_c0402_small

2
10%
1 1 2 2 +1.05VS (4.2A)
T8227 L8200
TPC26T 0.22UH
(OCP:15A) JP8200@
Irat=23A (MAX 10.86A) 3MM_OPEN_5MIL
B5 B2 +VCCP_VX 1 2 1 1 2 2 +VCCP(5.9A)

1 1
VDD1 VX1
C5 VDD2 VX2 B3

1
B4 DCR = 2.8mOhm JP8201@
4,92 +1.05VS_PW RGD VX3
C2 R8200 @ R8205 @ 3MM_OPEN_5MIL
C VX4 18.2KOHM 2.2Ohm C
2 1 A4 STAT VX5 C3 1 1 2 2

1
C4 vx_r0402_small vx_r0603_h28_small C8205 C8203 C8202 +
D8200 VX6 1% 5% 22UF/6.3V 22UF/6.3V 22UF/6.3V JP8204@ CE8200

1 2

1
1.2V/0.1A A2 SENSE+_1_VCCP C8200 vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small 3MM_OPEN_5MIL 100UF/6.3V

2
SENSE+

2
1 2 +VCCP_OE A5 OE +VCCP_LEAD 1 2 C8208 @ 0.1UF/25V 20% 20% 20%

2
83,84,85,91,93 SUSB#_PW R A3 1500PF/50V vx_c0402_small

2
SENSE-
1

R8207 C8204 R8208 vx_c0603_small 10% 0804 should change to 220uF

2
1
10KOhm 0.1UF/25V A1 AGND B1 C8207 150Ohm 10% JP8205 @
vx_r0402_small vx_c0402_small GND1 3300PF/50V vx_r0402_small SHORT_PIN
C1
2

1% 10% GND2 vx_c0402_small 1%

1
VCCP_AGND U8200 10%
VCCP_AGND VT386FCR-ADJ GND
Ferq = 880KHz 1 2 +VCCP_VSENSE+ 1 2
+VCCP_SENSE 6
R8204 R8203
2.74KOhm 10Ohm

2
vx_r0402_small vx_r0402_small


VOUT=VREF (1+Rfb1/Rfb2) 2 1 R8206 1% 1%
6.81KOhm
JP8203@ vx_r0402_small JP8202 @
SHORT_PIN VCCP_AGND 0.01 SHORT_PIN
Where VREF = 0.75V
2

1
+VCCP_VSENSE- 1 2
+VSSP_SENSE 6
Fsw=VOUT/(Nsw* KON) R8202
Nsw = an integer of 3 (VT384/VT386) or 4 (VT387) 10Ohm
vx_r0402_small
KON = a constant with a value of 400nsV 1%
B B

T8222 T8220 T8218 T8214 T8223 T8216 T8225 T8210 T8217 T8229 T8219
TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T
1

1
T8224 T8211 T8212 T8226 T8221 T8230 T8209
GND TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T

+1.05VO +VCCP
1

1
T8213 T8231 T8215 T8228
TPC26T TPC26T TPC26T TPC26T

+1.05VS
1

A A

<Variant Name>

Title : POWER_+VCCP
Engineer: Clark Liang
Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 82 of 94
5 4 3 2 1
A B C D E

+1.5VO POWER SUPPLY


1.5VO UMA DSC
Vout 1.5V 1.557V 11/07/21
1 1
+1.5VO
Input Current 2.26A
R8305 4.02KOhm 3.01KOHM +DDR_VDD
+5VO REQUIRE:22UF*6PCS
EE:10UF*8PCS/1uF*10PCS

1
C8304 C8308 C8315 C8306
R8308 18.2KOHM 5.1KOhm 22UF/6.3V 22UF/6.3V 4.7UF/10V 0.1UF/25V PWR:22UF*3PCS
vx_c0805_h57_small vx_c0805_h57_small vx_c0603_small vx_c0402_small
R8309 4.02KOhm 3.24KOhm

2
20% 20% 10% 10%

T8320 L8300 (OCP:12A)


TPC26T 0.47UH +1.5VO
Irat=17.5A max = 6.62A
B5 B2 +DDR_VX 1 2 2 1 +1.5V

1 1
VDD1 VX1 2 1
C5 VDD2 VX2 B3

1
B4 DCR = 4.2mOhm JP8304 @
92 DDR_PW RGD VX3
VX4 C2 R8308 R8307 @ 3MM_OPEN_5MIL (9.22A)
2 1 A4 C3 18.2KOHM 2.2Ohm 2 2 1 1
STAT VX5

1
C4 vx_r0402_small vx_r0603_h28_small C8310 C8309
D8302 VX6 1% 5% 22UF/6.3V 22UF/6.3V JP8305 @

1 2

1
1.2V/0.1A A2 SENSE+_2_DDR C8316 vx_c0805_h57_small vx_c0805_h57_small 3MM_OPEN_5MIL

2
SENSE+

1
1 2 +DDR_OE A5 C8301 @ 0.1UF/25V 20% 20% C8312
91,93 SUSC#_PW R OE +DDR_RAMP 1500PF/50V vx_c0402_small 22UF/6.3V
A3 2 1

2
SENSE-
1

R8306 C8302 vx_c0603_small 10% vx_c0805_h57_small

2
2 39KOhm 0.047UF/16V 2 1 A1 B1 C8305 10% JP8303 @ 20% 2
AGND GND1

1
vx_r0402_small vx_c0402_small C1 C8317 4.7NF/50V SHORT_PIN
2

1% 10% JP8300 @ GND2 3300PF/50V vx_c0603_h35_small

1
SHORT_PIN DDR_AGND U8300 vx_c0402_small MLCC/+/-5%

2
DDR_AGND VT387FCR-ADJ 10%

2
Ferq = 940 KHz
T8322 T8310 T8307 T8325 T8318 T8323 T8302 T8316
JP8301 @ TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T
SHORT_PIN
VOUT=VREF (1+Rfb1/Rfb2)

1
Where VREF = 0.75V
1 2 +DDR_VSENSE+ GND T8300 T8303 T8308 T8312 T8311 T8321
TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T
Fsw=VOUT/(Nsw* KON) R8309

1
Nsw = an integer of 3 (VT385) or 4 (VT388) 4.02KOhm +1.5V

1
R8305 vx_r0402_small
KON = a constant with a value of 400nsV 4.02KOhm
vx_r0402_small
1%
T8306 T8319 T8313
1% TPC26T TPC26T TPC26T

2
+DDR_VSENSE- +1.5VO

1
3 3

+0.75VS POWER SUPPLY


1 2
+5VO
D8301 @
1.2V/0.1A

1
S5 2 1 SUSC#_PW R
T8304 T8301 T8314

1
SR8301 @ C8303 @ R8300 TPC28T TPC28T TPC28T
nb_r0402_short 0.047UF/16V 39KOhm
11 2 vx_c0402_small vx_r0402_small

1
4 GND2 10% 1% +0.75VO
4
(0.8A) +1.5VO 1
VDDQSNS VDD
10
2 9
VLDOIN S5
1

C8313 3 8
10UF/6.3V VTT GND1 T8305 T8326 T8315
4 7
vx_c0603_small PGND S3 TPC28T TPC28T TPC28T
5 6
2

20% VTTSNS VTTREF


1 2
+0.75VO U8301

1
TPS51206DSQR D8300 @ +0.75VS
(0.8A) 1 2 1.2V/0.1A
+0.75VS 1 2 S3 2 1 2 1
1

JP8302 @ C8314 C8307 SUSB#_PW R 82,84,85,91,93 T8309 T8324 T8317

1
1MM_OPEN_M1M2 10UF/6.3V 0.1UF/25V C8311 R8302 SR8300 @ TPC26T TPC26T TPC26T
vx_c0603_small vx_c0402_small 0.047UF/16V 470KOhm nb_r0402_short
2

20% 10% vx_c0402_small vx_r0402_small 2 1 SUSC#_PW R


2

1
10% 5%
1 2 0V75_VTTREF R8301 @
7 +V_SM_VREF
0Ohm
1

R8303 @ C8300 vx_r0402_small


EE 0Ohm 0.22UF/6.3V
vx_r0603_h28_small vx_c0402_small
2

10%

5 5

<Variant Name>

Title : POWER_DDR & VTT


Engineer: Clark Liang
Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 83 of 94
A B C D E
A B C D E

+1.8VS POWER SUPPLY 1

2 1

D8400 @
1.2V/0.1A
1 2
82,83,85,91,93 SUSB#_PWR

1
R8400

2
2 2
100KOhm C8403 @ R8402 (Input Current :1A)
vx_r0402_small 0.1UF/25V 1MOhm
1% vx_c0402_small vx_r0402_small
+3VO

1
10% 5%

2
(Max:1.8A) (Max:1.5A) L8400
(OCP=1.8A) +1.8VO 1UH +1.8VS_EN 1 6 +1.8VS_FB
Irat=3.2A EN FB +1.8VS_PWRGD
2 GND PG 5
1 2 1 2 +1.8VS_LX 3 4 +1.8VS_PWRGD 92
+1.8VS 1 2 LX IN

1
JP8400 @ DCR = 27mOhm U8400 C8402
1

+ 1MM_OPEN_M1M2 SY8065ABC 10UF/6.3V


CE8400 vx_c0603_small

2
3 100UF/6.3V 20% 3
R1
vx_c3528 1 2 +1.8VO_FB1 1 2
2

C8401 JP8401 @ R8403


22UF/6.3V SHORT_PIN 267KOhm
vx_c0805_h57_small vx_r0402_small
2

20% Frequency:1.5MHz 1%
1 2
Vout=0.6(1+(R1/R2))
C8400 @ R2

1
39PF/50V
vx_c0402_small R8401
5% 133KOhm
vx_r0402_small
1%

2
T8403 T8402 T8400 T8401
TPC26T TPC26T TPC26T TPC26T
4 4
1

1
+1.8VO

<Variant Name>
5 5
Title : POWER_+1.8VS
Engineer: Clark Liang
Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 84 of 94
A B C D E
5 4 3 2 1

D D

VCCSA POWER SUPPLY


2 1

D8500 @
1.2V/0.1A

1 2 VCCSA_EN
82,83,84,91,93 SUSB#_PWR

1
R8501 C8509
39KOhm 0.1UF/25V +5VO TPS51463RGER for Chief River ULV TPS51461RGER for Huron River
vx_r0402_small vx_c0402_small

2
1% 10% +VCCSA_SEL0 +VCCSA_SEL1 VCCSA +VCCSA_SEL0 +VCCSA_SEL1 VCCSA
L L 0.9V L L 0.9V
T8506
TPC28T L H 0.85V L H 0.85V

VCCSA_PWRGD
2 1 2 1

+VCCSA_SEL1
+VCCSA_SEL0
H L 0.775V

VCCSA_V5D
VCCSA_V5F
1

VCCSA_EN
7 VCCSA_SEL0 SP8500 @ SP8501 @
1

nb_r0402_short nb_r0402_short H H 0.75V


1

1
R8506@ for colay R8506 @ C8503 C8505 C8504
470KOhm 1UF/10V 2.2UF/6.3V 0.1UF/25V
C for Huron river and chief river . vx_r0402_small
2
vx_c0402_small vx_c0603_small SR8500 @ vx_c0603_small C

2
T8503 5% 10% 10% R0603 10%
2

TPC28T 1 2 1 2

18
17
16
15
14
13
VCCSA_BST
1

7 VCCSA_SEL1

VID1
VID0
V5DRV
V5FILT
PGOOD

EN
T8505 L8500
92 +VCCSA_PWRGD TPC28T 0.47UH
19 12 Irat=17.5A (Max:6A)
PGND1 BST VCCSA_SW
20 11 1 2 1 2 +VCCSA

11
PGND2 SW5 1 2
1

C8500 C8510 @ C8511 @ 21 10


PGND3 SW4

2
10UF/6.3V 10UF/6.3V 0.1UF/25V 22 9 R8500 @ DCR = 4.2mOhm C8502 C8514 C8512 C8515 @ C8513 @ JP8503@ (Max:6A)
vx_c0603_small vx_c0603_small vx_c0402_small VIN1 SW3 2.2Ohm 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 3MM_OPEN_5MIL
23 8
2

20% 20% 10% VIN2 SW2 vx_r0603_h28_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small
2 1 24 7
+3VO

1
2 1 VIN3 SW1

2
25 5% 20% 20% 20% 20% 20%

1 2
GND1

COMP

MODE
SLEW
VOUT
VREF
(Input Current :1.36A) JP8502 @

GND
2MM_OPEN_5MIL C8506 @
1500PF/50V JP8500 @
U8500A vx_c0603_small SHORT_PIN

1
2
3
4
5
6

2
JP8504 @ TPS51463RGER 10%

1
SHORT_PIN TPS51461RGER
F=1MHz
VCCSA_COMP
26 2 1

VCCSA_SLEW
GND1 C8501
27
GND2

1
28 JP8501 @ 0.22UF/6.3V VCCSA_MODE 1 2
GND3 SHORT_PIN SGND_VCCSA vx_c0402_small R8503
29
GND4 10% R8505 HR_@ 100Ohm
2 1
U8500B 1 2 VCCSA_REF 33KOHM vx_r0402_small
TPS51463RGER C8508 vx_r0402_small SGND_VCCSA 1%

2
TPS51461RGER SGND_VCCSA 3300PF/50V VCCSA_VOUT 1% 2 1 VCCSA_SENSE 7
vx_c0402_small
2

10% C8507 R8502


1 2 0.01UF/25V 1Ohm
B T8508 T8500 T8501 T8502 T8504 T8507 vx_c0402_small vx_r0402_small B
1

TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T 1 2 10% 1%

R8504
1

+VCCSA 5.1KOhm SGND_VCCSA


vx_r0402_small
1%

A A

<Variant Name>

Title : POWER_+VCCSA_0.85VS
Engineer: Clark Liang
Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 85 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

<Variant Name>

A
Title : POWER_N/A
A

Engineer: Clark Liang


Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 86 of 94
5 4 3 2 1
5 4 3 2 1

VGA_CORE POWER SUPPLY


R8732 @
1KOhm
vx_r0402_small +3VS_VGA
1%
VGA_DPRSLPVR 2 1
T8701

1
VCORE VID Set 0.9V TPC28T VGA_DPRSLPVR VGA_PSI# VO_action
T8710 R8744
R8700 2 1 1KOhm vx_r0402_small 1% @ VR_VID_6 TPC28T R8707 2 1 1KOhm vx_r0402_small 1% @ VGFX VID Set 1KOhm L L 1 Phase CCM

1
T8712 vx_r0402_small
R8701 2 1 1KOhm vx_r0402_small 1% @ VR_VID_5 TPC28T R8708 2 1 1KOhm vx_r0402_small 1% DSC_@ 1% DSC_@ R8740 H L 1 Phase DE

2
T8709 1KOhm
R8702 2 1 1KOhm vx_r0402_small 1% @ VR_VID_4 TPC28T R8709 2 1 1KOhm vx_r0402_small 1% DSC_@ vx_r0402_small L H 2 Phase CCM

1
T8706 1% DSC_@
R8703 2 1 1KOhm vx_r0402_small 1% DSC_@ VR_VID_3 TPC28T R8710 2 1 1KOhm vx_r0402_small 1% @ VGA_PSI# 1 2 H H 1 Phase DE
+3VS_VGA

1
D T8700 D

1
R8704 2 1 1KOhm vx_r0402_small 1% DSC_@ VR_VID_2 TPC28T R8711 2 1 1KOhm vx_r0402_small 1% @

1
T8707 R8738 @
R8705 2 1 1KOhm vx_r0402_small 1% DSC_@ VR_VID_1 TPC28T R8712 2 1 1KOhm vx_r0402_small 1% @ 1KOhm

1
vx_r0402_small
R8706 2 1 1KOhm vx_r0402_small 1% DSC_@ VR_VID_0 R8713 2 1 1KOhm vx_r0402_small 1% @ 1%

2
VR_VID_0
VR_VID_1
OCP:60A
VR_VID_2 AC_BAT_SYS
VR_VID_3 EDP=35A

1
VR_VID_4 +

1
C8705 @ C8710 @ CE8704
VR_VID_5

5
1000PF/50V 0.1UF/25V 15UF/25V
vx_c0402_small vx_c0402_small DSC_@

2
2

5 D
6
7
8
10% 10%

SR8700 @ Q8700 DSC_@

S
VR_VID_6
VR_VID_5
VR_VID_4
VR_VID_3
VR_VID_2
VR_VID_1
VR_VID_0

G
R0402 SIR472DP-T1-GE3
+VGA_VCORE_O

1
D8700 Rdson 12.4mOhm(4.5V)

4
3
2
1
1.2V/0.1A
DSC_@ L8700 T8714 T8702 T8705 T8713 +VGA_VCORE
2 1 0.24uH TPC28T TPC28T TPC28T TPC28T JP8700 @
+1.05VS 91 DGPU_EN_PWR Irat=25A 3MM_OPEN_5MIL

1
C8709 1 1 2 2

1 1

1 1

1
0.1UF/25V
2

1 2 vx_c0402_small DCR = 1mOhm JP8702 @

2
+ +

VGA_VRON
R8748 10% DSC_@ DSC_@ CE8700 CE8701 3MM_OPEN_5MIL
499Ohm R8746 R8717 @ 470UF/2V 470UF/2V 1
1 2 2

2
vx_r0402_small 10KOhm 2.2Ohm DSC_@ DSC_@
SR8702 @ 1% DSC_@ vx_r0402_small vx_r0603_h28_small JP8701 @
1

3
2

3
2
5 D
6
7
8
R0402 1% DSC_@ 5% 3MM_OPEN_5MIL

1
1 2 VGA_HOT#_ JP8706 @ JP8707 @ 1
C 32 VGA_HOT#
R8726 SHORT_PIN SHORT_PIN 1 2 2 C

1
VGA_DPRSLPVR Q8701 DSC_@ C8727 @ 10KOhm JP8708 @

1
SR8704 @ VGA_DPRSLPVR

G
SIR166DP-T1-GE3 1500PF/50V vx_r0402_small 3MM_OPEN_5MIL
R0402 Rdson 4mOhm(4.5V) vx_c0603_small 1% DSC_@ 1
1 2 2

4
3
2
1

2
1 2 10% VGA_ISEN2 2 1
25,91 DGPU_PWROK
2 1 SGND_VGA

41
40
39
38
37
36
35
34
33
32
31
VGA_PSI# C8728 R8733
C8730 @ 0.22UF/25V 3.65KOhm R8737 @

VID6
VID5
VID4
VID3
VID2
VID1
VID0
GND
CLK_EN#
DPRSLPVR
VR_ON
0.01UF/25V R8743 SR8703 @ vx_c0603_small vx_r0402_small 0Ohm
vx_c0402_small SGND_VGA 147KOhm R0603 10% DSC_@ 1% DSC_@ vx_r0402_small
10% vx_r0402_small 1 30 VGA_BOOT2 1 21 2 VGA_VSUM+ 2 1 2 1 VGA_ISEN1
0.01 DSC_@ PGOOD BOOT2 VGA_UGATE2
2 29
VGA_RBIAS PSI# UGATE2 VGA_PHASE2 R8729
1 2 3 28
RBIAS PHASE2 1Ohm
4 27
VR_TT# VSSP2 VGA_LGATE2 vx_r0402_small
2 1 2 1 5
NTC U8700A LGATE2
26
SGND_VGA VGA_VW 6 ISL62882CHRTZ-T 25 VGA_VCCP 1 2 1% DSC_@
R8742 R8734 VGA_COMP 7
VW DSC_@ VCCP
24
+5VS VGA_VSUM- 2 1
4.02KOhm 470KOHM VGA_FB COMP LGATE1b VGA_LGATE1a SR8706 @
8 23
vx_r0402_small vx_r0603_small VGA_FB2 FB LGATE1a R0603
9 22 AC_BAT_SYS
FB2 VSSP1
1

1% DSC_@ 3% DSC_@ C8726 VGA_ISEN2 VGA_PHASE1


+5VS 1 2 10
ISEN2 PHASE1
21

1
UGATE1
R8727 1000PF/50V +

BOOT1
ISUM+

1
ISEN1

ISUM-
VSEN
8.06KOhm vx_c0402_small R8721 @ C8708 C8718 @ C8731 @ CE8702

IMON
VDD
2

RTN
1

5
VIN
vx_r0402_small 5% DSC_@ 0Ohm C8700 4.7UF/10V 1000PF/50V 0.1UF/25V 15UF/25V
1% DSC_@ vx_r0603_h28_small 0.22UF/25V vx_c0603_small vx_c0402_small vx_c0402_small DSC_@
2

2
5 D
6
7
8
vx_c0603_small 10% DSC_@ 10% 10%
2

11
12
13
14
15
16
17
18
19
20
10% DSC_@
R8714 @ C8712 R8749 VGA_VSUM- 1 2 VGA_ISEN1
VGA_VDD
VGA_RTN

VGA_VIN
VGA_VSEN

4.02KOhm 22PF/50V 562Ohm C8715 VGA_UGATE1 Q8702 DSC_@

S
G
vx_r0402_small vx_c0402_small vx_r0402_small 0.22UF/25V VGA_BOOT1 SIR472DP-T1-GE3
1% 5% DSC_@ 0.01 DSC_@ vx_c0603_small Rdson 12.4mOhm(4.5V)

4
3
2
1
2 1 1 2 1 2 2 1 10% DSC_@ C8732
R8719 R8715 0.22UF/25V L8701 T8703 T8711 T8704 T8708
324KOHM 2.87KOhm C8707 DSC_@ SR8701 @ vx_c0603_small 0.24uH TPC28T TPC28T TPC28T TPC28T
SGND_VGA vx_r0402_small vx_r0402_small 390PF/50V R0603 10% DSC_@ Irat=25A
1% DSC_@ 1% DSC_@ vx_c0402_small 1 2 1 2

1 1
VGA_FB2 1 2 2 1 1 2 1 2 MLCC/+/-10%
B DCR = 1mOhm B
2 1 +5VS

1
C8722 C8716 DSC_@ + CE8703 C8701 @

5
22PF/50V 150PF/50V R8723 R8722 @ 470UF/2V 0.1UF/25V
1

2
vx_c0402_small vx_c0402_small 1KOhm 2.2Ohm DSC_@ vx_c0603_small
70 NVDD_SENSE

2
5 D
6
7
8
5% DSC_@ 5% DSC_@ C8706 R8731 @ vx_r0402_small vx_r0603_h28_small 10%

3
2
1

2 1 330PF/50V 1KOhm 1% DSC_@ 5%


+VGA_VCORE

1
vx_c0402_small vx_r0402_small JP8704 @ JP8705 @
R8728 10% DSC_@ 1% Q8703 DSC_@ R8718 SHORT_PIN SHORT_PIN

S
2

2
1

1
G
10Ohm C8725 SR8705 @ SIR166DP-T1-GE3 C8704 @ 10KOhm

1
vx_r0402_small 330PF/50V R0603 Rdson 4mOhm(4.5V) 1500PF/50V vx_r0402_small

4
3
2
1
1% DSC_@ vx_c0402_small SGND_VGA 1 2 vx_c0603_small 1% DSC_@ R8720 @
AC_BAT_SYS
2

2
1

C8717 10% DSC_@ 10% VGA_ISEN1 2 1 0Ohm


SGND_VGA 1000PF/50V vx_r0402_small
vx_c0402_small R8736
2

70 NVDD_GND_SENSE
5% DSC_@ C8723 3.65KOhm 2 1VGA_ISEN2
0.22UF/25V vx_r0402_small
vx_c0603_small VGA_VSUM+ 2 1% DSC_@1
2

2 1 10% DSC_@
R8739
R8750 1Ohm
10Ohm vx_r0402_small
vx_r0402_small C8702 SGND_VGA VGA_VSUM- 2 1% DSC_@1
2

1% DSC_@ 1UF/25V
VGA_VSUM+ vx_c0603_small
10% DSC_@
1

1 2
+5VS
2

R8730 R8741 @ R8735


2.61KOhm 80.6Ohm 1Ohm
2

R8703=(Period(us)-0.29)*2.65 vx_r0402_small vx_r0402_small vx_r0402_small


For Common BOM, Remove @
1

1% DSC_@ R8745 C8724 C8713 @ 1% 1% DSC_@


Period(us)=1/300KHz
1

11KOhm 0.22UF/25V 0.047UF/16V 42 45


vx_r0402_small vx_c0603_small vx_c0402_small GND1GND4 JP8703 @
2

2
2

1% DSC_@ 10% DSC_@ 10% C8733 @ SHORT_PIN


For UMA SKU
1

R8725 0.01UF/25V 43 44 1 2
10KOhm vx_c0402_small T8716 T8717 T8718 T8719 GND2GND3
2

A R8706 Setting OCP vx_r0402_h24_small


3% DSC_@
10% TPC28T TPC28T TPC28T TPC28T U8700B DSC_@
ISL62882CHRTZ-T
Remove @ and DSC_@ A
1

VGA_VSUM- 1 2 SGND_VGA
1

R8747
For DSC SKU
1

C8714 1.5KOhm
0.1UF/25V vx_r0402_small T8720 T8721 T8722 T8723
vx_c0402_small 1% DSC_@ TPC28T TPC28T TPC28T TPC28T Remove @ <Variant Name>
2

10% DSC_@
1

SGND_VGA
Title : POWER_VGACORE

Engineer: Clark Liang


Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 87 of 94
5 4 3 2 1
5 4 3 2 1

BATTERY CHARGER
D D

R8814
8 D S 1 10mOhm 8 D S 1 BAT_CON

6 5 2
7 2 7 vx_r1206_h37 AC_BAT_SYS 7 2

2
(Input Current :3.42A) 6 3 (Input Current :3.42A) (Input Current :3.42A) 1% (output Current :6A) 6 3 C8825 (output Current :6A)
5 G 4 4 1 1 2 5 G 4 BAT_GATE 1000PF/50V
60 A/D_DOCK_IN
vx_c0402_small

1
2

2
G
A/D_DOCK_IN Q8800 Q8802 10%

2
R8807 C8810 SI4134DY-T1-GE3 C8811 SI4134DY-T1-GE3 C8809 R8806 @

2
2.2ohm 2200PF/50V 0.1UF/25V Q8801 SR8801 @ SR8803 @ C8806 C8819 0.01UF/25V 4.02KOhm

3
vx_r1206_h26 vx_c0603_small vx_c0603_small IRFHS8342TRPBF R0603 R0603 1000PF/50V 1000PF/50V vx_c0402_small vx_r0402_small EMI Request,Close Q8806
2

1
5% 10% 10% vx_c0402_small vx_c0402_small 10% 1%
1 1

1
10% 10%
C8822 C8818
2.2UF/25V 0.1UF/25V
vx_c1206_h49 vx_c0402_small EMI Request,Close Q8806
2

2
MLCC/+/-10% 10%
R8801 R8809 1 2
4.7KOhm 4.7KOhm

2
vx_r0603_h28_small vx_r0603_h28_small C8815 C8802
5% 5% 0.1UF/25V 0.1UF/25V

1
vx_c0402_small vx_c0402_small

1
10% 10%
REF
2

R8808
0804 (input Current :2.57A)
C8814,05,06 from 0603/X7R AC_BAT_SYS
2

432KOhm
C C
vx_r0402_small R8811 change to 0402/X5R

1
1% 10KOhm C8807 C8808 C8813 C8814 @
for layout space
1

vx_r0402_small 1000PF/50V 10UF/25V 10UF/25V 0.1UF/25V

1
1% 2 5 6 vx_c0402_small vx_c1206_h75 vx_c1206_h75 vx_c0402_small
1

2
D 10% 10% 10% 10%
30 AC_IN_OC
3 G
2

30 AD_IINP S
2

R8816 C8824 @ R8802


71.5KOhm 100PF/50V 12.1KOhm

7
2

5
4
3
2
1
vx_r0402_small vx_c0402_small vx_r0402_small C8801 Q8803
1

1% 5% 1% 100PF/50V IRFHS8342TRPBF

ACOK
ACDRV

ACP
CMSRC

ACN
1

1
vx_c0402_small C8820 Rdson 22mOhm(4.5V)

1
5% 1UF/25V L8800
21 vx_c0603_small 4.7UH

2
GND2 VCC 10% Irat=5.5A
6 ACDET VCC 20
7 IOUT PHASE 19 1 2 1 2 BAT_CON
1 30,60 SMB0_DAT 2 1 8 SDA HIDRV 18
VCC +3VA DCR = 1mOhm R8805
3 1 2 9 SCL BTST 17 1 2 2 1 (Charge Current :3.5A)

1
BAT_CON SR8800 @ 2 5 6 10mOhm C8817 C8800
2 10 ILIM REGN 16

1
R8803 SR8802 @ C8823 D R8810 vx_r1206_h37 10UF/25V 10UF/25V
2

3
BATDRV
D8801 10OHM 2 1 C8812 R0603 0.047UF/25V 2.2Ohm 1% vx_c1206_h75 vx_c1206_h75

LODRV
30,60 SMB0_CLK

2
GND1
0.8V/0.2mA vx_r1206_h28 R8812 1UF/25V vx_c0603_small 3 G vx_r0603_h28_small 10% 10%

SRN
SRP
5% 316KOhm SR8804 @ vx_c0603_small MLCC/+/-10% 5% JP8802 @ JP8803 @

1 2
vx_r0402_small 10% SHORT_PIN SHORT_PIN
S
1% D8800 C8805
1

11
12
13
14
15

2
U8800A 0.8V/0.2mA 1500PF/50V C8816

7
BQ24725ARGRR REF vx_c0603_small 0.1UF/25V

2
2

R8804 Q8804 10% vx_c0402_small


1

100KOhm C8803 BAT_GATE 2 1 IRFHS8342TRPBF 10%


vx_r0402_small 0.01UF/25V Rdson 22mOhm(4.5V) 1 2
1% vx_c0402_small R8815
2

10% 4.7KOhm
1

2
B vx_r0603_h28_small C8821 C8804 B
5% 0.1UF/25V R8813 R8800 0.1UF/25V
vx_c0402_small 0Ohm 0Ohm vx_c0402_small

1
10% vx_r0402_small vx_r0402_small 10%

2
T8816 T8818 TPC28T T8817 T8815 T8805 T8800 TPC28T T8807 T8812
TPC28T TPC28T T8819 TPC28T TPC28T TPC28T TPC28T T8810 TPC28T TPC28T

A/D_DOCK_IN BAT_CON
1

T8821 T8823 TPC28T T8822 T8820 T8804 T8801 TPC28T T8811 T8814
TPC28T TPC28T T8824 TPC28T TPC28T TPC28T TPC28T T8808 TPC28T TPC28T U8800B
BQ24725ARGRR JP8801 @
AC_BAT_SYS SHORT_PIN
1

GND3 22 2 1
GND4 23
GND5 24
GND6 25

A A

<Variant Name>

Title : POWER_CHARGER

Engineer: Clark Liang


Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 88 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

<Variant Name>

A
Title : POWER_N/A
A

Engineer: Clark Liang


Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 89 of 94
5 4 3 2 1
5 4 3 2 1

D D

BATTERY IN DETECT
C C

60 TS1# 2 1 BAT1_IN_OC# 30
JP9000 @
SHORT_PIN

B B

<Variant Name>

A
Title : POWER_DETECT
A

Engineer: Clark Liang


Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 90 of 94
5 4 3 2 1
5 4 3 2 1

SUSB#_PWR POWER DGPU_EN_PWR POWER T9136 T9131 T9129


T9101 T9115 T9106 TPC26T TPC26T TPC26T
TPC26T TPC26T TPC26T
8 1 +1.05VS_VGA

1 1

1
7 2

2 S
D
+3VO +3VS

1 1

1
6 S VGS= 4.5V , Rdson = 5.6mOhm C9119

3
3
(Max:2.065A)
1
C9100 @ Q9100 VGS= 4.5V , Rdson = 41.5mOhm C9108 5 D VGS= 10V , Rdson = 4.2mOhm 0.1UF/25V
(Max:2.648A) +1.05VO 5 4

G
47PF/50V IRFML8244TRPBF VGS= 10V , Rdson = 27.6mOhm 0.1UF/25V vx_c0402_small

1
G

2
1
vx_c0402_small vx_c0402_small C9118 @ Q9111 DSC_@ +1.05VS_VGA_SW_R 2 1 10% DSC_@
2

2
5% +3VS_SW_R 2 1 10% 47PF/50V SIR166DP-T1-GE3

1
vx_c0402_small C9117 R9112

2
1
D C9101 R9105 5% 0.1UF/25V 47KOhm D
0.1UF/25V 47KOhm vx_c0402_small vx_r0402_small

2
vx_c0402_small vx_r0402_small 10% DSC_@ 1% DSC_@ T9137 T9128 T9132

2
10% 1% T9119 T9123 T9102 TPC26T TPC26T TPC26T
TPC26T TPC26T TPC26T

2 S
+3VS_VGA

D
+3VO

1 1

1
3
2 S
+5VO D +5VS

1 1

1
C9120 @ Q9109 C9124
3
(Max:0.42A)

G
1

C9116 @ Q9101 VGS= 4.5V , Rdson = 41.5mOhm C9103 47PF/50V IRFML8244TRPBF VGS= 4.5V , Rdson = 41.5mOhm 0.1UF/25V

1
(Max:3.207A)
G
47PF/50V IRFML8244TRPBF VGS= 10V , Rdson = 27.6mOhm
1 0.1UF/25V vx_c0402_small DSC_@ VGS= 10V , Rdson = 27.6mOhm vx_c0402_small

2
vx_c0402_small vx_c0402_small 5% 10% DSC_@
2

2
5% +5VS_SW_R 2 1 10% +3VS_VGA_SW_R 2 1

1
C9107 R9106 C9126 @ R9111
0.033UF/16V 47KOhm 0.033UF/16V 22KOhm
vx_c0402_small vx_r0402_small vx_c0402_small vx_r0402_small
2

2
10% 1% T9117 T9112 T9104 10% 1% DSC_@ T9138 T9134 T9133
TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T

8 1 8 1
+1.5VS +1.5VS_VGA

1 1

1 1

1
7 2 7 2
6 S VGS= 4.5V , Rdson = 5.6mOhm C9102 6 S VGS= 4.5V , Rdson = 15mOhm C9122
5 5 D
3
4 VGS= 10V , Rdson = 4.2mOhm 0.1UF/25V (Max:5.66A) 5 5 D
3
4 VGS= 10V , Rdson = 12mOhm 0.1UF/25V (Max:4.137A)
+1.5VO
vx_c0402_small
+1.5VO vx_c0402_small
G G

2
1

1
C9105 @ Q9102 +1.5VS_SW_R 2 1 10% C9125 @ Q9107 DSC_@ +1.5VS_VGA_SW_R 2 1 10% DSC_@
47PF/50V SIR166DP-T1-GE3 47PF/50V SIR472DP-T1-GE3
1

1
vx_c0402_small C9112 R9102 vx_c0402_small C9121 R9110
2

2
5% 0.033UF/16V 47KOhm 5% 0.033UF/16V 22KOhm R9116 @
vx_c0402_small vx_r0402_small 10% DSC_@ vx_r0402_small 47KOhm
2

2
10% 1% 1% DSC_@ vx_r0402_small T9125
T9108 T9124 T9111 1% TPC26T

2
TPC26T TPC26T TPC26T
+12VS_VGA

C
+12VSUS

1
C C
T9130

4
+12VS

3
E

+12VSUS
1

1
T9105 C9123 @ TPC26T
(Max:0.01A)
4

47K
3
1

C9110 @ TPC26T 47PF/50V R9109


(Max:0.01A)
47K

B
47PF/50V R9101 vx_c0402_small T9126 560KOhm

1
B

vx_c0402_small SUSB#_PWR 560KOhm 5% TPC26T vx_r0402_small

B
47K

10K
2

47K
5% vx_r0402_small 5% DSC_@ T9122
2

B
47K

10K

2
47K

5% TPC26T SP9100@
2

1
nb_r0402_short_5mil_small

6
25,87 DGPU_PWROK
Q9108 DSC_@
1

1 2
C

24,30,57,92 SUSB_EC#

1
Q9105 T9118
1 2 TPC26T
+12VSUS
3.3V --> 1.05V --> VGA_CORE --> 1.5V R9108
82,83,84,85,93 SUSB#_PWR

1
560KOhm T9109
vx_r0402_small TPC26T SP9101@

3
5% DSC_@ nb_r0402_short_5mil_small
SUSC#_PWR POWER 30,57 SUSC_EC# 1 2

1
T9103 T9107 T9121 1 2 5 T9116
+5VSUS
TPC26T TPC26T TPC26T Q9110B TPC26T

4
R9107 UM6K1N
560KOhm DSC_@
2 S
D

+3VO +3V 83,93 SUSC#_PWR


1 1

1
vx_r0402_small T9127
3
1

6
C9109 @ Q9103 VGS= 4.5V , Rdson = 41.5mOhm C9114 5% DSC_@ TPC26T SP9102@
(Max:0.378A)
G

47PF/50V IRFML8244TRPBF VGS= 10V , Rdson = 27.6mOhm 0.1UF/25V nb_r0402_short_5mil_small


1

vx_c0402_small vx_c0402_small DGPU_EN_PWR 2 1 2


24 VGA_PWRON
2

1
5% +3V_SW_1 2 1 10% Q9110A T9135

1
UM6K1N TPC26T
1

C9115 @ R9104 DSC_@


0.1UF/25V 22KOhm
87 DGPU_EN_PWR

1
vx_c0402_small vx_r0402_small
2

10% 1% T9114 T9100 T9110 R9121


TPC26T TPC26T TPC26T 0Ohm
B nonDS3_@ B
2 S

1 2
+5V
D

+5VO
1 1

Q9115
3

VSUS_ON POWER
1

C9106 @ Q9104 VGS= 4.5V , Rdson = 41.5mOhm C9113 IRFML8244TRPBF


(Max:0.0287A) (Max:0.15A)
G

47PF/50V IRFML8244TRPBF VGS= 10V , Rdson = 27.6mOhm 0.1UF/25V DS3_@


1

2 S
D
vx_c0402_small vx_c0402_small
+3VO +3VSUS_DS3 R9123

3
2

1
5% 10% C9131 @ C9133 0Ohm @

G
+5V_SW_1 47PF/50V 0.1UF/25V T9139 T9141 T9140

1
2 1 1 2
vx_c0402_small 2 1 vx_c0402_small Q9112 TPC26T TPC26T TPC26T
2

2
1

C9111 @ R9100 5% 10% DS3_@ IRFML8244TRPBF

1
0.033UF/16V 22KOhm C9130 R9119

2 S
+5VSUS

D
+5VO

1 1

1
vx_c0402_small vx_r0402_small 0.033UF/16V 22KOhm

3
2

1
10% 1% vx_c0402_small vx_r0402_small C9128 @ C9127
(Max:1A)

G
2
T9113 10% R9122 1% DS3_@ 47PF/50V 0.1UF/25V

1
TPC26T DS3_@ 0Ohm vx_c0402_small vx_c0402_small

2
1 nonDS3_@
2 5% VGS= 4.5V , Rdson = 22mOhm 10%
VGS= 10V , Rdson = 17mOhm
+12VSUS 1 2
+12V (Max:0.0287A)
1

R9103 +5VSUS_SW_R
(Max:0.01A)
2 S
D

560KOhm
+5VO
Q9114 +5VSUS_DS3
3
1

1
vx_r0402_small C9132 @ IRFML8244TRPBF C9134 C9129 @ R9115 1 2
+12VSUS
G
3

5% 47PF/50V DS3_@ 0.1UF/25V 0.1UF/25V 1KOhm


1

vx_c0402_small 2 1 vx_c0402_small vx_c0402_small vx_r0402_small R9114


2

2
1 2 5 5% 10% DS3_@ 10% 1% 560KOhm
+5VA
1

Q9106B C9135 R9120 vx_r0402_small


4

3
R9124 UM6K1N 0.033UF/16V 22KOhm 5%
T9120 560KOhm vx_c0402_small vx_r0402_small
2
6

TPC26T vx_r0402_small 10% DS3_@ 1% DS3_@ 1 2 5


5%
+5VA Q9113B

4
SUSC#_PWR 2 1 2 R9113 UM6K1N
+12VSUS
1

Q9106A 560KOhm
1

UM6K1N R9117 vx_r0402_small

6
560KOhm 5%
6
A A
vx_r0402_small
5% DS3_@ 30,57,81,93 VSUS_ON 2
1 2 2 Q9113A
+5VA

1
Q9116A UM6K1N
1

R9118 UM6K1N
560KOhm DS3_@
<Variant Name>
vx_r0402_small
3

5% DS3_@

5
Title : POWER_LOAD SWITCH
22,30 SLP_SUS#
Q9116B Engineer: Clark Liang
4

UM6K1N
DS3_@ Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 91 of 94
5 4 3 2 1
5 4 3 2 1

+3VS
POWER GOOD DETECTER

2
R9203
D 100KOhm D
T9204 vx_r0402_small
TPC26T SR9200 @ 1% +3VSUS

1
NB_R0402_5MIL_SMALL
83 DDR_PWRGD 2 1 ALL_PWRGD_R 1 A 5

1
VCC
T9207 T9200
TPC26T SR9203 @ 2 B TPC26T
NB_R0402_5MIL_SMALL
84 +1.8VS_PWRGD 2 1 3 GND 4 ALL_SYSTEM_PWRGD 30

1
Y
T9205 U9200 @
TPC26T SR9201 @ Vcc=2~5.5
NB_R0402_5MIL_SMALL
85 +VCCSA_PWRGD 2 1

1
T9203
TPC26T SR9202 @ SR9204 @ SR9205 @
NB_R0402_5MIL_SMALL NB_R0402_5MIL_SMALL NB_R0402_5MIL_SMALL
4,82 +1.05VS_PWRGD 2 1 2 1 2 1 2 1 PM_PWROK 4,22,30

1
R9205 @
0Ohm
vx_r0402_small
C C
80 VGFX_PWRGD 2 1

R9206 @
0Ohm
vx_r0402_small +3VSUS

2
R9200
100KOhm
T9201 vx_r0402_small
TPC26T 1%

1
30,81 SUS_PWRGD 2 1
1

D9202
1.2V/0.1A

SR9206 @
NB_R0402_5MIL_SMALL
2 1 DELAY_VR_AND_ALL_SYS 22
T9206
B TPC26T B
T9208 R9202 @
TPC26T 0Ohm SUSB_EC#
+3VS 24,30,57,91 SUSB_EC# FORCE_OFF# 32,81

1
vx_r0402_small
VGFX_PWRGD 2 1
1

1
1

2
R9201 R9204
100KOhm D9200 560KOhm
T9202 vx_r0402_small 1.2V/0.1A vx_r0402_small
+3VSUS

3
TPC26T 1% 5%

2
2

1
30,80 VRM_PWRGD 1 A 5 5
1

VCC
Q9200B

4
6
1 2 ALL_SYSTEM_PWRGD 2 B UM6K1N
FORCE_OFF_PWR 81
D9201 3 GND 4 2

1
1.2V/0.1A Y Q9200A C9200

1
U9201 @ UM6K1N 4.7UF/10V
Vcc=2~5.5 vx_c0603_small

2
10%
SR9207 @
NB_R0402_5MIL_SMALL
50 CPU_THERM# 2 1

A A

<Variant Name>

Title : POWER_PROTECT
Engineer: Clark Liang
Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 92 of 94
5 4 3 2 1
5 4 3 2 1

D D

AC_BAT_SYS AC_BAT_SYS 45,53,81,87,88 FOR POWER TEST


BAT_CON BAT_CON 60,88

+5VA +5VA 37,60,81,91


+3VA T9300
+3VA 6,20,26,27,30,31,57,59,60,81,88
JP9300 @ TPC26T
+5VO +5VO 52,65,80,81,82,83,85,91 SGL_JUMP
+3VO +3VO 53,81,84,85,91 +3VA 1 1 2 2 CPU_VRON_PWR 80

1
+1.8VO +1.8VO 60,84
+1.5VO +1.5VO 83,91 T9301
+1.05VO 82,91 JP9301 @ TPC26T
+1.05VO
+0.75VO 83 SGL_JUMP
+0.75VO
1 1 2 2 SUSB#_PWR 82,83,84,85,91

1
+12VSUS +12VSUS 28,51,81,91
+5VSUS T9302
+5VSUS 51,57,59,91
C
+3VSUS JP9302 @ TPC26T C
+3VSUS 4,22,24,28,30,60,81,92
SGL_JUMP
+12V +12V 60,91 1 1 2 2 SUSC#_PWR 83,91

1
+5V +5V 57,59,60,91
+3V T9303
+3V 24,45,57,59,61,91
+1.5V JP9303 @ TPC26T
+1.5V 5,16,17,18,57,60,83
SGL_JUMP
+12VS +12VS 28,36,48,91 1 1 2 2 VSUS_ON 30,57,81,91

1
+5VS +5VS 27,36,37,48,50,51,57,80,87,91
+3VS +3VS 17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92
+1.8VS +1.8VS 7,25,26,57,80,84
+1.5VS +1.5VS 7,26,53,57,91
+1.05VS +1.05VS 26,27,57,82,87
+VCCSA +VCCSA 7,85
+0.75VS +0.75VS 16,17,57,83

+VCORE +VCORE 6,9,11,80


+VGFX_CORE +VGFX_CORE 7,9,80

+12VS_VGA +12VS_VGA 60,91


B +3VS_VGA +3VS_VGA 57,70,72,74,75,87,91 B
+1.5VS_VGA +1.5VS_VGA 57,71,75,76,77,91
+1.05VS_VGA +1.05VS_VGA 57,70,71,72,91

A <Variant Name> A

Title : POWER_SIGNAL
Engineer: Clark Liang
Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 93 of 94
5 4 3 2 1
5 4 3 2 1

SPEC rating

UMC4N +12V (10mA)


SUSC#_PWR (SWITCH)
+5VO +12VSUS
UMC4N +12VS (10mA)
charge SUSB#_PWR (SWITCH)
D
pump(triple D

VSUS_ON volatger)

SSM3K315T +3VSUS (0.319A)

+5VAO
SUSC#_PWR
SSM3K315T +3V (0.278A)

SUSB#_PWR
+3VO SSM3K315T +3VS (1.809A)

+3VA +3VA (0.07A)


AC_BAT_SYS
TPS51225

+5VSUS (0.021A)
VSUS_ON
+5VO SUSC#_PWR
SSM3K315T +5V (1.615A)
FORCE_OFF#
SUSB#_PWR
SSM3K315T +5VS
+5VA (1.783A)
+5VA
+5VO (0.1A)
C C
SUS_PWRGD

+5VO VT386 +1.05VS (3.37A)

SUSB#_PWR +1.05VO
+VCCP (5.95A)
+1.05VS_PWRGD

SUSC#_PWR

+1.5VO
VT387 SSM3K315T
+1.5VS (0.009A)
+5VO SUSB#_PWR
DDR_PWRGD +1.5V (9.688A)

+0.75VS (1A)
SUSB#_PWR TPS51206
SUSB#_PWR
+0.85VO SUSC#_PWR
B B
TPS51461R
+5VS +VCCSA (4.8A)
+VCCSA_PWRGD

SUSB#_PWR +1.8VO
+1.8VS (1.002A)
SY8065ABC
+5VS
+1.8VS_PWRGD

+5VS

UMA
+VGFX_CORE (12A)
VGFX_PWRGD
+5VS

VT1318MFQR

A A

+VCORE (21.5A)
+5VS

CPU_VRON,CPU_VRON_PWR
<Variant Name>
SVID_VDIO,SVID_VCLK,SVID_ALERT#,
VCCSENSE,VSSSENSE,
VCC_GFX_SENSE,VSS_GFX_SENSE
VRM_PWRGD,VGFX_PWRGD,I_MON,VGFX_IMON2 Title : POWER_FLOWCHART

ALL_SYSTEM_PWRGD Engineer: Clark Liang


Size Project Name Rev
Custom JM50 1.0
Date: Thursday, August 23, 2012 Sheet 94 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A
Title : ****
BG1\HW1 Engineer: Joyoung_Chianhg
Size Project Name Rev
A JM50 3.1
Date: Thursday, August 23, 2012 Sheet 96 of 93
5 4 3 2 1
5 4 3 2 1

SR BOM change PR
PR2.1 RTC pin define swap
SR1.1 Un-mount Q5602, Q5601 and mount R5323 and R5310
SR1.2 CE5001 un-mount
SR1.3 L3602 mount
SR1.4 R7005 un-mount
D D
SR1.5 R7410 change 10K ohm PR_S01:Change C3627,C3626 from X5R to Y5V
SR1.6 R4504 change 10K ohm for LVDS backlight PR_S02:According with INTEL datasheet suggest.(Power circuit mount)
SR1.7 R7430, R7432, R7433 un-mount PR_S03:To prevent 誤誤誤 PCIE Wake.
SR1.8 R7608, R7611 change 162 ohm PR_S04:To change WLAN LED control by MODULE then gate control by 3G LED.
ER PR_S05:To change 3G LED control by MODULE.
ER1.1 PI pin connect to ESD and VDD pin reserve 0.1 uF cap
ER1.2 Add diode and reserve 0 ohm for AC adapter plug in /out voice PR_S06:To prevent leakage current and mount R for cost down.
ER1.3 U5201 change G547G1P81U for Desing IP PR_S07:RF reserve.
ER1.4 Add Card Reader LED
ER1.5 J3701, J3702, J4601, J5201, J5304,J5001 chang connector PR_S08:Move P.U 10K near 3G connector.
ER1.6 R6505~R6508 change 0603 size PR_S09:Change LED POWER rail from +5VSUS_LEDDB(+5VSUS) to
ER1.7 D4801 contact to 2.2K ohm for EA solution in HDMI issue +5VA_LEDDB(+5VA) .(To resolve Battery LL issue)
ER1.8 CPU_THERM# contact to FORCE_OFF# PR_S10:Change LED POWER rail from
ER1.9 RTC battery connector (J2001)Pin1, Pin2 swap +5VSUS_LEDDB(+5VSUS) to +5V_LEDDB(+5V)
ER1.10 D3707, D4618, D5201, D5301, D6502, D6503, D6802 VDD pin reserve 0.1 uF cap
ER1.11 R3720 R3721 change 51ohm for consumer spec in HP PR_S11:Del JP, +3VS_CR change Net name to +3VS
C
ER1.12 L4601, L4602, L4603 change 27nH and add C4622, C4623, C4624 for EA solution in CRT PR_S12:ESD change solution ,Add U6512 ,Del C6509,D6501~3,U6502,U6503,D6401 C

ER1.13 L5301, L5302, L5306 change 0 ohm and L5305 change short pin,
C5321, C5327,C5307, C5322, C5315, C5305, C5313 change umount PR_S13:Change NET name to +3VS
ER1.14 Change R4566 from 300(0603) to 150(0402) for LVDS power sequence solution PR_S14:Change 10uF to 22uF for wave of CRT display.
ER1.15 USB port 0 and port 1 swap
ER1.16 Vcore_add CE8002&CE8006 to replace CE0601&CE0602 PR_S15:Add 10uF (C6803)for USB droop test.
ER1.17 VGFX_CORE(IGPU) add CE8007 to replace CE0705 PR_S16:D5201 PIN Swap
ER1.18 reserve M_VREF schematic
ER1.19 Reserve C2623, C2624, C4514, C4515 for WLAN solution PR_S17:ME modify.(H6532,8,1,9,4,3,5,H6945),DEL H6944
ER1.20 Reserve C4510, C4512, C4513 for 3G and L6002~L6004, L4502 change 47 ohm Bead PR_S18:EMI add.
ER1.21 C6007, C6006 mount for WLAN
ER1.22 RN3002 change 2R4P PR_S19:Change to unmount for ME
ER1.23 LED and BT schematic change to LED board PR_S20:RF request.
ER1.24 LED power change 5VSUS, so R5618, R5616, R5623 change 560 ohm
ER1.25 VRAM change co-lay footprint PR_S21:LED light fine-tune.
ER1.26 Reserve C5601, C5602, C5603, C6356, C6357 to 47pF for RF request PR_S22:BIOS request for UMA and DSC platform identifying.
ER1.27 Reserve C4516, C4517 to 10pF for RF request
ER1.28 U6504,U6505 change AZ3028 for EMI request
ER1.29 D6401, D6501, D6502 change ESD AZ5023 in for EMI request in LAN function
B ER1.30 Add C6010 C6011 for EMI request B

ER1.31 Merge Q6704 and remove U6704


ER1.32 D3720 change to mount for EMI request
ER1.34 Reserve C6913(47PF), C6902(0.1uF), C6623(47PF), C6606(22uF) for 3G
ER1.35 L6601=>0901-00HI000 FERRITE BEAD(1206)390 OHM/2A

A A

Title : ****
<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 97 of 93
5 4 3 2 1
5 4 3 2 1

Power On Sequence Diagram G3-S0 R0.3 (non-iAMT,non-Deep Sx)

D Reset PWR_SW# 8
D

Logic Power On
(R) Button
2

EC_RST#
ME_AC_PRESENT 7
AC_BAT_SYS ME_SUSPWRDNACK 6
+3VA PM_PWRBTN# 9
+3VA_EC 1 EC PM_SUSC# 10
+5VA PM_RSMRST# 5
NPCE795L SLP_S4#
+5VO ME_PWROK PM_SUSB# 12
PM_PWROK PM_PWROK ME_PWROK SLP_S3#
VSUS_ON 3 delay 99ms 17 PCH_PWROK
DRAMPWRGD
SYS_PWROK 22
+3VSUS SYS_PWROK PLT_RST#
+5VSUS

BUF_PLT_RST#

H_DRAM_PWRGD
SUS_PWRGD 4 PROCPWRGD

SUSB_EC#
SUSC_EC#
+12VSUS

H_CPUPWRGD
C C
PCH
+5VO +1.5V
+3V 15 16 21 13 11

ALL_SYSTEM_PWRGD

CPU_VRON

VRM_PWRGD
+5V
11 SUSC_EC# +12V 19 23 18

RSTIN#

VDDPWRGD
UNCOREPWRGD
+0.75VS
+1.5VS
13 SUSB_EC# +1.8VS POWER GOOD
+3VS LOGIC
+5VS CPU
+12VS 20 SVID SVID
B B
+VCCSA_PWRGD

13 SUSB_EC# +VTT_PCH +1.05_PWRGD


+1.05VS

13 SUSB_EC# +VCCP +VCCP_PWRGD14


+1VS/+1.05VS
+VCCSA

Power On Sequence
1 23
A A

SVID
IMVP7
+VccCore
+VccAXG

Title : Power On Sequence


<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 98 of 93
5 4 3 2 1
5 4 3 2 1

Power On Sequence Diagram G3-S0 R0.3 (non-iAMT,non-Deep Sx)

D D
1 +3VA_EC

2 EC_RST#

3 VSUS_ON
+3VSUS/+5VSUS
T0>10ms
4 SUS_PWRGD
T1= 20ms
5 PM_RSMRST#
T2<200ms
6 ME_SUSPWRDNACK
0<T3<90ms
7 ME_AC_PRESENT
(falling edge)
8 PWR_SW#
T4=50ms
9 PM_PWRBTN#

10 PM_SUSC#

11 SUSC_EC#

C
+1.5V/+3V/+5V/+12V C

12 PM_SUSB#

13 SUSB_EC#
+0.75VS/+1.5VS/+1.8VS/+3VS/+5VS

+VTT_PCH

+VCCP

14 +VCCP_PWRGD
+VCCSA

+VCCSA_PWRGD

dGPU_PWR_EN

+VGA_CORE

dGPU_PWROK

15 ALL_SYSTEM_PWRGD
B B
16 CPU_VRON
T5=99ms
17 ME_PWROK/PCH_PWROK
T6>1ms
18 H_DRAM_PWRGD
T7>100ms
19 H_CPUPWRGD

20 SVID
+VCC_CORE

+VGFX_CORE

21 VRM_PWRGD

22 SYS_PWROK
T8>1.06ms
23 BUF_PLT_RST#

A A

Title : Power On Timing


<OrgName> Engineer: Joyoung_Chianhg
Size Project Name Rev
C JM50 3.1
Date: Thursday, August 23, 2012 Sheet 99 of 93
5 4 3 2 1

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