Register Number

SATHYABAMA
INSTITUTE OF SCIENCE AND TECHNOLOGY
(Deemed to be University U/S 3 of UGC Act,1956)

Programme & Specialisation: B.E. - ECE/EEE

Title of the Paper : Digital Logic Circuits Max. Marks : 100
Course Code : SECA1201 (2021) Time : 3 Hours
Date : 30-06-2022 Session : FN
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(NOTE: Assume relevant data, if found missing) 
PART - A (10 × 2 = 20)
Answer ALL the Questions
1. List the applications of Ex.OR gate. (CO1)

2. Apply Demorgan’s theorem to simplify F = [A(B+C’)’.D];.

(CO1)

3. Define Minterm and Maxterm. (CO2)

4. List the design steps of a combinational circuit. (CO2)

5. Realize a full subtractor using a decoder. (CO3)

6. Write the sum and carry expression for the full adder. (CO3)

7. Compare a Flip Flop with a latch. (CO4)

8. Define modulus of a counter. (CO4)

9. Name the digital IC families. (CO5)

10. Define Fan out of a gate. (CO5)
PART - B (5 × 16 = 80)
Answer ALL the Questions
11. (a) Convert (i) [5497]10 to binary
(ii) [374.26]8 to binary
(iii) [1E0.2A]16 to Octal
(iv) [FAFA.B]16 to binary
(b) What is consensus theorem? Prove it.
(c) Simplify the expression : Y = abc + ab’c + abc’ and draw the
NAND – NAND implementation for the simplified expression.
(CO1)
(or)
12. (a) Utilize Demorgan’s theorem for the expression given below:

(b) Show that (CO1)

13. Utilize K-map to simplify and to obtain minimum SOP

expression (A’+B’+C+D) (A+B’+C+D) (A+B+C+D’)
(A+B+C’+D’) (A’+B+C+D’) (A+B+C’+D). (CO2)
(or)
14. Derive the reduced expression for the given function using Quine
Mccluskey method.
Find SOP for f(a,b,c,d) = m(6,7,8,9)+d(10, 11, 12, 13, 14, 15)
And also draw the logic diagram for the resultant expression.
(CO2)
15. Construct a BCD adder and explain its working principle. (CO3)
(or)
16. Construct a circuit that compares two 4 bit numbers. The circuit
has to generate three outputs a > b, a < b and a = b taking as
inputs ‘a’ and ‘b’ each of 4 bits length. (CO3)

17. Describe the working of master JK flip flop and the input and
output action of JK master /slave flip flops. (CO4)
 (or)
18. (a) Explain hazards and its types. How to realize hazard free
circuits?
(b) Construct hazard free realization circuit for the following
Boolean function. F(A,B,C,D) = M(0,2,6,7,8,10,12)
(CO4)

19. Describe in detail about the TTL Logic circuit and its application.
(CO5)
(or)
20. Implement the following function using PLA F1=Σ (0, 1, 2, 4)
and F2 = Σ (0, 5, 6, 7). (CO5)