Unit_1_Introduction To Microprocessor 1

Introduction
A microprocessor is a central component of a computer system that serves as the "brain" of
the machine. It's a small integrated circuit that contains the necessary circuitry to perform
arithmetic and logical operations, control input/output devices, and execute instructions of a
computer program. Microprocessors are used in a wide range of electronic devices, from
personal computers and smartphones to embedded systems and industrial machinery.

Key components and functions of a microprocessor include:

1. Central Processing Unit (CPU):

- The CPU is the core of the microprocessor responsible for executing instructions.
- It performs arithmetic operations, logical comparisons, and data movement tasks

2. Control Unit:
- The control unit manages the execution of instructions.
- It fetches instructions from memory, decodes them, and controls the flow of data within the
processor.

3. Arithmetic Logic Unit (ALU):

- The ALU performs arithmetic operations (addition, subtraction, multiplication, division) and
logical operations (AND, OR, NOT) on data.

4. Registers:
- Registers are small, high-speed storage locations within the CPU.
- They can hold data temporarily during processing and enable quick access for calculations

5. Clock and Timing Circuitry:

- The clock generates a constant pulse that synchronizes the activities of various components
in the microprocessor
- It establishes the processing speed of the microprocessor

6. Instruction Set Architecture (ISA):

- The ISA defines the set of instructions that the microprocessor can execute.
- It includes commands for data manipulation, control flow, and interaction with memory and
peripherals.

Microprocessors come in various architectures, each with its own design and instruction set.
Common architectures include x86 (Intel and AMD processors), ARM (used in mobile devices
and embedded systems), and MIPS (common in networking and embedded applications).

History and Evolution

Example Max Max Base Cache
Generation Year Transistors Bits
RAM ROM Clock Memory

Intel 4- 640 10 KB 740

1st 1971 ~2,300 N/A
4004 bit bytes kHz

Intel Few 16- 1 MB 1 MB 5 MHz

2nd 1978 N/A
8086 thousand bit

Intel Tens of 16- 16 16 6-12.5

3rd 1982 N/A
80286 thousands bit MB MB MHz

Hundreds
Intel 32- 4 GB 4 GB 16-33
4th 1985 of N/A
80386 bit MHz
thousands

60-
Intel 32- 64 4 GB L1 Cache
5th 1993 Millions 200
Pentium bit GB
MHz

Intel
Core,
64+ L1, Yes
AMD Varies Varies
Subsequent Ongoing Billions GB L2, L3 (Advanced)
Ryzen,
Cache
ARM-
based

Types of microprocessors
A brief overview of the types of microprocessors in a concise notes format:

Design
Processor Type Features Applications Architectures
Concepts

Versatile,
Balanced
General- suitable for Personal x86 (Intel,
performance for
Purpose various computers, laptops, AMD), ARM,
general
Microprocessors computing servers POWER (IBM)
computing
tasks
 Design
Processor Type Features Applications Architectures
Concepts

Low power Consumer Optimized for

Embedded consumption, electronics, specific tasks, ARM, MIPS,
Microprocessors real-time industrial control compact form Intel Atom
capabilities systems factor

Efficient control
Integrated Embedded Various,
of devices, low-
Microcontrollers CPU, memory, systems, robotics, including ARM
power
peripherals IoT devices Cortex-M, PIC
operation

Specialized for
Digital Signal High-speed
signal Audio, video, TI C6x, ADI
Processors mathematical
processing telecommunications Blackfin
(DSPs) operations
tasks

Massive
Graphics High parallel Gaming, scientific NVIDIA
parallelism,
Processing processing simulations, CUDA, AMD
graphics
Units (GPUs) power machine learning RDNA
rendering

Application-
Highly Cryptocurrency
Specific Customized Tailored to the
specialized for mining, custom
Integrated logic circuits application
specific tasks hardware
Circuits (ASICs)

Field- Custom
Programmable Reconfigurable accelerators, high- Customizable Programmable
Gate Arrays hardware performance logic gates logic blocks
(FPGAs) computing

Custom
Optimized for
Network Routers, switches, Efficient packet network-
networking
Processors network appliances processing oriented
tasks
designs

Efficient for
Scientific SIMD (Single Cray, Intel
Vector mathematical
simulations, data Instruction, Xeon Phi
Processors operations on
analysis Multiple Data) (discontinued)
arrays

Simple
RISC Mobile devices, Streamlined ARM, MIPS,
instructions,
Processors embedded systems instruction set RISC-V
fast execution
 Design
Processor Type Features Applications Architectures
Concepts
Rich instruction
CISC Desktops, servers, Comprehensive x86 (Intel,
set for complex
Processors legacy systems instructions AMD)
tasks

8085 Microprocessor
The Intel 8085 microprocessor is an 8-bit microprocessor that was introduced in 1976. It is
part of the 8-bit microprocessor family and is widely used in various applications.

8085 is pronounced as "eighty-eighty-five" microprocessor. It is an 8-bit microprocessor

designed by Intel in 1977 using NMOS technology.

It has the following configuration −

- 8-bit data bus
- 16-bit address bus, which can address upto 64KB
- A 16-bit program counter
- A 16-bit stack pointer
- Six 8-bit registers arranged in pairs: BC, DE, HL
- Requires +5V supply to operate at 3.2 MHZ single phase clock

It is used in washing machines, microwave ovens, mobile phones, etc.

Here's an overview of its architecture:

1. Arithmetic and Logic Unit (ALU):

- Performs arithmetic and logic operations on data in registers.
- Supports operations like addition, subtraction, logical AND/OR/XOR, etc.

2. Data Bus and Address Bus:

- 8085 has an 8-bit data bus and a 16-bit address bus.
- The data bus is used to transfer data between the microprocessor and external devices.
- The address bus provides the memory addresses for read and write operation s.

3. Registers:
- Accumulator (A): A general-purpose register used for arithmetic and logic operations.
- Six General-Purpose Registers (B, C, D, E, H, L): Used for various data manipulation tasks.
- Stack Pointer (SP): Points to the current location in the stack.
- Program Counter (PC): Holds the address of the next instruction to be executed.

4. Flags:
- Carry Flag (CY): Set if a carry occurs during arithmetic operations.
- Zero Flag (Z): Set tab if the result of an operation is zero.
- Sign Flag (S): Set if the result of an operation is negative.
- Parity Flag (P): Set if the result has even parity (even number of 1s).
- Auxiliary Carry Flag (AC): Used for carry/borrow operations on lower nibble.

5. Instruction Set:
- 8085 has around 74 instructions, including data transfer, arithmetic, logic, branching, and I/O
instructions.
- Instructions can be categorized as data transfer, arithmetic, logical, branching, and I/O
operations.

6. Memory:
- The 8085 can address up to 64KB of memory.
- It uses memory-mapped I/O for interfacing with peripheral devices.

7. Timing and Control:

- The 8085 requires a clock signal for operation.
- Control signals include RD (Read), WR (Write), ALE (Address Latch Enable), and others.

8. Interrupts:
- Supports five hardware interrupts: RST 7.5, RST 6.5, RST 5.5, TRAP, and INTR.
- Interrupts can be enabled or disabled using control flags.

9. Power Supply and Ground:

- Requires a +5V power supply and ground connection for operation.

The 8085 microprocessor's architecture is characterized by its 8-bit data bus, 16-bit address
bus, and a set of registers and flags that facilitate various arithmetic, logic, and control
operations. It played a significant role in the early days of microprocessors and was widely used
in many applications, including embedded systems, industrial automation, and educational
purposes.

Pin Diagram & Grouping of 8085

- ## Pin Grouping:

Serial I/O Ports:

Pin Function Type Usage Example

For serial communication,

Serial Input Used for serial data input microprocessor uses this pin to
5 NA
Data (SID) into the microprocessor. receive incoming serial data bit by
bit.

Used for serial data

Serial Output Used to send out data bit by bit
6 NA output from the
Data (SOD) during serial transmission.
microprocessor.
Externally Initialized Signals:
Pin Function Type Usage Example
External device pulls TRAP pin
Active Initiates non-maskable
6 TRAP high to trigger a critical event
High interrupt (NMI) called a trap.
interrupt.

Active Initiates predefined restart RST 7.5 pin pulled high triggers
7 RST 7.5
High operation. a specific restart operation.

Active Initiates predefined restart RST 6.5 pin pulled high triggers
8 RST 6.5
High operation. a specific restart operation.

Active Initiates predefined restart RST 5.5 pin pulled high triggers
9 RST 5.5
High operation. a specific restart operation.

Active Requests interrupt from External device pulls INTR pin

10 INTR
High external device. high to request interrupt.

Request control of system bus External device requests

Active
39 HOLD temporarily, allowing external control of the system bus by
High
device access pulling the HOLD pin high.

Active Indicates external READY pin pulled high signals

35 READY
High memory/devices are ready. readiness for data transfer.

RESET Active RESET IN pin pulled high

36 Initiates external reset.
IN High resets the microprocessor.

External Signal Acknowledgement:

Pin Function Type Usage Example

Acknowledges interrupt INTA pin pulled low

INTA (Interrupt Active
11 request from external confirms interrupt
Acknowledge) Low
device. acceptance.

Acknowledges Hold HLDA pin indicates

HLDA (Hold Active
36 request from external acknowledgment of Hold
Acknowledge) High
device. request.

Control and Status Signals:

Pin Function Type Usage Example

ALE pin high signals

ALE (Address Active Indicates valid address
30 external devices to latch
Latch Enable) High during machine cycles.
address.

Status flag for operation S-0 pin's logic level

29 S-0 NA
type. indicates operation type.

Status flag for operation S-1 pin's logic level

33 S-1 NA
type. indicates operation type.

Differentiates memory and IO/M pin helps identify

34 IO/M NA
I/O operations. operation type.

RD (Read Active Initiates memory or I/O RD pin pulled low during

32
Control) Low read operation. read operation.

WR (Write Active Initiates memory or I/O WR pin pulled low during

31
Control) Low write operation. write operation.

Multiplexed Address/Data Bus (AD0 to AD7):

Pin Function Type Usage Example

Carries low-order Carries address information

12- Address
Bidirectional address bits during during memory read
19 Bus
operations. operation.

High-Order Address Bus (A8 to A15):

Pin Function Type Usage Example

Carries high-order Combined with lower-order

21- High-Order
Bidirectional address bits during bits for complete memory
28 Address Bus
operations. address.

Crystal Inputs (X1 and X2):

Pin Function Type Usage Example

X1 (Crystal Connects external crystal Crystal oscillator connected to

1 NA
Input) oscillator for main clock. X1 pin provides clock signal.

X2 (Crystal Output of external crystal Completes the crystal oscillator

2 NA
Output) oscillator circuit. circuit.
Feel free to use these tables to organize and reference the information in your notes!

Architecture of 8085
Units of 8085
Processing Unit:

Accumulator: The accumulator is the primary register for arithmetic and logical
operations. It holds one of the operands, and the result of operations is usually stored back
in the accumulator.
Flag Register: The flag register holds status flags that indicate various conditions resulting
from arithmetic and logic operations. These flags include Sign, Zero, Auxiliary Carry, Parity,
and Carry, and they help in making decisions based on the outcome of operations.

Arithmetic Logic Unit (ALU): The ALU performs arithmetic and logical operations, such
as addition, subtraction, AND, OR, XOR, etc. It computes results based on inputs from
registers and provides the output to the accumulator and flag register.
Clock Generator: The clock generator produces the clock signal that synchronizes the
microprocessor's operations. It defines the timing and frequency at which instructions and
operations occur.

Storage and Interface Unit:

General-Purpose Registers (B, C, D, E, H, L): These registers are used for temporary
data storage and manipulation. They play a vital role in data transfer and arithmetic
operations. Two eight bit registers can be combined for handling 16-bit data and
Combination of two 8-bit registers is known as pair. Valid register pairs are B-C, D-E, H-L.
Temporary Register Pair (HL): The HL register pair serves as a temporary storage
location for data during calculations and operations. It's often used to hold memory
addresses.
Stack Pointer : The stack pointer (SP) is a 16-bit register that is used to keep track of the
memory location of the current top of the stack. When data is pushed onto the stack, the
SP is decremented to point to the next available memory location. When data is popped
from the stack, the SP is incremented.
Program Counter : It is a 16-bit register which holds the address of the instructions.
Initially it indicates towards the starting address of the program but after the first instruction
is fetched the program counter automatically gets incremented by one and points towards
the next instruction.
Increment / Decrement Address Latch : It is another 16-bit internal register latch in
register section for internal operations and is not accessible to the user , used for holding
memory addresses before they are incremented or decremented during various memory
operations. It selects an address to be sent out from the program counter, from the stack
pointer, or from one of the 16-bit register pairs. It latches this address onto the address
lines for the required time.
 Multiplexed Address/Data Bus (AD0 to AD7): Address/Data Bus Buffer (AD0 to AD7) is a
8-bit bidirectional buffer. These pins carry the low-order address bits during memory and
I/O operations. They specify the memory location or I/O device being accessed.
Data Buffer: The data buffer is connected to the multiplexed address/data bus lines (AD0-
AD7). It serves to stabilize and buffer the data lines as they are used for both address and
data during different phases of the machine cycle. This buffer ensures that the data signals
on the multiplexed bus (AD0-AD7) are strong and stable for proper data communication.
High-Order Address Bus (A8 to A15): Address Bus buffer( A8 to A15) is a 8-bit
unidirectional buffer. These pins carry the high-order address bits during memory and I/O
operations. They, along with the lower-order bits, specify the complete address.
Address Buffer: The address buffer is connected to the high-order address bus lines (A8-
A15). It helps stabilize and buffer these high-order address lines before they are sent out to
external memory or I/O devices. This buffer ensures that the most significant bits of the
address (A8-A15) are sent out accurately and reliably.
IO/M Pin: Along with the S-0 and S-1 pins, IO/M pin differentiates between memory and
I/O operations. It helps the microprocessor identify the type of operation it's performing.
RD (Read Control) and WR (Write Control) Pins: These pins control data flow during
read and write operations. RD initiates a read operation, and WR initiates a write operation.

Instruction Unit:

Instruction Register (IR): Holds the current instruction being executed. It is fetched from
memory and decoded to determine the operation to be performed. The first word of an
instruction is the operation code, i.e., binary code for that instruction. In the first machine
cycle of any instruction μ𝑝 fetches the instruction from the memory. The op-code
representing the instruction to be executed is fetched from the (program) memory location
pointed to by (PC) and loaded into the instruction register (IR). The IR passes this op-code
to the instruction decoder
Instruction Decoder: Interprets the opcode from the instruction and generates control
signals to coordinate microoperations. It directs the microprocessor to execute the
appropriate operation. The instruction decoder tells the control unit the type of instruction to
be executed; the number of machine cycles necessary to execute the instruction etc
Timing and Control Unit: Timing and control unit is a very important unit as it
synchronizes the registers and flow of data through various registers and other units. It
provides timing & control signals necessary to all the operations in the microcomputer. It
consists of an oscillator and controller sequencer which sends control signals, controlling,
the flow of data between the microprocessor and peripherals. The oscillator generates two-
 phase clock signals which aids in synchronizing all the registers of 8085 microprocessor.

Addressing Modes of 8085: Different addressing modes (immediate, direct, indirect, etc.)
determine how operands are specified for instructions. They enhance the flexibility and
capabilities of the microprocessor.
Instruction Set: The instruction set defines the set of instructions that the microprocessor
can execute. It includes data manipulation, control flow, and I/O instructions.
Memory: Stores program instructions and data for the microprocessor to execute.
Control Signals: Various control signals coordinate microoperations, ensuring proper
execution of instructions and synchronization with external devices.

Interrupt and Serial I/O Control Section:

The Interrupt and Serial I/O Control Section of the 8085 microprocessor is responsible for
managing interrupt requests and enabling serial communication with external devices.

Serial I/O Ports (SID, SOD): The microprocessor features Serial Input (SID) and Serial
Output (SOD) pins, which allow it to engage in serial communication with external devices.
SID is used for receiving serial input data, while SOD is responsible for transmitting serial
data. These ports enable seamless communication with peripherals like serially interfaced
displays or communication modules.
Externally Initialized Signals: The microprocessor provides mechanisms for external
devices to initiate interrupts and communication with the microprocessor.
TRAP: The TRAP signal serves as a means to initiate a non-maskable interrupt, often
used for critical events that require immediate attention.
RST Pins: The RST pins, including RST 5.5, RST 6.5, and RST 7.5, allow external
devices to trigger predefined restart operations. These pins can automatically initiate
restart sequences when activated.
 INTR: The INTR (Interrupt Request) signal is used to request an interrupt from
external devices. When an external device requests an interrupt, the microprocessor
can respond accordingly by executing an interrupt service routine.
READY: The READY signal is an essential part of the microprocessor's interaction
with external memory or devices. It indicates whether external components are ready
for data transfer, ensuring proper synchronization during memory and I/O operations.
RESET IN: The RESET IN signal provides a way for external components to trigger a
reset of the microprocessor. When activated, it initiates a reset sequence, allowing for
a synchronized system-wide reset.
External Signal Acknowledgement: To maintain synchronization and coordination
between the microprocessor and external devices, the 8085 microprocessor employs two
acknowledgment signals:
INTA (Interrupt Acknowledge): INTA is used to acknowledge interrupt requests from
external devices. When an interrupt request is received and acknowledged via INTA,
the microprocessor can proceed to execute the corresponding interrupt service
routine.
HLDA (Hold Acknowledge): HLDA acknowledges hold requests from external
devices. When a hold request is acknowledged through HLDA, it signifies that the
microprocessor has temporarily paused its current execution to attend to the
requesting device's needs.
RESET OUT: The microprocessor generates a RESET OUT signal, which can be used to
initiate resets in other devices within the system. This ensures a synchronized system-wide
reset when necessary.
CLK OUT: The CLK OUT signal provides a clock output that can be utilized to synchronize
other components within the system. It carries the same frequency as the microprocessor's
operating clock, making it a valuable resource for coordinating various system elements.

With this integration, we have included the information about the Interrupt and Serial I/O Control
Section within the existing structure of the 8085 microprocessor architecture. This
comprehensive overview covers its capabilities for handling interrupts and serial communication
with external devices.

Bus Organization
The bus organization in the 8085 microprocessor is a crucial aspect that facilitates
communication between various components and peripherals within the system. The 8085
employs a system bus that consists of three main types of buses: the address bus, the data
bus, and the control bus. These buses work together to enable data transfer, address selection,
and control signals throughout the microprocessor and its connected devices.
Address Bus:
The address bus is a unidirectional group of 16 lines, allowing bits to flow in one direction
from the microprocessor to peripheral devices.
In the 8085 microprocessor, the address bus plays a crucial role in memory addressing.
The 8085 microprocessor, with its 16 address lines, can address 216 = 65,536 (64K)
memory locations.
It consists of two sets of lines:
Higher Order Address Bus (A8 - A15): These lines (pins 21 to 28) are unidirectional
and carry the high-order 8 bits of the memory address.
Lower Order Address Bus (AD0 - AD7): These lines (pins 12 to 19) are multiplexed
with the 8 data bits (D0 - D7) and serve as both the lower order address bus and data
bus (A0 - A7 and D0 - D7) during different phases of instruction execution.
During the execution of instructions, the lower order address bus lines (AD0 - AD7) carry
the address bits in the early part, while in the late parts of the execution, they function as
the 8 data bus lines.

Data Bus:
To incorporate the new data into the existing information about the data bus, we can update the
old data with the new information as follows:

Data Bus:

Description: The data bus is a bidirectional bus responsible for carrying data in binary
form between the microprocessor and peripheral devices as well as memory.
Size: It is a group of bidirectional 8 bits , known as D0 to D7 (pins 22 to 29), allowing the
transfer of 8 bits of data during read and write operations.
Multiplexing: The data bus is time multiplexed with the lower-order address bus,
specifically AD0 to AD7. This means that these lines serve a dual purpose: during the early
part of the instruction execution, they carry address bits, and during the late part of
execution, they carry 8 bits of data.
Function: The data bus plays a crucial role in facilitating data transfer between the
microprocessor and external memory or I/O devices. It enables read operations, where
data flows from memory or devices to the microprocessor, as well as write operations,
where data flows from the microprocessor to memory or devices.

Control Bus:
Description: The control bus is a combination of various individual lines, each carrying specific
control signals.
Control Signals: These lines transmit essential control signals that coordinate the
microprocessor's operations and facilitate communication with external devices.
These signals include:

RD (Read Control) and WR (Write Control): These signals indicate whether the
microprocessor is performing a read or write operation. They control the flow of data
between the microprocessor and memory or I/O devices.
IO/M (Input/Output or Memory): This signal differentiates between memory and I/O
operations. It determines whether the microprocessor is accessing memory or an I/O
device.
ALE (Address Latch Enable): This signal indicates that valid address information is
present on the address bus. It is used to latch the low-order address bits in external
devices.
S0 and S1: These signals, in conjunction with the IO/M signal, identify the type of
operation being performed (memory read/write or I/O read/write).
INTA (Interrupt Acknowledge) and HLDA (Hold Acknowledge): These signals are used
to acknowledge interrupts and hold requests from external devices.

The control bus signals synchronize and regulate the flow of data and instructions within the
microprocessor and its interaction with external components.

Overall, the bus organization in the 8085 microprocessor is designed to provide a systematic
and efficient means of communication between the microprocessor, memory, I/O devices, and
other peripherals. The combination of the address, data, and control buses ensures the proper
execution of instructions and data transfer operations.

Registers
A register is a small, fast storage location within a computer's central processing unit (CPU) or
microprocessor. It's designed to hold data temporarily during the execution of instructions or
calculations. Registers play a fundamental role in computer architecture and digital circuit
design, enabling efficient data manipulation and control within the processor.

Accumulator (A):
Capacity: 8 bits
Function: Principal register for arithmetic and logical operations
Usage: Holds data during operations and stores results
Practical Application: Arithmetic operations like addition and subtraction
Example: ADD A, B adds the contents of B to the accumulator A
Related Pins: Data Bus, Accumulator (A) Pin
General-Purpose Registers (B, C, D, E, H, L):
Capacity: 8 bits each
Function: Transient data storage and manipulation
Usage: Store operands, intermediate results, and temporary data
Practical Application: Data transfers, calculations, and comparisons
Example: MOV A, B moves data from B to the accumulator A
Related Pins: Data Bus, General-Purpose Registers (B, C, D, E, H, L) Pins

Program Counter (PC):

Capacity: 16 bits
Function: Holds memory address of the next instruction
Usage: Automatically incremented to point to the next instruction
Practical Application: Control flow during instruction execution
Example: JMP 3000h transfers control to memory location 3000h
Related Pins: Address Bus, Program Counter (PC) Pins

Stack Pointer (SP):

Capacity: 16 bits
Function: Manages stack for temporary data storage
Usage: Tracks the top of the stack during subroutine calls and interrupts
Practical Application: Storing return addresses during function calls
Example: CALL instruction saves return address on the stack
Related Pins: Address Bus, Stack Pointer (SP) Pins

Flag Register (F):

Capacity: 5 bits (individual flags)
Function: Contains status flags for arithmetic and logic operations
Usage: Flags indicate results of operations for decision-making
Practical Application: Conditional jumps based on flags
Example: JZ (Jump if Zero) based on the Zero flag
Related Pins: ALU Flags, Control Signals

Temporary Register (TMP or W):

Capacity: 8 bits
 Function: Temporary storage for intermediate data
Usage: Holds results temporarily during multi-step operations
Practical Application: Multiply and divide instructions
Example: MUL B uses W for low-order byte of result
Related Pins: Data Bus, Temporary Register (TMP or W) Pin

Memory Address Register (MAR):

Capacity: 16 bits
Function: Holds memory or I/O addresses
Usage: Specifies addresses for memory or I/O operations
Practical Application: Loading/storing data in specific memory locations
Example: STA 2000h stores accumulator content at memory location 2000h
Related Pins: Address Bus, Memory Address Register (MAR) Pin

Memory Buffer Register (MBR):

Capacity: 8 bits
Function: Temporary storage for fetched/written data
Usage: Holds data before transferring to other registers or memory
Practical Application: Data transfer between memory and registers
Example: MOV B, M moves data from memory to register B
Related Pins: Data Bus, Memory Buffer Register (MBR) Pin

Instruction Control Register:

Capacity: 8 bits
Function: Holds current instruction being executed
Usage: Decodes instructions and retrieves opcodes/operands
Practical Application: Fetch-decode-execute cycle
Example: CPI 20h (Compare Immediate) compares accumulator with immediate value 20h
Related Pins: Data Bus, Instruction Register (IR) Pin

Interrupt Control Register (INTERRUPT) :

Capacity: 8 bits (interrupt control flags)
Function: Controls interrupt enable/disable
Usage: Manage interrupt processing
Practical Application: Enabling/disabling interrupts
 Example: SIM (Set Interrupt Mask) instruction enables maskable interrupts
Related Pins: Control Signals, Interrupt Control Register (INTERRUPT) Pin

ALU
The Arithmetic and Logic Unit (ALU) is a critical component of the Intel 8085 microprocessor.
It's responsible for performing arithmetic operations (addition, subtraction, multiplication,
division), logical operations (AND, OR, XOR, NOT), and various comparison operations. The
ALU operates on binary data and is a key part of the microprocessor's ability to process
instructions and manipulate data.
Here's an overview of the ALU in the Intel 8085 microprocessor:

Functionality: The ALU is designed to execute arithmetic and logical operations on binary
data. It performs calculations based on the instructions fetched from memory and the data
stored in registers.
Operations: The ALU can perform various arithmetic operations like addition and
subtraction, as well as logical operations like AND, OR, XOR, and NOT. These operations
are essential for data manipulation and decision-making.
Data Width: The ALU in the Intel 8085 is 8 bits wide, which means it operates on 8-bit
binary data. This aligns with the microprocessor's architecture, where most registers and
data paths are 8 bits wide.
Flags: The ALU affects the status flags in the Flags Register (F) of the 8085
microprocessor. For instance, after an addition operation, the Carry (CY) flag might be set
if the result generates a carry. Similarly, the Zero (Z) flag is set if the result is zero.
Control Signals: The ALU operation is controlled by various control signals generated by
the microprocessor's control unit. These signals determine which operation is performed
and how the result is stored.
Conditional Jumps: The result of ALU operations often determines whether the
microprocessor takes conditional jumps in the program. For example, the microprocessor
might jump to a different memory location if the result of a comparison is zero.
Integration: The ALU is tightly integrated with the rest of the microprocessor's
components, including registers, data buses, and control signals. This integration allows for
seamless data flow and efficient processing.

In summary, the ALU is the "computational heart" of the Intel 8085 microprocessor. It performs
mathematical calculations, logical operations, and comparisons necessary for data
manipulation and decision-making, thus enabling the microprocessor to execute a wide range
of instructions and perform complex tasks.

Control section
The control section of the Intel 8085 microprocessor is responsible for coordinating and
managing the execution of instructions, data flow, and various control signals within the
microprocessor. It includes various components that generate and decode control signals
to ensure that the microprocessor operates smoothly and efficiently. Here's an overview of
the control section:
Clock Generator: The control section includes a clock generator that generates the clock
signals required to synchronize the operations of the microprocessor. These clock signals
ensure that instructions and data are processed at the correct timing intervals.
Control Signals: The control section generates a variety of control signals that manage
different aspects of the microprocessor's operation. These signals include:
RD (Read): Indicates that a read operation is being performed, and data is being
fetched from memory or an I/O device.
WR (Write): Indicates that a write operation is being performed, and data is being
written to memory or an I/O device.
ALE (Address Latch Enable): Activates the Address Latch to latch the lower-order
address bits during the first clock cycle of an instruction fetch or memory write
operation.
IO/M (Input/Output or Memory): Differentiates between input/output and memory
operations.
S0 and S1: These signals, along with IO/M, define the machine cycle being executed
(e.g., memory read, memory write, I/O read, I/O write).
HLT (Halt): Halts the microprocessor's operation, causing it to stop executing
instructions until reset.
INTR (Interrupt Request): Indicates that an interrupt is being requested from an
external device.
INTA (Interrupt Acknowledge): Acknowledges an interrupt request from an external
device before proceeding with interrupt handling.
RESET IN (Reset Input): Resets the microprocessor when activated externally.
RESET OUT (Reset Output): Generates a reset signal to reset other devices or
peripherals.
READY: Indicates that the microprocessor is ready to execute the next instruction or
perform the next operation.
Hold and HLDA (Hold Acknowledge): Allow an external device to request control of
the system bus temporarily.
CLK OUT (Clock Output): Provides a clock output signal that can be used to
synchronize external devices.
Instruction Decoder: The control section includes circuitry to decode the fetched
instruction. It decodes the opcode and generates control signals that dictate the
microprocessor's behavior during the execution of the instruction.
 Flag Control: Some control signals are related to the Flags Register (F) and the
status flags it holds. These flags indicate conditions resulting from arithmetic and
logical operations, affecting the execution flow of the program.
Interrupt Control: The control section manages interrupt-related operations, including
enabling and disabling interrupts and handling the prioritization of different types of
interrupts.
Data and Address Control: The control section coordinates the flow of data and
addresses between different registers, the ALU, and memory/IO devices.

In summary, the control section of the Intel 8085 microprocessor is a complex circuitry that
generates and manages control signals to orchestrate the microprocessor's operations. It
ensures proper synchronization, data flow, and execution of instructions, making the
microprocessor capable of performing a wide range of tasks and operations.
Flags_8085

Microprocessor

Arithmetic and Logic Unit

Registers

Control Section

Input/Output Memory

External Components

Keyboard Display

Instruction set of 8085

The Intel 8085 microprocessor has a diverse and comprehensive instruction set that
enables it to perform a wide range of operations. These instructions cover various data
manipulation, arithmetic, logical, branching, and I/O operations. Here's an overview of the
instruction set categories and some representative instructions:
Data Transfer Instructions:
MOV : Move data from one register/memory location to another.
MVI : Move immediate data to a register/memory location.
LDA : Load accumulator with data from a memory location.
STA : Store accumulator content into a memory location.
LHLD : Load H and L registers with data from a memory location.
SHLD : Store content of H and L registers into a memory location.
Arithmetic Instructions:
ADD : Add data from a register/memory to the accumulator.
ADI : Add immediate data to the accumulator.
SUB : Subtract data from a register/memory from the accumulator.
SUI : Subtract immediate data from the accumulator.
INR : Increment a register/memory location.
DCR : Decrement a register/memory location.
DAD : Add contents of H-L pair with another H-L pair.
Logical Instructions:
ANA : Perform logical AND operation with a register/memory.
ANI : Perform logical AND operation with immediate data.
XRA : Perform logical XOR operation with a register/memory.
XRI : Perform logical XOR operation with immediate data.
ORA : Perform logical OR operation with a register/memory.
ORI : Perform logical OR operation with immediate data.
CMA : Complement accumulator (bitwise NOT).
Branching Instructions:
CALL : Call a subroutine at a specified memory location.
RET : Return from a subroutine.
JMP : Jump unconditionally to a specified memory location.
JZ , JNZ , JC , JNC , JM , JP , JPE , JPO : Conditional jump instructions based on various
flags.
Stack and I/O Instructions:
PUSH : Push data onto the stack.
POP : Pop data from the stack.
XTHL : Exchange stack top with H-L pair.
IN : Input data from an I/O port.
OUT : Output data to an I/O port.
 HLT : Halt the microprocessor.
Data Conversion and Bit Manipulation:
CPI : Compare accumulator with immediate data.
CMC : Complement carry flag.
STC : Set carry flag.
RAL , RAR , RALC , RARC , RAL , RAR : Rotate instructions.

Instruction format
The instruction format of the Intel 8085 microprocessor specifies how machine instructions
are structured and encoded. Each instruction consists of various fields that convey
information about the operation to be performed, the operands involved, and additional
details. The instruction format is crucial for the proper execution of programs. Here's a
breakdown of the instruction format for the 8085:

| Opcode | Operand(s) |
|----------|--------------|

Opcode: The opcode field contains the operation code, which represents the specific
operation to be executed. The opcode defines the type of instruction, such as data transfer,
arithmetic operation, branching, etc.
Operand(s): The operand field holds the data or memory addresses required for the
instruction. Depending on the instruction, there might be zero, one, or two operands.
Operands can be registers, memory addresses, immediate data, or addresses for
branching instructions.

The exact structure of the operand field can vary based on the instruction. For example, some
instructions use a single-byte immediate value as an operand, while others might use a two-
byte memory address or register pair.

Here are a few examples of instructions with their corresponding formats:

Instruction Description Opcode Operands

MOV A, B Copy content of B to A MOV A, B

ADD M Add memory data to accumulator ADD M (HL)

JNZ 2050H Jump if Zero flag not set JNZ 2050H

MVI C, 30H Move immediate value to C MVI C, 30H

This table provides a clear overview of the instructions, their purposes, opcodes, and operands.
The instruction format provides a standardized way for the microprocessor to decode and
execute instructions correctly. It allows programmers to write assembly code that the
microprocessor can interpret and execute according to the specified operation codes and
operands.

Addressing modes
Addressing modes in microprocessors define how operands are specified in instructions. They
determine how the microprocessor accesses data or addresses in memory or registers. The
Intel 8085 microprocessor supports various addressing modes, which influence the structure of
instructions and how they operate. Here are some common addressing modes and types of
instructions in the 8085:

Addressing Modes:
1. Implied/Implicit Addressing Mode:

Description: No explicit operand is specified in the instruction. It operates on implied

operands, often registers or flags.
Example: HLT instruction halts the microprocessor.
Usage: Used for control instructions and special-purpose operations.

2. Immediate Addressing Mode:

Description: The actual data is part of the instruction itself.

Example: MVI B, 05H moves immediate value 05H into register B.
Usage: Useful for loading constants and initializing variables.

3. Direct Addressing Mode:

Description: The memory address is specified directly in the instruction.

Example: LDA 2000H loads accumulator with data from memory address 2000H.
Usage: Common for reading/writing specific memory locations.

4. Register Addressing Mode:

Description: One or more registers are specified as operands.

Example: ADD A, B adds contents of register B to accumulator.
Usage: Used for arithmetic and logical operations between registers.

5. Register Indirect Addressing Mode:

 Description: A register (usually HL) contains the address of the data to access.
Example: MOV A, M copies data from memory location pointed to by HL into register A.
Usage: Useful for accessing data at addresses pointed to by registers.

Types of Instructions:
1. Data Transfer Instructions:
These instructions move data between registers, memory, and I/O ports.
Examples: MOV , MVI , LDA , STA , IN , OUT .
2. Arithmetic Instructions:
These instructions perform arithmetic operations on data.
Examples: ADD , SUB , ADI , SUI , INR , DCR , DAD .
3. Logical Instructions:
These instructions perform logical operations (AND, OR, XOR) on data.
Examples: ANA , XRA , ORA , ANI , XRI , ORI .
4. Control Transfer Instructions:
These instructions control the flow of the program by changing the sequence of
execution.
Examples: JMP , CALL , RET , JZ , JNZ , JC , JNC .
5. Stack Instructions:
These instructions manipulate the stack (push, pop) and control subroutine calls.
Examples: PUSH , POP , CALL , RET .
6. Rotate Instructions:
These instructions perform bitwise rotation operations on data.
Examples: RAL , RAR , RLC , RRC .
7. Halt and NOP Instructions:
HLT instruction halts the microprocessor.
NOP instruction performs no operation (no effect).

Instruction Cycle
1. Fetch:
During this phase, the microprocessor fetches the next instruction from memory. The program
counter (PC) holds the address of the next instruction to be executed. The content of the
memory location pointed to by the PC is loaded into the instruction register (IR), and the PC is
incremented to point to the next instruction.
 The Program Counter is used to fetch the instruction from memory as it contains the
memory address of initial instruction , and the instructions are loaded into the Instruction
Register

2. Decode:
In this phase, the microprocessor interprets the opcode (operation code) stored in the
instruction register. The opcode determines which operation is to be performed. It also
determines the addressing mode and the number of operands needed for the instruction.

In this phase, the microprocessor examines the opcode (operation code) from the
instruction in the IR, its the opcode that determines the operation performed.
The addressing mode specified by the opcode dictates how the operands are to be located
:
Immediate Addressing Mode:
In this mode the operand is part of the instruction itself, a constant value directly
embedded within the instruction, meaning no need to fetch data from registers or
memory
Example: ADD A, #42 the #42 is the immediate operand.
Register Addressing Mode:
In this mode the operand is found in one of microprocessor's registers ,with instruction
specifying the source and destination registers for the operation, this mode is typically
fast because the data is readily available in the specified registers.
Example: ADD A, B the operand lies in register B and the result is stored in the A
register
Direct Addressing Mode:
In the direct addressing mode, the operand's memory address is directly specified in
the instruction, the microprocessor retrieves the data from the specified memory
address, if operand is at a different memory address, you would specify that address
in the instruction .
Indirect Addressing Mode:
In the indirect addressing mode, the instruction specifies a memory address that points
to the actual location of the operand, microprocessor first fetches the memory address
from the specified location and then retrieves the operand from that address. If the
operand is at a different memory address, you would need to load that address into
the specified register before using it in an indirect addressing instruction.
Example LDA (HL) , the HL register contains a memory address, and the
microprocessor fetches the data from the memory address pointed to by HL .

3. Execute:
Once the instruction is decoded, the microprocessor performs the actual operation specified by
the opcode. This may involve reading data from registers or memory, performing arithmetic or
logical operations, and storing the result back in registers or memory.

In this mode, the microprocessor performs the operation specified by the opcode.
If the operands are in registers, the operation is directly performed on the values in those
registers.
If the operands are in memory, the microprocessor may have to fetch them from memory
first. The operands are not moved elsewhere; they are temporarily placed in registers or
the ALU for the operation.
The result is stored in accumulator

4.Memory Read/Write (if necessary):

Some instructions require reading or writing data to or from memory. During this phase, the
microprocessor may access memory to fetch operands or store results.

This phase involves accessing memory, but the memory access mainly occurs when
operands are in memory and need to be fetched. It's not a separate phase for every
instruction.

5.Write Back (if necessary):

After the execution phase, the microprocessor may need to write the result back to a register or
memory location, depending on the instruction's requirements.

6.Increment PC:
Finally, the program counter is incremented to point to the next instruction in memory, preparing
for the next cycle.

It's important to note that not all instructions go through all of these phases in the same way.
The number of machine cycles and clock cycles required for each instruction can vary,
depending on the complexity of the instruction and the addressing mode used.

The Intel 8085 is a relatively simple microprocessor compared to modern processors, and it
executes one inscdsftruction per instruction cycle. More complex processors have pipelines and
multiple stages to execute instructions in parallel, but the 8085 follows a more straightforward
fetch-decode-execute model.

Block Diagram
 PC

Memory Address Increment

Memory_Address New_PC

Instruction Increment

Instruction

IR

IR

Opcode

Opcode

Operation Addressing Mode

Operation Addressing_Mode

ALU Operand Locations

ALU Operand_Locations

Registers/Memory Result Memory

Registers_Memory Result Memory

Registers/Memory

Registers_Memory_Write

Endianness
Endianness is a concept in computer architecture that defines the order in which bytes (or,
more precisely, octets) of a multi-byte data value are stored in memory or transmitted over a
network. It determines whether the most significant byte (MSB) or the least significant byte
(LSB) of a multi-byte data value comes first. There are two primary endian formats: Big-Endian
and Little-Endian.

1. Big-Endian (BE):

In Big-Endian format, the most significant byte (MSB) is stored at the lowest memory
address, and subsequent bytes follow in increasing memory addresses.
The MSB is placed first in memory, and the LSB is placed last.
This format is similar to how humans write numbers, with the most significant digit
(leftmost) written first.

Example (32-bit value):

Value: 0A0B0C0D
Memory Representation (Big-Endian):
Address a: 0A
Address (a+1): 0B
Address (a+2:) 0C
Address (a+3:) 0D
2. Little-Endian (LE):

In Little-Endian format, the least significant byte (LSB) is stored at the lowest memory
address, and subsequent bytes follow in increasing memory addresses.
The LSB is placed first in memory, and the MSB is placed last.
This format is opposite to how humans write numbers, with the least significant digit
(rightmost) written first.

Example (32-bit value):

Value: 0A0B0C0D
Memory Representation (Little-Endian):
- Address a: 0D
- Address (a+1): 0C
- Address (a+2:) 0B
 - Address (a+3:) 0A

Endianness matters when data is read or written by systems with different endianness. It can
lead to byte order issues and data interpretation errors. Here are some key considerations:

Data Transmission: When data is transmitted between systems with different endianness,
it must be converted to the appropriate byte order to ensure correct interpretation.
Data Storage: The endianness of a computer's architecture affects how data is stored in
memory. It's essential for reading and writing binary files or when sharing data between
systems.
Network Communication: In network protocols, there are conventions for specifying
endianness to ensure consistent data representation across different platforms.
Processor Architecture: Different processor architectures (e.g., x86, ARM) may have
different endianness, which can affect how software is written and data is processed.
File Formats: Some file formats specify a particular endianness for their data to ensure
compatibility across systems.