Professional Documents
Culture Documents
STGF7H60DF, STGP7H60DF
Trench gate field-stop IGBT, H series
600 V, 7 A high speed
Datasheet - production data
TAB
Features
• High speed switching
3 • Tight parameters distribution
1
• Safe paralleling
D²PAK
• Low thermal resistance
TAB • Short-circuit rated
• Ultrafast soft recovery antiparallel diode
3 3
Applications
2 2
1
1
• Motor control
TO-220FP TO-220
• UPS, PFC
E (3)
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1 D²PAK package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.2 D²PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.3 TO-220FP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.4 TO-220 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
1 Electrical ratings
2 Electrical characteristics
Table 4. Static
Symbol Parameter Test conditions Min. Typ. Max. Unit
Collector-emitter
V(BR)CES breakdown voltage IC = 2 mA 600 V
(VGE = 0 V)
VGE = 15 V, IC = 7 A 1.5 1.95
VGE = 15 V, IC = 7 A
Collector-emitter saturation 1.6
VCE(sat) TJ = 125 °C V
voltage
VGE = 15 V, IC = 7 A
1.7
TJ = 175 °C
VGE(th) Gate threshold voltage VCE = VGE, IC = 250 µA 4.8 6.2 6.9 V
Collector cut-off current
ICES VCE = 600 V 25 µA
(VGE = 0 V)
Gate-emitter leakage
IGES VGE = ±20 V 250 nA
current (VCE = 0 V)
Table 5. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
IF = 7 A - 1.5 2.1
VF Forward on-voltage V
IF = 7 A, TJ = 175 °C 1.15
trr Reverse recovery time - 136 ns
VCC = 400 V; IF = 7 A;
Qrr Reverse recovery charge - 104 nC
diF/dt = 100 A/µs
Irrm Reverse recovery current - 2.25 A
trr Reverse recovery time - 154 ns
VCC = 400 V; IF = 7 A;
Qrr Reverse recovery charge diF/dt = 100 A/µs - 388 nC
TJ = 175 °C
Irrm Reverse recovery current - 4.6 A
7& & 7& &
Figure 4. Power dissipation vs. case Figure 5. Collector current vs. case temperature
temperature for TO-220FP for TO-220FP
3727 ,*%7+'))3'7 ,& ,*%7+'))&&7
: $ 9*(97-&
9*(97-&
7& & 7& &
Figure 6. Output characteristics (TJ = 25°C) Figure 7. Output characteristics (TJ = 175°C)
,& ,*%7+')32& ,& ,*%7+')32&
$ $
9*( 9 9 9*( 9 9
9 9
9
9
9
9
9&( 9 9&( 9
Figure 8. VCE(sat) vs. junction temperature Figure 9. VCE(sat) vs. collector current
9&( VDW ,*%7+')39&(7 9&( VDW ,*%7+')39&(&
9 9
9*( 9
9*( 9
,& $ 7- &
7- &
,& $
7- &
,& $
7- & ,& $
Figure 10. Collector current vs. switching Figure 11. Collector current vs. switching
frequency for D2PAK and TO-220 frequency for TO-220FP
,& ,*%7+')3&&6 ,& ,*%7+')))&&6
$ $
7& &
7& & 7& &
7& &
5HFWDQJXODUFXUUHQWVKDSH 5HFWDQJXODUFXUUHQWVKDSH
GXW\F\FOH 9&& 9 GXW\F\FOH 9&& 9
5* 9*( 97- & 5* 9*( 97- &
I N+] I N+]
Figure 12. Forward bias safe operating area for Figure 13. Forward bias safe operating area for
D2PAK and TO-220 TO-220FP
,& ,*%7+')3)62$ ,& ,*%7+')))62$
$ $
WS V
WS V
WS V
WS V WS V
WS PV
WS V
Figure 14. Transfer characteristics Figure 15. Diode VF vs. forward current
,& ,*%7+')37&+ 9) ,*%7+')3'9)
$ 9
9&( 9
7- &
7- &
7- &
7- &
7- &
9*( 9 ,) $
Figure 16. Normalized VGE(th) vs. junction Figure 17. Normalized V(BR)CES vs. junction
temperature temperature
9*( WK ,*%7(,19*( 9%5 &(6 ,*%7(,19%5
QRUP QRUP
,& ȝ$9&( 9*(
,& P$
7- & 7- &
Figure 18. Capacitance variation Figure 19. Gate charge vs. gate-emitter voltage
& ,*%7+')3&95 9*( ,*%7+')3*&*(
S) 9
9&& 9,& $,* P$
&,(6
I 0+] &2(6
&5(6
9&( 9 4J Q&
Figure 20. Switching loss vs. collector current Figure 21. Switching loss vs. gate resistance
( ,*%7+')36/& ( ,*%7+')36/*
P- 9&& 95* P- 9&& 9,& $
9*( 97- &
9*( 97- &
(21
(21 (2))
(2))
,& $ 5*
Figure 22. Switching loss vs. temperature Figure 23. Switching loss vs. collector-emitter
voltage
( ,*%7+')36/7 ( ,*%7+')36/9
P- 9&& 9,& $ P- ,& $5*
5* 9*( 9
9*( 97- &
(21
(21
(2))
(2))
7- & 9&( 9
Figure 24. Short circuit time and current vs. VGE Figure 25. Switching times vs. collector current
W ,*%7+')36&9 ,6& W ,*%7+')367&
V 9&&97-& $ QV
W6&
WG RII
WI
WG RQ
WU 9&& 99*( 9
5* 7- &
,6&
9*( 9 ,& $
Figure 26. Switching times vs. gate resistance Figure 27. Reverse recovery current vs. diode
current slope
W ,*%7+')3675 ,UUP ,*%7+')355&
QV 9&& 99*( 9 $ 9&& 99*( 9
,& $7- & ,) $7- &
WG RII
W
I
WG RQ
W
U
5* GLGW $V
Figure 28. Reverse recovery time vs. diode Figure 29. Reverse recovery charge vs. diode
current slope current slope
WUU ,*%7+')3557 4UU ,*%7+')3554
QV 9&& 99*( 9 & 9&& 99*( 9
,) $7- & ,) $7- &
GLGW $V GLGW $V
GLGW $V
=WK
=WK N
N5 5WKMF
WKM&
įį WWS SϨ
Ϩ
WSS
ϨϨ
WS V
į
į
=WK
=WKNN5 5WKMF
WKM&
įį WWSSϨ
Ϩ
į
WSS
į ϨϨ
į
6,1*/(38/6(
WS V
=WK
=WK
N
N5 5WKMF
WKM&
įį WWS SϨ
Ϩ
WSS
ϨϨ
WS V
WS V
3 Test circuits
Figure 35. Test circuit for inductive load Figure 36. Gate charge test circuit
switching
9&&
$ $ 9 Nȍ
& Nȍ
* / ) Q)
( %
%
& 9&&
) ) 9L9*0$; ,* &2167 ȍ '87
* '87
5* ( ) Nȍ 9*
Nȍ
3: Nȍ
Figure 37. Switching waveform Figure 38. Diode reverse recovery waveform
Ton
Tr(Ion)
Toff 9550
GYGW
AM01506v1
$0Y
4 Package information
A 4.40 4.60
A1 0.03 0.23
b 0.70 0.93
b2 1.14 1.70
c 0.45 0.60
c2 1.23 1.36
D 8.95 9.35
D1 7.50 7.75 8.00
D2 1.10 1.30 1.50
E 10 10.40
E1 8.50 8.70 8.90
E2 6.85 7.05 7.25
e 2.54
e1 4.88 5.28
H 15 15.85
J1 2.49 2.69
L 2.29 2.79
L1 1.27 1.40
L2 1.30 1.75
R 0.4
V2 0° 8°
)RRWSULQW
10 pitches cumulative
tolerance on tape +/- 0.2 mm
Top cover P0 D P2
T tape
E
F
K0 W
B0
A0 P1 D1
Bending radius
User direction of feed
AM08852v2
40mm min.
Access hole
At sl ot location
A N
AM08851v2
mm mm
Dim. Dim.
Min. Max. Min. Max.
7012510_Rev_K_B
A 4.4 4.6
B 2.5 2.7
D 2.5 2.75
E 0.45 0.7
F 0.75 1
F1 1.15 1.70
F2 1.15 1.70
G 4.95 5.2
G1 2.4 2.7
H 10 10.4
L2 16
L3 28.6 30.6
L4 9.8 10.6
L5 2.9 3.6
L6 15.9 16.4
L7 9 9.3
Dia 3 3.2
BW\SH$B5HYB7
A 4.40 4.60
b 0.61 0.88
b1 1.14 1.70
c 0.48 0.70
D 15.25 15.75
D1 1.27
E 10 10.40
e 2.40 2.70
e1 4.95 5.15
F 1.23 1.32
H1 6.20 6.60
J1 2.40 2.72
L 13 14
L1 3.50 3.93
L20 16.40
L30 28.90
∅P 3.75 3.85
Q 2.65 2.95
5 Revision history
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on
ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or
the design of Purchasers’ products.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.