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BANGLADESH UNIVERSITY OF

ENGINEERING AND TECHNOLOGY

Department of electrical anD electronic


engineering

Course No: EEE 208(S) Group No :2

Course Title: Electronics Circuits II Laboratory

Section: B2

Experiment No:2

Name of the Experiment: Study of the Characteristics and Application


of Operational Amplifier (Part B)

Name: Md Rakibul Hossain Rocky


Department: EEE
ID: 2006101
Partner’s ID:2006102
Course Teacher: Iftekharul Islam Emon
1.Inverting Amplifier

Schematic:

Figure 1: Inverting Amplifier

𝑹𝒇 = 𝟏𝒌Ω:
2.0V

1.0V

0V

-1.0V
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms 5.5ms 6.0ms
V(R2:2) V(V4:+)
Time

Figure 2: Rf=1kΩ

As the gain value is 1, and equationally output value is less than the
power supply voltage, we get undistorted output curve.
𝑹𝒇 = 𝟏𝟎𝒌Ω ∶

10V

5V

0V

-5V

-10V
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms 5.5ms 6.0ms
V(R2:2) V(V4:+)
Time

Figure 3:Rf=10kΩ

As the gain value is 1, and equationally output value is less than the
power supply voltage, we get undistorted output curve.

𝑹𝒇 = 𝟏𝟎𝟎𝒌Ω ∶
20V

10V

0V

-10V

-20V
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms 5.5ms 6.0ms
V(R2:2) V(V4:+)
Time

Figure 4:Rf=100kΩ

As the gain value is 100, and output value is more than the power supply
voltage, we get distorted output curve.
2.Inverting Summer

Schematic:

Figure 5: Inverting Summer

𝑹𝒇 = 𝟏𝒌Ω:

1.0V

0.5V

0V

-0.5V

-1.0V
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms 5.5ms 6.0ms
V(U1:OUT) V(V6:+) V(R2:1)
Time

Figure 6: Output voltage is shown in blue


3.Differential Amplifier

Schematic:

Figure 7: Differential Amplifier

Unsaturated Vo:
4.0V

2.0V

0V

-2.0V

-4.0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(U1:OUT) V(V4:+) V(V3:+)
Time

Figure 8: Unsaturated
Saturated Vo:
20V

10V

0V

-10V

-20V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(U1:OUT) V(V4:+) V(V3:+)
Time

Figure 8: Saturated

Subtracted Vo:

1.0V

0.5V

0V

-0.5V

-1.0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(U1:OUT) V(V4:+) V(V3:+)
Time

Figure 9: Subtracted
4.Inverting Integrator

Schematic:

Figure 10:Inverting integrator

Output for 𝑽𝒊 = 𝑽𝒔𝒊𝒏:


1.0V

0.5V

0V

-0.5V

-1.0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(V3:+) V(U1:OUT)
Time

Figure 11: Vsin integrator

𝟐𝑽𝒎
=. 𝟑𝟏
ѡ𝑹𝑪
Which can be seen from the graph.
Output for 𝑽𝒊 = 𝑽𝒓𝒆𝒄:
1.0V

0.5V

0V

-0.5V

-1.0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(R1:1) V(U1:OUT)
Time

Figure 12: Output for the rect signal

𝑽𝒎 𝟏
𝑺𝒍𝒐𝒑𝒆 = = = 𝟏𝟎𝟎𝟎𝑽/𝒔 Which can be seen from the graph.
𝑹𝑪 𝟏𝒌∗𝟏µ

Output for 𝑽𝒊 = 𝑽𝒕𝒓𝒊:

1.0V

0.5V

0V

-0.5V

-1.0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(R1:1) V(U1:OUT)
Time

Figure 13: Output for triangular signal


5.Inverting differentiator:

Schematic:

Figure 14: Inverting differentiator

Output for 𝑽𝒊 = 𝑽𝒕𝒓𝒊:

20V

10V

0V

-10V

-20V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(C1:1) V(U1:OUT)
Time

Figure 15:Output for Vi=Vtri


Output for 𝑽𝒊 = 𝑽𝒓𝒆𝒄:
15V

10V

5V

0V

-5V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(C1:1) V(U1:OUT)
Time

Figure 16: Output for Vi=rect

Output for 𝑽𝒊 = 𝑽𝒔𝒊𝒏:

5.0V

0V

-5.0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(C1:1) V(U1:OUT)
Time

Figure 17: Output for Vsin

Here,
−2𝑅𝑐𝑤 = 1.24
Which can be observed from the graph.
Pre Lab

1. How can you convert a sine wave into a cosine wave using an op-
amp?
Schematic:

Output for 𝑽𝒊 = 𝑽𝒔𝒊𝒏:


1.0V

0.5V

0V

-0.5V

-1.0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(V3:+) V(U1:OUT)
Time

Figure 18:Sine wave to Cosine wave


2. How should the supply voltages be chosen in an inverting summer?
What will happen if the constraint is not met?
We know for an inverting summer the equation for output voltage,
𝑅𝑓 𝑅𝑓 𝑅𝑓
𝑉𝑜 = −𝑉1 ( )−𝑉2 ( ) … … … … … − 𝑉𝑛 ( )
𝑅1 𝑅2 𝑅𝑛
Where 𝑉1 , 𝑉2 … … … … … 𝑉𝑛 = input voltage in the inverting terminal

If 𝑉𝑜𝑢𝑡 crosses the saturation limit, then peak of this output voltage will
be clipped off. So 𝑅1 , 𝑅2 should be set in such a way that Vout remains
in saturation limit.
Homework Problem 1

1. Generate a pulse train using an op-amp. The maximum and minimum


values of the pulse train are correspondingly 5 V and -10 V, and their
duration times are correspondingly 0.2 sec and 0.5 sec. Give the plots of
both input and output signals.
Schematic:

Figure 19: Sine wave to square wave

Output:
12V

8V

4V

0V

-4V

-8V

-12V
0s 0.2s 0.4s 0.6s 0.8s 1.0s 1.2s 1.4s 1.6s 1.8s 2.0s 2.2s 2.4s 2.6s 2.8s 3.0s 3.2s 3.4s 3.6s 3.8s 4.0s
V(U3:OUT) V(V1:+)
Time

Figure 20: Output


Homework problem 2

2.Design a rectifier for sinusoidal input without using any diode. The
output must have twice the frequency than the input. Use op-amp.

Schematic:

Figure 21: Rectifier without using diode

Output:
6.0V

4.0V

2.0V

0V

-2.0V

-4.0V

-6.0V
0s 0.4s 0.8s 1.2s 1.6s 2.0s 2.4s 2.8s 3.2s 3.6s 4.0s 4.4s 4.8s 5.2s 5.6s 6.0s
V(U4:OUT) V(V1:+)
Time

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