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Section: B2
Experiment No:2
Schematic:
𝑹𝒇 = 𝟏𝒌Ω:
2.0V
1.0V
0V
-1.0V
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms 5.5ms 6.0ms
V(R2:2) V(V4:+)
Time
Figure 2: Rf=1kΩ
As the gain value is 1, and equationally output value is less than the
power supply voltage, we get undistorted output curve.
𝑹𝒇 = 𝟏𝟎𝒌Ω ∶
10V
5V
0V
-5V
-10V
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms 5.5ms 6.0ms
V(R2:2) V(V4:+)
Time
Figure 3:Rf=10kΩ
As the gain value is 1, and equationally output value is less than the
power supply voltage, we get undistorted output curve.
𝑹𝒇 = 𝟏𝟎𝟎𝒌Ω ∶
20V
10V
0V
-10V
-20V
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms 5.5ms 6.0ms
V(R2:2) V(V4:+)
Time
Figure 4:Rf=100kΩ
As the gain value is 100, and output value is more than the power supply
voltage, we get distorted output curve.
2.Inverting Summer
Schematic:
𝑹𝒇 = 𝟏𝒌Ω:
1.0V
0.5V
0V
-0.5V
-1.0V
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms 5.5ms 6.0ms
V(U1:OUT) V(V6:+) V(R2:1)
Time
Schematic:
Unsaturated Vo:
4.0V
2.0V
0V
-2.0V
-4.0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(U1:OUT) V(V4:+) V(V3:+)
Time
Figure 8: Unsaturated
Saturated Vo:
20V
10V
0V
-10V
-20V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(U1:OUT) V(V4:+) V(V3:+)
Time
Figure 8: Saturated
Subtracted Vo:
1.0V
0.5V
0V
-0.5V
-1.0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(U1:OUT) V(V4:+) V(V3:+)
Time
Figure 9: Subtracted
4.Inverting Integrator
Schematic:
0.5V
0V
-0.5V
-1.0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(V3:+) V(U1:OUT)
Time
𝟐𝑽𝒎
=. 𝟑𝟏
ѡ𝑹𝑪
Which can be seen from the graph.
Output for 𝑽𝒊 = 𝑽𝒓𝒆𝒄:
1.0V
0.5V
0V
-0.5V
-1.0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(R1:1) V(U1:OUT)
Time
𝑽𝒎 𝟏
𝑺𝒍𝒐𝒑𝒆 = = = 𝟏𝟎𝟎𝟎𝑽/𝒔 Which can be seen from the graph.
𝑹𝑪 𝟏𝒌∗𝟏µ
1.0V
0.5V
0V
-0.5V
-1.0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(R1:1) V(U1:OUT)
Time
Schematic:
20V
10V
0V
-10V
-20V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(C1:1) V(U1:OUT)
Time
10V
5V
0V
-5V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(C1:1) V(U1:OUT)
Time
5.0V
0V
-5.0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(C1:1) V(U1:OUT)
Time
Here,
−2𝑅𝑐𝑤 = 1.24
Which can be observed from the graph.
Pre Lab
1. How can you convert a sine wave into a cosine wave using an op-
amp?
Schematic:
0.5V
0V
-0.5V
-1.0V
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms 2.8ms 3.0ms
V(V3:+) V(U1:OUT)
Time
If 𝑉𝑜𝑢𝑡 crosses the saturation limit, then peak of this output voltage will
be clipped off. So 𝑅1 , 𝑅2 should be set in such a way that Vout remains
in saturation limit.
Homework Problem 1
Output:
12V
8V
4V
0V
-4V
-8V
-12V
0s 0.2s 0.4s 0.6s 0.8s 1.0s 1.2s 1.4s 1.6s 1.8s 2.0s 2.2s 2.4s 2.6s 2.8s 3.0s 3.2s 3.4s 3.6s 3.8s 4.0s
V(U3:OUT) V(V1:+)
Time
2.Design a rectifier for sinusoidal input without using any diode. The
output must have twice the frequency than the input. Use op-amp.
Schematic:
Output:
6.0V
4.0V
2.0V
0V
-2.0V
-4.0V
-6.0V
0s 0.4s 0.8s 1.2s 1.6s 2.0s 2.4s 2.8s 3.2s 3.6s 4.0s 4.4s 4.8s 5.2s 5.6s 6.0s
V(U4:OUT) V(V1:+)
Time