Professional Documents
Culture Documents
GE-LUNAR Corporation makes no warranty of any kind with regard to this material, and shall not be
held liable for errors contained herein or for incidental or consequential damages in connection
with the furnishings or use of this manual.
Read through this manual thoroughly before attempting to service any components. Unauthorized
service may void system warranties or service contracts. Consult the GE-LUNAR Customer
Support Department prior to attempting any servicing:
608-828--2663
608-826-7107 (Fax)
Read the Safety and Overview Chapters to familiarize yourself with the scanner as a whole and
with the general function of the circuit boards.
The Chapter 4 and Chapter 5 contain common procedures and troubleshooting information and
can be read as needed, but are good sources of information.
When a problem arises, Chapter 4 should be referenced. Check the table of contents for Chapter 4
to see if the problem being experienced is described. If so, refer to the appropriate page. If not, try
to generalize the problem (e.g. the Detector is repeatedly running into the front of the scanner and
reversing and then running back into the front of the scanner. This is a mechanical problem in
general, specifically with Transverse Mechanics, check that subsection of Chapter 4 for the
subsystem experiencing the fault.
This manual commonly references other Sections and pages of the manual as needed, so often
procedures in the Chapter 5 Appendix are referred to as ways to solve problems described in
Chapter 4.
When requesting assistance from GE-LUNAR, please provide the following information:
Location
For problems with specific patient scans, it is recommended that you copy the scan files to
diskette, and send it, with a description of the problem, to the Applications Department at GE -
LUNAR.
Chapter Contents:
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Power On: shows the location of the Power On indicator and the
switch position for Power On.
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• The following symbols are found inside the PRODIGY, and in the Service
Manual.
1.1.3 Labels
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Inherent Filtration
Tube Insert
X-ray Source
Focal Point
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• A amber laser-on indicator, located on the front of the scan arm, is lit
when the laser is on. The program activates the laser during positioning
for an image acquisition. The program then turns off the laser when you
begin the scan. The emergency stop button will turn off the laser.
• There is a caution label (Figure 1.2) on the scan arm near the Display
Panel.
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• This symbol appears near the yellow X-ray shutter-open indicator light.
The X-ray shutter-open indicator light is located on the Display Panel on
the scan arm near the front.
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The Warning label below identifies the location of possible pinch points
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The label that follows is located on the scanner arm and shows the location of
the laser aperture.
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Note: The scanner's output power strip can be used to supply the
Host PC with isolated power. If it is to be used the following
conditions must be met. If the conditions cannot be met, the
scanner's output power strip cannot be used.
The computer, peripherals, and all other equipment must be located more
than 1.83 m from the scanner. Use an outlet strip to power the computer and
all peripherals. The outlet strip must be mounted off the floor so that it does
not touch other equipment. If your outlet strip was provided by LUNAR, it has
a maximum output of 15A, 120VAC. Only system-related equipment should
be powered by the outlet strip.
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You must power the computer, peripherals, and all other equipment with an
isolating transformer if the room is too small to maintain at least 1.83 m of
separation between the scanner and all other equipment.
A modem and/or network connection can only be made in the small room
configuration if all exposed metal surfaces of the computer and peripherals
are out of the patient environment.
LUNAR recommends that you use scanner power output to provide isolated
power to the computer and all peripherals. The power strip must be mounted
off the floor such that it does not touch other equipment. The computer and
ALL peripherals must be powered by the scanner. All other equipment must
not be powered by the scanner and must be located more than 1.83 m from
the scanner. Failure to use scanner power output can cause leakage currents
in excess of 100 microamperes.
As an option to scanner power output, a wall outlet can be used to power the
computer and peripherals. Isolated power from the scanner must not be used
to power any equipment if a wall outlet is used. All exposed metal surfaces of
the computer, peripherals, and other equipment must be located more than
1.83 m from the scanner.
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The PRODIGY has a mechanical design with two separate motion systems
that are capable of simultaneous operation. These are transverse, and
longitudinal. Both motion systems are driven by stepper motors.
• The front and side panels are secured by screws from the inside.
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It is not usually necessary to remove the front and back panels for most
service needs. However, if access is needed to the Front and Rear
Longitudinal Carriages, these can be removed.
The back panel is secured by hex socket head-head screws and must be slid
out of the way, for it is between the Arm Column and the frame.
• The upper scan arm shroud can be removed by loosening the two
screws holding it in place (on the back of the arm column) and tipping it
forward.
• The lower cover is held in place by four screws, two in the front and two
in the back, be sure to remove the ground wire for the metal portion of
the lower cover as well
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• There are four low-voltage linear DC power supplies (under 30VDC), and
two high-voltage DC power supplies (to supply 76kV to the x-ray tube) on
the pan.
• The scan arm contains one high-voltage power supply (1000VDC / +12
VDC input) is located in the upper arm near the X-ray detector and
provides power to the Detector Array.
• The scan arm also houses the detector and 5 associated printed circuit
boards, and a stepper motor contoller.
Leakage current
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• Voltage may fluctuate ±10% from the nominal value without a loss of
scanner performance.
• The nominal input (range of inputs) can be found on the system label.
• The input power must meet IEEE 519-1992 for power quality and total
harmonic distortion (THD <5%).
• The scanner has 3 different nominal outputs: 100, 120, 240 VAC.
• The nominal voltage output of the scanner is shown on the system label.
• The computer and all peripherals which use the scanner output power
must be rated for this voltage.
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Control Functions
• Provides control signals for two external stepper motor drives (Centent)
to scan patient in a fail safe manner and senses limit switch actuation at
the limits of travel (via FOINK see 2.11).
Communication
All SBC circuitry resets when the microprocessor resets. This is done during
power up, and can also be done over the communication port (via the host),
through connections to other circuit boards (especially the Detector Mother
Board, as a fail-safe shutdown), the by pressing the reset button on the SBC,
by pressing the Emergency Stop Button on the arm, or when a fault is
detected by the SBC or the FOINK (section 2.11.1).
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• Corrupt FIRMWARE
The SBC communicates with the Host PC via an RS-422 interface. This is a
serial connection capable of transmitting more data than a standard RS-232
port. As it is not a standard serial port a RS-485 card must be installed into
one of the Host PCs expansion slots and the port must be configured correctly
for the PRODIGY to operate correctly (see DXPC2000 chapter 5 appendices).
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Four layers were dedicated for routing layers. Sensitive signals were noted
and routed manually and isolated from more powerful signals to reduce signal
interference and crosstalk on the same routing layer. The main power and
ground planes were stacked adjacently on the central inner layers to increase
inter-planar capacitance thus reducing ground bounce and power supply
noise. Traces on the top and bottom layers were kept as short as reasonably
possible and tapped down to an internal trace layer through vias.
FLASH RAM
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SRAM
The cSBC contains a single 128K x 8 bit SRAM which provides read/write
memory. The SRAM's segments are arbitrarily mapped to any CPU segment
by the CPU mapping registers.
Note that ports A-F are reloaded with default values at time of CPU reset and
remain in the default state until SCANNER_RESET has been cleared and
new values are written by the firmware. Defaults for port F and all other
registers are invoked at power up only.
PORT A
0 trans_enable R/W 0 Transverse motor enable – low blocks trans motor pulses and
forces Centent drive to standby current level.
3 trans_lsw_override R/W 0 Transverse limit switch override – prevent limit switch contact
from blocking step pulses at hardware level.
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6 long_lsw_override R/W 0 Longitudinal limit switch override – prevent limit switch contact
from blocking step pulses at hardware level
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PORT C
5 /motor_fail_enable R/W 1 Arm logic to shutdown scanner if OMI inputs not sensed.
7 /motor_power R/W 1 Enable 24VDC to the stepper motor drives (a.k.a. Centents).
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PORT E
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0 /motion_fail_enable R/W 1 Arm scanner shutdown if OMI pulses w/o step pulses.
1 long_motor_fail_axis R/W 0 Motor fail circuitry axis control, clear for transverse.
PORT G
Dual axis stepper motor control is provided entirely by the FLEX PLD. To
make a typical move the firmware loads a starting velocity into the 16 bit
VELOCITY register, the total number of steps for the move into the 16 bit
TARGET register, and step at which to next interrupt the CPU into the 16 bit
STEP register. Velocity is in terms of periods of the 2.0MHz fundamental clock
per micro step pulse to the stepper drive. The drives provide 10 micro steps
per full step. The firmware can track move status by reading the 16 bit READ
register.
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This is a read only 8 bit register which returns the count of AGS roll-over
events since the previous read of the register. The AGS roll counter is reset
on read only - it is not tied to the PIT's sample clock.
This port provides R/W access to the AGS circuit's 8 bit U/D counter. The
counter is tied via a dedicated 8 bit bus to the AGS DAC. The DAC's analog
voltage is tied to the gain control input of the variable gain amplifier (VGA)
used to control gain of the detector input signal. As such the firmware can
read this counter to determine the current DAC voltage level and hence gain
level. If ags_enable is low this port gives the firmware direct control of the
AGS DAC as a parallel R/W device. If ags_enable is high, the firmware can
write to the port but the DAC will continue to respond to UP/DOWN requests
from the AGS DCA circuitry and hence quickly return to the AGS current
operating voltage.
HE/LE COUNTERS
These read only ports provide access to the 16 bit event counters which are
incremented each time the DCA circuitry detects an input pulse within the HE
or LE windows (as defined by the LEL, LEH, HEL, and HEH DAC settings).
These counters are read in two 8 bit bus cycles, MSB then LSB. The event
counters themselves consist of a counting element and a bus element. On the
rising edge on the PIT output pulse the counting elements are latched to the
bus element. The PIT output is also tied to CPU external INT 1 and as such
the firmware interrupt handler then has until the next rising PIT edge to read
the counters before the bus elements are latched over with the next sample
count and data is lost.
PIT MSB/LSB
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The MAX's master reset register will remain latched until the next rising edge
on the HOST_RTS input. When the cSBC is latched into reset by a scanner
error it will remain in CPU reset until the host drops the RTS line and re-
asserts it. It will remain in scanner reset until the CPU reads the scanner reset
register following the next raising edge of the RTS line at which the condition
causing the /SCAN_FAIL_ANY has been cleared. The firmware passes the
value of the reset registers to the host to allowing the host to display
appropriate error messages to the operator. The host will be unable to
perform any scanner related operations until the SCANNER_RESET has
been cleared. Red diagnostic LED's (see 2.5.33) are provided for both
scanner and CPU reset lines. The CPU reset line is tied to the host CTS
output such that the host sees a CTS event when the cSBC enters CPU reset.
The host code provides a CTS event handler which reads the reset registers
and prompts the user accordingly.
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5 /dmb_error R N/A DMB dropped it’s CTS indicating a DMB reset event.
6 /motion_fail R N/A OMI pulses detected without step pulse (manual arm motion).
The HVPS error register is used to monitor the status of the 7681 X-ray
source HVPS. If the register value is not equal to 0xF when /hvps_enable is
low, the FLEX will raise the HVPS_ERROR_INT output to the MAX PLD. The
MAX PLD latches this into the IIR register and issues an interrupt to the CPU.
As such status of the HVPS is monitored when the unit is enabled. The
handler for HVPS interrupt reads this register to determine the cause of the
interrupt. The HVPS register is also latched at the end of read cycles such
that current status can be ascertained by a double read. A bit map of the
register is provided below.
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2.5.8 DC FAIL
The DC fail error register latches the status of the DC power monitors at the
time of reset. If scanner reset code indicates /dc_power_fail the firmware can
read this register to identify the specific DC source failure. The register is also
latched at the end of read cycles such that current status can be ascertained
by a double read.
The cSBC uses a single 10 bit octal DAC, the Linear Technology LTC1660, to
generate the AGS and DAC window reference voltages and the bias program
voltage. The DAC utilizes a serial interface and as such is not accessed with a
traditional CPU write cycle. To load the device the firmware writes to the DAC
address listed above, in response to which the MAX drops the /CS line to the
device. The firmware then manipulates the local serial bus clock and data
lines to load the DAC setting. The desired DAC channel address in encoded
into the first 4 bits of the output data word. A read is then made to the DAC
address, in response to which the MAX raises the /CS line. See device data
sheet and analog section below for further DAC details.
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The cSBC uses a single 12 bit dual DAC, the Linear Technology LTC1454, to
generate the HVPS kV and mA program voltages. The DAC utilizes a serial
interface and as such is not accessed with a traditional CPU write cycle. To
load the device the firmware writes to the DAC address listed above, in
response to which the MAX drops the /CS line to the device. The firmware
then manipulates the local serial bus clock and data lines to load the DAC
setting. Both DAC channels must be written together, CHA (kV) first followed
by CHB (mA) in a 24 bit stream packet. A read is then made to the DAC
address, in response to which the MAX raises the /CS line. See device data
sheet and analog section below for further DAC details.
The cSBC uses a single 10 bit dual DAC, the Linear Technology LTC1661, to
generate the HVPS filament limit and arc detect threshold voltages. The DAC
utilizes a serial interface and as such is not accessed with a traditional CPU
write cycle. To load the device the firmware writes to the DAC address listed
above, in response to which the MAX drops the /CS line to the device. The
firmware then manipulates the local serial bus clock and data lines to load the
DAC setting. The desired DAC channel address in encoded into the first 4 bits
of the output data word. A read is then made to the DAC address, in response
to which the MAX raises the /CS line. See device data sheet and analog
section below for further DAC details.
The cSBC uses a 12 bit DAC, the Linear Technology LTC8043, to generate
the detector peak gain voltage. The DAC utilizes a serial interface and as
such is not accessed with a traditional CPU write cycle. To load the device the
firmware manipulates the local serial bus clock and data lines to output load
the DAC setting and then performs a write/read cycle to the DAC address
listed above to pulse the DAC's load line low. See device data sheet and
analog section below for further DAC details.
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4 8mS_CLOCK R/C N/A 8ms clock tick interrupt from FLEX PLD.
5 POWER_FAIL_INT R/C N/A Power down pending in 5ms interrupt from DC supply.
The master reset register will force a CPU and scanner reset condition on the
falling edge of any of its listed inputs. The contents of the register will be
latched at the time of reset such that when the CPU next comes out of reset
the firmware can read the register to determine what caused the preceding
reset and report the appropriate code to the host. If the reset was cause by
the CPU_RST_WR input, the suicide reset register contains the specific error
code. If the reset was cause by the /SCAN_FAIL_ANY input, the scanner
reset register contains the specific error code.
The CPU and scanner resets will remain latched until the next rising edge of
the RTS input. At this time the CPU reset will be cleared if /POWER_RESET
bit is not asserted and the scanner reset will be cleared if /SCAN_FAIL_ANY
is high.
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1 /HOST_RTS R N/A RTS reset request from host via comm line.
6 CPU_RST_WR R N/A Write to the suicide register, read suicide reg for error code.
7 /SCAN_FAIL_ANY R N/A Scanner reset register latched, read scanner reg for error code.
The CPU Reset SFR is a byte register into which the CPU can write a failure
code. In response to the write the MAX PLD will store the failure code and
assert the CPU_RESET line. The CPU_RESET line will be released on the
next rising edge of the host RTS, at which time the CPU will be able to read
the bit code from this SFR to determine the cause of the previous reset.
The misc. output register is used to control the misc. output functions listed in
the following table.
2 DMB HWPT R/W 0 Enable direct connect of host and DMB XCVR’s, bypassing
UART’s, for maximized scan data bandwidth DMB to host.
3 RESET OVERRIDE R/W 1 Enable override of CPU_RESET signal. Set to 1 on power-up such
that firmware can load the FLEX PLD at power-up regardless of
the host RTS state.
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The misc. output register is used to control the misc input functions listed in
the following table
0 BOOT JUMPER R N/A JP4, placed to force firmware to remain in boot code.
1 CPU_P1_2 R N/A Input from CPU port 1, pin 2 (diagnostic use only).
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The FLEX device is SRAM based and hence must be reprogrammed by the
CPU at power up. When the device is not programmed all I/O pins default to
the high impedance state. As such the scanner will also be in a fail safe state
when the FLEX is not programmed. The CPU port 1, pin 2 also runs directly to
the FLEX's ENABLE pin.
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The 4 panel LED's, power on, X-ray on, source exposed, and laser on, are all
driven PS2501-2 opto's through 750R0 / 1W current limiting resistors.
The HVPS AC is enabled via a relay controlled by the cSBC. The line is
primarially used to disable the HVPS by removing the AC to the HVPS via the
relay. AC Power to the HVPS can be left on for up to one hour after
generation of x-rays to prevent AC cycling between concurrent scans.
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2.5.28 ADC
The Burr Brown ADS8320 16 bit, serial, single channel ADC was chosen for
the cSBC for its high resolution, and excellent accuracy.
An Analog devices AD586 +5V voltage reference is used. The part was
selected for it low noise and high accuracy
Overall the ADC and reference give the cSBC +/-5mV analog accuracy 11.2
DAC's
A single LTC1454 12 bit, serial, dual channel, DAC is used to provide the kV
and mA program voltages. The part was chosen for it low cost, ready
availability at national distributors, and excellent DNL specifications. The DAC
is used in the x2 configuration such that the full scale output is twice the
reference voltage. Voltage outputs feed back to the ADC MUX such that
firmware can calibrate out DAC INL errors.
A single LTC1661 10 bit, serial, dual channel, DAC is used to provide the arc
threshold and filament current limit input voltages to the new 7681 HVPS. The
part was chosen for it low cost, ready availability at national distributors, and
reasonable DNL specifications. Voltage outputs are not fed back to the ADC
MUX as high accuracy is not required on these threshold inputs.
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The host I/O port provides optical isolation per medical leakage requirements
of EN 60601-1-1, Annex BBB, section 7. QT's 6N136 opto's are used to
provide the required 115.2KB operational bandwidth and the required 2500
Vrms standoff at a reasonable price. Opto inputs and outputs are routed
through the MAX PLD to support the hardware pass though mode to the DMB.
A DB-9 female connector is provided on the host side of the isolation barrier.
RS-232 is supported by populating the XCVR U26. RS-422 is supported by
U21 and U37, the RS-422 XCVR's. A simple charge pump circuit is used to
generate +5V_ISO on the host side of the barrier. Prodigy II will populate the
RS-422 section and run at 115.2KB.
The debug port is provided such that the firmware can echo status messages
and other information to a dumb terminal to support debugging, development,
testing, and servicing. The port is fully driven by a 16550 compatible UART is
fully connected to a DB-9 header using the standard PC comm port pinout.
The firmware can be configured to accept input from the debug port if
required. The port is expected to be depopulated in the final production BOM
to minimize cost.
D29 Amber FLEX DIAG 1 Diagnostic LED for misc use by firmware, control reg in FLEX.
D31 Amber FLEX DIAG 2 Diagnostic LED for misc use by firmware, control reg in FLEX.
D22 Amber MAX DIAG 2 Diagnostic LED for misc use by firmware, control reg in MAX.
D28 Amber TRANS OMI Valid transverse motion sensed by OMI circuitry.
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D25 Amber HE COUNT Valid high energy photon event sensed by DCA circuitry.
D23 Amber LE COUNT Valid low energy photon event sensed by DCA circuitry.
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• The x-rays produced by the x-ray insert are filtered by the cerium filter to
produce a dual energy spectrum. The x-ray spectrum has peaks at 62
and 38 kV.
• Tube Current is set by the (c)SBC and regulated by the MAX Board
(PRODIGY I) or the Power Supply (PRODIGY II systems).
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• These power supplies are powered by the AC line voltage and have their
own built in fusing.
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• The Tube Head and MAX Board work with the dedicated +28VDC power
supply to supply tube head current.
• When errors are detected by the SBC, (for example, loss of arm motion)
the relay will switch off and prevent production of x-rays.
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• There may be occasional static discharges within the Tube Head. The
transients caused by these static discharges (arcs) are shunted to
ground through the array of transorbs present on the XORB board.
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• The array of 16 CZT crystals each act as pixel detectors, from which the
data is combined to form the densitometry data set.
• The Detector electronics amplify, discriminate and counts x-rays for all 16
detector elements.
• The Detector has 5 PCB associated with it, the Detector Mother Board
(DMB) and 4 identical Detector Daughter Boards (DDB’s).
• The detector has its own dedicated High Voltage Power Supply, used for
supplying detector bias.
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A charge sensitive pre-amp then converts the current to voltage and passes
the signal along to the Detector Daughter Board for processing and analysis.
The signal out of the pre-amp is a +5 to +10 millivolt DC signal, each event on
each channel creates a small “blip”.
• Pulse Shaping
• Gain Adjust
• Event counting
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The Detector Daughter Board takes the +5 to 10 millivolt signal, strips off the
DC offset and shapes the pulse into a bi-polar pulse. This signal is further
amplified to 2.4 VDC and is then fed to a bank of 4 pairs of comparators.
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The fine gain adjust is applied to the entire signal on a particular channel at
the pulse shaping amplifier, therefore the Low Energy Signal’s gain is
adjusted along with the High Energy Signal.
The 4 comparators of the Gain Stage are set by digital to analog converters
(DAC’s) which use reference values stored in the Flash RAM of the Detector
Mother Board.
The amplified and gain adjusted pulse is simultaneously fed to a second bank
of 4 comparators which are divided again into two sets of windows. The
windows of the Discrimination stage are centered around the High and Low
Energy pulses. These comparators are also set by DAC’s which are set by the
DMB Flash RAM.
Each time a pulse falls into the High Energy window, a counter in the
programmable logic (PLD) is ticked, the same happens for the Low Energy
window. These two data signals are then passed to the DMB, which transmits
the data to the SBC.
• Contains a slot for the Test Point Board (part of the PRODIGY tool kit see
figure 2-9)
• The Detector Mother Board provides +5 V, ±12 V plus digital and analog
grounds to the Detector Daughter Boards.
• The Detector Mother Board communicates with the SBC via RS-422 link.
• The patient positioning laser is controlled by the SBC via the DMB (See
figure 2-9).
The Detector Mother Board (DMB) contains a processor and Flash RAM,
which supplies programming data to the detector subsystem. The data for all
comparator settings is stored here (set values), detector Bias programming
data, firmware to program the PLD’s of the 4 DDB’s, the Peak value
calculation operation for the detector (see section 2.17 for a discussion of the
Secondary Calibration (QA)).
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The DMB has a processor, which is responsible for performing the Peak
calculation during a Secondary Calibration (QA), programming the 4 DDB
PLD’s and handles all communications with the SBC. The DMB processor
sends the SBC status reports and echoes back all commands that are sent to
it.
• Corrupt FIRMWARE
1 = Test Point Board, 2 = Detector Daughter Boards (4), 3 = Patient Positioning laser and
Detector Mother Board Interface, The Detector Mother Board is the horizontal circuit board
that the DMB’s and Test Point Board are plugged into.
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• The FOINK Board optically isolates control circuitry (SBC) from the rest
of the scanners electronics (see pan layout Appendix 2B).
• Shutter solenoid
• The RUN/HOLD signals are optically isolated on the FOINK board before
being sent to the Centent motor drivers. The Centents supply current to
the stepper motor windings.
• Both the transverse and longitudinal drive systems have slotted disks
attached which pass through optical interrupters (OMI) for motion
detection. Should motion stop during patient scanning, the FOINK sends
an interrupt to the SBC, which is reset and x-ray production is halted.
• Limit switches at each end of the scanner and each end of the arm signal
the SBC whenever motion reaches either end or side of the scanner. If a
limit switch is tripped during a patient scan, the motor associated with the
tripped limit switch is halted, the SBC is reset and the shutter is closed.
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The laser on LED is lit when the SBC signals the DMB to turn
the laser on, the LED is switched on by the DMB.
• The yellow Shutter Open LED comes on is the Shutter open and
exposure possible.
The Shutter open LED is controlled by the SBC, the SBC will
allow the shutter to open even if the lamp is not lit (shutter
open indicator is also on the PC controller screen).
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The Rocker switches are enabled by the SBC via the FOINK.
Note: The rocker switches are also referred to as the joystick in the
PRODIGY Service Manual and the PRODIGY Service
Software.
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• The FOINK or cSBC board senses the closure of the Shutter or the
cessation of current through the X-ray Insert (+28VDC Power Supply or
Model 7861 HVPS) and switches on the audible signal if either of these
occur during an exposure.
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Table 2-3 gives specifications for standard components shipped with the
PRODIGY system.
*Width is measured from the front edge of the scanner table to the back edge of the
scanner arm. Height is measured from the top of the scanner arm to the bottom of the
scanner arm.
#Some languages may require 1024x768x16-bit color to fit the translated software text
on the screen
General specifications
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• Femur Measurements
20.2 cm x 18 cm
2.16.4 Programs
• Quality Assurance
Operational environment
• Dust, Fumes and Debris– Install the system in a clean, ventilated area.
Dust and other airborne debris can cause the diskette drive heads and
other sensitive mechanical components to malfunction. GE-LUNAR
recommends that smoking is not permitted in the scanner room.
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• Shock and Vibration– Make sure the scanner table does not receive
shock greater than 1 G for more than 1 millisecond. Make sure the
scanner table does not receive vibrations greater than 0.25 G at 5 Hz.
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IEC 522/
Inherent filtration >2.9 mm Al/70 kV
1976
IEC 613/
Filament characteristics Refer to Figure 6.
1989
76 kV - Anode to Cathode
IEC 613/
Nominal x-ray tube voltage 38 kV - Anode to Earth
1989
38 kV - Cathode to Earth
IEC 613/
Single load rating 228 W (3 mA, 76 kV) for up to 15 min.
1989
228 W (3 mA, 76 kV) for up to 15 min.
with a IEC 613/
Serial load rating
5 min. cool down time between mea- 1989
surements.
Maximum x-ray tube assembly heat con- IEC 613/
260 Kjoules
tent 1989
X-ray tube assembly heating and cooling IEC 613/
Refer to Figure 7.
curves 1989
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• 128 MB RAM
• 8X CD ROM
Tables 2-9 and 2-10 list components certified to the FDA for use with
PRODIGY scanners and is updated periodically. Contact GE-LUNAR for a
current listing of compatible components.
Table 2-10. FDA certified components (system no. DF+12000 and higher).
LUNAR Model
Component Description
#
X-ray Controller LUNAR single board controller 7635
Spellman 1 Models :
High Voltage Power
PTV40N200X2113 0311
Supplies
PTV40P200X2112 0312
Bertan 2 Models:
2411 N 0311
2411 P 0312
Tube Head Assembly LUNAR X-Ray Tube Head Assembly 6838
LUNAR PRODIGY Collimator Assem-
Collimator 6893
bly
1
Spellman High Voltage Electronics Corporation Hauppauge, NY
2
Bertan Associates, 121 New South Road, Hicksville, NY
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• All tests are run all of the time. The tests are executed and test results
reported as each test completes. Test results include pass/fail and any
quantitative information when appropriate.
Operator presses [F5] to start [Daily QA] which presents a plot of the last used
parameter from the last Daily QA run. (Default display is the medium bone
chamber.) At this point operator can interactively manipulate the data in QA
database to create tables and graphs that can be printed.
Scan arm moves to the "Home" position. In this case, Home is always at head
of scanner for QA independent of user setting for Home.
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The DACs and Flash RAM of the Detector Mother Board are tested.
Find Block
The scanner performs a scout scan to find the block. If block is not properly
positioned, the scanner will prompt the user to Reposition standard more
accurately.
Peak Test
During this test, the shutter opens with the x-rays on.
This test adjusts the sensitivity of the photon counting electronics. The test
determines the optimal voltage setting for the detector amplifier so the
maximum number of photons are detected. With the shutter open the software
adjusts the voltage setting for the detector amplifier, acquiring counts at the
different amplifier settings.
The detector peak test then determines the optimal voltage setting for the
detector amplifiers based on the results. The actual peak setting is taken from
the high energy count rates, the low energy channel is essentially blocked by
the brass spillover piece in the QA standard.
Measures the movement of the source shutter. A functional test checks the
shutter LSW and ensures the shutter stops all photons.
OMI Interrupt function - the OMI signal is tested by verifying the OMI Interpol
signal is present when the scan arm is stationary.
Each motor (transverse, longitudinal) will be run between hard limits and back
to home position. If the hard limits do not engage, this is a failure. Also
compare steps against predetermined scan window size.
If a failure occurs the number of steps taken, the expected value and the
direction the arm was traveling is noted in the error log.
Spillover test
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The output of the x-ray tube is measured as part of a Reference Value (old
term was air) measurement. This is measured at various currents between
3mA and 0.150mA.
Note: Not all currents that are ramped to / tested are used to perform
patient scans.
• Reference Value measurements for all current settings are actually made
through lucite sections of the secondary calibration block.
The HE/LE ratio for each reference value is calculated for each tube current
tested in reference value measurement.
The detector Pre-amplifiers are tested by removing detector bias and verifying
that the signal out lines of the detector are not noisy.
• The system measures two tissue eqivilent materials (lucite and Acetron).
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• The system determines the%fat for two different materials with different
compositions.
BM Chamber Measurements
• Measured values for each chamber are stored on a per element basis in
the QA database.
Daily QA Results
At the end of Daily QA, a report is automatically printed. If printer is not on line
or fails, post an error to screen.
A view with plot of medium bone chamber is generated, and user the user is
allowed to manipulate data interactively.
2.17.4 QA Database
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Trend Summary
0.957 Mean BMD Medium (High 0.971g/cm
CV
Total Sessions 3
0.907
1/17/00 2/8/00 3/1/00 3/23/00
_____________________________________________________________________________
Functional Tests Secondary Calibration
Test Value Status Test Mean %CV Status
Service Manual