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RC2010 (Pb Free)

5%, 1%
GENERAL PURPOSE CHIP RESISTORS
DATA SHEET

Product specification – Sep 16, 2004 V.2 Supersedes Date of Mar. 06, 2003
Product specification 2
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Chip Resistor Surface Mount RC SERIES 2010 (Pb Free)

SCOPE
This specification describes RC2010 series chip resistors with lead-free terminations made by thick film process.

ORDERING INFORMATION
Part number is identified by the series, size, tolerance, packing type, temperature coefficient, taping reel and
resistance value.

PHYCOMP ORDERING CODE


12NC CODE CTC CODE

2322 XXX XXXXX L RC2010 X X X XX XXXX L


(1) (2) (3) (4) (1) (2) (3) (4) (5) (6)

TYPE/ START TOL. RESISTANCE EMBOSSED TAPE ON REEL (units) (2) (1) TOLERANCE
2010 IN (1) (%) RANGE 4,000 F = ±1%
PRC111 2322 ±5% 1 to 22 MΩ 760 60xxx J = ±5%

PRC111 2322 ±1% 1 to 10 MΩ 761 6xxxx (2) PACKAGING TYPE


Jumper 2322 - 0Ω 760 90003 K = Embossed taping reel

(3) TEMPERATURE COEFFICIENT


(1) The resistors have a 12-digit Last digit of 12NC OF RESISTANCE
ordering code starting with Resistance decade (3) Last digit – = Base on spec
2322.
0.01 to 0.0976 X 0
(2) The subsequent 4 or 5 digits (4) TAPING REEL
0.1 to 0.976 X 7
indicate the resistor 07 = 7 inch dia. Reel
tolerance and packaging. 1 to 9.76 X 8
10 to 97.6 X (5) RESISTANCE VALUE
(3) The remaining 4 or 3 digits 9
represent the resistance value 100 to 976 X 1 5R6, 56R, 560R, 5K6, 56K, 22M.
with the last digit indicating 1 to 9.76 kX 2
the multiplier as shown in the (6) RESISTOR TERMINATIONS
10 to 97.6 kX 3
table of “Last digit of 12NC”. L = Lead free terminations (pure Tin)
100 to 976 kX 4
(4) “L” means lead-free
1 to 9.76 MX 5
terminations.
10 to 97.6 MX ORDERING EXAMPLE
6
ORDERING EXAMPLE The ordering code of a RC2010
Example: 0.02 X = 0200 or 200 chip resistor, value 56 X with
The ordering code of a PRC111
0.3 X = 3007 or 307 ±1% tolerance, supplied in 7-inch
resistor, value 56 X with ±1%
tolerance, supplied in tape of 1X = 1008 or 108 tape reel is: RC2010FK-0756RL.
4,000 units per reel is: 33 kX = 3303 or 333
232276165609L. 10 MX = 1006 or 106

NOTE
1. The “L” at the end of the code is only for ordering. On the reel label, the standard CTC or 12NC will be mentioned an additional stamp
“LFP”= lead free production.
2. Products with lead in terminations fulfil the same requirements as mentioned in this datasheet.
3. Products with lead in terminations will be phased out in the coming months (before July 1st, 2006)

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Sep 16, 2004 V.2
Product specification 3
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Chip Resistor Surface Mount RC SERIES 2010 (Pb Free)

MARKING
RC2010

E-24 series: 3 digits


ynsc001

First two digits for significant figure and 3rd digit for number of zeros
Fig. 1 Value=10 KΩ

Both E-24 and E-96 series: 4 digits


First three digits for significant figure and 4th digit for number of zeros
ynsc004

Fig. 2 Value=10 KΩ

For marking codes, please see EIA-marking code rules in data sheet “Chip resistors instruction”.

CONSTRUCTION
The resistors are constructed out of
a high-grade ceramic body. Internal handbook, 4 columns
protective coat

metal electrodes are added at each resistor layer

end and connected by a resistive H


inner electrode

paste. The composition of the paste end termination

is adjusted to give the approximate I2


ceramic substrate MBE940_a

required resistance and laser cutting


of this resistive layer that achieves
tolerance trims the value. The Fig. 3 Chip resistor construction
resistive layer is covered with a
protective coat and printed with the
resistance value. Finally, the two external terminations (pure Tin) are added. See fig. 3.

DIMENSIONS
Table 1
protective coat
TYPE RC2010 I1

L (mm) 5.00 ±0.10


W (mm) 2.50 ±0.15
H (mm) 0.55 ±0.10 W

I1 (mm) 0.45 ±0.15


I2 (mm) 0.50 ±0.20 MBE940_a

Fig. 4 Chip resistor dimension For dimension see Table 1

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Sep 16, 2004 V.2
Product specification 4
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Chip Resistor Surface Mount RC SERIES 2010 (Pb Free)

ELECTRICAL CHARACTERISTICS FOOTPRINT AND SOLDERING


Table 2 PROFILES
CHARACTERISTICS RC2010 3/4 W For recommended footprint and
soldering profiles, please see the
Operating Temperature Range –55 °C to +155 °C
special data sheet “Chip resistors
Maximum Working Voltage 200 V mounting”.
Maximum Overload Voltage 500 V
Dielectric Withstanding Voltage 500 V
ENVIRONMENTAL DATA
5% (E24) 1 Ω to 22 MΩ
For material declaration
Resistance Range 1% (E96) 1 Ω to 10 MΩ information (IMDS-data) of the
Zero Ohm Jumper < 0.05 Ω products, please see the
10 Ω < R ≤ 10 MΩ ±100 ppm/°C separated info “Environmental
Temperature Coefficient data”.
R ≤ 10 Ω; R > 10 MΩ ±200 ppm/°C
Rated Current 2.0 A
Jumper Criteria
Maximum Current 10.0 A

PACKING STYLE AND PACKAGING QUANTITY


Table 3 Packing style and packaging quantity
PRODUCT TYPE PACKING STYLE REEL DIMENSION QUANTITY PER REEL
RC2010 Embossed taping reel (K) 7" (178 mm) 4,000 units

NOTE
1. For embossed tape and reel specification/dimensions, please see the special data sheet “Packing” document.

FUNCTIONAL DESCRIPTION
POWER RATING
Pmax MRA632
RC2010 rated power at 70°C is 3/4 W (%Prated)

RATED VOLTAGE 100

The DC or AC (rms) continuous working voltage


corresponding to the rated power is determined by 50
the following formula:
V=√(P X R) 0
−55 0 50 70 100 155
Where Tamb (°C)

V=Continuous rated DC or
AC (rms) working voltage (V) Fig. 5 Maximum dissipation (Pmax) in percentage of rated power
as a function of the operating ambient temperature (Tamb )
P=Rated power (W)
R=Resistance value (X)

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Sep 16, 2004 V.2
Product specification 5
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Chip Resistor Surface Mount RC SERIES 2010 (Pb Free)

TESTS AND REQUIREMENTS


Table 4 Test condition, procedure and requirements
TEST TEST METHOD PROCEDURE REQUIREMENTS
Temperature MIL-STD-202F-method 304; At +25/–55 °C and +25/+125 °C Refer to table 2
Coefficient of JIS C 5202-4.8
Resistance Formula:
(T.C.R.)
R2–R1
T.C.R= ------------------------- ×106 (ppm/°C)
R1(t2–t1)
Where
t1=+25 °C or specified room temperature
t2=–55 °C or +125 °C test temperature
R1=resistance at reference temperature in ohms
R2=resistance at test temperature in ohms

Thermal Shock MIL-STD-202F-method 107G; At –65 (+0/–10) °C for 2 minutes and at +155 ±(0.5%+0.05 Ω) for 1% tol.
IEC 60115-1 4.19 (+10/–0) °C for 2 minutes; 25 cycles ±(1.0%+0.05 Ω) for 5% tol.

Low MIL-R-55342D-Para 4.7.4 At –65 (+0/–5) °C for 1 hour; RCWV applied ±(0.5%+0.05 Ω) for 1% tol .
Temperature for 45 (+5/–0) minutes ±(1.0%+0.05 Ω) for 5% tol.
Operation
No visible damage

Short Time MIL-R-55342D-Para 4.7.5; 2.5 × RCWV applied for 5 seconds at room ±(1.0%+0.05 Ω) for 1% tol.
Overload IEC 60115-1 4.13 temperature ±(2.0%+0.05 Ω) for 5% tol.
No visible damage

Insulation MIL-STD-202F-method 302; RCOV for 1 minute ≥10 GΩ


Resistance IEC 60115-1 4.6.1.1 Type RC2010
Voltage (DC) 500 V

Dielectric MIL-STD-202F-method 301; Maximum voltage (Vrms) applied for 1 minute No breakdown or flashover
Withstand IEC 60115-1 4.6.1.1 Type RC2010
Voltage
Voltage (AC) 500 Vrms

Resistance to MIL-STD-202F-method 210C; Unmounted chips; 260 ±5 °C for 10 ±1 ±(0.5%+0.05 Ω) for 1% tol.
Soldering IEC 60115-1 4.18 seconds ±(1.0%+0.05 Ω) for 5% tol.
Heat
No visible damage

Life MIL-STD-202F-method 108A; At 70±2 °C for 1,000 hours; RCWV applied for ±(1%+0.05 Ω) for 1% tol.
IEC 60115-1 4.25.1 1.5 hours on and 0.5 hour off ±(3%+0.05 Ω) for 5% tol.

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Sep 16, 2004 V.2
Product specification 6
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Chip Resistor Surface Mount RC SERIES 2010 (Pb Free)

TEST TEST METHOD PROCEDURE REQUIREMENTS


Solderability MIL-STD-202F-method 208A; Solder bath at 245±3 °C Well tinned (≥95% covered)
IEC 60115-1 4.17 Dipping time: 2±0.5 seconds No visible damage

Bending JIS C 5202.6.14; Resistors mounted on a 90 mm glass epoxy ±(1.0%+0.05 Ω) for 1% tol.
Strength IEC 60115-1 4.15 resin PCB (FR4) ±(1.0%+0.05 Ω) for 5% tol.
Bending: 2 mm No visible damage

Resistance to MIL-STD-202F-method 215; lsopropylalcohol (C3H7OH) or dichloromethane No smeared


Solvent IEC 60115-1 4.29 (CH2Cl2) followed by brushing

Noise JIS C 5202 5.9; Maximum voltage (Vrms) applied. Resistors range Value
IEC 60115-1 4.12 R < 100 Ω 10 dB
100 Ω ≤ R < 1 KΩ 24 dB
1 KΩ ≤ R < 10 KΩ 34 dB
10 KΩ ≤ R < 100 KΩ 44 dB
100 KΩ ≤ R < 1 MΩ 46 dB
1 MΩ ≤ R ≤ 22 MΩ 48 dB

Humidity JIS C 5202 7.5; 1,000 hours; 40±2 °C; 93(+2/–3)% RH


±(0.5%+0.05 Ω) for 1% tol.
(steady state) IEC 60115-8 4.24.8 RCWV applied for 1.5 hours on and 0.5 hour off
±(2.0%+0.05 Ω) for 5% tol.

Leaching EIA/IS 4.13B; Solder bath at 260±5 °C No visible damage


IEC 60115-8 4.18 Dipping time: 30±1 seconds

Intermittent JIS C 5202 5.8 At room temperature; 2.5 × RCWV applied for ±(1.0%+0.05 Ω) for 1% tol.
Overload 1 second on and 25 seconds off; total 10,000 ±(2.0%+0.05 Ω) for 5% tol.
cycles

Resistance to On request On request


Vibration

Moisture MIL-STD-202F-method 106F; 42 cycles; total 1,000 hours ±(0.5%+0.05Ω) for 1% tol.
Resistance IEC 60115-1 4.24.2 Shown as Fig. 6 ±(2.0%+0.05Ω) for 5% tol.
Heat
No visible damage

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Sep 16, 2004 V.2
Product specification 7
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Chip Resistor Surface Mount RC SERIES 2010 (Pb Free)

80 − 98% 80 − 98%
75 90 − 98% RH RH 90 − 98% RH RH 90 − 98% RH
temperature
[°C] initial drying
24 hours
rate of change of temperature is unspecified,
50
however, specimens shall not be subjected to
radiant heating from chamber conditioning processes
end of final cycle;
measurements
+10 °C (+18 °F) as specified in 2.7
25 −2 °C (−3.6 °F)
initial measurements
as specified in 2.2 circulation of conditioning air shall be at a optional sub-cycle if specified
minimum cubic rate per minute equivalent to (2.3); sub-cycle performed during
10 times the volume of the chamber any 5 of the first 9 cycles; humidity
0
temperature uncontrolled during sub-cycle
tolerance
±2 °C (±3.6 °F) voltage applied as specified in 2.4
unless otherwise
specified

STEP1 STEP2 STEP3 STEP4 STEP5 STEP6 STEP7


prior to first
cycle only one cycle 24 hours; repeat as specified in 2.5

HBK073 0 5 10 15 20 25
time [h]

Fig. 6 Moisture resistance test requirements

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Sep 16, 2004 V.2
Product specification 8
8
Chip Resistor Surface Mount RC SERIES 2010 (Pb Free)

REVISION HISTORY
REVISION DATE CHANGE NOTIFICATION DESCRIPTION
Version 2 Sep 16, 2004 - - New datasheet for 2010 thick film 1% and 5% with lead-free terminations
- Replace the 2010 part of pdf files: PRC111_1_5, PRC111_5_6
- Test method and procedure updated

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Sep 16, 2004 V.2

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