Theory

Common Emitter amplifier has the emitter terminal as the common terminal between
input and output terminals. The emitter base junction is forward biased and collector
base junction is reverse biased, so that transistor remains in active region throughout
the operation. When a sinusoidal AC signal is applied at input terminals of circuit
during positive half cycle the forward bias of base emitter junction VBE is increased
resulting in an increase in IB ,The collector current IC LVLQFUHDVHGE\ȕWLPHVWKHLQcrease
in IB, VCE is correspondingly decreased. i.e. output voltage gets decreased. Thus in a
CE amplifier a positive going signal is converted into a negative going output signal
i.e..180o phase shift is introduced between output and input signal and it is an amplified
version of input signal.
Introduction
In project, we looked at an amplifier’s characteristics from an input-output perspective
and found the specifications of amplifiers that satisfied certain input and output
requirements. Internally, amplifiers use one or more bipolar transistors as amplifying
devices, and these transistors are biased from a single DC supply to operate properly at
a desired Q-point. Using bipolar transistors, we can build amplifiers that give a voltage
(or current) gain, a high input impedance, or a high (or low) output impedance. The
terminal behavior of an amplifier depends on the types of devices used within the
amplifier. Bipolar transistors are active devices with highly nonlinear characteristics.
Thus, to analyze and design a bipolar transistor circuit, we need models of transistors.
Creating accurate models requires detailed knowledge of the physical operation of
transistors and their parameters as well as a powerful analytical technique. A circuit can
be analyzed easily using simple models, but there is generally a trade-off between
accuracy and complexity. A simple model, however, is always useful to obtain the
approximate values of circuit elements for use in a design exercise and the approximate
performance of the elements for circuit evaluation. The details of bipolar transistor
operation, characteristics, biasing, and modeling are outside the scope. In this project,
we consider the operation and external characteristics of bipolar junction transistors
using simple linear models.

Bipolar Junction Transistors

The bipolar junction transistor (BJT), developed in the 1960s, was the first device for
amplification of signals. BJTs continue to play a key role in microelectronics, especially
in analog electronics. Integrated circuit–fabrication techniques have led to small, high-
speed devices. A BJT consists of a silicon (or germanium) crystal to which impurities

Figure -1- Basic structures and symbols of BJTs

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ELECTRIACL ENGINEERING DEPARTMENT/ BASRA UNIVERSITY
 have been added such that a layer of p-type (or n-type) silicon is sandwiched between
two layers of n-type (or p-type) silicon. Therefore, there are two types of transistors:
NPN and PNP. The basic structures of NPN and PNP transistors are shown in Fig.-1-
[(a) and (b)]. A BJT may be viewed as two PN junctions connected back to back. It is
called bipolar because two polarity carriers (holes and electrons) carry charge in the
device. A BJT is often referred to simply as a transistor. It has three terminals, known
as the emitter (E), the base (B), and the collector (C). The symbols are shown in Fig.-
1-[(c) and (d)]. The direction of the arrowhead by the emitter determines whether the
transistor is an NPN or a PNP transistor, as illustrated in Fig-1-[(c) and (d)]. The block
diagrams of Fig.-1- are highly simplified but useful to understand the concepts of basic
transistor theory. The internal structure of actual bipolar transistors is more complex
due to the fact that terminal connections are made at the surface, heavily doped buried
layers must be included to minimize semiconductor resistances, and collector terminals
of individual transistors must be isolated from each other to fabricate more than one
bipolar transistor on a single piece of semiconductor material. Figure-2- shows a cross
section of a conventional NPN bipolar transistor fabricated in an integrated circuit
configuration. In the epitaxial growth, a thin, single-crystal layer of material is grown
on the surface of a single-crystal substrate, which acts as the seed, and the process takes
place far below the melting temperature. The emitter and the collector regions are not
symmetrical. The impurity-doping concentrations in the emitter and collector are
different, and the geometry of these regions can also differ significantly.

Figure -2- Cross section of a conventional integrated circuit

NPN bipolar transistor.
The voltages between two terminals and the actual direction of the current-flow of
transistor currents are shown in Fig-1- [(c) and (d)]. The emitter current IE is the sum
of the base current IB and the collector current IC such that IE = IB + IC. However,
according to the Institute of Electrical and Electronic Engineers (IEEE) standard, the
sum of the currents must be zero; that is, IE + IB + IC = 0 or -IE = IB + IC. We will use
the notation of actual current direction rather than the IEEE notation so that all currents
have positive values. IC, IB, and IE are positive for NPN-type transistors, and they are
negative for PNP-type transistors.

BJT Operation

There are two PN junctions, which must be biased with external voltages to cause any
current flow through any of the junctions. Recall from our discussion on semiconductor
diodes that the current flows through a forward-biased PN junction due to the majority

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ELECTRIACL ENGINEERING DEPARTMENT/ BASRA UNIVERSITY
 carriers and the current flows through a reverse-biased PN junction due to the minority
carriers. The NPN and PNP transistors are complementary devices. The principles of
operation using the NPN transistor are explained next, but the same basic principles
and equations also apply to the PNP device. An NPN transistor is connected to two DC-
voltage supplies VBE and VCB in order to cause a current flow. These are known as the
biasing voltages. The transistor can operate in any of the four modes depending on the
biasing conditions: saturation, normal active, cutoff, and inverted. The potential
distribution of the base–emitter (B-E) and the collector–base (C-B) junctions with zero-
biasing conditions of VBE = 0 and VCB = 0 where Vb1 = Vbi(BE) and Vb2=Vbi(CB) are the
built-in potentials of the B-E and C-B junctions, respectively. With zero-biasing
conditions VBE = 0 and VCB = 0, there will be no potentials to overcome the potential
barriers, and there will thus be no current flow through the transistors.

Modes of Operation
Cutoff, Saturation, and Inverse, Active
In the cutoff mode, the B-E junction is either reverse biased, or zero biased, and the B-
C junction is also reverse biased. That is, VBE has negative voltage or zero, and VCB has
a positive voltage. For reverse biased junctions, the minority carrier concentrations are
ideally zero at each depletion edge. The potential barrier heights of both the B-E and
B-C junctions are increased, so there is essentially no charge flow. In the saturation
mode, both junctions are forward biased. The B-E potential barrier is smaller than the
potential barrier of the B-C junction. There is a gradient in the minority carrier
concentration in the base to induce the collector current. Since both junctions are
forward biased, the minority carrier concentrations are greater than the thermal
equilibrium values at the depletion region edges. There will be a net flow of electrons
from the emitter to the collector.
In the inverse-active mode, the B-E junction is reverse biased, and the B-C junction
is forward biased. It is a mirror image of the forward-active mode. The potential barrier
height of the B-E junction will increase while the potential barrier height of the B-C
junction will decrease. Electrons from the collector
will diffuse across the B-C junction into the base and then diffuse into the emitter. The
bipolar transistor is not a symmetrical device and the characteristics will therefore be
different from those of the active-mode operation. The B-C area is normally much
larger than the B-E area, and as a result, not all of the injected electrons will be collected
by the emitter. The relative doping concentrations in the base and collector are also
different compared with those of the base and emitter. Therefore, we expect a
significantly different characteristic between the forward-active and inverse-active
modes of operation. The transistor is not normally operated in this mode.

Input and Output Characteristics

To properly initiate current flow, a transistor must be biased. Figure-3- illustrates an

example of biasing using two DC supplies, VCC and VBB. This arrangement is not used
in practice; it is shown only to illustrate the transistor characteristics. A practical biasing
circuit uses only one DC supply for transistor biasing; this arrangement is discussed
later in this section. RC serves as a load resistance. However, the arrangement shown
in Fig -3- [(a) or (b)] is useful in the development of the concept of transistor models
and signal amplification. Each of the three terminals of a transistor may be classified as

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ELECTRIACL ENGINEERING DEPARTMENT/ BASRA UNIVERSITY
 an input terminal, an output terminal, or a common terminal. There are three possible
configurations: (1) common emitter (CE), in which the emitter is the common terminal;
(2) common collector (CC) or emitter follower, in which the collector is the common
terminal; and (3) common base (CB), in which the base is the common terminal.

iC iC
RC RC

RB iB + +
V RB iB í í
VCC
vCE í CC vEC +
+ í
+ í í +
VBB vBE VBB vEB
iE
í + iE
í +
(a) npnbiasing (b) pnpbiasing

Figure -3- Biasing of transistors

iC
Saturation
region

VCC Active
RC region
Load line,í1/RC
iB
VBB
RB Input IB
characteristic IC Q-point

IB Cutoff
Load line,í1/RB
region

v BE(for npn) v CE(for npn)

0 0
VBE VBB ívBE(for pnp) Vsat VCE VCC ívCE(for pnp)

(a) Input characteristic (b) Output characteristic

Figure -4- Input and output characteristics

The CB configuration is not as commonly used as the other two. A transistor can be
described by two characteristics: an input characteristic and an output characteristic.
The input characteristic is similar to that of a forward-biased diode if the emitter is the
common terminal; the input characteristic for NPN and PNP transistors is shown in
Fig.-4- (a), which can be described mathematically by Eq. (1) as follows:
୍ୡ
‫ܫ‬஻ = --------- (1)
ஒ
Applying Kirchhoff’s voltage law (KVL) as the base loop, we write:
VBB = RBIB + VBE -----------(2)
which can be solved for the base current IB as given by
IB = VBB - VBE / RB -------------(3)
Equation (3), which describes the base load line for the input characteristic as shown in
Fig -4- (a) gives VBE = 0 at IB = VBB / RB and VBE = VBB at IB = 0 . The intersection of
the base load line with the input characteristic gives the base operating point defined by
IB and VBE. Equations (1) and (3) can be solved to find the DC biasing B-E voltage VBE
and also the DC base current IB for known values of VBB and RB.
A typical output characteristic for a BJT is shown in Fig -4- (b). VCE and IC are
positive for NPN transistors and negative for PNP transistors. If the base current IB is
kept constant, then the collector current IC will increase with the C-E voltage VCE until
the collector current saturates that is, reaches a level at which any increase in VCE causes
no significant change in the collector current. The output characteristic may be divided

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ELECTRIACL ENGINEERING DEPARTMENT/ BASRA UNIVERSITY
 into three regions: an active region, a saturation region, and a cutoff region. The
transistor can be used as a switch in the saturation region because VCE is low, typically
0.3 V. In both the active and the saturation region, the B-E junction is forward biased
and VBE §.7. In the active region, 0 < VBE < VCE and VCB (= VCE - VCB ) > 0; that is,
the B-E junction is forward biased, and the C-B junction is reverse biased. All
transistors exhibit a high output impedance (or resistance), described Operation in the
active region can give an amplification of signals with a minimum amount of distortion,
because the output characteristic is approximately linear.
As shown in Fig -4- (b) gives VCE = 0 at IC = VCC »5C and VCE = VCC at IC = 0. The
intersection of the load line with the output characteristic gives the operating point (or
Q-point), which is defined by three parameters: IB, IC, and VCE. Thus, for a given value
of IB, the value of IC can be found, and then the load line gives the value of VCE.

Small-Signal Hybrid Model

The manufacturers of BJTs usually specify the common-emitter hybrid parameters

corresponding to the hybrid model shown in Fig -5-. The parameters are as follows:
(hie =rʌ) is the short-circuit input resistance (or simply the input resistance).
(hfe = ȕ is the short-circuit forward-transfer current ratio (or small-signal current
gain).
(hre) is the open-circuit reverse-voltage ratio (or voltage-feedback ratio), which takes
into account the effect of VCB on IB . This ratio is very small; its value is typically
0.5 × 10ିସ . rµ represents the effect of hre.
(hoe = 1/ro) is the open-circuit output admittance (or simply the output admittance) of
the C-E junction. It is also very small; its value is typically 10 -6 S .
Often hre and hoe can be omitted from a circuit model without significant loss of
accuracy, especially in hand calculations. The subscript e on the h parameters indicates
that these hybrid parameters are derived for a common-emitter configuration.

Figure-5- Small-signal AC model of a BJT

Advantages of Common Emitter Amplifier

™ The common emitter amplifier has a low input impedance and it is an inverting
amplifier.
™ The output impedance of this amplifier is high.
™ This amplifier has highest power gain when combined with medium voltage and
current gain.
™ The current gain of the common emitter amplifier is high.

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ELECTRIACL ENGINEERING DEPARTMENT/ BASRA UNIVERSITY
 Procedures
Design Common Emitter Amplifier
VCC = 12 V

4.7 µF
R1 RC
85 KΩ 916Ω Cc

BC 107
RL
10 KΩ
Vo
R2
Vin AC 15 KΩ 4.7 µF
RE CE
226 Ω

Measuring input and output Characteristics

Range IB IB1 IB2 IB3 IB4 IB5 IB6
(µA)
VCE (Volt) IC 1 (mA) IC 2 (mA) IC 3 (mA) IC 4 (mA) IC 5 (mA) IC 6 (mA)
0 0 0 0 0 0 0
1 1.47 3.04 4.95 6.58 8.21 9.85
2 1.60 3.25 5.05 6.62 8.37 10.17
3 1.63 3.26 5.14 6.72 8.52 10.3
4 1.72 3.33 5.19 6.84 8.69 10.49
5 1.74 3.37 5.27 6.93 8.75 10.6
6 1.74 3.42 5.35 7.06 8.91 10.9
7 1.74 3.55 5.44 7.12 9.11 11.35
8 1.75 3.59 5.47 7.30 9.36 11.61
9 1.77 3.64 5.52 7.44 9.39 11.71
10 1.8 3.64 5.59 7.51 9.51 11.89
Table -1- Output Characteristics
VCE 0.1 V
VBE 0.5 0.535 0.538 0.56 0.57 0.574 0.58 0.586 0.615 0.62 0.63 0.65
IB(µA) 0 0.2 0.3 0.6 0.9 1 1.6 2 4.6 6.5 9.6 19.6
VCE 0.3V
VBE 0.535 0.538 0.56 0.57 0.574 0.58 0.586 0.615 0.62 0.63 0.65 0.66
IB(µA) 0 0.1 0.2 0.3 0.3 0.3 0.5 1.8 2.8 3.7 6.3 9.9
Table -2- Input Characteristics

Design Equations
Given Data
VCC = 12 V , RL = 10.ŸI .+]9L = 2 V

1. Select operating point Q, mark the middle of the DC load line and
corresponding VCEQ , ICQ and IBQ values are determined.
VCEQ = VCC / 2 = 12 / 2 = 6 V
(As in the chart output Characteristics)
At Ic = 0 , the VCE = VCC =12 V
At VCE = 0 , the IC = VCC / RC + RE ,the IC =10.5 mA

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ELECTRIACL ENGINEERING DEPARTMENT/ BASRA UNIVERSITY
 The , VCEQ = 6 V , ICQ = 5.3 mA and IBQ = 15µA
Is calculated hfe and hoe
οூ಴ (ହ.ଷିଵ.଻)×ଵ଴షయ
hfe = = (ଵହିହ)×ଵ଴షల
= 360
οூಳ

οூ (ହ.ଷିଷ.ହ)×ଵ଴షయ
hoe = ο௏ ಴ = = 900 mS
಴ಶ ଼ି଺

2. By choosing drop across RE as 0.1VCC

VE = 0.1 × 12 = 1.2 V
3. Calculate RE
ଵ.ଶ
RE = VE / (IE §,CQ) = ହ.ଷ ×ଵ଴షయ = 226 Ÿ
௏಴಴
4. Calculate RC (from equation ‫ܫ‬஼(௦௔௧) = ோ )
಴ ାோಶ
Where IC(sat) = 10. 5 mA ( From the junction point with the axis IC )
The, RC Ÿ
(ெ ×௏಴಴ )
5. Calculate ID (current resistance base) from equation (‫ܫ‬஽ = (ோ಴ ାோಶ )
)

:KHUH0•
The, ID = 116.75 µA
6. Calculate R1, R2
ܸܿܿ െ ܸ‫ ܧ‬െ ܸ‫ܳܧܤ‬
ܴଵ =
‫ܫ‬஽
Where VBEQ = 0.6 (from the Q-point in the chart input Characteristics)
ଵଶିଵ.ଶି଴.଺
ܴଵ = ଵଵ଺.଻ହ ஜ
NŸ

ܸ‫ ܧ‬+ ܸ‫ܳܧܤ‬
ܴଶ =
‫ܫ‬஽ + ‫ܫ‬஻ொ
Where IBQ = 3.1 µA (from the Q-point in the chart input Characteristics)
ଵ.ଶା଴.଺
ܴଶ = (ଵଵ଺.଻ହାଷ.ଵ)×ଵ଴షల .Ÿ
7. Calculate hie and hre (from the chart input Characteristics)
ο௏ ଴.଺଺ି଴.଺ହ
hie = ಳಶ = (ଵଽ.଺ିଽ.ଽ)×ଵ଴షల .Ÿ
οூಳ

ο௏ ଴.ହଽହି଴.ହ଻ହ
hre = ο௏ಳಶ = ଴.ଷି଴.ଵ
= 100 mS
಴ಶ
8. Assume the values of the capacitor of the emitter and the collector works on
frequency 1KHZ
Cc , CE = 47 µF
9. Calculate gain voltage Av (In practical)
VA = Vo / Vi = 220/6.6 = 34

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ELECTRIACL ENGINEERING DEPARTMENT/ BASRA UNIVERSITY
 10. Measurement of output voltage with frequency change and calculate Gain voltage
™ Practical results :
f (KHZ) .42 .64 .160 .18 .26 .31 .5 1 1.5 2 2.5 3.2 4 10 15
VO (mV) 58 82 154 162 186 195 209 218 220 222 223 223 223 223 223

f(KHZ) 20 26 30 49.2 80 100 120 130 150 160 200 230 240 282 318
VO 223 223 219 219 218 218 217 217 215 213 208 205 203 197 193

f(KHZ) 354 407 510 610 715 809 907 1006 1200 1400 1600 1800 1982

VO 185 177 162 148 135 125 116 107 94.1 84.5 74.1 64.5 55.1

Table -3-
™ Gain voltage (20log(Vo/Vi)) with frequency

f .42 .64 .160 .18 .26 .31 .5 1 1.5 2 2.5 3.2 4 10 26

(KHZ)
AV 18.87 21.88 27.35 28.99 28.99 29.4 30.01 30.37 30.45 30.53 30.57 30.57 30.57 30.57 30.57

f 30 49.2 60 80 100 110 120 140 150 160 180 200 210 220 230
(KHZ)
AV 30.41 30.41 30.41 30.37 30.37 30.37 30.33 30.33 30.25 30.17 30.17 29.97 29.92 29.88 29.84

f 240 282 318 354 407 510 610 715 809 907 1006 1200 1400 1600 1800
(KHZ)
AV 29.75 29.49 29.32 28.95 28.56 27.79 27.01 26.21 25.54 24.89 24.19 23.08 22.14 21.05 19.8

f 1982
(KHZ) Table -4-
AV 18.43

11. Frequency Response Graphic

VA (dB)
35

30

25

20

15

10

frequency (K Hz)
0

1. Fig -6- Frequency Response Graphic

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ELECTRIACL ENGINEERING DEPARTMENT/ BASRA UNIVERSITY
 2. Fig -7- output voltage(CH2) at 1.5 K Hz

Conclusion & Discussion

™ The use of creating a small signal model provides one to more easily determine the
characteristics by inspection. This model allows ease of analysis and provides a
greater understanding of the behavior of BJTs.

™ Amplifier Coupling Capacitors

In Common Emitter Amplifier circuits, capacitor CC are used as Coupling Capacitor
to separate the AC signals from the DC biasing voltage. This ensures that the bias
condition set up for the circuit to operate correctly is not affected by any additional
amplifier stages, as the capacitors will only pass AC signals and block any DC
component. The output AC signal is then superimposed on the biasing of the following
stages. Also a bypass capacitor, CE is included in the Emitter leg circuit.
This capacitor is effectively an open circuit component for DC biasing conditions,
which means that the biasing currents and voltages are not affected by the addition of
the capacitor maintaining a good Q-point stability.
However, this parallel connected bypass capacitor effectively becomes a short circuit
to the Emitter resistor at high frequency signals due to its reactance. Thus only RL plus
a very small internal resistance acts as the transistors load increasing voltage gain to its
maximum. Generally, the value of the bypass capacitor, CE is chosen to provide a
reactance of at most, 1/10 the value of RE at the lowest operating signal frequency.

™ In common emitter connection, when the input signal voltage increases in the
positive sense, the output voltage increases in the negative direction and vice-versa.
In other words, there is a phase difference of 180° between the input and output
voltage in CE connection. This is called phase reversal. The phase difference of
180° between the signal voltage and output voltage in a common emitter amplifier
is known as phase reversal.

™ Where the increase in gain depends on the output resistance (RL) where the output
resistance increases, the gain is greater, and vice versa, the gain is small.

™ At high frequencies (MHz), the common emitter amplifier does not respond.

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ELECTRIACL ENGINEERING DEPARTMENT/ BASRA UNIVERSITY