Study Materials - EDC 01

BJT
Biasing
1
Chapter Objectives
Understand construction and operation of
BJT.
Sketch input and output characteristics
of common-base, common-emitter and
common-collector congurations.
Discuss the need for biasing in BJT circuits
and draw DC load line and quiescent point.
Analyze xed bias, collector to base
bias and voltage-divider bias circuits to
determine Q-point and comment on
stability.
Compare the dierent biasing circuits.
Discuss bias compensation method.
1.1 INTRODUCTION
Transistor was invented by Walter H. Brattain and John Bardeen at Bell Laboratories in 1947.
Transistor replaced vacuum tubes due to smaller size, light weight, less power consumption,
lower operating voltages, etc. Transistors can perform the function of current amplication
and voltage amplication as well as power amplication. The amplication in transistor is ob-
tained by passing the weak signal from low-resistance region to high-resistance region. Hence,
the device is named transistor (transfer resistor).
1.2 BIPOLAR JUNCTION TRANSISTORS
A bipolar junction transistor (BJT) is a three-terminal semiconductor device containing two pn
junctions. When a p-type layer is placed between two n-type layers, an npn transistor is formed.
Similarly, when an n-type layer is placed between two p-type layers, a pnp transistor is formed.
In each type of transistor, the middle region is called base of the transistor and other two
regions are called emitter and collector. The physical size of the collector is greater than both
emitter and base. The emitter is heavily doped while the base is lightly doped. The doping of
the collector is in between that of emitter and base. The pn junction joining the base region and
the emitter region is called the emitter-base junction. The pn junction joining the base region
and the collector region is called collector-base junction. The term bipolar refers to the use
of both holes and electrons as charge carriers in the transistor structure. Figure 1.1 shows the
transistor types and its symbols.
M01_XXXXXXXX_XX_C01.indd 1 19 07 12 3:23 PM
1.2Electronic Circuits I
npn Transistor and Its Symbol
pnp Transistor and Its Symbol
C
B
E
C E
n n
B
p
C E
p p
B
n
C
B
E
Fig. 1.1Transistor Types and Symbols
In the symbols shown in Fig. 1.1, the arrowhead in the emitter indicates the direction of conven-
tional current which is opposite to the ow of electrons. In the npn transistor, conventional current
ows out of emitter, while in the pnp transistor, the conventional current ows into the emitter.
1.3 BJT OPERATION
For proper working of BJT, the emitter-base junction is forward biased by the voltage V
EE
and
collector-base junction is reverse biased by the voltage V
CC
. The forward bias from the base to
the emitter narrows the emitter-base depletion region and the reverse bias from the base to the
collector widens the collector-base depletion region. Figure 1.2 shows the BJT operation with
direction of conventional currents.
n n p
V
EE
V
CC
Fig. 1.2BJT Operation
When the emitter-base junction is forward biased, the large number of majority carriers, i.e.
electrons from the n-type emitter, will get pushed towards the base junction. If the forward-
biased voltage is more than the cut-in voltage (0.7 V for the silicon transistor and 0.3 V for the
germanium transistor), electrons will be diffused into the base junction. Since the base region
is very thin and lightly doped, a very few of the electrons injected into the base recombine
1.4 Common-base Conguration 1.3
with holes. This constitutes the base current I
B
. These diffused electrons are minority carriers
in the base region. The minority carriers can easily cross the reverse-biased junction. Hence,
most of the electrons diffuse to the reverse-biased collector-base junction and are swept across
that junction under the inuence of the electric eld established by V
CC
. This constitutes the
collector current I
C
. Applying Kirchhoffs current law to the transistor, I
E
= I
B
+ I
C
which is
graphically depicted in Fig. 1.3.
n n p
V
EE
V
CC
I
C
I
E
I
B
Fig. 1.3Graphical Depiction of the Relationships Among the Emier, Base and Collector Currents
BJT can be operated in three regions:
(i) Cut-off: In this region, both emitter-base and collector-base junctions are reverse
biased.
(ii) Active: In this region, the emitter-base junction is forward biased and the collector-
base junction is reverse biased.
(iii) Saturation: In this region, both emitter-base and collector-base junctions are forward
biased.
1.4 COMMON-BASE CONFIGURATION
Most of the circuits employing BJT are two-port networks. Since a two-port network has four
terminals and BJT has three terminals, one of the terminals of BJT is made common to input
and output circuits.
In common-base conguration, input is applied between the emitter and the base and output
is taken from the collector and the base. Thus, the base is common to both input and output
circuits as shown in Fig. 1.4.
E C
B B
Input Output
Fig. 1.4Common-base Conguration
Figure 1.5 shows the experimental set-up to draw input and output characteristics in
common-base conguration.
V
mA mA
V
I
E
I
C
V
BE I
B
V
CB
V
CC
V
EE
Fig. 1.5Experimental Set-up to Draw Input and Output Characteristics
1.4.1 Input Characteristics
The input characteristics show the relation between input current I
E
and input voltage V
BE
for
different values of output voltage V
CB
. For a given V
CB
, the input characteristic resembles the
characteristic of forward-biased diode. Input current I
E
increases as input voltage V
BE
increases
for a xed value of V
CB
. For a given value of V
BE
, I
E
increases with increase in V
CB
due to early
effect.
As V
CB
increases, the width of the depletion layer in the base increases. Hence, the width
of the base available for conduction decreases. The reduction in the width of the base due to
increase in reverse bias is known as Early effect. Due to Early effect, the chance of recombi-
nation of electrons with the holes in the base decreases. The base current decreases but more
electrons can travel from emitter to collector terminals. Hence, collector current increases with
increase in emitter current I
E
.
As reverse-biased voltage V
CB
further increases, at one stage the depletion region com-
pletely occupies the base at which the collector-base junction breaks down. This phenom-
enon is known as punch-through. Figure 1.6 shows the input characteristics of common-base
conguration.
Fig. 1.6Input Characteristics
5
4
3
2
1
0.2 0 0.4 0.6 0.8
I
E
(mA)
V
BE
(V)
V
CB
= 20 V
V
CB
= 10 V
V
CB
= 0 V
1.4 Common-base Conguration 1.5
1.4.2 Output Characteristics
The output characteristics show the relation between output current I
C
and output voltage V
CB

for different values of input current I
E
. There are three different regions in output characteristics
as shown in Fig. 1.7.
(i) Cut-off region: In this region, both the junctions are reverse biased. When the
emitter-base junction is reverse biased, the current due to majority carrier, i.e. I
E
, is
zero. Since the collector-base junction is reverse biased, current due to minority car-
riers ows from the collector to the base which is represented as I
CBO
. The current I
CBO

is so small (microamperes) in magnitude compared to the vertical scale of I
C
that it
appears on the same horizontal line as I
C
= 0.
(ii) Active region: In this region, the emitter-base junction is forward biased and the col-
lector-base junction is reverse biased. Once V
CB
reaches a value large enough to ensure
a large portion of electrons enter the collector, collector current I
C
remains constant as
shown by horizontal lines. As I
E
increases, I
C
increases.
(iii) Saturation region: In this region, both the junctions are forward biased. When V
CB

is negative, the collector-base junction is actually forward biased. Thus, graphs are
drawn on the negative side of V
CB
. In this region, there is large change in collector cur-
rent with small increase in voltage V
CB
.
Fig. 1.7Output Characteristics
I
E
= 5 mA
I
E
= 4 mA
I
E
= 3 mA
I
E
= 2 mA
I
E
= 1 mA
I
E
= 0 mA
Cut-off region
Saturation
region
5
4
3
2
1
2 0 4 6 8
I
C
(mA)
V
CB
(V)
Active region
Current amplication factor (): It is dened as the ratio of change in collector current to
the change in emitter current at constant collector-base voltage V
CB
.
AC

I
I
C
E V constant
CB
If only DC values are considered,
DC

I
I
C
E
1.5 COMMON-EMITTER CONFIGURATION
In common-emitter conguration, input is applied between the base and the emitter and output
is taken from the collector and the emitter. Thus, the emitter is common to input and output
circuits as shown in Fig. 1.8.
Fig. 1.8Common-emier Conguration
C
B
E E
Output
Input
Figure 1.9 shows the experimental set-up to draw input and output characteristics in common-
emitter conguration.
I
E
V
I
B
V
BE
V
CC
V
BB
V
V
CE
I
C
A
mA
B
and input voltage V
BE
for
different values of output voltage V
CE
. It resembles the characteristics of the forward-biased
diode. Input current I
B
increases as input voltage V
BE
increases for xed value of V
CE
.
Figure 1.10 shows the input characteristics of common-emitter conguration.
As reverse-biased voltage V
CE
increases, the depletion region in the collector base increases
which decreases the width of the base available for conduction. Hence, I
B
decreases due to
early effect and the graph shifts towards the X-axis.
1.5 Common-emier Conguration 1.7
V
CE
= 0 V
V
CE
= 10 V
V
CE
= 20 V
50
40
30
20
10
0.2 0 0.4 0.6 0.8
I
B
(A)
V
BE
(V)
C
CE

B
. The output characteristic has three different regions as
shown in Fig. 1.11.
I
B
= 50 A
I
B
= 40 A
I
B
= 30 A
I
B
= 20 A
I
B
= 10 A
I
B
= 0 A
0
Cut-off region
Saturation region
I
C
(mA)
V
CE
(V)
5
4
3
2
1
2 4 6 8
Active region
(i) Cut-off region: In this region, both the junctions are reverse biased. When the emit-
ter-base junction is reverse biased, the current due to majority carrier, i.e. I
B
, is zero.
Since the collector-base junction is reverse biased, the current due to minority carriers
ows from the collector to the emitter which is represented as I
CEO
.
(ii) Active region: In this region, the emitter-base junction is forward biased and the col-
lector-base junction is reverse biased. As I
B
is maintained constant, current I
C
increases
as reverse-biased voltage V
CE
increases.
(iii) Saturation region: In this region, both the junctions are forward biased. When V
CE
is
reduced to a small value such as 0.2 V, the collector-base junction is actually forward
biased (V
CB
V
CE
V
BE
0.2 0.7 0.5 V). In this region, there is large change in
collector current I
C
with small change in V
CE
.
Current amplication factor ( ): It is dened as the change in collector current to the
change in base current at constant collector-emitter voltage V
CE
.
AC

I
I
C
B V constant
CE
DC

I
I
C
B
Relation between and
I
E
I
B
+ I
C
Also,
DC

I
I
C
B

I
I I
C
E C

I
I
I
I
1
C
E
C
E

1
DC
DC

_
,
I
I
C
E
DC
If subscript DC is ignored,

1
Collector current I
C
Applying Kirchhoffs current law to the transistor,
I
E
I
B
+ I
C
(1.1)
The collector current I
C
has two components:
(i) the current due to majority carriers, i.e. the fraction of emitter current which reaches
the collector
(ii) the current due to minority carriers, i.e. leakage current which ows due to minority carriers
I
C
I
C

majority
+ I
C

minority
I
E
+ I
CO
(1.2)
1.6 Common-collector Conguration 1.9
For general purpose transistors, I
C
is measured in milliamperes and I
CO
is measured in
microamperes or nanoamperes. I
CO
, like a reverse-biased diode, is temperature dependent and
can be neglected in comparison with I
C
.
Substituting I
E
in Eq. (1.2),
I
C
(I
B
+ I
C
) + I
CO
I
B
+ I
C
+ I
CO
I
C
(1 ) I
B
+ I
CO
I
C

1
I
B
+

1
1
I
CO
I
B
+ ( + 1)I
CO
1.6 COMMON-COLLECTOR CONFIGURATION
In common-collector conguration, input is applied between the base and the collector and
output is taken from the emitter and the collector. Thus, the collector is common to input and
output circuits as shown in Fig. 1.12.
Fig. 1.12Common-collector Conguration
E
B
C C
Output Input
Figure 1.13 shows the experimental set-up to draw input and output characteristics in
common-collector conguration.
I
C
V
I
B
V
BC
V
EE
V
BB
V
V
CE
I
E
A
mA
B
and input voltage V
BC
for different
values of output voltage V
CE
. The input voltage V
BC
is largely determined by the output voltage V
CE
.
Input current I
B
decreases to 0 as input voltage V
CB
increases slightly for xed value of V
CE
.
For transistor,
V
CE
V
BE
+ V
BC

V
BE
V
CE
V
BC

When V
BC
is increased keeping V
CE
constant, V
BE
decreases which decreases I
B
. Therefore, if
the value of V
BC
is allowed to increase to a point where it is near to the value of V
CE
, the value
of V
BE
approaches 0, and no base current will ow. Figure 1.14 shows the input characteristics
of common-collector conguration.
100
80
60
40
20
5 0 10 15
I
B
(A)
V
BC
(V)
V
CE
= 5 V V
CE
= 10 V V
CE
= 15 V
E
CE

B
. Since I
C
is approximately equal to I
E
, the common-
collector output characteristics are identical to those of common-emitter output characteristics.
Figure 1.15 shows the output characteristics of common-collector conguration.
I
B
= 40 A
I
B
= 30 A
I
B
= 20 A
I
B
= 10 A
0
I
E
(mA)
V
CE
(V)
I
B
= 50 A
5
4
3
2
1
Cut-off region
2 4 6 8
Saturation region
Active region
I
B
= 0 A
1.7 Load-line Analysis 1.11
Current amplication factor ( ): It is dened as the ratio of change in emitter current to
the change in base current at constant collector-emitter voltage V
CE
.
AC

I
I
E
B V constant
CE
DC

I
I
E
B
1.7 LOAD-LINE ANALYSIS
The basic function of a transistor is to do amplication. The weak signal is given to the tran-
sistor and amplied output is obtained from the collector. The process of raising the strength
of weak signal without any change in its general shape is known as faithful amplication. A
transistor must be properly biased to operate as an amplier.
Figure 1.16 shows a basic common-emitter amplier. The capacitor C
C
1
is a DC-blocking
capacitor and couples AC input signal to the base of the transistor. The capacitor C
C
2
is used to
couple AC output of the amplier to load R
L
.
Fig. 1.16CE Amplier
V
S
R
S
R
B
R
C
C
C
1
V
o
+V
CC
C
C
2
R
L
DC analysis
For DC, f 0,
X
C

f C
1
2

The DC equivalent circuit is obtained by replacing all capacitors by open circuits as shown
in Fig. 1.17.
Fig. 1.17DC Equivalent Circuit
R
B
R
C
V
BE
V
CE
+V
CC
+
+
I
B
I
C
Load line
Applying Kirchhoffs voltage law to the collector-emitter circuit,
V
CC
I
C
R
C
V
CE
0
I
C

R
1
C
V
CE
+
V
R
CC
C

This equation represents a DC load line with slope of
R
1
C
and y-intercept of
V
R
CC
C
.
When I
C
0, i.e. the transistor is in the cut-off region,
V
CE
V
CC
When V
CE
0, i.e. the transistor is in saturation region,
I
C

V
R
CC
C
Thus two end points are (V
CC
, 0) and
_
,
V
R
0,
CC
C
. A line passing through these points is called
DC load line as the slope of this line depends on the DC load R
C
.
Quiescent point
Applying Kirchhoffs voltage law to the base-emitter circuit,
V
CC
I
B
R
B
V
BE
0
I
B

V V
R
CC BE
B
1.7 Load-line Analysis 1.13
This equation gives the value of base current. For this value of base current, output
characteristic of the amplifier is plotted which intersects the DC load line at Q-point.
Hence, Q-point indicates quiescent (inactive, still) value of collector-emitter voltage V
CE

and collector current I
C
. Figure 1.18 shows the DC load line and Q-point for common-
emitter amplifier.
Fig. 1.18Load Line and Q-point
V
CEQ
0 V
CC
V
CE
V
CC
R
C
I
CQ
I
C
I
BQ
Q
Need for biasing
DC biasing is used to establish proper values of I
C
and V
CE
called the DC operating point or
quiescent point or Q-point. The basic problem involved in the design of transistor circuits
is establishing and maintaining the proper collector-to-emitter voltage and collector current
in the circuit. This condition is known as transistor biasing. The biasing conditions must
be maintained despite variations in temperature, variations in gain and leakage current and
variation in supply voltages. For faithful amplication, the following conditions must be
satised:
(i) Proper zero signal collector current I
C
(ii) Proper base-emitter voltage V
BE
(iii) Proper collector-emitter voltage V
CE
The value of I
C
and V
CE
is expressed in terms of operating point or quiescent point Q. For
faithful amplication, Q-point must be selected properly. The fullment of the above condi-
tions is known as transistor biasing.
While xing the Q-point it has to be seen that the output of the amplier is a proper sinusoidal
waveform for sinusoidal input without distortion. If an amplier is not biased properly, it can
go into saturation or cut-off when an input signal is applied. By xing the Q-point at different
positions, we can observe the variation in collector current and collector-emitter voltage
corresponding to a given variation of base current.
When the Q-point is located in the middle of the DC load line as shown in Fig. 1.19,
sinusoidal waveform without distortion is obtained at the output.
Fig. 1.19Q-point in the Active Region
I
C
V
CC
I
BQ
I
CQ
V
CEQ
V
CE
Q
0
When the Q-point is located near the saturation region as shown in Fig. 1.20, the collector
current is clipped at the positive half cycle because the transistor is driven into saturation.
Fig. 1.20Q-point Near Saturation Region
I
C
V
CC
I
BQ
I
CQ
V
CEQ
V
CE
Q
0
When the Q-point is located near the cut-off region as shown in Fig. 1.21, the collector cur-
rent is clipped at the negative half cycle because the transistor is driven into cut-off.
1.8 Factors Aecting Stability of Q-point1.15
Fig. 1.21Q-point Near Cut-o Region
I
C
V
CC
I
BQ
I
CQ
V
CEQ
V
CE
Q
0
Hence, values of different resistances and voltages must be selected in such a way that the
Q-point should be:
(i) in active region.
(ii) on DC load line.
(iii) selected in middle of the DC load line to avoid clipping of signals.
1.8 FACTORS AFFECTING STABILITY OF Q-POINT
The collector current I
C
depends on reverse saturation current I
CO
, base-emitter voltage V
BE
and
current gain . These parameters are temperature dependent; i.e. as temperature changes, these
parameters change. Hence, collector current I
C
changes. Due to this, the Q-point changes.
Hence, the Q-point has to be stabilized against temperature variation.
(i) I
CO
: The collector current is given by
I
C
I
B
+ ( + 1)I
CO
When a pn junction is reverse biased, there is a small amount of current due to ow
of minority carriers across the junction. Since minority carriers are thermally generated,
reverse saturation current I
CO
is extremely temperature dependent. The reverse satura-
tion current I
CO
doubles for every 10
o
C rise in temperature. The ow of collector current
produces heat at the collector junction. This increases the temperature, therefore reverse
saturation current I
CO
increases. Hence, collector current I
C
again increases. This increase
in I
C
increases the temperature of collector junction which increases I
CO
again. The effect
is cumulative and at one stage I
C
is so large which damages the transistor. This process is
known as thermal runaway and is shown in Fig. 1.22.
TC
I
C
I
CO
P
D
Fig. 1.22Thermal Runaway
(ii) V
BE
: The base-emitter voltage V
BE
decreases at the rate of 2.5 mV/
o
C; i.e. the device
starts operating at lower voltages. Hence, base current I
B
changes. Since I
C
I
B
,
collector current I
C
changes. Figure 1.23 shows the variation of V
BE
with temperature.
0 0.1
100C 25C 69C
0.2 0.3 0.4 0.5
I
C
(mA)
V
BE
(mV)
Fig. 1.23Variation of V
BE
with Temperature
(iii) : The transistor parameter is temperature and device dependent. increases with
the increase in temperature. The value of is different even for transistors of the same
type. If the transistor is replaced by another transistor even of the same type, the value
of is different. Hence, collector current I
C
changes. Figure 1.24 shows the variation
of with temperature.
1.8 Factors Aecting Stability of Q-point1.17
0
100
50
100C
25C
55C
I
C
(mA)
Fig. 1.24Variation in with Temperature
Table 1.1 shows typical parameters of silicon transistor at different temperatures. From this
table, it is clear that as temperature changes, I
CO
, V
BE
and change. Hence, collector current I
C

changes with the change in temperature.
Table 1.1Typical Parameters of Silicon Transistor
t C 65 25 175
I
CO
, A 1.95 10
3
1 33,000
V
BE
, V 0.78 0.6 0.225
25 55 100
There are two methods to stabilize variation in I
C
with these parameters:
(i) Thermal stabilization: In this method, resistive biasing circuits are used which allow
I
B
to vary so as to keep I
C
relatively constant with variations in I
CO
, V
BE
and . There
are three congurations to bias the BJT:
Fixed bias
Collector-to-base bias
Voltage-divider bias
This process of stabilizing Q-point is called thermal stabilization.
(ii) Bias compensation: In this method, temperature-sensitive devices such as diodes,
transistors, thermistors, sensistors etc. are used which provide compensating voltage
and current to stabilize variations in I
C
with V
BE
and I
CO
.
1.8.1 Stability Factors
The rate of change of collector current with respect to collector leakage current I
CO
at constant
V
BE
and is called stability factor.
S
I
I
C
CO V and constant
BE
I I
I I
C C
CO CO
V and constant
BE
2 1
2 1
The rate of change of collector current with respect to V
BE
at constant I
CO
and is called
stability factor S .
S
I
V
C
BE I and constant
CO
I I
V V
C C
BE BE
I and constant
CO
2 1
2 1
The rate of change of collector current with respect to b at constant I
CO
and V
BE
is called
stability factor S .
S
I
C
I V and constant
CO BE

I I
C C
I V
2 1
and constant
CO BE
2 1
The larger the value of stability factor, the more sensitive is the circuit to variations in that
parameter.
The total change in collector current over a specied temperature range is obtained by ex-
pressing this change as the sum of individual changes due to three stability factors.
I
C
S I
CO
+ S V
BE
+ S
1.9 FIXED-BIAS CIRCUIT
Figure 1.25 shows a xed-bias circuit. It is the simplest transistor DC bias conguration.
Fig. 1.25Fixed-bias Circuit
V
S
R
S
R
B
R
C
C
C
1
V
o
+V
CC
C
C
2
R
L
DC analysis
For DC, f 0,
X
C

f C
1
2

1.9 Fixed-bias Circuit1.19
in Fig. 1.26.
R
B
R
C
V
BE
V
CE
+V
CC
+
+
I
B
I
C
Collector current I
C
V
CC
I
B
R
B
V
BE
0
I
B

V V
R
CC BE
B

For the base-emitter circuit, the net voltage is V
CC
V
BE
and the resistance is R
B
. When V
CC

and R
B
are selected for a circuit, I
B
is xed. Hence, the circuit is called xed-bias circuit.
I
C
I
B

V V
R
CC BE
B

_
,

The base current is controlled by the value of R
B
, and I
C
is related to I
B
by a constant . But
C
is not a function of resistor R
C
. Change in R
C
will not affect the value of I
B
or
C
in the active
region of the transistor. But change in R
C
will affect the value of V
CE
.
Collector-emitter voltage V
CE

V
CC
I
C
R
C
V
CE
0
V
CE
V
CC
I
C
R
C
Load-line analysis
V
CC
I
C
R
C
V
CE
0
I
C

R
1
C
V
CE
+
V
R
CC
C

R
1
C
and y-intercept of
V
R
CC
C
.
When I
C
0, i.e. transistor is in cut-off region,
V
CE
V
CC
When V
CE
0, i.e. transistor is in saturation region,
I
C

V
R
CC
C
Thus, two end points are (V
CC
, 0) and
_
,
V
R
0,
CC
C
. By joining these two end points, a DC
load line is drawn.
From the base-emitter circuit,
I
B

V V
R
CC BE
B
For this value of base current, we can establish the actual Q-point as shown in Fig. 1.27.
V
CEQ
0 V
CC
V
CE
V
CC
R
C
I
CQ
I
C
I
BQ
Q
From the Fig. 1.27, it is clear that the saturation current for the circuit is I
C

sat

V
R
CC
C
. This is
the resulting current when a short circuit is applied between collector-emitter terminals.
Stability factors
V
CC
I
B
R
B
V
BE
0
I
B

V V
R
CC BE
B
We know that
I
C
I
B
+ ( + 1)I
CO

_
,
V V
R
CC BE
B
+ ( + 1)I
CO

V
R
CC
B

V
R
BE
B
+ ( + 1)I
CO
(1.3)
From Eq. (1.3), it is clear that collector current I
C
is function of I
CO
, V
BE
and .
(a) Stability factor S: When I
CO
changes from I
CO
1
to I
CO
2
, I
C
changes from I
C
1
to I
C
2
.
From Eq. (1.3), at t
1
C,
I
C
1

V
R
CC
B

V
R
BE
B
+ ( + 1)I
CO
1
(1.4)
At t
2
C,
I
C
2

V
R
CC
B

V
R
BE
B
+ ( + 1)I
CO
2
(1.5)
Subtracting Eq. (1.4) from Eq. (1.5),
I
C
2
I
C
1
( + 1)(I
CO
2
I
CO
1
)
I I
I I
C C
CO CO
2 1
2 1
+ 1
S
I
I
C
CO
+ 1
(b) Stability factor S : When V
BE
changes from V
BE
1
to V
BE
2
, I
C
changes from I
C
1
to I
C
2
.
1
C,
I
C
1

V
R
CC
B

V
R
BE
B
1
+ ( + 1)I
CO
(1.6)
At t
2
C,
I
C
2

V
R
CC
B

V
R
BE
B
2
+ ( + 1)I
CO
(1.7)
I
C
2
I
C
1

R
B
(V
BE
2
V
BE
1
)
I I
V V
C C
BE BE
2 1
2 1
R
B

S
I
V
C
BE

R
B
(c) Stability factor S: From Eq. (1.3),
I
C

V
R
CC
B

V
R
BE
B
+ I
CO
[ ( + 1) ]

+ V V I R
R
( )
CC BE CO B
B
When changes from
1
to
2
, I
C
changes from
1
to
2
.
At t
1
C,
I
C
1

+
1
V V I R
R
( )
CC BE CO B
B
(1.8)
At t
2
C,
I
C
2

+
2
V V I R
R
( )
CC BE CO B
B
(1.9)
I
I
C
C
2
1

2
1
Subtracting one from both the sides,
I
I
C
C
2
1
1
2
1
1
I I
I
C C
C
2 1
1

2 1
1

2 1
I I
C C
2 1

1
I
C
1
S
I
C

1
I
C
1
Example 1.1: For the circuit shown in Fig. 1.28, nd I
C
, V
CE
and S.
Fig. 1.28Example 1.1
500 k 3 k
100
+10 V
Solution:
(i) Applying Kirchhoffs voltage law to the base-emitter circuit,
V
CC
I
B
R
B
V
BE
0
I
B

V V
R
CC BE
B

10 0.7
500 10
3
18.6 A
I
C
I
B
100 18.6 10
6
1.86 mA
(ii) Applying Kirchhoffs voltage law to the collector-emitter circuit,
V
CC
I
C
R
C
V
CE
0
V
CE
V
CC
I
C
R
C
10 1.86 10
3
3 10
3
4.42 V
(iii) S + 1 100 + 1 101
Example 1.2: For the circuit shown in Fig. 1.29, nd R
B
and R
C
with I
C
2 mA, V
CE
6 V,
V
CC
12 V and 100.
R
B
R
C
+12 V
Solution:
(i) I
B

I
C

2 10
100
3
20 A
V
CC
I
B
R
B
V
BE
0
R
B

V V
I
CC BE
B

12 0.7
20 10
6
566 k
V
CC
I
C
R
C
V
CE
0
R
C

V V
I
CC CE
C

12 6
2 10
3
3 k
Example 1.3: For a xed-bias circuit shown in Fig. 1.30, determine R
B
, I
C
, R
C
and V
CE
where
V
CC
= 12 V, V
C
= 6 V, = 80 and I
B
= 40 A.
R
B
R
C
V
C
+12 V
Solution:
V
CC
I
B
R
B
V
BE
0
R
B

V V
I
CC BE
B

12 0.7
40 10
6
282.5 k
(ii) I
C
I
B
80 40 10
6
3.2 mA
(iii) Applying Kirchhoffs voltage law to the collector-emitter circuit,
V
CC
I
C
R
C
V
C
0
R
C

V V
I
CC C
C

12 6
3.2 10
3
1.875 k
(iv) V
CE
V
C
6 V
Example 1.4: Using a CE amplier with xed bias, where I
B
= 20 A, I
E
= 4 mA, V
CE
= 7.2 V
and R
C
= 2.2 k, determine I
C
, V
CC
, and R
B
(Fig. 1.31).
R
B
2.2 k
+V
CC
Solution:
(i) I
E
I
B
+ I
C
I
C
I
E
I
B

4 10
3
20 10
6
3.98 mA
V
CC
I
C
R
C
V
CE
0
V
CC
I
C
R
C
+ V
CE
3.98 10
3
2.2 10
3
+ 7.2
15.96 V
(iii)
I
I
C
B

3.98 10
20 10
3
6
199
(iv) Applying Kirchhoffs voltage law to the base-emitter circuit,
V
CC
I
B
R
B
V
BE
0
R
B

V V
I
CC BE
B

15.96 0.7
20 10
6
762.8 k
Example 1.5: For the xed-bias circuit, where = 0.98, I
CBO
= 10 A, R
C
= 4 k, R
B
= 820 k,
V
CC
= 12 V, nd I
C
and V
CE
(Fig. 1.32).
820 k 4 k
+12 V
Solution:
(i)
0.98
1 0.98
49
V
CC
I
B
R
B
V
BE
0
I
B

V V
R
CC BE
B

12 0.7
820 10
3
13.78 A
I
C
I
B
+ ( + 1)I
CBO
49 13.78 10
6
+ (49 + 1) 10 10
6
1.17 mA
V
CC
I
C
R
C
V
CE
0
V
CE
V
CC
I
C
R
C
12 1.17 10
3
4 10
3
7.3 V
Example 1.6: Determine the percentage change in I
C
and V
CE
for the circuit shown in Fig. 1.33
when changes from 90 to 135.
470 k 2.7 k
+16 V
Solution:
(a) For 90
V
CC
I
B
R
B
V
BE
0
I
B

V V
R
CC BE
B

16 0.7
470 10
3
32.55 A
I
C
I
B
90 32.55 10
6
2.93 mA
V
CC
I
C
R
C
V
CE
0
V
CE
V
CC
I
C
R
C

16 2.93 10
3
2.7 10
3

8.09 V
(b) For 135
I
B
32.55 A
I
C
I
B
135 32.55 10
6
4.39 mA
V
CE
V
CC
I
C
R
C

16 4.39 10
3
2.7 10
3

4.15 V
(i) % I
C

4.39 10 2.93 10
2.93 10
3 3
3
100
49.83%
(ii) % V
CE

4.15 8.09
8.09
100
48.70%
When increases by 50%, I
C
increases by 49.83% and V
CE
decreases by 48.70%.
Example 1.7: For the xed-bias conguration of Fig. 1.33, determine (i) S, (ii) S, (iii) S
when increases by 25% and (iv) the net change in I
C
if a change in operating conditions
results in I
CO
increasing from 0.2 A to 10 A, V
BE
drops from 0.7 V to 0.5 V, and increases
by 25%.
Solution:
1
90
2
25% more than
1
112.5
I
C
1
2.93 mA (from Example 1.6)
(i) S
1
+ 1 90 + 1 91
(ii) S
R
B
1

90
470 10
3
1.91 10
4
(iii) S
I
C
1
1

2.93 10
90
3
32.56 10
6
A
(iv) I
C
S I
CO
+ S V
BE
+ S
91 (10 10
6
0.2 10
6
) + (1.91 10
4
)(0.5 0.7) + (32.56 10
6
)(112.5 90)
91 9.8 10
6
+ 1.91 10
4
0.2 + 32.56 10
6
22.5
1.66 mA
1.10 MODIFIED FIXED-BIAS CIRCUIT
The xed-bias circuit has higher thermal instability. The stability can be improved by using
the emitter resistor R
E
which is connected between emitter and ground. Figure 1.34 shows a
modied xed-bias circuit. This circuit is also called an emitter feedback bias circuit.
Fig. 1.34Modied Fixed-bias Circuit
V
S
R
S
R
E
C
E
R
B
R
C
C
C
1
V
o
+V
CC
C
C
2
R
L
DC analysis
For DC, f 0,
X
C

f C
1
2

in Fig. 1.35.
R
B
R
C
R
E
V
BE
V
CE
+V
CC
+
+
I
B
I
C
I
E
1.10 Modied Fixed-bias Circuit1.31
Collector current I
C
V
CC
I
B
R
B
V
BE
I
E
R
E
0
V
CC
I
B
R
B
V
BE
( + 1)I
B
R
E
0
I
B

+ +
V V
R R ( 1)
CC BE
B E

The emitter resistor, which is the part of the collector-emitter circuit, appears as ( + 1)R
E
in
the base-emitter circuit. For the base-emitter circuit, the net voltage is V
CC
V
BE
and the total
resistance is the sum of R
B
and the reected resistance ( + 1)R
E
.
I
C
I
B

V V
R R ( 1)
CC BE
B E
+ +
1
]
1
CE
V
CC
I
C
R
C
V
CE
I
E
R
E
0
V
CC
I
C
R
C
V
CE
(I
B
+ I
C
)R
E
0
V
CE
V
CC
I
C
R
C
(I
B
+ I
C
)R
E
Load-line analysis
V
CC
I
C
R
C
V
CE
I
E
R
E
0
Assuming I
E
I
C,
V
CC
I
C
(R
C
+ R
E
) V
CE
0
I
C

+ R R
1
C E
V
CE
+
+
V
R R
CC
C E

+ R R
1
C E
and y-intercept of
+
V
R R
CC
C E
.
When I
C
V
CE
V
CC
When V
CE
I
C

+
V
R R
CC
C E
CC
, 0) and
+
_
,
V
R R
0,
CC
C E
load line is drawn.
I
B

+ +
V V
R R ( 1)
CC BE
B E
V
CEQ
V
CC
V
CE
V
CC
R
C
+ R
E
I
CQ
I
C
I
BQ
Q
0
C

sat

+
V
R R
CC
C E
.
This is the resulting current when a short circuit is applied between collector-emitter terminals.
The addition of emitter resistor reduces the collector saturation level below that obtained with
a xed-bias conguration using the same collector resistor.
Stability of Q-point
V
CC
I
B
R
B
V
BE
I
E
R
E
0
V
CC
I
B
R
B
V
BE
(I
B
+ I
C
)R
E
0
V
CC
I
B
R
B
V
BE
I
B
R
E
I
C
R
E
0
I
B

+
V V I R
R R
CC BE C E
B E
If reverse saturation current I
CO
increases, collector current I
C
increases. It will cause
voltage drop across R
E
to increase which decreases base current I
B
. As I
C
depends on
I
B
, decrease in I
B
reduces the original increase in I
C
. Hence, variation in I
C
with I
CO
is
minimized and stability of Q-point is achieved.
(ii) From the base-emitter circuit,
I
B

+ +
V V
R R ( 1)
B BE
B E
Generally,
( + 1)R
E
>> R
B
R
E
>> R
B
I
B

V V
R
B BE
E
I
C
I
B

V V
R
B BE
E
_
,

V V
R
B BE
E
Hence, I
C
is independent of the value of . Variation in I
C
with is minimized and stability
of Q-point is achieved.
Stability factors
V
CC
I
B
R
B
V
BE
I
E
R
E
0
V
CC
I
B
R
B
V
BE
(I
B
+ I
C
)R
E
0
V
CC
I
B
R
B
V
BE
I
B
R
E
I
C
R
E
0
I
B

V V I R
R R
CC BE C E
B E

+
We know that,
I
C
I
B
+ ( + 1)I
CO

V V I R
R R
CC BE C E
B E

+
_
,
+ ( + 1)I
CO
I
C

R
R R
1
E
B E
+
+
_
,

V
R R
CC
B E
+

V
R R
BE
B E
+
+ ( + 1)I
CO
(1.10)
C
is function of I
CO
, V
BE
and .
CO
changes from I
CO
1
to I
CO
2
, I
C
changes from I
C
1
to I
C
2
.
1
C,
I
C
1

R
R R
1
E
B E
+
+
_
,

V
R R
CC
B E
+

V
R R
BE
B E
+
+ ( + 1)I
CO
1
(1.11)
At t
2
C,
I
C
2

R
R R
1
E
B E
+
+
_
,

V
R R
CC
B E
+

V
R R
BE
B E
+
+ ( + 1)I
CO
2
(1.12)
(I
C
2
I
C
1
)
R
R R
1
E
B E
+
+
_
,
( + 1)(I
CO
2
I
CO
1
)
I I
I I
C C
CO CO
2 1
2 1

R
R R
1
1
E
B E
+
+
+

S
I
I
C
CO

R
R R
1
1
E
B E
+
+
+
(b) Stability factor S : When V
BE
changes from V
BE
1
to V
BE
2
, I
C
changes from I
C
1
to I
C
2
.
1
C,
I
C
1

R
R R
1
E
B E
+
+
_
,

V
R R
CC
B E
+

V
R R
BE
B E
1
+
+ ( + 1)I
CO
(1.13)
At t
2
C,
I
C
1

R
R R
1
E
B E
+
+
_
,

V
R R
CC
B E
+

V
R R
BE
B E
2
+
+ ( + 1)I
CO
(1.14)
(I
C
2
I
C
1
)
R
R R
1
E
B E
+
+
_
,

R R
B E
+
(V
BE
2
V
BE
1
)
I I
V V
C C
BE BE
2 1
2 1

R R
R
R R
1
B E
E
B E
+
+
+


R R R
B E E
+ +

R R ( 1)
B E
+ +
S
I
V
C
BE

R R ( 1)
B E
+ +
I
C

R
R R
1
E
B E
+
+
_
,

V
R R
CC
B E
+

V
R R
BE
B E
+
+ I
CO
[ ( + 1) ]
I
C

R R
R R
( 1)
B E
B E
+ +
+
1
]
1

V V I R R
R R
[ ( )]
CC BE CO B E
B E
+ +
+

I
C

V V I R R
R R
[ ( )]
(
CC BE CO B E
B E
+ +
+ +1)

When changes from
1
to
2
, I
C
changes from I
C
1
to I
C
2
.
At t
1
C,
I
C
1

V V I R R
R R
[ ( )]
( 1)
CC BE CO B E
B E
1
1
+ +
+
(1.15)
At t
2
C,
I
C
2

V V I R R
R R
[ ( )]
( 1)
CC BE CO B E
B E
2
2
+ +
+
(1.16)
I
I
C
C
2
1

R R
R R
[ ( 1) ]
[ ( 1) ]
B E
B E
2 1
1 2

+ +
+ +
Subtracting 1 from both the sides,
I
I
C
C
2
1
1
R R
R R
[ ( 1) ]
[ ( 1) ]
B E
B E
2 1
1 2

+ +
+ +
1
I I
I
C C
C
2 1
1

R R R R
R R
[ ( 1) ] [ ( 1) ]
[ ( 1) ]
B E B E
B E
2 1 1 2
1 2

+ + + +
+ +


R R R R R R
R R [ ( 1) ]
B E E B E E
B E
2 1 2 2 1 1 2 1
1 2

+ +
+ +

R R R R
R R
( ) ( )
[ ( 1) ]
B E B E
B E
2 1
1 2

+ +
+ +

R R
R R
( )( )
[ ( 1) ]
B E
B E
2 1
1 2

+
+ +

I I
C C
2 1
2 1

I
C
1
1

R R
R R ( 1)
B E
B E 2
+
+ +
S
I
C

I
C
1
1

R R
R R ( 1)
B E
B E 2
+
+ +
C
, V
CE
and S.
220 k 1 k
1 k
+10 V
100
Solution:
V
CC
I
B
R
B
V
BE
I
E
R
E
0
V
CC
I
B
R
B
V
BE
( + 1)I
B
R
E
0
I
B

V V
R R ( 1)
CC BE
B E
+ +

10 0.7
220 10 (100 1)(1 10 )
3 3
+ +
28.9 A
I
C
I
B
100 28.9 10
6
2.89 mA
V
CC
I
C
R
C
V
CE
I
E
R
E
0
V
CC
I
C
R
C
V
CE
(I
B
+ I
C
)R
E
0
V
CE
V
CC
I
C
R
C
(I
B
+ I
C
)R
E
10 2.89 10
3
1 10
3
(28.9 10
6
+ 2.89 10
3
)(1 10
3
)
4.19 V
(iii) S
R
R R
1
1
E
B E
+
+
+

100 1
1
100 1 10
220 10 1 10
3
3 3
+
+

+
69.53
Example 1.9: In the circuit shown in Fig. 1.38, nd R
C
, V
CE
, R
B
, V
B
and R
E
.
R
B
R
C
80
+12 V
V
C
V
B
V
E
R
E
I
C
2 mA
V
E
2.4 V
V
C
7.6 V
Solution:
(i) Applying Kirchhoffs voltage law to the collector circuit,
V
CC
I
C
R
C
V
C
0
R
C

V V
I
CC C
C

12 7.6
2 10
3
2.2 k
V
CC
I
C
R
C
V
CE
V
E
0
V
CE
V
CC
I
C
R
C
V
E
12 2 10
3
2.2 10
3
2.4
5.2 V
(iii) I
B

I
C

2 10
80
3
25 A
V
CC
I
B
R
B
V
BE
V
E
0
R
B

V V V
I
CC BE E
B

12 0.7 2.4
25 10
6

356 k
(iv) V
B
V
BE
+ V
E
0.7 + 2.4 3.1 V
(v) I
E
I
B
+ I
C
25 10
6
+ 2 10
3
2.025 mA
R
E

V
I
E
E

2.4
2.025 10
3
1.185 k
C
and R
B
such that V
CE
= 5 V, I
C
= 2 mA,
V
CC
= 10 V, = 100 and R
E
= 1 k.
R
B
R
C
1 k
+10 V
Solution:
(i) I
B

I
C

2 10
100
3
20 A
V
CC
I
C
R
C
V
CE
I
E
R
E
0
V
CC
I
C
R
C
V
CE
(I
B
+ I
C
)R
E
0
R
C

V V I I R
I
( )
CC CE B C E
C
+

10 5 (20 10 2 10 )(1 10 )
2 10
6 3 3
3
+
1.49 k
(ii) Applying Kirchhoffs voltage law to the base-emitter circuit,
V
CC
I
B
R
B
V
BE
I
E
R
E
0
V
CC
I
B
R
B
V
BE
(I
B
+ I
C
)R
E
0
R
B

V V I I R
I
( )
CC BE B C E
B
+

10 0.7 (20 10 2 10 )(1 10 )
20 10
6 3 3
6
+
364 k
C
and V
CE
for the circuit shown in
Fig. 1.40 when changes from 100 to 150.
510 k 2.4 k
1.5 k
+20 V
Solution:
(a) For 100
V
CC
I
B
R
B
V
BE
I
E
R
E
0
V
CC
I
B
R
B
V
BE
( + 1)I
B
R
E
0
I
B

V V
R R (
CC BE
B E
+ +1)

20 0.7
510 10 (100 (1.5 10 )
3 3
+ +1)
29.18 A
I
C
I
B
100 29.18 10
6
2.92 mA
V
CC
I
C
R
C
V
CE
I
E
R
E
0
V
CC
I
C
R
C
V
CE
(I
B
+ I
C
)R
E
0
V
CE
V
CC
I
C
R
C
(I
B
+ I
C
)R
E
20 2.92 10
3
2.4 10
3
(29.18 10
6
+ 2.92 10
3
)(1.5 10
3
)
8.57 V
(b) For 150
I
B

V V
R R (
CC BE
B E
+ +1)

20 0.7
510 10 (150 1.5 10
3 3
+ +1)
26.21 A
I
C
I
B
150 26.21 10
6
3.93 mA
V
CE
V
CC
I
C
R
C
(I
B
+ I
C
)R
E
20 3.93 10
3
2.4 10
3
(26.21 10
6
+ 3.93 10
3
)(1.5 10
3
)
4.63 V
(i) % I
C

3.93 10 2.92 10
2.92 10
3 3
3

100
34.59%
(ii) % V
CE

4.63 8.57
8.57
100
45.97%
C
CE
Example 1.12: For the circuit of the Fig. 1.40, determine (i) S, (ii) S, (iii) S when increases
by 25% and (iv) the net change in I
C
if a change in operating condition results in I
CO
increasing
from 0.2 A to 10 A, V
BE
drops from 0.7 V to 0.5 V, and increases by 25%.
Solution:
1
100
2
25% more than
1
125
I
C
1
2.92 mA (From Example 1.11)
(i) S
R
R R
1
1
E
B E
+
+
+

100 1
1
100 1.5 10
510 10 1.5 10
3
3 3
+
+

+
78.1
(ii) S
R R ( 1)
B E
+ +

100
510 10 (100 1)(1.5 10 )
3 3
+ +
1.512 10
4
(iii) S
I
C
1
1

R R
R R ( 1)
B E
B E 2
+
+ +

2.92 10
100
3

510 10 1.5 10
510 10 (125 1)(1.5 10 )
3 3
3 3
+
+ +

21.37 10
6
A
(iv) I
C
S I
CO
+ S V
BE
+ S
78.1(10 10
6
0.2 10
6
) + (1.512 10
4
)(0.5 0.7) + (21.37 10
6
)(125 100)
78.1 9.8 10
6
+ 1.512 10
4
0.2 + 21.37 10
6
25
1.33 mA
1.11 COLLECTOR-TO-BASE BIAS CIRCUIT
The stability can be improved if the resistor R
B
is returned to the collector terminal rather than to
the battery terminal. Figure 1.41 shows a collector-to-base bias circuit. In this method, resistor
R
B
is connected between the base and the collector. Hence, the circuit is called collector-
to-base bias circuit. Although the Q-point is not totally independent of , the sensitivity to
changes in or temperature variations is normally less than encountered for xed-bias or
modied xed-bias or emitter feedback bias congurations.
Fig. 1.41Collector-to-base Bias Circuit
V
S
R
S
R
B
R
C
C
C
1
V
o
+V
CC
C
C
2
R
L
DC analysis
For DC, f 0,
X
C

f C
1
2

in Fig. 1.42.
R
B
V
CE
R
C
V
BE
+V
CC
+
+
I
B
I
B
+ I
C
I
C
1.11 Collector-to-base Bias Circuit1.43
Collector current I
C
V
CC
(I
B
+ I
C
)R
C
I
B
R
B
V
BE
0
V
CC
( +1)I
B
R
C
I
B
R
B
V
BE
0
I
B

V V
R R ( )
CC BE
B C
+ +1

The collector resistor, which is the part of the collector-emitter circuit, appears as ( +1)R
C

in the base-emitter circuit. For the base-emitter circuit, the net voltage is V
CC
V
BE
and the total
B
and the reected resistance ( +1)R
C
.
I
C
I
B

+ +1
1
]
1
V V
R R ( )
CC BE
B C
CE
V
CC
(I
B
+ I
C
)R
C
V
CE
0
V
CE
V
CC
(I
B
+ I
C
)R
C
Load-line analysis
V
CC
(I
B
+ I
C
)R
C
V
CE
0
Assuming I
B
+ I
C
I
C,
V
CC
I
C
R
C
V
CE
0
I
C

R
1
C
V
CE
+
V
R
CC
C

R
1
C
and y-intercept of
V
R
CC
C
.
When I
C
V
CE
V
CC
When V
CE
I
C

V
R
CC
C
CC
, 0) and
V
R
0,
CC
C
_
,
. By joining these two end points, a DC load

line is drawn.
I
B

V V
R R ( )
CC BE
B C
+ +1
Fig. 1.43Load line and Q-point
V
CEQ
0 V
CC
V
CE
V
CC
R
C
I
CQ
I
C
I
BQ
Q
C

sat

V
R
CC
C
. This is
the resulting current when a short circuit is applied between collector-emitter terminals.
V
CC
(I
B
+ I
C
)R
C
I
B
R
B
V
BE
0
V
CC
I
B
R
C
I
C
R
C
I
B
R
B
V
BE
0
I
B

V V I R
R R
CC BE C C
B C

+
CO
C
voltage drop across R
C
to increase which decreases base current I
B
. As I
C
depends on I
B
,
decrease in I
B
C
C
with I
CO
is mini-
mized and stability of Q-point is achieved.
I
B

V V
R R ( )
CC BE
B C
+ +1
Generally,
( + 1)R
C
>> R
B
R
C
>> R
B
I
B

V V
R
B BE
C
I
C
I
B

V V
R
B BE
C
_
,

V V
R
B BE
C
Hence, I
C
C
Stability factors
V
CC
(I
B
+ I
C
)R
C
I
B
R
B
V
BE
0
V
CC
I
B
R
C
I
C
R
C
I
B
R
B
V
BE
0
I
B

V V I R
R R
CC BE C C
B C

+
We know that,
I
C
I
B
+ ( + 1)I
CO

V V I R
R R
CC BE C C
B C

+
_
,
+ ( + 1)I
CO
I
C

R
R R
1
C
B C
+
+
_
,

V
R R
CC
B C
+

V
R R
BE
B C
+
+ ( + 1)I
CO
(1.17)
C
is function of I
CO
, V
BE
and .
CO
changes from I
CO
1
to I
CO
2
, I
C
changes from I
C
1
to I
C
2
.
1
C,
I
C
1
R
R R
1
C
B C
+
+
_
,

V
R R
CC
B C
+

V
R R
BE
B C
+
+ ( + 1)I
CO
1
(1.18)
At t
2
C,
I
C
2

R
R R
1
C
B C
+
+
_
,

V
R R
CC
B C
+

V
R R
BE
B C
+
+ ( + 1)I
CO
2
(1.19)
(I
C
2
I
C
1
)
R
R R
1
C
B C
+
+
_
,
( + 1)(I
CO
2
I
CO
1
)
I I
I I
C C
CO CO
2 1
2 1

R
R R
1
1
C
B C
+
+
+

S
I
I
C
CO

R
R R
1
1
C
B C
+
+
+
(b) Stability factor S: When V
BE
changes from V
BE
1
to V
BE
2
, I
C
changes from I
C
1
to I
C
2
.
1
C,
I
C
1

R
R R
1
C
B C
+
+
_
,

V
R R
CC
B C
+

V
R R
BE
B C
1
+
+ ( + 1)I
CO
(1.20)
At t
2
C,
I
C
2

R
R R
1
C
B C
+
+
_
,

V
R R
CC
B C
+

V
R R
BE
B C
2
+
+ ( + 1)I
CO
(1.21)
(I
C
2
I
C
1
)
R
R R
1
C
B C
+
+
_
,

R R
B C
+
(V
BE
2
V
BE
1
)
I I
V V
C C
BE BE
2 1
2 1

R R
R
R R
1
B C
C
B C
+
+
+

R R R
B C C
+ +

R R ( 1)
B C
+ +
S
I
V
C
BE

R R ( 1)
B C
+ +
I
C

R
R R
1
C
B C
+
+
_
,

V
R R
CC
B C
+

V
R R
BE
B C
+
+ I
CO
[ ( + 1) ]
I
C

R R
R R
( 1)
B C
B C
+ +
+
1
]
1

V V I R R
R R
[ ( )]
CC BE CO B C
B C
+ +
+

I
C

V V I R R
R R
[ ( )]
(
CC BE CO B C
B C
+ +
+ +1)

When changes from
1
to
2
, I
C
changes from I
C
1
to I
C
2
.
At t
1
C,
I
C
1

V V I R R
R R
[ ( )]
( 1)
CC BE CO B C
B C
1
1
+ +
+
(1.22)
At t
2
C,
I
C
2

V V I R R
R R
[ ( )]
( 1)
CC BE CO B C
B C
2
2
+ +
+
(1.23)
I
I
C
C
2
1

R R
R R
[ ( 1) ]
[ ( 1) ]
B C
B C
2 1
1 2

+ +
+ +
I
I
C
C
2
1
1
R R
R R
[ ( 1) ]
[ ( 1) ]
B C
B C
2 1
1 2

+ +
+ +
1
I I
I
C C
C
2 1
1

R R R R
R R
[ ( 1) ] [ ( 1) ]
[ ( 1) ]
B C B C
B C
2 1 1 2
1 2

+ + + +
+ +

R R R R R R
R R [ ( 1) ]
B C C B C C
B C
2 1 2 2 1 1 2 1
1 2

+ +
+ +


R R R R
R R
( ) ( )
[ ( 1) ]
B C B C
B C
2 1
1 2

+ +
+ +

R R
R R
( )( )
[ ( 1) ]
B C
B C
2 1
1 2

+
+ +

I I
C C
2 1
2 1

I
C
1
1

R R
R R ( 1)
B C
B C 2
+
+ +
S
I
C

I
C
1
1

R R
R R ( 1)
B C
B C 2
+
+ +
Example 1.13: For the circuit shown in Fig. 1.44, determine I
C
, V
CE
and stability factor S.
500 k
= 100
3 k
+10 V
Solution:
V
CC
(I
B
+ I
C
)R
C
I
B
R
B
V
BE
0
V
CC
( + 1)I
B
R
C
I
B
R
B
V
BE
0
I
B

V V
R R ( 1)
CC BE
B C
+ +

10 0.7
500 10 (100 1)(3 10 )
3 3
+ +
11.58 A
I
C
I
B
100 11.58 10
6
1.158 mA
V
CE
V
CC
(I
B
+ I
C
)R
C
10 (11.58 10
6
+ 1.158 10
3
) (3 10
3
)
6.49 V
(iii) S
R
R R
1
1
C
B C
+
+
+

100 1
1
100 3 10
500 10 3 10
3
3 3
+
+

+
63.26
C
and R
B
.
R
B
R
C
+12 V
I
C
2 mA
100
V
CE
6 V
Solution:
(i) I
B

I
C

2 10
100
3
20 A
V
CC
(I
B
+ I
C
)R
C
V
CE
0
V
CC
( + 1)I
B
R
C
V
CE
0
R
C

V V
I ( 1)
CC CE
B
+

12 6
(100 1)(20 10 )
6
2.97 k
(ii) Applying Kirchhoffs voltage law to the base-emitter circuit,
V
CC
(I
B
+ I
C
)R
C
I
B
R
B
V
BE
0
R
B

V V I I R
I
( )
CC BE B C C
B
+

12 0.7 (20 10 2 10 )(2.97 10 )
20 10
6 3 3
6
+
265.4 k
C
and V
CE
470 k
9.1 k
+22 V
Solution:
(a) For 90
Applying Kirchhoffs voltage law to the baseemitter circuit,
V
CC
(I
B
+ I
C
)R
C
I
B
R
B
V
BE
0
V
CC
( + 1)I
B
R
C
I
B
R
B
V
BE
0
I
B

V V
R R ( 1)
CC BE
B C
+ +

+ +1) )
22 0.7
470 10 (90 (9.1 10
3 3
16.41 A
I
C
I
B
90 16.41 10
6
1.48 mA
V
CC
(I
B
+ I
C
)R
C
V
CE
0
V
CE
V
CC
(I
B
+ I
C
)R
C

22 (16.41 10
6
+ 1.48 10
3
)

(9.1 10
3
)
8.38 V
(b) For 135
I
B

V V
R R (
CC BE
B C
+ +1)

+ +1)
22 0.7
470 10 (135 (9.1 10 )
3 3
12.47 A
I
C
I
B
135 12.47 10
6
1.68 mA
V
CE
V
CC
(I
B
+ I
C
)R
C

22 (12.47 10
6
+ 1.68 10
3
) (9.1 10
3
)
6.6 V
(i) % I
C

1.68 10 1.48 10
1.48 10
3 3
3

100
13.51%
(ii) % V
CE

6.6 8.38
8.38
100
21.24%
C
CE
Example 1.16: For the collector-to-base bias conguration of the Fig. 1.46, determine (i) S,
(ii) S, (iii) S when increases by 25% and (iv) the net change in I
C
if a change in operating
condition results in I
CO
increasing from 0.2 A to 10 A, V
BE
drops from 0.7 V to 0.5 V, and
increases by 25%.
Solution:
1
90
2
25% more than
1
112.5
I
C
1
1.48 mA (From Example 1.15)
(i) S
R
R R
1
1
C
B C
+
+
+

90 1
1
90 9.1 10
470 10 9.1 10
3
3 3
+
+

+
33.59
(ii) S
R R ( 1)
B C
+ +

+ +
90
470 10 (90 1)(9.1 10 )
3 3
6.93 10
5
(iii) S
I
C
1
1

R R
R R ( 1)
B C
B C 2
+
+ +

1.48 10
90
3

+
+ +
470 10 9.1 10
470 10 (112.5 1)(9.1 10 )
3 3
3 3
5.24 10
6
A
(iv) I
C
S I
CO
+ S V
BE
+ S
33.59(10 10
6
0.2 10
6
) + (6.93 10
5
)(0.5 0.7) + (5.24 10
6
)(112.5 90)
33.59 9.8 10
6
+ 6.93 10
5
0.2 + 5.24 10
6
22.5
0.45 mA
1.12 Modied Collector-to-base Bias Circuit 1.53
1.12 MODIFIED COLLECTOR-TO-BASE BIAS CIRCUIT
Figure 1.47 shows a modied collector-to-emitter bias circuit. Emitter resistor R
E
is connected
in the emitter terminal.
V
S
R
S
R
E
C
E
R
B
R
C
C
C
1
V
o
+V
CC
C
C
2
R
L
Fig. 1.47Modied Collector-to-base Bias Circuit
DC analysis
For DC, f = 0,
X
C
=
f C
1
2
=
in Fig. 1.48.
R
B
V
CE
R
C
R
E
V
BE
+V
CC
+
+
I
B
I
B
+ I
C
I
C
I
E
Collector current I
C
V
CC
(I
B
+ I
C
)R
C
I
B
R
B
V
BE
I
E
R
E
= 0
V
CC
( +1)I
B
R
C
I
B
R
B
V
BE
( + 1)I
B
R
E
= 0
I
B
=
V V
R R R ( 1)( )
CC BE
B C E
+ + +
The collector and emitter resistors, which are the part of the collector-emitter circuit, appear
as ( + 1)(R
C
+ R
E
) in the base-emitter circuit. For the base-emitter circuit, the net voltage is
V
CC
V
BE
and the total resistance is the sum of R
B
and the reected resistance ( + 1)(R
C
+ R
E
).
I
C
= I
B
=
V V
R R R ( 1)( )
CC BE
B C E
+ + +
1
]
1
CE

V
CC
(I
B
+ I
C
)R
C
V
CE
I
E
R
E
= 0
V
CC
(I
B
+ I
C
)R
C
V
CE
(I
B
+ I
C
)R
E
= 0
V
CE
= V
CC
(I
B
+ I
C
)(R
C
+ R
E
)
Load-line analysis
V
CC
(I
B
+ I
C
)R
C
V
CE
I
E
R
E
= 0
V
CC
(I
B
+ I
C
)R
C
V
CE
(I
B
+ I
C
)R
E
= 0
Assuming I
B
+ I
C
I
C,
V
CC
I
C
(R
C
+ R
E
) V
CE
= 0
I
C
=
+ R R
1
C E
V
CE
+
+
V
R R
CC
C E
+ R R
1
C E
and y-intercept of
+
V
R R
CC
C E
.
When I
C
= 0, i.e. transistor is in cut-off region,
V
CE
= V
CC
When V
CE
= 0, i.e. transistor is in saturation region,
I
C
=
+
V
R R
CC
C E
CC
, 0) and
V
R R
0,
CC
C E
+
_
,

load line is drawn.
I
B
=
+ + +
V V
R R R ( 1)( )
CC BE
B C E
For this value of the base current, we can establish the actual Q-point as shown in Fig. 1.49.
V
CEQ
0
V
CC
V
CE
V
CC
R
C
+ R
E
I
CQ
I
C
I
BQ
Q
C

sat
=
+
V
R R
CC
C E
.
The addition of the emitter resistor reduces the collector saturation level below that obtained
with a collector-to-base bias conguration using the same collector resistor.
V
CC
(I
B
+ I
C
)R
C
I
B
R
B
V
BE
I
E
R
E
= 0
V
CC
(I
B
+ I
C
)R
C
I
B
R
B
V
BE
(I
B
+ I
C
)R
E
= 0
V
CC
I
B
R
C
I
C
R
C
I
B
R
B
V
BE
I
B
R
E
I
C
R
E
= 0
I
B
=
V V I R R
R R R
( )
CC BE C C E
B C E
+
+ +
CO
C
voltage drop across (R
C
+ R
E
) to increase, which decreases base current I
B
. As I
C
depends
on I
B
, decrease in I
B
C
C
with I
CO
is
minimized and stability of Q-point is achieved.
I
B
=
V V
R R R ( 1)( )
CC BE
B C E
+ + +
Generally,
( + 1)(R
C
+ R
E
) >> R
B
(R
C
+ R
E
) >> R
B
I
B
=
+
V V
R R ( )
B BE
C E
I
C
= I
B
=
V V
R R ( )
B BE
C E
1
]
1
=
+
V V
R R
B BE
C E
Hence, I
C
C
Stability factors
V
CC
(I
B
+ I
C
)R
C
I
B
R
B
V
BE
I
E
R
E
= 0
V
CC
I
B
R
C
I
C
R
C
I
B
R
B
V
BE
(I
B
+ I
C
)R
E
= 0
V
CC
I
B
R
C
I
C
R
C
I
B
R
B
V
BE
I
B
R
E
I
C
R
E
= 0
I
B
=
+
+ +
V V I R R
R R R
( )
CC BE C C E
B C E
We know that
I
C
= I
B
+ ( + 1)I
CO
=
V V I R R
R R R
( )
CC BE C C E
B C E
+
+ +
1
]
1
+ ( + 1)I
CO
I
C

R R
R R R
1
( )
C E
B C E
+
+
+ +
1
]
1

=
V
R R R
CC
B C E
+ +

V
R R R
BE
B C E
+ +
+ ( + 1)I
CO
(1.24)
C
is function of I
CO
, V
BE
and .
CO
changes from I
CO
1
to I
CO
2
, I
C
changes from I
C
1
to I
C
2
.
1
C,
I
C
1
R R
R R R
1
( )
C E
B C E
+
+
+ +
1
]
1
=
+ +
V
R R R
CC
B C E

V
R R R
BE
B C E
+ +
+ ( + 1)I
CO
1
(1.25)
At t
2
C,
I
C
2

R R
R R R
1
( )
C E
B C E
+
+
+ +
1
]
1
=
V
R R R
CC
B C E
+ +

V
R R R
BE
B C E
+ +
+ ( + 1)I
CO
2
(1.26)
(I
C
2
I
C
1
)
R R
R R R
1
( )
C E
B C E
+
+
+ +
1
]
1
= ( + 1)(I
CO
2
I
CO
1
)
I I
I I
C C
CO CO
2 1
2 1
=
R R
R R R
1
1
)
C E
B C E
+
+
( +
+ +

S =
I
I
C
CO
=
R R
R R R
1
1
)
C E
B C E
+
+
( +
+ +
BE
changes from V
BE
1
to V
BE
2
, I
C
changes from I
C
1
to I
C
2
.
1
C,
I
C
1
R R
R R R
1
( )
C E
B C E
+
+
+ +
1
]
1
=
V
R R R
CC
B C E
+ +

V
R R R
BE
B C E
1
+ +
+ ( + 1)I
CO
(1.27)
At t
2
C,
I
C
2

R R
R R R
1
( )
C E
B C E
+
+
+ +
1
]
1 =
V
R R R
CC
B C E
+ +

V
R R R
BE
B C E
2
+ +
+ ( + 1)I
CO
(1.28)
(I
C
2
I
C
1
)
+
+
+ +
R R
R R R
1
( )
C E
B C E

R R R
B C E
+ +
(V
BE
2
V
BE
1
)

I I
V V
C C
BE BE
2 1
2 1

R R R
R R
R R R
1
)
B C E
C E
B C E
+ +
+
( +
+ +

R R R R R
B C E C E
+ + + +

R R R ( 1)( )
B C E
+ + +
S =
I
V
C
BE

R R R ( 1)( )
B C E
+ + +
I
C
R R
R R R
1
( )
C E
B C E
+
+
+ +
1
]
1
=
V
R R R
CC
B C E
+ +

V
R R R
BE
B C E
+ +
+ I
CO
[ ( + 1) ]
I
C
R R R
R R R
( 1)( )
B C E
B C E
+ + +
+ +
1
]
1 =
V V I R R R
R R R
[ ( )]
CC BE CO B C E
B C E
+ + +
+ +

I
C
=
V V I R R R
R R R
[ ( )]
( ( )
CC BE CO B C E
B C E
+ + +
+ +1) +

When changes from
1
to
2
, I
C
changes from I
C
1
to I
C
2
.
At t
1
C,
I
C
1
=
V V I R R R
R R R
[ ( )]
( 1)( )
CC BE CO B C E
B C E
1
1
+ + +
+ + +
(1.29)
At t
2
C,
I
C
2
=
V V I R R R
R R R
[ ( )]
( 1)( )
CC BE CO B C E
B C E
2
2
+ + +
+ + +
(1.30)
I
I
C
C
2
1
=
R R R
R R R
[ ( 1)( )]
[ ( 1)( )]
B C E
B C E
2 1
1 2

+ + +
+ + +
I
I
C
C
2
1
1 =
R R R
R R R
[ ( 1)( )]
[ ( 1)( )]
B C E
B C E
2 1
1 2

+ + +
+ + +
1
I I
I
C C
C
2 1
1
=
R R R R R R
R R R
[ ( 1)( )] [ ( 1)( )]
[ ( 1)( )]
B C E B C E
B C E
2 1 1 2
1 2

+ + + + + +
+ + +

=
R R R R R R R R R R
R R R [ ( 1)( )]
B C E C E B C E C E
B C E
2 1 2 1 2 2 2 1 1 2 1 2 1 1
1 2

+ + + +
+ + +

=
R R R R R R
R R R
( ) ( )
[ ( 1)( )]
B C E B C E
B C E
2 1
1 2

+ + + +
+ + +

=
R R R
R R R
( )( )
[ ( 1)( )]
B C E
B C E
2 1
1 2

+ +
+ + +

I I
C C
2 1
2 1

=
I
C
1
1

R R R
R R R ( 1)( )
B C E
B C E 2
+ +
+ + +
S =
I
C
=
I
C
1
1

R R R
R R R ( 1)( )
B C E
B C E 2
+ +
+ + +
C
, V
CE
and S.
220 k
100
2.5 k
1 k
+10 V
Solution:
V
CC
(I
B
+ I
C
)R
C
I
B
R
B
V
BE
I
E
R
E
= 0
V
CC
( + 1)I
B
R
C
I
B
R
B
V
BE
( + 1)I
B
R
E
= 0
I
B
=
V V
R R R ( 1)( )
CC BE
B C E
+ + +
=
10 0.7
220 10 (100 1)(2.5 10 1 10 )
3 3 3
+ + +
= 16.21 A
I
C
= I
B
= 100 16.21 10
6
= 1.621 mA
V
CC
(I
B
+ I
C
)R
C
V
CE
I
E
R
E
= 0
V
CC
(I
B
+ I
C
)R
C
V
CE
(I
B
+ I
C
)R
E
= 0
V
CE
= V
CC
(I
B
+ I
C
)(R
C
+ R
E
)
= 10 (16.21 10
6
+ 1.621 10
3
)(2.5 10
3
+ 1 10
3
)
= 4.27 V
(iii) S =
R R
R R R
1
1
( )
C E
B C E
+
+
+
+ +
=
100 1
1
100(2.5 10 1 10 )
220 10 2.5 10 1 10
3 3
3 3 3
+
+
+
+ +

= 39.36
Example 1.18: For the circuit shown in Fig. 1.51, determine I
C
, V
C
, V
E
and V
CE
.
690 k
100
6.2 k
1.5 k
+30 V
Solution:
V
CC
(I
B
+ I
C
)R
C
I
B
R
B
V
BE
I
E
R
E
= 0
V
CC
( + 1)I
B
R
C
I
B
R
B
V
BE
( + 1)I
B
R
E
= 0
I
B
=
V V
R R R ( 1)( )
CC BE
B C E
+ + +
=
30 0.7
690 10 (100 1)(6.2 10 1.5 10 )
3 3 3
+ + +
= 19.9 A
I
C
= I
B
= 100 19.9 10
6
= 1.99 mA
(ii) V
C
= V
CC
(I
B
+ I
C
)R
C
= 30 (19.9 10
6
+ 1.99 10
3
)(6.2 10
3
)
= 17.5 V
(iii) V
E
= (I
B
+ I
C
)R
E
= (19.9 10
6
+ 1.99 10
3
)(1.5 10
3
)
= 3.02 V
(iv) V
CE
= V
C
V
E
= 17.5 3.02
= 14.48 V
C
and V
CE
470 k
9.1 k
9.1 k
+22 V
Solution:
(a) For = 90
V
CC
(I
B
+ I
C
)R
C
I
B
R
B
V
BE
I
E
R
E
= 0
V
CC
( + 1)I
B
R
C
I
B
R
B
V
BE
( + 1)I
B
R
E
= 0
I
B
=
V V
R R R ( 1)( )
CC BE
B C E
+ + +
=
22 0.7
470 10 (90 (9.1 10 9.1 10 )
3 3 3
+ +1) +
= 10.02 A
I
C
= I
B
= 90 10.02 10
6
= 0.9 mA
V
CC
(I
B
+ I
C
)R
C
V
CE
(I
B
+ I
C
)R
E
= 0
V
CE
= V
CC
(I
B
+ I
C
)(R
C
+ R
E
)
= 22 (10.02 10
6
+ 0.9 10
3
)(9.1 10
3
+ 9.1 10
3
)

= 5.44 V
(b) For = 135
I
B
=
V V
R R R ( ( )
CC BE
B C E
+ +1) +
=
22 0.7
470 10 (135 (9.1 10 9.1 10 )
3 3 3
+ +1) +
= 7.23 A
I
C
= I
B
= 135 7.23 10
6
= 0.98 mA
V
CE
= V
CC
(I
B
+ I
C
)(R
C
+ R
E
)
= 22 (7.23 10
6
+ 0.98 10
3
)(9.1 10
3
+ 9.1 10
3
)
= 4.03 V
(i) % I
C
=
0.98 10 0.9 10
0.9 10
3 3
3

100
= 8.89%
(ii) % V
CE
=
4.03 5.44
5.44
100
= 25.92%
C
CE
Example 1.20: For the circuit of the Fig. 1.52, determine (i) S, (ii) S, (iii) S when increases
by 25% and (iv) the net change in I
C
CO
increasing
from 0.2 A to 10 A, V
BE
Solution:
1
= 90
2
= 25% more than
1
= 112.5
I
C
1
= 0.9 mA (From Example 1.19)
(i) S =
R R
R R R
1
1
)
C E
B C E
+
+
( +
+ +
=
90 1
1
90(9.1 10 9.1 10 )
470 10 9.1 10 9.1 10
3 3
3 3 3
+
+
+
+ +
= 20.89
(ii) S =
R R R ( 1)( )
B C E
+ + +

=
90
470 10 (90 1)(9.1 10 9.1 10 )
3 3 3
+ + +
= 4.23 10
5
(iii) S =
I
C
1
1

R R R
R R R ( 1)( )
B C E
B C E 2
+ +
+ + +
=
0.9 10
90
3

470 10 9.1 10 9.1 10
470 10 (112.5 1)(9.1 10 9.1 10 )
3 3 3
3 3 3
+ +
+ + +
= 1.93 10
6
A
(iv) I
C
= S I
CO
+ S V
BE
+ S
= 20.89(10 10
6
0.2 10
6
) + (4.23 10
5
)(0.5 0.7) + (1.93 10
6
)(112.5 90)
= 20.89 9.8 10
6
+ 4.23 10
5
0.2 + 1.93 10
6
22.5
= 0.26 mA
1.13 VOLTAGE-DIVIDER BIAS CIRCUIT (SELF-BIAS CIRCUIT)
In the previous congurations, the bias current I
C
and voltage V
CE
depend on the current gain
of the transistor. Figure 1.53 shows a voltage-divider bias circuit. Resistors R
1
and R
2
form
a voltage-divider circuit. In this conguration, the sensitivity to changes in is quite small.
If the circuit parameters are properly chosen, the bias current I
C
and voltage V
CE
are almost
independent of .
1.13 Voltage-divider Bias Circuit (Self-bias Circuit)1.65
V
S
R
S
R
E
C
E
R
1
R
C
C
C
1
V
o
+V
CC
C
C
2
R
L
R
2
Fig. 1.53Voltage-divider Bias Circuit
1.13.1 Exact Analysis
DC Analysis
For DC, f = 0,
X
C
=
f C
1
2
=
in Fig. 1.54.
R
E
R
1
R
C
+V
CC
R
2
The base circuit can be converted into Thevenins equivalent circuit as shown in Fig. 1.55.
V
Th
= V
B
=
R
R R
2
1 2
+
V
CC
R
Th
= R
B
= R
1
|| R
2
=
R R
R R
1 2
1 2
+
As R
1
and R
2
divide the voltage V
CC
at the base, the circuit is called voltage-divider bias.
R
B
V
BE
R
C
+V
CC
I
E
R
E
V
B
V
CE
I
B
I
C
+
+
Fig. 1.55Thevenins Equivalent Circuit
Collector current I
C
V
B
I
B
R
B
V
BE
I
E
R
E
= 0
V
B
I
B
R
B
V
BE
( + 1) I
B
R
E
= 0
I
B
=
V V
R R ( 1)
B BE
B E
+ +
The emitter resistor, which is the part of the collector-emitter circuit, appears as ( +1)R
E

in the base-emitter circuit. For the base-emitter circuit, the net voltage is V
B
V
BE
and the total
B
and the reected resistance ( + 1)R
E
.
I
C
= I
B
=
+ +
1
]
1
V V
R R ( 1)
B BE
B E
CE
V
CC
I
C
R
C
V
CE
I
E
R
E
= 0
V
CC
I
C
R
C
V
CE
(I
B
+ I
C
)R
E
= 0
V
CE
= V
CC
I
C
R
C
(I
B
+ I
C
)R
E

Load-line analysis
V
CC
I
C
R
C
V
CE
I
E
R
E
= 0
Assuming I
E
I
C,
V
CC
I
C
(R
C
+ R
E
) V
CE
= 0
I
C
=
R R
1
C E
+
V
CE
+
V
R R
CC
C E
+
R R
1
C E
+
and y-intercept of
V
R R
CC
C E
+
.
When I
C
= 0, i.e. transistor is in cut-off region,
V
CE
= V
CC
When V
CE
= 0, i.e. transistor is in saturation region,
I
C
=
V
R R
CC
C E
+
CC
, 0) and
V
R R
0,
CC
C E
+
_
,

load line is drawn.
I
B
=
V V
R R ( 1)
B BE
B E
+ +
V
CEQ
0 V
CC
V
CE
V
CC
R
C
+ R
E
I
CQ
I
C
I
BQ
Q
C

sat
=
V
R R
CC
C E
+
.
V
B
I
B
R
B
V
BE
I
E
R
E
= 0
V
B
I
B
R
B
V
BE
(I
B
+ I
C
)R
E
= 0
V
B
I
B
R
B
V
BE
I
B
R
E
I
C
R
E
= 0
I
B
=
V V I R
R R
B BE C E
B E

+
CO
C
increases. It will cause volt-
age drop across R
E
to increase, which decreases base current I
B
. As I
C
depends on I
B
, decrease
in I
B
C
C
with I
CO
is minimized and stabil-
ity of Q-point is achieved.
Stability factors
V
B
I
B
R
B
V
BE
I
E
R
E
= 0
V
B
I
B
R
B
V
BE
(I
B
+ I
C
)R
E
= 0
V
B
I
B
R
B
V
BE
I
B
R
E
I
C
R
E
= 0
I
B
=
V V I R
R R
B BE C E
B E

+
We know that
I
C
= I
B
+ ( + 1)I
CO
=
V V I R
R R
B BE C E
B E

+
_
,
+ ( + 1)I
CO
I
C

R
R R
1
E
B E
+
+
_
,
=
V
R R
B
B E
+

V
R R
BE
B E
+
+ ( + 1)I
CO
(1.31)
C
is function of I
CO
, V
BE
and .
CO
changes from I
CO
1
to I
CO
2
, I
C
changes from I
C
1
to I
C
2
.
1
C,
I
C
1

R
R R
1
E
B E
+
+
_
,
=
V
R R
B
B E
+

V
R R
BE
B E
+
+ ( + 1)I
CO
1
(1.32)
At t
2
C,
I
C
2

R
R R
1
E
B E
+
+
_
,
=
V
R R
B
B E
+

V
R R
BE
B E
+
+ ( + 1)I
CO
2
(1.33)
(I
C
2
I
C
1
)
R
R R
1
E
B E
+
+
_
,
= ( + 1)(I
CO
2
I
CO
1
)
I I
I I
C C
CO CO
2 1
2 1
=
R
R R
1
1
E
B E
+
+
+

S =
I
I
C
CO
=
R
R R
1
1
E
B E
+
+
+
BE
changes from V
BE
1
to V
BE
2
, I
C
changes from I
C
1
to I
C
2
.
1
C,
I
C
1

R
R R
1
E
B E
+
+
_
,
=
V
R R
B
B E
+

V
R R
BE
B E
1
+
+ ( + 1)I
CO
(1.34)
At t
2
C,
I
C
2

R
R R
1
E
B E
+
+
_
,
=
V
R R
B
B E
+

V
R R
BE
B E
2
+
+ ( + 1)I
CO
(1.35)
(I
C
2
I
C
1
)
R
R R
1
E
B E
+
+
_
,

R R
B E
+
(V
BE
2
V
BE
1
)
I I
V V
C C
BE BE
2 1
2 1
=
R R
R
R R
1
B E
E
B E
+
+
+

=
R R R
B E E
+ +
=
R R ( 1)
B E
+ +
S =
I
V
C
BE
=
R R ( 1)
B E
+ +
I
C
R
R R
1
E
B E
+
+
_
,
=
V
R R
B
B E
+

V
R R
BE
B E
+
+ I
CO
[ ( + 1) ]
I
C
+ +
+
1
]
1
R R
R R
( 1)
B E
B E
=
V V I R R
R R
[ ( )]
B BE CO B E
B E
+ +
+

I
C
=
V V I R R
R R
[ ( )]
(
B BE CO B E
B E
+ +
+ +1)

When changes from
1
to
2
, I
C
changes from I
C
1
to I
C
2
.
At t
1
C,
I
C
1
=
V V I R R
R R
[ ( )]
(
B BE CO B E
B E
+ +
+ +1)
1
(1.36)
At t
2
C,
I
C
2
=
V V I R R
R R
[ ( )]
(
B BE CO B E
B E
+ +
+ +1)
2
(1.37)
I
I
C
C
2
1
=
R R
R R
[ ( 1) ]
[ ( 1) ]
B E
B E
2 1
1 2

+ +
+ +
I
I
C
C
2
1
1 =
R R
R R
[ ( 1) ]
[ ( 1) ]
B E
B E
2 1
1 2

+ +
+ +
1
I I
I
C C
C
2 1
1
=
R R R R
R R
[ ( 1) ] [ ( 1) ]
[ ( 1) ]
B E B E
B E
2 1 1 2
1 2

+ + + +
+ +

=
R R R R R R
R R [ ( 1) ]
B E E B E E
B E
2 1 2 2 1 1 2 1
1 2

+ +
+ +

=
R R R R
R R
( ) ( )
[ ( 1) ]
B E B E
B E
2 1
1 2

+ +
+ +

=
R R
R R
( )( )
[ ( 1) ]
B E
B E
2 1
1 2

+
+ +

I I
C C
2 1
2 1

=
I
C
1
1

R R
R R ( 1)
B E
B E 2
+
+ +
S =
I
C
=
I
C
1
1

R R
R R ( 1)
B E
B E 2
+
+ +
1.13.2 Approximate Analysis
Collector current I
C
The input section of the voltage-divider bias circuit can be represented by the circuit shown
in Fig. 1.57. The equivalent resistance between the base and the ground is ( + 1)R
E
. If the
resistance ( + 1)R
E
is much larger than the resistance R
2
, the current I
B
will be much smaller
than I
2
. If I
B
0, then I
1
= I
2
.
+V
CC
R
1
R
2
( + 1) R
E
I
B
V
B
I
2
I
1
Fig. 1.57Input Section
The voltage across R
2
can be found using the voltage-divider rule.
V
B
=
R
R R
2
1 2
+
V
CC
Generally ( + 1)R
E
R
E
. If R
E
is at least ten times the value of R
2
, the approximate analy-
sis can be used with a high degree of accuracy.
R
E
10R
2
V
E
= V
B
V
BE
I
E
=
V
R
E
E
=
V V
R
B BE
E
I
C
I
E
Hence, I
C
is independent of the value of .
CE
V
CC
I
C
R
C
V
CE
I
E
R
E
= 0
V
CE
= V
CC
I
C
R
C
I
E
R
E
= V
CC
I
C
(R
C
+ R
E
) ( I
C
I
E
)
Hence, V
CE
is independent of the value of .
Thus, Q-point is independent of the value of .
C
and V
CE
by approximate analysis.
Compare the result with exact analysis.
+18 V
3.3 k 39 k
8.2 k 1 k
120
Solution:
If R
E
10R
2
, the approximate analysis can be used with a high degree of accuracy.
R
E
= 120 1 10
3
= 120 k
10R
2
= 10 8.2 10
3
= 82 k
Since R
E
> 10R
2
, approximate analysis is used.
(i) V
B
=
R
R R
2
1 2
+
V
CC

=
8.2 10
39 10 8.2 10
3
3 3
+
18
= 3.13 V
V
E
= V
B
V
BE
= 3.13 0.7 = 2.43 V
I
E
=
V
R
E
E
=
2.43
1 10
3
= 2.43 mA
I
C
= 2.43 mA ( I
C
I
E
)
V
CC
I
C
R
C
V
CE
I
E
R
E
= 0
V
CE
= V
CC
I
C
R
C
I
E
R
E
= V
CC
I
C
(R
C
+ R
E
) ( I
C
I
E
)
= 18 (2.43 10
3
) (3.3 10
3
+ 1 10
3
)
= 7.55 V
Exact analysis
(i) Replacing the base circuit by its Thevenins equivalent (Fig. 1.59),
V
B
= 3.13 V
R
B
=
R R
R R
1 2
1 2
+
=
39 10 8.2 10
39 10 8.2 10
3 3
3 3

+
= 6.78 k
R
B
V
BE
R
C
+V
CC
I
E
R
E
V
B
V
CE
I
B
I
C
+
+
Fig. 1.59Thevenin's Equivalent Circuit
V
B
I
B
R
B
V
BE
I
E
R
E
= 0
V
B
I
B
R
B
V
BE
( + 1)I
B
R
E
= 0
I
B
=
V V
R R ( 1)
B BE
B E
+ +
=
3.13 0.7
6.78 10 (120 1)(1 10 )
3 3
+ +
= 19.02 A
I
C
= I
B
= 120 19.02 10
6
= 2.28 mA
V
CC
I
C
R
C
V
CE
I
E
R
E

= 0
V
CC
I
C
R
C
V
CE
(I
B
+ I
C
)R
E
= 0
V
CE
= V
CC
I
C
R
C
(I
B
+ I
C
)R
E
= 18 2.28 10
3
3.3 10
3
(19.02 10
6
+ 2.28 10
3
) (1 10
3
)
= 8.18 V
C
, V
CE
and stability factor S.
+30 V
5 k 90 k
10 k 5 k
100
Solution:
(i) Replacing the base circuit by its Thevenins equivalent (Fig. 1.61),
V
B
=
R
R R
2
1 2
+
V
CC

=
10 10
90 10 10 10
3
3 3
+
30
= 3V
R
B
=
R R
R R
1 2
1 2
+
=
90 10 10 10
90 10 10 10
3 3
3 3

+
= 9 k
R
B
V
BE
R
C
+V
CC
I
E
R
E
V
B
V
CE
I
B
I
C
+
+
V
B
I
B
R
B
V
BE
I
E
R
E
= 0
V
B
I
B
R
B
V
BE
( + 1)I
B
R
E
= 0
I
B
=
V V
R R ( 1)
B BE
B E
+ +
=
3 0.7
9 10 (100 1) (5 10 )
3 3
+ +
= 4.47 A
I
C
= I
B
= 100(4.47 10
6
) = 0.447 mA
V
CC
I
C
R
C
V
CE
I
E
R
E
= 0
V
CC
I
C
R
C
V
CE
(I
B
+ I
C
)R
E
= 0
V
CE
= V
CC
I
C
R
C
(I
B
+ I
C
)R
E
= 30 0.447 10
3
5 10
3
(4.47 10
6
+ 0.447 10
3
)(5 10
3
)
= 25.5 V
(iii) S =
R
R R
1
1
E
B E
+
+
+
=
100 1
1
100 5 10
9 10 5 10
3
3 3
+
+

+
= 2.75
Example 1.23: Find R
C
, R
1
and R
2
of the circuit shown in Fig. 1.62, if I
C
= 1 mA, R
E
= 1 k,
V
CC
= 10 V, = 100, S = 10 and V
CE
= 5 V.
+10 V
R
C
R
1
R
2
1 k
Solution:
(i) I
B
=
I
C
=
1 10
100
3
= 0.01 mA
V
CC
I
C
R
C
V
CE
I
E
R
E
= 0
V
CC
I
C
R
C
V
CE
(I
B
+ I
C
)R
E
= 0
R
C
=
V V I I R
I
( )
CC CE B C E
C
+
=
10 5 (0.01 10 1 10 )(1 10 )
1 10
3 3 3
3
+
= 3.99 k
(ii) S =
R
R R
1
1
E
B E
+
+
+
10 =
R
100 1
1
100 1 10
1 10
B
3
3
+
+

+
R
B
= 9.98 k
Replacing the base circuit by its Thevenins equivalent (Fig. 1.63),
R
B
V
BE
R
C
+V
CC
I
E
R
E
V
B
V
CE
I
B
I
C
+
+
V
B
I
B
R
B
V
BE
I
E
R
E
= 0
V
B
I
B
R
B
V
BE
(I
B
+ I
C
)R
E
= 0
V
B
= I
B
R
B
+ V
BE
+ (I
B
+ I
C
)R
E

= 0.01 10
3
9.98 10
3
+ 0.7 + (0.01 10
3
+ 1 10
3
) (1 10
3
)
= 1.71 V
V
B
=
R
R R
2
1 2
+
V
CC
Multiplying both the sides by R
1,
R
1
V
B
=
R R
R R
1 2
1 2
+
V
CC
= R
B
V
CC
R
1
=
R V
V
B CC
B

=
9.98 10 10
1.71
3

= 58.36 k
(iii) R
B
=
R R
R R
1 2
1 2
+
9.98 10
3
=
58.36 10
3
R
2
58.36 10
3
+ R
2
R
2
= 12.04 k
E
, R
1
and R
2
.
+16 V
R
1
R
2
R
E
V
CE
8 V
V
BE
0.3 V
I
C
4 mA
S 10
50
1.5 k
Solution:
(i) I
B
=
I
C
=
4 10
50
3
= 0.08 mA
V
CC
I
C
R
C
V
CE
I
E
R
E
= 0
V
CC
I
C
R
C
V
CE
(I
B
+ I
C
)R
E
= 0
R
E
=
V V I R
I I
CC CE C C
B C

+
=
16 8 4 10 1.5 10
0.08 10 4 10
3 3
3 3

+

= 0.49 k
(ii) S =
R
R R
1
1
E
B E
+
+
+
10 =
R
51
1
50 0.49 10
0.49 10
B
3
3
+

+
R
B
= 5.49 k
R
B
V
BE
R
C
+V
CC
I
E
R
E
V
B
V
CE
I
B
I
C
+
+
V
B
I
B
R
B
V
BE
I
E
R
E
= 0
V
B
I
B
R
B
V
BE
(I
B
+ I
C
)R
E
= 0
V
B
= I
B
R
B
+ V
BE
+ (I
B
+ I
C
)R
E
= 0.08 10
3
5.49 10
3
+ 0.3 + (0.08 10
3
+ 4 10
3
) (0.49 10
3
)
= 2.53 V
V
B
=
R
R R
2
1 2
+
V
CC
Multiplying both the sides by R
1
,
R
1
V
B

=
R R
R R
1 2
1 2
+
V
CC
= R
B
V
CC
R
1
=
R V
V
B CC
B

=
5.49 10 16
2.53
3

= 34.72 k
(iii) R
B
=
R R
R R
1 2
1 2
+
5.49 10
3
=
34.72 10
3
R
2
34.72 10
3
+ R
2
R
2
= 4.74 k
C
and V
CE
+18 V
1.2 k
1 k
33 k
12 k
Solution:
V
B
=
R
R R
2
1 2
+
V
CC
=
12 10
33 10 12 10
3
3 3
+
18
= 4.8 V
R
B
=
R R
R R
1 2
1 2
+
=
33 10 12 10
33 10 12 10
3 3
3 3

+
= 8.8 k
R
B
V
BE
R
C
+V
CC
I
E
R
E
V
B
V
CE
I
B
I
C
+
+
(a) For = 100
V
B
I
B
R
B
V
BE
I
E
R
E
= 0
V
B
I
B
R
B
V
BE
( + 1)I
B
R
E
= 0
I
B
=
V V
R R ( 1)
B BE
B E
+ +
=
4.8 0.7
8.8 10 (100 (1 10 )
3 3
+ +1)
= 37.34 A
I
C
= I
B
= 100 37.34 10
6
= 3.73 mA
I
E
= I
B
+ I
C
= 37.34 10
6
+ 3.73 10
3
= 3.77 mA
V
CC
I
C
R
C
V
CE
I
E
R
E
= 0
V
CE
= V
CC
I
C
R
C
I
E
R
E
= 18 3.73 10
3
1.2 10
3
3.77 10
3
1 10
3
= 9.75 V
(b) For = 150
I
B
=
V V
R R ( 1)
B BE
B E
+ +
=
4.8 0.7
8.8 10 (150 (1 10 )
3 3
+ +1)
= 25.66 A
I
C
= I
B
= 150 25.66 10
6
= 3.85 mA
I
E
= I
B
+ I
C
= 25.66 10
6
+ 3.85 10
3
= 3.88 mA
V
CE
= V
CC
I
C
R
C
I
E
R
E
= 18 3.85 10
3
1.2 10
3
3.88 10
3
1 10
3
= 9.5 V
(i) % I
C
=
3.85 10 3.73 10
3.73 10
3 3
3

100
= 3.22%
(ii) % V
CE
=
9.5 9.75
9.75
100
= 2.56%
C
CE
decreases by 2.56%.
Example 1.26: For the circuit of the Fig. 1.66, determine (i) S, (ii) S, (iii) S when
2
is 25%
more than
1
and (iv) the net change in I
C
CO
in-
creasing from 0.2 A to 10 A, V
BE
Solution:
1
= 100
2
= 125
I
C1
= 3.73 mA (From Example 1.25)
(i) S =
R
R R
1
1
E
B E
+
+
+
=
100 1
1
100 1 10
8.8 10 1 10
3
3 3
+
+

+
= 9.01
(ii) S =
R R ( 1)
B E
+ +

=
100
8.8 10 (100 1)(1 10 )
3 3
+ +
= 9.11 10
4
(iii) S =
I
C
1
1

R R
R R ( 1)
B E
B E 2
+
+ +
=
3.73 10
100
3

8.8 10 1 10
8.8 10 (125 1)(1 10 )
3 3
3 3
+
+ +
= 2.71 10
6
A
(iv) I
C
= S I
CO
+ S V
BE
+ S
= 9.01(10 10
6
0.2 10
6
) + (9.11 10
4
)(0.5 0.7) + (2.71 10
6
)

(125 100)
= 9.01 9.8 10
6
+ 9.11 10
4
0.2 + 2.71 10
6
25
= 0.33 mA
1.13 Voltage-divider Bias Circuit (Self-bias Circuit) 1.85
SUMMARY OF BJT BIASING CIRCUITS
Conguration Circuit Equation Load line and Q-Point
Fixed bias
R
B
R
C
+V
CC
I
B
=
V V
R
CC BE
B
I
C
=

_
,
V V
R
CC BE
B
V
CE
= V
CC
I
C
R
C

S = + 1
S' =
R
B

S" =
1
1
I
C

V
CEQ
0 V
CC
V
CE
V
CC
R
C
I
CQ
I
C
I
BQ
Q
Modied
xed bias
R
B
R
C
+V
CC
R
E
I
B
=
( 1)
+ +
V V
R R
CC BE
B E
I
C
=
( 1)
+ +
1
]
1
V V
R R
CC BE
B E
V
CE
= V
CC
I
C
R
C
(I
B
+ I
C
)R
E
S =
1
1
+
+
+
R
R R
E
B E
S' =
( 1)
+ + R R
B E

S" =
1
1
I
C

( 1)
2
+
+ +
R R
R R
B E
B E
V
CEQ
V
CC
V
CE
V
CC
R
C
+ R
E
I
CQ
I
C
I
BQ
Q
0
(Continued )
M01_XXXXXXXX_XX_C01.indd 85 7/20/12 3:40 PM
Collector-to-
base bias
R
B
R
C
+V
CC
I
B
=
( 1)
+ +
V V
R R
CC BE
B C
I
C
=
( 1)
+ +
1
]
1
V V
R R
CC BE
B C
S =
1
1
+
+
+
R
R R
C
B C
S' =
( 1)
+ + R R
B C

S" =
1
1
I
C

( 1)
2
+
+ +
R R
R R
B C
B C
V
CEQ
0 V
CC
V
CE
V
CC
R
C
I
CQ
I
C
I
BQ
Q
Modied
collector-
to-base bias
R
B
R
C
+V
CC
R
E
I
B
=
( 1)( )
+ + +
V V
R R R
CC BE
B C E
I
C
=
( 1)( )
+ + +
1
]
1
V V
R R R
CC BE
B C E
V
CE
= V
CC
(I
B
+ I
C
)(R
C
+ R
E
)
S =
1
1
)
+
+
( +
+ +
R R
R R R
C E
B C E
S' =
( 1)( )
+ + + R R R
B C E

S" =
1
1
I
C

( 1)( )
2
+ +
+ + +
R R R
R R R
B C E
B C E
V
CEQ
0 V
CC
V
CE
V
CC
R
C
+ R
E
I
CQ
I
C
I
BQ
Q
SUMMARY OF BJT BIASING CIRCUITS (Continued)
(Continued )
1.14 Miscellaneous Bias Circuits 1.87
Voltage-
divider bias
R
1
R
C
+V
CC
R
E
R
2
I
B
=
( 1)
+ +
V V
R R
B BE
B E
I
C
=
( 1)
+ +
1
]
1
V V
R R
B BE
B E
S =
1
1
+
+
+
R
R R
E
B E
S' =
( 1)
+ + R R
B E
S" =
1
1
I
C

( 1)
2
+
+ +
R R
R R
B E
B E
V
CEQ
0 V
CC
V
CE
V
CC
R
C
+R
E
I
CQ
I
C
I
BQ
Q
1.14 MISCELLANEOUS BIAS CIRCUITS
There are many bias circuits that do not match the basic models discussed so far. These circuits
are discussed in this section. For each circuit, rst base current has to be calculated. Then col-
lector current and output voltage can be determined to locate Q-point.
B
and V
CE
.
+18 V
4 V
4 k
200 R
B
I
C
2 mA
50
Solution:
DC equivalent circuit (Fig. 1.69)
V
BE
R
C
+V
CC
V
EE
I
E
R
E
R
B
V
CE
I
B
I
C
+
+
(i) I
B
=
I
C
=
2 10
50
3
= 40 A
I
E
= I
B
+ I
C
= 40 10
6
+ 2 10
3
= 2.04 mA
I
B
R
B
V
BE
I
E
R
E
+ V
EE
= 0
R
B
=
V V I R
I
EE BE E E
B

=
4 0.7 2.04 10 200
40 10
3
6

= 72.3 k
V
CC
I
C
R
C
V
CE
I
E
R
E
+ V
EE
= 0
V
CE
= V
CC
+ V
EE
I
C
R
C
I
E
R
E
= 18 + 4 2 10
3
4 10
3
2.04 10
3
200
= 13.59 V
1.14 Miscellaneous Bias Circuits1.89
Example 1.28: Determine I
B
and V
E
for the circuit shown in Fig. 1.70.
6 V
= 120
1.2 k
330 k
+6 V
V
E
Solution:
V
EE
R
E
+V
CC
V
E
+
V
BE
R
B
I
E
V
CC
I
B
R
B
V
BE
I
E
R
E
+ V
EE
= 0
V
CC
I
B
R
B
V
BE
( + 1)I
B
I
E
+ V
EE
= 0
I
B
=
V V V
R R ( 1)
CC EE BE
B E
+
+ +
=
6 6 0.7
330 10 (120 1)(1.2 10 )
3 3
+
+ +
= 23.72 A
(ii) I
E
= ( + 1)I
B
= (120 + 1) (23.72 10
6
)
= 2.87 mA
Applying Kirchhoffs voltage law to the emitter circuit,
V
E
I
E
R
E
+ V
EE
= 0
V
E
= I
E
R
E
V
EE
= 2.87 10
3
1.2 10
3
6
= 2.547 V
E
, V
CE
and V
C
in the circuit shown in Fig. 1.72.
+10 V
8 V
2.2 k
1.8 k
Solution:
V
BE
R
C
+V
CC
V
EE
I
E
R
E
V
CE
V
C
I
B
I
C
+
+
V
BE
I
E
R
E
+ V
EE
= 0
I
E
=
V V
R
EE BE
E
=
8 0.7
2.2 10
3
= 3.318 mA
I
E
I
C
= 3.318 mA
V
CC
I
C
R
C
V
CE
I
E
R
E
+ V
EE
= 0
V
CE
= V
CC
+ V
EE
(R
C
+ R
E
)I
C
( I
E
I
C
)
= 10 + 8 (1.8 10
3
+ 2.2 10
3
) (3.318 10
3
)
= 4.73 V
(iii) Applying Kirchhoffs voltage law to the collector-emitter circuit,
V
C
V
CE
I
E
R
E
+ V
EE
= 0
V
C
= V
CE
+ I
E
R
E
V
EE
= 4.73 + 3.318 10
3
2.2 10
3
8
= 4.03 V
E
and V
CE
20 V
= 90
2 k 240 k
Solution:
+
+
V
EE
V
CE
V
BE
R
B
R
E
I
E
I
B
I
B
R
B
V
BE
I
E
R
E
+ V
EE
= 0
I
B
R
B
V
BE
( + 1)I
B
R
E
+ V
EE
= 0
I
B
=
V V
R R ( 1)
EE BE
B E
+ +
=
20 0.7
240 10 (90 (2 10 )
3 3
+ +1)
= 45.73 A
I
E
= ( + 1)I
B
= (90 + 1) (45.73 10
6
)
= 4.16 mA
V
CE
I
E
R
E
+ V
EE
= 0
V
CE
= V
EE
I
E
R
E
= 20 4.16 10
3
2 10
3
= 11.68 V
C
and R
1
+16 V
R
1
30 k 1 k
V
BE
0.2 V
I
E
2 mA
V
CE
6 V
0.985
R
C
Solution:
(i) V
2
= V
BE
+ I
E
R
E
= 0.2 + 2 10
3
1 10
3
= 2.2 V
R
1
R
C
R
E
V
CE
+V
CC
+
V
1
+
V
2
+
I
1
I
C
I
B
I
C
+ I
1
I
E
R
2
I
2
I
2
=
V
R
2
2
=
2.2
30 10
3
= 73.3 A
=
1

=
0.985
1 0.985
= 65.66
I
B
=
I
1
E
+
=
2 10
65.66 1
3
= 30 A
I
C
= I
E
I
B
= 2 10
3
30 10
6
= 1.97 mA
I
1
= I
2
+ I
B
= 73.3 10
6
+ 30 10
6
= 103.3 A
V
CC
(I
C
+ I
1
)R
C
V
CE
I
E
R
E
= 0
R
C
=
V V I R
I I
CC CE E E
C 1

+
=
16 6 2 10 1 10
1.97 10 103.3 10
3 3
3 6

+

= 3.859 k
V
CC
(I
C
+ I
1
)R
C
R
1
I
1
V
2
= 0
R
1
=
V V I I R
I
( )
CC C C 2 1
1
+
=
16 2.2 (1.97 10 103.3 10 )(3.859 10 )
103.3 10
3 6 3
6
+
= 56.15 k
B
, I
C
, V
E
and V
CE
+18 V
18 V
+
+
V
BE
V
E
V
CE
V
C
6.8 k
9.1 k
510 k
510 k
130
Solution:
(a) (b)
+V
CC
+V
CC
V
EE
R
C
I
C
I
E
R
E
V
C
V
BE
V
B
V
B
I
B
R
B
V
CE
V
E
+
+
V
EE
R
1
R
2
I
Applying Kirchhoffs voltage law to the circuit,
V
CC
I(R
1
+ R
2
) + V
EE
= 0
I =
V V
R R
CC EE
1 2
+
+
=
18 18
510 10 510 10
3 3
+
+
= 35.29 A
Applying Kirchhoffs voltage law to the lower part of the circuit of Fig. 1.79(a),
V
B
I R
2
+ V
EE
= 0
V
B
= V
EE
+ I R
2
= 18 + 35.29 10
6
510 10
3
= 2.1 V
R
B
=
R R
R R
1 2
1 2
+
=
510 10 510 10
510 10 510 10
3 3
3 3

+
= 255 k
(i) Applying Kirchhoffs voltage law to the base-emitter circuit of Fig. 1.79(b),
V
B
I
B
R
B
V
BE
I
E
R
E
+ V
EE
= 0
V
B
I
B
R
B
V
BE
( + 1)I
B
R
E
+ V
EE
= 0
I
B
=
V V V
R R ( 1)
EE B BE
B E

+ +
=
18 2.1 0.7
255 10 (130 (6.8 10 )
3 3

+ +1)
= 13.27 A
(ii) I
C
= I
B
= 130 13.27 10
6
= 1.73 mA
(iii) I
E
= I
B
+ I
C
= 13.27 10
6
+ 1.73 10
3
= 1.74 mA
Applying Kirchhoffs voltage law to the emitter circuit,
V
E
I
E
R
E
+ V
EE
= 0
V
E
= I
E
R
E
V
EE
= 1.74 10
3
6.8 10
3
18

= 6.17 V
(iv) Applying Kirchhoffs voltage law to the collector-emitter circuit of Fig. 1.79(b),
V
CC
I
C
R
C
V
CE
I
E
R
E
+ V
EE
= 0
V
CE
= V
CC
+ V
EE
I
C
R
C
I
E
R
E

= 18 + 18 1.73 10
3
9.1 10
3
1.74 10
3
6.8 10
3

= 8.43 V
Example 1.33: Determine the currents I
E
and I
B
and the voltages V
CB
and V
CE
for the circuit
shown in Fig. 1.80.
4.7 k
75
5 V
3.6 k
8 V
Solution:
V
CC
R
C
V
CB
V
CE
V
BE
V
EE
R
E
+
+
I
E
I
C
(i) Applying Kirchhoffs voltage law to the emitter-base circuit,
V
EE
+ I
E
R
E
+ V
BE
= 0
I
E
=
V V
R
EE BE
E
=
5 0.7
4.7 10
3
= 0.91 mA
(ii) I
B
=
I
1
E
+
=
0.91 10
75 1
3
= 11.97 A
(iii) I
C
= I
B
= 75 11.97 10
6
= 0.9 mA
Applying Kirchhoffs voltage law to the collector-base circuit,
V
CC
I
C
R
C
V
CB
= 0
V
CB
= V
CC
I
C
R
C

= 8 0.9 10
3
3.6 10
3
= 4.76 V
(iv) Applying Kirchhoffs voltage law to the entire outside perimeter of the circuit,
V
EE
+ I
E
R
E
+ V
CE
+ I
C
R
C
V
CC
= 0
V
CE
= V
EE
+ V
CC
I
E
R
E
I
C
R
C
= 5 + 8 0.91 10
3
4.7 10
3
0.9 10
3
3.6 10
3
= 5.48 V
E
and R
C
12 V
R
C
4 V
R
E
0.99
I
E
1.1 mA
V
CE
7 V
Solution:
V
CC
R
C
V
CB
V
BE
V
EE
R
E
+
+
I
E
I
C V
CE
+
(i) Applying Kirchhoffs voltage law to the emitter-base circuit,
V
EE
+ I
E
R
E
+ V
BE
= 0
R
E
=
V V
I
EE BE
E
=
4 0.7
1.1 10
3
= 3
(ii) Applying Kirchhoffs voltage law around the transistor terminal,
V
CE
= V
CB
+ V
BE
V
CB
= V
CE
V
BE
= 7 0.7 = 6.3 V
I
C
= I
E
= 0.99 1.1 10
3
= 1.089 mA
Applying Kirchhoffs voltage law to the collector-base circuit,
V
CC
I
C
R
C
V
CB
= 0
R
C
=
V V
I
CC CB
C
=
12 6.3
1.089 10
3
= 5.234 k
1.15 BIAS COMPENSATION
The biasing circuits provide stability of Q-point against variations in I
CO
, V
BE
and . The
collector-to-base bias circuit and voltage-divider bias circuit use negative feedback to stabilize
Q-point which reduces the amplication of the signal. If this reduction in gain is intolerable,
compensation techniques are used. In this method, temperature-sensitive devices such as
diodes, transistors, thermistors and sensistors etc. are used which provide compensating volt-
age and current to stabilize variations in I
C
with V
BE
and I
CO
.
1.15.1 Diode Compensation for V
BE
A circuit utilizing the voltage-divider stabilization technique and diode compensation is shown
in Fig. 1.84.
R
1
R
C
R
2
R
E
+V
CC
V
R
D
R
C
V
B
R
E
R
B
V
BE
+V
CC
V
V
D
R
D
+
I
B
I
C
+
Fig. 1.84Diode Compensation for V

BE
The diode is forward biased by the voltage V and current-limiting resistor R. We know
that V
BE
decreases by 2.5 mV/
o
C; i.e. the device starts operating at lower voltage which
changes I
B
and I
C
and hence, Q-point. If the diode is of the same type and material as
the transistor, the voltage across the diode will have the same temperature coefficient
(2.5 mV/
o
C) as the base-emitter voltage V
BE
. The variation in V
BE
and voltage across the
diode will be equal and opposite. Hence, they cancel out and I
B
and I
C
become indepen-
dent of V
BE
.
V
B
I
B
R
B
V
BE
I
E
R
E
+ V
D
= 0
V
B
= I
B
R
B
+ I
E
R
E
( V
BE
= V
D
= 0.7 V)
1.15 Bias Compensation1.101
I
E
R
E
( I
E
>> I
B
)
I
E
I
C
=
V
R
B
E
= constant
1.15.2 Diode Compensation for I
CO
For germanium transistors, changes in I
CO
with temperature play the important role in
collector current stability. A circuit utilizing the voltage-divider stabilization technique
and diode compensation for I
CO
is shown in Fig. 1.85. In this circuit, the diode is kept
in reverse-biased condition. The diode D is connected in place of resistance R
2
. If the
diode and the transistor are of the same type and material, the reverse saturation current
I
O
of the diode will increase with temperature at the same rate as the transistor saturation
current I
CO
.
I
B
D
+V
CC
+
R
C
R
1
I
I
o
I
C
V
BE
Fig. 1.85Diode Compensation for I
CO
From Fig. 1.85,
I =
V V
R
CC BE
1
For germanium transistor V

BE
= 0.2 V which is very small and can be neglected.
I
V
R
CC
1
= constant
I
B
= I I
O
We know that
I
C
= I
B
+ ( + 1)I
CO
Substituting the value of I
B
,
I
C
= (I I
O
) + ( + 1)I
CO
= (I I
O
) + I
CO
[ ( +1) ]
= [(I (I
O
+ I
CO
)]
As temperature increases, I
O
and I
CO
will change by the same amount.
I
C
= I
O
( I
O
= I
CO
)
As I is constant, I
C
remains essentially constant. Thus, changes in I
CO
with temperature are
compensated by the diode.
1.15.3 Thermistor and Sensistor Compensation
In this method of transistor compensation, temperature-sensitive resistive elements are used
instead of diodes or transistors. A circuit utilizing the voltage-divider stabilization technique
and thermistor is shown in Fig. 1.86 to minimize the increase in collector current due to chang-
es in I
CO
, V
BE
and .
R
1
R
C
R
T
R
E
+V
CC
R
2
Fig. 1.86Thermistor Compensation
Thermistor R
T
has a negative temperature coefcient. It is a temperature-sensitive resistor
whose resistance decreases exponentially as temperature increases. When temperature increases,
1.15 Bias Compensation1.103
I
CO
and I
C
increase. But with rise in temperature, resistance of the thermistor decreases. Hence,
increased collector current ows through thermistor into R
E
. Hence, voltage drop across R
E

increases. This voltage drop provides negative feedback such that I
B
decreases and hence, I
C

decreases.
An alternative compensation technique using thermistor is to place R
T
in place of R
2
as shown
in Fig. 1.87. When temperature increases, I
CO
and I
C
increase. But with rise in temperature,
resistance of the thermistor decreases. The voltage drop across R
T
decreases, which decreases
the forward-biasing base voltage. Hence, I
B
and I
C
decrease.
+V
CC
R
1
R
T
R
E
R
C
Fig. 1.87Thermistor Compensation
Instead of a thermistor, it is possible to use a temperature-sensitive resistor with a positive
temperature coefcient, i.e. sensistor. Its resistance increases exponentially as temperature
increases. It is connected in place of R
1
in voltage-divider bias circuit as shown in Fig. 1.88.
+V
CC
R
2
R
E
R
C
R
T
Fig. 1.88Sensistor Compensation
When temperature increases, I
CO
and I
C
increase. But with rise in temperature, resistance of
the sensistor increases, which decreases current owing through it. Hence, current through R
2

decreases, which reduces the voltage drop across it. This decreases the forward-biasing base
voltage. Hence, I
B
and I
C
decrease.

Study Materials - EDC 01

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Study Materials - EDC 01

Uploaded by

Copyright:

Available Formats

BJT

If only DC values are considered,

If only DC values are considered,

If only DC values are considered,

. By joining these two end points, a DC load

. By joining these two end points, a DC

. By joining these two end points, a DC

Fig. 1.84Diode Compensation for V

For germanium transistor V

You might also like