Lecture-1

Number systems
Introduction

Number systems provide a way of conveying and quantifying information. The study of
numbersystems is one of the important topics in digital electronics so as to understand how
informationis represented. Many of the applications of digital electronics like computers do not
process theinformation as either alphabets or decimal numbers but are designed using circuits
that processbinarydigits-only0 and1.

Inthismodule,emphasisisgivenondifferentnumbersystemscommonlyusedindatarepresentation.The
discussionbeginswithbasicdecimalnumber systemandits relationtobinary number system. The
octal and hexadecimal numbers are described with special referencetotheir correlation to
binarynumbersystem.

For understanding how computers and other digital systems communicate with the outer
world,number base inter-conversions are covered in brief.The module also introduces some
importantbinary codes used digital electronics like BCD, Gray, Excess-3, Parity, ASCII, error
detectionandcorrection codes.

Numbersystems

Numbers are everywhere. Universally we use the numbers in day to day life. We use numbers
formainlyforcountingandexpressingthemeasuredphysicalparametersinquantitativemanner.The
easiest way in which quantity of items can be expressed is to write a slash (/), a one (1) orsome
other symbol for each item of the group. For example, five items might be represented
as‘11111’.Thisschemeisusefulforsmallnumberofitems,say lessthanten,itbecomesextremely
difficult to represent large quantities. Almost two pages would be required to represent10000
items.
Toovercomethisproblemofrepresentingcompactly
largequantitiesofitems,theearliestmathematiciansdevisedascheme of notation in which.
1. Manydifferentsymbolsareused, otherthan justaslashoraone.
2. Thepositionofthesymbolwithrespecttofixedreference(e.g.Decimalpoint)decidestheweight
ofthe symbol. Such aschemeis referredto as numbersystem.
Number system is system of an ordered set of symbols used to represent a quantity.
Thesenumbers are defined for basic mathematical operations.All modern number systems use
radix orbase representation, which came to us from Hindus via Arabia. The format is based on
followingideas:-
1. Thenumberofdifferentsymbolsis restrictedtothebase(orradix)quantity.
2. Aspecialsymbolisusedtorepresentnothing(‘0’–Zero).

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 3. Everysymbol haspositional valueina number.
4. Thepositionofthesymbolwithinthenumberindicatesthemultiplicationbyarelevantpowerofth
e base. Many number systems are in used in real world. Most common are the decimal, binary,
octalandhexadecimalsystem.Letusstart thediscussionwith thepopulardecimalnumbersystem.

Decimal Number System

Decimal number system is the commonly used number system. It is known as base (or radix)
tensystems because it has ten digits 0 to 9 that can be used to represent any number. The
widespreaduse of decimal number system is related to human anatomy i.e. passion of 10 fingers
and theirutilityin counting. Figure1 shows thepositional values orweights of
decimalnumbersystem.

A complete decimal number can be expressed in terms of Integer part and fractional with
digitpositions numbered with reference to decimal point. The weight of each digit increased by
afactor of 10 for integer part and the weight of each digit decreases by a factor of 10.The
weightof each digit is determined by its position. Thus an integer can be represented as the sum
ofweightedsymbols.Forexample
234 = (2 102)+(3 101) +(4 100)
=200 +30+4
Note that, the value of the left most digit is maximum, hence it is called as the Most
SignificantDigit (MSD). Similarly, the value of the right most digit has minimum value, hence
itis referredtoasLeast Significant Digit (LSD).
For the representation of fractional part, it is necessary to represent using a reference point
calleddecimal point. The fractional part is present to the right of the decimal point.Let us
consider arepresentationof completenumber
234.56 =(2102) +(3 101) +(4 100) +(5 10-1)+(6 10-2)
=200 +30 +4+0.5 +0.06
The generalized polynomial notations for representation of decimal numbers are given by a
sumofunspecifieddecimalcoefficientsweightedbyposition.Thus,ingeneralanydecimalnumber ‘N’

can be thought ofas a sum of decimalcoefficients (ai) weighted by position (10i) and isgiven by

As there are ten symbols in the set of coefficients i.e. {0,1,2,3,4,5,6,7,8,9} , therefore the
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 number10 appears in the weighting factor. This number ‘10’ is referred to as the ‘radix’ or
alternately asthe base, of the decimal number system. The radix always tells us the number of
unique symbolsthat maybeusedin a numbersystem.
It is sometimes desirable, to utilize number systems that are other than radix-ten. In the
nextsection,weshall discusstheimportanceandemergenceofbinarynumbersystem.

Binary Number System:-

Almost all computers and digital systems are based on binary (two-state) operation.The
binarynumber system is a scheme of representing a number by using two symbols ‘0’ and ‘1’. It
is aradix-2 or the base 2 number system. A single binary digit is usually referred as a bit
(binarydigit).
Just similar to decimal number system, binary number system is a positional number system.
Theposition of bit in a binary number system indicates its weight or value within the number.
Theweight of each bit increases by a factor of 2 for each successive higher position and
decreases byafactor of2 with successive lower positions as shown in fig.2.
MSB Binarypoint
LSBIntegerpart part
Fractional
.
Each box represents one

BitBitposition: 3 2 1 0 -1 -2 -3

ExponentialNotation 23 22 21 20 2-1 2-2 2-3

Weight Value 8 4 2 1

Figure2:Bit positions and their weights in binary number system

Thus, in general any binary number ‘N’ can be thought of as a sum of binary
coefficients(ai)weighted by position (2i) and is given by

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Forexample,

(1101.11)2=1 X23+1 X22+0 X 21+1 X20+1X 2-1+1 X 2-2

Table1 gives positiveand negativepowers oftwo.

Table-1:Positiveand negativepowersof two.

Positivepowerof 2 Negativepowerof2
20=1 -
21=2 2-1=0.5
22=4 2-2=0.25
23=8 2-3=0.125
24=16 2-4=0.0625
25=32 2-5=0.03125
26=64 2-6=0.015625
27=128 2-7=0.0078125
28=256 2-8=0.00390625
29=512 2-9=0.001953125
210=1024~ 1Kilo 2-10≈1mili
220~1 Mega 2-20≈1micro
230~1Giga 2-30≈1nano
240 ~1Tera 2-40≈1pico

The leftmost bit has highest weight in binary number and hence it is known as Most
SignificantBit (MSB). The rightmost bit has the lowest weight and is referred to as Least
Significant Bit(LSB).

There are number systems other than binary and decimal, such as octal or Hexadecimal
numbersystems. Usually, we find difficult to work withbinary numbersbecause they are very
longwhile representing larger decimal quantities. Therefore,Octal and hexadecimal, numbers
areusedto compress longstrings of binarynumbers.Let us discussabout thesenumbersystems.

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 Lecture-2
Octal number system
The octal number system has eight unique symbols which are 0,1,2,3,4,5,6,and 7. As there
areeight symbols, the number system has a radix of 8. It is also referred to as base 8 number
system.Since,it has base8=23, everygroupof3-bits is represented byan octal digit.Forexample,
(5)8 =(101)2or(7)8= (111)2 or(27)8=(010111)2

In octal number system, the weight of each digit position increases by the factor of 8 (8,
16,64,……)aswemove towards right.

When a position digit crosses the value represented by symbols for thatbase, a carry into
thenexthigher position is produced.

Forexample:(234)8=(2 82) +(3 81) +(4 80)

Hexa decimal number system

The hexadecimal number system has sixteen symbols which are 0 to 9, A, B,C,D,E and F.
Asthere are sixteen symbols, the number system has a radix of 16. It is also referred to as base
16numbersystem.Since,ithasbase16=24,everygroupof4-bitsisrepresentedbyahexadecimal
digit. Forexample,

(6)16 =

(0110)2or(E)16=(1110

)2

or (7F)16=(0111 1111)2

Whenapositiondigitcrossesthevaluerepresentedbysymbolsforthatbase,acarryintothenexthigher
position is produced.

Forexample:(234)16 =(2 162)+(3 161) +(4 160)

Many digital systems process binary data in groups that are multiples of four bits.
Hexadecimalnumber system is widely used in microprocessors, since they are shorter than
binary. This makesthem easy towrite andremember. Furthermore,youcanconvert them to binary
whenevernecessary.It is easyto write thehexadecimal number than binarynumber.

Radix-nnumbersystem

In radix-n number system, the numbers of symbols are restricted to value n. It can be any number
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other than decimal, binary,octalandhexadecimal.Table-2indicates Radix and number of symbols.

Table-2:Radixandnumbersofsymbols
Radix( base) Symbols
2(Binary) 0,1
3 0,1,2
4 0,1,2,3
5 0,1,2,3,4
6 0,1,2,3,4,5
7 0,1,2,3,4,5,6
8(Octal) 0,1,2,3,4,5,6,7
9 0,1,2,3,4,5,6,7,8
10(Decimal) 0,1,2,3,4,5,6,7,8,9
……
…….
16(Hexadecimal) 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
A number represented in Radix-n system, has n symbols in the system.Let us
understandcountingin theRadix-n system. Table-3indicatescountingin fourpopular
numbersystems.

Table-3:Countingindifferentnumbersystems.

Decimal Binary Octal Hexadecimal Radix-5 Radix-12

0 0000 0 0 0 0
1 0001 1 1 1 1
2 0010 2 2 2 2
3 0011 3 3 3 3
4 0100 4 4 4 4
5 0101 5 5 10 5
6 0110 6 6 11 6
7 0111 7 7 12 7
8 1000 10 8 13 8
9 1001 11 9 14 9
10 1010 12 A 20 A
11 1011 13 B 21 B
12 1100 14 C 22 10
13 1101 15 D 23 11
14 1110 16 E 24 12
15 1111 17 F 30 13

To learn to count in binary, let us first consider the problem of counting a quantity of items

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 indecimal. Let us start at 0 and count up to 9 before we run out of digits. Then start with
anotherdigit position to the left and continue counting 10 through 19, then change the symbol at
left andcontinue counting 20 through 29 and so on. Once we reach at 99, all the two digit
combinations are exhausted, so a third digit is needed in order to count from 100 through 999.

A similar situation occurs while counting in binary, except that there are only two symbols.
Letusbegincounting0,1.Letusincludeanotherdigitpositionandcontinue10,11.Withthreedigits, the
count continues 100, 101, 110, and 111 as shown in Table-3. Similar counting
processisrepeatedforRadix-n numbersystem.

As the binary symbols 0 and 1 are exactly identical to first two decimal symbols, it is
possiblethat confusion may result in writing of a number.For example, when a number 100 is
written,areweexpressingquantityfourorhundred?Ofcourse,thatdependsonthenumbersystemthatis
being used. To avoid confusion between different number systems, a number is enclosed in
aparenthesesandasubscript is written to indicate theradix.

e.g.(100)2= Four,(100)10= Hundredor(1111)2=(15)10etc.

Number Base Inter conversions:-

Modern computers do not process decimal numbers. Instead they work with binary
numbers,which use only the digit 0 and 1. Hence, we shall learn how to convert from decimal to
binary,octal, hexadecimal and vice versa. People do not like working with binary numbers
because
theyareverylongwhenrepresentinglargerdecimalquantities.Therefore,Octal,hexadecimal,numbers
areusedtocompresslongstringsofbinarynumbers.Hence,weshalllearninterconversionsfrom
onesystem to another asshown in fig. 3

Figure-3:Possiblenumberbaseinterconversions

Wewilllearn followinginterconversions
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 (1) DECtoBIN (2)BINtoDEC
(3)DEC to OCT (4)OCT to DEC
(5)OCTto BIN (6)BINto OCT
(7)DEC toHEX (8)HEXtoDEC
(9)HEXto BIN (10)BINto HEX

Decimal to binary conversions (DEC to BIN)

There are two ways of converting a decimal number into a binary number. (a) Sum-of-
weightsmethodand (b)Double-dabble method

(a) Sum-of-weightsmethod

Thefollowingmethod can beadopted

(i) Getthedecimalnumber
(ii) Writetheweights in exponentialform or/and its value.
(iii) Determinethe setof binaryweights whosesum isequal todecimal number.
(iv) Place1anda0atappropriatepositionsi.e.placea1ifweightistakenduringthesumand0
otherwise.

Example:Convertdecimal number9 intoits binaryequivalent.

Solution : 8 4 2 1
(9)10=8 +0 +0 +1
(9)10=(1001)2
Example:Convert decimalnumbers 25,58 and255 intotheirbinaryequivalent.
Solution : (25)10 = (11001)2
(58)10 = (111010)2
(255)10 = (11111111)2
(b) Double-dabblemethod:

It is a popular and most systematic way to convert decimal numbers to binary numbers. In
thismethod a repeated division-by-2 for integers and repeated multiplication-by-2 for fractional
partisused. Thebest waytounderstand themethod isto follow theprocedurestep-by-step.

Doubledabbleprocedureforintegers –
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(i) Getthedecimalnumber.
(ii) Dividethedecimalnumberby2andwritequotientandremainder.ThisremainderistheLSB(Least
significant bit).
(iii) Againdividethequotientobtainedaboveby2.Thisproducesanotherquotientandremainder.There
mainder is the next digit of thebinarynumber.
(iv) Continuethisprocessofdivisionuntilthequotientbecomes0.Theremainderobtainedinthefinal
division is the MSB(most significant bit).
(v) Writetheremainders inreverseorder i.e.firstremainderisLSBandlastreminder isMSB.

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Example:Convertdecimal number19 intoits binaryequivalent.

Solution:Proceedas follows

Quotient Remainder

2 19 9 1 LSB

2 9 4 1

2 4 2 0

2 2 1 0

2 1 0 1 MSB

Thus(19)10=(10011)2

Double–dabbleprocedureforfractionalpart

(i) Getthefractionalpart
(ii) Multiply the decimal number by 2 and write product and carry. Note that product should
bein fractions, integer part be transferred to carry. This carry is the MSB (most
significantbit).
(iii) Multiplyeachfractionalpart ofproduct by2 untilthe fractionalproduct iszero.
(iv) The carriesgenerated by eachmultiplicationformthe binary number.The
firstcarryproducedis theMSB andthe last oneis theLSB.

Example:Convert decimalnumber0.625intoits binaryequivalent.

Solution : fractionalproduct Carry
0.625 2= 1.25 1 MSB
0.25 2= 0.50 0
0.50 2 = 1.00 1 LSB
Thus,(0.625)10=(0.101)2

Note: Ifnecessaryrepeatedmultiplicationprocesscanbecontinuedfurtherwheregreateraccuracyis
desired in caseof nonzero product.

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Binary to Decimal conversion (BINtoDEC):
The decimal equivalent of binary number is obtained by using the fact that binary number is
aweighted number. Hence we shall use once again sum- of –weights method, which is
describedbelow.
(i) Write thebinarynumber.
(ii) Writetheweights ofeachbit under thebinarynumber.
(iii) If azero appearsinabitposition,deletethedecimalequivalent.

Example:-Convert binarynumber0101 intoitsdecimal

equivalent.Solution : - 0 1 0 1
8+4 +2+1 =5
(0101)2=(5)10
3.1 Decimaltooctalconversion (DECtoOCT):

The repeated division-by-8 for integer and repeated multiplication-by-8 for fractions are used
fordecimal to octal conversion, which is similar to the method used in conversion of
decimalnumbersinto binarynumbers (also referredasoctal dabblemethod).

Example:Convertdecimal number127into itsoctalequivalent.

Solution :
Quotient Remainder
127 8 15 7 LSB

15 8 1 7

1 8 0 1 MSB
Thus (127)10=(177)8
(175)10= (257)8
OctaltoDecimalconversion (OCTtoDEC)

Conversionfromoctaltodecimalcanbedoneusingsumofweightednumerical
symbols.Followingproceduremaybeadopted:
(i) Writetheoctalnumber.
(ii) Writetheweightsofeach symbolunderthatdigit.
(iii) Multiplyeachdigit byits positional weight and then add up to obtain equivalent.

Example:Convertoctalnumber23toitsdecimal equivalent.
Solution :(23)8=2x81+3x80
=2x8 +3x1

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=16 +3 =(19)10

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Octaltobinaryconversion (OCTtoBIN):
The prime application of octal numbers is in the representation of binary number. Since it
takesonly one digit to represent three bits, octal numbers are much easier to ‘READ’than
binarynumbers.
Followingproceduremaybeadopted.
(iv) Writetheoctalnumber.
(v) Foreachoctaldigitwrite thecorresponding3-bitbinaryequivalent.
(vi) The binary number may be written without a
gap.Example:Convertoctalnumber23toitsbinaryequivalent.
Solution :
2 3

010 011
Thus (23)8=(010011)2
Binarytooctalconversion(BINtoOCT):
Convertingabinarynumber tooctal isastraightforwardprocedure, asdescribed below,
(i) Beginningatabinarypoint,simplyseparatethebinarynumberintogroupsofthreebits
towards both left as well as right.
(ii) Tocompleteagroup, addabit0ifnecessary.
(iii) Replaceeachgroupofthreebitswith itsoctalequivalent.

Example:Convert binarynumber 11010intoits octalequivalent.

Solution :-11010 011 010 =32
Thus (11010)2=(32)8

DecimaltoHexadecimalconversion (DECtoHEX)

OnewaytoconvertdecimalnumbertoHexadecimalnumberistheuseofHex-
dabblemethod.Theideaisto divideintegerssuccessivelyby16and multiplyfractionsrepetitivelyby16.
Example:Convertdecimalnumber650intoitshexadecimalequivalent.
Quotient Remainder
650 16 40 10(A) LSB

40 16 2 8

2 16 0 2 MSB
Thus (650)10= (28A)16
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 Hexa decimal to decimal conversion (hextodec)
Inhexadecimalnumbersystemeachdigitpositioncorrespondstoappropriatepowerof16.Theweightsof
thedigit positions inhexadecimal number areas follows:
………163162161160.16-1 16-216-3
ToconvertHexadecimalnumbertodecimalnumber,multiplyeachhexadecimaldigitbyitsweightand
add the resultingproduct.

Example:Converthexadecimalnumber1Cintoitsdecimalequivalent.
Solution :-1C= 1x161+Cx160
=1x16+12x1
=16+12=(28)10

Hexadecimaltobinaryconversion (HEXtoBIN):

To convert a hexadecimal numberto abinarynumber,firstwriteeach hexadecimal digit to its 4-

bitequivalent usingthe binarycodes,and then write thebinarynumbers without a gap.

Example:Convert(9A)16to binaryequivalent.

Solution :- (9 A)

(1001 1010)2

Thus (9A)16= (1001 1010)2

BinarytoHexadecimal conversion (BINtoHEX):

Converting a binary to hexadecimal is a straight forward procedure. Simply break the

binarynumber into four-bit groups starting at binary point, and replace each group with the
equivalenthexadecimalsymbol.

Example:Convert(101101)2 to Hexadecimalequivalent.

Solution:-

Thus(10 1101)2=(2D)16

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Binarycodes

There are several binary codes like weighed, un-weighted, self-complementing, cyclic etc. In
thissection,let us begin with the simplest BCD code.

BinaryCoded Decimal (BCD)Code:-

Thebinarycodeddecimal(BCD)codeisaweightedcode.Thiscodeisfoundveryconvenientfor
representing digits. Each group of four bits is used to represent one decimal digit. It is alsocalled
as 8421 code. This code consists of four bits which have the weights as8421 . Thefourbit
combination that representsthe decimal digits 0 to9 areshown intable1.4.

Table-4: The8421 BCDcode

Decimaldigit 8421(BCD)code
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001
10 0001 0000
11 0001 0001

It is realized that with four bits, sixteen different symbols (24) can be represented, but in
8421BCD code only ten of these are used. The remaining six code combinations are invalid in
the8421BCD code.

ToexpressanydecimalnumberinBCDcodesimplyreplaceeachdecimaldigitbytheappropriate four-
bit code.Let usconsider thedecimal number23,

Thus (23)10= (0010 0011)BCD

Advantages of BCD code over binary are that it is very simple. We do not have to
performsuccessive division by two and write the remainder. We simply have to know the codes
for theten basic decimal digits and then we can convert any decimal number into its equivalent
BCDcode. The disadvantages are that it requires large number bits than the binary equivalent.
BCDarithmeticimplementation is difficult ascomparedto binary.

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 TheBCDcodehasbothacodeandadirectbinaryconversionaslongasthedecimalnumbersare integers
from 0 to 9. For number greater than 9, the conversion and coding are completelydifferent.In the
next section, we shall discussother binary codes like excess code and GrayCode.

Weightedcode

In the weighted codes, the weights or values are assigned to the binary bits as per their
bitpositions. The decimal value of the code is the algebraic sum of weighted digits. In other
words,the decimal number in weighted code can be written as the sum of the products of weight
and thenumberitself.

Mostpopular weightedcodesare 8421,5421,7421,2421,5211etc. Table–5showstherepresentationof

decimal number in variousweighted codes.

Table-5:Weightedcodes

Decimal Weightedcodes
number
8421 5421 7421 2421 5211
0 0000 0000 0000 0000 0000
1 0001 0001 0001 0001 0001
2 0010 0010 0010 0010 0011
3 0011 0011 0011 0011 0101
4 0100 0100 0100 0100 0111
5 0101 1000 0101 1011 1000
6 0110 1001 0110 1100 1010
7 0111 1010 1000 1101 1100
8 1000 1011 1001 1110 1110
9 1001 1100 1010 1111 1111

The8421codeutilizesthenaturalweightsfortherepresentationofthebinarynumbershenceitispopularly
knownas natural binarycoded decimal (NBCD).

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Self-complementingcode

A code is said to be self complementing if the binary representation of a decimal number (N)
inthat code is 1’s complement of the decimal number (9-N).Let us consider N=6.The
weightedcode is said to be self complementing if N and (9-N) are 1’s complement of each other.
Here it is9’scomplement. The9’scomplement of6 is 3.

Suchcodeshavethepropertythatthe9'scomplement
ofadecimalnumberisobtaineddirectlybychanging1's to0'sand 0'sto 1's (i.e.,by
complementingeachbit in the pattern)

The weighted codes 2421 and 5211 are self complementing codes whereas 8421,5421,7421
arenot self complementing code. This could beeasilyverified usingthe Table-5.

Excess-3Code:

Excess-3 Code is a unweighted code, as no definite weights are assigned to bit positions.
Thiscode is sometimes used with BCD code. As the name suggests this code is obtained by
adding 3toeachdecimaldigit andthenconvertingitintobinary.Table-6 illustratestheexcess-3 code.

Table-6:Excess-3Code

DecimalDigit BCDCode Excess-3Code

0 0000 0011
1 0001 0100
2 0010 0101
3 0011 0110
4 0100 0111
5 0101 1000
6 0110 1001
7 0111 1010
8 1000 1011
9 1001 1100
For example, convert a decimal number 4 into Excess-3 code.BCD code is 0100 & excess-
3codeis0111.

The key feature of excess-3 code is that it is self-complementing. That is, the 1’s complement
ofan excess-3 code is the excess-3 code for the 9’s complement of the corresponding
decimalnumber.The9’scomplement ofadecimal digit is obtained bysubtractingthat digitfrom
number
9.Thus 9’scomplementof3 is 6and that of2 is 7.

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 Theexcess-3codefindsapplications in arithmetic operations as it greatly simplifies the process

Cycliccode

Whilediscussing cycliccodes,itisfirstnecessary tounderstandtheconceptofHammingdistance.

Hamming distance is defined as the number of places the binary bits differ in
twoconsecutivenumberinaparticularcode.Forexamplein8421code,hammingdistancebetween0
(0000) and 1 (0001) is one, as there is a change of one bit position atLSB from 0 to 1.Similarly
the Hamming distance between 1 and 2 is 2. Similarly Hamming distance between 3and 4 is 3.
Thus, one can say that the Hamming distance between two successive codes of 8421codeisnot
constant.
Allcycliccodeshave aunit Hammingdistance property.Graycodeisanexampleofcycliccode.It is
normallyusedin rotaryencoders, ADCs etc.

GrayCode :

The Gray code is an unweighted code as no weights are assigned to bit positions. Hence,
thiscode is not used in arithmetic operations. This code is often associated with optical encoders,
atechniquefor convertingtheshaft angleintobinaryvalue.This isalsoreferredtoascycliccode.

The Gray code is basically a unit distance code, where the distance between consecutive
codewords is constant. The Gray code exhibits only a one-bit change between two consecutive
codes(unit Hamming distance). Table-7 gives a comparison of binary and Gray codes. Gray code
canhaveanynumber ofbits likebinary.

Table-7:Fourbit Gray Code

DecimalDigit Binary GrayCode

0 0000 0000
1 0001 0001
2 0010 0011
3 0011 0010
4 0100 0110
5 0101 0111
6 0110 0101
7 0111 0100
8 1000 1100
9 1001 1101
10 1010 1111
11 1011 1110

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 12 1100 1010
13 1101 1011
14 1110 1001
15 1111 1000

Letus understand theprocedurehow Graycodeisgeneratedfrom binarynumbers.

1. Write thebinarynumber.
2. TheMSBin Graycode is thesameasin binarynumber.
3. Goingfromlefttoright,addeachadjacentpairofbinarydigittogetthenextGraycodedigit.
Discard the carries.
Letusconsider thebinarynumber1011 toGraycodeconversion,

Binary 1 0 1 1

+ + +
1 1 0

Gray 1 1 1 0

Thusbinarynumber1011 is converted tograycodeas 1110.

Letus understand the procedurehowtheGraycodeis converted toabinarynumbers.

1. Write the Graycode.

2. TheMSBof binaryisthesameas inGraycode.
3. Going from left to right, addthe MSB bit of the result to the next adjacent bit
ofGraycodetogetthenextbitofbinary.Discardthecarries.Theprocessiscontinuedtillthe
LSBis obtained.
Letusconsider thebinarynumber1011 toGraycodeconversion,
Letusconvert Graycodeto binary

Gray 1 1 1 0

+ + +

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Binary 1 0 1 1

21
Logic Gates
Introduction

Logic gates are the basic components in digital electronics. These gates are used to create
digitalcircuitsrightfromsimpletocomplexlogiccircuitandevencomplexintegratedcircuits.Complex
microprocessorormicrocontrollerICsare constructed usingmanylogic gates.

Logic gates are the fundamental building blocks of all digital systems.It has one or more
inputsandoneoutputwithsomelogicalrelationshipbetweenthem.Logicgateacceptsbinarysignals
i.e. True or False, ON or OFF, 1 or 0 and have an ability to make decisions. The state of theoutput is
decided by the input states. All logic gates implements some Boolean function whichcorrelates
outputwith inputthrough some logical operation. Logic gates are mainly
designedwiththeelectronicswitches usingdiodesandtransistors.

There are three basic gates – AND, OR and NOT. NAND and NOR gates are derived gates arealso
known as universal logic gates. An XOR gate is inequality detector gate and can be used
incomparator,adders,parity generatorsetc.Thesymbolsoflogicgatesareof twotypes–Distinctive
shapes&rectangularshapes.

In this module, the logical operation, characteristics, switch analogy and truth tables of
differentlogicgatesarediscussed.TheoriginalANSI/IEEEdistinctiveshapesymbolsandnewANSI/IEEE
standard outline symbols of logic gates are prominently introduced. Logic gates arecommercially
available in two basic logic families, such as IC 74XX series for TTL (TransistorTransistor Logic)
and IC 40XX/45XX for CMOS (Complementary Metal Oxide
Semiconductor)series.Thesealllogicgatespackaged asSmallScaleIntegration(SSI)ICs.

Logic Gates

Digital systems are constructed using logic gates. The logic gate is the most basic building blockof
any digital system capable of making decision including computers. Each one of the basiclogic
gates is a piece of hardware or an electronic circuit that can be used to implement
somebasiclogicexpression.Itisanelectroniccircuitwithoneormany inputsand onlyoneoutput.

With the help of logic gates it is possible to implement the most elementary logic expressions,also
known as Boolean expressions. . The three basic logic gates are the OR gate, the AND gateandthe
NOTgate.Mostlogicgateshave twoinputsandoneoutput.

Atanygiven instance,everyinput oroutputterminalisinoneofthetwologicconditions

 TrueorFalsewhichdescribesLogicvalue,
 1 or0 providesbinary value,
 +5V(+3.3Vfor newdevices) or 0Vprovidesvoltagelevels,
 HighorLowdescribesthevoltagelevels

22
  ONorOFFdescribesthe switchposition.
The common use of logic gate is to act as switches (although they have no moving parts).
Gateopens to pass on logic or close to shut to keep it off. This is why they are known as gates.
Gatesareclassifiedasprimarygates(NOT,AND,OR)andSecondaryorderivedgates(NAND,NOR
– Universal gates and XOR, XNOR - combinational gates).Letusnow discuss these gates onebyone.

NOT gate:

NOTgatehas one-inputandone-output.Itisalogiccircuitwhoseoutputisalways thecomplement of the

input.Fig. 1 indicates the logic symbol and truth table of NOT gate alongwith simple
implementation using switches.The NOT gate is popularly known as inverter.
Itperformslogicalinversionorcomplementation.

Thatis,ifAistheinputto aNOTcircuit,thenitsoutput YisgivenbyY= or A’. That is,

aLOWinputproducesa HIGHoutputandvice versa.

(a) (b)

Input Output
A Y
0 1
1 0
(c)
Figure:NOTgate(a) LogicSymbol ( b ) Pin diagram of NOT Gate
(c)Truth table.

Thepurposeofinverteristochangeonelogicleveltooppositelevel.TheLOWlevelatinputproducesa
HIGHlevelandvice versa.Intermsofbits,itchangesa0toa1 anda 1to0.

Let us now consider an electronic circuit consisting of Battery, Resistor, Switch and Lamp
toimplement simple NOT gate or inverter.When switch is open (logic ‘0’) then lamp is ‘on’
(logic‘1’)andwhenswitchisclosed (logic ‘1’)thenlampis‘off’(logic‘0’).

23
AND gate:

AND gate is a logic circuit having two or more inputs and one output. The AND gate
performslogical multiplication i.e.AND function. Fig.2 indicates the logic symbol and truth table of
twoinputANDgate alongwithsimpleimplementationusingswitches.

The outputofanAND gate isHIGHonlywhenallofitsinputsareinthe

HIGHstate.Inallothercases,theoutputis LOW.ForANDgate,Y=A.B

The logical operation of AND gate can be expressed with the help of a table which includes allinput
combinations and corresponding outputs. Such table of input / output relations is known astruth
table. In this case, there are 2 inputs to AND gates to provide 22 = 4 input combinations inthe truth
table. The truth table may be extended to any number of inputs. For 3 inputs, there are
8combinationsand16for4inputs.

(d)
The image part with relationship ID rId33 was not found in the file.

(e) (c)

Figure:ANDgate(a) LogicSymbol(b)Truth table (c) Pin diagram of AND Gate

ANDgatecanbeimplementedusingswitches.LetusnowconsideranelectroniccircuitconsistingofBattery,
Resistor,SwitchesandLamptoexplaintheANDfunction.Ifbothswitchesareclosed(logic‘1’)then
onlylampisON(logic‘1’).Ifany oneorboth switchesare open (logic’0’) then lamp will be OFF (logic
‘0’). The AND gate produces a logic 1, if and onlyifalltheinputs areatlogic 1.

ORGate

An OR gate is a logic circuit with two or more inputs and one output. The OR gate performslogical

24
 addition i.e. OR function.Fig. 3 shows the logic symbol and truth table of two input ORgate
alongwithsimpleimplementationusingswitches.

The output of an OR gate is HIGH only when all of its inputs are in the HIGH state. In all
othercases,theoutputisLOW.ForORgate,Y=A+ B

(f) (b)

(c)
Figure3:ORgate(a)LogicSymbol(b)Truthtable (c) Pin diagram of OR Gate

OR gate can be implemented using switches. Let us now consider an electronic circuit consistingof
Battery, Resistor, Switches and Lamp to explain the OR function. If both switches are
open(logic’0’) then lamp will be OFF (logic ‘0’). If any one or both switches are closed (logic
‘1’)then the lamp is ON (logic ‘1’).The OR gate produces a logic 1, if either one or both the
inputsare atlogic 1.Thetruthtablemaybeextendedtoanynumberofinputs.

NANDgate
NAND gate is combination of AND and NOT gates. The NAND gate provides AND functionswith
inverted output. Fig.4 indicates the logic symbol and truth table of two input NAND
gatealongwithsimpleimplementationusingswitches.

The output of a NAND gate is a logic ‘0’ when all its inputs are a logic ‘1’. For all other
inputcombinations,theoutputisalogic‘1’.NAND gateoperation islogicallyexpressedasY =.

25
 (a) (b)

Inputs Output
A B Y
0 0 1
0 1 1
1 0 1
1 1 0
(c)

Figure4:NANDgate(a) LogicSymbol(b)Pin diagram of OR Gate (c)Truthtable.

NAND gate can beimplemented using switches. Letus now consider an electronic circuitconsisting
of Battery, Resistor, Switches and Lamp to explain the NAND function. If any one orboth the
switches are open (logic’0’) then lamp will be ON (logic ‘1’). If both the switches areclosed (logic
‘1’) then the lamp is ON (logic ‘1’). The NAND gate produces a logic 1, if eitherone of both the
inputs are at logic 0 else the output is at logic 1. The truth table may be
extendedtoanynumberofinputs.

NORgate

NOR gate is combination of OR and NOT gates. The NOR gate provides OR function withinverted
output. Fig. 5 shows the logic symbol and truth table of two input NOR gate along
withsimpleimplementationusingswitches.

The output of a NOR gate is a logic ‘1’ when all its inputs are logic ‘0’. For all other
inputcombinations,theoutputisalogic ‘0’.NORgateoperationislogicallyexpressed asY=

𝒀=𝑨+𝑩

The truth table of two input NAND gate is given as

Inputs Output

26
 A B Y
0 0 0
0 1 1
1 0 1
1 1 1
XOR Gate
The XOR gate has two (or) more logic inputs and single output. 7486 is two inputs XOR gate IC. EX-
OR gate is not a basic operation & can be performed using basic gates. Its logical equation is
𝒀 = 𝑨𝑩 + 𝑨𝑩

(a) Symbol of XOR gate

The truth table of two input XOR gate is given as

Inputs Output
A B Y
0 0 0
0 1 1
1 0 1
1 1 0

The output of XOR is in logic ‘1’, when one and only one of two inputs are at logic ‘1’.Similarly,
the output of XOR is at logic ‘0’, when both the inputs are at logic ‘0’ or both inputsare at logic ‘1’.
As XOR gate generates logic ‘1’ only when inputs are not equal, hence this
gateisalsoknownasinequalitydetectorgate.

When more than two inputs are to be XORed then multiple two inputs XOR gates may be used.The
output of a multiple-input XOR logic function is at logic ‘1’ when the number of 1s in
theinputsequenceisoddandatlogic‘0’whenthenumberof1sintheinputsequenceiseven, including zero.
That is, an all 0s input sequence also produces a logic ‘0’ at the output.Three ormoreinputs XOR
donotexist.

XNORgate

Exclusive-NOR gate or XNOR gate is formed by combining the Exclusive-OR gate (XOR gate) and
the NOT gate. On analysing the XNOR truth table, we understand that the output is similar to the
standard NOR gate except that the output of the XNOR gate is high when both inputs are high. The
output of EX-NOR gate is 1 when both the inputs are 1 (high) and if both the inputs are 0 (low). If
either one of the input is 1 (high) the output will be 0 (low). In other words, both the inputs should be

27
in the same logic level for the output to be 1.

A simple NOR gate symbol can be denoted by a standard OR gate with an inversion bubble connected.
The logic symbol of an Exclusive-NOR gate is an XOR gate (Exclusive-OR gate) with the “inversion
bubble” or the circle in front. Therefore, the Exclusive-NOR gate is the complementary form of the
Exclusive-OR gate.

Inputs Output
A B Y
0 0 1
0 1 0
1 0 0
1 1 1

The Boolean expression for the XNOR gate is given by

𝑌 = 𝐴⊕𝐵
Or

𝑌 = 𝐴̅𝐵 + 𝐴𝐵

UniversalLogicGates

Any Boolean / logic expression can be realized using the AND, OR, and NOT gates.From
thesethree primary gates, two derived gates NAND and NOR are usually realized. It is possible
toconstructbasicgatesnamelyNOT,AND,ORusingcombinationofNANDgatesoracombination of
NOR gates . For this reason NAND and NOR gates are called as universal logicgates.

Let us now understand the importance of NAND and NOR logic gates. The NAND and NORgates
are referred to as Universal logic gates as each of these gates can be used to construct basiclogic
gatesAND,OR &NOTgates.

28
NANDgateasuniversallogicgate

Let us consider now NAND gate as a universal logic gate.Figure 9 shows the implementation
ofbasiclogicgatesusingonlyNANDgates.

(a) NOTgate: 𝑌=𝐴'

A Y
0 1
1 0

(b) AND gate: 𝑌=𝐴·𝐵

A B Y
0 0 0
0 1 0
1 0 0
1 1 1

(c)ORgate: 𝑌=𝐴+ 𝐵

A B Y
0 0 0
0 1 1
1 0 1
1 1 1

(d)NORgate: 𝑌=(𝐴+𝐵)′

A B Y
0 0 1
0 1 0
1 0 0
1 1 0

A B Y
0 0 0
0 1 1
1 0 1

29
(e)Ex-OR gate:𝑌=𝐴’𝐵+AB’ 1 1 0

NORGateasuniversallogicgate

Let us consider now NOR gate as a universal logic gate.Figure 10 shows the implementation
ofbasiclogicgatesusingonlyNORgates.
Three NAND gates are required to construct the OR gate. First level two NAND gates will actlike
an inverter. These two inverters will complement the inputs. The third NAND gate willperform
ANDing of the complemented inputs first and then inverts the result. This provides
finaloutputaslogicalORfunctions.
A NOR gate can be used to as NOT gate by connecting all its inputs together and applying inputto
the commonterminal.The output of NOR gate generates output as NOT A i.e. complementofA.The
construction of OR gate requires two NOR gates. The first NOR gate provides complementof A OR
B.Whereas the second NOR gate acts like an inverter. The double complement
willcanceleachothertoprovideactionofOR gate.

ThreeNORgatesarerequiredtoconstructtheANDgate.

In the first level two NOR gates will act like an inverter. These two inverters will complementthe
inputs. The third NOR gate will perform ORingof the complemented inputs first and
theninvertsthe result.ThisprovidesfinaloutputaslogicalANDfunction.

NOTgate: 𝑌=𝐴'
A Y
0 1
1 0

ANDgate: 𝑌=𝐴·𝐵

A B Y
0 0 0
0 1 0
1 0 0
1 1 1

30
 ORgate: 𝑌=𝐴+ 𝐵
A B Y
0 0 0
0 1 1
1 0 1
1 1 1
NAND gate: 𝑌=(𝐴𝐵)′

A B Y
0 0 1
0 1 0
1 0 0
1 1 1

Ex-NORgate: 𝑌=𝐴Ⓢ𝐵=(𝐴’𝐵’+AB)
Delays and Hazards
Introduction

Thisis the last section in the combinational logic circuits. Digital systems discussed sofar
ascombination logic circuits are logic gates, multiplexers, demultiplexers, encoders, decoders,
adders,subtractors, comparators, ALUs etc. All these combinational circuits were built using “ideal”
logicgates. The meaning of ideal is that there is no propagation delay. In the real world, it is
necessary toconsider all these gates with certain propagation delays and study the effect of such
delay on theirperformance.
In addition, the digital systems may receive unwanted “transients” in their steady state
operation.Theseunwanted transients in the steady state signals are popularly known as“glitches”.A
glitch isa type of logicnoise which is a kind of unwanted signal. Presence of glitch may initiate
anunwanted process and crates hazards in the combinational circuit. In thismodule we shall
discussthe types of hazards -static and dynamic,methods to detect, eliminate or avoidhazards
throughgooddesign practices.

Hazardsincombinationallogiccircuits

The term “hazards” specifies theunwanted switching transient, false output orglitches whichappear

31
 at the output of a circuit. Hazards in any system are an undesirable effect caused by eitherinternal
deficiency of the system or external disturbances. In combinational circuits, these transientsor
glitches are due to finite propagation delay of the components along the different paths
withinthenetwork.Thedifferencein propagation delays are corresponding todifferent signal
pathsresultsinhazards.
Thehazardcan also be definedas the actual or potential malfunction of alogic circuit duringtransition
between two input states when single variable changes. The term malfunction means anydeviation
from the intended response. These logic hazards have the same basic problem. When thechanges in
the input signal do not change the output signal due to some form of delay caused bylogic building
blockslike NOT, AND OR gates etc.This generates amalfunctioning in theperformance
ofthecircuit.Thisishoweveratemporaryproblem,andthelogicwillfinallygenerate a desiredfunction
output.Even though thecombinational logic system is generating acorrectoutput after some time, it is
essential that hazards be eliminated as they can have an effect on
theoverallperformanceofthesystem.

Inthecombinationalcircuits,thehazardswillproduceanunwantedoutputvalue.Ifsuchcombinational
circuits areusedas buildingblocks of bigger digital system
likeasynchronoussequentialcircuitthenitwillproduceatransitiontoincorrectstatetable.
TypesofHazards
The hazards result in the false output value when different paths from input to output have
differentpropagation delays.Itis the deviation from the standard response. There are three types
ofhazards:Statichazards,dynamichazardsandfunction hazardsasshown infigure-1.
Instatichazards,when
oneinputvariablechanges,theoutputchangesmomentarilybeforestabilizingtothecorrectvalues.Thereare
twotypesofstatichazards:

Static 0 hazard: A static 0 hazard takes place when the output momentarily goes to 1 (HIGH)for
ashortdurationwhenitshould remainataconstantvalue0 (LOW).
Static 1hazard: If theoutputisideallysupposed tobe 1 (HIGH) butdue to differenceinpropagation
delay,if it turns out to be 0 (LOW) for short period of time, thenthe circuit said tohavestatic1hazard.

32
 Hazards

Static Dynamic Function

Hazards Hazards Hazards

1 1 1 1 1

0 0 0

Static–0Hazards Static-1Hazards DynamicHazards

TypesofHazards

Dynamichazard: In statichazard,the output changes only twice(101 or 010).Indynamic

hazards, there is a possibility of an output changing more than once as a result of a singleinput
change.When an output is supposed to change value from 0 to 1 or 1 to 0, this output maychange 3 or
more times.If this situation appears at output, the circuit is said to have a dynamichazards.
Function hazards : A hazard that can be caused in the output signal, when more than one
inputsignalischanged simultaneously,iscalled afunctionhazard.
Statichazards:
A static hazard occurs when a single input variable change should cause no change in the output
ofcombinational circuit but a short glitch of the incorrect logic level occurs.Here, the output
changesmomentarily when it should not.The static-0 a hazard is also called POS hazards and static-
1hazardisalsocalledSOPhazards.
A glitch is an undesired transition that occurs before the signal settles to its intended value. In
otherterms, glitch is an electric pulse of short duration that isusually the result of afault or design
errorin adigitalcircuit.Theglitchesaregeneratedbecauseofthepropagationdelaysofthelogicgates.
Propagation delayis a time associatedwith any digital circuit andis thetime between when aninput to

33
the circuit changes until that change propagates through the circuit and changes the output.Every
logic gate has its own propagation delay and is dependent on the fabricationtechnology
ofthedevice.Figureindicatesthepropagationdelayin theNOTgate.

Input Output

tp

Input

Output

Propagation delayinNOTgate

A static hazard in a logic network is a transient change of an output value which is supposed
toremainfixed duringthetransition between twoinput states differingin thevalue of only
onevariable.When the outputis supposedtoremain atstatic condition“0”,butgoes tologic
1momentarilyduringthetransitionofinputstates,thenthehazardiscalledasstatic0hazard.
On the other hand if a momentary “0”is likely to occur in the output when it is expected to remain
instaticcondition“1”,thehazardiscalledasstatic1hazard.

34
Static-0 and Static-1 HazardsBasic

Static –0HazardsCircuit
A simple circuit to demonstrate the static 0 hazards is shown in figure-4. This simple circuit
consistof an AND gate and a NOT gate.The input signal is applied directly to one of the inputs of
theAND gate and the other input of the AND gate is obtained through theinverter i.e. NOT gate.
Asthe NOT gate is present at one of the inputs of AND gate the signal at that input is delayed by
oneNOTgatedelaytimeasdiscussedinfigure2.

When the input signal is at logic 0, the NOT gate output is at logic 1 hence the output is at logic
0.Whentheinputchangesthestatefrom0to1then theoutputofANDgateproducesasmallglitchwhich
goesHIGH(1)momentarilyandreturnsbacktologic0aftersomedelay.

ThedurationoftheglitchorsmallpulseisproportionaltothedelayoftheNOTgate.

35
 Basicstatic-0hazardcircuit

CombinationalCircuitwithstatic-0hazard
A static hazard occurs when one or more combinational logic circuit input signals change value,
andthefinal steady stateof outputvalueremains the same.Let usnow study thehazards in
anycombinational circuitingeneral.To demonstratethehazardsingeneral combinational
circuitconsider the circuit shown in figure -5. The circuit consist of 3 AND gates and a NOT gate
alongwith theirinterconnections This figure also indicates the waveforms at various points in the
circuitandtheglitchgeneratedattheoutput.
Let us assume A=0 and B=1, the output of twoAND gates is G1=0and G2=1.Att=t1, an
inputvariable A changes its state form 0 to become 1. So nowboth the inputs are A=B=1.The output
ofgate 1 i.e. G1 becomes high after a time delay equal to the propagation delay of AND gate 1.
Theoutput of gate 2 i.e. G2 goes low after a time delay which is equal to the sum of propagation
delaysof the inverter and the AND gate 2. Hence output of the final AND gate, Y goes high for a
shortduration. After some time the output turns back to logic 0 as expected. This short duration
HIGHpulseisunwantedandcalled asastatic0hazard.

Acombinationalcircuitwithstatic-0hazardandrelevantwaveforms

36
Basicstatic-1 hazardcircuit

37
Basic static-1 hazard circuit

A simple circuit to demonstrate the static 1 hazard is shown in figure. This simple circuit consistof
an OR gate and a NOT gate.The input signal is applied directly to one of the inputs of the ORgate
and the other input of the OR gate is obtained through the inverter i.e. NOT gate. As the NOTgate is
present at one of the inputs ofOR gate the signal at that input is delayed by one NOT gatedelaytime.
When the input signal is at logic 1, the NOT gate output is at logic 0,hence the output is at logic
1.When the input changes the state from 1 to 0 then the output ofOR gate produces a small
glitchwhich goes momentarily 0 (LOW). The duration of the glitch or small pulse is proportional to
thedelayoftheNOTgateandthentheoutputreturnsback tologic1.
Combinational Circuit with static-1 hazard
A static hazard occurs when one or more combinational logic circuit input signals change value,
andthe final steady state of outputvalue remains the same.Let usnow study thehazards in
anycombinational circuitingeneral.To demonstratethehazardsingeneral combinational
circuitconsider the circuit shown in figure -7. The circuit consist of 3 AND gates and a NOT gate
alongwith theirinterconnections This figure also indicates the waveforms at various points in the
circuit and the glitch generated at the output.

38
 combinationalcircuitwithstatic1hazardand relevantwaveforms

Let us consider A=1, B=1 and C=1 as initial condition.The output of two AND gates is G1=1
andG2=0 and the final output Y is 1.At time t=t1, an input variable B changes its state form 1
tobecome 0.Due to this change in the input condition, the gate outputs will also change. The G1
gategoesfrom1to0afterfinitepropagationdelayandtheoutputofG2gatechangestheoutputfrom0 to 1
only afterthe propagation delay of NOT gate and AND gate delay. During this period,
bothgatesG1 and G2 are at logic 0. Thus the output Y goes to 0 momentarily as shown in figure
7. Thisshort duration LOW pulse is unwanted andcalled as static -1 hazard.Here we have
assumed thepropagation delays of AND and NOT gates are almost similar. The output returns to
logic 1lateronasexpected.
DynamicHazards
In dynamic hazards, there is a possibility of an output changing more than once as a result of
asingle input change.In a larger circuit, whenever there are different routes from inputs to
outputthenthereisapossibilityofdynamichazards.Whenanoutputissupposedtochangevaluefrom0to
1 or 1 to 0, this output may change 3 or more times.If this situation appears at output, the
circuitissaidto haveadynamichazard.

DynamicHazards
When multiple glitches occur at the output from multilevel circuit because of changing inputs,

39
 theonly reason for this could be existence of three or more asymmetric paths (delay-wise) of that
inputto the output. In such a circuit, routes may have different delays; it is a potential dynamic
hazard.Here changing outputvalues differfrom the expected output. For example, alogic
circuitisexpected to change from 1 to 0, but instead it changes from 1 to 0 then 1 and finally
switches to the correctvalue0asshowninfigure.

Slow
A0 01

B
01 010

10 1010
10
C 0 Slower 10

1
D 1 1

DynamicHazardsExample
Dynamic hazards exist when there are multiplepathswith different delays from the
changinginput to the changing output. Dynamic hazards do not occur in properly designed two
level AND-OR or OR-AND circuits. It shouldbenotedthat atwolevel AND-OR or OR-AND
circuit isproperlydesignedifavariable anditscomplementareneverinputtothesamefirstlevelgate.

FunctionHazards
In the logic circuits, when more than one input variable changes at the same time, non-
solvablehazards occurs.Thesenon-solvablehazards are known asfunction hazards. Function
hazardscannot be eliminated as the actual problem lies with the specification of the Boolean
function. Theonly way to avoidthefunction hazards is to restrict the changing of input
variables.Ensure thatonlyoneinputchangesatagiven time.Inreality,
restrictionsarenotalwayspossible.

40
 For example consider a circuit with three inputs. One of the input is connected to a clock circuit,
theother one is tied to 1or 0 and the third one is connected to random noise source. In such a
case, it isimpossible to restrict the other inputs from changing. Thus restricting the changing
inputs to onlyoneisnotaneffectivesolution.

Statichazardsdetectionandelimination
Hazards areunwanted switching transients that may appear at the output of alogic circuit
becauseof different paths exhibit different propagation delays.The effect of seriousness of
hazardsisdependent on the devices or systems which receive themomentary transient signals.In
case ofdigital systems the presence of hazards can cause the system to malfunction. Hazards can
occur incombinationalcircuitaswellasinsequentialcircuits.

In digital systems, the analog signals will change into digital sequence (in the form of bits). This
sequence of bits is called as “Data stream”. The change in position of single bit also leads to
catastrophic (major) error in data output. Almost in all electronic devices, we find errors and we use
error detection and correction techniques to get the exact or approximate output.

What is an Error

The data can be corrupted during transmission (from source to receiver). It may be affected by
external noise or some other physical imperfections. In this case, the input data is not same as the
received output data. This mismatched data is called “Error”.

The data errors will cause loss of important / secured data. Even one bit of change in data may
affect the whole system’s performance. Generally, the data transfer in digital systems will be in the
form of ‘Bit – transfer’. In this case, the data error is likely to be changed in positions of 0 and 1.

41
Types Of Errors

In a data sequence, if 1 is changed to zero or 0 is changed to 1, it is called “Bit error”.

There are generally 3 types of errors occur in data transmission from transmitter to receiver. They
are

• Single bit errors

• Multiple bit errors

• Burst errors

Single Bit Data Errors

The change in one bit in the whole data sequence , is called “Single bit error”. Occurrence of single
bit error is very rare in serial communication system. This type of error occurs only in parallel
communication system, as data is transferred bit wise in single line, there is chance that single line
to be noisy.

Multiple Bit Data Errors

If there is change in two or more bits of data sequence of transmitter to receiver, it is called
“Multiple bit error”. This type of error occurs in both serial type and parallel type data
communication networks.

42
Burst Errors

The change of set of bits in data sequence is called “Burst error”. The burst error is calculated in
from the first bit change to last bit change.

Here we identify the error form fourth bit to 6th bit. The numbers between 4th and 6th bits are also
considered as error. These set of bits are called “Burst error”. These burst bits changes from
transmitter to receiver, which may cause a major error in data sequence. This type of errors occurs
in serial communication and they are difficult to solve.

Error Detecting Codes

In digital communication system errors are transferred from one communication system to another,
along with the data. If these errors are not detected and corrected, data will be lost . For effective
communication, data should be transferred with high accuracy .This can be achieved by first
detecting the errors and then correcting them.

Error detection is the process of detecting the errors that are present in the data transmitted from
transmitter to receiver, in a communication system. We use some redundancy codes to detect these
errors, by adding to the data while it is transmitted from source (transmitter). These codes are called
“Error detecting codes”.

43
Types of Error detection

1. Parity Checking
2. Cyclic Redundancy Check (CRC)
3. Longitudinal Redundancy Check (LRC)
4. Check Sum

Parity Checking

Parity bit means nothing but an additional bit added to the data at the transmitter before transmitting
the data. Before adding the parity bit, number of 1’s or zeros is calculated in the data. Based on this
calculation of data an extra bit is added to the actual information / data. The addition of parity bit to
the data will result in the change of data string size.

This means if we have an 8 bit data, then after adding a parity bit to the data binary string it will
become a 9 bit binary data string.

Parity check is also called as “Vertical Redundancy Check (VRC)”.

There is two types of parity bits in error detection, they are

 Even parity
 Odd parity

Even Parity

 If the data has even number of 1’s, the parity bit is 0. Ex: data is 10000001 -> parity bit 0
 Odd number of 1’s, the parity bit is 1. Ex: data is 10010001 -> parity bit 1

Odd Parity

 If the data has odd number of 1’s, the parity bit is 0. Ex: data is 10011101 -> parity bit 0
 Even number of 1’s, the parity bit is 1. Ex: data is 10010101 -> parity bit 1

The circuit which adds a parity bit to the data at transmitter is called “Parity generator”. The parity
bits are transmitted and they are checked at the receiver. If the parity bits sent at the transmitter and
the parity bits received at receiver are not equal then an error is detected. The circuit which checks
the parity at receiver is called “Parity checker”.

Error Correcting Codes

The codes which are used for both error detecting and error correction are called as “Error
Correction Codes”. The error correction techniques are of two types. They are,

 Single bit error correction

44
  Burst error correction

The process or method of correcting single bit errors is called “single bit error correction”. The
method of detecting and correcting burst errors in the data sequence is called “Burst error
correction”.

Hamming code or Hamming Distance Code is the best error correcting code we use in most of the
communication network and digital systems.

Back to top

Hamming Code

This error detecting and correcting code technique is developed by R.W.Hamming . This code not
only identifies the error bit, in the whole data sequence and it also corrects it. This code uses a
number of parity bits located at certain positions in the codeword. The number of parity bits
depends upon the number of information bits. The hamming code uses the relation between
redundancy bits and the data bits and this code can be applied to any number of data bits.

What is a Redundancy Bit?

Redundancy means “The difference between number of bits of the actual data sequence and the
transmitted bits”. These redundancy bits are used in communication system to detect and correct the
errors, if any.

How the Hamming code actually corrects the errors?

In Hamming code, the redundancy bits are placed at certain calculated positions in order to
eliminate errors. The distance between the two redundancy bits is called “Hamming distance”.

To understand the working and the data error correction and detection mechanism of the hamming
code, let’s see to the following stages.

Number of parity bits

As we learned earlier, the number of parity bits to be added to a data string depends upon the
number of information bits of the data string which is to be transmitted. Number of parity bits will
be calculated by using the data bits. This relation is given below.

2P>= n + P +1

Here, n represents the number of bits in the data string.

P represents number of parity bits.

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For example, if we have 4 bit data string, i.e. n = 4, then the number of parity bits to be added can
be found by using trial and error method. Let’s take P = 2, then

2P = 22 = 4 and n + P + 1 = 4 + 2 + 1 = 7

This violates the actual expression.

So let’s try P = 3, then

2P = 23 = 8 and n + P + 1 = 4 + 3 + 1 = 8

So we can say that 3 parity bits are required to transfer the 4 bit data with single bit error correction.

Where to Place these Parity Bits?

After calculating the number of parity bits required, we should know the appropriate positions to
place them in the information string, to provide single bit error correction.

In the above considered example, we have 4 data bits and 3 parity bits. So the total codeword to be
transmitted is of 7 bits (4 + 3). We generally represent the data sequence from right to left, as shown
below.

bit 7, bit 6, bit 5, bit 4, bit 3, bit 2, bit 1, bit 0

The parity bits have to be located at the positions of powers of 2. I.e. at 1, 2, 4, 8 and 16 etc.
Therefore the codeword after including the parity bits will be like this

D7, D6, D5, P4, D3, P2, P1

Here P1, P2 and P3 are parity bits. D1 —- D7 are data bits.

Constructing a Bit Location Table

In Hamming code, each parity bit checks and helps in finding the errors in the whole code word. So
we must find the value of the parity bits to assign them a bit value.

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By calculating and inserting the parity bits in to the data bits, we can achieve error correction
through Hamming code.

Let’s understand this clearly, by looking into an example.

Ex:

Encode the data 1101 in even parity, by using Hamming code.

Step 1

Calculate the required number of parity bits.

Let P = 2, then

2P = 22 = 4 and n + P + 1 = 4 + 2 + 1 = 7.

2 parity bits are not sufficient for 4 bit data.

So let’s try P = 3, then

2P = 23 = 8 and n + P + 1 = 4 + 3 + 1 = 8

Therefore 3 parity bits are sufficient for 4 bit data.

The total bits in the code word are 4 + 3 = 7

Step 2

Constructing bit location table

Step 3

Determine the parity bits.

For P1 : 3, 5 and 7 bits are having three 1’s so for even parity, P1 = 1.
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 For P2 : 3, 6 and 7 bits are having two 1’s so for even parity, P2 = 0.
For P3 : 5, 6 and 7 bits are having two 1’s so for even parity, P3 = 0.

By entering / inserting the parity bits at their respective positions, codeword can be formed and is
transmitted. It is 1100101.

NOTE: If the codeword has all zeros (ex: 0000000), then there is no error in Hamming code.

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