Apple Macbook q59v13

<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
CK ENG
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD APPD
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. REV ZONE ECN DESCRIPTION OF CHANGE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DATE DATE
01 279015 ENGINEERING RELEASED 06/06/03 ?

http://bufanxiu.taobao.com
D
PAGE TABLE OF CONTENTS
Q59 MLB D
1
2,3
4,5
6,7
COVER PAGE
BLOCK DIAGRAM, SYSTEM, POWER & PCB INFO
MPC7450 MAXBUS
CPU SPEED & CONFIG OPTIONS
DVT
LAST_MODIFIED=Wed Sep 17 12:11:39 2003
8 CPU LA CONNECTORS, ESP, CPU BYPASS
9 INTREPID MAX IF (SECTION 1)
10-11 INTREPID POWER & BYPASS (SECTION 8 & 9)
12 INTREPID DDR CONTROL POWER RAIL DEFINITIONS
13 DDR MUXES
RUN SLEEP SHUTDOWN
14-15 SO-DIMM, BIG DIMM
16 INTREPID AGP (SECTION 3) +2_5V_MAIN ON ON OFF
C 17 NVIDIA AGP (SECTION 1) +3V_MAIN ON ON OFF C
18 NVIDIA FRAME BUFFER (SECTIONS 3 & 4) +5V_MAIN ON ON OFF
19 NVIDIA FB SERIES TERMS, CLK DELAYS +5V_SLEEP ON OFF OFF
20-21 GRAPHICS MEMORIES +12V_MAIN ON ON ON
22-23 NVIDIA DAC/DVI, CLOCKS & STRAPS (SECTIONS 2 & 5) +12V_SLEEP ON OFF OFF
24-25 TMDS & EXTERNAL VGA CONNECTORS FW_PWR ON ON OFF
26-27 NVIDIA POWER-ON RESET CONFIGURATION STRAPS +1.8V_SLEEP ON OFF OFF
28 INTREPID GPIOS, INTERRUPTS & SERIAL PORTS (SECTION 6) +MAXBUS_SLEEP ON OFF OFF
29 MODEM, BLUETOOTH, KITCHEN SINK & SERIAL DOWNLOAD
30 INTREPID PCI, ROM (SECTION 7)
31 WIRELESS PCI
SCHEMATIC AND PCB SUPPORT
32 USB2 CONTROLLER PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION
33 USB POWER & CONNECTORS 051-6497 1 SCHEM,MLB,Q59 SCH1 CRITICAL
B 34 INTREPID ETHERNET & FIREWIRE (SECTION 4) 820-1550 1 PCB,MLB,IMACG4 PCB1 CRITICAL

B
35 ETHERNET PHY 825-2029 1 LBL,SER #,BARCODE PCB1
056-1158 1 DESIGN GUIDE,MCO,IMACG4 PCB1 CRITICAL
36 FIREWIRE PHY 057-0085 1 DFM,PNLZN DWG,MLB,Q59 PCB1 CRITICAL
37 INTREPID UATA/IDE (SECTION 5) 630-XXXX 1 630-XXXX,PCBA,H,Q59,EEE XXX HYNIX OMIT

38 ATA CD/HD CONNECTORS 630-XXXX 1 630-XXXX,PCBA,S,Q59,EEE XXX SAMSUNG OMIT
39 AUDIO CODEC & VOLTAGE REGS

40-41 LINE IN/OUT BUFFERS
PCB,UL RECOGNIZED, MIN.130 DEG. C TEMP. RATING AND V-0 FLAME RATING PER UL 796
42-43 SPEAKER/MIC AMPS & UL 94. PCB TO BE SILK-SCREENED WITH UL/CUL RECOGNITION MARK, MANUFACTURER’S UL
44 POWER MANAGER UNIT FILE NUMBER, UL PCB MATERIAL DESIGNATION, TEMPERATURE RATING AND FLAME RATING.
45-51 +5V/+12V, AUDIO, FW & TMDS POWER CONVERTERS
52-59 CONSTRAINT TABLES
DIMENSIONS ARE IN MILLIMETERS
60-64 NET TABLES Apple Computer Inc.
XX
METRIC
65-69 PART TABLES
A X.XX
DRAFTER DESIGN CK NOTICE OF PROPRIETARY PROPERTY A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
X.XXX PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
ENG APPD MFG APPD
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
ANGLES II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
QA APPD DESIGNER TITLE
DO NOT SCALE DRAWING
RELEASE SCALE
NONE
SCHEM,MLB,Q59
SIZE DRAWING NUMBER
THIRD ANGLE PROJECTION

MATERIAL/FINISH
NOTED AS
APPLICABLE
D 051-6497 REV.
13
SHT 1 OF 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
FW - B Inverter LCD Panel

Connector KITCHEN Connector VGA/SVIDEO OUT
P.36 P.29 P.24 D

D VGA
Connector
TMDS P.25
FW - A Ethernet EDID (I2C)
RGB
Connector Connector
P.36 P.35 GRAPHICS
MEMORY
NVIDIA P.20
NV18B (EXTERNAL MEM)
GRAPHICS
FireWire Ethernet 64MB MEMORY
P.21
PHY PHY P.17-27 (EXTERNAL MEM)
P.36 P.35
C WIRELESS C
AGP BUS P.31
1394 OHCI 1.5V/3.3V
3.3V 32BITS
66MHZ
8BIT TX/RX
32BITS
USB
CONN(QTY3) FIREWIRE ETHERNET 4X AGP
P.31 400 MB/S 10/100 PCI PCI BUS
P.34 P.34 P.16 P.30
USB2
CONTROL
USB
P.28 INTREPID
P.32 DDR MEMORY I2C MAXBUS BOOTROM BOOT ROM
P.12 P.34 P.9 P.30 1M X 8
MODEM P.30
B BLUETOOTH B
P.29 MEMORY BUS I2C MAXBUS
2.5V
167MHZ 167MHZ
64BITS 32BIT ADDRESS
64BIT DATA
PMU
P.44
CPU PLL
Config
DDR MUXES APOLLO P.6
P.13
CPU
P.4-5
DDR SDRAM DIMM 0 SYSTEM BLOCK

A P.15 NOTICE OF PROPRIETARY PROPERTY
A
DDR SDRAM DIMM 1 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
SO-DIMM Connector I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
P.14 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE DRAWING NUMBER REV.
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 2 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
LAYER THICKNESS COPPER TRACE WIDTH

(MILS) (OZ) (MILS)
DUAL 5.1V TMDS ---------------- ------------ -------- --------------
+12V DC/DC LDO 3.65V
(EZ1582) 1 - SIGNAL-TOP 0.7 0.5 4 D
D (LTC3707) ---
3.3V PREPREG 3
2 - GROUND1 1.4 1 ---
PREPREG 3 ---
3 - SIGNAL 0.7 0.5 4
USB
5.1V FILLER 17.4 ---
4 - POWER 2.8 2 ---
(SWITCH) ---
PREPREG 4
5 - POWER 2.8 2 ---
FW
12V FILLER 17.4 ---
6 - SIGNAL 0.7 0.5 4
(SWITCH) EXTERNAL ---
VIDEO 5.1V PREPREG 3
7 - GROUND2 1.4 1 ---
(SWITCH) PREPREG 3 ---
C 8 - SIGNAL-BOTTOM 0.7 0.5 4 C
================ ============ ======== =============
GRAPHIC 62.0
1.6V HARD TOTAL --- ---
DC/DC
DRIVE 5.1V
(SC2602)
(SWITCH) NOSTUFF
ZT39
NOSTUFF
ZT46
NOSTUFF
ZT53
NOSTUFF
ZT59
NOSTUFF
ZT64
HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10
1 1 1 1 1
CPU OPTICAL NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF

DRIVE ZT40 ZT47 ZT54 ZT60 ZT65
DC/DC 1.55V 5.1V HOLE-VIA-20R10
1
HOLE-VIA-20R10
1
HOLE-VIA-20R10
1
HOLE-VIA-20R10
1
HOLE-VIA-20R10
1
(LTC3707) (SWITCH)
B NOSTUFF
ZT41
NOSTUFF
ZT48
NOSTUFF
ZT55
NOSTUFF
ZT61
NOSTUFF
ZT66
B
1 1 1 1 1
INTREPID
DC/DC 1.7V
BACKLIGHT NOSTUFF
ZT42
NOSTUFF
ZT49
NOSTUFF
ZT56
NOSTUFF
ZT62
NOSTUFF
ZT67
600V RMS (SC2602)
INVERTER 1 1 1 1 1
(OZ960)
NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF
ZT43 ZT50 ZT57 ZT63 ZT68
MAXBUS I/O 1 1 1 1 1
1.8V
LDO
DDR (EZ1582) NOSTUFF
ZT44
NOSTUFF
ZT51
NOSTUFF
ZT58
DC/DC 2.5V HOLE-VIA-20R10
1
HOLE-VIA-20R10
1
HOLE-VIA-20R10
1 PWR BLOCK,PCB INFO
A NOTICE OF PROPRIETARY PROPERTY
A
(SC2602) LAST_MODIFIED=Wed Sep 17 12:15:39 2003
AGP NOSTUFF NOSTUFF
3.3V 1.5V ZT45 ZT52 II NOT TO REPRODUCE OR COPY IT

LDO HOLE-VIA-20R10
1
HOLE-VIA-20R10
1
(EZ1582) D 051-6497 13
POWER SYSTEM ARCHITECTURE APPLE COMPUTER INC.
SCALE
NONE 3
SHT
69
OF
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
CPU INTERNAL PLL FILTERING CPU_VCORE_SLEEP 4D7< 8B7< 8C1< 45D2<> 52C6> 59B6> 59D8>
1
R901
+MAXBUS_SLEEP 6C5< 6D6< 7A3< 7B3< 7C3< 7C5< 7C7< 8A3<> 8D1< 8D4< 10
9B7< 9D8< 44B7< 44D1< 44D2< 45D2<> 46D4< 52C6> 59C8> 1%
59D8> 59B6> 52C6> 45D2<> 8C1< 8B7< 4D3< CPU_VCORE_SLEEP 1/16W
MF
1 2 603
R891
470 52C6> CPU_AVDD
5%
1/16W
MF 1 1
402 2 C1036 C1035
D 0.1UF 2.2UF D
H10
H12
J11
J13
K10
K12
K14
L11
L13
M10
M12
C12
E18
G18
P11
R13
R16
U12
U16
V10
V14
20% N20P80%
H8
J7
J9
K8
L7
L9
M8
B4
C2
D5
F2
H3
J5
K2
L5
M3
N6
P2
P8
R4
T6
T9
U2
V4
V7
A8
10V 16V
2 CERM 2 CERM
402 805
VDD OVDD AVDD
56D3> 9D3< 8B4<> 7C7< CPU_BR_L D2

BR* BVSEL B7 CPU_BUS_VSEL 7C4<
56D3> 9D3<> 8B4<> 7B7< CPU_BG_L M1
BG*
SYSCLK A10 SYSCLK_CPU 9A4< 56C3>
56D3> 9D3<> 8B7<> 7C7< CPU_TS_L L4
TS* CLKOUT H2 NO_TEST NC_CPU_CLKOUT NOSTUFF
PLLCFG0 B8 CPU_PLL_CFG<0> 6C6< 8A8<> R895 1
7C5< 4A3< CPU_PULLDOWN E11

A0 PLLCFG1 C8 CPU_PLL_CFG<1> 6C6< 8A8<> 47
5%
H1
A1 PLLCFG2 C7 CPU_PLL_CFG<2> 6C6< 8A8<> 1/16W RC GLITCH FILTER
MF
C11
A2 PLLCFG3 D7 CPU_PLL_CFG<3> 6C6< 8A8<> 402 2 PLACE CLOSE TO PIN
G3
A3 PLL_EXT A7 CPU_PLL_CFGEXT 6C6< 8A8<>
56D3> 9D3<> 8B4<> CPU_ADDR<0> F10
A4 DBG* M2 CPU_DBG_L 7B7< 8B8<> 9B1<> 56C3> R850
0 2
56D3> 9D3<> 8B5<> CPU_ADDR<1> L2
A5 DRDY* R3 CPU_DRDY_L_UF 56C3> 1 CPU_DRDY_L 7B7< 8B5<> 9B1< 56C3>
56D3> 9D3<> 8B4<> CPU_ADDR<2> D11
A6 DTI0 G1 CPU_EDTI 7C5< 5%
1/16W NOSTUFF
56D3> 9D3<> 8B8<> CPU_ADDR<3> D1
A7 DTI1 K1 CPU_DTI<0> 8B7<> 9A1<> 56C3> MF
1
402 C954
56D3> 9D3<> 8B5<> CPU_ADDR<4> C10
A8 DTI2 P1 CPU_DTI<1> 8B4<> 9A1<> 56C3> 10PF
56D3> 9D3<> 8B7<> CPU_ADDR<5> G2
A9 DTI3 N1 CPU_DTI<2> 8B4<> 9A1<> 56C3> 5%
50V
2 CERM
56D3> 9D3<> 8C4<> CPU_ADDR<6> D12
A10 402
56D3> 9D3<> 8B7<> CPU_ADDR<7> L3
A11
56D3> 9D3<> 8C5<> CPU_ADDR<8> G4 A12 TDI B9 JTAG_CPU_TDI 7A5< 8A3<> 59C8>
56D3> 9C3<> 8B8<> CPU_ADDR<9> T2
A13 TDO A4 JTAG_CPU_TDO 8A3<> 59C8> FILTERS A WAKE FROM SLEEP GLITCH
56D3> 9C3<> 8B8<> CPU_ADDR<10> F4 A14 TMS F1 JTAG_CPU_TMS 7A5< 8A3<> 59C8> IF NECESSARY
56D3> 9C3<> 8C4<> CPU_ADDR<11> V1
A15 TCK C6 JTAG_CPU_TCK 7D5< 8A3<> 59C8>
56D3> 9C3<> 8B7<> CPU_ADDR<12> J4
A16 TRST* A5 JTAG_CPU_TRST_L 7C5< 8A3<> 59C8>
C 56D3> 9C3<> 8B8<> CPU_ADDR<13>
56D3> 9C3<> 8B7<> CPU_ADDR<14>
R2
K5
A17 LSSDMODE* E8
G8
CPU_LSSD_MODE 7B5<
CPU_L1TSTCLK 7B4<
C
A18 U34 L1TSTCLK
56D3> 9C3<> 8B7<> CPU_ADDR<15> W2
A19 L2TSTCLK B3 CPU_L2TSTCLK 7C4<
800MHZ
56D3> 9C3<> 8B8<> CPU_ADDR<16> J2
A20
56D3> 9C3<> 8B8<> CPU_ADDR<17> K4
A21 APOLLO_MPC7445_360 TA* K6 CPU_TA_L 7C7< 8C4<> 9A1<> 56C3>
56D3> 9C3<> 8C8<> CPU_ADDR<18> N4
A22 BGA TEA* L1 CPU_TEA_L 7B7< 8B5<> 9A1<> 56C3>
(1 OF 3)
56D3> 9C3<> 8B7<> CPU_ADDR<19> J3
A23
56D3> 9C3<> 8B8<> CPU_ADDR<20> M5
A24 SEE_TABLE
56D3> 9C3<> 8C7<> CPU_ADDR<21> P5 A25 TBEN E1 CPU_TBEN 7C5< 9A3<>
56D3> 9C3<> 8C7<> CPU_ADDR<22> N3
A26 QREQ* P4 CPU_QREQ_L 7D5< 8B7<> 9B3< 56C3>
56D3> 9C3<> 8C8<> CPU_ADDR<23> T1 A27 QACK* G5 CPU_QACK_L 8B4<> 9B3<> 56C3>
56D3> 9C3<> 8B7<> CPU_ADDR<24> V2
A28 CKSTP_IN* A3 CPU_CHKSTP_IN_L 7B5< 59C8>
56D3> 9C3<> 8B8<> CPU_ADDR<25> U1
A29 CKSTP_OUT* B1 CPU_CHKSTP_OUT_L 7B5< 8A3<> 8D5<> 59C8>
56D3> 9C3<> 8C8<> CPU_ADDR<26> N5
A30
56D3> 9C3<> 8C8<> CPU_ADDR<27> W1
A31
56D3> 9C3<> 8C7<> CPU_ADDR<28> B12
A32
56D3> 9C3<> 8C8<> CPU_ADDR<29> C4
A33
INT* D4 MPIC_CPU_INT_L 7A5< 8D7<> 28B5>
56D3> 9C3<> 8C7<> CPU_ADDR<30> G10
A34
SMI* F9 CPU_SMI_L 7A5< 44C4<>
56D3> 9C3<> 8C7<> CPU_ADDR<31> B11
A35
MCP* C9 CPU_MCP_L 7B5<
SRESET* A2 CPU_SRESET_L 7A5< 8A3<> 59C6>
NC_CPUAP<0> NO_TEST C1
AP0
HRESET* D8 CPU_HRESET_L 7A3< 7A5< 7B3< 8A3<> 44C2< 44D2< 59C8>
NC_CPUAP<1> NO_TEST E3
AP1
NC_CPUAP<2> NO_TEST H6
AP2
NC_CPUAP<3> NO_TEST F5 AP3
IBORG PULLS THIS UP, SPEC SAYS TO GROUND IT FOR SW CONTROL
NC_CPUAP<4> NO_TEST G7
AP4
PMON_IN* D9 CPU_PMONIN_L 7C5< ZH5
B 56D3> 9B3<> 8B4<> 7A7<
56D3> 9B3<> 8B5<> 7A7<
CPU_TT<0>
CPU_TT<1>
E5
E6
TT0
TT1
PMON_OUT* A9 NO_TEST NC_PMON_OUT_L ZH4
275R138
TH
SL-138X272-292 B
1 ZT9P1 1 ZT11P1
56D3> 9B3<> 8B4<> 7A7< CPU_TT<2> F6
TT2
INT_V2 BMODE0* G9 CPU_EMODE0_L 7A4<
R311 56D3> 9B3<> 8B5<> 7A7< CPU_TT<3> E9
TT3
BMODE1* F8 CPU_EMODE1_L 7A4<
0 2 56D3> 9B3<> 8B4<> 7A7< CPU_TT<4> C5
TT4 1 C352 1 C345
9C3<> 7B7< CPU_INT_GBL_L 1
0.1UF 0.1UF
56C3> 56D3> 9B3<> 8B4<> 7B7< CPU_TBST_L F11
TBST* 20% 20%
5%
10V 10V
1/16W 56D3> 9B3<> 8B5<> CPU_TSIZ<0> G6
TSIZ0 A11 2 CERM 2 CERM
MF
56D3> 9B3<> 8B5<> CPU_TSIZ<1> F7 EXT_QUAL 402 402
402 TSIZ1
56D3> 9B3<> 8B7< CPU_TSIZ<2> E7
TSIZ2
56C3> 8B5<> CPU_GBL_L E2
GBL* TEST0 A12
ZH6
56C3> 9B3<> 8B5<> 7A7< CPU_WT_L D3 WT* TEST1 B6 TH
ZH7
INT_V1 SL-138X272-292 275R138
56C3> 9C3<> 8C5<> 7A7< CPU_CI_L J1
CI* TEST2 B10
1 1 ZT10P1 1 ZT8P1
R312 56C3> 9B3<> 8B5<> 7B7< CPU_AACK_L R1 AACK* TEST3 E10 CPU_PULLUP 7A5<
100
1% 56C3> 9B3<> 8B8<> 7C7< CPU_ARTRY_L N2
ARTRY* TEST4 D10 CPU_PULLDOWN 4D7<> 7C5<
1/16W
MF 7B5< CPU_SHD0_L E4 SHD0* 1 C369 1 C370
2 402 7B5< CPU_SHD1_L H5 0.1UF 0.1UF
SHD1* 20% 20%
10V 10V
56C3> 9B3< 8B8<> 7C7< CPU_HIT_L B2
HIT* 2 CERM 2 CERM
402 402
GND
B5
C3
D6
D13
E17
F3
G17
H4
H7
H9
H11
H13
J6
J8
J10
J12
K7
K3
K9
K11
K13
L6
L8
L10
L12
M4
M7
M9
M11
M13
N7
P3
P9
P12
R5
R14
R17
T7
T10
U3
U13
U17
V5
V8
V11
V15
INTREPID VERSION 1 PULLS GBL
ALL THE TIME. NEED TO
CUT THE TRACE AND YANK
DOWN HARD FOR SNOOPING. MPC7450 MAXBUS
A FIXED IN INTREPID VERSION 2. NOTICE OF PROPRIETARY PROPERTY
A
CPU MECHANICAL PARTS SUPPORT LAST_MODIFIED=Wed Sep 17 12:15:40 2003
PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION AGREES TO THE FOLLOWING
875-1475 1 PAD,THERMAL,CPU,U34 U341 ?
870-1113 1 HEAT SINK,CPU,Q26,U34 U342 ? DEV III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
870-1114 1 CLIP,HEAT SINK,CPU,Q26.U34 U343 ? DEV SIZE DRAWING NUMBER REV.
412-0042 1 SCREW,MACH,3MM W,8MM L,U34 U344 ? DEV D 051-6497 13

APPLE COMPUTER INC.
835-0251 1 NUT,3MM,U34 U345 ? DEV SCALE SHT OF
NONE 4 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
APOLLO_MPC7445_360
NC_CPUCRUD<0> NO_TEST F18

NC_F18
NC_F17 U34
NC_F19 800MHZ
NC_CPUCRUD<3> NO_TEST H19
NC_H19
NC_H18
BGA APOLLO_MPC7445_360
(3 OF 3)
NC_H17
NC_CPUCRUD<6> NO_TEST H16 NC_H16
D NC_CPUCRUD<7> NO_TEST E19
NC_E19 56D3> 9D1<> 8C4<> CPU_DATA<0> R15 D0
D
NC_CPUCRUD<8> NO_TEST D18 NC_D18
56D3> 9D1<> 8C7<> CPU_DATA<1> W15 D1
NC_F16 U34
56D3> 9D1<> 8C8<> CPU_DATA<2> T14 D2
NC_CPUCRUD<10> NO_TEST G16
NC_G16 800MHZ
56D3> 9D1<> 8C5<> CPU_DATA<3> V16 D3
NC_CPUCRUD<11> NO_TEST D19
NC_D19
56D3> 9D1<> 8C7<> CPU_DATA<4> W16 D4 BGA
NC_F15 56D3> 9D1<> 8C8<> CPU_DATA<5> T15 D5 (2 OF 3)
NC_G19
56D3> 9D1<> 8C4<> CPU_DATA<6> U15 D6
NC_CPUCRUD<14> NO_TEST E16
NC_E16 56D3> 9D1<> 8C8<> CPU_DATA<7> P14 D7
NC_D17
56D3> 9D1<> 8C5<> CPU_DATA<8> V13 D8
NC_D16 56D3> 9D1<> 8C4<> CPU_DATA<9> W13 D9
56D3> 9D1<> 8C7<> CPU_DATA<10> T13 D10
56D3> 9D1<> 8C5<> CPU_DATA<11> P13 D11
56D3> 9D1<> 8C5<> CPU_DATA<12> U14 D12
NC_CPUCRUD<17> NO_TEST P15
NC_P15 56D3> 9D1<> 8C7<> CPU_DATA<13> W14 D13
NC_CPUCRUD<18> NO_TEST L15 NC_L15
56D3> 9D1<> 8C8<> CPU_DATA<14> R12 D14
NC_CPUCRUD<19> NO_TEST N15
NC_N15 56D3> 9D1<> 8C5<> CPU_DATA<15> T12 D15
NC_CPUCRUD<20> NO_TEST P18 NC_P18
56D3> 9C1<> 8C4<> CPU_DATA<16> W12 D16
NC_N14
56D3> 9C1<> 8C7<> CPU_DATA<17> V12 D17
NC_CPUCRUD<22> NO_TEST M14
NC_M14 56D3> 9C1<> 8C4<> CPU_DATA<18> N11 D18
NC_M17
56D3> 9C1<> 8C4<> CPU_DATA<19> N10 D19
NC_N13 56D3> 9C1<> 8C4<> CPU_DATA<20> R11 D20
NC_N16
56D3> 9C1<> 8C8<> CPU_DATA<21> U11 D21
NC_M19 56D3> 9C1<> 8C7<> CPU_DATA<22> W11 D22
NC_M16
56D3> 9C1<> 8C8<> CPU_DATA<23> T11 D23
NC_P19 56D3> 9C1<> 8D4<> CPU_DATA<24> R10 D24
NC_N17
56D3> 9C1<> 8D7<> CPU_DATA<25> N9 D25
C NC_CPUCRUD<31> NO_TEST L17
NC_M15
NC_L17
56D3> 9C1<> 8C5<> CPU_DATA<26>
56D3> 9C1<> 8C7<> CPU_DATA<27>
P10
U10
D26 C
NC_CPUCRUD<32> NO_TEST L14 D27
NC_L14 56D3> 9C1<> 8D8<> CPU_DATA<28> R9
NC_CPUCRUD<33> NO_TEST K15 D28
NC_K15
56D3> 9C1<> 8C8<> CPU_DATA<29> W10 D29
NC_CPUCRUD<34> NO_TEST J14
NC_J14
56D3> 9C1<> 8C5<> CPU_DATA<30> U9 D30
NC_CPUCRUD<35> NO_TEST J18 NC_J18
56D3> 9C1<> 8D7<> CPU_DATA<31> V9 D31
NC_J19
56D3> 9C1<> 9B7< 8D7<> CPU_DATA<32> W5 D32
NC_J15 56D3> 9C1<> 9B7< 8D8<> CPU_DATA<33> U6 D33
NC_CPUCRUD<38> NO_TEST K19
NC_K19
56D3> 9C1<> 9B7< 8D8<> CPU_DATA<34> T5 D34
NC_J16 56D3> 9C1<> 9B7< 8D7<> CPU_DATA<35> U5 D35
NC_H15
56D3> 9C1<> 9A7< 8D4<> CPU_DATA<36> W7 D36
NC_CPUCRUD<41> NO_TEST L16
NC_L16 56D3> 9C1<> 8D5<> CPU_DATA<37> R6 D37
NC_P16
56D3> 9C1<> 8D5<> CPU_DATA<38> P7 D38
NC_M18 56D3> 9C1<> 8D5<> CPU_DATA<39> V6 D39
NC_L19
56D3> 9C1<> 8D7<> 6C4< CPU_DATA<40> P17 D40
NC_L18 56D3> 9C1<> 8C4<> 6C4< CPU_DATA<41> R19 D41
NC_CPUCRUD<46> NO_TEST K18 NC_K18
56D3> 9B1<> 8C5<> 6C4< CPU_DATA<42> V18 D42
NC_J17 56D3> 9B1<> 8C4< 6C4< CPU_DATA<43> R18 D43
NC_CPUCRUD<48> NO_TEST K16 NC_K16
56D3> 9B1<> 8C8<> 6C4< CPU_DATA<44> V19 D44
NC_CPUCRUD<49> NO_TEST C19
NC_C19
56D3> 9B1<> 8C7<> 6C4< CPU_DATA<45> T19 D45
NC_D15 56D3> 9B1<> 8C4<> 6C4< CPU_DATA<46> U19 D46
NC_G15 56D3> 9B1<> 8C7< 6C4< CPU_DATA<47> W19 D47
NC_C18 56D3> 9D8< 9B1<> 8C5<> CPU_DATA<48> U18 D48
NC_CPUCRUD<53> NO_TEST A16
NC_A16
56D3> 9D8< 9B1<> 8C4<> CPU_DATA<49> W17 D49
NC_CPUCRUD<54> NO_TEST B19
NC_B19 56D3> 9D8< 9B1<> 8C8<> CPU_DATA<50> W18 D50
NC_A19 56D3> 9D8< 9B1<> 8C8<> CPU_DATA<51> T16 D51
NC_D14
B NC_CPUCRUD<57> NO_TEST E15
NC_E15
56D3> 9C8< 9B1<> 8C5<> CPU_DATA<52>
56D3> 9C8< 9B1<> 8C7<> CPU_DATA<53>
T18
T17
D52
D53
B
NC_B15 56D3> 9C8< 9B1<> 8D7<> CPU_DATA<54> W3 D54
NC_B17
56D3> 9C8< 9B1<> 8C5<> CPU_DATA<55> V17 D55
NC_C17 56D3> 9B1<> 8D8<> CPU_DATA<56> U4 D56
NC_CPUCRUD<61> NO_TEST C16 NC_C16
56D3> 9D5< 9B1<> 8D5<> CPU_DATA<57> U8 D57
NC_G13 56D3> 9D5< 9B1<> 8D4<> CPU_DATA<58> U7 D58
NC_CPUCRUD<63> NO_TEST E14 NC_E14
56D3> 9D5< 9B1<> 8D8<> CPU_DATA<59> R7 D59
NC_H14
56D3> 9D5< 9B1<> 8D8<> CPU_DATA<60> P6 D60
NC_G14 56D3> 9C5< 9B1<> 8D4<> CPU_DATA<61> R8 D61
NC_C15 56D3> 9C5< 9B1<> 8D4<> CPU_DATA<62> W8 D62
NC_A17 56D3> 9C5< 9B1<> 8D5<> CPU_DATA<63> T8 D63
NC_G12
NC_F14 NC_CPUDP<0> NO_TEST T3 DP0
NC_F13 NC_CPUDP<1> NO_TEST W4 DP1
NC_E13 NC_CPUDP<2> NO_TEST T4 DP2
NC_B16 NC_CPUDP<3> NO_TEST W9 DP3
NC_A15 NC_CPUDP<4> NO_TEST M6 DP4
NC_CPUCRUD<74> NO_TEST C14 NC_C14 NC_CPUDP<5> NO_TEST V3 DP5
NC_A18 NC_CPUDP<6> NO_TEST N8 DP6
NC_CPUCRUD<76> NO_TEST A13 NC_A13 NC_CPUDP<7> NO_TEST W6 DP7
NC_F12
NC_A14
NC_G11
NC_C13

NC_N12
MPC7450 - 2
A NC_CPUCRUD<82> NO_TEST N18
NC_N18
NOTICE OF PROPRIETARY PROPERTY
A
NC_CPUCRUD<83> NO_TEST K17
NC_K17
NC_CPUCRUD<84> NO_TEST N19 LAST_MODIFIED=Wed Sep 17 12:15:41 2003
NC_N19 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
NC_B18 AGREES TO THE FOLLOWING
NC_E12 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
NC_B13 II NOT TO REPRODUCE OR COPY IT
NC_CPUCRUD<88> NO_TEST B14 NC_B14 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
NC_A6 SIZE DRAWING NUMBER REV.
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE
5 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
BOMOPTIONS FOR UPPER-SET OF RESISTORS
1200@133&1500@167&1333@133&1667@167&1467@133&1833@167&1600@133&2000@167&1733@133&2167@167&1867@133&2333@167&2000@133&2500@167&2133@133&2667@167
667@133&833@167&733@133&917@167&800@133&1000@167&1067@133&1333@167&1333@133&1667@167&1467@133&1833@167&1600@133&2000@167&1867@133&2333@167&2133@133&2667@167
800@133&1000@167&867@133&1083@167&1067@133&1333@167&1200@133&1500@167&1733@133&2167@167&1867@133&2333@167&2133@133&2667@167
667@133&833@167&933@133&1167@167&1200@133&1500@167&1333@133&1667@167&1600@133&2000@167
D D
667@133&833@167&733@133&917@167&800@133&1000@167&867@133&1083@167&1000@133&1250@167&1200@133&1500@167&1467@133&1833@167&1600@133&2000@167&1733@133&2167@167&2000@133&2500@167&2133@133&2667@167
+MAXBUS_SLEEP 4D5< 6C5< 7A3< 7B3< 7C3< 7C5< 7C7< 8A3<> 8D1< 8D4< 9B7< 9D8<
44B7< 44D1< 44D2< 45D2<> 46D4< 52C6> 59C8>
NOSTUFF
CPU FREQUENCY CONFIGURATION
(SUPPORTED CPU & BUS SPEEDS)
667@133&733@133&800@133&867@133&933@133&1000@133&1067@133&1200@133&1333@133&1467@133&1600@133&1733@133&1867@133&2000@133&2133@133
59C8> 52C6>
8D1< 8A3<> 7C7< 7C5< 7C3< 7B3< 7A3< 6D6< 4D5< +MAXBUS_SLEEP
46D4< 45D2<> 44D2< 44D1< 44B7< 9D8< 9B7< 8D4<
NOSTUFF
CORE FREQUENCY
(AT BUS FREQUENCY)
NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF
MULTIPLIER CPU_PLL_CFG
1 1 167MHZ 133MHZ
R8891 R8661 R8741
SPECIAL CONFIG SPECIAL CONFIG SPECIAL CONFIG SPECIAL CONFIG SPECIAL CONFIG 1 1 1
R879 R878 R877 R875 R867
1 1 1 1 1 10K 10K 10K 10K 10K 10K 10K 10K
R382 R379 R378 R376 R374 1% 1% 1% 1% 1% 1% 1% 1% (BUS-TO-CORE) (MHZ) E 0123 HEX
10K 10K 10K 10K 10K 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W
1% 1% 1% 1% 1% MF MF MF MF MF MF MF MF
1/16W 1/16W 1/16W 1/16W 1/16W 402 2 402 2 402 2 402 2 402 2 402 2 402 2 402 2
MF MF MF MF MF 5.0X 833 667 0 1011 0B
2 402 2 402 2 402 2 402 2 402 CPU_DATA<40> 5B4<> 8D7<> 9C1<> 56D3>
CPU_PLL_CFGEXT 4C3< 8A8<> CPU_DATA<41> 5B4<> 8C4<> 9C1<> 56D3> 5.5X 917 733 0 1001 09
CPU_DATA<42>
C CPU_PLL_CFG<3> 4C3< 8A8<>
CPU_DATA<43>
5B4<> 8C5<> 9B1<> 56D3>
5B4<> 8C4< 9B1<> 56D3> 6.0X 1000 800 0 1101 0D C
CPU_PLL_CFG<2> 4D3< 8A8<> CPU_DATA<44> 5B4<> 8C8<> 9B1<> 56D3>
CPU_PLL_CFG<1> 4D3< 8A8<>

CPU_DATA<45> 5B4<> 8C7<> 9B1<> 56D3> 6.5X 1083 867 0 0101 05
CPU_DATA<46> 5B4<> 8C4<> 9B1<> 56D3>
CPU_PLL_CFG<0> 4D3< 8A8<> CPU_DATA<47> 5B4<> 8C7< 9B1<> 56D3> 7.0X 1167 933 0 0010 02
SPECIAL CONFIG SPECIAL CONFIG SPECIAL CONFIG SPECIAL CONFIG SPECIAL CONFIG R3631 R3641 R8871 R3571 R3681 R3651 R3671 R3561 INTREPID BOOT STRAPS 7.5X 1250 1000 0 0001 01
1 1 1 1 1 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K
R383 R381 R380 R377 R375 5% 5% 5% 5% 5% 5% 5% 5%
1K
1%
1K
1%
1K
1%
1K
1%
1K
1%
1/16W
MF
1/16W
MF
1/16W
MF
1/16W
MF
1/16W
MF
1/16W
MF
1/16W
MF
1/16W
MF BITS 40 - 47 8.0X 1333 1067 0 1100 0C
1/16W 1/16W 1/16W 1/16W 1/16W 402 2 402 2 402 2 402 2 402 2 402 2 402 2 402 2
MF MF MF MF MF
2 402 2 402 2 402 2 402 2 402 9.0X 1500 1200 1 0111 17
10.0X 1667 1333 1 1010 1A
SPARE
PLL4MODESEL_NXT[2:0]
SPARE
1: ACTIVE
0: INACTIVE
INTERNALSPREADEN
1: PLL5 (NO SPREAD)

0: PLL4
PCI1 SOURCE CLOCK
1: PLL5 (NO SPREAD)

0: PLL4
PCI0 SOURCE CLOCK
000: 166.4 MHZ
001: 149.76 MHZ 11.0X 1833 1467 1 1001 19
010: 133.12 MHZ
011: 99.84 MHZ 12.0X 2000 1600 1 1011 1B
CPU_PLL_STOP 100: 83.20 MHZ
44B8< 13.0X 2167 1733 1 0101 15
14.0X 2333 1867 1 1100 1C
15.0X 2500 2000 1 0001 11
16.0X 2667 2133 1 1101 1D
(STUFF FOR 133 AND 167)
B 833@167&917@167&1000@167&1083@167&1167@167&1250@167&1333@167&1500@167&1667@167&1833@167&2000@167&2167@167&2333@167&2500@167&2667@167
B
(STUFF FOR 133 AND 167)
933@133&1167@167&1067@133&1333@167&1333@133&1667@167&1867@133&2333@167
733@133&917@167&800@133&1000@167&867@133&1083@167&1000@133&1250@167&1067@133&1333@167&1467@133&1833@167&1733@133&2167@167&1867@133&2333@167&2000@133&2500@167&2133@133&2667@167
667@133&833@167&733@133&917@167&933@133&1167@167&1000@133&1250@167&1333@133&1667@167&1467@133&1833@167&1600@133&2000@167&2000@133&2500@167
867@133&1083@167&933@133&1167@167&1000@133&1250@167&1200@133&1500@167&1733@133&2167@167&2000@133&2500@167
667@133&833@167&733@133&917@167&800@133&1000@167&867@133&1083@167&933@133&1167@167&1000@133&1250@167&1067@133&1333@167
CPU SPEED & BUS RATIO SUPPORT

THE CONFIGURATION RESISTORS BELOW ARE SELF CONFIGURING
WHEN THE ENGINEER SELECTS THE APPROPRIATE CPU AND
BUS SPEED BOM OPTION, THE APPROPRIATE RESISTORS ARE
CPU BUS RATIO BITS
A ARE AUTOMATICALLY SELECTED
A
PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION LAST_MODIFIED=Wed Sep 17 12:15:42 2003
337S2799 1 IC,APOLLO6,SICOH,1.0GHZ,1.5V+30/-130MV,28W,85C U34 CRITICAL 1000@167 AGREES TO THE FOLLOWING
337S2801 1 IC,APOLLO6,SICOH,1.25GHZ,1.57V+70/-70MV,35W,85C U34 CRITICAL 1250@167
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 6 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
BMODE | MSSCR0 | Sys | Vger | Addr
<0> <1> | <16:17> | Bus | ID | Drve
=========+=========+=====+======+======
L L | 1 1 | ??? | 01 | yes unavail SIGNAL TIED APPLICATION
L !hr | 1 0 | Max | 01 | yes unavail
L hr | 1 1 | ??? | 00 | yes unavail CPU_EMODE0_L
HIGH 60X BUS MODE
L H | 1 0 | Max | 00 | yes unavail CPU_HRESET_L MAX BUS MODE
---------+---------+-----+------+------
!hr L | 0 1 | MB+ | 01 | yes unavail CPU_HRESET_L 2.5V INTERFACE
!hr !hr | 0 0 | 60x | 01 | yes unavail CPU_BUS_VSEL LOW 1.8V INTERFACE
!hr hr | 0 1 | MB+ | 00 | yes unavail
D !hr H | 0 0 | 60x | 00 | yes unavail
---------+---------+-----+------+------
CPU_HRESET_H 1.5V INTERFACE D
CPU_HRESET_L or L3_OVDD 2.5V INTERFACE
hr L | 1 1 | ??? | 01 | norm unavail
hr !hr | 1 0 | Max | 01 | norm CPU_L3_VSEL LOW 1.8V INTERFACE
hr hr | 1 1 | ??? | 00 | norm unavail R848
10K 2 CPU_HRESET_H 1.5V INTERFACE
HR H | 1 0 | MAX | 00 | NORM <- DEFAULT 56C3> 9B3< 8B7<> 4C3> CPU_QREQ_L 1
---------+---------+-----+------+------ 1%
1/16W
H L | 0 1 | MB+ | 01 | norm unavail MF
402
H !hr | 0 0 | 60x | 01 | norm R924
10K 2
H hr | 0 1 | MB+ | 00 | norm unavail 59C8> 8A3<> 4C3< JTAG_CPU_TCK 1
H H | 0 0 | 60x | 00 | norm 1%
1/16W
MF
402 NOSTUFF
R925
200 2 R915
59C8> 8A3<> 4C3< JTAG_CPU_TRST_L 1
0 2
5% 1 VGER_INV_HRESET 7A3< 7B3< 44D1>
1/16W
MF 5%
MAXBUS PULL-UPS RP79 402 1/16W
MF
NOSTUFF
10K 402
4B3< CPU_PMONIN_L 4 5 R913
10K 2 59C8>
59C8> 52C6> 5% 1 +MAXBUS_SLEEP 4D5< 6C5< 6D6< 7A3< 7B3< 7C3< 7C5< 7C7< 8A3<> 8D1<
8D1< 8A3<> 7C5< 7C3< 7B3< 7A3< 6D6< 6C5< 4D5< +MAXBUS_SLEEP 1/16W 8D4< 9B7< 9D8< 44B7< 44D1< 44D2< 45D2<> 46D4< 52C6>
46D4< 45D2<> 44D2< 44D1< 44B7< 9D8< 9B7< 8D4< SM1 5%
1/16W
R858 MF
R347 10K 2 R914 402
4C3< CPU_EDTI 1
200 2
10K 2 4D3< CPU_BUS_VSEL 1
56D3> 9D3<> 8B7<> 4D7<> CPU_TS_L 1 1%
1/16W
1% MF 5%
1/16W 402 1/16W
MF R859 MF
402
402
R348 470 2
4D7<> 4A3< CPU_PULLDOWN 1
10K 2 BUS MODE
56C3> 9A1<> 8C4<> 4C3< CPU_TA_L 1 5%
C 1%
1/16W
MF
1/16W
MF
402
0V
INV_HRESET
1.8V BUS MODE
1.5V BUS MODE C
R346 402 OVDD 2.5V BUS MODE
10K 2
56C3> 9B3<> 8B8<> 4A7<> CPU_ARTRY_L 1
1%
MPC7450 PULL-UPS
1/16W
MF
402 R841 59C8>
10K 2 8D4< 8D1< 8A3<> 7C7< 7C3< 7B3< 7A3< 6D6< 6C5< 4D5< +MAXBUS_SLEEP R918
56D3> 9D3< 8B4<> 4D7> CPU_BR_L 1 52C6> 46D4< 45D2<> 44D2< 44D1< 44B7< 9D8< 9B7<
CPU_L2TSTCLK 10K 2 59C8>
4C3< 1 +MAXBUS_SLEEP 4D5< 6C5< 6D6< 7A3< 7B3< 7C3< 7C5< 7C7< 8A3<> 8D1<
1% 8D4< 9B7< 9D8< 44B7< 44D1< 44D2< 45D2<> 46D4< 52C6>
1/16W 1%
MF 1/16W
402 R856 NOSTUFF MF
R840 10K 2 402
10K 2 9A3<> 4C3< CPU_TBEN 1
R926
56C3> 9B3< 8B8<> 4A7> CPU_HIT_L 1
1%
1%
1/16W 1
0 2 CPU_HRESET_L 4B3< 7A3< 7A5< 7B3< 8A3<> 44C2< 44D2< 59C8>
1/16W MF
MF 402 5%
402 R851 R857 1/16W
10K 2 10K 2 MF NOSTUFF
56C3> 9B1< 8B5<> 4C2< CPU_DRDY_L 1 4A7<> CPU_SHD0_L 1 402
1% 1% R919
1/16W
MF
1/16W
MF 1
0 2 VGER_INV_HRESET 7A3< 7B3< 7C3< 44D1>
402 402
R845 R860 5%
10K 2 10K 2 NOSTUFF 1/16W
56C3> 9A1<> 8B5<> 4C3< CPU_TEA_L 1 4A7<> CPU_SHD1_L 1
R920 MF
402
1%
1/16W
1%
1/16W 1
200 2
MF MF
402 R849 402 5%
10K 2 R910 1/16W
56C3> 9B3<> 8B5<> 4A7< CPU_AACK_L 1
CPU_MCP_L 1
10K 2 MF
402
4B3<
1%
1/16W
MF
1%
1/16W
DO NOT USE UNLESS FIX INVERTER BUFFER
402 MF
R847 402 NOSTUFF
10K 2 R911
56C3> 9B1<> 8B8<> 4C3< CPU_DBG_L 1 10K 2 R907
4C3< CPU_LSSD_MODE 1 10K 2
B 1%
1/16W
MF
R846
1%
1/16W
NOSTUFF
1
5%
+MAXBUS_SLEEP 4D5< 6C5< 6D6< 7A3< 7C3< 7C5< 7C7< 8A3<> 8D1< 8D4<
9B7< 9D8< 44B7< 44D1< 44D2< 45D2<> 46D4< 52C6> 59C8> B
402 NOSTUFF MF 1/16W
10K 2 R921 402
R906 MF
56D3> 9D3<> 8B4<> 4D7< CPU_BG_L 1
1K 2 0 2
402
1% 59C8> 8D5<> 8A3<> 4B3> CPU_CHKSTP_OUT_L 1 1 CPU_HRESET_L 4B3< 7A3< 7A5< 7B3< 8A3<> 44C2< 44D2< 59C8>
1/16W
MF 1% 5%
402 1/16W 1/16W NOSTUFF
R349 MF MF
10K 2 402 402 R916
56D3> 9B3<> 8B4<> 4B7> CPU_TBST_L 1 R882 0 2
1K 2 1 VGER_INV_HRESET 7A3< 7B3< 7C3< 44D1>
1% 59C8> 4B3< CPU_CHKSTP_IN_L 1
1/16W 5%
MF 1% 1/16W
402 R842 1/16W R917 MF
10K 2 MF 200 2 402
56C3> 9C3<> 4B8< CPU_INT_GBL_L 1
R909 402 4C3< CPU_L1TSTCLK 1
1%
1/16W CPU_PULLUP 1
1K 2 5%
1/16W
4A3<
MF MF
402 1% 402
R844 1/16W
10K 2 MF
56C3> 9C3<> 8C5<> 4A7> CPU_CI_L 1 402
R922
1% 10K 2
1/16W 59C8> 44D2< 44C2< 8A3<> 7B3< 7A3< 4B3< CPU_HRESET_L 1
MF RP78
402 1% CPUBUS_60X
10K 1/16W
56C3> 9B3<> 8B5<> 4B7> CPU_WT_L 2 7 MF R904
RP79 402 1K 2 59C8>
5%
10K
1 +MAXBUS_SLEEP 4D5< 6C5< 6D6< 7A3< 7B3< 7C3< 7C5< 7C7< 8A3<> 8D1<
1/16W 8D4< 9B7< 9D8< 44B7< 44D1< 44D2< 45D2<> 46D4< 52C6>
SM1 59C6> 8A3<> 4B3< CPU_SRESET_L 2 7 5%
RP78 1/16W
10K 5% 4B3< CPU_EMODE0_L CPUBUS_MAX MF
1/16W 402
56D3> 9B3<> 8B4<> 4B7<> CPU_TT<0> 1 8 SM1 R905
RP79 1
200 2
5%
10K CPU_HRESET_L 4B3< 7A5< 7B3< 8A3<> 44C2< 44D2<
1/16W 59C8>
SM1 RP78 28B5> 8D7<> 4B3< MPIC_CPU_INT_L 3 6 5%
56D3> 9B3<> 8B5<> 4B7<> CPU_TT<1> 3

10K
6 5%
1/16W
1/16W
MF
402
CPU CONFIG OPTIONS
A 5%
1/16W
SM1
R912
10K 2
SM1
R903
1K 2 7C5< 7C7< 8A3<> 8D1< 8D4< 9B7< 9D8< NOTICE OF PROPRIETARY PROPERTY
A
R843 44C4<> 4B3< CPU_SMI_L 1 1 +MAXBUS_SLEEP 4D5< 6C5< 6D6<
10K 2 1% 1%
7A3< 7B3< 7C3< LAST_MODIFIED=Wed Sep 17 12:15:43 2003
CPU_TT<2> 1 1/16W 1/16W
44B7< 44D1< 44D2< 45D2<> 46D4< 52C6> 59C8> THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
56D3> 9B3<> 8B4<> 4B7<> NOSTUFF PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
MF 4B3< CPU_EMODE1_L MF AGREES TO THE FOLLOWING
1%
1/16W
402 RP79 R902 402
MF RP78 10K 1
200 2 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
402
10K 59C8> 8A3<> 4C3< JTAG_CPU_TDI 1 8 VGER_INV_HRESET 7B3< 7C3< 44D1> II NOT TO REPRODUCE OR COPY IT
CPU_TT<3> 4 5 5%
56D3> 9B3<> 8B5<> 4B7<> 5% 1/16W III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
1/16W MF
5% SM1 402
1/16W R923 SIZE DRAWING NUMBER REV.
R350 SM1
10K 2
56D3> 9B3<> 8B4<> 4B7<> CPU_TT<4> 1
10K 2 59C8> 8A3<> 4C3< JTAG_CPU_TMS 1 D 051-6497 13
1% APPLE COMPUTER INC.
1% 1/16W SCALE SHT OF
1/16W MF
MF
402
402 NONE 7 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
59C8>
8D1< 8A3<> 7C7< 7C5< 7C3< 7B3< 7A3< 6D6< 6C5< 4D5< +MAXBUS_SLEEP
52C6> 46D4< 45D2<> 44D2< 44D1< 44B7< 9D8< 9B7<
1 C350 1 C958 1 C983 1 C992 1 C988 1 C1026 1 C1043 1 C982 1 C1013 1 C999 1 C974 1 C1003
10UF 10UF 10UF 10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
N20P80% N20P80% N20P80% N20P80% 20% 20% 20% 20% 20% 20% 20% 20%
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V
2 Y5V 2 Y5V 2 Y5V 2 Y5V 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
805 805 805 805 402 402 402 402 402 402 402 402
MAXBUS LOGIC ANALYZER SUPPORT 1 C969

2.2UF
N20P80%
1 C353
2.2UF
N20P80%
1 C1041
0.1UF
20%
1 C1014
0.1UF
20%
1 C987
0.1UF
20%
1 C998
0.1UF
20%
1 C995
0.1UF
20%
1 C991
0.1UF
20%
1 C977
0.1UF
20%
J20 NOTE: INTREPID MAXBUS CONFIG STRAPS MUST DROP
16V
2 CERM
16V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
D
D OMIT
CON_38SM_MICTOR
SM TO 1K OR LOGIC ANALYZER MAY AFFECT STRAP VALUES J30
805 805 402 402 402 402 402 402 402
1 GND CPROBE
SYM_VER3 GND 38 CON_38SM_MICTOR
OMIT SM
2 GND GND 37 1 GND EPROBE
SYM_VER5 GND 38
SYSCLK_LA
56B3> 8A2< 3 CLK3 Q1 36 MPIC_CPU_INT_L 4B3< 7A5< 28B5> 2 GND GND 37 59C8>
56D3> 9C1<> 9B7< 5C4<> CPU_DATA<34> 4 C3_7 C1_7 35 CPU_DATA<35> 5C4<> 9B7< 9C1<> 56D3> 8D4< 8A3<> 7C7< 7C5< 7C3< 7B3< 7A3< 6D6< 6C5< 4D5< +MAXBUS_SLEEP
59C8> 8A3<> 7B5< 4B3> CPU_CHKSTP_OUT_L 3 Q3 Q2 36 52C6> 46D4< 45D2<> 44D2< 44D1< 44B7< 9D8< 9B7<
56D3> 9B1<> 5B4<> CPU_DATA<56> 5 C3_6 C1_6 34 CPU_DATA<54> 5B4<> 9B1<> 9C8< 56D3>
56D3> 9C1<> 5B4<> CPU_DATA<37> 4 E3_7 E1_7 35 CPU_DATA<58> 5B4<> 9B1<> 9D5< 56D3>
56D3> 9D5< 9B1<> 5B4<> CPU_DATA<59> 6 C3_5 C1_5 33 CPU_DATA<32> 5C4<> 9B7< 9C1<> 56D3>
56D3> 9C1<> 5B4<> CPU_DATA<39> 5 E3_6 E1_6 34 CPU_DATA<36> 5C4<> 9A7< 9C1<> 56D3>
56D3> 9C1<> 9B7< 5C4<> CPU_DATA<33> 7 C3_4 C1_4 32 CPU_DATA<40> 5B4<> 6C4< 9C1<> 56D3>
56D3> 9C1<> 5B4<> CPU_DATA<38> 6 E3_5 E1_5 33 CPU_DATA<62> 5B4<> 9B1<> 9C5< 56D3>
1 C972 1 C981 1 C980 1 C973 1 C993 1 C990
56D3> 9D5< 9B1<> 5B4<> CPU_DATA<60> 8 C3_3 C1_3 31 CPU_DATA<31> 5C4<> 9C1<> 56D3> 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
56D3> 9C5< 9B1<> 5A4<> CPU_DATA<63> 7 E3_4 E1_4 32 CPU_DATA<61> 5B4<> 9B1<> 9C5< 56D3> 20%
10V
20%
10V
20%
10V
20%
10V
20%
10V
20%
10V
56D3> 9C1<> 5C4<> CPU_DATA<28> 9 C3_2 C1_2 30 CPU_DATA<25> 5C4<> 9C1<> 56D3> 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
56D3> 9D5< 9B1<> 5B4<> CPU_DATA<57> 8 E3_3 E1_3 31 CPU_DATA<24> 5C4<> 9C1<> 56D3>
56D3> 9C1<> 5C4<> CPU_DATA<29> 10 C3_1 C1_1 29 CPU_DATA<27> 5C4<> 9C1<> 56D3> 402 402 402 402 402 402
56D3> 9C1<> 5C4<> CPU_DATA<30> 9 E3_2 E1_2 30 CPU_DATA<41> 5B4<> 6C4< 9C1<> 56D3>
56D3> 9C1<> 5C4<> CPU_DATA<23> 11 C3_0 C1_0 28 CPU_DATA<22> 5C4<> 9C1<> 56D3>
56D3> 9C1<> 5C4<> CPU_DATA<26> 10 E3_1 E1_1 29 CPU_DATA<9> 5D4<> 9D1<> 56D3>
56D3> 9C1<> 5C4<> CPU_DATA<21> 12 C2_7 C0_7 27 CPU_DATA<17> 5C4<> 9C1<> 56D3>
56D3> 9D1<> 5D4<> CPU_DATA<8> 11 E3_0 E1_0 28 CPU_DATA<19> 5C4<> 9C1<> 56D3>
56D3> 9D1<> 5C4<> CPU_DATA<14> 13 C2_6 C0_6 26 CPU_DATA<10> 5D4<> 9D1<> 56D3>
56D3> 9D1<> 5C4<> CPU_DATA<15> 12 E2_7 E0_7 27 CPU_DATA<20> 5C4<> 9C1<> 56D3>
1 C994 1 C1007 1 C961 1 C1020 1 C1021 1 C967
56D3> 9D8< 9B1<> 5B4<> CPU_DATA<50> 14 C2_5 C0_5 25 CPU_DATA<13> 5C4<> 9D1<> 56D3> 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
56D3> 9C8< 9B1<> 5B4<> CPU_DATA<55> 13 E2_6 E0_6 26 CPU_DATA<16> 5C4<> 9C1<> 56D3> 20%
10V
20%
10V
20%
10V
20%
10V
20%
10V
20%
10V
56D3> 9D1<> 5D4<> CPU_DATA<2> 15 C2_4 C0_4 24 CPU_DATA<1> 5D4<> 9D1<> 56D3> 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
56D3> 9D1<> 5C4<> CPU_DATA<11> 14 E2_5 E0_5 25 CPU_DATA<18> 5C4<> 9C1<> 56D3>
56D3> 9D1<> 5D4<> CPU_DATA<5> 16 C2_3 C0_3 23 CPU_DATA<4> 5D4<> 9D1<> 56D3> 402 402 402 402 402 402
56D3> 9D1<> 5D4<> CPU_DATA<3> 15 E2_4 E0_4 24 CPU_DATA<49> 5B4<> 9B1<> 9D8< 56D3>
56D3> 9D8< 9B1<> 5B4<> CPU_DATA<51> 17 C2_2 C0_2 22 CPU_DATA<53> 5B4<> 9B1<> 9C8< 56D3>
56D3> 9D1<> 5C4<> CPU_DATA<12> 16 E2_3 E0_3 23 CPU_DATA<6> 5D4<> 9D1<> 56D3>
56D3> 9D1<> 5D4<> CPU_DATA<7> 18 C2_1 C0_1 21 CPU_DATA<47> 5B4<> 6C4< 9B1<> 56D3>
56D3> 9C8< 9B1<> 5B4<> CPU_DATA<52> 17 E2_2 E0_2 22 CPU_DATA<0> 5D4<> 9D1<> 56D3>
56D3> 9B1<> 6C4< 5B4<> CPU_DATA<44> 19 C2_0 C0_0 20 CPU_DATA<45> 5B4<> 6C4< 9B1<> 56D3>
56D3> 9B1<> 6C4< 5B4<> CPU_DATA<42> 18 E2_1 E0_1 21 CPU_DATA<43> 5B4<> 6C4< 9B1<> 56D3> 59D8> 59B6> 52C6> 45D2<> 8B7< 4D7< 4D3< CPU_VCORE_SLEEP
GND 56D3> 9D8< 9B1<> 5B4<> CPU_DATA<48> 19 E2_0 E0_0 20 CPU_DATA<46> 5B4<> 6C4< 9B1<> 56D3>
39
40
41
42
43
44
45
GND
39
40
41
42
43
44
45
1 C1040 1 C976 1 C1037 1 C1033
10UF 10UF 10UF 10UF
N20P80% N20P80% N20P80% N20P80%
C J31 2 10V
Y5V
805
10V
2 Y5V
805
2 10V
Y5V
805
2 10V
Y5V
805
C
CON_38SM_MICTOR
OMIT SM J19
1 GND APROBE
SYM_VER2 GND 38
CON_37SM_MICTOR
F-ST-SM
2 GND GND 37 OMIT DPROBE
1 C1032 1 C1042 1 C1016 1 C364
3 CLK0
SYM_VER1 GND 38 10UF 10UF 10UF 10UF
CLK1 36 N20P80% N20P80% N20P80% N20P80%
2 GND GND 37 10V 10V 10V 10V
56D3> 9C3<> 4B7<>CPU_ADDR<26> 4 A3_7 A1_7 35 CPU_ADDR<30> 4B7<> 9C3<> 56D3> 3 Q0
2 Y5V 2 Y5V 2 Y5V 2 Y5V
CLK2 36 805 805 805 805
56D3> 9C3<> 4B7<>CPU_ADDR<29> 5 A3_6 A1_6 34 CPU_ADDR<31> 4B7<> 9C3<> 56D3> 4 D3_7 D1_7 35 CPU_ADDR<11> 4C7<> 9C3<> 56D3>
56D3> 9C3<> 4B7<> CPU_ADDR<27> 6 A3_5 A1_5 33 CPU_ADDR<28> 4B7<> 9C3<> 56D3>
56D3> 9D3<> 4C7<> CPU_ADDR<8> 5 D3_6 D1_6 34 CPU_ADDR<6> 4C7<> 9D3<> 56D3>
56D3> 9C3<> 4C7<> CPU_ADDR<18> 7 A3_4 A1_4 32 CPU_ADDR<22> 4C7<> 9C3<> 56D3>
56C3> 9C3<> 7A7< 4A7> CPU_CI_L 6 D3_5 D1_5 33 CPU_TA_L 4C3< 7C7< 9A1<> 56C3> 1 C1911 1 C1912 1 C1913 1 C1914
56D3> 9B3<> 4B7> CPU_TSIZ<1> 7 D3_4 D1_4 32 CPU_TT<0> 4B7<> 7A7< 9B3<> 56D3> 10UF 10UF 10UF 10UF
56D3> 9C3<> 4B7<> CPU_ADDR<25> 9 A3_2 A1_2 30 CPU_ADDR<24> 4B7<> 9C3<> 56D3> N20P80% N20P80% N20P80% N20P80%
56D3> 9D3<> 4C7<> CPU_ADDR<4> 8 D3_3 D1_3 31 CPU_ADDR<2> 4C7<> 9D3<> 56D3> 10V 10V 10V 10V
56C3> 9B1<> 7B7< 4C3< CPU_DBG_L 10 A3_1 A1_1 29 CPU_TS_L 4D7<> 7C7< 9D3<> 56D3> 2 Y5V 2 Y5V 2 Y5V 2 Y5V
56C3> 9A1<> 7B7< 4C3< CPU_TEA_L 9 D3_2 D1_2 30 CPU_BR_L 4D7> 7C7< 9D3< 56D3> 805 805 805 805
56D3> 9B3<> 7A7< 4B7<> CPU_TT<1> 10 D3_1 D1_1 29 CPU_TT<4> 4B7<> 7A7< 9B3<> 56D3>
56D3> 9D3<> 4C7<> CPU_ADDR<1> 11 D3_0 D1_0 28 CPU_ADDR<0> 4C7<> 9D3<> 56D3>
56D3> 9B3<> 4B7> CPU_TSIZ<0> 12 D2_7 D0_7 27 CPU_TBST_L 4B7> 7B7< 9B3<> 56D3>
56C3> 9B3<> 7C7< 4A7<> CPU_ARTRY_L 14 A2_5 A0_5 25 CPU_DTI<0> 4C3< 9A1<> 56C3> 1 C598 1 C1054 1 C1055 1 C1056 1 C1057 1 C1058
56C3> 9B3<> 7A7< 4B7> CPU_WT_L 13 D2_6 D0_6 26 CPU_DTI<1> 4C3< 9A1<> 56C3>
56D3> 9C3<> 4C7<> CPU_ADDR<10> 15 A2_4 A0_4 24 CPU_ADDR<7> 4C7<> 9D3<> 56D3> 10UF 10UF 10UF 10UF 10UF 10UF
56D3> 9B3<> 7A7< 4B7<> CPU_TT<3> 14 D2_5 D0_5 25 CPU_TT<2> 4B7<> 7A7< 9B3<> 56D3> N20P80% N20P80% N20P80% N20P80% N20P80% N20P80%
56D3> 9C3<> 4C7<> CPU_ADDR<13> 16 A2_3 A0_3 23 CPU_ADDR<12> 4C7<> 9C3<> 56D3> 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V
56C3> 9B1< 7B7< 4C2< CPU_DRDY_L 15 D2_4 D0_4 24 CPU_BG_L 4D7< 7B7< 9D3<> 56D3> Y5V Y5V Y5V Y5V Y5V Y5V
56C3> 9B3< 7C7< 4A7> CPU_HIT_L 17 A2_2 A0_2 22 CPU_QREQ_L 4C3> 7D5< 9B3< 56C3> 805 805 805 805 805 805
56C3> 4B8<> CPU_GBL_L 16 D2_3 D0_3 23 CPU_QACK_L 4C3< 9B3<> 56C3>
56D3> 9D3<> 4C7<> CPU_ADDR<3> 18 A2_1 A0_1 21 CPU_TSIZ<2> 4B7> 9B3<> 56D3>
56C3> 9B3<> 7B7< 4A7< CPU_AACK_L 17 D2_2 D0_2 22 CPU_DTI<2> 4C3< 9A1<> 56C3>
56D3> 9C3<> 4C7<> CPU_ADDR<9> 19 A2_0 A0_0 20 CPU_ADDR<5> 4C7<> 9D3<> 56D3> 18 D2_1 D0_1 21
GND 19 D2_0 D0_0 20
39
40
41
42
43
44
45
GND
39 40 41 42 43 44 45
INTREPID CLOCK OUTPUT
B NOSTUFF
J27 B
U.FL-R_SMT
(519-0698) NOSTUFF
F-ST-SM
3
R314
0 56B3> INT_CLOCK_OUT
CPU CORE DECOUPLING 1 2 1
59D8> 59B6> 52C6> 45D2<> 8C1< 4D7< 4D3< CPU_VCORE_SLEEP

CPU CORE DECOUPLING PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_HEAD
TABLE_5_ITEM
5%
1/16W
MF
402
NOSTUFF
R308 1 2
132S0013 21 CAP,CER,.22UF,20%,6.3V,0402,X5R 1GHZ_DECOUP 47

5%
SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE 1/16W
C1022,C1027,C1011,C1008,C1010,C1025,C1009,C1002,C1023,C1017,C1031,C997,C996,C1012,C1024,C1001,C1028,C1018,C1096,C1097,C1098 PLACE BOTH RESISTORS MF
1 C1022 1 C1027 1 C1011 1 C1008 1 C1010 1 C1025 1 C1098 CLOSE TO INTREPID
402 2 (518S0104)
1UF 1UF 1UF 1UF 1UF 1UF 1UF
TABLE_5_ITEM
10% 10% 10% 10% 10% 10% 10% 138S0541 21 CAP,CER,1UF,10%,6.3V,0402,X5R 1_25GHZ_DECOUP
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402 402 402 402 C1022,C1027,C1011,C1008,C1010,C1025,C1009,C1002,C1023,C1017,C1031,C997,C996,C1012,C1024,C1001,C1028,C1018,C1096,C1097,C1098
PULLDOWN ON TRST* STRONGER TO OVERCOME POSSIBLE LEAKAGE

FMAX DEBUG CONNECTOR NOSTUFF
R313
NOSTUFF SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE
22
J32 1 C1009 1 C1002 1 C1023 1 C1017 1 C1031 1 C997 +3V_MAIN 59A8> 56B3> 54A7< 16C7< 9B4< INT_ANALYZER_CLK 2 1 SYSCLK_LA 8D8<> 56B3>
SM12B-SRSS-TB 1UF 1UF 1UF 1UF 1UF 1UF 5%
F-RT-SM 10% 10% 10% 10% 10% 10% 1/16W
14 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
6.3V
2 CERM MF
402 402 402 402 402 402 402
NOSTUFF
1 CPU_PLL_CFG<0> 4D3< 6C6< R9371 J22
10K 52C6> 59C8>
2 CPU_PLL_CFG<1> 4D3< 6C6< 1% SM-1 +MAXBUS_SLEEP 4D5< 6C5< 6D6< 7A3< 7B3< 7C3< 7C5< 7C7< 8D1<
SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE 1/16W 8D4< 9B7< 9D8< 44B7< 44D1< 44D2< 45D2<> 46D4<
3 CPU_PLL_CFG<2> 4D3< 6C6< MF
4 CPU_PLL_CFG<3> 4C3<
1 C996 1 C1012 1 C1024 1 C1001 1 C1028 1 C1018 402 2 1 2
5
6
CPU_PLL_CFGEXT 4C3<
6C6<
6C6< 10%
1UF
6.3V
2 CERM
1UF
10%
6.3V
2 CERM
1UF
10%
6.3V
2 CERM
1UF
10%
6.3V
2 CERM
1UF
10%
6.3V
2 CERM
1UF
10%
6.3V
2 CERM
NC_TESTMODE
NC_LCENABLE
NO_TEST
NO_TEST
3
5
4
6
CPU_CHKSTP_OUT_L 4B3> 7B5< 8D5<> 59C8>
CPU_HRESET_L 4B3< 7A3< 7A5< 7B3< 44C2< 44D2< 59C8>
LA CONS & ESP
A 7 NO_TEST NC_FMAX7
402 402 402 402 402 402
59D8> 35B4<> 35A2< 34B7< JTAG_ASIC_TMS

NC_JTAG7 NO_TEST 7
9
8
10
CPU_SRESET_L 4B3< 7A5< 59C6>
NO_TESTNC_JTAG10 NOTICE OF PROPRIETARY PROPERTY
A
8 NO_TEST NC_FMAX8
59D8> 34B7< 28C6< JTAG_ASIC_TDI 11 12 JTAG_CPU_TMS 4C3< 7A5< 59C8> LAST_MODIFIED=Wed Sep 17 12:15:45 2003
9 PWR_SWITCH* 44B1< 44C5<> 59D6> THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
59D8> 35B4<> JTAG_ASIC_TDO 13 14 JTAG_CPU_TDI 4C3< 7A5< 59C8> PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
10 PMU_RST* 29B3<> 44A5<> 44B5<> 59D6> AGREES TO THE FOLLOWING
SEE_TABLE SEE_TABLE 59D8> 35C4< 34B7< JTAG_ASIC_TCK 15 16 JTAG_CPU_TDO 4C3> 59C8>
11 NO_TEST NC_RESET_BUTTON_L I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
12
1 C1096 1 C1097 C1901 C1902
1 1 1 C1903 1 C1904 1 C1910 59C8> 34B7< JTAG_ASIC_TRST_L 17 18 JTAG_CPU_TCK 4C3< 7D5< 59C8>
1UF 1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 19 20 JTAG_CPU_TRST_L 4C3< 7C5< 59C8>
10% 10% 20% 20% 20% 20% 20% 1 1
13
6.3V
2 CERM
6.3V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
R939 R940 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
402 402 402 402 402 402 402 10K 1K

1% 1% SIZE DRAWING NUMBER REV.
1/16W 1/16W
MF
2 402
MF
2 402 (511S0018) D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
(518S0105) NONE 8 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
R720
INTREPID BOOT STRAPS 52D3> 30D5< 28D6<> 16D6< +1_5V_INTREPID_PLL 1
4.7 2 +1_5V_INTREPID_PLL7
52D3>
INTREPID V1.1 IS 133MHZ ONLY
5%
C854 1 1/16W C1101 1
MF
0.1UF 402 0.1UF
20% 20%
10V 10V H26
CERM 2 CERM 2
402 402 VDD15A_7
(PLL6)
52C6> 46D4< 45D2<> BITS 48 - 63 U25
8D4< 8D1< 8A3<> INTREPID
7A3< 6D6< 6C5< 4D5< +MAXBUS_SLEEP 9A2<> INT_PLL6_GND BGA D_0 D10 CPU_DATA<0> 5D4<> 8C4<> 56D3>
7C7< 7C5< 7C3< 7B3<
44D2< 44D1< 44B7< 9B7< NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF SEE_TABLE D_1 G12 CPU_DATA<1> 5D4<> 8C7<> 56D3>
59C8> 56D3> 8B4<> 7C7< 4D7> CPU_BR_L E29
BR
1
R890 1
R868 1
R892 1
R832 1
R863 1
R339 1
R340 (ON PAGE 12) D_2 E11 CPU_DATA<2> 5D4<> 8C8<> 56D3>
56D3> 8B4<> 7B7< 4D7< CPU_BG_L E26
BG
10K 10K 10K 10K 10K 10K 10K D_3 H11 CPU_DATA<3> 5D4<> 8C5<> 56D3>
1% 1% 1% 1% 1% 1% 1%
D 1/16W
MF
2 402
1/16W
MF
2 402
1/16W
MF
2 402
1/16W
MF
2 402
1/16W
MF
2 402
1/16W
MF
2 402
1/16W
MF
2 402
D_4
D_5
B9
B8
CPU_DATA<4> 5D4<> 8C7<> 56D3>
CPU_DATA<5> 5D4<> 8C8<> 56D3>
D
56D3> 8B7<> 7C7< 4D7<> CPU_TS_L B27 TS
D_6 A9 CPU_DATA<6> 5D4<> 8C4<> 56D3>
NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF (1 OF 9)
1 1 1 1 56D3> 8B4<> 4C7<> CPU_ADDR<0> D24
A_0 D_7 A8 CPU_DATA<7> 5D4<> 8C8<> 56D3>
R8551
1
R864 R876 R865 R885 R869 56D3> 8B5<> 4C7<> CPU_ADDR<1> D25
A_1 D_8 E12 CPU_DATA<8> 5D4<> 8C5<> 56D3>
10K 10K 10K 10K 10K 10K
1% 1% 1% 1% 1% 1% 56D3> 8B4<> 4C7<> CPU_ADDR<2> A27
A_2 D_9 D11 CPU_DATA<9> 5D4<> 8C4<> 56D3>
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W
MF MF MF MF MF MF 56D3> 8B8<> 4C7<> CPU_ADDR<3> E24
A_3 D_10 B10 CPU_DATA<10> 5D4<> 8C7<> 56D3>
402 2 402 2 402 2 402 2 402 2 402 2
56D3> 8B5<> 4C7<> CPU_ADDR<4> G23 A_4 D_11 J13 CPU_DATA<11> 5C4<> 8C5<> 56D3>
56D3> 9B1<> 8C5<> 5B4<> CPU_DATA<48> CPU_DATA<57> 5B4<> 8D5<> 9B1<> 56D3> 8B7<> 4C7<> CPU_ADDR<5> B26
A_5 D_12 A10 CPU_DATA<12> 5C4<> 8C5<> 56D3>
56D3>
56D3> 9B1<> 8C4<> 5B4<> CPU_DATA<49> CPU_DATA<58> 5B4<> 8D4<> 9B1<> 56D3> 8C4<> 4C7<> CPU_ADDR<6> A26 A_6 D_13 D12 CPU_DATA<13> 5C4<> 8C7<> 56D3>
56D3>
56D3> 9B1<> 8C8<> 5B4<> CPU_DATA<50> CPU_DATA<59> 5B4<> 8D8<> 9B1<> 56D3> 8B7<> 4C7<> CPU_ADDR<7> D23
A_7 D_14 E13 CPU_DATA<14> 5C4<> 8C8<> 56D3>
56D3>
56D3> 9B1<> 8C8<> 5B4<> CPU_DATA<51> CPU_DATA<60> 5B4<> 8D8<> 9B1<> 56D3> 8C5<> 4C7<> CPU_ADDR<8> A25
A_8 D_15 G13 CPU_DATA<15> 5C4<> 8C5<> 56D3>
56D3>
56D3> 9B1<> 8C5<> 5B4<> CPU_DATA<52> CPU_DATA<61> 5B4<> 8D4<> 9B1<> 56D3> 8B8<> 4C7<> CPU_ADDR<9> E23
A_9 D_16 B11 CPU_DATA<16> 5C4<> 8C4<> 56D3>
56D3>
56D3> 9B1<> 8C7<> 5B4<> CPU_DATA<53> CPU_DATA<62> 5B4<> 8D4<> 9B1<> 56D3> 8B8<> 4C7<> CPU_ADDR<10> J22
A_10 D_17 D13 CPU_DATA<17> 5C4<> 8C7<> 56D3>
56D3>
56D3> 9B1<> 8D7<> 5B4<> CPU_DATA<54> CPU_DATA<63> 5A4<> 8D5<> 9B1<> 56D3> 8C4<> 4C7<> CPU_ADDR<11> B25
A_11 D_18 A11 CPU_DATA<18> 5C4<> 8C4<> 56D3>
CPU_DATA<55> 56D3> MAXBUS
56D3> 9B1<> 8C5<> 5B4<> 56D3> 8B7<> 4C7<> CPU_ADDR<12> H22
A_12 D_19 G14 CPU_DATA<19> 5C4<> 8C4<> 56D3>
INTERFACE
NOSTUFF NOSTUFF 56D3> 8B8<> 4C7<> CPU_ADDR<13> G22
A_13 D_20 H14 CPU_DATA<20> 5C4<> 8C4<> 56D3>
1
R894 1
R355 1
R893 1
R343 1
R360 1
R352 1
R338 1
R341 56D3> 8B7<> 4C7<> CPU_ADDR<14> D22
A_14 D_21 E14 CPU_DATA<21> 5C4<> 8C8<> 56D3>
4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 56D3> 8B7<> 4C7<> CPU_ADDR<15> B24
A_15 D_22 B12 CPU_DATA<22> 5C4<> 8C7<> 56D3>
5% 5% 5% 5% 5% 5% 5% 5%
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 56D3> 8B8<> 4C7<> CPU_ADDR<16> B23
A_16 D_23 G15 CPU_DATA<23> 5C4<> 8C8<> 56D3>
MF MF MF MF MF MF MF MF
2 402 2 402 2 402 2 402 2 402 2 402 2 402 2 402 56D3> 8B8<> 4C7<> CPU_ADDR<17> E22
A_17 D_24 B13 CPU_DATA<24> 5C4<> 8D4<> 56D3>
NOSTUFF 56D3> 8C8<> 4C7<> CPU_ADDR<18> J21
A_18 D_25 H15 CPU_DATA<25> 5C4<> 8D7<> 56D3>
R3591 1 1 1 1 1 1 56D3> 8B7<> 4C7<> CPU_ADDR<19> G21 A_19 D_26 D14 CPU_DATA<26> 5C4<> 8C5<> 56D3>
4.7K R366 R358 R886 R354 R351 R870
5% 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 56D3> 8B8<> 4C7<> CPU_ADDR<20> E21
A_20 D_27 B14 CPU_DATA<27> 5C4<> 8C7<> 56D3>
1/16W 5% 5% 5% 5% 5% 5%
MF 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 56D3> 8C7<> 4C7<> CPU_ADDR<21> A24 A_21 D_28 A12 CPU_DATA<28> 5C4<> 8D8<> 56D3>
402 2 MF MF MF MF MF MF
402 2 402 2 402 2 402 2 402 2 402 2 56D3> 8C7<> 4C7<> CPU_ADDR<22> D21
A_22 D_29 G16 CPU_DATA<29> 5C4<> 8C8<> 56D3>
56D3> 8C8<> 4C7<> CPU_ADDR<23> A23
A_23 D_30 E15 CPU_DATA<30> 5C4<> 8C5<> 56D3>
C MAXBUS OUTPUT
56D3> 8B7<> 4B7<> CPU_ADDR<24> H20
A_24 D_31 J16 CPU_DATA<31> 5C4<> 8D7<> 56D3> C
1: ACTIVE
0: INACTIVE
BUF_REF_CLK_OUTENABLE_H
1: EXTERNAL SOURCE
0: PLL5
SELPLL4EXTSRC
1: BOOTROM ON PCI1
0: BOOTROM ON IDE/CARDSLOT
EN_PCI_ROM_P
1: TI PHY WORKAROUND
0: NORMAL 1394B
TI 1394B WORKAROUND
SPARE
SPARE
1: 0-1 IDE / 2-3 PCI1

0: 0 IDE / 1 PCI1
ROM_Ovrly_Rng
1: GPIOs
0: REQ/GNT
PCI1_REQ2_L / PCI1_GNT2_L
1: GPIOs
0: REQ/GNT
1: GPIOS
0: REQ/GNT
1: B-MODE INTERFACE
0: LEGACY INTERFACE
FIREWIRE PHY INTERFACE
1: 60X BUS (G3)

0: MAX BUS (G4)
PROCESSOR BUS MODE
56D3> 8B8<> 4B7<> CPU_ADDR<25> B22
A_25 D_32 D15 CPU_DATA<32> 5C4<> 8D7<> 9B7< 56D3>
IMPEDANCE
56D3> 8C8<> 4B7<> CPU_ADDR<26> H21
A_26 D_33 A14 CPU_DATA<33> 5C4<> 8D8<> 9B7< 56D3>
111: 28.6 OHM
56D3> 8C8<> 4B7<> CPU_ADDR<27> A22
A_27 D_34 A13 CPU_DATA<34> 5C4<> 8D8<> 9B7< 56D3>
011: 33.3 OHM
56D3> 8C7<> 4B7<> CPU_ADDR<28> E20
A_28 D_35 D16 CPU_DATA<35> 5C4<> 8D7<> 9B7< 56D3>
101: 40 OHM
56D3> 8C8<> 4B7<> CPU_ADDR<29> B21
A_29 D_36 E16 CPU_DATA<36> 5C4<> 8D4<> 9A7< 56D3>
001: 50 OHM
56D3> 8C7<> 4B7<> CPU_ADDR<30> D20
A_30 D_37 G17 CPU_DATA<37> 5B4<> 8D5<> 56D3>
110: 66.6 OHM
56D3> 8C7<> 4B7<> CPU_ADDR<31> A21
A_31 D_38 B15 CPU_DATA<38> 5B4<> 8D5<> 56D3>
010: 100 OHM H17 CPU_DATA<39> 5B4<> 8D5<> 56D3>
D_39
100: 200 OHM 56C3> 8C5<> 7A7< 4A7> CPU_CI_L G26
CI
D_40 A15 CPU_DATA<40> 5B4<> 6C4< 8D7<> 56D3>
000: 200 OHM 56C3> 7B7< 4B8< CPU_INT_GBL_L A29
GBL
D_41 B16 CPU_DATA<41> 5B4<> 6C4< 8C4<> 56D3>
56D3> 8B4<> 7B7< 4B7> CPU_TBST_L A28
TBST
D_42 E17 CPU_DATA<42> 5B4<> 6C4< 8C5<> 56D3>
CPU_TSIZ<0>
56D3> 8B5<> 4B7> G24
TSIZ_0
D_43 A16 CPU_DATA<43> 5B4<> 6C4< 8C4< 56D3>
CPU_TSIZ<1>
56D3> 8B5<> 4B7> H24
TSIZ_1
D_44 J18 CPU_DATA<44> 5B4<> 6C4< 8C8<> 56D3>
56D3> 8B7< 4B7> CPU_TSIZ<2> D26
TSIZ_2
D_45 H18 CPU_DATA<45> 5B4<> 6C4< 8C7<> 56D3>
56D3> 8B4<> 7A7< 4B7<> CPU_TT<0> E25
TT_0
D_46 D17 CPU_DATA<46> 5B4<> 6C4< 8C4<> 56D3>
56D3> 8B5<> 7A7< 4B7<> CPU_TT<1> G25 TT_1
D_47 G18 CPU_DATA<47> 5B4<> 6C4< 8C7< 56D3>
56D3> 8B4<> 7A7< 4B7<> CPU_TT<2> B28
TT_2
D_48 A17 CPU_DATA<48> 5B4<> 8C5<> 9D8< 56D3>
56D3> 8B5<> 7A7< 4B7<> CPU_TT<3> D27 TT_3
D_49 B17 CPU_DATA<49> 5B4<> 8C4<> 9D8< 56D3>
56D3> 8B4<> 7A7< 4B7<> CPU_TT<4> J25
TT_4
D_50 E18 CPU_DATA<50> 5B4<> 8C8<> 9D8< 56D3>
45D2<> 44D2< 44D1< 44B7<
7C3< 7B3< 7A3< 6D6< 6C5< 4D5< +MAXBUS_SLEEP
BITS 32 - 39 56C3> 8B5<> 7A7< 4B7> CPU_WT_L D28
WT B18 CPU_DATA<51> 5B4<> 8C8<> 9D8< 56D3>
D_51
9D8< 8D4< 8D1< 8A3<> 7C7< 7C5<
59C8> 52C6> 46D4< NOSTUFF NOSTUFF NOSTUFF 56C3> 8B5<> 7B7< 4A7< CPU_AACK_L B29
AACK D_52 D18 CPU_DATA<52> 5B4<> 8C5<> 9C8< 56D3>
1
R833
1
R852
1
R862 56C3> 8B8<> 7C7< 4A7<> CPU_ARTRY_L H23
ARTRY D_53 A18 CPU_DATA<53> 5B4<> 8C7<> 9C8< 56D3>
10K 10K 10K 56C3> 8B8<> 7C7< 4A7> CPU_HIT_L B31 HIT D_54 A19 CPU_DATA<54> 5B4<> 8D7<> 9C8< 56D3>
1% 1% 1%
1/16W 1/16W 1/16W D_55 H19 CPU_DATA<55> 5B4<> 8C5<> 9C8< 56D3>
MF MF MF
2 402 2 402 2 402 D_56 B19 CPU_DATA<56> 5B4<> 8D8<> 56D3>
56C3> 8B7<> 7D5< 4C3> CPU_QREQ_L A32
QREQ
B INT_V1 NOSTUFF
D_57
D_58
J19
A20
CPU_DATA<57> 5B4<> 8D5<> 9D5< 56D3>
CPU_DATA<58> 5B4<> 8D4<> 9D5< 56D3>
B
56C3> 8B4<> 4C3< CPU_QACK_L G27
QACK
R854
1
R853
1
D_59 D19 CPU_DATA<59> 5B4<> 8D8<> 9D5< 56D3>
44B8<> INT_SUSPEND_REQ_L AK9
SUSPENDREQ
10K 10K D_60 E19 CPU_DATA<60> 5B4<> 8D8<> 9D5< 56D3>
1% 1% 44B5<> INT_SUSPEND_ACK_L AM8
SUSPENDACK
1/16W 1/16W D_61 G19 CPU_DATA<61> 5B4<> 8D4<> 9C5< 56D3>
MF MF
402 2 402 2 D_62 B20 CPU_DATA<62> 5B4<> 8D4<> 9C5< 56D3>
D_63 G20 CPU_DATA<63> 5A4<> 8D5<> 9C5< 56D3>
56D3> 9C1<> 8D7<> 5C4<> CPU_DATA<32> 56C3> INT_CPU_FB_IN J24 CPU_FB_IN
R764 INT_V1
56D3> 9C1<> 8D8<> 5C4<> CPU_DATA<33> 56C3> INT_CPU_FB_OUT H16
CPU_FB_OUT DBG A30 CPU_DBG_L 4C3< 7B7< 8B8<> 56C3>
10 2
56D3> 9C1<> 8D8<> 5C4<> CPU_DATA<34> 59A8> 56B3> 54A7< 16C7< 8A2< INT_ANALYZER_CLK 1 INT_ANALYZER_CLKA G8
ANALYZER_CLK
56D3> 9C1<> 8D7<> 5C4<> CPU_DATA<35> 5% DRDY G28 CPU_DRDY_L 4C2< 7B7< 8B5<> 56C3>
1/16W
56D3> 9C1<> 8D4<> 5C4<> CPU_DATA<36> MF 44C4<> CPU_CLK_EN AH9
STOPCPUCLK
402
DTI_0 K25 CPU_DTI<0> 4C3< 8B7<> 56C3>
INTREPID_ACS_REF H13
ACS_REF DTI_1 D29 CPU_DTI<1> 4C3< 8B4<> 56C3>
R713 DTI_2 B30 CPU_DTI<2> 4C3< 8B4<> 56C3>
0 2 56C3> SYSCLK_CPU_UF
56C3> 4D2< SYSCLK_CPU 1 J15
CPU_CLK
1 1 1 TA E27 CPU_TA_L 4C3< 7C7< 8C4<> 56C3>
R342 R345 R861 5%
1/16W TEA E28 CPU_TEA_L 4C3< 7B7< 8B5<> 56C3>
4.7K 4.7K 4.7K 56B3> CPU_FB_PLUS3 MF
5% 5% 5% 402
1/16W 1/16W 1/16W ADDS 2" ADDS 1" ADDS 3" 7C5< 4C3< CPU_TBEN A31 TBEN VSSA_7
MF MF MF NOSTUFF NOSTUFF (PLL6)
2 402 2 402 2 402 (0.35 NS) (0.17 NS) 1 (0.5 NS) 1
R772 R766 1 H25
INT_V2 56C3> CPU_FBI_PLUS1 R712 VIN = INTREPID VCORE (1.7V)
0 0 1K
R3531 R3441 NOSTUFF 5%
1/16W
5%
1/16W 1% 9D3< INT_PLL6_GND VOUT = MAXBUS RAIL (1.8V)
4.7K 4.7K R321 R777 MF R310 MF 1/16W NO_TEST
5% 5% 402 2 2 402 MF
1/16W 1/16W
1
0 2 1
0 2 1
0 2 2 402
2
MF MF XW47
402 2 402 2
5% 5% 5% SM
INTREPID MAX
CPU_FB_PLUS2
1/16W 1/16W 1/16W

MF MF MF 1
402 402 402 R752 1
A 470 A
1: TDI OUTPUT
0: TDI INPUT (JTAG)
DDR_TPDMODEENABLE_H
1: ACTIVE
0: INACTIVE
ANALYZERCLK_EN_H
1: ACTIVE LOW
0: ACTIVE HIGH
DDR_TPDEN_POL
1: ACTIVE LOW
0: ACTIVE HIGH
EXTPLL_SDWN_POL
SPARE
56C3> CPU_FB_MINUS3 5%
1/16W NOTICE OF PROPRIETARY PROPERTY
1 NOSTUFF MF
R776 1 2 402 LAST_MODIFIED=Wed Sep 17 12:15:46 2003
0 R757 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
5% 0 AGREES TO THE FOLLOWING
1/16W 5%
NOSTUFF MF 1/16W I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
56C3> 2 402 MF
MAIN LOOP IS 3" (0.5 NS)
R319 R765 2 402 II NOT TO REPRODUCE OR COPY IT
1
0 2 1
0 2 SHORTER THAN MAXBUS CLOCK III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
5% 5% SIZE DRAWING NUMBER REV.

1/16W 1/16W
MF MF ALLOWS ADJUSTING FB CLOCK FROM -3" (0.5 NS)
402 402
TO +2" (0.35 NS) IN 1" (0.17 NS) INCREMENTS
D 051-6497 13
APPLE COMPUTER INC.
56C3> CPU_FBO_PLUS1 PLACE ALL SERPENTINES ON INTERNAL LAYER SCALE SHT OF
NONE 9 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
INTREPID 1.1 SHOULD ALLOW MAXBUS
RAIL TO TURN OFF IN SLEEP
1
SP1 1
SP2 1
SP3 1
SP4
52C3> 46B4<> 17D5< 17A4< 17A3< 16D7< 16C2< 16A8< 11A6< +1_5V_AGP CLIP-SM CLIP-SM CLIP-SM CLIP-SM
59C8>
+3V_MAIN
59C8> 47B2<> 46B3< 11D3< +INTREPID_CORE_MAIN EMI-SPRING EMI-SPRING EMI-SPRING EMI-SPRING
SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE
+1_8V_MAIN +2_5V_MAIN
AD20
AE20
AE23
AF22
AH19
AH22
AH28
AJ21
AJ23
AL19
AL22
AL28
AL30
AN32
AP19
AP22
AP25
AP28
AP31
AR33
AR34
AA11
AA12
AC12
AC13
AC14
AD21
AE15
AE17
AF25
AL10
CLIPS TO ATTACH INTREPID
AB3
AB6
F30
AE3
AE6
AH3
AH6
AK6
D
F7
F9
G3
G6
D AA25 AGP_IO_VDD VDD3.3 AL13
HEATSINK TO GND AT THE
FOUR CORNERS
C12 AA29
AL16
C15 AB25
AL3
C18
U25
AB27
AL7 INTREPID EMI CLIP SUPPORT
C21 AB31
C24
INTREPID AB34
AM4 PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION
BGA AN5
C27 (8 OF 9) AC25
AA21 AP10 870-1125 4 INTREPID EMI CLIP SP1,SP2,SP3,SP4 ?
SEE_TABLE
C30 AC27
AA24
U25 AP13
C9 AC28 INTREPID
AB13 BGA AP16
F12 AE31
AB15 (9 OF 9) K3
F15 AE34 SEE_TABLE
AB17 K6
F18 AF28
AB19 N24
F21 AH30
AC17 N3
F24 AH34
AC19 N6
F27 VDD1.8/CPUVIO AK34
AC23 P13
M15 AP35
AD13 P14
M16 C35
M19
AD15 POWER R22
G31
AD22 T12
M22 G34
P15 T18
M23 K31
P18 T3
N18 K34
P20 VDD3.3 T6
N21 N28
VDD2.5 P21 U12
N23 N31 VDD1.5
R17 W12
P16 N34
R20 W13
P19 N36
T13 W3
P25
C POWER/GROUND P28
U17
U18
W6
AP2
C
R25
U24 AP7
R27
V16 AR3
T25
V19 B3
T28
V20 C2
T29
V22 C6
T31
W16 D32
T34
W24 D5
U25
Y13 B34
U28
Y18 E4
L24 V25
M14 V29
M17 W25
M18 W31
M20 W34
M21 Y27
M24 Y29 AD28
M28 E33 AD3
M3 AD31
M31 AN33 AD34
M32 AN4 AD6
GROUND
M34 AP1 AE14
M6 AP12 AE16
M9 AP15 AE18
N15 AP18 AE19
N25 AP21 AE21 U19
B P12
P17
AP24
AP27
AE22
AE28
U22
U27
B
P22 AP3 AG21 U29
P29 AP30 AG23 V10
P4 AP33 AG24 V12
R14 AP34 AG3 V17
VSS
R16 AP36 AG30 V18
R18 AP6 AG34 VSS V21
R19 AP9 AG6 V24
VSS
R21 AR2 AH20 V3
R23 AR35 AH21 V31
R24 AT3 AH23 V34 INTREPID VERSION SUPPORT
R26 AT34 AH27 V6 PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION
R29 B2 VSS W11
R3 B35 AK3 W14 343S0198 1 IC,ASIC,INTREPID,V1.X U25 INT_V1
R31 C1 AK7 W23 343S0211 1 IC,ASIC,INTREPID,V2.1 U25 CRITICAL INT_V2
R34 C10 AL12 W26
R6 C13 AL15 Y11
T11 C16 AL18 Y12
T14 C19 AL21 Y14
T23 C22 AL27 Y16
T24 C25 AL31 Y19
T27 C28 AL34 Y23
U10 C3 AL6 Y24
U16 C31
C34
AL9 Y25
INTREPID POWER
A AGP_IO_VSS
A
J6
J34
J31
J3
G7
F6
F34
F31
F3
F28
F25
F22
F19
F16
F13
F10
D4
D33
C7
C36
A3
A34
AA20
AA27
AA3
AA31
AA34
AA6
AB11
AB12
AB14
AB16
AB18
AB24
AB28
AB29
AC11
AC15
AC16
AC18
AC20
AC22
AC26
AD12
AD23
AD25

D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 10 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
24 Balls INTREPID CORE DECOUPLING 30 Balls
+1_8V_MAIN 4 X 10UF (0805) 59C8> 47B2<> 46B3< 10D6< +INTREPID_CORE_MAIN 4 X 10UF (0805)
INTREPID MAXBUS DECOUPLING 36 X 0.1UF (0402) 29 X 0.1UF (0402)
C289 1 C291 1 1 C890 1 C832 1 C900 1 C888 1 C891 1 C844 1 C824 1 C872 1 C874 1 C899 C702 1 C727 1 1 C787 1 C789 1 C749 1 C797 1 C719 1 C800 1 C810 1 C766 1 C731 1 C732
10UF 10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 10UF 10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
N20P80% N20P80% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% N20P80% N20P80% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
10V 2 10V 2 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 10V 2 10V 2 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V
Y5V Y5V CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM Y5V Y5V CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM
805 805 402 402 402 402 402 402 402 402 402 402 805 805 402 402 402 402 402 402 402 402 402 402
D C288 1 C290 1 1 C901 1 C823 1 C845 1 C871 1 C834 1 C884 1 C896 1 C898 1 C886 C292 1 C841 1 1 C764 1 C831 1 C833 C765 1 C808 1 C763 1 C780 1 C798 1 C779 1 C790
D
10UF 10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 10UF 10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
N20P80% N20P80% 20% 20% 20% 20% 20% 20% 20% 20% 20% N20P80% N20P80% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V
Y5V 2 Y5V 2 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM Y5V 2 Y5V 2 2 CERM 2 CERM 2 CERM CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
805 805 402 402 402 402 402 402 402 402 402 805 805 402 402 402 402 402 402 402 402 402 402
1 C846 1 C885 1 C887 1 C870 1 C897 1 C889 1 C842 1 C895 1 C869 1 C873 1 C746 1 C730 1 C721 1 C788 1 C734 1 C748 1 C811 1 C747 1 C799
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402
1 C902 1 C843 1 C278 1 C849 1 C281 1 C280 1 C279

0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20% +3V_MAIN 57 Balls
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM 4 X 10UF (0805)
402 402 402 402 402 402 402 INTREPID 3.3V DECOUPLING 66 X 0.1UF (0402)
C655 1 C264 1 1 C745 1 C830 1 C775 1 C717 1 C829 1 C806 1 C691 1 C762 1 C777
10UF 10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
N20P80% N20P80% 20% 20% 20% 20% 20% 20% 20% 20% 20%
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V
44 Balls Y5V 2 Y5V 2 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
+2_5V_MAIN 4 X 10UF (0805)
805 805 402 402 402 402 402 402 402 402 402
INTREPID DDR DECOUPLING 51 X 0.1UF (0402)

C C277 1 C271 1 1 C700 1 C878 1 C725 1 C836 1 C817 1 C839 1 C857 1 C794 1 C855 1 C880
C892
10UF
N20P80%
1 C637
10UF
N20P80%
1 1 C796
0.1UF
20%
1 C867
0.1UF
20%
1 C866
0.1UF
20%
1 C863
0.1UF
20%
1 C868
0.1UF
20%
1 C812
0.1UF
20%
1 C821
0.1UF
20%
1 C822
0.1UF
20%
1
20%
C893
0.1UF C
10UF 10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 10V 2 10V 2 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V
N20P80% N20P80% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% Y5V Y5V CERM CERM CERM CERM CERM CERM CERM CERM CERM
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 805 805 402 402 402 402 402 402 402 402 402
Y5V 2 Y5V 2 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
805 805 402 402 402 402 402 402 402 402 402 402
1 C720 1 C728 1 C809 1 C680 1 C894 1 C643 1 C656 1 C689 1 C774 1 C828
C240 1 C641 1 1 C837 1 C877 1 C688 1 C767 1 C793 1 C815 1 C904 1 C827 1 C876 1 C698 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
10UF 10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
N20P80% N20P80% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
10V 2 10V 2 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 10V
2 CERM 402 402 402 402 402 402 402 402 402 402
Y5V Y5V CERM CERM CERM CERM CERM CERM CERM CERM CERM
805 805 402 402 402 402 402 402 402 402 402 402
1 C850 C743 1 C761 1 C707 1 C883 1 C807 1 C776 1 C744 C718 1 C712
1 C856 1 C735 1 C722 1 C750 1 C753 1 C687 1 C792 1 C668 1 C714 1 C736 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 2 10V 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 10V 2 10V
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 402 402 402 402 402 402 402 402 402 402
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402 402 402 402 402 402 402
1 C835 1 C729 1 C881 1 C676 1 C716 1 C805 1 C644 1 C645 1 C865 1 C882
1 C801 1 C825 1 C838 1 C723 1 C803 1 C791 1 C755 1 C818 1 C802 1 C813 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
10V
2 CERM 10V
2 CERM 10V
2 CERM 10V
2 CERM 10V
2 CERM 10V
2 CERM 10V
2 CERM 10V
2 CERM 2 10V 10V
2 CERM 402 402 402 402 402 402 402 402 402 402
CERM
402 402 402 402 402 402 402 402 402 402
1 C708 1 C681 1 C678 1 C682 1 C879 1 C903 1 C673 1 C679 1 C677 1 C660
B 1 C699 1 C751 1 C826 1 C752 1 C768 1 C816 1 C814 1 C754 1 C724 1 C781 0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20% 20%
0.1UF B
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V 2 10V
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 402 402 402 402 402 402 402 402 402 402
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402 402 402 402 402 402 402
1 C657 1 C851 1 C875 1 C659 1 C690 1 C658 1 C852 1 C646

1 C782 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% 20% 20% 20% 20% 20%
0.1UF 10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
20%
2 10V
CERM
402 402 402 402 402 402 402 402
402
21 Balls
4 X 10UF (0805)
52C3> 46B4<> 17D5< 17A4< 17A3< 16D7< 16C2< 16A8< 10D6<
59C8>
+1_5V_AGP INTREPID AGP I/O DECOUPLING 24 X 0.1UF (0402)
C231 1 C232 1 1 C697 1 C693 1 C684 1 C686 1 C709 1 C649 1 C667 1 C694 1 C695 1 C664
10UF 10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
N20P80% N20P80% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V
Y5V 2 Y5V 2 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
805 805 402 402 402 402 402 402 402 402 402 402
INTREPID BYPASS
A C638
10UF
1 C628
10UF
1 1 C733
0.1UF
1 C650
0.1UF
1 C647
0.1UF
1 C710
0.1UF
1 C685
0.1UF
1 C683
0.1UF
1 C665
0.1UF
1 C696
0.1UF
1 C666
0.1UF
1 C651
0.1UF NOTICE OF PROPRIETARY PROPERTY
A
N20P80% N20P80% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% LAST_MODIFIED=Wed Sep 17 12:15:51 2003
10V 2 10V 2 2 10V 2 10V 2 10V 2 10V 2 10V 10V
2 CERM 2 10V 2 10V 2 10V 2 10V
Y5V Y5V CERM CERM CERM CERM CERM CERM CERM CERM CERM THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
805 805 402 402 402 402 402 402 402 402 402 402 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
1 C662 1 C661 1 C648 1 C674 1 C711 1 C663 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% 20% 20% 20% SIZE DRAWING NUMBER REV.
10V 10V 10V 10V 10V 10V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402 402 402
APPLE COMPUTER INC.
D 051-6497 13
SCALE SHT OF
NONE
11 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
DDR MUX CONNECTIONS
0-ohm resistors to allow
rewiring if necessary SERIES RESISTORS FOR CONTROL SIGNALS
MUX_SEL_H 13A3<> 13C4<> 53C6<

RP68
22
DDR_A_0 H35 MEM_ADDR<0> 12C3< 53D6< 53D6< 12D6<> MEM_ADDR<4> 1 8 RAM_ADDR<4> 14B4<> 15C6< 53D6<
53D6< 13C8<> MEM_DATA<0> AK32
DDR_DATA_0
DDR_A_1 G35 MEM_ADDR<1> 12C3< 53D6< 5% RP71
53D6< 13C8<> MEM_DATA<1> AK33
DDR_DATA_1 R288 1/16W
22
DDR_A_2 G36 MEM_ADDR<2> 12C3< 53D6< SM1 MEM_ADDR<12>
53D6< 13C8<> MEM_DATA<2> AK31 DDR_DATA_2 MEM_MUXSEL_H<1> 47 2 53D6< 12D6<> 1 8
RAM_ADDR<12> 14B6<> 15C4> 53D6<
D 53D6< 13C8<> MEM_DATA<3> AK35

DDR_DATA_3 U25
INTREPID
DDR_A_3
DDR_A_4
F36
F35
MEM_ADDR<3> 12D3< 53D6<
MEM_ADDR<4> 12D3< 53D6<
1
5%
RP68
22
5%
1/16W
D
53D6< 13C8<> MEM_DATA<4> AK36 DDR_DATA_4 1/16W SM1
BGA DDR_A_5 E35 MEM_ADDR<5> 12C2< 53D6< MF 53D6< 12D6<> MEM_ADDR<3> 2 7 RAM_ADDR<3> 14B6<> 15C4> 53D6<
53D6< 13C8<> MEM_DATA<5> AJ32
DDR_DATA_5 (2 OF 9) 402
DDR_A_6 E36 MEM_ADDR<6> 12D2< 53D6< 5% RP71
53D6< 13C8<> MEM_DATA<6> AJ35
DDR_DATA_6 SEE_TABLE 1/16W 22
DDR_A_7 G32 MEM_ADDR<7> 12D3< 53D6< SM1 MEM_ADDR<8>
53D6< 13C8<> MEM_DATA<7> AJ36
DDR_DATA_7 (ON PAGE 12) 53D6< 12D6<> 2 7
RAM_ADDR<8> 14B4<> 15C4> 53D6<
DDR_A_8 D36 MEM_ADDR<8> 12D2< 53D6< MUX_SEL_L 13A6<> 13C8<> 53C6<
53D6< 13C8<> MEM_DATA<8> AG33
DDR_DATA_8 RP68 5%
DDR_A_9 H36 MEM_ADDR<9> 12C3< 53D6< 22 1/16W
53D6< 13C8<> MEM_DATA<9> AG35
DDR_DATA_9 SM1
DDR_A_10 G33 MEM_ADDR<10> 12C3< 53D6< 53D6< 12D6<> MEM_ADDR<7> 3 6 RAM_ADDR<7> 14B6<> 15C6< 53D6<
53D6< 13C8<> MEM_DATA<10> AH35
DDR_DATA_10
DDR_A_11 H33 MEM_ADDR<11> 12B3< 53D6< 5% RP71
53D6< 13C8<> MEM_DATA<11> AG36
DDR_DATA_11 R261 1/16W
22
DDR_A_12 D35 MEM_ADDR<12> 12D2< 53D6< SM1 MEM_ADDR<6>
53D6< 13C8<> MEM_DATA<12> AH36
DDR_DATA_12 MEM_MUXSEL_L<1> 47 2 53D6< 12D6<> 3 6
RAM_ADDR<6> 14B4<> 15C4> 53D6<
DDR_BA_0 L30 MEM_BA<0> 12B3< 53D6< 1
53D6< 13C8<> MEM_DATA<13> AH32
DDR_DATA_13 RP68 5%
DDR_BA_1 M29 MEM_BA<1> 12B3< 53D6< 5%
22 1/16W
53D6< 13C8<> MEM_DATA<14> AG32
DDR_DATA_14 1/16W
4 5 SM1
MF 53D6< 12D6<> MEM_ADDR<10> RAM_ADDR<10> 14B6<> 15B4> 53D6<
53D6< 13C8<> MEM_DATA<15> AG31
DDR_DATA_15 DDRCS_0 AN34 MEM_CS_L<0> 12C2< 53C6< 402
53D6< 13B6<> MEM_DATA<16> AE32 AN36 MEM_CS_L<1> 12C2< 53C6<
5% RP71
DDR_DATA_16 DDRCS_1 1/16W
22
53D6< 13B6<> MEM_DATA<17> AF35 DDR_DATA_17 DDRCS_2 AL35 MEM_CS_L<2> 12B2< 53C6<
SM1
53D6< 12D6<>
MEM_ADDR<5> 4 5 14B6<> 15C6< 53D6<
’0’S ARE SAME POLARITY (ACTIVE LO) RAM_ADDR<5>
53D6< 13B6<> MEM_DATA<18> AF36
DDR_DATA_18 DDRCS_3 AL33 MEM_CS_L<3> 12B2< 53C6< 5%
’1’S ARE SAME POLARITY (ACTIVE HI) 1/16W
53D6< 13B6<> MEM_DATA<19> AE36 DDR_DATA_19 DDR SM1
53D6< 13B6<> MEM_DATA<20> AE35
DDR_DATA_20
MEMORY DDR_DQS_0 AJ31 MEM_DQS<0> 13C8<> 53D6< SEL = 0; HOST=B PORT, A PORT = 100 OHMGND
53D6< 13B6<> MEM_DATA<21> AE33
DDR_DATA_21
INTERFACE DDR_DQS_1 AH31 MEM_DQS<1> 13C8<> 53D6< SEL = 1; HOST=A PORT, B PORT = 100 OHMGND
DDR_DQS_2 AD32 MEM_DQS<2> 13A6<> 53D6< RP62
53D6< 13B6<> MEM_DATA<22> AD36
DDR_DATA_22 22
DDR_DQS_3 AB30 MEM_DQS<3> 13A6<> 53D6< MEM_ADDR<2> RAM_ADDR<2>
53D6< 13B6<> MEM_DATA<23> AD35
DDR_DATA_23 53D6< 12D6<> 1 8 14B4<> 15C6< 53D6< RP51
DDR_DQS_4 V30 MEM_DQS<4> 13C4<> 53D6< RP102 22
53D6< 13A6<> MEM_DATA<24> AA36
DDR_DATA_24 22 8 5%
DDR_DQS_5 P32 MEM_DQS<5> 13C4<> 53D6< SYSCLK_DDRCLK_A0_UF 1/16W 53C6< 12B6<> MEM_CKE<2> 1 8 RAM_CKE<2> 15B1< 15C6<
53D6< 13A6<> MEM_DATA<25> AA35
DDR_DATA_25 1 SYSCLK_DDRCLK_A0 14D6<> 53C6< SM1 53C6<
DDR_DQS_6 N29 MEM_DQS<6> 13B3<> 53D6< 5%
53D6< 13A6<> MEM_DATA<26> AA33
DDR_DATA_26 5% 1/16W
DDR_DQS_7 L32 MEM_DQS<7> 13B3<> 53D6< 1/16W RP62 SM1
53D6< 13A6<> MEM_DATA<27> AB36
DDR_DATA_27 SM1 22
53D6< 13A6<> MEM_DATA<28> AB35
DDR_DATA_28 DDR_DM_0 AJ33 MEM_DQM<0> 13C8<> 53D6< 53D6< 12D6<>
MEM_ADDR<1> 2 7 RAM_ADDR<1> 14B6<> 15B6< 53D6< RP51
53D6< 13A6<> MEM_DATA<29> AC36 AH33 MEM_DQM<1> RP102 22
C 53D6< 13A6<> MEM_DATA<30> AA32
DDR_DATA_29
DDR_DATA_30
DDR_DM_1
DDR_DM_2 AD33 MEM_DQM<2>
13C8<> 53D6<
13A6<> 53D6<
SYSCLK_DDRCLK_A0_L_UF 2
22 7
SYSCLK_DDRCLK_A0_L 14D6<> 53C6<
5%
1/16W
SM1
53C6< 12C6<> MEM_CS_L<0> 2
5%
7 RAM_CS_L<0> 14B6<>
53C6<
C
53D6< 13A6<> MEM_DATA<31> AB33
DDR_DATA_31 DDR_DM_3 AC35 MEM_DQM<3> 13A6<> 53D6< 5% 1/16W
53D6< 13C4<> MEM_DATA<32> V36 DDR_DATA_32 DDR_DM_4 T35 MEM_DQM<4> 13C4<> 53D6<
1/16W RP62 SM1
SM1 22
53D6< 13C4<> MEM_DATA<33> U33 T33 MEM_DQM<5> MEM_ADDR<0> 3 6 RAM_ADDR<0>
DDR_DATA_33 DDR_DM_5 13C4<> 53D6< 53D6< 12D6<> 14B4<> 15B6< 53D6< RP51
53D6< 13C4<> MEM_DATA<34> U32 DDR_DATA_34 DDR_DM_6 N32 MEM_DQM<6> 13B3<> 53D6<
RP102 5% 22
SYSCLK_DDRCLK_A1_UF 22 6 1/16W 53C6< 12C6<> MEM_CKE<0> 3 6 RAM_CKE<0> 14B4<> 15C1<
53D6< 13C4<> MEM_DATA<35> V35
DDR_DATA_35 DDR_DM_7 L33 MEM_DQM<7> 13B3<> 53D6< 3 SYSCLK_DDRCLK_A1 14A4<> 53C6< SM1 53C6<
5%
53D6< 13C4<> MEM_DATA<36> T30
DDR_DATA_36 5% 1/16W
DDRRAS L29 MEM_RAS_L 12A3< 53C6< 1/16W RP62 SM1
53D6< 13C4<> MEM_DATA<37> U36
DDR_DATA_37 SM1 22
DDRCAS H32 MEM_CAS_L 12A3< 53C6< MEM_ADDR<9> RAM_ADDR<9>
53D6< 13C4<> MEM_DATA<38> U35
DDR_DATA_38 53D6< 12D6<> 4 5 14B6<> 15C6< 53D6< RP51
DDRWE K30 MEM_WE_L 12B3< 53C6< RP102 22
53D6< 13C4<> MEM_DATA<39> T36
DDR_DATA_39 22 5%
DDRCKE0 AN35 MEM_CKE<0> 12C2< 53C6< SYSCLK_DDRCLK_A1_L_UF 1/16W 53C6< 12C6<> MEM_CS_L<1> 4 5 RAM_CS_L<1> 14B4<>
53D6< 13C4<> MEM_DATA<40> P33
DDR_DATA_40 4 5 SYSCLK_DDRCLK_A1_L 14A4<> 53C6< SM1 53C6<
DDRCKE1 AM35 MEM_CKE<1> 12B2< 53C6< 5%
53D6< 13C4<> MEM_DATA<41> R30
DDR_DATA_41 5% 1/16W R1371 1
R214
DDRCKE2 AM36 MEM_CKE<2> 12C2< 53C6< 1/16W SM1
53D6< 13C4<> MEM_DATA<42> P35
DDR_DATA_42 SM1 10K 10K
DDRCKE3 AL36 MEM_CKE<3> 12B2< 53C6< 1% 1%
53D6< 13C4<> MEM_DATA<43> P36
DDR_DATA_43 1/16W 1/16W
53D6< 13C4<> MEM_DATA<44> R36 AB32 NC_MEM_MUXSEL_H<0> RP105 MF MF
DDR_DATA_44 DDR_SELHI_0
SYSCLK_DDRCLK_A2_UF 22 8 NO_TEST RP116 402 2 2 402
53D6< 13C4<> MEM_DATA<45> R35 DDR_DATA_45 DDR_SELHI_1 AE29 53C6< MEM_MUXSEL_H<1> 1 NC_SYSCLK_DDRCLK_A2 MEM_BA<1> 22 8 RAM_BA<1> NOSTUFF NOSTUFF
53D6< 12D6<> 1 14B4<> 15B6< 53D6<
53D6< 13C4<> MEM_DATA<46> R33
DDR_DATA_46 DDR_SELLO_0 N30 NC_MEM_MUXSEL_L<0> 5% RP52
1/16W 5%
53D6< 13C4<> MEM_DATA<47> R32 DDR_DATA_47 DDR_SELLO_1 T32 53C6< MEM_MUXSEL_L<1> SM1 1/16W 22
SM1 53C6< 12C6<> MEM_CS_L<3> 1 8 RAM_CS_L<3> 15B4> 53C6<
53D6< 13B3<> MEM_DATA<48> N35
DDR_DATA_48
DDR_MCLK_0_P Y32 53C6< SYSCLK_DDRCLK_A0_UF RP105 5%
53D6< 13B3<> MEM_DATA<49> M36
DDR_DATA_49 22 RP116 1/16W
DDR_MCLK_0_N Y33 53C6< SYSCLK_DDRCLK_A0_L_UF SYSCLK_DDRCLK_A2_L_UF NO_TEST
SM1
53D6< 13B3<> MEM_DATA<50> L35
DDR_DATA_50 2 7 NC_SYSCLK_DDRCLK_A2_L MEM_BA<0> 22 7 RAM_BA<0>
DDR_MCLK_1_P Y35 53C6< SYSCLK_DDRCLK_A1_UF 53D6< 12D6<> 2 14B6<> 15B6< 53D6<
53D6< 13B3<> MEM_DATA<51> M35
DDR_DATA_51 5% RP52
DDR_MCLK_1_N Y36 53C6< SYSCLK_DDRCLK_A1_L_UF 1/16W 5%
53D6< 13B3<> MEM_DATA<52> M33
DDR_DATA_52 SM1 1/16W 22
DDR_MCLK_2_P Y30 53C6< SYSCLK_DDRCLK_A2_UF SM1 53C6< 12B6<> MEM_CKE<3> 2 7 RAM_CKE<3> 15A1< 15C4>
53D6< 13B3<> MEM_DATA<53> L36
DDR_DATA_53 53C6<
DDR_MCLK_2_N W30 53B6< SYSCLK_DDRCLK_A2_L_UF 5%
53D6< 13B3<> MEM_DATA<54> N33
DDR_DATA_54 RP116 1/16W
DDR_MCLK_3_P W32 53B6< SYSCLK_DDRCLK_B0_UF SM1
53D6< 13B3<> MEM_DATA<55> M30
DDR_DATA_55 MEM_WE_L 22 6 RAM_WE_L 14B6<>
B 53D6< 13B3<> MEM_DATA<56> J32
DDR_DATA_56
DDR_MCLK_3_N
DDR_MCLK_4_P
W33
V33
53B6< SYSCLK_DDRCLK_B0_L_UF
53B6< SYSCLK_DDRCLK_B1_UF RP105
22 6
53C6< 12C6<> 3
5%
15B6< 53C6<
RP52
22
B
53D6< 13B3<> MEM_DATA<57> J33
DDR_DATA_57 SYSCLK_DDRCLK_B0_UF 1/16W
DDR_MCLK_4_N V32 53B6< SYSCLK_DDRCLK_B1_L_UF 3 SYSCLK_DDRCLK_B0 15B4> 53B6< SM1 53C6< 12C6<> MEM_CS_L<2> 3 6 RAM_CS_L<2> 15B4> 53C6<
53D6< 13B3<> MEM_DATA<58> J35
DDR_DATA_58
DDR_MCLK_5_P W35 53B6< SYSCLK_DDRCLK_B2_UF 5% 5%
53D6< 13B3<> MEM_DATA<59> K32
DDR_DATA_59 1/16W RP116 1/16W
DDR_MCLK_5_N W36 NO_TEST 53B6< SYSCLK_DDRCLK_B2_L_UF SM1 SM1
53D6< 13B3<> MEM_DATA<60> K33 DDR_DATA_60 MEM_ADDR<11> 22
4 5
53D6< 13B3<> MEM_DATA<61> J36 AA22 INT_MEM_REF 53D6< 12D6<> RAM_ADDR<11> 14B4<> 15C4> 53D6<
DDR_DATA_61 DDR_REF RP105 5%
RP52
53D6< 13B3<> MEM_DATA<62> K36 DDR_DATA_62 SYSCLK_DDRCLK_B0_L_UF 22 5 1/16W 22
DDR_VREF_0 Y22 4 SYSCLK_DDRCLK_B0_L 15B3> 53B6< SM1 53C6< 12B6<> MEM_CKE<1> 4 5 RAM_CKE<1> 14B6<> 15C1<
53D6< 13B3<> MEM_DATA<63> K35
DDR_DATA_63 1
R625 53C6<
DDR_VREF_1 T22 5% 5%
1K 1/16W 1/16W
1% SM1 SM1
1/16W
MF
2 402 RP109
SYSCLK_DDRCLK_B1_UF 22 5 R1721 1
R235
4 SYSCLK_DDRCLK_B1 15D6< 53B6< 10K 10K
1% 1%
5% R697 1/16W 1/16W
1/16W MF MF
SM1 22 2 402 2 2 402
+2_5V_MAIN 53C6< 12C6<> MEM_RAS_L 1 RAM_RAS_L 14B4<> 15B4> 53C6<
NOSTUFF NOSTUFF
RP109 5%
1/16W
SYSCLK_DDRCLK_B1_L_UF 22 6 MF
MIN_LINE_WIDTH=25 3 SYSCLK_DDRCLK_B1_L 15C6< 53B6< 402
14A1< INT_MEM_VREF
5%
1/16W
1 C14
1 C30 SM1 R286
0.1UF 22 2
0.1UF 20% MEM_CAS_L RAM_CAS_L
+2_5V_MAIN 20%
10V
2 CERM
10V
2 CERM
SYSCLK_DDRCLK_B2_UF
RP109
22 8
53C6< 12C6<> 1
5%
14B4<> 15B6< 53C6<
402
402 1 SYSCLK_DDRCLK_B2 15A6< 53B6< 1/16W
MF
5% 402
1/16W
1
R82
100 LOCATE 2 DECOUPLING CAPS
SM1
INTREPID DDR CNTRL
A 1%
1/16W
MF
DIRECTLY AT DDR_VREF_X BALLS SYSCLK_DDRCLK_B2_L_UF 2
RP109
22 7
SYSCLK_DDRCLK_B2_L 15A6< 53B6< NOTICE OF PROPRIETARY PROPERTY
A
2 402 (U25-Y22 & T22)
5% LAST_MODIFIED=Wed Sep 17 12:15:52 2003
MIN_LINE_WIDTH=20 1/16W THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
DDR_VREF 14D2<> 14D8<> 15D8< 52A6> SM1 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
1 LOCATE THESE RESISTORS NEAR INTREPID
R93 II NOT TO REPRODUCE OR COPY IT
100 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
1%
1/16W
MF SIZE DRAWING NUMBER REV.
2 402
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 12 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
NOSTUFF
NOSTUFF
1 C230 1 C611 1 C612 1 C613 1 C858 1C860 1 C859
10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
N20P80% 20% 20% 20% 20% 20% 20%
2 10V
Y5V 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
805 402 402 402 402 402 402
E8
F3
F8
D VDD DA0 F1 RAM_DATA_A<32> 14B6<> 53D6< D
E8
F3
F8
VDD DA1 H1 RAM_DATA_A<33> 14B6<> 53D6<
DA0 F1 RAM_DATA_A<0> 14D6<> 53D6<
U27 DA2 K1 RAM_DATA_A<34> 14B6<> 53D6<
DA1 H1 RAM_DATA_A<1> 14D6<> 53D6<
CBTV4020 DA3 K3 RAM_DATA_A<35> 14B6<> 53D6<
U18 DA2 K1 RAM_DATA_A<2> 14D6<> 53D6< BGA
SYM_VER-3 DA4 K4 RAM_DATA_A<36> 14B4<> 53D6<
CBTV4020 DA3 K3 RAM_DATA_A<3> 14D6<> 53D6<
BGA DA5 K6 RAM_DATA_A<37> 14B4<> 53D6<
SYM_VER-3 DA4 K4 RAM_DATA_A<4> 14D4<> 53D6<
DA6 J7 RAM_DATA_A<38> 14B4<> 53D6<
DA5 K6 RAM_DATA_A<5> 14D4<> 53D6<
DA7 K9 RAM_DATA_A<39> 14B4<> 53D6<
DA6 J7 RAM_DATA_A<6> 14D4<> 53D6<
DA8 J10 RAM_DQS_A<4> 14B6<> 14B8< 53D6<
DA7 K9 RAM_DATA_A<7> 14D4<> 53D6<
DA9 G10 RAM_DQM_A<4> 14B4<> 53D6<
DA8 J10 RAM_DQS_A<0> 14C8< 14D6<> 53D6<
DA10 E10 RAM_DATA_A<40> 14B6<> 53D6<
DA9 G10 RAM_DQM_A<0> 14D4<> 53D6<
53D6< 12C8<> MEM_DATA<32> F2 DH0 DA11 C10 RAM_DATA_A<41> 14B6<> 53D6<
DA10 E10 RAM_DATA_A<8> 14D6<> 53D6<
53D6< 12C8<> MEM_DATA<33> H2 DH1 DA12 A10 RAM_DATA_A<42> 14A6<> 53D6<
53D6< 12D8<> MEM_DATA<0> F2 DH0 DA11 C10 RAM_DATA_A<9> 14D6<> 53D6<
53D6< 12C8<> MEM_DATA<34> J2 DH2 DA13 A8 RAM_DATA_A<43> 14A6<> 53D6<
53D6< 12D8<> MEM_DATA<1> H2 DH1 DA12 A10 RAM_DATA_A<10> 14D6<> 53D6<
53D6< 12C8<> MEM_DATA<35> J3 DH3 DA14 A7 RAM_DATA_A<44> 14B4<> 53D6<
53D6< 12D8<> MEM_DATA<2> J2 DH2 DA13 A8 RAM_DATA_A<11> 14D6<> 53D6<
53D6< 12C8<> MEM_DATA<36> J5 DH4 DA15 A5 RAM_DATA_A<45> 14B4<> 53D6<
53D6< 12C8<> MEM_DATA<37> J6 DH5 DA16 B4 RAM_DATA_A<46> 14A4<> 53D6<
53D6< 12C8<> MEM_DATA<38> J8 DH6 DA17 A2 RAM_DATA_A<47> 14A4<> 53D6<
53D6< 12D8<> MEM_DATA<5> J6 DH5 DA16 B4 RAM_DATA_A<14> 14D4<> 53D6< +2_5V_MAIN
53D6< 12C8<> MEM_DATA<39> J9 DH7 DA18 B1 RAM_DQS_A<5> 14A6<> 14B8< 53D6<
53D6< 12C6<> MEM_DQS<4> H9 DH8 DA19 D1 RAM_DQM_A<5> 14A4<> 53D6<
53D6< 12D8<> MEM_DATA<7> J9 DH7 DA18 B1 RAM_DQS_A<1> 14C8< 14D6<> 53D6<
53D6< 12C6<> MEM_DQM<4> F9 DH9
53D6< 12C6<> MEM_DQS<0> H9 DH8 DA19 D1 RAM_DQM_A<1> 14D4<> 53D6<
53D6< 12B8<> MEM_DATA<40> E9 DH10 DB0* G1 RAM_DATA_B<32> 15B6< 53D6<
53D6< 12C6<> MEM_DQM<0> F9 DH9
53D6< 12B8<> MEM_DATA<41> C9 DH11 DB1* J1 RAM_DATA_B<33> 15B6< 53D6<
53D6< 12D8<> MEM_DATA<8> E9 DH10 DB0* G1 RAM_DATA_B<0> 15D6< 53D6<
53D6< 12B8<> MEM_DATA<42> B9 DH12 DB2* K2 RAM_DATA_B<34> 15B6< 53D6< NOSTUFF
53D6< 12D8<> MEM_DATA<9> C9 DH11 DB1* J1 RAM_DATA_B<1> 15D6< 53D6< 1 C908
1 C909 1 C910
53D6< 12B8<> MEM_DATA<43> B8 DH13 DB3* J4 RAM_DATA_B<35> 15B6< 53D6< 0.1UF
53D6< 12D8<> MEM_DATA<10> B9 DH12 DB2* K2 RAM_DATA_B<2> 15D6< 53D6< 0.1UF 0.1UF
53D6< 12B8<> MEM_DATA<44> B6 DH14 DB4* K5 RAM_DATA_B<36> 15B4> 53D6< 20% 20%
10V 20%
53D6< 12D8<> MEM_DATA<11> B8 DH13 DB3* J4 RAM_DATA_B<3> 15D6< 53D6< 10V 2 CERM 10V
53D6< 12B8<> MEM_DATA<45> B5 DH15 DB5* K7 RAM_DATA_B<37> 15B4> 53D6< 2 CERM 2 CERM
C 53D6< 12D8<> MEM_DATA<12>
53D6< 12D8<> MEM_DATA<13>
B6 DH14
B5 DH15
DB4* K5
DB5* K7
RAM_DATA_B<4> 15D4> 53D6<
RAM_DATA_B<5> 15D4> 53D6< 53D6< 12B8<> MEM_DATA<46> B3 DH16 DB6* K8 RAM_DATA_B<38> 15B4> 53D6<
402 402 402 C
53D6< 12B8<> MEM_DATA<47> B2 DH17 DB7* K10 RAM_DATA_B<39> 15B4> 53D6<
53D6< 12C8<> MEM_DATA<14> B3 DH16 DB6* K8 RAM_DATA_B<6> 15D4> 53D6<
53D6< 12C6<> MEM_DQS<5> C2 DH18 DB8* H10 RAM_DQS_B<4> 15B6< 15B8< 53D6<
53D6< 12C8<> MEM_DATA<15> B2 DH17 DB7* K10 RAM_DATA_B<7> 15D4> 53D6<
+2_5V_MAIN 53D6< 12C6<> MEM_DQM<5> DB9* F10 RAM_DQM_B<4> 15B4> 53D6<
E8
F3
F8
E2 DH19
53D6< 12C6<> MEM_DQS<1> C2 DH18 DB8* H10 RAM_DQS_B<0> 15C8< 15D6< 53D6<
DB10* D10 RAM_DATA_B<40> 15B6< 53D6< VDD
53D6< 12C6<> MEM_DQM<1> E2 DH19 DB9* F10 RAM_DQM_B<0> 15D4> 53D6< DA0 F1 RAM_DATA_A<48> 14A6<> 53D6<
53C6< 13A3<> 12D4< MUX_SEL_H E3 SEL DB11* B10 RAM_DATA_B<41> 15B6< 53D6<
DB10* D10 RAM_DATA_B<8> 15D6< 53D6< DA1 H1 RAM_DATA_A<49> 14A6<> 53D6<
DB12* A9 RAM_DATA_B<42> 15A6< 53D6<
53C6< 13A6<> 12D4< MUX_SEL_L E3 SEL DB11* B10 RAM_DATA_B<9> 15D6< 53D6< U29 DA2 K1 RAM_DATA_A<50> 14A6<> 53D6<
DB13* B7 RAM_DATA_B<43> 15A6< 53D6<
DB12* A9 RAM_DATA_B<10> 15C6< 53D6< CBTV4020 DA3 K3 RAM_DATA_A<51> 14A6<> 53D6<
DB14* A6 RAM_DATA_B<44> 15B4> 53D6< BGA
DB13* B7 RAM_DATA_B<11> 15C6< 53D6< NOSTUFF SYM_VER-3 DA4 K4 RAM_DATA_A<52> 14A4<> 53D6<
1 C670 1 C669 DB15* A4 RAM_DATA_B<45> 15B4> 53D6<
DB14* A6 RAM_DATA_B<12> 15D4> 53D6< 1 C671 DA5 K6 RAM_DATA_A<53> 14A4<> 53D6<
0.1UF 0.1UF 0.1UF DB16* A3 RAM_DATA_B<46> 15A4> 53D6<
DB15* A4 RAM_DATA_B<13> 15D4> 53D6< 20% 20% DA6 J7 RAM_DATA_A<54> 14A4<> 53D6<
10V 10V 20%
10V DB17* A1 RAM_DATA_B<47> 15A4> 53D6<
DB16* A3 RAM_DATA_B<14> 15C4> 53D6< 2 CERM 2 CERM 2 CERM DA7 K9 RAM_DATA_A<55> 14A4<> 53D6<
402 402 DB18* C1 RAM_DQS_B<5> 15B6< 15B8< 53D6<
DB17* A1 RAM_DATA_B<15> 15C4> 53D6< 402 DA8 J10 RAM_DQS_A<6> 14A6<> 14B8< 53D6<
DB19* E1 RAM_DQM_B<5> 15B4> 53D6<
DB18* C1 RAM_DQS_B<1> 15C8< 15D6< 53D6< DA9 G10 RAM_DQM_A<6> 14A4<> 53D6<
DB19* E1 RAM_DQM_B<1> 15D4> 53D6< GND DA10 E10 RAM_DATA_A<56> 14A6<> 53D6<
C5
C6
D2
D9
G2
G9
H5
H6
GND 53D6< 12B8<> MEM_DATA<48> F2 DH0 DA11 C10 RAM_DATA_A<57> 14A6<> 53D6<
E8
F3
F8
53D6< 12B8<> MEM_DATA<49> H2 DH1 DA12 A10 RAM_DATA_A<58> 14A6<> 53D6<
C5
C6
D2
D9
G2
G9
H5
H6
VDD DA0 F1 RAM_DATA_A<16> 14D6<> 53D6< 53D6< 12B8<> MEM_DATA<50> J2 DH2 DA13 A8 RAM_DATA_A<59> 14A6<> 53D6<
DA1 H1 RAM_DATA_A<17> 14C6<> 53D6< 53D6< 12B8<> MEM_DATA<51> J3 DH3 DA14 A7 RAM_DATA_A<60> 14A4<> 53D6<
U22 DA2 K1 RAM_DATA_A<18> 14C6<> 53D6< 53D6< 12B8<> MEM_DATA<52> J5 DH4 DA15 A5 RAM_DATA_A<61> 14A4<> 53D6<
CBTV4020 DA3 K3 RAM_DATA_A<19> 14C6<> 53D6< 53D6< 12B8<> MEM_DATA<53> J6 DH5 DA16 B4 RAM_DATA_A<62> 14A4<> 53D6<
BGA
SYM_VER-3 DA4 K4 RAM_DATA_A<20> 14D4<> 53D6< 53D6< 12B8<> MEM_DATA<54> J8 DH6 DA17 A2 RAM_DATA_A<63> 14A4<> 53D6<
DA5 K6 RAM_DATA_A<21> 14C4<> 53D6< 53D6< 12B8<> MEM_DATA<55> J9 DH7 DA18 B1 RAM_DQS_A<7> 14A6<> 14A8< 53D6<
DA6 J7 RAM_DATA_A<22> 14C4<> 53D6< 53D6< 12C6<> MEM_DQS<6> H9 DH8 DA19 D1 RAM_DQM_A<7> 14A4<> 53D6<
DA7 K9 RAM_DATA_A<23> 14C4<> 53D6< 53D6< 12C6<> MEM_DQM<6> F9 DH9
B DA8 J10
DA9 G10
RAM_DQS_A<2> 14C6<> 14C8< 53D6<
RAM_DQM_A<2> 14C4<> 53D6<
53D6< 12B8<> MEM_DATA<56>
53D6< 12B8<> MEM_DATA<57>
E9 DH10
C9 DH11
DB0* G1
DB1* J1
RAM_DATA_B<48> 15A6< 53D6<
RAM_DATA_B<49> 15A6< 53D6 14C6<> 53D6< 53D6< 12B8<> MEM_DATA<58> B9 DH12 DB2* K2 RAM_DATA_B<50> 15A6< 53D6<
53D6< 12C8<> MEM_DATA<16> F2 DH0 DA11 C10 RAM_DATA_A<25> 14C6<> 53D6< 53D6< 12B8<> MEM_DATA<59> B8 DH13 DB3* J4 RAM_DATA_B<51> 15A6< 53D6<
53D6< 12C8<> MEM_DATA<17> H2 DH1 DA12 A10 RAM_DATA_A<26> 14C6<> 53D6< 53D6< 12B8<> MEM_DATA<60> B6 DH14 DB4* K5 RAM_DATA_B<52> 15A4> 53D6<
53D6< 12C8<> MEM_DATA<18> J2 DH2 DA13 A8 RAM_DATA_A<27> 14C6<> 53D6< 53D6< 12B8<> MEM_DATA<61> B5 DH15 DB5* K7 RAM_DATA_B<53> 15A4> 53D6<
53D6< 12C8<> MEM_DATA<21> J6 DH5 DA16 B4 RAM_DATA_A<30> 14C4<> 53D6< 53D6< 12C6<> MEM_DQS<7> C2 DH18 DB8* H10 RAM_DQS_B<6> 15A6< 15B8< 53D6<
53D6< 12C8<> MEM_DATA<22> J8 DH6 DA17 A2 RAM_DATA_A<31> 14C4<> 53D6< 53D6< 12C6<> MEM_DQM<7> E2 DH19 DB9* F10 RAM_DQM_B<6> 15A4> 53D6<
53D6< 12C8<> MEM_DATA<23> J9 DH7 DA18 B1 RAM_DQS_A<3> 14C6<> 14C8< 53D6< DB10* D10 RAM_DATA_B<56> 15A6< 53D6<
53D6< 12C6<> MEM_DQS<2> H9 DH8 DA19 D1 RAM_DQM_A<3> 14C4<> 53D6< 53C6< 13C4<> 12D4< MUX_SEL_H E3 SEL DB11* B10 RAM_DATA_B<57> 15A6< 53D6<
53D6< 12C6<> MEM_DQM<2> F9 DH9 DB12* A9 RAM_DATA_B<58> 15A6< 53D6<
53D6< 12C8<> MEM_DATA<24> E9 DH10 DB0* G1 RAM_DATA_B<16> 15C6< 53D6< DB13* B7 RAM_DATA_B<59> 15A6< 53D6<
53D6< 12C8<> MEM_DATA<25> C9 DH11 DB1* J1 RAM_DATA_B<17> 15C6< 53D6< DB14* A6 RAM_DATA_B<60> 15A4> 53D6<
53D6< 12C8<> MEM_DATA<26> B9 DH12 DB2* K2 RAM_DATA_B<18> 15C6< 53D6< DB15* A4 RAM_DATA_B<61> 15A4> 53D6<
53D6< 12C8<> MEM_DATA<27> B8 DH13 DB3* J4 RAM_DATA_B<19> 15C6< 53D6< DB16* A3 RAM_DATA_B<62> 15A4> 53D6<
53D6< 12C8<> MEM_DATA<28> B6 DH14 DB4* K5 RAM_DATA_B<20> 15C4> 53D6< DB17* A1 RAM_DATA_B<63> 15A4> 53D6<
53D6< 12C8<> MEM_DATA<29> B5 DH15 DB5* K7 RAM_DATA_B<21> 15C4> 53D6< DB18* C1 RAM_DQS_B<7> 15A6< 15A8< 53D6<
53D6< 12C8<> MEM_DATA<30> B3 DH16 DB6* K8 RAM_DATA_B<22> 15C4> 53D6< DB19* E1 RAM_DQM_B<7> 15A4> 53D6<
53D6< 12C8<> MEM_DATA<31> B2 DH17 DB7* K10 RAM_DATA_B<23> 15C4> 53D6< GND
53D6< 12C6<> MEM_DQS<3> C2 DH18 DB8* H10 RAM_DQS_B<2> 15C6< 15C8< 53D6<
C5
C6
D2
D9
G2
G9
H5
H6
53D6< 12C6<> MEM_DQM<3> E2 DH19 DB9* F10 RAM_DQM_B<2> 15C4> 53D6<
DB10* D10 RAM_DATA_B<24> 15C6< 53D6<
53C6< 13C8<> 12D4< MUX_SEL_L E3 SEL DB11* B10
DB12* A9
RAM_DATA_B<25> 15C6< 53D6<
RAM_DATA_B<26> 15C6< 53D6< DDR MUXES
A DB13* B7
DB14* A6
RAM_DATA_B<27> 15C6< 53D6<
RAM_DATA_B<28> 15C4> 53D6< NOTICE OF PROPRIETARY PROPERTY
A
DB15* A4 RAM_DATA_B<29> 15C4> 53D6< LAST_MODIFIED=Wed Sep 17 12:15:54 2003
DB16* A3 RAM_DATA_B<30> 15C4> 53D6< PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
DB17* A1 RAM_DATA_B<31> 15C4> 53D6<
DB18* C1 RAM_DQS_B<3> 15B8< 15C6< 53D6<
DB19* E1 RAM_DQM_B<3> 15C4> 53D6<
GND
C5
C6
D2
D9
G2
G9
H5
H6
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 13 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
+2_5V_MAIN +2_5V_MAIN NC_SODIMM201
+2_5V_MAIN
MIN_LINE_WIDTH=20
NO_TEST
201
MIN_LINE_WIDTH=20
+2_5V_MAIN
1 2
VREF0 VREF1
1 3 4
C1401 VSS0 VSS1
0.1UF 53D6< 13D7<> RAM_DATA_A<0> 5 J26 6 RAM_DATA_A<4> 13D7<> 53D6< 1
20%
DQ0
AS0A42-D2R DQ4 C1402
2 10V 53D6< 13D7<> RAM_DATA_A<1> 7
DQ1 F-RT-SM DQ5
8 RAM_DATA_A<5> 13D7<> 53D6< C1602 1 0.1UF
CERM 20%
DISTRIBUTE THESE TWO CAPS 402 9
VDD0
10 0.1UF 10V
VDD1 20% 2 CERM
ALONG VREF TRACE 53D6< 14C8< 13D7<> RAM_DQS_A<0> 11
DQS0 DM0
12 RAM_DQM_A<0> 13D7<> 53D6< 10V
CERM 2 402
RAM_DATA_A<2> 13 14 RAM_DATA_A<6> 13D7<> 53D6< 402
LOCATE C1601 AND C1401 53D6< 13D7<> DQ2 DQ6
15D8< DIRECTLY ON PIN AT J26-1 15 16
VSS2 VSS3
12A7< DDR_VREF DDR_VREF 12A7< 14D8<> 15D8< 52A6>
14D2<> 53D6< 13D7<> RAM_DATA_A<3> 17
DQ3 DQ7
18 RAM_DATA_A<7> 13D7<> 53D6<
52A6>
1 53D6< 13C7<> RAM_DATA_A<8> 19
DQ8 DQ12
20 RAM_DATA_A<12> 13C7<> 53D6<
C1601
D
1 C46
0.1UF
20%
1 C47
0.1UF
20%
0.1UF
20%
10V 53D6< 13C7<> RAM_DATA_A<9>
21
23
VDD2
DQ9
VDD3
DQ13
22
24 RAM_DATA_A<13> 13C7<> 53D6<
LOCATE C1602 AND C1402 D
10V 10V 2 CERM DIRECTLY ON PIN AT J26-2
2 CERM 2 CERM 402 53D6< 14C8< 13C7<> RAM_DQS_A<1> 25
DQS1 DM1
26 RAM_DQM_A<1> 13C7<> 53D6<
402 402 27 28
VSS4 VSS5
NOSTUFF NOSTUFF RAM_DATA_A<10> 29 30
53D6< 13C7<> DQ10 DQ14 RAM_DATA_A<14> 13C7<> 53D6<
53D6< 13C7<> RAM_DATA_A<11> 31
DQ11 DQ15
32 RAM_DATA_A<15> 13C7<> 53D6<
33 34
VDD4
+2_5V_MAIN 53C6< 12C4< SYSCLK_DDRCLK_A0 35
VDD5
36 DDR DECOUPLING
CK0 VDD6
NOSTUFF
53C6< SYSCLK_DDRCLK_A0_L 37
CK0* VSS6
38 +2_5V_MAIN SLOT "A"
39 40
R1403 VSS7 VSS8
1 - 10UF
470 KEY
1 2 53D6< 13B5<> RAM_DATA_A<16> 41
DQ16 DQ20
42 RAM_DATA_A<20> 13B5<> 53D6< 24 - 0.1UF
5% 53D6< 13B5<> RAM_DATA_A<17> 43
DQ17 DQ21
44 RAM_DATA_A<21> 13B5<> 53D6<
1/16W
MF 45 46
RAM_DQS_A<0> 402 VDD7 VDD8
53D6< 14D6<> 13D7<>
NOSTUFF 53D6< 14C8< 13B5<> RAM_DQS_A<2> 47
DQS2 DM2
48 RAM_DQM_A<2> 13B5<> 53D6< 1 1 1
R1404 RAM_DATA_A<18> 49 50 RAM_DATA_A<22> 13B5<> 53D6< C244 C263 C320 1 C243 1 C255 1 C256 1 C1403 1 C1404
53D6< 13B5<> DQ18 DQ22 0.1UF 0.1UF 0.1UF
1
470 2 51 52 20% 20% 20% 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
VSS9 VSS10 20% 20% 20% 20% 20%
NOSTUFF 2 10V
CERM 2 10V
CERM
10V
2 CERM 10V 10V 10V 10V 10V
R1405 5% 53D6< 13B5<> RAM_DATA_A<19> 53
DQ19 DQ23
54 RAM_DATA_A<23> 13B5<> 53D6< 402 402 402
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
1/16W 402 402 402 402 402
470 MF 53D6< 13B5<> RAM_DATA_A<24> 55
DQ24 DQ28
56 RAM_DATA_A<28> 13B5<> 53D6<
1 2 402
57 58
5% VDD9 VDD10
1/16W 53D6< 13B5<> RAM_DATA_A<25> 59
DQ25 DQ29
60 RAM_DATA_A<29> 13B5<> 53D6<
MF 1 1 1 1 1 1 1 1
53D6< 14D6<> 13C7<> RAM_DQS_A<1> 402 NOSTUFF 53D6< 14C8< 13B5<> RAM_DQS_A<3> 61
DQS3 DM3
62 RAM_DQM_A<3> 13A5<> 53D6< C313 C242 C275 C276 C304 C261 C311 C1405
63 64 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
R1406 VSS11 VSS12 20%
10V
20%
10V
20%
10V
20%
10V
20%
10V
20%
10V
20%
10V
20%
10V
470 53D6< 13B5<> RAM_DATA_A<26> 65
DQ26 DQ30
66 RAM_DATA_A<30> 13B5<> 53D6< 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
1 2 402 402 402 402 402 402 402 402
NOSTUFF 53D6< 13B5<> RAM_DATA_A<27> 67
DQ27 DQ31
68 RAM_DATA_A<31> 13B5<> 53D6<
R1407 5%
1/16W 69
VDD11 VDD12
70
470 MF
1 2 402 NC_SODIMM71 NO_TEST 71
RFU0 RFU1
72 NO_TEST NC_SODIMM72
NC_SODIMM73 73 74 NC_SODIMM74
C 53D6< 14C6<> 13B5<> RAM_DQS_A<2>
5%
1/16W
MF
402 NOSTUFF
NO_TEST
75
RFU2
VSS13
RFU3
VSS14
76
NO_TEST
1 C1406
0.1UF
1 C1407
0.1UF
1 C1408
0.1UF
1 C1409
0.1UF
1 C1410
0.1UF
1 C1411
0.1UF
1 C1412
0.1UF
1 C1413
0.1UF
C
NC_SODIMM77 NO_TEST 77
RFU4 RFU5
78 NO_TEST NC_SODIMM78 20% 20% 20% 20% 20% 20% 20% 20%
R1408 NC_SODIMM79 NO_TEST 79
RFU6 RFU7
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
1
470 2 81 82 402 402 402 402 402 402 402 402
VDD13 VDD14
NOSTUFF NC_SODIMM83 83 84
R1409 5%
1/16W
NO_TEST
RFU8 RFU9
NO_TEST NC_SODIMM84
1
470 2
MF NC_SODIMM85 NO_TEST 85
RFU10 RFU11
402
87 88
5% VSS15 VSS16
1/16W NC_SODIMM89 NO_TEST 89
RFU12 VSS17
90 1 C1415 1 C1416 1 C1417 1 C1418 1 C1419 1 C1420 1 C1421
MF
53D6< 14C6<> 13B5<> RAM_DQS_A<3> 402 NC_SODIMM91 NO_TEST 91
RFU13 VDD15
92 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
NOSTUFF 93 94 20% 20% 20% 20% 20% 20% 20%
R1410 VDD16 VDD17 10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
470 53C6< 15C1< 12B1< RAM_CKE<1> 95
CKE1 CKE0
96 RAM_CKE<0> 12C1< 15C1< 53C6< 402 402 402 402 402 402 402
1 2
NOSTUFF NC_SODIMM97 NO_TEST 97
RFU14 RFU15
R1411 5%
1/16W 53D6< 15C4> 12D1< RAM_ADDR<12> 99
A12 A11
100 RAM_ADDR<11> 12B3< 15C4> 53D6<
470 MF
1 2 402 53D6< 15C6< 12C3< RAM_ADDR<9> 101
A9 A8
102 RAM_ADDR<8> 12D1< 15C4> 53D6< +2_5V_MAIN
5% 103 104
1/16W VSS18 VSS19
MF 53D6< 15C6< 12D3< RAM_ADDR<7> 105
A7 A6
106 RAM_ADDR<6> 12D1< 15C4> 53D6<
53D6< 14B6<> 13D4<> RAM_DQS_A<4> 402
NOSTUFF 53D6< 15C6< 12C1< RAM_ADDR<5> 107
A5 A4
108 RAM_ADDR<4> 12D3< 15C6< 53D6< 1
R1412 RAM_ADDR<3> 109 110 RAM_ADDR<2> C1414
53D6< 15C4> 12D3< A3 A2 12C3< 15C6< 53D6< 10UF
1
470 2 RAM_ADDR<1> 111 112 RAM_ADDR<0> N20P80%
53D6< 15B6< 12C3< A1 A0 12C3< 15B6< 53D6< 10V
NOSTUFF 113 114 2 Y5V
R1413 5%
1/16W VDD18 VDD19 805
470 MF 53D6< 15B4> 12C3< RAM_ADDR<10> 115
A10_AP BA1
116 RAM_BA<1> 12B3< 15B6< 53D6<
1 2 402
53D6< 15B6< 12B3< RAM_BA<0> 117
BA0 RAS*
118 RAM_RAS_L 12A2< 15B4> 53C6<
5%
1/16W 53C6< 15B6< 12B3< RAM_WE_L 119
WE* CAS*
120 RAM_CAS_L 12A2< 15B6< 53C6<
MF
53D6< 14A6<> 13C4<> RAM_DQS_A<5> 402 NOSTUFF 53C6< 12C1< RAM_CS_L<0> 121
S0* S1*
122 RAM_CS_L<1> 12C1< 53C6<
R1414 NC_SODIMM123 NO_TEST 123
RFU16 RFU17
470 125 126
VSS20
B NOSTUFF
R1415
1
5%
2
53D6< 13D4<> RAM_DATA_A<32> 127
DQ32
VSS21
DQ36
128 RAM_DATA_A<36> 13D4<> 53D6 RAM_DATA_A<33> 129
DQ33 DQ37
130 RAM_DATA_A<37> 13D4<> 53D6<
470 MF
131 132
1
5%
2 402
53D6< 14B8< 13D4<> RAM_DQS_A<4> 133
VDD20 VDD21
134 RAM_DQM_A<4> 13D4<> 53D6<
+2_5V_MAIN
1/16W DQS4 DM4
MF 53D6< 13D4<> RAM_DATA_A<34> 135
DQ34 DQ38
136 RAM_DATA_A<38> 13D4<> 53D6<
53D6< 14A6<> 13B2<> RAM_DQS_A<6> 402
137 138
NOSTUFF VSS22 VSS23
R1416 53D6< 13D4<> RAM_DATA_A<35> 139
DQ35 DQ39
140 RAM_DATA_A<39> 13D4<> 53D6< 1
R1401
470 RAM_DATA_A<40> 141 142
1 2 53D6< 13D4<> DQ40 DQ44 RAM_DATA_A<44> 13C4<> 53D6< 100
NOSTUFF 143 144 1%
R1417 5%
1/16W VDD22 VDD23 1/16W
MF
1
470 2
MF 53D6< 13C4<> RAM_DATA_A<41> 145
DQ41 DQ45
146 RAM_DATA_A<45> 13C4<> 53D6< 2 402
402
53D6< 14B8< 13C4<> RAM_DQS_A<5> 147
DQS5 DM5
148 RAM_DQM_A<5> 13C4<> 53D6< MIN_LINE_WIDTH=25
5%
149 150
INT_MEM_VREF 12A8<>
1/16W VSS24
MF VSS25
53D6< 14A6<> 13B2<> RAM_DQS_A<7> 402 53D6< 13C4<> RAM_DATA_A<42> 151
DQ42 DQ46
152 RAM_DATA_A<46> 13C4<> 53D6< LOCATE THESE RESISTORS BETWEEN DIMMS
NOSTUFF RAM_DATA_A<43> 153 154 1
R1418 53D6< 13C4<> DQ43 DQ47 RAM_DATA_A<47> 13C4<> 53D6< R1402
470 155 156 100
1 2 VDD24 VDD25
157 158 1%
VDD26 CK1* SYSCLK_DDRCLK_A1_L 12B4< 53C6< 1/16W
5% MF
1/16W 159 160 SYSCLK_DDRCLK_A1 12C4< 53C6<
MF VSS26 CK1 2 402
402 161 162
VSS27 VSS28
53D6< 13C2<> RAM_DATA_A<48> 163
DQ48 DQ52
164 RAM_DATA_A<52> 13C2<> 53D6<
53D6< 13C2<> RAM_DATA_A<49> 165
DQ49 DQ53
166 RAM_DATA_A<53> 13C2<> 53D6<
167 168
+3V_MAIN 53D6< 14B8< 13B2<> RAM_DQS_A<6> 169
VDD27
DQS6
VDD28
DM6
170 RAM_DQM_A<6> 13B2<> 53D6<
53D6< 13C2<> RAM_DATA_A<50> 171
DQ50 DQ54
172 RAM_DATA_A<54> 13B2<> 53D6<
173 174
VSS29
1 C319
53D6< 13C2<> RAM_DATA_A<51>
RAM_DATA_A<56>
175
177
DQ51
VSS30
DQ55
176
178
RAM_DATA_A<55>
RAM_DATA_A<60>
13B2<> 53D6< SO-DIMM SLOT A
A 10UF
N20P80%
10V
2 Y5V
53D6< 13B2<>
179
DQ56
VDD29
DQ60
VDD30
180
13B2<> 53D6<

A
805 53D6< 13B2<> RAM_DATA_A<57> 181
DQ57 DQ61
182 RAM_DATA_A<61> 13B2<> 53D6<
RAM_DQS_A<7> 183 184 RAM_DQM_A<7> 13B2<> 53D6< LAST_MODIFIED=Wed Sep 17 12:15:56 2003
53D6< 14A8< 13B2<> DQS7 DM7 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
185 186 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
1 C929 VSS31 VSS32 AGREES TO THE FOLLOWING
0.1UF 53D6< 13B2<> RAM_DATA_A<58> 187
DQ58 DQ62
188 RAM_DATA_A<62> 13B2<> 53D6 RAM_DATA_A<59> 189
DQ59 DQ63
190 RAM_DATA_A<63> 13B2<> 53D6< II NOT TO REPRODUCE OR COPY IT
CERM
402 191 192 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
VDD31 VDD32
34B3< 15A6< INT_I2C_DATA0 193
SDA SA0
194
34B3< 15A6< INT_I2C_CLK0 195
SCL SA1
196 ADDR=0 (0xA0)
197
VDDSPD SA2
198 D 051-6497 13
NC_SODIMM199 NO_TEST 199
RFU18
200 NO_TEST NC_SODIMM200 APPLE COMPUTER INC.
RFU19 SCALE SHT OF
(516S0029)
NC_SODIMM202 NO_TEST 202 NONE 14 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
DDR DECOUPLING
+2_5V_MAIN SLOT "B" 1 - 10UF
24 - 0.1UF
1 C1512
LOCATE C1702 AND C1501 10UF
DIRECTLY ON PIN J11-1
1 C1501 +2_5V_MAIN J11
TH-DDR-DIMM-71243 +2_5V_MAIN
N20P80%
10V
2 Y5V
0.1UF MIN_LINE_WIDTH=20 1 1 1
20%
10V 1 FRONT SIDE SYM_VER3 REAR SIDE
93 C562 C726 C936 1 C864 1 C922 1 C624 1 C1502 1 C1513 805
2 CERM VREF SX64 DIMM VSS 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
DISTRIBUTE THESE THREE CAPS 402 53D6< 13C7<> RAM_DATA_B<0> 2
DQ0 DQ4
94 RAM_DATA_B<4> 13C7<> 53D6< 20%
10V
20%
10V
20%
10V 20% 20% 20% 20% 20%
ALONG VREF TRACE 3 95 RAM_DATA_B<5> 13C7<> 53D6< 2 CERM 2 CERM 2 CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
VSS DQ5 402 402 402 402 402 402 402 402
53D6< 13C7<> RAM_DATA_B<1> 4
DQ1 VDDQ
96
DDR_VREF
D
52A6> 53D6< 15C8< 13C7<> RAM_DQS_B<0>
53D6< 13C7<> RAM_DATA_B<2>
5
6
DQS0
DQ2
DM0/DQS9
DQ6
97
98
RAM_DQM_B<0> 13C7<> 53D6<
RAM_DATA_B<6> 13C7<> 53D6< D
1 C1702
1 C48 1 C49 1 C50 0.1UF
7
VDD DQ7
99 RAM_DATA_B<7> 13C7<> 53D6< 1 C819 1 C925 1 C741 1 C914 1 C593 1 C602 1 C672 1 C1503
0.1UF 0.1UF 0.1UF 20% 53D6< 13C7<> RAM_DATA_B<3> 8 100 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% DQ3 VSS 20% 20% 20% 20% 20% 20% 20% 20%
10V
2 10V 2 10V 2 10V 2 CERM NC_BIGDIMM9 NO_TEST 9 101 NO_TEST NC_BIGDIMM101 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
CERM CERM CERM 402 NC NC
402 402 402 402 402 402 402 402 402 402 402
NC_BIGDIMM10 NO_TEST 10
NC NC
102 NO_TEST NC_BIGDIMM102
NOSTUFF NOSTUFF NOSTUFF 11
VSS A13
53D6< 13C7<> RAM_DATA_B<8> 12
DQ8 VDDQ
104
53D6< 13C7<> RAM_DATA_B<9> 13

DQ9 DQ12
105 RAM_DATA_B<12> 13C7<> 53D6<
+2_5V_MAIN 53D6< 15C8< 13B7<> RAM_DQS_B<1> 14
DQS1 DQ13
106 RAM_DATA_B<13> 13B7<> 53D6< 1 C1504
0.1UF
1 C1505
0.1UF
1 C1506
0.1UF
1 C1507
0.1UF
1 C1508
0.1UF
1 C1509
0.1UF
1 C1510
0.1UF
1 C1511
0.1UF
15
VDDQ DM1/DQS10
107 RAM_DQM_B<1> 13B7<> 53D6< 20% 20% 20% 20% 20% 20% 20% 20%
NOSTUFF 53B6< 12A4< SYSCLK_DDRCLK_B1 16 108 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
R1503 53B6< SYSCLK_DDRCLK_B1_L 17
CK1 VDD
109 RAM_DATA_B<14> 13B7<> 53D6< 402 402 402 402 402 402 402 402
1
470 2
CK1* DQ14
18
VSS DQ15
110 RAM_DATA_B<15> 13B7<> 53D6<
5% RAM_DATA_B<10> 19 111 RAM_CKE<3> 12B1< 15A1< 53C6<
1/16W 53D6< 13C7<> DQ10 CKE1
MF RAM_DATA_B<11> 20 112
53D6< 15D6< 13C7<> RAM_DQS_B<0> 402 53D6< 13C7<> DQ11 VDDQ
NOSTUFF 53C6< 15B1< 12C1< RAM_CKE<2> 21 113 NO_TEST NC_BIGDIMM113 1 1
R1504 CKE0 BA2 C1514 C1515
470
22
VDDQ DQ20
114 RAM_DATA_B<20> 13A5<> 53D6< 0.1UF 0.1UF
1 2 RAM_DATA_B<16> 23 115 RAM_ADDR<12> 12D1< 14B6<> 53D6< 20% 20%
53D6< 13A5<>
NOSTUFF DQ16 A12 2 10V
CERM
10V
2 CERM
R1505 5%
1/16W 53D6< 13A5<> RAM_DATA_B<17> 24
DQ17 VSS
116 402 402
470 MF 53D6< 15C8< 13A5<> RAM_DQS_B<2> 25 117 RAM_DATA_B<21> 13A5<> 53D6<
1
5%
2 402
26
DQS2
VSS
DQ21
A11
118 RAM_ADDR<11> 12B3< 14B4<> 53D6< +2_5V_MAIN
1/16W
MF 53D6< 14B6<> 12C3< RAM_ADDR<9> 27
A9 DM2/DQS11
119 RAM_DQM_B<2> 13A5<> 53D6<
53D6< 15D6< 13B7<> RAM_DQS_B<1> 402 NOSTUFF 53D6< 13A5<> RAM_DATA_B<18> 28 120
DQ18 VDD NOSTUFF
R1506 53D6< 14B6<> 12D3< RAM_ADDR<7> 29 121 RAM_DATA_B<22> 13A5<> 53D6< NOSTUFF
470 30
A7 DQ22
122 RAM_ADDR<8> 12D1< 14B4<> 53D6< 1
R497
1 C55
1 2 VDDQ A8 0.1UF
NOSTUFF 53D6< 13A5<> RAM_DATA_B<19> 31 123 RAM_DATA_B<23> 13A5<> 53D6< 10K 20%
10V
R1507 5% DQ19 DQ23 1% 2 CERM
C
C 1
470 2
1/16W
MF
402
53D6< 14B6<> 12C1< RAM_ADDR<5>
53D6< 13A5<> RAM_DATA_B<24>
32
33
A5 VSS
124
125 RAM_ADDR<6> 12D1< 14B4<> 53D6<
1/16W
MF
2 402
402
DQ24 A6
5% 34 126 RAM_DATA_B<28> 13A5<> 53D6<
1/16W VSS DQ28
MF
53D6< 15C6< 13A5<> RAM_DQS_B<2> 402 NOSTUFF 53D6< 13A5<> RAM_DATA_B<25> 35
DQ25 DQ29
127 RAM_DATA_B<29> 13A5<> 53D6< RAM_CKE<0> 12C1< 14B4<>
53C6<
53D6< 15B8< 13A5<> RAM_DQS_B<3> 36 128
R1508 53D6< 14B4<> 12D3< RAM_ADDR<4> 37
DQS3 VDDQ
129 RAM_DQM_B<3> 13A5<> 53D6<
+2_5V_MAIN NOSTUFF
470 A4 DM3/DQS12 3
CKE_HYNIX
NOSTUFF 1 2 38
VDD A3
130 RAM_ADDR<3> 12D3< 14B6<> 53D6< 1
R471
D
Q42 10K TO SO-DIMM
R1509 5%
1/16W 53D6< 13A5<> RAM_DATA_B<26> 39
DQ26 DQ30
131 RAM_DATA_B<30> 13A5<> 53D6< CKE_HYNIX 2N7002 1%
470 MF RAM_DATA_B<27> 40 132 CKE_HYNIX 1
1 2 402 53D6< 13A5<> DQ27 VSS NOSTUFF 1 C51 R405 1 G S
SM 1/16W
MF
5% 53D6< 14B4<> 12C3< RAM_ADDR<2> 41
A2 DQ31
133 RAM_DATA_B<31> 13A5<> 53D6< R5121 0.1UF 5%
4.7K 2 402
1/16W
MF
42
VSS NC
134 NO_TEST NC_BIGDIMM134 1K 20% 1/16W 2 RAM_CKE<1> 12B1< 14B6<>
1% 10V
53D6< 15C6< 13A5<> RAM_DQS_B<3> 402
53D6< 14B6<> 12C3< RAM_ADDR<1> 43 135 NO_TEST NC_BIGDIMM135 1/16W
2 CERM MF 53C6<
NOSTUFF A1 NC MF 402 2 402
3
R1510 NC_BIGDIMM44 NO_TEST 44
NC VDDQ
136 402 2 CKE_HYNIX
470 NC_BIGDIMM45 NO_TEST 45 137 SYSCLK_DDRCLK_B0 12B4< 53B6< D
Q54
NOSTUFF 1 2 NC CK0
46 138 SYSCLK_DDRCLK_B0_L 12B4< 53B6< 2N7002
R1511 5%
1/16W NC_BIGDIMM47 NO_TEST 47
VDD CKO*
139 1 G S
SM
1
470 2
MF NC VSS
402 RAM_ADDR<0> 48 140 NO_TEST NC_BIGDIMM140 3
53D6< 14B4<> 12C3< A0 NC CKE_HYNIX 2
5%
1/16W
NC A10
141 RAM_ADDR<10> 12C3< 14B6<> 53D6< D
Q41
53D6< 15B6< 13C4<> RAM_DQS_B<4>
MF
402 NOSTUFF
50
VSS NC
142 NO_TEST NC_BIGDIMM142 R508 2N7002
0 SM
R1512
NC VDDQ
143
NC_BIGDIMM144
44C2<> 34C3< INT_PU_RESET_L 1 2 15_I286 1 G S +2_5V_MAIN
470 53D6< 14B4<> 12B3< RAM_BA<1> 52
BA1 NC
144 NO_TEST 5%
1 2 1/16W 2
MF
NOSTUFF 53D6< 13C4<> RAM_DATA_B<32> 53 145 402
R1513 5%
1/16W 54
DQ32 VSS
146 RAM_DATA_B<36> 13C4<> 53D6< CKE_HYNIX
NOSTUFF
NOSTUFF
470 MF VDDQ DQ36
1 2 1 C58
15_I282
402
53D6< 13C4<> RAM_DATA_B<33> 55
DQ33 DQ37
147 RAM_DATA_B<37> 13C4<> 53D6<
1
5%
53D6< 15B8< 13C4<> RAM_DQS_B<4> 56 148 R507 0.1UF
1/16W DQS4 VDD 20%
MF RAM_DATA_B<34> 57 149 RAM_DQM_B<4> 13C4<> 53D6< 10K 10V
2 CERM
RAM_DQS_B<5> NOSTUFF 53D6< 13C4<> DQ34 DM4/DQS13 1%
B 53D6< 15B6< 13B4<> 402
R1514
58
VSS DQ38
150 RAM_DATA_B<38> 13C4<> 53D6< 1/16W
MF
2 402
402
B
470 53D6< 14B6<> 12B3< RAM_BA<0> 59
BA0 DQ39
151 RAM_DATA_B<39> 13C4<> 53D6<
NOSTUFF 1 2
53D6< 13C4<> RAM_DATA_B<35> 60
DQ35 VSS
152
RAM_CKE<2> 12C1< 15C6<
R1515 5%
1/16W 53D6< 13C4<> RAM_DATA_B<40> 61
DQ40 DQ44
153 RAM_DATA_B<44> 13C4<> 53D6< 53C6<
470 MF 62 154 RAM_RAS_L 12A2< 14B4<> 53C6<
1 2 402 VDDQ RAS* 3
53C6< 14B6<> 12B3< RAM_WE_L 63 155 RAM_DATA_B<45> 13C4<> 53D6< CKE_HYNIX NOSTUFF
5% WE* DQ45
1/16W
MF 53D6< 13C4<> RAM_DATA_B<41> 64
DQ41 VDDQ
156 D Q52 1
R495
RAM_DQS_B<6> 402 NOSTUFF 2N7002 10K
53D6< 15A6< 13B2<> 53C6< 14B4<> 12A2< RAM_CAS_L 65
CAS* S0*
157 RAM_CS_L<2> 12B1< 53C6< 1 SM 1% TO BIG DIMM
G S
R1516 66
VSS S1*
158 RAM_CS_L<3> 12B1< 53C6< 1/16W
MF
1
470 2 53D6< 15B8< 13B4<> RAM_DQS_B<5> 67 159 RAM_DQM_B<5> 13B4<> 53D6< 2 2 402
DQS5 DM5/DQS14
NOSTUFF 53D6< 13C4<> RAM_DATA_B<42> 68 160
R1517 5%
1/16W
53D6< 13C4<> RAM_DATA_B<43> 69
DQ42 VSS
161 RAM_DATA_B<46> 13B4<> 53D6< RAM_CKE<3> 12B1< 15C4>
1
470 2
MF DQ43 DQ46 53C6<
402 70 162 RAM_DATA_B<47> 13B4<> 53D6<
VDD DQ47
5%
1/16W
NC,S2* NC,S3*
163 NO_TEST NC_BIGDIMM163 3
CKE_HYNIX
MF RAM_DATA_B<48> 72 164
53D6< 15A6< 13A2<> RAM_DQS_B<7> 402
NOSTUFF
53D6< 13B2<> DQ48 VDDQ D Q53
53D6< 13B2<> RAM_DATA_B<49> 73 165 RAM_DATA_B<52> 13B2<> 53D6< 2N7002
R1518 74
DQ49 DQ52
166 RAM_DATA_B<53> 13B2<> 53D6< 1 G S
SM
+2_5V_MAIN 1
470 2
53B6< SYSCLK_DDRCLK_B2_L 75
VSS
CK2* NC,FETEN
DQ53
5% 2
1/16W 53B6< 12A4< SYSCLK_DDRCLK_B2 76
CK2 VDD
168
MF
402
77
VDDQ DM6/DQS15
169 RAM_DQM_B<6> 13B2<> 53D6<
1
R809 53D6< 15B8< 13B2<> RAM_DQS_B<6> 78
DQS6 DQ54
170 RAM_DATA_B<54> 13B2<> 53D6<
1K
1%
53D6< 13B2<> RAM_DATA_B<50> 79
DQ50 DQ55
171 RAM_DATA_B<55> 13B2<>
53D6<
+3V_MAIN
1/16W 53D6< 13B2<> RAM_DATA_B<51> 80
DQ51 VDDQ
172
MF
2 402
81
VSS NC
M_VDDID
RAM_DATA_B<56>
82
83
VDDID DQ60
174
175
RAM_DATA_B<60>
RAM_DATA_B<61>
13A2<> 53D6<
13A2<> 53D6<
BIG DIMM SLOT B
A 53D6< 13B2<>
53D6< 13A2<> RAM_DATA_B<57> 84
DQ56
DQ57 VSS
DQ61
176
1 1 NOTICE OF PROPRIETARY PROPERTY
A
1 85 177 RAM_DQM_B<7> 13A2<> 53D6< R825 C943 1 C945
R796 VDD DM7/DQS16 1K 0.1UF LAST_MODIFIED=Wed Sep 17 12:15:58 2003
1K 53D6< 15A8< 13A2<> RAM_DQS_B<7> 86 178 RAM_DATA_B<62> 13A2<> 53D6< 1% 20% 10UF THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1% DQS7 DQ62 1/16W 10V N20P80%
10V PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
1/16W 53D6< 13A2<> RAM_DATA_B<58> 87
DQ58 DQ63
179 RAM_DATA_B<63> 13A2<> 53D6< MF 2 CERM 2 Y5V AGREES TO THE FOLLOWING
MF 402
53D6< 13A2<> RAM_DATA_B<59> 88 180 2 402 805
2 402 DQ59 VDDQ I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
89
VSS SA0
181 RAM_SA0 II NOT TO REPRODUCE OR COPY IT
M_SPD_WP 90
WP SA1
182
ADDR = 1 (0XA2)
34B3< 14A6<> INT_I2C_DATA0 91
SDA SA2
183
34B3< 14A6<> INT_I2C_CLK0 92
SCL VVDDSPD
184
D 051-6497 13
(516-1001) APPLE COMPUTER INC.
SCALE SHT OF
DDR SDRAM SLOT B NONE 15 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
R223
10K 2
54C7< 17B8< 16A4<> AGP_AD_STB_L<0> 1
INTREPID AGP CLK IS 1.5V OUT 1%
1/16W
+1_5V_INTREPID_PLL MF
NEED 3.3V SWING FOR VIDEO CHIPS 52D3> 30D5< 28D6<> 9D4< R667 402 R234
AGP PULL-UPS/PULL DOWNS
D VERSION 1 WORKAROUND IS LA CLOCK 1
4.7 2
+1_5V_INTREPID_PLL5 52D3> 54C7< 17B8< 16A4<> AGP_AD_STB_L<1> 1
10K 2
D
5% 1%
VERSION 2 WORKAROUND IS UNUSED PIN 1
1/16W
1
1/16W
C760 MF
402
C1801 R221 MF
402
0.1UF
20%
0.1UF
20% +3V_MAIN 54B7< 17A8< 16A4<> AGP_SB_STB_L 1
10K 2
52C3> 46B4<> 17D5< 17A4< 17A3< 16C2< 16A8< 11A6< 10D6< +1_5V_AGP 10V
CERM 2
10V
CERM 2 1%
59C8> 402 402 R222 1/16W
MF NOSTUFF
10K 2 402
1
R619 INT_PLL5_GND 16A5<> 54B7< 17A8> 16D1< 16C6<> AGP_BUSY_L 1
R161
54A7< 30C5<> 30A7< INT_ROM_OVERLAY_PU 60.4 V14
1% AGP_BUSY_L 1
10K 2
1% 1/16W 54B7< 17A8> 16D3< 16C6<>
1/16W VDD15A_5 MF
INT_V2 MF 402 1%
(PLL5) R217 1/16W
R225 2 402 10K 2 MF
22 2 54B7< 17A8< 16C6<> STOP_AGP_L 1 402
54A7< 17C7< CLK66M_GPU_AGP 1 U25
54B7< 17A8< 16D3< STOP_AGP_L AN19
STP_AGP INTREPID AGPREQ AT33 AGP_REQ_L 16C3< 17B7<> 54B7< 1%
5% 1/16W
1/16W INT_AGPPVT AJ24
AGPPVT BGA AGPGNT AM29 AGP_GNT_L 16C3< 17B7< 54B7< MF
MF INT_V1 (3 OF 9) 402
402
R226 52C3> 16A7< INT_AGP_VREF AB20
AGPVREF0
THESE RESISTORS SEE_TABLE AGPAD0 AR19 AGP_AD<0> 17D8< 54C7<
0 2 AB21 AGPVREF1
SHARE THE SAME PAD 1 INT_ANALYZER_CLK 8A2< 9B4< 54A7< 56B3> (ON PAGE 12) AGPAD1 AM19 AGP_AD<1> 17D8< 54C7<
59A8>
5% AGPAD2 AT20 AGP_AD<2> 17D8< 54C7<
1/16W
R224 MF 54B7< 17A8> 16D3< 16D1< AGP_BUSY_L AT19
AGP_BUSY AGPAD3 AR20 AGP_AD<3> 17D8< 54C7< 52C3> 46B4<> 17D5< 17A4< 17A3< 16D7< 16A8< 11A6< 10D6< +1_5V_AGP
22 2 402 59C8>
1 54A7< CLK66M_GPU_UF AK28
AGP_CLK AGPAD4 AT21 AGP_AD<4> 17D8< 54C7<
5% 54A7< INT_AGP_FB_IN AK27
AGP_FB_IN AGPAD5 AN20 AGP_AD<5> 17D8< 54C7<
1/16W
MF 54A7< INT_AGP_FB_OUT AK25
AGP_FB_OUT AGPAD6 AR21 AGP_AD<6> 17D8< 54C7< RP37
402
AGPAD7 AN21 AGP_AD<7> 17D8< 54C7< 10K
NOSTUFF 54B7< 17B7<> 16C4<> AGP_REQ_L 4 5
AGPAD8 AM21 AGP_AD<8> 17D8< 54C7< RP99
5%
AGPAD9 AT22 AGP_AD<9> 17D8< 54C7< 1/16W RP37 10K
2" LONGER AGP 2" SHORTER AGPAD10 AR22 AGP_AD<10> 17D8< 54C7< SM1 10K 54B7< 17A8< 16B4<> AGP_SBA<5> 1 8
(0.5NS SLOWER) (ZERO DELAY) (0.5NS FASTER) 54B7< 17B7< 16C4<> AGP_GNT_L 2 7 5%
AGPAD11 AN22 AGP_AD<11> 17D8< 54C7< 1/16W RP99
5% SM1 10K
AGP_FBI_EQUAL 54A7< AGPAD12 AM22 AGP_AD<12> 17D8< 54C7< 1/16W
RP37 AGP_SBA<1> 2 7
C NOSTUFF NOSTUFF AGP
INTERFACES
AGPAD13 AN23
AR23
AGP_AD<13> 17D8< 54C7<
AGP_AD<14> 17D8< 54C7< 54C7< 17B8< 16B4<> AGP_FRAME_L 3
10K 6
SM1 54B7< 17A8< 16B4<>
5%
C
R203 R215 AGPAD14 RP99 1/16W
10K SM1
0 2 0 2 AGPAD15 AT24 AGP_AD<15> 17C8< 54C7< 5%
1 1 1/16W
RP98 54B7< 17A8< 16B4<> AGP_SBA<4> 3 6
AGPAD16 AM23 AGP_AD<16> 17C8< 54C7< SM1
10K
5% 5% VOUT = AGPIO (1.5V) AR24 AGP_AD<17> 17C8< 54C7< AGP_DEVSEL_L 2 7 5%
AGP_FB_PLUS2
1/16W
MF
1/16W
MF VIN = VCORE (1.5V) AGPAD17 54C7< 17B8< 16B4<> 1/16W RP99
SM1 10K
402 402 NOSTUFF AGPAD18 AT25 AGP_AD<18> 17C8< 54C7< 5%
NOSTUFF 1/16W 54B7< 17A8< 16B4< AGP_SBA<0> 4 5
1
1
R220
1
R622 AGPAD19 AR25 AGP_AD<19> 17C8< 54C7< RP98 SM1
R211 10K 5%
0 0 AGPAD20 AM24 AGP_AD<20> 17C8< 54C7< RP49 1/16W
0 5% 5% 54C7< 17B8< 16B4<> AGP_IRDY_L 3 6
10K SM1
5% 1/16W 1/16W AGPAD21 AN25 AGP_AD<21> 17C8< 54C7<
1/16W MF MF 5% 54B7< 17A8< 16B4<> AGP_SBA<3> 1 8
MF 2 402 2 402 AGPAD22 AL24 AGP_AD<22> 17C8< 54C7< 1/16W
RP98
NOSTUFF 2 402 NOSTUFF SM1 5%
AGPAD23 AR26 AGP_AD<23> 17C8< 54C7< 10K 1/16W
54A7< R204 R216 AGPAD24 AT26 AGP_AD<24> 17C8< 54C7< 54C7< 17B8< 16B4<> AGP_TRDY_L 4 5 SM1 RP49
0 2 0 2 10K
1 1 AGPAD25 AM25 AGP_AD<25> 17C8< 54C7< 5%
1/16W 54B7< 17A8< 16A4<> AGP_SBA<7> 2 7
5% 5% AGPAD26 AN26 AGP_AD<26> 17C8< 54C7< RP98 SM1 5%
1/16W 1/16W 10K RP49 1/16W
MF MF AGPAD27 AM26 AGP_AD<27> 17C8< 54C7< 54C7< 17B8< 16B4<> AGP_STOP_L 1 8
10K SM1
402 402
AGPAD28 AR27 AGP_AD<28> 17C8< 54C7< 5% 54B7< 17B6< 16A4<> AGP_ST<1> 3 6
1/16W
AGPAD29 AT27 AGP_AD<29> 17C8< 54C7< SM1 RP37 5%
AGP_FBO_EQUAL 54A7< AR28 AGP_AD<30> 17C8< 54C7< 10K 1/16W RP49
AGPAD30 54B7< 17B8< 16A4<> AGP_RBF_L 1 8 SM1 10K
PLACE ALL SERPENTINES ON INTERNAL LAYER AGPAD31 AN27 AGP_AD<31> 17C8< 54C7< 5% 54B7< 17B6< 16A4<> AGP_ST<2> 4 5
1/16W
AM20 AGP_CBE<0> RP48 SM1 5%
AGPCBE_0 17C8< 54C7< 10K RP50 1/16W
10K SM1
AGPCBE_1 AT23 AGP_CBE<1> 17C8< 54C7< NC_RP1PIN4 NO_TEST 1 8
54B7< 17A8< 16B4<> AGP_SBA<2> 1 8
AGPCBE_2 AN24 AGP_CBE<2> 17C8< 54C7< 5%
1/16W 5%
AGPCBE_3 AL25 AGP_CBE<3> 17C8< 54C7< SM1 RP48 1/16W
10K SM1 RP50
AGPPAR AT29 AGP_PAR 17B8< 54B7< 54B7< 17B8< 16A4<> AGP_PIPE_L 2 7
10K
54B7< 17A8< 16A4<> AGP_SBA<6> 2 7
AGPFRAME AN28 AGP_FRAME_L 16C3< 17B8< 54C7< 5%
1/16W
R580 5%
B AGPTRDY
AGPIRDY
AR29
AT28
AGP_TRDY_L 16B3< 17B8< 54C7<
AGP_IRDY_L 16C3< 17B8< 54C7< 54C7< 17B8< 16A4<> AGP_AD_STB<0> 1
10K 2
SM1 RP50
10K
1/16W
SM1 B
54B7< 17B8< 16A6<> AGP_WBF_L 3 6
AGPSTOP AM28 AGP_STOP_L 16B3< 17B8< 54C7< 1%
1/16W 5%
AGPDEVSEL AM27 AGP_DEVSEL_L 16C3< 17B8< 54C7< MF R587 1/16W RP50
402
10K 2 SM1 10K
AGP_SBA0 AT32 AGP_SBA<0> 16C1< 17A8< 54B7< 54C7< 17B8< 16A4<> AGP_AD_STB<1> 1
54B7< 17B6< 16A4<> AGP_ST<0> 4 5
AR32 AGP_SBA<1> 16C1< 17A8< 54B7< 1%
AGP_SBA1 1/16W 5%
MF 1/16W
AGP_SBA2 AM31 AGP_SBA<2> 16B1< 17A8< 54B7< R233 402 SM1
AGP_SBA3 AN31 AGP_SBA<3> 16C1< 17A8< 54B7< 10K 2
54B7< 17B8< 16A4<> AGP_SB_STB 1
AGP_SBA4 AR31 AGP_SBA<4> 16C1< 17A8< 54B7<
1%
AGP_SBA5 AT31 AGP_SBA<5> 16C1< 17A8< 54B7< 1/16W
MF
AGP_SBA6 AM30 AGP_SBA<6> 16B1< 17A8< 54B7< 402
AGP_SBA7 AN30 AGP_SBA<7> 16B1< 17A8< 54B7<
AGP_SB_STB_P AH25 AGP_SB_STB 16B3< 17B8< 54B7<
AGP_SB_STB_N AG25 AGP_SB_STB_L 16D1< 17A8< 54B7<
GPU AGP I/O REFERENCE AGP_ST0 AN29 AGP_ST<0> 16B1< 17B6< 54B7<
(PLACE CLOSE TO GPU AGP BALLS) AGP_ST1 AT30 AGP_ST<1> 16B1< 17B6< 54B7<
59C8> 52C3> 46B4<> AGP_ST2 AR30 AGP_ST<2> 16B1< 17B6< 54B7<
16D7< 16C2< 11A6< 10D6< +1_5V_AGP C603
17D5< 17A4< 17A3< 470PF AGP_AD_STB0_P AK20 AGP_AD_STB<0> 16B3< 17B8< 54C7<
1 2 GPU_AGP_VREF_H AGP_AD_STB0_N AK19 AGP_AD_STB_L<0> 16D1< 17B8< 54C7<
R5491 10% R545 54B7< 17B8< 16B1< AGP_WBF_L AK30
AGP_WBF AGP_AD_STB1_P AK21 AGP_AD_STB<1> 16B3< 17B8< 54C7<
1
4.99K 50V 82.5 AGP_AD_STB1_N AK22 AGP_AD_STB_L<1> 16D1< 17B8< 54C7<
1% CERM 1%
1/16W AGPPIPE AJ29 AGP_PIPE_L 16B3< 17B8< 54B7<
1/16W
MF 2
402
MF
2 402 VSSA_5
AGPRBF AK24 AGP_RBF_L 16B3< 17B8< 54B7< INTREPID AGP
A 402 (PLL5)
V13
A
INT_AGP_VREF 16C6<> 52C3>
INT_PLL5_GND LAST_MODIFIED=Wed Sep 17 12:16:00 2003
R2051 NO_TEST 16D5< THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1 1 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
4.99K R197 C1802 AGREES TO THE FOLLOWING
82.5 0.1UF OMIT
1% 1% 20% 2 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
1/16W 1/16W
MF 2 10V
CERM XW48 II NOT TO REPRODUCE OR COPY IT
MF 2 C222 402
470PF 2 402 SM III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
402
1 2 GPU_AGP_VREF_L 1
10% D 051-6497 13
50V APPLE COMPUTER INC.
CERM SCALE SHT OF
402 NONE 16 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
52C3> 46B4<> 17A4< 17A3< 16D7< 16C2< 16A8< 11A6< 10D6<

59C8>
+1_5V_AGP OUTPUT DRIVER BYPASS MIN_LINE_WIDTH=20
U39 C192 C200 C178 C201 C202 C180 C185 C203 C183 C176
NV18B 1 0.01UF 1 0.01UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF
BGA 10% 10% 20% 20% 20% 20% 20% 20% 20% 20%
(1 OF 5) AE14
16V
2 CERM
16V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
54C7< 16C4<> AGP_AD<0> 1 8 54B7< GPU_AGP_AD<0> AJ28 PCIAD0
RP40 NO_TEST
AE11 402 402 402 402 402 402 402 402 402 402
54C7< 16C4<> AGP_AD<1> 2
22
7 54B7< GPU_AGP_AD<1> AK28 PCIAD1 AE17
NO_TEST
54C7< 16C4<> AGP_AD<2> 3 5% 6 54B7< GPU_AGP_AD<2> AH27 PCIAD2 AE20
D 54C7< 16C4<> AGP_AD<3>

54C7< 16C4<> AGP_AD<7>
4
1
1/16W
SM1
5
8
NO_TEST 54B7< GPU_AGP_AD<3>
54B7< GPU_AGP_AD<4>
AK27
AJ27
PCIAD3
PCIAD4 AGPVDDQ
AE23 D
RP30 AD11 GRAPH_CORE
54C7< 16C4<> AGP_AD<5> 2
22
7 NO_TEST 54B7< GPU_AGP_AD<5> AH26 PCIAD5 AD14
52A6> 48C2<> 23C7<>
CORE BYPASS MIN_LINE_WIDTH=20
54C7< 16C4<> AGP_AD<6> 3 5% 6 NO_TEST 54B7< GPU_AGP_AD<6> AJ26 PCIAD6
1/16W AD23
54C7< 16C4<> AGP_AD<4> 4 5 NO_TEST 54B7< GPU_AGP_AD<7> AH25 PCIAD7
SM1 AD20
54C7< 16C4<> AGP_AD<8> 1 8 54B7< GPU_AGP_AD<8> AH23 PCIAD8 C104 C134 C117 C109 C100 C101 C103 C110 C139 C99 C146
RP32 NO_TEST
AD17
54C7< 16C4<> AGP_AD<9> 2
22
7 54B7< GPU_AGP_AD<9> AJ23 PCIAD9 1 0.01UF 1 0.01UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF
NO_TEST
54C7< 16C4<> AGP_AD<10> 3 5% 6 54B7< GPU_AGP_AD<10> AH22 PCIAD10 10% 10% 20% 20% 20% 20% 20% 20% 20% 20% 20%
1/16W NO_TEST 16V 16V 10V 10V 10V 10V 10V 10V 10V 10V 10V
54C7< 16C4<> AGP_AD<11> 4
SM1
5 54B7< GPU_AGP_AD<11> AJ22 PCIAD11 AA17
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
54C7< 16C4<> AGP_AD<12> 1 8 54B7< GPU_AGP_AD<12> AJ21 PCIAD12 402 402 402 402 402 402 402 402 402 402 402
RP42 NO_TEST
AA18
54C7< 16C4<> AGP_AD<13> 2
22
7 54B7< GPU_AGP_AD<13> AK21 PCIAD13 L20
NO_TEST
54C7< 16C4<> AGP_AD<14> 3 5% 6 54B7< GPU_AGP_AD<14> AH20 PCIAD14 Y20
1/16W NO_TEST MIN_LINE_WIDTH=20
54C7< 16C4<> AGP_AD<15> 4
SM1
5 54B7< GPU_AGP_AD<15> AJ20 PCIAD15 L13
54C7< 16C4<> AGP_AD<16> 1 8 54B7< GPU_AGP_AD<16> AG26 PCIAD16
RP31 NO_TEST
Y13
54C7< 16C4<> AGP_AD<18> 2
22
7 54B7< GPU_AGP_AD<17> AE24 PCIAD17 N20
C148 C149 C150 C147 C118 C135 C169 C140
NO_TEST
54C7< 16C4<> AGP_AD<17> 3 5% 6 54B7< GPU_AGP_AD<18> AG25 PCIAD18 P20
1 0.01UF 1 0.01UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF
1/16W NO_TEST
54C7< 16C4<> AGP_AD<19> 4
SM1
5 54B7< GPU_AGP_AD<19> AG24 PCIAD19 U20
10% 10% 20% 20% 20% 20% 20% 20%
16V 16V 10V 10V 10V 10V 10V 10V
54C7< 16C4<> AGP_AD<20> 1 8 54B7< GPU_AGP_AD<20> AF24 PCIAD20 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
RP41 V20
54C7< 16C4<> AGP_AD<21> 2 22 7 54B7< GPU_AGP_AD<21> AG23 PCIAD21 L11
402 402 402 402 402 402 402 402
5% NO_TEST VDD
54C7< 16C4<> AGP_AD<22> 3 6 54B7< GPU_AGP_AD<22> AE22 PCIAD22 N11
1/16W NO_TEST
54C7< 16C4<> AGP_AD<23> 4
SM1
5 54B7< GPU_AGP_AD<23> AF22 PCIAD23 P11 MIN_LINE_WIDTH=20
54C7< 16B4<> AGP_AD<24> 1 8 54B7< GPU_AGP_AD<24> AE21 PCIAD24
RP44 NO_TEST
U11
54C7< 16B4<> AGP_AD<25> 2 22 7 54B7< GPU_AGP_AD<25> AG20 PCIAD25
5% NO_TEST
V11 C161 C93 C168 C94 C120 C102 C151
54C7< 16B4<> AGP_AD<26> 3 6 54B7< GPU_AGP_AD<26> AG19 PCIAD26 Y11
2 2 2 2 1 1 1 +3V_MAIN
1/16W NO_TEST 10UF 10UF 10UF 10UF 0.1UF 0.1UF 0.1UF
54C7< 16B4<> AGP_AD<27> 4
SM1
5 54B7< GPU_AGP_AD<27> AF19 PCIAD27 L14 N20P80% N20P80% N20P80% N20P80% 20% 20% 20%
54C7< 16B4<> AGP_AD<28> 1 8 54B7< GPU_AGP_AD<28> AE19 PCIAD28 1 10V 1 10V 1 10V 1 10V 10V 10V 10V
RP34 NO_TEST
Y14 2 CERM 2 CERM 2 CERM R198
54C7< 16B4<> AGP_AD<29> 2
22
7 54B7< GPU_AGP_AD<29> AF18 PCIAD29 Y5V Y5V Y5V Y5V
10 2
C 54C7< 16B4<> AGP_AD<30>
54C7< 16B4<> AGP_AD<31>
3
4
5%
1/16W
6
5
NO_TEST
NO_TEST
54B7< GPU_AGP_AD<30>
54B7< GPU_AGP_AD<31>
AG18
AE18
PCIAD30
L17
Y17
805 805 805 805 402 402 402
1 C
SM1 PCIAD31 L18
1%
1/16W
MF
AGP 2X,4X : AGP 8X Y18 AGP_PLLVDD 402
54C7< 16B4<> AGP_CBE<0> 1 8 54B7< GPU_AGP_CBE<0> AJ24 PCIC0/BE0* : C0*/BE0
RP43
54C7< 16B4<> AGP_CBE<3> 2
22
7 54B7< GPU_AGP_CBE<1> AH19 PCIC1/BE1* : C1*/BE1 1 1
AGP_CBE<2> 3 6 NO_TEST 54B7< GPU_AGP_CBE<2> AF25 C223 C219 C217
54C7< 16B4<> 5% PCIC2/BE2* : C2*/BE2 4.7UF 0.1UF 0.001UF
1/16W NO_TEST
54C7< 16B4<> AGP_CBE<1> 4
SM1
5 54B7< GPU_AGP_CBE<3> AG22 PCIC3/BE3* : C3*/BE3 N20P80%
10V
20% 10%
CERM 2 10V
CERM 2 50V
CERM
59A6> 0 R1026 +3V_MAIN 805 402 402
31D4< 30B2< MAIN_RESET_L 1 2 CLK66M_GPU_AGP
54A7< 16D8< AG12 PCICLK : CLK
44C4<> 32A8< 402 5%
NV_PCI_RST_L AF15 PCIRST* : RST*
01 R1027 H6 I/O BYPASS
44D3< 27C5< AGP_RESET_L 2
402 5% 54B7< 16C4<> 16C3< AGP_GNT_L AE15 PCIGNT* : GNT AC6
TMDS_XMIT_SI_P
54B7< 16C4<> 16C3< AGP_REQ_L AF13 PCIREQ* : REQ U7
54C7< 16B4<> 16B3< AGP_TRDY_L 1 8 G14 C177 C111 C129 C136 C116 C87 C184
RP45 NO_TEST
16C3< 16B4<> AGP_FRAME_L 2 7 GPU_AGP_FRAME_L
54B7< AK16 PCIFRAME* : FRAME U6 1 0.01UF 1 0.01UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF
54C7< 5% NO_TEST
54C7< 16C3< 16B4<> AGP_IRDY_L 3 1/16W 6 GPU_AGP_IRDY_L
54B7< AG16 PCIIRDY* : IRDY AD15 10% 10% 20% 20% 20% 20% 20%
SM1 16V 16V 10V 10V 10V 10V 10V
4 22 5 GPU_AGP_TRDY_L
54B7< AJ17 PCITRDY* : TRDY VDD33
H7 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
NO_TEST 54B7< GPU_AGP_DEVSEL_L
54B7< 16B4<> AGP_PAR 1 8 AJ16 PCIDEVSEL* : DEVSEL AD16 402 402 402 402 402 402 402
RP35 NO_TEST
54C7< 16B4<> 16B3< AGP_STOP_L 2 7 54B7< GPU_AGP_STOP_L AH17 PCISTOP* : STOP AD19
5%
16C3< 16B4<> AGP_DEVSEL_L 3 1/16W 6 54B7< GPU_AGP_PAR AK18 PCIPAR : PAR AD22
54C7< 4 SM1 5
22 AC7
28B8< 28B5<> AGP_INT_L AG15 PCIINTA* : INTA AD12
NC_GPU_INTB_L AE10 NC_PCIINTB*: INTB P24
1 8 NO_TEST 54A7< GPU_AGP_RBF_L AG14
C137 C91 C97 C187 C179 C105 C112 C181 C182 C188
RP46 AGPRBF* : RBF 2
10UF 1 0.01UF 1 0.01UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF
54B7< 16B1< 16A6<> AGP_WBF_L 2
22
7 GPU_AGP_WBF_L AG17 AGPWBF* : WBF
54B7< 16B3< 16A4<> AGP_PIPE_L 3 5% 6 NO_TEST 54A7< GPU_AGP_PIPE_L AJ18 AGPPIPE* : DBI_HI +5V_MAIN N20P80%
1 10V
10%
16V
10%
16V
20%
10V
20%
10V
20%
10V
20%
10V
20%
10V
20%
10V
20%
10V
B 54B7< 16B3< 16A4<> AGP_RBF_L 41/16W
SM1
5 NC_GPU_DBI_LO AJ19 <RESRVD> : DBI_LO Y5V
805
2 CERM
402
2 CERM
402
2 CERM
402
2 CERM
402
2 CERM
402
2 CERM
402
2 CERM
402
2 CERM
402
2 CERM
402
B
54B7< 16B1< 16A4<> AGP_ST<0> AG13 AGPST0 : ST0
54B7< 16B1< 16A4<> AGP_ST<1> AE16 AGPST1 : ST1 VD50CLAMP0 N4
54B7< 16B1< 16A4<> AGP_ST<2> AE13 AGPST2 : ST2 VD50CLAMP1 AE9

C193 C186
AGP_AD_STB<0> 1 8 AGP_PLLVDD AE12
1 1
54C7< 16B3< 16A4<> 54B7< AGP_AD_STB_GPUUF<0> AK24 AGPADSTBF0 : ADSTBF0 0.1UF 0.1UF
RP33 NO_TEST 54B7< AGP_AD_STB_L_GPUUF<0> AJ25
54C7< 16D1< 16A4<> AGP_AD_STB_L<0> 2 7 AGPADSTBS0* : ADSTBS0 20% 20%
54C7< 16D1< 16A4<> AGP_AD_STB_L<1> 3

22
5% 6 NO_TEST 54B7< AGP_AD_STB_GPUUF<1> AG21 AGPADSTBF1 : ADSTBF1
50 OHM
TO VDDQ 10V
2 CERM
10V
2 CERM
GPU AGP I/O REFERENCE
1/16W NO_TEST 54B7< AGPCALPD AA13 (PLACE CLOSE TO INTREPID AGP BALLS)
54C7< 16B3< 16A4<> AGP_AD_STB<1> 4
SM1
5 AGP_AD_STB_L_GPUUF<1> AF21 AGPADSTBS1* : ADSTBS1 402 402
R210 C214
54B7< 16B3< 16A4<> AGP_SB_STB 1 2 54A7< GPU_AGP_SB_STB AK13 AGPSBSTBF : SBSTBF 50 OHM 52A8>GPU_50PULLUP 470PF
R558 TO GND
54B7< 16D1< 16A4<> AGP_SB_STB_L 22 1 2 54A7< GPU_AGP_SB_STB_L AJ13 AGPSBSTBS* : SBSTBS AGPCALPU AA14 GPU_50PULLDWN 52A8> 46B4<> 17D5< 17A4< 16D7< 16C2< 16A8< 11A6< 10D6< +1_5V_AGP 1 2 GPU_AGP_VREF_X
59C8> 52C3>
22NO_TEST 10%
54B7< 16C1< 16B4<> AGP_SBA<3> 1 8 54A7< GPU_AGP_SBA<0> AJ11 AGPSBA0 : SBA0* 1 50V 1
RP47 NO_TEST 54A7< R195 CERM R192
54B7< 16B4<> 16B1< AGP_SBA<2> 2
22
7 GPU_AGP_SBA<1> AH11 AGPSBA1 : SBA1* 10K OHM 4.99K 402 82.5
AGP_SBA<1> 3 6 NO_TEST 54A7< GPU_AGP_SBA<2> AJ12 TO GND 1% 1%
54B7< 16C1< 16B4<> 5%
1/16W
AGPSBA2 : SBA2* TESTMODE AE5 GPU_TMODE 1/16W 1/16W
54B7< 16C1< 16B4< AGP_SBA<0> 4
SM1
5 54A7< GPU_AGP_SBA<3> AH12 AGPSBA3 : SBA3* 52A8> MF
402 2
MF
NO_TEST 54A7< 2 402
54B7< 16B1< 16A4<> AGP_SBA<7> 1 8 GPU_AGP_SBA<4> AJ14 AGPSBA4 : SBA4* 1
R177 1
RP36 NO_TEST 54A7< R160
54B7< 16B1< 16A4<> AGP_SBA<6> 2
22
7 GPU_AGP_SBA<5> AH14 AGPSBA5 : SBA5* 10K +1_5V_AGP 59C8>
10D6< 11A6< 16A8< 16C2< 16D7< 17A3< 17D5< 46B4<> 52C3>
AGP_SBA<4> 3 6 NO_TEST 54A7< GPU_AGP_SBA<6> AJ15 49.9 GPU_AGP_VREF 17A8< 52A6>
54B7< 16C1< 16B4<> 5%
1/16W
AGPSBA6 : SBA6* 1%
1%
54B7< 16C1< 16B4<> AGP_SBA<5> 4
SM1
5 54A7< GPU_AGP_SBA<7> AH15 AGPSBA7 : SBA7* 1/16W
2 MF 1/16W
1 R169
2 MF 1 1
49.9 R196 R193
GPU_MBDET_L AF16 <RESRVD> : MBDET* 402
402 4.99K 82.5
1%
54B7< 16D3< 16D1< 16C6<> AGP_BUSY_L AF12 AGPBUSY* : BUSY* 1/16W
1%
1/16W
1%
1/16W
54B7< 16D3< 16C6<> STOP_AGP_L AG11 AGPSTOP* : STOP* 2 MF MF
402 2 C215 MF
2 402
NVIDIA AGP
D2 TRST*
402 470PF
TCLK
52A6> 17A2< GPU_AGP_VREF AK29 AGPVREF : AGPVREF +3V_MAIN 1 2 GPU_AGP_VREF_Y

TMS
TDI
E2 TDO
A +3V_MAIN NC 10%
50V A
A1
AK30
G6
R7
T7
C2
C1
D1
CERM NOTICE OF PROPRIETARY PROPERTY

402
AGP VERSION SELECT R72 R10241 NV34
R1025 1 NV34 LAST_MODIFIED=Wed Sep 17 12:16:02 2003
NVAGP_TRST_L 1 2 10K PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
(LOW = AGP V3.X) 10K
NC_GPU<0>
NC_GPU<1>
NC_GPU<2>
NC_GPU<3>
NC_GPU<4>
1 10K 1% AGREES TO THE FOLLOWING

R168 402 1/16W 1%
(HIGH = AGP V2.X) MF 1/16W I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
10K NC_NVAGP_TDO 402 2 MF
402 2 II NOT TO REPRODUCE OR COPY IT
1% NVAGP_TDI
1/16W III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
NVAGP_TMS
MF 2
402 SIZE DRAWING NUMBER REV.
R80
ALL ARE NO_TEST NVAGP_TCLK 1 2
10K
D 051-6497 13
402 APPLE COMPUTER INC.
SCALE SHT OF
NONE 17 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
+2_5V_MAIN EVENLY DISTRIBUTE 0.01UF & 0.1 UF CAPS AMONGST FBVDDQ PINS ON NV ASIC
C86 C84 C73 C81 C90 C72 C78 C98 C133 C167 C159 C75 C82 C79 C115 C175 C199 C83 C80 C89 C96 C145
2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 2 2 2 2 2 2 2 2 1
0.01UF 0.1UF 0.1UF 0.1UF 0.01UF 0.1UF 0.01UF 0.1UF 0.1UF 0.1UF 0.1UF C95 0.1UF 0.1UF 0.1UF 0.01UF 0.1UF 0.1UF 0.01UF 0.1UF 0.01UF 0.1UF 0.1UF C124
H 1
10%
16V
CERM
1
20%
10V
CERM
1
20%
10V
CERM
1
20%
10V
CERM
1
10%
16V
CERM
1
20%
10V
CERM
1
10%
16V
CERM
1
20%
10V
CERM
1
20%
10V
CERM
1
20%
10V
CERM
1
20%
10V
CERM
10UF
N20P80%
10V
2 Y5V 1
20%
10V
CERM
1
20%
10V
CERM
1
20%
10V
CERM
1
10%
16V
CERM
1
20%
10V
CERM
1
20%
10V
CERM
1
10%
16V
CERM
1
20%
10V
CERM
1
10%
16V
CERM
1
20%
10V
CERM
1
20%
10V
CERM
10UF
20%
6.3V
2 CERM
H
805 805
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402
+2_5V_MAIN
F17
DQM R’S CLOSE TO GPU
U39 U39
G11
NV18B NV18B
55D3> 19D8< FBD<0> N25 FBAD0 BGA G8
FBD<64>
55C3> 19C8< F13 FBCD0 (4 BGA N13
OTHER R’S BETWEEN GPU & MEMORY
55D3> 19D8< FBD<1> N27 FBAD1 (3 OF 5) F8 OF 5)
55C3> 19C8< FBD<65> D13 FBCD1 P13
55D3> 19D8< FBD<2> N26 FBAD2 L25
55C3> 19C8< FBD<66> E13 FBCD2 U13
R117 0
55D3> 19D8< FBD<3> M25 FBAD3 Y25
55C3> 19C8< FBD<67> F12 FBCD3 V13 55D3> 18D8> FBDQM<0> 1 2 RFBDQM<0> 20C6< 55D3>
55D3> 19D8< FBD<4> K26 FBAD4 F11
55C3> 19C8< FBD<68> E10 FBCD4 M14 1/16W 5% MF 402
R111 0
55D3> 19D8< FBD<5> K27 FBAD5 F14
55C3> 19C8< FBD<69> D10 FBCD5 N14 55D3> 18D8> FBDQM<1> 1 2 RFBDQM<1> 20C6< 55D3>
55D3> 19D8< FBD<6> J27 FBAD6 F20
55C3> 19C8< FBD<70> D9 FBCD6 P14
R90 0 1/16W 5% MF 402
55D3> 19D8< FBD<7> H27 FBAD7 FBVDDQ
F23
55C3> 19C8< FBD<71> D8 FBCD7 R14 55D3> 18D8> FBDQM<2> 1 2 RFBDQM<2> 20C6< 55D3>
55D3> 19D8< FBD<8> N29 FBAD8 Y24
55C3> 19C8< FBD<72> B13 FBCD8 T14 1/16W 5% MF 402
R84 0
55D3> 19D8< FBD<9> M29 FBAD9 L24
55C3> 19C8< FBD<73> B12 FBCD9 U14 55D3> 18D8> FBDQM<3> 1 2 RFBDQM<3> 20C6< 55D3>
55D3> 19D8< FBD<10> M28 FBAD10 G20
G 55D3> 19D8< FBD<11>

55D3> 19D8< FBD<12>
L29
J29
FBAD11
FBAD12
G23
H24
55C3> 19B8< FBD<74>
55C3> 19B8< FBD<75>
C12
B11
FBCD10
FBCD11
V14
W14 55D3> 18D8> FBDQM<4>
R164 0
1 2
1/16W 5% MF 402
RFBDQM<4> 20C2< 55D3> G
55C3> 19B8< FBD<76> B9 FBCD12 M15 1/16W 5% MF 402
R155 0
55D3> 19D8< FBD<13> J28 FBAD13 AC24
55C3> 19B8< FBD<77> C9 FBCD13 N15 55D3> 18D8> FBDQM<5> 1 2 RFBDQM<5> 20C2< 55D3>
55D3> 19D8< FBD<14> H29 FBAD14 H25
55C3> 19B8< FBD<78> B8 FBCD14 P15
R154 0 1/16W 5% MF 402
55D3> 19D8< FBD<15> G30 FBAD15 P25
55C3> 19B8< FBD<79> A7 FBCD15 R15 55D3> 18D8> FBDQM<6> 1 2 RFBDQM<6> 20C2< 55D3>
55D3> 19D8< FBD<16> K25 FBAD16 U25 NO_TEST NC_VTT<0>
55C3> 19B8< FBD<80> F10 FBCD16 T15 1/16W 5% MF 402
R143 0
55D3> 19D8< FBD<17> J26 FBAD17 AC25 NO_TEST NC_VTT<1>
55C3> 19B8< FBD<81> E9 FBCD17 U15 55D3> 18D8> FBDQM<7> 1 2 RFBDQM<7> 20C2< 55D3>
55D3> 19D8< FBD<18> J25 FBAD18 NO_TEST NC_VTT<2>
55C3> 19B8< FBD<82> F9 FBCD18 V15 1/16W 5% MF 402
55D3> 19C8< FBD<19> G26 FBAD19 G9 NO_TEST NC_VTT<3>
G12 55C3> 19B8< FBD<83> F7 FBCD19 W15
55D3> 19C8< FBD<20> F28 FBAD20 G15 NO_TEST NC_VTT<4>
G16 55C3> 19B8< FBD<84> C6 FBCD20 M16
RP22 22 ZT29 1
55D3> 19C8< FBD<21> F26 FBAD21 G19 NO_TEST NC_VTT<5>
NC_VTT G22 55C3> 19B8< FBD<85> E6 FBCD21 N16 55D3> 18C8> FBACAS_L 1 8 RFBACAS_L 20B2< 20B6< 55D3>
55D3> 19C8< FBD<22> E27 FBAD22 J24
M24 NO_TEST NC_VTT<6> 55C3> 19B8< FBD<86> D5 FBCD22 P16 1/16W 5% SM1 RP22 22 1 NO_TEST
55D3> 19C8< FBD<23> D27 FBAD23 R24 ZT20
T24 NO_TEST NC_VTT<7> 55C3> 19B8< FBD<87> C4 FBCD23 R16 55D3> 18C8> FBARAS_L 2 7 RFBARAS_L 20B2< 20B6< 55D3>
55D3> 19C8< FBD<24> H28 FBAD24 W24
AB24 NO_TEST NC_VTT<8> 55C3> 19B8< FBD<88> C8 FBCD24 T16 RP22 22 1/16W 5% SM1 1 NO_TEST
55D3> 19C8< FBD<25> G29 FBAD25 ZT30
NO_TEST NC_VTT<9> 55C3> 19B8< FBD<89> B7 FBCD25 U16 55D3> 18C8> FBACS0_L 3 6 RFBACS0_L 20B2< 20B6< 55C3>
55D3> 19C8< FBD<26> F29 FBAD26 A25
AK25 NO_TEST NC_VTT<10> 55C3> 19B8< FBD<90> B6 FBCD26 THERMAL GND V16 1/16W 5% SM1 RP22 22 1 NO_TEST
55D3> 19C8< FBD<27> E29 FBAD27 AA5 ZT31
AF20 NO_TEST NC_VTT<11> 55C3> 19B8< FBD<91> B5 FBCD27 W16 55D3> 18C8> FBAWE_L 4 5 RFBAWE_L 20B2< 20B6< 55D3>
55D3> 19C8< FBD<28> C30 FBAD28 AH16
AK15 55C3> 19B8< FBD<92> A3 FBCD28 M17 1/16W 5% SM1
55D3> 19C8< FBD<29> C29 FBAD29 AF11
AH21 55C3> 19B8< FBD<93> B3 FBCD29 N17
55D3> 19C8< FBD<30> B30 FBAD30 U26
AD28 55C3> 19B8< FBD<94> A2 FBCD30 P17
55D3> 19C8< FBD<31> A30 FBAD31 AH18
F25 55C3> 19B8< FBD<95> B2 FBCD31 R17
55D3> 19D5< FBD<32> AJ29 FBAD32 C18
F 55D3> 19D5< FBD<33>

55D3> 19D5< FBD<34>
AJ30
AH29
FBAD33
FBAD34
E14
AF8
Y8
K3
55C3> 19C5< FBD<96>
55C3> 19C5< FBD<97>
B29
A29
FBCD32
FBCD33
T17
U17 55D3> 18D8> FBA<0>
RP94 22
2 7
ZT22 1
RFBA<0> 20D2< 20D6< 55D3> F
G3 55C3> 19C5< FBD<98> B28 FBCD34 V17 1/16W 5% SM1 RP94 22 1
55D3> 19D5< FBD<35> AH30 FBAD35 F6 ZT23
AF17 55C3> 19C5< FBD<99> A28 FBCD35 W17 55D3> 18D8> FBA<1> NO_TEST 3 6 RFBA<1> 20C2< 20C6< 55D3>
55D3> 19D5< FBD<36> AF29 FBAD36 AF23
AH24 55C3> 19C5< FBD<100> B26 FBCD36 M18 RP94 22 1/16W 5% SM1 1
55D3> 19D5< FBD<37> AE29 FBAD37 AH28 ZT34
AG27 55C3> 19C5< FBD<101> B25 FBCD37 N18 55D3> 18D8> FBA<2> 4 5 RFBA<2> 20C2< 20C6< 55D3>
55D3> 19D5< FBD<38> AD29 FBAD38 AF26
AF14 55C3> 19C5< FBD<102> B24 FBCD38 P18 1/16W 5% SM1 RP95 22 1
55D3> 19D5< FBD<39> AC28 FBAD39 AH13 ZT24
L8 55C3> 19C5< FBD<103> C23 FBCD39 R18 55D3> 18D8> FBA<3> NO_TEST 4 5 RFBA<3> 20C2< 20C6< 55D3>
55D3> 19D5< FBD<40> AG28 FBAD40 P26
G28 55C3> 19C5< FBD<104> E26 FBCD40 T18 RP95 22 1/16W 5% SM1 ZT25 1
55D3> 19D5< FBD<41> AF27 FBAD41 K28
N28 55C3> 19C5< FBD<105> D26 FBCD41 U18 55D3> 18D8> FBA<4> 3 6 RFBA<4> 20C2< 20C6< 55D3>
55D3> 19D5< FBD<42> AE26 FBAD42 V28
AA28 55C3> 19B5< FBD<106> E25 FBCD42 V18 1/16W 5% SM1 RP95 22 ZT37 1
55D3> 19D5< FBD<43> AE28 FBAD43 F30
J30 55C3> 19B5< FBD<107> C25 FBCD43 W18 55D3> 18D8> FBA<5> 1 8 RFBA<5> 20C2< 20C6< 55D3>
55D3> 19D5< FBD<44> AD25 FBAD44 M30
W30 55C3> 19B5< FBD<108> E24 FBCD44 M19 RP95 22 1/16W 5% SM1 ZT26 1
55D3> 19D5< FBD<45> AB25 FBAD45 AB30
AE30 55C3> 19B5< FBD<109> F22 FBCD45 N19 55D3> 18D8> FBA<6> NO_TEST 2 7 RFBA<6> 20C2< 20C6< 55D3>
55D3> 19D5< FBD<46> AB26 FBAD46 H26
L26 55C3> 19B5< FBD<110> E22 FBCD46 P19 1/16W 5% SM1 RP23 22 ZT27 1
55D3> 19D5< FBD<47> AA25 FBAD47 Y26
AC26 55C3> 19B5< FBD<111> F21 FBCD47 R19 55D3> 18D8> FBA<7> 1 8 RFBA<7> 20C2< 20C6< 55D3>
55D3> 19D5< FBD<48> AD30 FBAD48 GND E17
D28 55C3> 19B5< FBD<112> A24 FBCD48 T19
RP23 22 1/16W 5% SM1 ZT38 1
55D3> 19D5< FBD<49> AC29 FBAD49 C7
E8 55C3> 19B5< FBD<113> B23 FBCD49 U19 55D3> 18D8> FBA<8> 2 7 RFBA<8> 20C2< 20C6< 55D3>
55D3> 19D5< FBD<50> AB28 FBAD50 A9
C10 55C3> 19B5< FBD<114> C22 FBCD50 V19 1/16W 5% SM1 RP23 22 ZT36 1
55D3> 19C5< FBD<51> AB29 FBAD51 E11
C13 55C3> 19B5< FBD<115> B22 FBCD51 W19 55D3> 18D8> FBA<9> 3 6 RFBA<9> 20C2< 20C6< 55D3>
55D3> 19C5< FBD<52> Y29 FBAD52 E20
C21 55C3> 19B5< FBD<116> B20 FBCD52 P12
RP23 22 1/16W 5% SM1 ZT33 1
55D3> 19C5< FBD<53> W28 FBAD53 E23
C24 55C3> 19B5< FBD<117> C19 FBCD53 N12 55D3> 18D8> FBA<10> 4 5 RFBA<10> 20C2< 20C6< 55D3>
E 55D3> 19C5< FBD<54>

55D3> 19C5< FBD<55>
W29
V29
FBAD54
FBAD55
A6
A12
AH10
AK12
55C3> 19B5< FBD<118>
55C3> 19B5< FBD<119>
B19
B18
FBCD54
FBCD55
V12
U12 55D3> 18C8> FBA<11> NO_TEST
1/16W 5% SM1 RP93 22
2 7
ZT35 1
RFBA<11> 20C2< 20C6< 55D3>
E
55D3> 19C5< FBD<56> AC27 FBAD56 C3
D4 55C3> 19B5< FBD<120> D23 FBCD56 M12
RP93 22 1/16W 5% SM1
55D3> 19C5< FBD<57> AB27 FBAD57 E5
AG4 55C3> 19B5< FBD<121> D22 FBCD57 R12 55D3> 18C8> FBA<12> 4 5 NO_TEST NC_RFBA<12>
55D3> 19C5< FBD<58> AA27 FBAD58 AH3
AK6 55C3> 19B5< FBD<122> D21 FBCD58 T12 1/16W 5% SM1 RP93 22 1
55D3> 19C5< FBD<59> AA26 FBAD59 AH7 ZT21
AF5 55C3> 19B5< FBD<123> E21 FBCD59 W12 55D3> 18C8<> FBABA<0> 1 8 RFBABA<0> 20C2< 20C6< 55D3>
55D3> 19C5< FBD<60> W25 FBAD60 AE6
AK9 55C3> 19B5< FBD<124> F19 FBCD60 M13 RP93 22 1/16W 5% SM1 1
55D3> 19C5< FBD<61> V26 FBAD61 N3 ZT32
H11 55C3> 19B5< FBD<125> E18 FBCD61 R13 55D3> 18C8<> FBABA<1> 3 6 RFBABA<1> 20C2< 20C6< 55D3>
55D3> 19C5< FBD<62> V27 FBAD62 AC11
H20 55C3> 19B5< FBD<126> D18 FBCD62 T13 1/16W 5% SM1
55D3> 19C5< FBD<63> V25 FBAD63 AC20
L23 55C3> 19B5< FBD<127> F18 FBCD63 W13
Y23 WEAK PULL-DOWN
F1
55D3> 18G3< FBDQM<0> L27 FBADQM0
J1
M1
T1
+2_5V_MAIN FBDQM<8> D11 FBCDQS0 D12 FBDQS<8> 19A5< 55B3>
RECOMMENDED BY NVIDIA
R130 ZT28 1
FBDQM<1> K29
55C3> 18D3< FBCDQM0 FBACKE RFBACKE
55D3> 18G3< FBADQM1 W1 55D3> 18D7<> 20C2< 20C6< 55C3>
AB1 55C3> 18D3< FBDQM<9> B10 FBCDQM1 FBCDQS1 A10 FBDQS<9> 19A5< 55B3>
55D3> 18G3< FBDQM<2> G25 FBADQM2 AE1 2 22 1
A19 55C3> 18D3< FBDQM<10> D7 FBCDQM2 FBCDQS2 E7 FBDQS<10> 19A5< 55B3> 1
R131 1/16W
55D3> 18G3< FBDQM<3> E28 FBADQM3 AK19 1
R71 402
A22 55C3> 18D3< FBDQM<11> C5 FBCDQM3 FBCDQS3 A4 FBDQS<11> 19A5< 55B3> 10K 5%
55D3> 18G3< FBDQM<4> AF28 FBADQM4 AK22 49.9 1% MF
K5 1% 55C3> 18D3< FBDQM<12> C26 FBCDQM4 FBCDQS4 A27 FBDQS<12> 19A5< 55B3> 1/16W
55D3> 18G3< FBDQM<5> AD27 FBADQM5 J7 1/16W MF
AE25 MF 55C3> 18D3< FBDQM<13> F24 FBCDQM5 FBCDQS5 D24 FBDQS<13> 19A5< 55B3> 2 402
55D3> 18G3< FBDQM<6> AA30 FBADQM6 2 402 55C3> 18C3< FBDQM<14> B21 FBCDQM6 FBCDQS6 A21 FBDQS<14> 19A5< 55B3>
55D3> 18G3< FBDQM<7> Y27 FBADQM7
FBCAL_PD_VDDQ F5 FBCAL_PD_VDDQ 55C3> 18C3< FBDQM<15> D20 FBCDQM7 FBCDQS7 D19 FBDQS<15> 19A5< 55B3>
NV34 1R64 0
2 C62 55C3> 18D5> FBDQM<8> 2 RFBDQM<8> 21C6< 55C3>
FBCAL_PU_GND E4 FBCAL_PU_GND 18A5< FBBA<0> A18 FBCA0 NC_FBCDQS0* E12 NC_FBDQS_L<8>
D 55D3> 18F3<
55D3> 18F3<
FBA<0>
FBA<1>
V30
U28
FBAA0
FBAA1 FBCAL_TERM_GND D3 FBCAL_TERM_GND 18A5<
20%
0.1UF
CERM
55C3> 18C3<
FBBA<1>
55C3> 18B3< C17 FBCA1 NC_FBCDQS1* C11 NC_FBDQS_L<9>
55C3> 18D5> FBDQM<9>
1/16W 5% MF 402
R66 0
1 2
NV34
RFBDQM<9> 21C6< 55C3>
D
1 10V 55C3> 18B3< FBBA<2> B17 FBCA2 NC_FBCDQS2* D6 NC_FBDQS_L<10>
55D3> 18F3< FBA<2> U29 FBAA2 R70 0 1/16W 5% MF 402
FBCAL_CLK_GND E3 FBCAL_CLK_GND 18A5< 402 55C3> 18B3< FBBA<3> C16 FBCA3 NC_FBCDQS3* B4 NC_FBDQS_L<11> NV34
55D3> 18F3< FBA<3> T28 FBAA3 55C3> 18D5> FBDQM<10> 1 2 RFBDQM<10> 21C6< 55C3>
55C3> 18B3< FBBA<4> B16 FBCA4 NC_FBCDQS4* B27 NO_TEST NC_FBDQS_L<12>
55D3> 18F3< FBA<4> T29 FBAA4 FB_DLLVDD C27 18C6< FB_DLLVDD 1/16W 5% MF 402
R67 0 NV34
55C3> 18B3< FBBA<5> D16 FBCA5 NC_FBCDQS5* D25 NC_FBDQS_L<13>
55D3> 18F3< FBA<5> T27 FBAA5 55C3> 18D5> FBDQM<11> 1 2 RFBDQM<11> 21C6< 55C3>
FBACKE N30 FBACKE 18D3< 55D3> 55C3> 18B3< FBBA<6> A16 FBCA6 NC_FBCDQS6* C20 NC_FBDQS_L<14>
55D3> 18E3< FBA<6> T30 FBAA6 R54 0 1/16W 5% MF 402
55C3> 18B3< FBBA<7> E16 FBCA7 NC_FBCDQS7* E19 NC_FBDQS_L<15> NV34
55D3> 18E3< FBA<7> T26 FBAA7 FBACLK0 U21 FBACLK0 19C3< 55C3> 55C3> 18D5> FBDQM<12> 1 2 RFBDQM<12> 21C2< 55C3>
55C3> 18B3< FBBA<8> F16 FBCA8
55D3> 18E3< FBA<8> T25 FBAA8 FBACLK0* V21 FBACLK0_L 19C3< 55C3> FBCRAS* C14 FBBRAS_L 18C3< 55C3> 1/16W 5% MF 402
R56 0 NV34
55C3> 18B3< FBBA<9> D15 FBCA9
55D3> 18E3< FBA<9> R27 FBAA9 FBACLK1 N21 FBACLK1 19D3< 55C3> FBCCAS* B14 FBBCAS_L 18C3< 55C3> 55C3> 18D5> FBDQM<13> 1 2 RFBDQM<13> 21C2< 55C3>
55C3> 18B3< FBBA<10> F15 FBCA10
55D3> 18E3< FBA<10> R25 FBAA10 FBACLK1* P21 FBACLK1_L 19D3< 55C3> FBCWE* C15 FBBWE_L 18C3< 55C3> R58 0 1/16W 5% MF 402
55C3> 18B3< FBBA<11> A15 FBCA11 NV34
55D3> 18E3< FBA<11> R30 FBAA11 FBCCS0* D17 FBBCS0_L 18C3< 55C3> 55C3> 18D5> FBDQM<14> 1 2 RFBDQM<14> 21C2< 55C3>
FBADQS0
M27 FBDQS<0> 19A8< 55C3> 55C3> 18A3< FBBA<12> G17 FBCA12
55D3> 18E3< FBA<12> NC_FBBCS1_L
TESTPOINT
U24 FBAA12 K30 FBDQS<1> FBCCS1* D14 1/16W 5% MF 402
R59 0
FBADQS1 19A8< 55C3> NV34
55C3> 18A3< FBBBA<0> E15 FBCBA0 FBCCKE A13 FBBCKE 18A3< 55B3> 55C3> 18D5> FBDQM<15> 1 2 RFBDQM<15> 21C2< 55C3>
55D3> 18E3< FBABA<0> R26 FBABA0 FBADQS2
G27 FBDQS<2> 19A8< 55C3>
55C3> 18A3< FBBBA<1> B15 FBCBA1 1/16W 5% MF 402
55D3> 18E3< FBABA<1> R29 FBABA1 FBADQS3
D30 FBDQS<3> 19A8< 55C3>
FBADQS4
AG30 FBDQS<4> 19A8< 55C3> 55B3> 19B3<FBBCLK0 K18 FBBCLK0 1
NV34 RP9 22 ZT2
55D3> 18G3< FBARAS_L P28 FBARAS* FBADQS5
AD26 FBDQS<5> 19A8< 55C3> 55B3> 19B3< FBBCLK0_L K17 FBBCLK0* 55C3> 18C4<> FBBCS0_L 1 8 RFBBCS0_L 21B2< 21B6< 55B3>
55D3> 18G3< FBACAS_L P29 FBACAS* AA29 FBDQS<6> 19A8< 55C3> 55B3> 19C3< FBBCLK1 K13 FBBCLK1
FBADQS6 1/16W 5% SM1 RP9 22 NV34 1
55D3> 18F3< FBAWE_L R28 FBAWE* W27 FBDQS<7> 19A8< 55C3> 55B3> 19B3< FBBCLK1_L K14 FBBCLK1* ZT5
FBADQS7 55C3> 18D4<> FBBWE_L 2 7 RFBBWE_L 21B2< 21B6< 55B3>
55D3> 18F3< FBACS0_L U27 FBACS0*
NC_FBADQS0*
M26 NC_FBDQS_L<0> NV34 RP9 22 1/16W 5% SM1
ZT1 1
NC_FBACS1_L TESTPOINT P27 FBACS1*
NC_FBADQS1*
L28 NC_FBDQS_L<1> 55C3> 18D4<> FBBCAS_L 3 6 RFBBCAS_L 21B2< 21B6< 55B3>
C 52A6> GPU_FB_VREF C28 FBVREF NC_FBADQS2*

NC_FBADQS3*
F27
D29
NC_FBDQS_L<2>
NC_FBDQS_L<3> 55C3> 18D4<> FBBRAS_L
1/16W 5% SM1
4
RP9 22
5
NV34 ZT3 1
RFBBRAS_L 21B2< 21B6< 55B3>
C
ROMA14
26D8< TESTPOINT R2 ROMA14 NC_FBADQS4*
AG29 NC_FBDQS_L<4> 1/16W 5% SM1 NO_TEST
ROMA15
26D8< TESTPOINT R1 ROMA15 NC_FBADQS5*
AE27 NC_FBDQS_L<5> +3V_MAIN
NC_ROMCS_L TESTPOINT AF2 ROMCS* NC_FBADQS6*
Y28 NC_FBDQS_L<6>
NC_FBADQS7*
W26 NC_FBDQS_L<7>
R52 NV34 RP85 22 1
10 ZT6
18D7< FB_DLLVDD 1 2 55C3> 18D5<> FBBA<0> NO_TEST 4 5 RFBBA<0> 21D2< 21D6< 55C3>
1% 1/16W 5% SM1 RP85 22 NV34 1
1/16W ZT8
1 1 1
MF 55C3> 18D5<> FBBA<1> 3 6 RFBBA<1> 21C2< 21C6< 55C3>
C61 C70 C69 402
1
4.7UF 0.1UF 0.001UF NV34 RP85 22 1/16W 5% SM1 ZT11
N20P80%
10V
20%
10V
10%
50V 55C3> 18D5<> FBBA<2> 2 7 RFBBA<2> 21C2< 21C6< 55C3>
2 CERM 2 CERM 2 CERM
1/16W 5% SM1 RP84 22 NV34 1
805 402 402 ZT10
55C3> 18D5<> FBBA<3> 1 8 RFBBA<3> 21C2< 21C6< 55C3>
+2_5V_MAIN NV34 RP84 22 1/16W 5% SM1 ZT12 1
55C3> 18D5<> FBBA<4> 3 6 RFBBA<4> 21C2< 21C6< 55C3>
1/16W 5% SM1 RP84 22 NV34 1
1 ZT17
R36 NVIDIA VREF 55C3> 18D5<> FBBA<5> 4 5 RFBBA<5> 21C2< 21C6< 55C3>
0 1
5%
1/16W NOSTUFF
NV34 RP84 22 1/16W 5% SM1
ZT14
MF 55C3> 18D5<> FBBA<6> NO_TEST 2 7 RFBBA<6> 21C2< 21C6< 55C3>
2 402 R49
B MEMREFN1 1
0 2 55C3> 18D5<> FBBA<7>
1/16W 5% SM1 RP83 22
4 5
NV34 ZT16
1
1
RFBBA<7> 21C2< 21C6< 55C3> B
5%
1/16W
NV34 RP83 22 1/16W 5% SM1 ZT18
NOSTUFF 1
R41 1
MF 55C3> 18D5<> FBBA<8> 3 6 RFBBA<8> 21C2< 21C6< 55C3>
1K C54 402
1
U7 1% 0.1UF 1/16W 5% SM1 RP83 22 NV34 ZT15
TLV431A 1/16W 20%
10V 55C3> 18D5<> FBBA<9> 2 7 RFBBA<9> 21C2< 21C6< 55C3>
3 SOT MF 2 CERM R50 NV34 RP83 22 1
2 402 402 0
1/16W 5% SM1 ZT9
4 MEMREFN2 1 2 55C3> 18D5<> FBBA<10> 1 8 RFBBA<10> 21C2< 21C6< 55C3>
NOSTUFF 5% 1/16W 5% SM1 RP8 22 NV34 1
5 1
R463 1/16W ZT13
1 C510 1 C509 MF 55C3> 18C5<> FBBA<11> 1 8 RFBBA<11> 21C2< 21C6< 55C3>
100PF 1K 0.1UF 402
5% 1%
1/16W 20% NV34 RP8 22 1/16W 5% SM1
50V 10V FBBA<12> 2 7 NO_TEST NC_RFBBA<12>
2 CERM MF 2 CERM 55C3> 18C5<>
402 2 402 402 1/16W 5% SM1 RP8 22 NV34 ZT4 1
55C3> 18C5<> FBBBA<0> 3 6 RFBBBA<0> 21C2< 21C6< 55C3>
18D7< FBCAL_CLK_GND
55C3> 18C5<> FBBBA<1>
NV34 RP8 22
4 5
1/16W 5% SM1 ZT7 1
RFBBBA<1> 21C2< 21C6< 55C3>
NVIDIA FRAME BUFFER
18D7< FBCAL_TERM_GND
1/16W 5% SM1
18D7< FBCAL_PU_GND
WEAK PULL-DOWN LAST_MODIFIED=Wed Sep 17 12:16:07 2003
1 1 1 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
R95 R83 R88 RECOMMENDED BY NVIDIA NV34 1 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
49.9 0 549
FBBCKE R62 ZT19 RFBBCKE AGREES TO THE FOLLOWING
1% 5% 1% 55B3> 18C4<> 21C2< 21C6< 55B3>
1/16W 1/16W 1/16W 2 22 1
MF MF MF
A
2 402 2 402 2 402
1 NV34
R61
1/16W
402
5%
MF
A
10K
1% SIZE DRAWING NUMBER REV.
1/16W
MF
2 402
APPLE COMPUTER INC.
E 051-6497 13
SCALE SHT OF
NONE 18 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
PLACE R’S BETWEEN GPU & MEMORY

55D3> 18G8<> FBD<0> 15 1 8 RP20 RFBD<0> 20C5<> 55D3> 55D3> 18F8<> FBD<32> 15 1 8 RP29 RFBD<32> 20C1<> 55D3>
55D3> 18G8<> FBD<1> NO_TEST 15 2 7 RP20 RFBD<1> 20C5<> 55D3> 55D3> 18F8<> FBD<33> NO_TEST 15 2 7 RP29 RFBD<33> 20C1<> 55D3>
55D3> 18G8<> FBD<4> NO_TEST 15 1 8 RP19 RFBD<4> 20C5<> 55D3> 55D3> 18F8<> FBD<36> 15 1 8 RP27 RFBD<36> 20C1<> 55D3>
55D3> 18G8<> FBD<5> 15 2 7 RP19 RFBD<5> 20C5<> 55D3> 55D3> 18F8<> FBD<37> NO_TEST 15 3 6 RP27 RFBD<37> 20C1<> 55D3>
55D3> 18G8<> FBD<6> NO_TEST 15 3 6 RP19 RFBD<6> 20C5<> 55D3> 55D3> 18F8<> FBD<38> 15 2 7 RP27 RFBD<38> 20C1<> 55D3> PLACE R’S CLOSE TO GPU
15 RP19 15 RP27
D 55D3> 18G8<> FBD<7>
55D3> 18G8<> FBD<8>
NO_TEST
NO_TEST 15
4
1
5
8 RP21
RFBD<7> 20C5<> 55D3>
RFBD<8> 20C5<> 55D3>
55D3>
55D3>
18F8<> FBD<39>
18F8<> FBD<40>
NO_TEST
NO_TEST 15
4
1
5
8 RP28
RFBD<39>
RFBD<40>
20C1<> 55D3>
20C1<> 55D3> R123
D
55D3> 18G8<> FBD<9> 15 2 7 RP21 RFBD<9> 20C5<> 55D3> 55D3> 18F8<> FBD<41> 15 2 7 RP28 RFBD<41> 20C1<> 55D3> 15 1
15 RP21 15 RP28 55C3> 18D7> FBACLK1 2 RFBACLK1 20C2< 55C3>
55D3> 18G8<> FBD<10> NO_TEST 3 6 RFBD<10> 20C5<> 55D3> 55D3> 18F8<> FBD<42> NO_TEST 3 6 RFBD<42> 20C1<> 55D3>
RP21 RP28 1%
55D3> 18G8<> FBD<11> NO_TEST 15 4 5 RFBD<11> 20C5<> 55D3> 55D3> 18F8<> FBD<43> NO_TEST 15 4 5 RFBD<43> 20C1<> 55D3> 1/16W
RP18 RP97 MF
55D3> 18G8<> FBD<12> NO_TEST 15 1 8 RFBD<12> 20C5<> 55D3> 55D3> 18F8<> FBD<44> 15 1 8 RFBD<44> 20C1<> 55D3> 402 R1581
55D3> 18G8<> FBD<13> 15 2 7 RP18 RFBD<13> 20C5<> 55D3> 55D3> 18E8<> FBD<45> NO_TEST 15 2 7 RP97 RFBD<45> 20C1<> 55D3> 100
55D3> 18G8<> FBD<14> NO_TEST 15 3 6 RP18 RFBD<14> 20C5<> 55D3> 55D3> 18E8<> FBD<46> NO_TEST 15 3 6 RP97 RFBD<46> 20C1<> 55D3>
1%
1/16W
PLACE 100OHM TERM AT RAM
MF
402 2
55D3> 18G8<> FBD<16> 15 1 8 RP91 RFBD<16> 20C5<> 55D3> 55D3> 18E8<> FBD<48> 15 1 8 RP25 RFBD<48> 20C1<> 55D3> R132
15 RP91 15 RP25 15 1
55D3> 18G8<> FBD<17> NO_TEST 2 7 RFBD<17> 20C5<> 55D3> 55D3> 18E8<> FBD<49> NO_TEST 2 7 RFBD<49> 20C1<> 55D3> 55C3> 18D7> FBACLK1_L 2 RFBACLK1_L 20C2< 55C3>
55D3> 18G8<> FBD<18> NO_TEST 15 3 6 RP91 RFBD<18> 20C5<> 55D3> 55D3> 18E8<> FBD<50> NO_TEST 15 3 6 RP25 NO_TESTRFBD<50> 20C1<> 55D3> 1%
RP91 RP25 1/16W
55D3> 18G8<> FBD<19> NO_TEST 15 4 5 RFBD<19> 20C5<> 55D3> 55D3> 18E8<> FBD<51> NO_TEST 15 4 5 RFBD<51> 20C1<> 55D3> MF
55D3> 18G8<> FBD<20> 15 1 8 RP90 RFBD<20> 20C5<> 55D3> 55D3> 18E8<> FBD<52> NO_TEST 15 1 8 RP96 RFBD<52> 20C1<> 55D3>
402
55D3> 18G8<> FBD<21> NO_TEST 15 2 7 RP90 RFBD<21> 20C5<> 55D3> 55D3> 18E8<> FBD<53> 15 2 7 RP96 RFBD<53> 20C1<> 55D3>
RP90 RP96 R148
55D3> 18G8<> FBD<23> NO_TEST 15 4 5 RFBD<23> 20C5<> 55D3> 55D3> 18E8<> FBD<55> NO_TEST 15 4 5 RFBD<55> 20C1<> 55D3> 15 1
15 RP92 15 RP26 55C3> 18D7> FBACLK0 2 RFBACLK0 20C6< 55C3>
55D3> 18G8<> FBD<24> 1 8 RFBD<24> 20C5<> 55D3> 55D3> 18E8<> FBD<56> 1 8 RFBD<56> 20C1<> 55D3>
RP92 RP26 1%
55D3> 18F8<> FBD<25> NO_TEST 15 2 7 RFBD<25> 20C5<> 55D3> 55D3> 18E8<> FBD<57> NO_TEST 15 2 7 RFBD<57> 20C1<> 55D3> 1/16W
RP92 RP26 MF
55D3> 18F8<> FBD<26> NO_TEST 15 3 6 RFBD<26> 20B5<> 55D3> 55D3> 18E8<> FBD<58> NO_TEST 15 3 6 RFBD<58> 20B1<> 55D3> 402
R5001
55D3> 18F8<> FBD<27> NO_TEST 15 4 5 RP92 RFBD<27> 20B5<> 55D3> 55D3> 18E8<> FBD<59> NO_TEST 15 4 5 RP26 RFBD<59> 20B1<> 55D3> 100
55D3> 18F8<> FBD<28> 15 1 8 RP17 RFBD<28> 20B5<> 55D3> 55D3> 18E8<> FBD<60> 15 1 8 RP24 RFBD<60> 20B1<> 55D3>
1%
1/16W
PLACE 100OHM TERM AT RAM
55D3> 18F8<> FBD<29> NO_TEST 15 2 7 RP17 RFBD<29> 20B5<> 55D3> 55D3> 18E8<> FBD<61> NO_TEST 15 2 7 RP24 RFBD<61> 20B1<> 55D3>
MF
402 2
55D3> 18F8<> FBD<30> 15 3 6 RP17 RFBD<30> 20B5<> 55D3> 55D3> 18E8<> FBD<62> NO_TEST 15 3 6 RP24 RFBD<62> 20B1<> 55D3> R156
15 RP17 15 RP24 15 1
55D3> 18F8<> FBD<31> NO_TEST 4 5 RFBD<31> 20B5<> 55D3> 55D3> 18E8<> FBD<63> NO_TEST 4 5 RFBD<63> 20B1<> 55D3> 55C3> 18D7> FBACLK0_L 2 RFBACLK0_L 20C6< 55C3>
1%
1/16W
MF
C 55C3> 18G5<> FBD<64> 15 1 8 RP10 NV34

RFBD<64> 21C5<> 55C3> FBD<96>
55C3> 18F5<> 15 1 8 RP88 NV34 RFBD<96> 21C1<> 55C3>
402
C
55C3> 18G5<> FBD<65> NO_TEST 15 2 7 RP10 NV34
RFBD<65> 21C5<> 55C3> FBD<97>
55C3> 18F5<> NO_TEST 15 2 7 RP88 NV34 RFBD<97> 21C1<> 55C3> NV34 R106
15 RP10 NV34 15 RP88 NV34 15 1
55C3> 18G5<> FBD<66> NO_TEST 3 6 RFBD<66> 21C5<> 55C3> 55C3> 18F5<> FBD<98> NO_TEST 3 6 RFBD<98> 21C1<> 55C3> 55B3> 18C5<> FBBCLK1 2 RFBBCLK1 21C2< 55B3>
55C3> 18G5<> FBD<67> 15 4 5 RP10 NV34
RFBD<67> 21C5<> 55C3> 55C3> 18F5<> FBD<99> NO_TEST 15 4 5 RP88 NV34 RFBD<99> 21C1<> 55C3> 1%
RP14 NV34 RP89 NV34 1/16W NV34
55C3> 18G5<> FBD<68> 15 1 8 RFBD<68> 21C5<> 55C3> 55C3> 18F5<> FBD<100> NO_TEST 15 1 8 RFBD<100> 21C1<> 55C3> MF
RFBD<69> 21C5<> 55C3> 55C3> 18F5<> FBD<101> 15 2 7 RP89 NV34 RFBD<101> 21C1<> 55C3>
402
R201
15 RP14 NV34 15 RP89 NV34 100
55C3> 18G5<> FBD<70> NO_TEST 3 6 RFBD<70> 21C5<> 55C3> 55C3> 18F5<> FBD<102> NO_TEST 3 6 RFBD<102> 21C1<> 55C3> 1% PLACE 100OHM TERM AT RAM
RFBD<71> 21C5<> 55C3> 55C3> 18F5<> FBD<103> NO_TEST 15 4 5 RP89 NV34 RFBD<103> 21C1<> 55C3> 1/16W
MF
RFBD<72> 21C5<> 55C3> 55C3> 18F5<> FBD<104> 15 1 8 RP4 NV34 RFBD<104> 21C1<> 55C3> NV34
402 2
RP82 NV34 RP4 NV34 R105
55C3> 18G5<> FBD<73> NO_TEST 15 3 6 RFBD<73> 21C5<> 55C3> 55C3> 18F5<> FBD<105> NO_TEST 15 2 7 RFBD<105> 21C1<> 55C3> 15 1
15 RP82 NV34 15 RP4 NV34 55B3> 18C5<> FBBCLK1_L 2 RFBBCLK1_L 21C2< 55B3>
55C3> 18G5<> FBD<74> NO_TEST 2 7 RFBD<74> 21C5<> 55C3> 55C3> 18F5<> FBD<106> NO_TEST 3 6 RFBD<106> 21C1<> 55C3>
55C3> 18G5<> FBD<75> 15 1 8 RP82 NV34
RFBD<75> 21C5<> 55C3> 55C3> 18F5<> FBD<107> NO_TEST 15 4 5 RP4 NV34 RFBD<107> 21C1<> 55C3>
1%
1/16W
RP12 NV34 RP86 NV34 MF
55C3> 18G5<> FBD<76> 15 1 8 RFBD<76> 21C5<> 55C3> 55C3> 18F5<> FBD<108> 15 1 8 RFBD<108> 21C1<> 55C3> 402
RFBD<77> 21C5<> 55C3> 55C3> 18E5<> FBD<109> NO_TEST 15 2 7 RP86 NV34 RFBD<109> 21C1<> 55C3>
RFBD<79> 21C5<> 55C3> 55C3> 18E5<> FBD<111> NO_TEST 15 4 5 RP86 NV34 RFBD<111> 21C1<> 55C3> NV34 R103
15 RP11 NV34 15 RP5 NV34 15 1
55C3> 18G5<> FBD<80> 1 8 RFBD<80> 21C5<> 55C3> 55C3> 18E5<> FBD<112> 1 8 RFBD<112> 21C1<> 55C3> 55B3> 18C5<> FBBCLK0 2 RFBBCLK0 21C6< 55B3>
RFBD<81> 21C5<> 55C3> 55C3> 18E5<> FBD<113> NO_TEST 15 2 7 RP5 NV34 RFBD<113> 21C1<> 55C3> 1%
RP11 NV34 RP5 NV34 1/16W
55C3> 18G5<> FBD<82> NO_TEST 15 3 6 RFBD<82> 21C5<> 55C3> 55C3> 18E5<> FBD<114> NO_TEST 15 3 6 RFBD<114> 21C1<> 55C3> MF NV34
402
R4031
15 RP80 NV34 15 RP6 NV34 100
55C3> 18G5<> FBD<84> 4 5 RFBD<84> 21C5<> 55C3> 55C3> 18E5<> FBD<116> 1 8 RFBD<116> 21C1<> 55C3> 1% PLACE 100OHM TERM AT RAM
RFBD<85> 21C5<> 55C3> 55C3> 18E5<> FBD<117> NO_TEST 15 2 7 RP6 NV34 RFBD<117> 21C1<> 55C3> 1/16W
MF
RFBD<86> 21C5<> 55C3> 55C3> 18E5<> FBD<118> NO_TEST 15 3 6 RP6 NV34 RFBD<118> 21C1<> 55C3> NV34
402 2
RP80 NV34 RP6 NV34 R104
55C3> 18G5<> FBD<87> NO_TEST 15 1 8 RFBD<87> 21C5<> 55C3> 55C3> 18E5<> FBD<119> NO_TEST 15 4 5 RFBD<119> 21C1<> 55C3> 15 1
15 RP81 NV34 15 RP7 NV34 55B3> 18C5<> FBBCLK0_L 2 RFBBCLK0_L 21C6< 55B3>
55C3> 18G5<> FBD<88> NO_TEST 4 5 RFBD<88> 21C5<> 55C3> 55C3> 18E5<> FBD<120> 1 8 RFBD<120> 21C1<> 55C3>
RP81 NV34 RP7 NV34 1%
15 15
B 55C3>
55C3>
18F5<> FBD<89>
18F5<> FBD<90> NO_TEST 15
3
2
6
7 RP81 NV34
RFBD<89>
RFBD<90>
21C5<> 55C3>
21B5<> 55C3>
55C3> 18E5<> FBD<121>
55C3> 18E5<> FBD<122>
NO_TEST
NO_TEST 15
2
3
7
6 RP7 NV34
RFBD<121> 21C1<> 55C3>
RFBD<122> 21B1<> 55C3>
1/16W
MF
402
B
55C3> 18F5<> FBD<91> NO_TEST 15 1 8 RP81 NV34
RFBD<91> 21B5<> 55C3> 55C3> 18E5<> FBD<123> NO_TEST 15 4 5 RP7 NV34 RFBD<123> 21B1<> 55C3>
RFBD<92> 21B5<> 55C3> 55C3> 18E5<> FBD<124> 15 1 8 RP87 NV34 RFBD<124> 21B1<> 55C3>
55C3> 18F5<> FBD<95> 15 4 5 RP13 NV34
RFBD<95> 21B5<> 55C3> 55C3> 18E5<> FBD<127> 15 4 5 RP87 NV34 RFBD<127> 21B1<> 55C3>
PLACE THESE R CLOSE TO GPU PLACE THESE R CLOSE TO SGRAM PLACE THESE R CLOSE TO GPU PLACE THESE R CLOSE TO SGRAM
R122 R483 R63 NV34 R428 NV34
0 1 NO_TEST 15 2 0 1 NO_TEST 15 2
55C3> 18C7<> FBDQS<0> 55C3> 2 FBDQSTERM<0> 1 RFBDQS<0> 20C6<> 55C3> 55B3> 18D4<> FBDQS<8> 55B3> 2 FBDQSTERM<8> 1 RFBDQS<8> 21C6<> 55B3>
5% 1% 5% NV34 1%
R101 1/16W R509 1/16W NV34 R65 1/16W R415 1/16W
0 1 MF NO_TEST 15 2 MF 0 MF NO_TEST 15 2 MF
55C3> 18C7<> FBDQS<1> 2 402 55C3> FBDQSTERM<1> 1 402 RFBDQS<1> 20C6<> 55C3> 55B3> 18D4<> FBDQS<9> 2 1 402 55B3> FBDQSTERM<9> 1 402 RFBDQS<9> 21C6<> 55B3>
5% 1% 5% 1%
1/16W
MF R97 1/16W
MF R479 1/16W
MF R69 NV34 1/16W
MF R416 NV34
402 0 NO_TEST 402 15 2 402 0 1 NO_TEST 402 15 2
55C3> 18C7<> FBDQS<2> 55C3> 2 1 FBDQSTERM<2> 1 RFBDQS<2> 20C6<> 55C3> 55B3> 18D4<> FBDQS<10> 55B3> 2 FBDQSTERM<10> 1 RFBDQS<10> 21C6<> 55B3>
5% 1% 5% NV34 1%
R81 1/16W R506 1/16W NV34 R68 1/16W R429 1/16W
0 MF NO_TEST 15 2 MF 0 MF NO_TEST 15 2 MF
55C3> 18C7<> FBDQS<3> 2 1 402 55C3> FBDQSTERM<3> 1 402 RFBDQS<3> 20C6<> 55C3> 55B3> 18D4<> FBDQS<11> 2 1 402 55B3> FBDQSTERM<11> 1 402 RFBDQS<11> 21C6<> 55B3>
5% 1% 5% 1%
1/16W 1/16W 1/16W 1/16W
MF R167 MF R187 MF R53 NV34 MF R31 NV34
402 0 1 NO_TEST 402 15 2 402 0 1 NO_TEST 402 15
55C3> 18C7<> FBDQS<4> 55C3>
R159
2
5%
1/16W
FBDQSTERM<4>
R146
1
1%
1/16W
RFBDQS<4> 20C2<> 55C3> 55B3> 18D4<> FBDQS<12>
NV34
55B3> 2
R55 5%
1/16W
FBDQSTERM<12>
NV34 R25
1
1%
1/16W
2 RFBDQS<12> 21C2<> 55B3>
FB TERMINATION
A 55C3> 18C7<> FBDQS<5> 2
0 1 MF NO_TEST
402 55C3> FBDQSTERM<5> 1
15 2 MF
402 RFBDQS<5> 20C2<> 55C3> 55B3> 18D4<> FBDQS<13> 2
0 1
MF
402
NO_TEST
55B3> FBDQSTERM<13> 1
15 2
MF
402 RFBDQS<13> 21C2<> 55B3>
A
5% 1% 5% 1%
1/16W
MF R147 1/16W
MF R186 1/16W
MF R57 NV34 1/16W
MF R24 NV34 LAST_MODIFIED=Wed Sep 17 12:16:10 2003
402 0 1 NO_TEST 402 15 2 402 0 1 NO_TEST 402 15 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
55C3> 18C7<> FBDQS<6> 55C3> 2 FBDQSTERM<6> 1 RFBDQS<6> 20C2<> 55C3> 55B3> 18D4<> FBDQS<14> 55B3> 2 FBDQSTERM<14> 1 2 RFBDQS<14> 21C2<> 55B3> AGREES TO THE FOLLOWING
5% 1% NV34 5% NV34 1% I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
R140 1/16W R153 1/16W R60 1/16W R32 1/16W
0 1 MF NO_TEST 15 2 MF 0 MF NO_TEST 15 MF II NOT TO REPRODUCE OR COPY IT
55C3> 18C7<> FBDQS<7> 2 402 55C3> FBDQSTERM<7> 1 402 RFBDQS<7> 20C2<> 55C3> 55B3> 18D4<> FBDQS<15> 2 1 402 55B3> FBDQSTERM<15> 1 2 402 RFBDQS<15> 21C2<> 55B3>
5% 1% 5% 1%
1/16W 1/16W 1/16W 1/16W
MF MF MF MF SIZE DRAWING NUMBER REV.
402 402 402 402
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 19 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
+2_5V_MAIN +2_5V_MAIN +2_5V_MAIN

PLACE NEAR VDD PINS PLACE NEAR VDD PINS
C521 C520 C216 C205

1 C540 1 C544 1 C532 1 C533 1 C158 1 C142 1 C144 1 C143 1 10UF 1 10UF 1 10UF 1 10UF
0.1UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.1UF 0.001UF N20P80% N20P80% N20P80% N20P80%
20%
10V
20%
10V
20%
10V
10%
50V
20%
10V
20%
10V
20%
10V
10%
50V 10V 10V 10V 10V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 Y5V 2 Y5V 2 Y5V 2 Y5V
402 402 402 402 402 402 402 402 805 805 805 805
D +2_5V_MAIN D
+2_5V_MAIN SEE_TABLE
SEE_TABLE
U41
U12 SDRAM_DDR_4MX32
SDRAM_DDR_4MX32 BGA
BGA D7
(2 OF 2)
E5
(2 OF 2)
D7 E5 SEE_TABLE
D8 E7 SEE_TABLE
D8 E7
E4 E8
E4 E8 U12
SDRAM_DDR_4MX32 E11 E10 U41
E11 E10 BGA VDD SDRAM_DDR_4MX32
VDD 55D3> 20D2< 18F2<> RFBA<0> N5 A0 (1 OF 2)
L4 K6 BGA
L4 K6 VSS 55D3> 20D6< 18F2<> RFBA<0> N5 A0 (1 OF 2)
VSS 55D3> 20C2< 18F2<> RFBA<1> N6 A1 DQ0 B7 RFBD<0> 19D7< 55D3> L7 K7
L7 K7 55D3> 20C6< 18F2<> RFBA<1> N6 A1 DQ0 B7 RFBD<32> 19D4< 55D3>
55D3> 20C2< 18F2<> RFBA<2> M6 A2 DQ1 C6 RFBD<1> 19D7< 55D3> L8 K8
L8 K8 55D3> 20C6< 18F2<> RFBA<2> M6 A2 DQ1 C6 RFBD<33> 19D4< 55D3>
55D3> 20C2< 18F2<> RFBA<3> N7 A3 DQ2 B6 RFBD<2> 19D7< 55D3> L11 K9
L11 K9 55D3> 20C6< 18F2<> RFBA<3> N7 A3 DQ2 B6 RFBD<34> 19D4< 55D3>
55D3> 20C2< 18F2<> RFBA<4> N8 A4 DQ3 B5 RFBD<3> 19D7< 55D3> L5
L5 C3 55D3> 20C6< 18F2<> RFBA<4> N8 A4 DQ3 B5 RFBD<35> 19D4< 55D3>
C3 55D3> 20C2< 18F2<> RFBA<5> M9 A5 DQ4 C2 RFBD<4> 19D7< 55D3> L10
L10 C5 55D3> 20C6< 18F2<> RFBA<5> M9 A5 DQ4 C2 RFBD<36> 19D4< 55D3>
C5 55D3> 20C2< 18E2<> RFBA<6> N9 A6 DQ5 D3 RFBD<5> 19D7< 55D3> C7 F6 55D3> 20C6< 18E2<> RFBA<6> N9 A6 DQ5 D3 RFBD<37> 19D4< 55D3>
C7 F6 55D3> 20C2< 18E2<> RFBA<7> N10 A7 DQ6 D2 RFBD<6> 19D7< 55D3> C8 F7 55D3> 20C6< 18E2<> RFBA<7> N10 A7 DQ6 D2 RFBD<38> 19D4< 55D3>
C8 F7 55D3> 20C2< 18E2<> RFBA<8> N11 A8 DQ7 E2 RFBD<7> 19D7< 55D3> C10 F8 55D3> 20C6< 18E2<> RFBA<8> N11 A8 DQ7 E2 RFBD<39> 19D4< 55D3>
C10 F8 55D3> 20C2< 18E2<> RFBA<9> M8 A9 DQ8 K13 RFBD<8> 19D7< 55D3> C12 F9 55D3> 20C6< 18E2<> RFBA<9> M8 A9 DQ8 K13 RFBD<40> 19D4< 55D3>
C12 F9 55D3> 20C2< 18E2<> RFBA<10> L6 A10 DQ9 K12 RFBD<9> 19D7< 55D3> E3 G6 55D3> 20C6< 18E2<> RFBA<10> L6 A10 DQ9 K12 RFBD<41> 19D4< 55D3>
E3 G6 55D3> 20C2< 18E2<> RFBA<11> M7 A11 DQ10 J13 RFBD<10> 19D7< 55D3> E12 G7 55D3> 20C6< 18E2<> RFBA<11> M7 A11 DQ10 J13 RFBD<42> 19D4< 55D3>
E12 G7 DQ11 J12 RFBD<11> 19D7< 55D3> VDDQ
VDDQ 55C3> 19A6< RFBDQS<0> B2 DQS0 F4 G8 DQ11 J12 RFBD<43> 19D4< 55D3>
F4 G8 DQ12 G13 RFBD<12> 19D7< 55D3> 55C3> 19A6< RFBDQS<4> B2 DQS0
55C3> 19A6< RFBDQS<1> H13 DQS1 F11 VSS_THERM G9 DQ12 G13 RFBD<44> 19D4< 55D3>
F11 VSS_THERM G9 DQ13 G12 RFBD<13> 19D7< 55D3> 55C3> 19A6< RFBDQS<5> H13 DQS1
55C3> 19A6< RFBDQS<2> H2 DQS2 G4 H6 DQ13 G12 RFBD<45> 19D4< 55D3>
G4 H6 DQ14 F13 RFBD<14> 19D7< 55D3> 55C3> 19A6< RFBDQS<6> H2 DQS2
55C3> 19A6< RFBDQS<3> B13 DQS3 G11 H7 DQ14 F13 RFBD<46> 19D4< 55D3>
DQ15 RFBD<15> 19D7< 55D3> RFBDQS<7> DQS3
C G11
J4
H7
H8 55D3> 18G2< RFBDQM<0> B3 DM0 DQ16
F12
F3 RFBD<16> 19D7< 55D3> J11
J4 H8
H9
55C3> 19A6<
55D3> 18G2< RFBDQM<4>

B13
B3 DM0
DQ15
DQ16
F12
F3
RFBD<47>
RFBD<48>
19D4< 55D3>
19D4< 55D3>
C
J11 H9 55D3> 18G2< RFBDQM<1> H12 DM1 DQ17 F2 RFBD<17> 19D7< 55D3> K4 J6 55D3> 18G2< RFBDQM<5> H12 DM1 DQ17 F2 RFBD<49> 19D4< 55D3>
K4 J6 55D3> 18G2< RFBDQM<2> H3 DM2 DQ18 G3 RFBD<18> 19D7< 55D3> K11 J7 55D3> 18G2< RFBDQM<6> H3 DM2 DQ18 G3 RFBD<50> 19D4< 55D3>
K11 J7 55D3> 18G2< RFBDQM<3> B12 DM3 DQ19 G2 RFBD<19> 19C7< 55D3> J8 55D3> 18G2< RFBDQM<7> B12 DM3 DQ19 G2 RFBD<51> 19C4< 55D3>
J8 DQ20 J3 RFBD<20> 19C7< 55D3> 52A6> 20C8< 20A3< SGRAVREF N13 VREF
20C4< 20A3< SGRAVREF N13 VREF 55D3> 20C2< 18E2<> RFBABA<0> N4 BA0 J9 DQ20 J3 RFBD<52> 19C4< 55D3>
52A6> J9 DQ21 J2 RFBD<21> 19C7< 55D3> 55D3> 20C6< 18E2<> RFBABA<0> N4 BA0
55D3> 20C2< 18E2<> RFBABA<1> M5 BA1 C2202 DQ21 J2 RFBD<53> 19C4< 55D3>
DQ22 K2 RFBD<22> 19C7< 55D3> 1 B4 55D3> 20C6< 18E2<> RFBABA<1> M5 BA1
1 C2201 B4
0.1UF DQ22 K2 RFBD<54> 19C4< 55D3>
0.1UF RFBACLK0
55C3> 19C1< M11 CK DQ23 K3 RFBD<23> 19C7< 55D3> B11
B11 20%
10V 55C3> 19D1< RFBACLK1 M11 CK DQ23 K3 RFBD<55> 19C4< 55D3>
20% 55C3> 19C1< RFBACLK0_L M12 CK DQ24 E13 RFBD<24> 19C7< 55D3> 2 CERM D4
2 10V
CERM
D4
402 55C3> 19D1< RFBACLK1_L M12 CK DQ24 E13 RFBD<56> 19C4< 55D3>
402 55C3> 20C2< 18D2<> RFBACKE N12 CKE DQ25 D13 RFBD<25> 19C7< 55D3> D5
D5 55C3> 20C6< 18D2<> RFBACKE N12 CKE DQ25 D13 RFBD<57> 19C4< 55D3>
55C3> 20B2< 18F2<> RFBACS0_L N2 CS DQ26 D12 RFBD<26> 19C7< 55D3> D6
D6 55C3> 20B6< 18F2<> RFBACS0_L N2 CS DQ26 D12 RFBD<58> 19C4< 55D3>
55D3> 20B2< 18G2<> RFBARAS_L M2 RAS DQ27 C13 RFBD<27> 19C7< 55D3> D9
D9 55D3> 20B6< 18G2<> RFBARAS_L M2 RAS DQ27 C13 RFBD<59> 19C4< 55D3>
55D3> 20B2< 18G2<> RFBACAS_L L2 CAS DQ28 B10 RFBD<28> 19C7< 55D3> D10
D10 55D3> 20B6< 18G2<> RFBACAS_L L2 CAS DQ28 B10 RFBD<60> 19C4< 55D3>
55D3> 20B2< 18F2<> RFBAWE_L L3 WE DQ29 B9 RFBD<29> 19C7< 55D3> D11
D11 55D3> 20B6< 18F2<> RFBAWE_L L3 WE DQ29 B9 RFBD<61> 19C4< 55D3>
NO_TEST DQ30 C9 RFBD<30> 19C7< 55D3> E6
E6 NC_FB1<0> C4
VSSQ NO_TEST DQ30 C9 RFBD<62> 19C4< 55D3>
VSSQ NO_TEST DQ31 B8 RFBD<31> 19C7< 55D3> E9 NC_FB2<0> C4
E9 NC_FB1<1> C11 DQ31 B8 RFBD<63> 19C4< 55D3>
NO_TEST
F5 NC_FB2<1> NO_TEST C11
F5 NC_FB1<2> H4 MCL M13
NO_TEST
NO_TEST
F10 NC_FB2<2> H4 MCL M13
F10 NC_FB1<3> H11
NO_TEST RFU1 L9 NO_TEST NC_FB1<9> G5 NC_FB2<3> NO_TEST H11
NO_TEST
G5 NC_FB1<4> L12
NC NO_TEST NO_TEST RFU1 L9 NC_FB2<9>
NO_TEST RFU2 M10 NC_FB1<10> G10 NC_FB2<4> L12
NC NO_TEST
G10 NC_FB1<5> L13 RFU2 M10 NC_FB2<10>
NO_TEST
H5 NC_FB2<5> NO_TEST L13
H5 NC_FB1<6> M3
NO_TEST
NO_TEST
H10 NC_FB2<6> M3
H10 NC_FB1<7> M4
NO_TEST
NO_TEST
J5 NC_FB2<7> M4
J5 NC_FB1<8> N3
NO_TEST
J10
J10 NC_FB2<8> N3
K5
K5
K10
B +2_5V_MAIN
K10
+2_5V_MAIN
B
1 C569 1 C568 1 C567 1 C566 1 C554 1 C545 1 C535 1 C534 1 C553 1 C565 1 C194 1 C198 1 C174 1 C166 1 C141 1 C165 1 C173 1 C197 1 C196 1 C195
0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF 0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF
10% 20% 20% 10% 20% 20% 10% 20% 20% 10% 10% 20% 20% 10% 20% 20% 10% 20% 20% 10%
2 50V
CERM 2 10V
CERM
10V
2 CERM 2 50V
CERM 2 10V
CERM 2 10V
CERM 2 50V
CERM 2 10V
CERM 2 10V
CERM 2 50V
CERM
50V
2 CERM 2 10V
CERM 2 10V
CERM 2 50V
CERM 2 10V
CERM 2 10V
CERM 2 50V
CERM 2 10V
CERM 2 10V
CERM 2 50V
CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402
+2_5V_MAIN
SEE_TABLE
SGRAM0 & SGRAM1 MEMORY SUPPORT

1
R152
1K
SGRAM0 & SGRAM1 VREF
5%
1/16W MEMREFG_ACT
PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION MF
2 402 R151
333S0249 2 SDRAM,4MX32,DDR,275MHZ U12,U41 CRITICAL SAMSUNG_275_32M 0 2
MEMREFG1 1 SGRAVREF 20C4< 20C8< 52A6>
333S0250 2 SDRAM,4MX32,DDR,275MHZ U12,U41 CRITICAL HYNIX_275_32M 5%
1/16W
1 MEMREFG_PAS MF
333S0251 2 SDRAM,4MX32,DDR,300MHZ U12,U41 CRITICAL SAMSUNG_300_32M MEMREFG_ACT R163 1 C157 402
U16 1K 0.1UF
1% 20% MEMREFG_PAS
333S0252 2 SDRAM,4MX32,DDR,300MHZ U12,U41 HYNIX_300_32M
CRITICAL TLV431A
3 SOT
1/16W
MF
2 402
2 10V
CERM
402
R166
0 2
SGRAM0 & SGRAM1
A 4 MEMREFG2 1
5% NOTICE OF PROPRIETARY PROPERTY
A
5 MEMREFG_ACT 1 MEMREFG_PAS 1/16W
1 C191 R176 1 C172 MF LAST_MODIFIED=Wed Sep 17 12:16:13 2003
100PF 1K 0.1UF 402 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1% PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
SGRAM0 & SGRAM1 DDR MEMORY REFERENCE SUPPORT 5%
2 50V
1/16W
MF
20%
2 10V
CERM CERM
PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION 402 2 402 402 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
116S1103 1 RES,1K-OHM,5%,1/16W,0402 R152 MEMREFG_ACT III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

116S1000 1 RES,0-OHM,5%,1/16W,0402 R152 MEMREFG_PAS
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 20 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
+2_5V_MAIN +2_5V_MAIN +2_5V_MAIN

PLACE NEAR VDD PINS PLACE NEAR VDD PINS
64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP
64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP

C460 C38 C15 C492
1 C467 1 C487 1 C493 1 C494 1 C17 1 C39 1 C21 1 C32 1 10UF 1 10UF 1 10UF 1 10UF
0.1UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.1UF 0.001UF N20P80% N20P80% N20P80% N20P80%
20%
10V
20%
10V
20%
10V
10%
50V
20%
10V
20%
10V
20%
10V
10%
50V 10V 10V 10V 10V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 Y5V 2 Y5V 2 Y5V 2 Y5V
402 402 402 402 402 402 402 402 805 805 805 805
D +2_5V_MAIN D
+2_5V_MAIN SEE_TABLE
U5 U36
SDRAM_DDR_4MX32 SDRAM_DDR_4MX32
BGA BGA
(2 OF 2) (2 OF 2)
D7 E5 D7 SEE_TABLE E5
SEE_TABLE
D8 E7 D8 E7
E4 E8 U5 E4 E8
SDRAM_DDR_4MX32 U36
E11 E10 BGA E11 E10 SDRAM_DDR_4MX32
VDD RFBBA<0>
55C3> 21D2< 18C2<> N5 A0 (1 OF 2)
VDD BGA
L4 K6 L4 K6 55C3> 21D6< 18C2<> RFBBA<0> N5 A0 (1 OF 2)
VSS RFBBA<1>
55C3> 21C2< 18B2<> N6 A1 SEE_TABLE DQ0 B7 RFBD<64> 19C7< 55C3> VSS
L7 K7 L7 K7 55C3> 21C6< 18B2<> RFBBA<1> N6 A1 DQ0 B7 RFBD<96> 19C4< 55C3>
55C3> 21C2< 18B2<> RFBBA<2> M6 A2 DQ1 C6 RFBD<65> 19C7< 55C3>
L8 K8 L8 K8 55C3> 21C6< 18B2<> RFBBA<2> M6 A2 DQ1 C6 RFBD<97> 19C4< 55C3>
55C3> 21C2< 18B2<> RFBBA<3> N7 A3 DQ2 B6 RFBD<66> 19C7< 55C3>
L11 K9 L11 K9 55C3> 21C6< 18B2<> RFBBA<3> N7 A3 DQ2 B6 RFBD<98> 19C4< 55C3>
55C3> 21C2< 18B2<> RFBBA<4> N8 A4 DQ3 B5 RFBD<67> 19C7< 55C3>
L5 L5 55C3> 21C6< 18B2<> RFBBA<4> N8 A4 DQ3 B5 RFBD<99> 19C4< 55C3>
C3 55C3> 21C2< 18B2<> RFBBA<5> M9 A5 DQ4 C2 RFBD<68> 19C7< 55C3> C3
L10 L10 55C3> 21C6< 18B2<> RFBBA<5> M9 A5 DQ4 C2 RFBD<100> 19C4< 55C3>
C5 55C3> 21C2< 18B2<> RFBBA<6> N9 A6 DQ5 D3 RFBD<69> 19C7< 55C3> C5
55C3> 21C6< 18B2<> RFBBA<6> N9 A6 DQ5 D3 RFBD<101> 19C4< 55C3>
C7 F6 55C3> 21C2< 18B2<> RFBBA<7> N10 A7 DQ6 D2 RFBD<70> 19C7< 55C3> C7 F6
55C3> 21C6< 18B2<> RFBBA<7> N10 A7 DQ6 D2 RFBD<102> 19C4< 55C3>
C8 F7 55C3> 21C2< 18B2<> RFBBA<8> N11 A8 DQ7 E2 RFBD<71> 19C7< 55C3> C8 F7
55C3> 21C6< 18B2<> RFBBA<8> N11 A8 DQ7 E2 RFBD<103> 19C4< 55C3>
C10 F8 55C3> 21C2< 18B2<> RFBBA<9> M8 A9 DQ8 K13 RFBD<72> 19C7< 55C3> C10 F8
55C3> 21C6< 18B2<> RFBBA<9> M8 A9 DQ8 K13 RFBD<104> 19C4< 55C3>
C12 F9 55C3> 21C2< 18B2<> RFBBA<10> L6 A10 DQ9 K12 RFBD<73> 19C7< 55C3> C12 F9
55C3> 21C6< 18B2<> RFBBA<10> L6 A10 DQ9 K12 RFBD<105> 19C4< 55C3>
E3 G6 55C3> 21C2< 18B2<> RFBBA<11> M7 A11 DQ10 J13 RFBD<74> 19B7< 55C3> E3 G6
55C3> 21C6< 18B2<> RFBBA<11> M7 A11 DQ10 J13 RFBD<106> 19B4< 55C3>
E12 G7 DQ11 J12 RFBD<75> 19B7< 55C3> E12 G7
VDDQ 55B3> 19A3< RFBDQS<8> B2 DQS0 VDDQ DQ11 J12 RFBD<107> 19B4< 55C3>
F4 G8 DQ12 G13 RFBD<76> 19B7< 55C3> F4 G8 55B3> 19A3< RFBDQS<12> B2 DQS0
55B3> 19A3< RFBDQS<9> H13 DQS1 DQ12 G13 RFBD<108> 19B4< 55C3>
F11 VSS_THERM G9 DQ13 G12 RFBD<77> 19B7< 55C3> F11 VSS_THERM G9 55B3> 19A3< RFBDQS<13> H13 DQS1
55B3> 19A3< RFBDQS<10> H2 DQS2 DQ13 G12 RFBD<109> 19B4< 55C3>
G4 H6 DQ14 F13 RFBD<78> 19B7< 55C3> G4 H6 55B3> 19A3< RFBDQS<14> H2 DQS2
55B3> 19A3< RFBDQS<11> B13 DQS3 DQ14 F13 RFBD<110> 19B4< 55C3>
DQ15 RFBD<79> 55B3> 19A3< RFBDQS<15> DQS3
C G11
J4
H7
H8 55C3> 18D2< RFBDQM<8> B3 DM0 DQ16
F12
F3 RFBD<80>
19B7< 55C3>
19B7< 55C3>
G11
J4
H7
H8
55C3> 18D2< RFBDQM<12>
B13
B3 DM0
DQ15
DQ16
F12
F3
RFBD<111> 19B4< 55C3>
RFBD<112> 19B4< 55C3>
C
J11 H9 55C3> 18D2< RFBDQM<9> H12 DM1 DQ17 F2 RFBD<81> 19B7< 55C3> J11 H9
55C3> 18D2< RFBDQM<13> H12 DM1 DQ17 F2 RFBD<113> 19B4< 55C3>
K4 J6 55C3> 18D2< RFBDQM<10> H3 DM2 DQ18 G3 RFBD<82> 19B7< 55C3> K4 J6
55C3> 18C2< RFBDQM<14> H3 DM2 DQ18 G3 RFBD<114> 19B4< 55C3>
K11 J7 55C3> 18D2< RFBDQM<11> B12 DM3 DQ19 G2 RFBD<83> 19B7< 55C3> K11 J7
55C3> 18C2< RFBDQM<15> B12 DM3 DQ19 G2 RFBD<115> 19B4< 55C3>
J8 DQ20 J3 RFBD<84> 19B7< 55C3> J8
21C4< 21A3< SGRBVREF N13 VREF 55C3> 21C2< 18A2<> RFBBBA<0> N4 BA0 52A6> 21C8< 21A3< SGRBVREF N13 VREF DQ20 J3 RFBD<116> 19B4< 55C3>
52A6> J9 DQ21 J2 RFBD<85> 19B7< 55C3> J9 55C3> 21C6< 18A2<> RFBBBA<0> N4 BA0
55C3> 21C2< 18A2<> RFBBBA<1> M5 BA1 DQ21 J2 RFBD<117> 19B4< 55C3>
DQ22 K2 RFBD<86> 19B7< 55C3> 64M_GRAM_DECOUP 55C3> 21C6< 18A2<> RFBBBA<1> M5 BA1
64M_GRAM_DECOUP B4 B4 DQ22 K2 RFBD<118> 19B4< 55C3>
RFBBCLK0
55B3> 19B1< M11 CK DQ23 K3 RFBD<87> 19B7< 55C3> 1 C2302
1 C2301 B11
0.1UF B11 55B3> 19C1< RFBBCLK1 M11 CK DQ23 K3 RFBD<119> 19B4< 55C3>
0.1UF 55B3> 19B1< RFBBCLK0_L M12 CK DQ24 E13 RFBD<88> 19B7< 55C3>
D4 20% D4 55B3> 19B1< RFBBCLK1_L M12 CK DQ24 E13 RFBD<120> 19B4< 55C3>
20%
10V 55B3> 21C2< 18A2<> RFBBCKE N12 CKE DQ25 D13 RFBD<89> 19B7< 55C3> 2 10V
CERM
2 CERM D5
402
D5 55B3> 21C6< 18A2<> RFBBCKE N12 CKE DQ25 D13 RFBD<121> 19B4< 55C3>
55B3> 21B2< 18C2<> RFBBCS0_L N2 CS DQ26 D12 RFBD<90> 19B7< 55C3>
402 D6 D6 55B3> 21B6< 18C2<> RFBBCS0_L N2 CS DQ26 D12 RFBD<122> 19B4< 55C3>
55B3> 21B2< 18C2<> RFBBRAS_L M2 RAS DQ27 C13 RFBD<91> 19B7< 55C3>
D9 D9 55B3> 21B6< 18C2<> RFBBRAS_L M2 RAS DQ27 C13 RFBD<123> 19B4< 55C3>
55B3> 21B2< 18C2<> RFBBCAS_L L2 CAS DQ28 B10 RFBD<92> 19B7< 55C3>
D10 D10 55B3> 21B6< 18C2<> RFBBCAS_L L2 CAS DQ28 B10 RFBD<124> 19B4< 55C3>
55B3> 21B2< 18C2<> RFBBWE_L L3 WE DQ29 B9 RFBD<93> 19B7< 55C3>
D11 D11 55B3> 21B6< 18C2<> RFBBWE_L L3 WE DQ29 B9 RFBD<125> 19B4< 55C3>
NO_TEST DQ30 C9 RFBD<94> 19B7< 55C3>
E6 NC_FB3<0> C4 E6
NO_TEST DQ30 C9 RFBD<126> 19B4< 55C3>
VSSQ NO_TEST DQ31 B8 RFBD<95> 19B7< 55C3> VSSQ NC_FB4<0> C4
E9 NC_FB3<1> C11 E9 DQ31 B8 RFBD<127> 19B4< 55C3>
NO_TEST NC_FB4<1> NO_TEST C11
F5 NC_FB3<2> H4 MCL M13 F5
NO_TEST
NO_TEST NC_FB4<2> H4 MCL M13
F10 NC_FB3<3> H11 F10
NO_TEST RFU1 L9 NO_TEST NC_FB3<9> NC_FB4<3> NO_TEST H11
NO_TEST
G5 NC_FB3<4> L12
NC NO_TEST
G5
NO_TEST RFU1 L9 NC_FB4<9>
NO_TEST RFU2 M10 NC_FB3<10> NC_FB4<4> L12
NC NO_TEST
G10 NC_FB3<5> L13 G10 RFU2 M10 NC_FB4<10>
NO_TEST NC_FB4<5> NO_TEST L13
H5 NC_FB3<6> M3 H5
NO_TEST
NO_TEST NC_FB4<6> M3
H10 NC_FB3<7> M4 H10
NO_TEST
NO_TEST NC_FB4<7> M4
J5 NC_FB3<8> N3 J5
NO_TEST
J10 J10
NC_FB4<8> N3
K5 K5
B +2_5V_MAIN
K10
+2_5V_MAIN
K10
B
64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP 64M_GRAM_DECOUP
1 C470 1 C462 1 C488 1 C466 1 C461 1 C469 1 C475 1 C486 1 C476 1 C489 1 C16 1 C22 1 C23 1 C40 1 C29 1 C34 1 C33 1 C20 1 C31 1 C28
0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF 0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF
10% 20% 20% 10% 20% 20% 10% 20% 20% 10% 10% 20% 20% 10% 20% 20% 10% 20% 20% 10%
2 50V
CERM 2 10V
CERM 2 10V
CERM 2 50V
CERM 2 10V
CERM 2 10V
CERM 2 50V
CERM 2 10V
CERM 2 10V
CERM 2 50V
CERM 2 50V
CERM 2 10V
CERM 2 10V
CERM 2 50V
CERM 2 10V
CERM 2 10V
CERM 2 50V
CERM 2 10V
CERM 2 10V
CERM 2 50V
CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402
SGRAM0 & SGRAM1 MEMORY SUPPORT +2_5V_MAIN

PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION SEE_TABLE
333S0249 2 SDRAM,4MX32,DDR,275MHZ U5,U36 CRITICAL SAMSUNG_275_64M

1
R18
1K
SGRAM2 & SGRAM3 VREF
5%
333S0250 2 SDRAM,4MX32,DDR,275MHZ U5,U36 CRITICAL HYNIX_275_64M 1/16W MEMREFG_ACT_64M
MF
333S0251 2 SDRAM,4MX32,DDR,300MHZ U5,U36 CRITICAL SAMSUNG_300_64M 2 402 R17
0
MEMREFG3 1 2 SGRBVREF
333S0252 2 SDRAM,4MX32,DDR,300MHZ U5,U36 CRITICAL HYNIX_300_64M
64M_GRAM_DECOUP 5%
1/16W
21C4< 21C8< 52A6>
SGRAM2 & SGRAM3
A MEMREFG_ACT_64M
1
R6
1K
MEMREFG_PAS_64M
1 C8
MF
402
A
U2 1% 0.1UF
TLV431A 1/16W 20% MEMREFG_PAS_64M LAST_MODIFIED=Wed Sep 17 12:16:15 2003
10V
3 SOT MF 2 CERM R5 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
SGRAM2 & SGRAM3 DDR MEMORY REFERENCE SUPPORT 2 402 402 0
4 MEMREFG4 1 2
PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION MEMREFG_ACT_64M 164M_GRAM_DECOUP MEMREFG_PAS_64M
5%
1/16W
5 1 R4 1 C9 II NOT TO REPRODUCE OR COPY IT
C11 MF
116S1103 1 RES,1K-OHM,5%,1/16W,0402 R18 MEMREFG_ACT_64M 100PF 1K 0.1UF 402 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
5% 1% 20%
1/16W
2 50V
CERM MF 2 10V
CERM SIZE DRAWING NUMBER REV.
116S1000 1 RES,0-OHM,5%,1/16W,0402 R18 MEMREFG_PAS_64M 402 2 402 402
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 21 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
U39
NV18B
24A7< GRAPH_DDC_SCL AG6 I2CC_SCL VIPPCLK L4 52A8> VIPCLK
BGA
24A7< GRAPH_DDC_SDA AG7 I2CC_SDA (2 OF 5) 1
R118
+3V_MAIN 25B6< MON_I2C_SCL AG5 I2CA_SCL
SEE_TABLE
VIPD0 J3 TESTPOINT VIPD0 26B7< 1%
10K
1/16W
R206 25B6< MON_I2C_SDA AF7 I2CA_SDA VIPD1 J2 TESTPOINT VIPD1 26B7< MF
1
10 2 VIPD2 K2 VIPD2 26B8< +3V_MAIN 2 402
NC_VIPHCLK TESTPOINT M5
VIPHCLK VIPD3 K1 VIPD3 26D7<
1%
1/16W 26D5< VIPHCTL TESTPOINT M4
VIPHCTL VIPD4 L3 VIPD4 26D7<
MF
603 1 C226 1 C212 1 C213 VIPD5 L2 VIPD5 26D7<
4.7UF 0.1UF 0.001UF 26B7< VIPHAD0 TESTPOINT P3
VIPHAD0 VIPD6 N2 VIPD6 26B8<
D
N20P80%
2 10V
CERM
805
20%
2 10V
CERM
402
10%
2 50V
CERM
402
26B7< VIPHAD1 TESTPOINT P2
VIPHAD1 VIPD7 N1 VIPD7 26C5<
1
R133
49.9
1C128
0.1UF
D
1% 20%
VIPVDDQ0 L6 1/16W
MF 2 10V
CERM
VIPVDDQ1 L7
2 402 402
R199 VIPVDDQ2 M7
10 2 52A6> NVPLLVDD AK7 PLLVDD
59B8> 57D5> 26B5< 25C6<> ANALOG_VSYNC* 1
VIPCAL_PD_VDDQ P6 VIP_PU
MF 1% 402
1/16W VIPCAL_PU_GND P7 VIP_PD
59B8> 57D5> 26B5< 25D6<> ANALOG_HSYNC* R200 1
10 2 SEE_TABLE +3V_MAIN
R1451
+3V_MAIN L13 SEE_TABLE MF 1/16W 1% 402
49.9
L68
100-OHM-EMI
100-OHM-EMI 1%
1/16W
MF 1 2
1 2 402 2
SM
57D5> VSYNC* AE3 DACB_VSYNC DACA_VSYNC AJ8 TESTPOINT NV11_VSYNC 26D3< 1 NOSTUFF 1 1
SM
1 1C164 1 HSYNC* AF3 AH9 NV11_HSYNC C227 C224 C206
C153 C163 57D5> DACB_HSYNC DACA_HSYNC TESTPOINT
26D3< 10UF 0.1UF 0.001UF
NOSTUFF 10UF 0.1UF 0.001UF N20P80% 20% 10%
L2401 N20P80% 20% 10% 10V 10V 50V
1000-OHM-EMI 10V
2 Y5V
10V
2 CERM
50V
2 CERM 52B6> DAC2VDD AB4 DACB_VDD DACA_VDD AG9 52B6> DACVDD
2 Y5V 2 CERM 2 CERM
805 402 402
1 2 805 402 402 (GND) AC4 DACB_IDUMP DACA_IDUMP AG10 (GND)
SM
57D5> 25C6< ANALOG_BLU AD1 DACB_BLUE DACA_BLUE AJ9 NV_BLUE2 NV_BLUE2 22C1<> 22C1<>
57D5> 25C6< ANALOG_GRN AD2 DACB_GREEN DACA_GREEN AJ10 NV_GREEN2 NV_GREEN2 22C1<> 22C1<>
57D5> 25B6< ANALOG_RED AE2 DACB_RED DACA_RED AK10 NV_RED2 NV_RED2 22C1<> 22C1<>
NOSTUFF 1
R178 NOSTUFF 1
R179 57D5> DAC2RSET AD3 DACB_RSET DACA_RSET AG8 DACRSET NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF
ROUTE THE RGB LINES C170 1
75 C207 1 75 57D5> DAC2VREF AB5 DACB_VREF DACA_VREF AH8 DACVREF 1
R555 1
R556 1
R557 1 C605 1 C606 1 C607
AS 75 OHM TRACES. 27PF 1% 1%
5%
50V 1/16W 27PF 1/16W 1
R183 75 75 75 27PF 27PF 27PF
5% 1 C228 5% 5% 5%
CERM 2 MF 50V MF
W7 NC_DACC_BLU 121 1% 1% 1%
2 50V 2 50V 2 50V
402 2 402 CERM 2 2 402 SEE_TABLE DVOVREF AF4 NC_DACC_BLUE NO_TEST
0.01UF 1/16W 1/16W 1/16W CERM CERM CERM
402 1 DVOVREF Y7 NC_DACC_GRN 10% 1% MF MF MF 402 402 402
C162 27B5< DVODE
NC_DACC_GREEN NO_TEST 1/16W 2 402 2 402 2 402
TESTPOINT AE4 2 16V
C NOSTUFF
C190 1
1
R173
75
5%
0.01UF
50V
2 CERM
27B5< DVOCLKOUT TESTPOINT AJ2
DVODE
DVOCLKOUT
NC_DACC_RED AA6 NO_TEST NC_DACC_RED CERM
402
MF
2 402 C
27PF 1% 27B6< DVOCLKOUT* TESTPOINTAK2
DVOCLKOUT*
5% 603 NC_DACC_RSET
50V 1/16W
DVOCLKIN AG1 NC_DACC_RSET AC5 NO_TEST
CERM 2 MF DVOCLKIN
402 2 402 27B5< 26D7< DVOHSYNC AD5
PLACE CLOSE TO GPU
DVOHSYNC
27B5< DVOVSYNC TESTPOINT AD6 DVOVSYNC
1NV18B
R174 STRAPS
PLACE CLOSE TO GPU
1K
1% 57C2> 27C5< 27A8< DVOD0 AG2 DVOD0
1/16W
SEE_TABLE SEE_TABLE MF 57C2> 27C5< 27A8< DVOD1 AH1 DVOD1
R5541 R5621 2 402 57C2> 27C5< 26D1< DVOD2 AG3 DVOD2
95.3 121
1% 1% 57C2> 27C5< 26D1< DVOD3 AJ1 DVOD3
1/16W 1/16W
MF MF 57C2> 27C5< 27A8< DVOD4 AH2 DVOD4
402 2 402 2
57C2> 27C5< 27A8< DVOD5 AK1 DVOD5 XTALSSIN AJ7 GPU_XTALSSIN 22A5< 52A8>
CVBS_D
3 57C2> 27C5< 27A8< DVOD6 AJ3 DVOD6 1
57C2> 27C5< 27A8< DVOD7 AK3 DVOD7 R188
D Q10 10K GPU_SS_NO
+3V_MAIN 57C2> 27C5< 26B1< DVOD8 AH4 DVOD8 1%
2N7002 XTALIN AJ6 57D5> NV11_XTALIN 1/16W
SM 57C2> 27C5< 27A8< DVOD9 AK4 DVOD9 MF
23D7<> CVBS_CNT 1 G S
2 402
57C2> 27B5< 27A8< DVOD10 AJ4 DVOD10
2 R1941 57C2> 27B5< 27A8< DVOD11 AH5 DVOD11 XTALOUT AH6 57D5> NV11_XTALOUT
10K +3V_MAIN AE8
1%
1/16W
MF AD8
402 2 DVOVDD XTALOUTBUFF AJ5 GPU_XTALOUTBUFF 22A8<
TABLE_5_HEAD
AD9 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
STRAP0 G1 GPU_STRAP<0> 26A4< R554

TABLE_5_ITEM
DVO_PU AB6 DVOCAL_PD_VDDQ 114S9531 1 RES 95.3 OHM,1%,1/16W,0402 NV18B

1R185 STRAP1 G2 GPU_STRAP<1> 26B3<
R191
1 DVO_PD AB7 DVOCAL_PU_GND R554
TABLE_5_ITEM
C209 1 10K NC_STRAP2 F2 GPU_STRAP<2> 26D3< 114S1302 1 RES 130 OHM,1%,1/16W,0402 NV34
0.1UF 10K
B 20%
10V
CERM 2
1%
1/16W
MF
1%
1/16W
MF 1 C1103
B1 BUFRST* NC_STRAP3 F3 GPU_STRAP<3> 26D3< 114S1212 1 RES 121 OHM,1%,1/16W,0402 R562 NV18B
TABLE_5_ITEM
TABLE_5_ITEM
B
402 402 2 2 402 0.1UF 114S1242 1 RES 124 OHM,1%,1/16W,0402 R562 NV34
THIS IS A HUGE 3A BEAD
HOW MUCH CURRENT DO WE NEED HERE?
20% TESTPOINT
10V
+3V_MAIN L33
GPU_SS 2 CERM
402 1
NC_BUF_RST NOTE: GPU_STRAP<3..2> ARE R569
R170 TRUELY NC PINS. BUT 5.1M 2
FERR-EMI-100-OHM MIN_LINE_WIDTH=25 49.9 1
TABLE_5_HEAD
1% WE’RE CONNECTING TO THEM PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
1 2 22A8< 22A6< +3V_GPU_SS 1/16W 5%
+3V_MAIN
TABLE_5_ITEM
MF AS A PRECAUTION 1/16W C162

SM MF 132S1045 1 CAP 0.01UF,50V,10%,0603 NV18B
2 402 603 TABLE_5_ITEM
NOTE: KEEP STUB SHORT -> 138S0518 1 CAP 1UF,10V,10%,0603 C162 NV34
GPU_SS GPU_SS
S1=M (NC) FOR -1.5% DOWN SPREAD 1

C368 1
C778 1 Y2
S0=1 (NVIDIA RECOMMENDATION) 0.1UF 4.7UF R171 SM-3
20%
10V
20%
6.3V 49.9 ADD DUAL LAYOUT SUPPORT 1 3
2 CERM 2 CERM 1%
402 805 1/16W FOR ALTERNATE CRYSTAL
S1=0 FOR +/-1.2% CENTER SPREAD MF
2 402
27.000M
S0=0 CRITICAL
7 1 C617 1 C616
VDD 22PF 22PF
GPU_SS GPU_SS 5% 5%
U9 50V
2 CERM
50V
2 CERM
R942 CY25811 CRITICAL GPU_SS 402 402
22 2 SOI
R957
22B4<> GPU_XTALOUTBUFF 1 GPU_SS_XIN 1
XIN/CLKIN
0 2 GPU_XTALSSIN
5%
1/16W
NC
8 XOUT
SSCLK 5 CLK27M_MEM_SS 1 22B2< 52A8>
MF 5%
402 GPU_SS 402
1
R952 NC
6 FRSEL 1/16W
22B7< 22A6< +3V_GPU_SS MF
0
NOSTUFF
5%
1/16W
MF
3
4
S1
S0
+3V_GPU_SS 22A8<
1
22B7<
DAC & CLOCKS
A 23D5<> NV_GPIOD7 1
R599
0 2 CY811_S1
2
402
VSS
2
5%
R954
0 NOSTUFF
A
1/16W
5%
402
MF LAST_MODIFIED=Wed Sep 17 12:16:17 2003
402 NOSTUFF THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1/16W
MF 1
NOSTUFF 2
R956 NVIDIA ASIC SUPPORT PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
R953 0 2
0 CY811_S0 1 NV_GPIOD8 23D5<> PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
5%
1/16W NOSTUFF 5% II NOT TO REPRODUCE OR COPY IT
MF 1
R955 402
1/16W
338S0119 1 IC,NV18B,GRPHCS CTLR U39 CRITICAL NV18B
2 0 MF
5% 338S0113 1 IC,NV34,GRPHCS CTLR U39 CRITICAL NV34
1/16W SIZE DRAWING NUMBER REV.
MF
2
402
D 051-6497 13
155S0141 1 FLTR,EMI,600 OHMS,.2A,0603 L2401 NOSTUFF APPLE COMPUTER INC.
SCALE SHT OF
155S0143 2 FLTR,EMI,1000 OHMS,.2A,0805 L13,L68 NONE 22 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
+3V_MAIN
+3V_MAIN
1 1
R208 R207
1 1
2K 2K
R91 R98 5% 5%
1/16W 1/16W
10K 10K MF MF
1% 1% 2 402 2 402
1/16W
MF
1/16W
MF U39 R9912
01 SI_SCA 27C5<
2 402 2 402 NV18B I2CB_SDA AF6 GRAPH_IIC_SDA2 NOSTUFF
29A3< LAMP_STS [IN] 47 1 2 R85 NV_GPIOD0 G5 GPIOD0 BGA I2CB_SCL AE7 GRAPH_IIC_SCL2 01 2 SI_SCL 27C5<
402 R990
D 59D6> 25C6< MON_DETECT [IN] MON_DETECT F4 GPIOD1
(5 OF 5) NOSTUFF
01 R961
D
47 IFPATXC W2 57D2> 23C2< GPU_TMDS_CKP TMDS_XMIT_GPU 2 TMDS_CKP 24B7<> 27C2< 57D2>
LCD_PWM [OUT] 1 2 R86 NV_GPIOD2 G4 GPIOD2
29A8<
402 IFPATXC* V1 57D2> 23C2< GPU_TMDS_CKM 01 R881TMDS_XMIT_GPU
2 TMDS_CKM 59A8>
24A7<> 27C2< 57D2>
FPD_PWR_ON [OUT] FPD_PWR_ON H5 59A8>
51B3< GPIOD3 IFPATXD0 U4 57D2> 23C2< GPU_TMDS_D0P 01
TMDS_XMIT_GPU 2 R962 TMDS_D0P 24B7<> 27C2< 57D2>
59B8>
22B7< CVBS_CNT H4 GPIOD4 IFPATXD0* T4 57D2> 23C2< GPU_TMDS_D0M 01 2 R946TMDS_XMIT_GPU TMDS_D0M 24B7<> 27C2< 57D2>
59A8>
29B8< INV_CUR_HI [OUT] 47 1 2 R112 NV_GPIOD5 J4 GPIOD5 IFPATXD1 Y2 57D2> 23C2< GPU_TMDS_D1P TMDS_XMIT_GPU 01 2 R963 TMDS_D1P 24C7<> 27C2< 57D2>
2 R947TMDS_XMIT_GPU
402 AA1 57D2> 23C2< GPU_TMDS_D1M 01 59B8>
TMDS_EN [IN]
J5
IFPATXD1* TMDS_D1M 24C7<> 27C2< 57D2>
51B1<> GPIOD6 59B8>
IFPATXD2 V3 57D2> 23C2< GPU_TMDS_D2P TMDS_XMIT_GPU 01 2 R964 TMDS_D2P 24D7<> 27C2< 57D2>
1 NV_GPIOD7 402 10K 1 2 R107 J6 GPIOD7 2 R960TMDS_XMIT_GPU
R92 22A8< W3 57D2> 23C2< GPU_TMDS_D2M 01 59B8>
IFPATXD2* TMDS_D2M 24D7<> 27C2< 57D2>
10K 402 10K 1 R113 59B8>
1% 22A6< NV_GPIOD8 2 K4 GPIOD8 5%
1/16W IFPATXD3 U5 NC_TMDS_TXD3P 1/16W
MF MF
402 10K 1 2 R115 NV_GPIOD9 K6 GPIOD9 IFPATXD3* V4 NC_TMDS_TXD3M 402
2 402
PLACE TMDS RESISTORS ON OPPOSITE SIDE TO TMDS
IFPBTXC AA2 NC_EXT_TMDS_CKP
NC_GPU_THERMC H3 THERMD- RESISTORS ON PAGE 29
IFPBTXC* Y3 NC_EXT_TMDS_CKM
NC_GPU_THERMA H2 THERMD+
IFPBTXD4 W4 NC_EXT_TMDS_D0P
+3V_MAIN 402 1K 1 2 R124 GPU_FPBCLK M3 FPBCLKOUT IFPBTXD4* V5 NC_EXT_TMDS_D0M
R1019 NV34 402 1K 1 2 R119 GPU_FPBCLK_L M2 FPBCLKOUT* NO_TEST NC_EXT_TMDS_D1P
1
10K 2
IFPBTXD5 AB3
402 1K R237 NV18B IFPBTXD5* AB2 NC_EXT_TMDS_D1M 52A6> 23A6< IFP0AVCC

1%
R1020NV34 1 2 GPU_SWAP_A AF9 SWAPRDY_A
1/16W
1 MF 10K 402 1K 1 2 R213 NV18B GPU_SWAP_B AD4 SWAPRDY_B IFPBTXD6 Y6 NC_EXT_TMDS_D2P
R184
10K
402 1 2
402 1K R564 IFPBTXD6* W6 NC_EXT_TMDS_D2M 57D2> 23D3<> GPU_TMDS_CKP TMDS_GPU_PU 49.9 1 2 R992
1% 1% 1 2 GPU_STEREO Y5 STEREO
2 R996
1/16W 1/16W 47 TMDS_GPU_PU 49.9
MF MF 402 1 2 R102 GPU_TESTMECLK G24 TESTMEMCLK IFPBTXD7 AC3 NC_TMDS_TXD7P 57D2> 23D3<> GPU_TMDS_CKM 1
402
2 402 IFPBTXD7* AC2 NC_TMDS_TXD7M
GPU_FW_PME_L AF10 NC_FRWR_PME* 57D2> 23D3<> GPU_TMDS_D0P TMDS_GPU_PU 49.9 1 2 R993
IFPCTXC NC_DFPCLK
C 52A6> 48C2<> 17D4< GRAPH_CORE
(+3V_MAIN)
N6 NC_FRWR_VAUXC
M6 NC_FRWR_VAUXP IFPCTXC*
P5
P4 NC_DFPCLK* 57D2> 23D3<> GPU_TMDS_D0M TMDS_GPU_PU 49.9 1 2 R997 C
402 10K 1 R114 GPULNKON NC_DFPD0
2 L5 NC_FRWRLNKON IFPCTXD0 R3
57D2> 23D3<> GPU_TMDS_D1P TMDS_GPU_PU 49.9 1 2 R994
1 C189 1 C160 NC_GPULPS NO_TEST N5 NC_FRWRLPS IFPCTXD0* T2 NC_DFPD1
2 R998
0.1UF 0.1UF TMDS_GPU_PU 49.9
57D2> 23D3<> GPU_TMDS_D1M 1
20%
10V
20%
10V IFPCTXD1 U2 NC_DFPD2
2 CERM 2 CERM
402 402 MAKE TP AS SHORT AS POSSIBLE IFPCTXD1* T3 NC_DFPD3 GPU_TMDS_D2P TMDS_GPU_PU 49.9 1 2 R995
57D2> 23D3<>
IFPCTXD2 U3 NC_DFPD5 GPU_TMDS_D2M TMDS_GPU_PU 49.9 1 2 R999
57D2> 23D3<>
IFPCTXD2* V2 NC_DFPD6 1%
1/16W
MAKE TP AS SHORT AS POSSIBLE MF
402
52A6> IFP0VREF AA4 IFPABVPROVE IFPCVPROBE AA3 NC_IFP1VREF
IFP0RSET V6 IFPABRSET IFPCRSET R4 NC_IFP1RSET
IFP0PLLVDD U10 IFPABPLLVDD IFPCPLLVDD P10 GPU_IFB1IOVDD

V10 IFPABPLLGND IFPCPLLGND N10
IFP0AVCC T5 IFPAIOVDD IFPCIOVDD R5 GPU_IFP1PLLVDD

SEE_TABLE T6 R6
1 NOSTUFF 1 IFPAIOGND IFPCIOGND
C125 1 1 R149 1 1 1
0.1UF C130 C152 R141 R157 R144
20% 0.1UF 0.1UF 1K
10V 20% 20% 1% 0 Y4 IFPBIOVDD 10K 10K
2 CERM 1/16W 5% 1% 1%
402 2 10V
CERM 2 10V
CERM MF 1/16W 1/16W 1/16W
W5 IFPBIOGND
402 402 2 402 MF MF MF
2 402 2 402 2 402
VOUT = 2.8V
B 1 C119
0.1UF
1 C131
B
+3V_MAIN 20%
10V
0.1UF
20%
2 CERM 10V
402 2 CERM
402
1
R246
TMDS_PLL_ACT 0
+5V_MAIN D10
5%
1/10W
FF
MBR0530 2 805
SM
2 1
VALUES CONTROL GPU TMDS SWING

TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION

TMDS_PLL_ACT TABLE_5_ITEM
114S1003 1 RES,1K,1%,1/16W,0402 R149 FPD_3V3

U20 TABLE_5_ITEM
LM1117 114S1503 1 RES,1.5K,1%,1/16W,0402 R149 FPD_12VM

SOT-223-4
3 IN OUT 2 IFP_AVCC
TMDS_PLL_ACT ADJ/GND
1 1 TMDS_PLL_ACT
C636 1 (SYM_VER1)
R602
22UF 100
20% 1%
2 10V 1/16W
TANT MF
SMB
2 402 L2501
IFP_VADJ FERR-EMI-100-OHM
1
1
SM
2 IFP0AVCC 23C1< 52A6> DVI AND STRAPS
A C2501 1
R592
124
1%
1
C635
22UF
1 C626
0.1UF
1 C618
0.001UF NOTICE OF PROPRIETARY PROPERTY
A
10UF 1/16W 20% 20% 10%
20%
6.3V
MF 2 10V
TANT 2 16V
CERM 2 50V
CERM
2 2 402 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
TANT SMB 603 402 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
SMA TMDS_PLL_ACT SEE_TABLE AGREES TO THE FOLLOWING
TMDS_PLL_ACT I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
THE STUFFING OF AN 0805 PACKAGE ONTO C635S LARGER TANT PADS IS CORRECT SIZE DRAWING NUMBER REV.
PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION

D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
132S1063 1 1UF,10%,10V,0805,CERM C635
NONE 23 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
L82
FERR-250-OHM
+3.3VFPD 1 2 INT_TMDS_3V
52B6> 51C1<>
SM
XMIT_RES
R603
D 59B8> 57D2> 27C2< 23D1< TMDS_D2P 1
0 2 TD2P D
1
R600
301 2 3
1%
1/16W
MF
L76
90-OHM
2 402 1 4 SM
SYM_VER-2 XMIT_CHOKE
R594
TMDS_D2M 1
0 2 TD2M
59B8> 57D2> 27C2< 23D1<
XMIT_RES
XMIT_RES
R593
TMDS_D1P 1
0 2 TD1P
59B8> 57D2> 27C2< 23D1<
1 2 3
R591
301
1%
L74
1/16W 90-OHM
1 4 SM
MF
2 402 SYM_VER-2 XMIT_CHOKE (518S0039)
J12
R582 FI-TWE21P-VF
0 2 TD1M
C 59B8> 57D2> 27C2< 23D1< TMDS_D1M 1
XMIT_RES
F-ST-SM
22
C
INT_TMDS_3V 1 59C8> 52A6> INT_TMDS_3V
2
3
4
5 57C5> TD2P
57C5> TD2M 6
7
57C5> TD1P 8
9 57C5> TD1M
10
11 57C5> TD0P
57C5> TD0M 12
13
57C5> TCKP 14
15 57C5> TCKM
16
17 59B8> 52B6> DDC_VCC_3
18
19 59C6> TMDS_DDC_CLK
59C6> TMDS_DDC_DAT 20
21 INT_TMDS_3V
XMIT_RES 43B7<
R581
23 29A3<
43A7<
1 C652 1 C107
0 2 TD0P 52C4 0.01UF 10UF
59B8> 57D2> 27C2< 23D1< TMDS_D0P 1 10% 10%
2 16V
CERM 2 16V
CERM
402 1210
1
R570 2 3
301 L71
1%
1/16W
MF 1 4
90-OHM
SM INTERNAL TMDS CONNECTOR
2 402 XMIT_CHOKE
SYM_VER-2
R568
0 2 TD0M
59A8> 57D2> 27C2< 23D1< TMDS_D0M 1
B XMIT_RES B
XMIT_RES
R567
0 2 TCKP
59A8> 57D2> 27C2< 23D1< TMDS_CKP 1
2 3
1
R559 L67
301 1 4
90-OHM
SM
1%
1/16W
MF XMIT_CHOKE
2 402 SYM_VER-1
R550 0 TCKM
59A8> 57D2> 27C2< 23D1< TMDS_CKM 1 2
XMIT_RES
R546
33 2 TMDS_DDC_DAT
22D5<> GRAPH_DDC_SDA 1
5%
1/16W
2 MF
R540
+3V_MAIN 2K
5%
402
1/16W
MF
1 402
L64
FERR-250-OHM TMDS/LVDS
A 1 2 DDC_VCC_3
A
SM
1 1 LAST_MODIFIED=Wed Sep 17 12:16:20 2003
R547 C610 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
0.01UF PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
2K 10% AGREES TO THE FOLLOWING
5% 16V
1/16W 2 CERM I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
MF 402
2 402 R551 II NOT TO REPRODUCE OR COPY IT
33 2 TMDS_DDC_CLK III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
22D5<> GRAPH_DDC_SCL 1
5% SIZE DRAWING NUMBER REV.
1/16W
MF
402 D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 24 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
52A3> 33A6<> 25C2< 25B5<> USB_PWR
D D6
D
BAV99DW
SOT-363
5
59B8> 57D5> 26B5< 22D7< ANALOG_HSYNC* 3 NOSTUFF

4
1 C421
22PF
5%
50V
2 CERM
PLACE 75 OHM TERMINATIONS 402 D7
NEAR GRAPHICS CHIP RGB PINS BAV99DW
SOT-363
THE RGB TRACES MUST BE GUARDBANDED 5
BY DACGND FROM THE GRAPHICS CHIP

59B8> 57D5> 26B5< 22D7< ANALOG_VSYNC* 3 NOSTUFF
4
1 C422
22PF
5%
2 50V
CERM
59D6> 23D7<> MON_DETECT 402 ALT
CHASSIS
J9
FL3 F-RT-TCX3160-110200
LCFILTER TH-4MT
SM-220MHZ
17
57D5> 22C7<> ANALOG_BLU 1 2
15
3 4
L9
1 11 59B6> VGA_IIC_CLK FERR-250-OHM
C 8 59B8> 52A6> DDC_VCC_5 1 2 USB_PWR 25B5<> 25D3<> 33A6<> 52A3>
C
MON_DETECT 13 2 ANALOG_VSYNC* SM
1 C423
14 (BLU_RTN)
FL2 59B8> 0.01UF
LCFILTER 57D5> FILT_ANALOG_BLU 9 3 ANALOG_HSYNC* 10%
16V
SM-220MHZ 6 (GRN_RTN) 2 CERM
36B6<> 36B6< 36B2< 36A7<> 402
33C2< 33B4< 33B2< 25B3<>
57D5> 22C7<> ANALOG_GRN 1 2 59B8> 57D5> FILT_ANALOG_GRN 7 10 59B6> VGA_IIC_DAT 33D4< 33D2< 33C4<
4 (RED_RTN)
52C4 36C1< 36C1<>
ALT
3 4 CHASSIS
59B8> 57D5> FILT_ANALOG_RED 5 12
16
FL4 18 C414 1 1 C432 1 C409

LCFILTER 0.01UF 0.01UF 0.01UF
SM-220MHZ 10% 10% 10%
16V 16V 16V
ANALOG_RED 1 2 CERM 2 2 CERM 2 CERM
57D5> 22C7<>
(514-0021) ALT
402 402 402
3 4 CHASSIS
36B6<>
33C4< 33C2< 33B4< 33B2< 25C3<
52A3> 33A6<> 25D3<> 25C2< USB_PWR 36B6< 36B2< 36A7<> 33D4< 33D2<
52C4 36C1< 36C1<>
D28
R7
1 1
R19 BAV99DW
SOT-363
2K 2K 5
5% 5%
1/16W 1/16W
ROUTE THE ANALOG RGB TRACES AT 75 OHMS. MF MF 3
402 2 2 402
B SEE THE EXTERNAL DESIGN GUIDE FOR LAYOUT DETAILS. R3
33
NOSTUFF
4
B
22D5<> MON_I2C_SDA 1 2
5%
1/16W
MF
402
D27
R2 BAV99DW
SOT-363
33
22D5<> MON_I2C_SCL 1 2 5
5%
1/16W 3 NOSTUFF
MF
402
4
EXTERNAL VGA CONNECTOR

C415 1 1 C416
47PF 47PF ALT
5% 5% CHASSIS
50V 50V
CERM 2 2 CERM
402 402
EXTERNAL VGA
A
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 25 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
+3V_MAIN +3V_MAIN
+3V_MAIN +3V_MAIN 2
R596 SEE_TABLE SEE_TABLE
10K 2 SEE_TABLE
2 2
1%
1/16W R598 R74 R236
MF 10K 10K 10K
1 402 1%
1/16W
1%
1/16W
1%
1/16W
MF MF
2 2 1 MF
R553 R533 22D5<> VIPHCTL 1 402 1 402 402
10K 10K SEE_TABLE
1% 1%
1/16W 1/16W NOSTUFF SEE_TABLE SEE_TABLE
MF MF 2
D 1 402 1 402
2
R595
1K
2
R583
10K
2
R77
10K
R535
10K
1%
D
1% 1% 1% 1/16W
1/16W 1/16W 1/16W
MF MF MF MF
2 2
R561 R125 1 402 1402 1402 1 402
10K 10K 22C4<> NV11_HSYNC
1% 1%
1/16W 1/16W
MF MF 22C4<> NV11_VSYNC
1402 1402 DVOD3 22B5<> 27C5< 57C2>
22B4<> GPU_STRAP<3>
DVOD2 22C5<> 27C5< 57C2>
18C8< ROMA15 27B5< 22C5> DVOHSYNC (5) HOST MODE 22B4<> GPU_STRAP<2>
18C8> ROMA14 22D4<> VIPD3 [0] = [VIPHCTL]
22D4<> VIPD5 0 = PCI MODE
SEE_TABLE
22D4<> VIPD4 * 1 = AGP MODE SEE_TABLE SEE_TABLE
1
2
R597 2
R73 R1022
1K
1K 1K 1%
1% 1% 1/16W
NOSTUFF 1/16W 1/16W MF
MF MF
2 2 2 402
R552 R126 1 402 1 402
1K
1%
1K
1% SEE_TABLE
SEE_TABLE
1/16W
MF
1/16W
MF +3V_MAIN 2
SEE_TABLE 2
R79
1
R1023
1 402 1 402 R588 1K 1K
1%
1K 1% 1/16W
NOSTUFF 1% 1/16W MF
NOSTUFF 1 1/16W MF
2 2 R142 MF 1 402 2 402
R560 R116 10K 1 402
1K 1K 1%
1% 1% 1/16W
1/16W 1/16W MF
MF MF 2 402
1 402 1 402
22D4<> VIPD7
(8) FRAME BUFFER MEMORY TYPE
[3..0] = [NV11_HSYNC,NV11_VSYNC,GPU_STRAP<3>,GPU_STRAP<2>]
C 2
R136 1111 = 222MHZ C
(1) ROM TYPE (OVERRIDDEN IF STRAP1 = 0) (3) PCI DEVICE ID 1K
1%
1101 = 275MHZ SAMSUNG
[1..0] = [ROMA15,ROMA14] [3..0] = [DVOHSYNC,VIPD3,VIPD5,VIPD4] 1/16W
MF
1100 = 275MHZ HYNIX
00 = PARALLEL 0010 = 0X112 GEFORCE2 GO 1 402 PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION
01 = SERIAL AT25F 0011 = 0X113 QUADRO2 GO
10 = SERIAL SST45VF 0100 = 0X114 NV17M 114S1004 5 RES,10KOHM,1%,0402 R598,R583,R77,R236,R535 SAMSUNG_NV18B_270
* 11 = SERIAL FUTURE 0000 = 0X110 GEFORCE2GO MX (NV11B)
114S1003 1 RES,1KOHM,1%,0402 R73 SAMSUNG_NV18B_270
* 1001 = NV18B,NV31,NV34
(6) AGP SIDEBAND 114S1004 4 RES,10KOHM,1%,0402 R598,R583,R236,R535 HYNIX_NV18B_270
[0] = [VIPD7]
* 0 = ENABLE AGP SIDEBAND 114S1003 2 RES,1KOHM,1%,0402 R73,R79 HYNIX_NV18B_270
1 = DISABLE AGP SIDEBAND
114S1004 5 RES,10KOHM,1%,0402 R598,R583,R535,R74,R77 SAMSUNG_NV34_270

+3V_MAIN 114S1003 1 RES,1KOHM,1%,0402 R1022
+3V_MAIN +3V_MAIN SAMSUNG_NV34_270
114S1004 4 RES,10KOHM,1%,0402 R583,R74,R77,R535 HYNIX_NV34_270
114S1003 2 RES,1KOHM,1%,0402 R597,R1022 HYNIX_NV34_270

2 NOSTUFF NOSTUFF NOSTUFF
R134 2
R399 2
R445 2
R427
10K
1%
1/16W
10K
1%
10K
5%
10K
5%
MF 1/16W 1/16W 1/16W
1 402 MF MF MF
1 402 1 402 1 402
B NOSTUFF
2
R542 2
R401
TMDS_XMIT_SI NOSTUFF
2
R439
+3V_MAIN B
10K 10K 10K
5% 5% 5%
1/16W 1/16W 1/16W
MF MF MF 2
1402 1402 1402 R543
22D4<> VIPD6 22B4<> GPU_STRAP<1> 10K NV18B
22D5<> VIPHAD1 59B8> 57D5> 25D6<> 22D7< ANALOG_HSYNC* 5%
1/16W
22D5<> VIPHAD0 59B8> 57D5> 25C6<> 22D7< ANALOG_VSYNC* MF
22D4<> VIPD2 1402
22D4<> VIPD1 2
R87
22D4<> VIPD0 1K
1% 57C2> 27C5< 22B5<> DVOD8
1/16W
MF
1 402 1
2 R1021
R100 2 2 2
NOSTUFF
* 1KNV34
1K R397 R449 R426 1%
1/16W
1%
1/16W 1K 1K 1K MF
402
MF 1% 1% 1% 2
1 402 1/16W
MF
1/16W
MF
1/16W
MF (9) SUB-VENDOR
1 402 1 402 1 402 [0] = [GPU_STRAP<1>]
TMDS_XMIT_GPU 0 = SYSTEM BIOS (VENDOR & SUBSYSTEM ID=0X0000)
NOSTUFF
2 2 2 1 = ADAPTER CARD VGA BIOS (VENDOR & SUBSYSTEM ID=0X54-0X57)
R541 R408 R443
1K 1K 1K FASTWR
1% 1% 1%
(2) CRYSTAL FREQUENCY SELECT 1/16W
MF
1/16W
MF
1/16W
MF
0 = ENABLE
[1..0] = [VIPD6,VIPD2] 1 402 1 402 1 402 1 = DISABLE
00 = 13.5MHZ +3V_MAIN
01 = 14.38MHZ
* 10 = 27MHZ
11 = {UNDEFINED} 2
R94
NVIDIA STRAPS 1
A (4) USER DEFINED STRAPS (7) TV MODE 10K
1% NOTICE OF PROPRIETARY PROPERTY
A
[3..0] = [VIPHAD1,VIPHAD0,VIPD1,VIPD0] [1..0] = [ANALOG_HSYNC*,ANALOG_VSYNC*] 1/16W
MF LAST_MODIFIED=Wed Sep 17 12:16:22 2003
00 = SECAM 1 402 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
01 = NTSC AGREES TO THE FOLLOWING
THESE BITS ARE UNDEFINED BUT THEY GPU_STRAP<0>
10 = PAL 22B4<> I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
MUST BE KEPT LOW DURING RESET
* 11 = DISABLED II NOT TO REPRODUCE OR COPY IT
(THESE RESISTORS ARE ALL NOSTUFF) (10) PCI ADDRESS BUS III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
[0] = [GPU_STRAP<0>] SIZE DRAWING NUMBER REV.
0 = REVERSED
* 1 = NORMAL D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 26 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
+3V_MAIN +3V_MAIN
TMDS_XMIT_SI_P
TMDS_XMIT_SI_P
L4 L88
FERR-EMI-100-OHM FERR-EMI-100-OHM
1 2 27B2< 3V_SI_VCC 1 2
3V_SI_AVCC
SM SM
C325 1 C366 1 C557 1 1 C583 1 C786 1 C984
10UF 100PF 100PF
20%
6.3V 2 5% 5% 100PF 100PF 10UF
50V 50V 5% 5% 20%
D
CERM
805 CERM 2
402
CERM 2
402
2 50V
CERM
402
2 50V
CERM
402
2 6.3V
CERM
805 D
TMDS_XMIT_SI_P TMDS_XMIT_SI_P TMDS_XMIT_SI_P TMDS_XMIT_SI_P TMDS_XMIT_SI_P TMDS_XMIT_SI_P
L87
FERR-EMI-100-OHM
TMDS_XMIT_SI_P
1 2 3V_SI_PLLVCC
SM NOTE:
C272 1 C360 1 C449 1 330OHM HI SWING
C113 1 10UF 100PF 100PF RESISTOR MAY NEED TO BE
10UF 20% 5% 5% HIGHER
20% 6.3V 2 50V 50V
6.3V 2 CERM CERM 2 CERM 2
CERM 805 402 402
805
TMDS_XMIT_SI_P TMDS_XMIT_SI_P TMDS_XMIT_SI_P
TMDS_XMIT_SI_P
PLL NOISE SHOULD BE LESS THAN 100MV PEAK-TO-PEAK 1

R972
330
5%
NOSTUFF NOSTUFF 1/16W
TMDS_XMIT_SI_P NOSTUFF MF
R967 1
R969 1 1 1
R971 2 402
4.7K 4.7K
R1001 4.7K
4.7K
28
46
PVCC2 40
34
AVCC 22
TMDS_XMIT_SI_P
5% 5% 5%
3
5%
1/16W 1/16W 1/16W 1/16W
PVCC1
AVCC
VCC
VCC
MF MF MF MF
402 2 402 2 402 2 2 402
23D2< SI_SCL 27 SCL/DK1 MSEN 48 NC

23D2< SI_SCA 26 SDA/DK0
IPD
NC 24 CTL3/A2 IPD
SI_I2C_OFF 25 ISEL/RST* IPD
44D3< 17B8< AGP_RESET_L 47 PD*
SI_EDGE 44 TXC+ 33 57C2> SI_TMDS_CKP
TMDS_XMIT_SI
22 1 2 R977TMDS_CKP23D1<
C 57C2> 27A8< 22C5<> DVOD0 18
EDGE/HTPLG
D0 U1 TXC- 32 57C2> SI_TMDS_CKM 22 1 2 R973 TMDS_XMIT_SI TMDS_CKM
24B7<> 57D2> 59A8>
23D1< 24A7<> 57D2> 59A8>
C
57C2> 27A8< 22C5<> DVOD1 17 D1 SIL1162 TX0+ 36 57C2> SI_TMDS_D0P TMDS_XMIT_SI 22 1 2 R978 TMDS_D0P 23D1< 24B7<> 57D2> 59B8>
57C2> 26D1< 22C5<> DVOD2 16 D2 TSSOP TX0- 35 57C2> SI_TMDS_D0M 22 1 2 R974 TMDS_XMIT_SI TMDS_D0M 23D1< 24B7<> 57D2> 59A8>
57C2> 26D1< 22B5<> DVOD3 15 D3 57C2> SI_TMDS_D1P 22 1 R979 TMDS_D1P
TX1+ 39 TMDS_XMIT_SI 2 23D1< 24C7<> 57D2> 59B8>
57C2> 27A8< 22B5<> DVOD4 14 D4 TMDS_XMIT_SI_P 57C2> SI_TMDS_D1M 22 1 R975 TMDS_D1M
TX1- 38 2 TMDS_XMIT_SI 23D1< 24C7<> 57D2> 59B8>
57C2> 27A8< 22B5<> DVOD5 13 D5 CRITICAL
57C2> 27A8< 22B5<> DVOD6 10 D6 TX2+ 42 57C2> SI_TMDS_D2P TMDS_XMIT_SI 22 1 2R980 TMDS_D2P 23D1< 24D7<> 57D2> 59B8>
57C2> 27A8< 22B5<> DVOD7 9 D7 TX2- 41 57C2> SI_TMDS_D2M 22 1 2 R976 TMDS_XMIT_SI TMDS_D2M 23D1< 24D7<> 57D2> 59B8>
57C2> 26B1< 22B5<> DVOD8 8 D8 5%
1/16W
57C2> 27A8< 22B5<> DVOD9 7 D9 MF
402
57C2> 27A8< 22B5<> DVOD10 6 D10
57C2> 27A8< 22B5<> DVOD11 5 D11
22C5<> DVODE 19 DE PLACE TMDS RESISTORS ON OPPOSITE SIDE TO TMDS
26D7< 22C5> DVOHSYNC 20 HSYNC SI_EXT_SWING_SET RESISTORS ON PAGE 25
EXT_SWING 30
R1000 22C5> DVOVSYNC 21 VSYNC
SI_SWING_LO 0 22C5> DVOCLKOUT 12 IDCK+ VREF 2
22C5<> DVOCLKOUT* 1 2 SI_IDCK_M 11 IDCK- 3V_SI_VCC
THRML
27D3<
5%
PGND
PGND
AGND
AGND
AGND
1/16W
PAD
GND
GND
GND
MF
402 SEE_TABLE
R10031
29
45
31
43
37
1
23
4
49
1K
1%
1/16W
MF
402 2
TABLE_5_HEAD

TMDS_XMIT_SI_P TMDS_XMIT_SI_P SI_VREF
B NOSTUFF
R9651 R9661
NOSTUFF
R9681 R9701 R10021
SI_SWING_HI
SI_SWING_LO
114S1003 1 RES,1K,1%,1/16W,0402 R1003 SI_SWING_LO
TABLE_5_ITEM
TABLE_5_ITEM
B
1
4.7K
5%
4.7K
5%
4.7K
5%
4.7K
5%
0 R1004 116S1000 1 RES,0 OHM,1%,1/16W,0402 R1003 SI_SWING_HI
1/16W 1/16W 1/16W 1/16W

5%
1/16W
1K
MF MF MF MF MF 1%
402 2 402 2 402 2 402 2 402 2 1/16W
MF
402 2
SILICON IMAGE 1162 TMDS

+3V_MAIN
2 2 2 2
R250 R238 R563 R537
10K 10K 10K 10K
1% 1% 1% 1%
1/16W 1/16W 1/16W 1/16W
MF MF MF MF
1402 1 402 1 402 1402
2 2 2 2 2
R548 R248 R243 R241 R244
10K 10K 10K 10K 10K
1% 1% 1% 1% 1%
1/16W 1/16W 1/16W 1/16W 1/16W
MF MF MF MF MF
1 402 1 402 1402 1402 1 402
DVOD11
57C2> 27B5< 22B5<>
57C2> 27B5< 22B5<> DVOD10 NVIDIA STRAPS 2
DVOD9
A 57C2> 27C5< 22B5<>

A
57C2> 27C5< 22B5<> DVOD7
DVOD6 LAST_MODIFIED=Wed Sep 17 12:16:24 2003
57C2> 27C5< 22B5<> THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
57C2> 27C5< 22B5<> DVOD5 AGREES TO THE FOLLOWING
57C2> 27C5< 22B5<> DVOD4 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
57C2> 27C5< 22C5<> DVOD1
57C2> 27C5< 22C5<> DVOD0
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
UNDEFINED RESET CONFIGURATION STRAPS NONE 27 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
+2_5V_MAIN R630
4.7
52D3> 30D5< 16D6< 9D4< +1_5V_INTREPID_PLL 1 2 +1_5V_INTREPID_PLL8 52D3> +3V_MAIN I2C 2 PULL-UPS +3V_MAIN
R571 R586 1
5%
1/16W C3005 1
RP39
1
0 2
C623 1 15.8K C713 1 MF
402 0.1UF 10K R264
0.01uF 1% 0.1UF 20% NC_RPT48P1 NO_TEST 1 8 4.7K 1
5% U19 10%
16V 1/16W 20%
10V
10V
CERM 2 59A8> 39B1<> 34B5< 29C7<> 28A3<> INT_I2C_CLK2 2
1/16W
MF LT1962-ADJ CERM 2
402
MF
402 2
CERM 2
402
R629 402 INT_PLL9_GND 28A4<> 5%
1/16W RP39 5%
603 LT1962_INT_VIN MSOP 4.7 SM1 1/16W
+1_8V_MAIN 8 IN OUT 1 1 C233 1 2 +1_5V_INTREPID_PLL4 52D3>
59C6> 29C5<> 28C3<> COMM_GPIO_L 2
10K 7
MF
402
NOSTUFF 10UF 5%
R572 NC_UT6P7 NO_TEST 7 NC 20%
2 6.3V C704 1 1/16W
MF
C3004 1
RP39 5%
1/16W R641
0 ADJ 2 LT1962_INT_ADJ CERM 402 0.1UF SM1 4.7K 1
1 2 NC_UT6P6 NO_TEST 6 NC 805 0.1UF 20% 10K 39B1<> 34B5< 29C7<> 28A3<> INT_I2C_DATA2 2
20%
10V
10V
CERM 2
NC_RP3319 NO_TEST 4 5 59A8>
5%
1/16W BYP 3 LT1962_INT_BYP
R590 1 CERM 2 R628 402 INT_PLL7_GND 28A4<> 5%
5%
1/16W
D
MF
603 C234 1
1UF
5 SHDN GND 4 56.2K
1%
402
1
4.7 2 +1_5V_INTREPID_PLL3 52D3>
1/16W
SM1
RP39
10K
MF
402 D
1/16W 5% 59C6> 29C7<> 28C3<> COMM_TRXC 3 6
10%
10V 2 MF
402 2 C703 1 1/16W
MF
C3003 1
5%
RP117
X5R 0.1UF 10K
603 0.1UF
20%
402
20%
10V
R755 1/16W
SM1 59D6> 29D7<> 28C5<> COMM_SHUTDOWN 4 5
10V CERM 2 SNF_FSEL 1K
CERM 2
402
R620 402 INT_PLL3_GND 28A4<> 28C5<> 2 1 5%
1/16W
4.7 1% SM1
1 2 +1_5V_INTREPID_PLL2 52D3> 1/16W
MF R756
5%
1/16W C3002 1 28B5<> VCORE_VGATE
402
2
10K 1 RP117
MF 10K
C692 1 402 0.1UF 1% 35B8< 28B5<> INT_ENET_RST_L 3 6
20%
INTREPID DEBUG HOOKS 0.1UF
20%
10V
CERM 2
1/16W
MF
402
5%
10V 402 1/16W
+3V_MAIN PLL TEST FUNCTION CERM 2 R565 INT_PLL2_GND 28A5<> SM1
402 4.7
HWPLL_TESTMUXSEL[0:5] 1 2 +1_5V_INTREPID_PLL1 52D3> RP117
5% 10K
C229 1 1/16W C3001 1 INT_PLL1_GND 35B4> 28B5<> ENET_ENERGY_DET 1 8
NOSTUFF
1 1 1 1 1 1 1 1
0.1UF
20%
MF
402 0.1UF
20%
28A5<>
L16
+3V_MAIN 5%
R231 R678 R289 R292 R291 R274 R228 R232 10V
CERM 2
10V
CERM 2 FERR-EMI-100-OHM
1/16W
SM1
1K 1K 1K 1K 1K 1K 1K 1K 402 402
1% 1% 1% 1% 1% 1% 1% 1%
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 52A3> +3V_INTREPID_USB 1 2
RP117
MF MF MF MF MF MF MF MF
SM 10K
VDD15A_1 AA16
VDD15A_2 AJ12
VDD15A_3 AJ17
VDD15A_4 AJ18
VDD15A_8 AG29
402 2 402 2 402 2 402 2 402 2 402 2 402 2 402 2
NC_RP3324_2 NO_TEST 2 7
INT_MOD_BITCLK 28A3<> 28A8< 1 C785 1 C795 1 C820
VDDU33_1 T8
VDDU33_2 U8
0.01UF 0.1UF 4.7UF 5%
INT_MOD_CLKOUT 28A3> 28A8< 1/16W
PCI_
(PLL1)
PCI_
(PLL2)
PCI_
(PLL3)
PCI_
(PLL7)
(PLL9)
10% 20% N20P80% SM1
INT_MOD_DTO 28A3> 28A8< 2 16V
CERM 2 10V
CERM 2 10V
CERM
INT_MOD_SYNC 28A3<> 28A8< (INTREPID JTAG TDO) 402 402 805 R1005
INT_MOD_DTI 28A3< 28A8< USB_PWR_FLT* 1
10K 2
33A7> 32B1< 28B3<
JTAG_INTRP_TDO 34B7> 35B3< 1%
1/16W
JTAG_ASIC_TDI 8A4<> 34B7< 59D8>
U25 COMM_TXD_L 29C7<> 59C6> USB PULL-UPS +3V_MAIN MF
INT_TST_PLLEN_PD 34B7< SCCTXDA AF9 402
INTREPID SCCRTSA AN3 COMM_RTS_L 29D5<> 59C6> RP60
C R574 1
R276
NOSTUFF
1
R708
NOSTUFF
1
NOSTUFF
R735 1
NOSTUFF
R727 1
NOSTUFF
R661 1
NOSTUFF
R577 1
NOSTUFF
R573 1
BGA
(6 OF 9)
SEE_TABLE
(ON PAGE 12) SCCDTRA AF10 COMM_DTR_L 29C7<> 59C6> 28B3< USB_OC_EF_L 1 8 C
1K
1%
1K
1%
1K
1%
1K
1%
1K
1%
1K
1%
1K
1%
1K
1%
SCCRXDA AG11 COMM_RXD 29C5<> 59C6> 28B3<> USB_PWREN_CD_L 2 10K
5%
7
+3V_MAIN
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W SCCGPIOA AG9 COMM_GPIO_L 28D3< 29C5<> 59C6> 28B3<> USB_PWREN_AB_L 3 1/16W 6
MF MF MF MF MF MF MF MF SM1
402 2 402 2 402 2 402 2 402 2 402 2 402 2 402 2 28D3< SNF_FSEL G5
GPIO0 VIA SCCTRXCA AT4 COMM_TRXC 28D3< 29C7<> 59C6> 28B3<> USB_PWREN_EF_L 4 5
GENERAL
28A8< INT_GPIO1_PD E1 GPIO1 1
R294
PURPOSE MISO SCCTXDB AR4 PMU_FROM_INT 44C4<>
59D6> 29D7<> 28D1< COMM_SHUTDOWN J7
GPIO2 I/O’S 10K
REQ* SCCRTSB AL5 PMU_REQ_L 28A8< 44C2< 1%
COMM_RESET_L
59A8> 29D5<> F2
GPIO3 1/16W
MOSI SCCRXDB AG10 PMU_TO_INT 44C4<> MF
36C8< FWPHYRST J8
GPIO4 2 402
ACK* SCCGPIOB AP4 PMU_ACK_L 44C4<>
41A7< SND_HP_MUTE_L H5
GPIO5
SCK SCCTRXCB AM5 PMU_CLK 44C4<> 59A6> 28B5<> UNUSED_GPIO15
TOO MANY MODS TO LIST, SEE INTREPID ERS 43C8< SND_AMP_MUTE_L L9
GPIO6
CONFIGURED FOR INTREPID VERSION 1 28B8< INT_GPIO9_PU H4
GPIO9 USB_VD0_P L8 58B5> 28A3< USB_DAP 402 24 1 2 R724USB1 USB_DAP_F 33B7< 58B5>
VIEW AGP CLOCK OUT LA CLOCK PIN 39B4< 28A8< SND_HW_RESET_L J5
GPIO11 USB_VD0_N L7 58B5> 28A3< USB_DAN 402 24 1 2 R718USB1 USB_DAN_F 33B7< 58B5>
NOSTUFF
+3V_MAIN 28A8< INT_GPIO12_PU K8
GPIO12 402 24 R736USB1 USB_DBP_F 33C7<
1
R267
USB_VD1_P G2 58B5> 28A3< USB_DBP 1 2 58B5> 10K
GPIO & INTERRUPT PULL-UPS 59A6> 28C1< UNUSED_GPIO15 F1
GPIO15
USB_VD1_N G1 58B5> 28A3< USB_DBN 402 24 1 2 R742USB1 USB_DBN_F 33C7< 58B5>
1%
1/16W
R746 35B8< 28D1< INT_ENET_RST_L K7
GPIO16 MF
10K USB_PRTPWR0 J4 USB_PWREN_AB_L 28C2< 2 402
1 2 AGP_INT_L 17B6<> 28B5<> 59D6> 44C5<> 29C5<> 28B8< COMM_RING_DET_L F33
EXTINT0
USB_PWRFLT0 K4 USB_PWR_FLT* 28C1< 32B1< 33A7>
1% NOSTUFF 44B5<> 28B8< PMU_INT_L E34
EXTINT1
1/16W
R749 36B5<> 34C5<> FW_C_LKON R747 402 24 R723USB1 USB_DCP_F 33D7<
MF 28B8< 17B6<> AGP_INT_L C33
EXTINT2 USB_VD2_P H2 58B5> 28A3< USB_DCP 1 2 58B5>
402 10K 0 402 24 R728USB1 USB_DCN_F 33D7<
1 2 33SLOTB_INT_L 1 2 28B8< INT_EXTINT3_PU D34
EXTINT3 USB_VD2_N H1 58B5> 28A3< USB_DCN 1 2 58B5>
1% 5% 59B6> 40D4< SND_LIN_SENSE_L B33
EXTINT4 402 24 R694
R750 1/16W 1/16W USB_VD3_P M7 USB_DDP 1 2 USB_DDP_F_TERM
MF MF 35B4> 28C1< ENET_ENERGY_DET A33
EXTINT5 402 24 R691
10K 402 SPARE 402 USB_VD3_N M8 USB_DDN 1 2 USB_DDN_F_TERM
1 2 28B5<> UNUSED_EXTINT7 33SLOTB_INT_L E31
EXTINT6 USB
1% UNUSED_EXTINT7
28B8<> G30 INTERRUPTS J2 USB_PWREN_CD_L 28C2<
EXTINT7 USB_PRTPWR1
1/16W
MF R306 UNUSED_EXTINT8
28B8<> D31
EXTINT8 USB_PWRFLT1 J1
402 10K 2 28B5<> UNUSED_EXTINT8 SPARE
1 44C4<> 28A8< PMU_INT_NMI C32 EXTINT9 402 22 R762
33SLOTB_INT_L 28B7<> 31C2<> 59A6> USB_VD4_P K5 58B5> USB_DEP 1 2 BT_USB_DP 29D3<> 58B5> 59B6>
B RP113
1%
1/16W
MF
59A6> 59A6>
28D3< VCORE_VGATE
32A8< USB2_CRUN_L_INT
B32
E30
EXTINT10
EXTINT11
USB_VD4_N L5 58B5> USB_DEN 402 22 1 2 R763 BT_USB_DM 29D3<> 58A5> 59B6> B
1 8
402
INT_GPIO9_PU 28B5<> (USB2.0 IRQ) 28B8< INT_EXTINT12_PU J9
EXTINT12 USB_VD5_P P8 58A5> USB_DFP 402 22 1 2 R271 MODEM_USB_DP 29C5<> 58A5> 59B6>
2 10K 7 INT_EXTINT12_PU 28B5<> 28B8< INT_EXTINT13_PU F4
EXTINT13 USB_VD5_N N8 58A5> USB_DFN 402 22 1 2 R272 MODEM_USB_DM 29C5<> 58A5> 59B6>
3 5% 6 INT_EXTINT17_PU 28B5<> 28A8< EXTINT14 D1
EXTINT14
1/16W 32B6> USB_PRTPWR2 M5 USB_PWREN_EF_L 28C2<
4 SM1 5 INT_EXTINT3_PU 28B5<> 59B8> 41A5< SND_HP_SENSE_L E2
EXTINT15
USB_PWRFLT2 N7 USB_OC_EF_L 28C2<
42B8< SND_SPKR_ID H7
EXTINT16
1 8 COMM_RING_DET_L 28B5<> 32B6> 28B8< INT_EXTINT17_PU G4
EXTINT17 47 RP108
29C5<> (518S0104) 8D7<> 7A5< 4B3< MPIC_CPU_INT_L D30 AUD_DTO R4 INT_SND_TO_AUDIO 4 5 SND_TO_AUDIO 39C4<
2 10K 7 INT_EXTINT13_PU 44C5<>
28B5<>
59D6> CPU_INT
AUD_DTI R7 AUDIO_TO_SND AUDIO_TO_SND 39C1<
3 5%
1/16W 6 NO_TEST NC_RPT77P6 J23 CLK18M_INT_EXT 59A6> 44B2<> 32A8< 31C2< PMU_PME_L AJ7 T5 INT_SND_SYNC 47 2 7RP108 SND_SYNC 39C1<>
SM1 U.FL-R_SMT PCIPME AUD_SYNC
4 5 PMU_INT_L 28B5<> 44B5<> F-ST-SM
44B4<>INT_PROC_SLEEP_REQ_L AT6 P2 INT_SND_SCLK 47 3 6RP108 SND_SCLK 39B1<>
3 NOSTUFF PROCSLEEPREQ AUD_BITCLK
RP74 R666 44B4<> INT_PEND_PROC_INT AN8
PENDPROCINT AUD_CLKOUT R5 INT_SND_CLKOUT 47 1 8RP108 SND_CLKOUT 39B4<
1 8 NO_TEST NC_CBUS_INT_L 0 AUDIO/I2S
2 10K 7 PMU_INT_NMI 28B5<> 44C4<> 1 1 2 CLK18M_INT_XIN U4
XTAL_IN MOD_DTO R2 INT_MOD_DTO 28A8< 28C6<
3 5%
1/16W 6 PMU_REQ_L 28C3> 44C2< NOSTUFF 5% NOSTUFF CLK18M_INT_XOUT V15 XTAL_OUT MOD_DTI T4 INT_MOD_DTI 28A8< 28C6< R30011 R3002 1
R6501 1
R651 R6601 1
R683
1/16W 15K 15K 15K 15K 10K 10K
4 SM1 5 EXTINT14 28B5<> 2 1
R611 MF
R672 44C4<> SYSTEM_CLK_EN AN7
STOPXTAL CLOCKS MOD_SYNC R1 INT_MOD_SYNC 28A8< 28C6< 5% 5% 5% 5% 1% 1%
402 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W
RP100 51 10M MOD_BITCLK V8 INT_MOD_BITCLK 28A8< 28C6< MF MF MF MF MF MF
NOSTUFF 5% 1 2 402 2 402 402 2
44C5<> INT_WATCHDOG_L AT7 P1 INT_MOD_CLKOUT 28A8< 28C6< 2 2 402 402 2 2 402
1 8 NO_TEST NC_RP2848 1/16W
MF 5%
WATCHDOG MOD_CLKOUT
1
2
5%
10K 7 INT_GPIO12_PU 28B5<> 2 402
1/16W
MF R711
3 6 INT_GPIO1_PD 28C5<> 402 0
1/16W 5% NC_BRCLKO U15 BUF_REF_CLK_OUT
4 SM1 5 SND_HW_RESET_L 28B5<> 39B4< Y5 1/16W
MF K9
SS_REF_CLK_IN
18.432M
RP110 2 402
R589 1 2
1 IICCLK_2 AL4 INT_I2C_CLK2 28D1< 29C7<> 34B5< 39B1<> 59A8>
CRITICAL R710 IIC INT_I2C_DATA2 28D1< 29C7<> 34B5< 39B1<> 59A8>
10K IICDATA_2 AH8
1
1%
2 USB2_CRUN_L_INT 28B5<> 32A8< CLK18M_INT_XO 8X4.5MM-SM
1%
10K
1/16W
INTREPID GPIO/
A
1/16W
MF
C784 1 1 C840 MF
58B5> 28B3<> USB_DAP 15K R305 USB2 SCC/USB/I2S
(PLL1)
(PLL2)
(PLL3)
(PLL7)
VSSA_8
(PLL9)
VSSU_1
VSSU_2
27pF 27pF 2 402 402 1 2
402
A
VSSA1
VSSA2
VSSA3
VSSA4
5% 5%
R680 50V
CERM 2
50V
2 CERM 58B5> 28B3<> USB_DAN 402 15K 1 2 R396 USB2
1
10K 2 INT_MOD_DTI 28A3< 28C6<
402 402
58B5> 28B3<> USB_DBP 402 15K 1 2 R247 USB2 LAST_MODIFIED=Wed Sep 17 12:16:27 2003
402 15K R398 USB2 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AA15
AJ13
AJ16
AK18
AH29
R9
R8
1% 58B5> 28B3<> USB_DBN 1 2
1/16W
MF 58B5> 28B3<> USB_DCP 402 15K 1 2 R333 USB2
402 53A6< INT_REF_CLK_IN_PD
NOSTUFF 58B5> 28B3<> USB_DCN 402 15K 1 2 R493 USB2 II NOT TO REPRODUCE OR COPY IT
1 8 INT_MOD_CLKOUT 28A3> 28C6< III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
2 10K 7 INT_MOD_DTO 28A3> 28C6< NO_TEST INT_PLL9_GND 28D4< SIZE DRAWING NUMBER REV.
5%
3 1/16W 6 INT_MOD_BITCLK 28A3<> 28C6< INT_PLL1_GND 2 2 2 2 2
INT_PLL7_GND
4 SM1 5 INT_MOD_SYNC 28A3<> 28C6<
28C4< NO_TEST
XW42 XW43 XW44 XW45 XW46
NO_TEST
NO_TEST INT_PLL3_GND
28D4<
28D4<
D 051-6497 13
28D4< INT_PLL2_GND NO_TEST SM SM SM SM SM APPLE COMPUTER INC.
RP66 1 1 1 1 1
SCALE SHT OF
NONE 28 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
MODEM BOARD CONNECTOR BLUETOOTH CONNECTOR

(DASH II)
+3V_MAIN +3V_MAIN
NOSTUFF BS3
STDOFF-197OD-236H-TH
D NOSTUFF
1 C622 1 C621 1
R584 1
1 C312
10UF
1 C314
0.1uF J28 NC_BS3 1
D
10UF 0.1uF 4.7K
R585 20%
6.3V
2 CERM
20%
10V
2 CERM 53307-1090 NO_TEST
N20P80% 20% 5% 10K F-ST-SM
10V 10V 1% 805 402
2 Y5V 2 CERM 1/16W
805 402 MF 1/16W
MF
1 2 NO_TEST NC_BT3
2 402 2 402 3 4 NO_TEST NC_BT4
J13
SM-2MT-6MM-HT 59B6> 58A5> 28B2<
BT_USB_DM 5 6 NO_TEST NC_BT5 BS4
STDOFF-197OD-236H-TH
44 59B6> 58B5> 28B2< BT_USB_DP 7 8 NO_TEST NC_BT6
NC_BS4 1
9 10 NO_TEST NC_BT1
R3291 R3281 NO_TEST
1 2 15K 15K
5% 5% BS4 SHORTEST STANDOFF
3 4 COMM_RESET_L 28C5<> 59A8> 1/16W 1/16W
MF MF FURTHEST FROM J28
59D6> 28D1< 28C5<> COMM_SHUTDOWN 5 6 COMM_RTS_L 28C3> 59C6> 402 2 402 2 (516S0093)
NC_MODEM_DETECT_L NO_TEST 7 8
59C6> 28C3> COMM_DTR_L 9 10 COMM_RXD 28C3<> 59C6>

11 12 COMM_GPIO_L 28C3<> 28D3< 59C6>
59C6> 28C3<> COMM_TXD_L 13 14
59C6> 28D3< 28C3<> COMM_TRXC 15 16 COMM_RING_DET_L 28B5<> 28B8< 44C5<> 59D6>

17 18 NO_TEST NC_-12VREG BLUETOOTH CARD MOUNTING HARDWARE SUPPORT
NC_DAA_CLKOUT NO_TEST 19 20 +12V_SLEEP 29A3< 29A8< 50D5< 51A5< 51C2< 51D6<> 52C1> 59D8> PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION
NC_DAA_LOADOUT NO_TEST 21 22 +12V NEEDS TO BE 25 MIL TRACE
NC_-10VUNREG NO_TEST 23 24 MODEM_USB_DP 860-0170 1 STDOFF,BLUETOOTH,SHORT BS4
28B2< 58A5> 59B6>
25 26 MODEM_USB_DM 28B2< 58A5> 59B6> 860-0171 1 STDOFF,BLUETOOTH,LONG BS3
59A8> 39B1<> 34B5< 28D1< 28A3<> INT_I2C_CLK2 27 28
59A8> 39B1<> 34B5< 28D1< 28A3<> INT_I2C_DATA2 29 30 NO_TEST NC_AUD_MODEM_RTN

31 32 NO_TEST NC_AUD_MODEM
+5V_MAIN 33 34 NO_TEST NC_AUDIO2MODEM
59A8> IIC_ADD 35 36 NO_TEST NC_AUDIO2MODEMRTN
C 37
39
38
40
C
1
NOSTUFF
C619 1 C620
PIN 35 IIC ADDRESS
WE ARE SET TO ADDR= AC SERIAL DOWNLOAD INTERFACE
10UF 0.1uF 43
N20P80% 20%
10V 10V
2 Y5V 2 CERM
805 402 52B3> 44D5<> 44C2< 44B1< 44A5<> PMU_POWER
(515S0120)
R7061 R6681 1
R670 1
R669
10K 10K 10K 10K
BS2 BS1 1%
1/16W
1%
1/16W
1%
1/16W
1%
1/16W
STDOFF-197OD-236H-TH STDOFF-197OD-236H-TH MF MF MF MF
NC_BS1 NO_TEST 1 NC_BS2 NO_TEST 1
402 2 J24 402 2 2 402 2 402
SM
44B5< PMU_CNVSS 1 2 (BUSY) PMU_P64 44C2<>

44D4<> PMU_AP 3 4 (SCLK) LID_SWITCH 44C4<>
MODEM STANDOFF SUPPORT (CE*) 5 6 (RXD) RESET_BUTTON* 44C4<> 59D6>
PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION 59D6> 44B5<> 44A5<> 8A8<> PMU_RST* 7 8 (TXD) NMI_BUTTON* 44C4<> 59D6>
44C4<> PMU_EPM* 9 10 NO_TEST NC_PMU_DL_10
860-1034 2 STDOFF-19709-236H-TH BS1,BS2 11 12 NO_TEST NC_PMU_DL_12
LOW FOR LOADING CODE
R7051 515S1392
10K
1% OMIT
1/16W
’KITCHEN SINK’ CONNECTOR MF
402 2 SERIAL DOWNLOAD CONNECTOR
(MICROPHONE,INTERNAL SPEAKER CONNECTIONS
B TABLE_5_HEAD
INVERTER,LCD,LED & FAN POWER)

B
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION FW_24V
518-0098 1 CONN,HDR,STR,2MMPITCH,18P,PEG J14 CRITICAL KITCH_SINK_18P

TABLE_5_ITEM
R1015
0
TABLE_5_ITEM
18P_GND 1 2
516-0031 1 CONN,HDR,STR,2MMPITCH,16P,PEG J14 CRITICAL KITCH_SINK_16P
SEE_TABLE
5%
1/16W
L103 FW_24V
MF FERR-250-OHM
CRITICAL 603
1 2 FW_PWR 36D6< 50C6<> 51D4<> 52B6>
L77 J14 SM
FERR-250-OHM HL55091
23D7< INV_CUR_HI 1 2
M-ST-TH L80
1 2 FERR-250-OHM
SM
59A8> 58A5> 43A8< MICSHLD 3 4 KS_INT_SPKR+_FILT 1 2 KS_INT_SPKR+ 43D7< 58A5> 59B8>
+5V_MAIN +5V_SLEEP 59A8> 58A5> 43B8< MICHIGH 5 6 KS_INT_SPKR-_FILT SM
L75 59A8> 58A5> 43A8< MICLOW 7 8 L78
FERR-250-OHM 59A8> INV_CUR_HI_FILT 9 10 FERR-250-OHM
1 2 59A8> 52B3> KS5VSD 11 12 1 2 KS_INT_SPKR- 42B4< 43D7< 58A5> 59B8>
R6131 SM 59A8> LCD_PWM_FILT 13 14 59A8> LAMP_STS_FILT SM
82.5
1% L72 59A8> 52B3> LED_5V_FILT 15 16 59A8> LED_RET_FILT L73 FW_12V
1/4W
FF
FERR-250-OHM 59C8> 52B3> FAN_12V_FILT 17 18 FERR-250-OHM
1210 2
23D7< LCD_PWM 1 2 52B3> +12VSD_FILT 1 2 +12V_SLEEP 29A8< 29C5<> 50D5< 51A5< 51C2<
SM SM 51D6<> 52C1> 59D8>
L70
FERR-250-OHM (518-0098) L66
1000-OHM-EMI
MODEM, BLUETOOTH,
52B3> LED_5V 1
SM
2
1
C629
1
SM
2 LED_RET 51B6< 52B3> KITCHEN SINK
L65 20%
2 35V
10UF
L69 & SERIAL DOWNLOAD
A 51D6<>
29C5<>
51C2<
29A3< +12V_SLEEP
FERR-250-OHM
1 2
TANT
SMD
FERR-250-OHM
1 2 LAMP_STS 23D7< NOTICE OF PROPRIETARY PROPERTY
A
51A5< 50D5<
59D8> 52C1> SM NOSTUFF SM LAST_MODIFIED=Wed Sep 17 12:16:29 2003
1 C625 1 C604 1 C630 1 C627 1 C614 1 C608 1 C601 1 C609 1 C615 1 C639 1 C640 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
10UF 0.1UF 220PF 0.01UF 220PF 0.01UF 0.01UF 0.01UF 220PF 100PF 100PF
N20P80% 20% 5% 10% 5% 10% 10% 10% 5% 5% 5% I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
10V 10V 25V 16V 25V 16V 16V 16V 25V 50V 50V
2 Y5V 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
805 402 402 402 402 402 402 402 402 402 402 II NOT TO REPRODUCE OR COPY IT
52C4 43B7< 43A7< 24B3< III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 29 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
52D3> 28D6<> 16D6< 9D4< +1_5V_INTREPID_PLL
R719
2.2 2
1 +1_5V_INTREPID_PLL6 52D3>
R218 5%
22 2 1/16W
59A6> 54D7< 31C2<> CLK33M_PCI_SLOTB 1 C848 1 MF C3201 1
402
5% 0.1UF 0.1UF
1/16W 20% 20%
MF 10V 10V
402 CERM 2 CERM 2
402 402
NOSTUFF
INT_PLL4_GND 30C4<>
R219
22 2
NC_CLK33M_PCI_SLOTC NO_TEST 1
D
5%
1/16W
MF
J11
VDD15A_6 D
402 59A6> 31C3<> 30B7< PCI_SLOTB_REQ_L AR17 PCI_REQ_0 (PLL4)
PCIAD_0 AM10 PCI_AD<0> 30C2< 31C7< 32C6<> 53A6< 59C3>
30B7< PCI_SLOTC_REQ_L AR16 PCI_REQ_1 PCIAD_1 AR8 PCI_AD<1> 30C2< 31C7< 32C6<> 53A6<
MAIN LOOP MATCHES
USB2 32B6> 30B7< PCI_SLOTD_REQ_L AT17 PCI_REQ_2 PCIAD_2 AK12 PCI_AD<2> 30C2< 31C7< 32C6<> 53A6<
LONGEST PCI CLOCK AJ8 PCI_AD<3> 30C2< 31C7< 32C6<> 53A6<
R566 PCIAD_3
Vout = PCI I/O (3.3V) 59A6> 31C2<> 30B5< PCI_SLOTB_GNT_L AT16 PCI_GNT_0 U25
Vin = Vcore (1.5V) 22 2 PCIAD_4 AN10 PCI_AD<4> 30C2< 31C7< 32C6<> 53A6< 59C3>
54A7< 32A6< CLK33M_PCI_SLOTD 1 30B5< PCI_SLOTC_GNT_L AN18 PCI_GNT_1 INTREPID
PCIAD_5 AT8 PCI_AD<5> 30C2< 31C7< 32C6<> 53A6<
5% 32B6< 30B5< PCI_SLOTD_GNT_L AN17 PCI_GNT_2 BGA
54D7< PCI_FBO_PLUS2 1/16W (7 OF 9) PCIAD_6 AN11 PCI_AD<6> 30C2< 31C7< 32C6<> 53A6< 59C3>
MF
402 CLK33M_PCI_SLOTB_UF54D7< AR18 PCI_CLK0 PCIAD_7 AH13 PCI_AD<7> 30C2< 31C7< 32C6<> 53A6<
NOSTUFF NOSTUFF
CLK33M_PCI_SLOTC_UF54D7< AH18 PCI_CLK1 PCI/ROM PCIAD_8 AK13 PCI_AD<8> 30C2< 31C7< 32C6<> 53A6<
R616 R617 TEST WITH 220-OHM CLK33M_PCI_SLOTD_UF54D7< AT18 AR9 PCI_AD<9> 30C2< 31C7< 32C6<> 53A6< 59C3>
PCI_CLK2 INTERFACE PCIAD_9
0 2 22 2 54D7< INT_PCI_FB_OUT
1 1 AM18 PCI_CLK_OUT PCIAD_10 AR10 PCI_AD<10> 30C2< 31C7< 32C6<> 53A6<
5% 5% 54C7< INT_PCI_FB_IN AJ19 PCI_CLK_IN PCIAD_11 AT9 PCI_AD<11> 30B2< 31C7< 32C6<> 53A6< 59C3>
PCI_FB_PLUS4
1/16W
MF
1/16W
MF
TEST WITH 220-OHM AR11 PCI_AD<12> 30B2< 31C7< 32C6<> 53A6<
SEE_TABLE PCIAD_12
402 402 1
R252 PCI_PAR
59A6> 54D7< 32B6<> 31B7< AT14 PCI_PAR
NOSTUFF 1
R621 (ON PAGE 12) PCIAD_13 AM12 PCI_AD<13> 30B2< 31C7< 32C6<> 53A6< 59C3>
22 59A6> 53A6< 32B6<> 31B7< 30B7< PCI_FRAME_L AN16 PCI_FRAME +3V_MAIN
1
R253 5% 39 PCIAD_14 AN12 PCI_AD<14> 30B2< 31C7< 32C6<> 53A6<
1/16W 5% 59A6> 54D7< 32B6<> 31B7< 30B7< PCI_TRDY_L AT15 PCI_TRDY
0 MF 1/16W PCIAD_15 AK11 PCI_AD<15> 30B2< 31C7< 32C6<> 53A6< 59B3>
5% 2 402 MF 54D7< 32B6<> 31B7< 30B7< PCI_IRDY_L AH16 PCI_IRDY
1/16W 2 402 PCIAD_16 AT11 PCI_AD<16> 30B2< 31C7< 32C6<> 53A6< 59B3>
MF 59A6> 54D7< 32B6<> 31B7< 30B7< PCI_STOP_L AR15 PCI_STOP
NOSTUFF 2 402 NOSTUFF NOSTUFF PCIAD_17 AT10 PCI_AD<17> 30B2< 31C6< 32C6<> 53A6<
59A6> 54D7< 32B6<> 31B7< 30B7< PCI_DEVSEL_L AM17 PCI_DEVSEL C123 1 C225 1
54C7< R256 R262 R618 PCIAD_18 AN13 PCI_AD<18> 30B2< 31C7< 32C6<> 53A6< 59B3>
0 2 0 2 0 2 PCI_CBE<0> AR14 AM13 PCI_AD<19> 30B2< 31C6< 32C6<> 53A6< 0.1UF 0.001UF
59A6> 53A6< 32B6<> 31B7< PCI_CBE_0 PCIAD_19 20% 10%
1 1 54C7< PCI_FBI_EQUAL 1 10V 50V
NO_TEST 53A6< 32B6<> 31B7< PCI_CBE<1> AK16 PCI_CBE_1 PCIAD_20 AR12 PCI_AD<20> 30B2< 31C6< 32C6<> 53A6< 59B3> CERM 2 CERM 2
5% 5% 5% 402 402
1/16W 1/16W
1
1/16W
1 53A6< 32B6<> 31B7< PCI_CBE<2> AM16 PCI_CBE_2 PCIAD_21 AJ11 PCI_AD<21> 31C7< 32C6<> 53A6< 11 30 31
MF MF MF
402 402 Adds 2" R259 402 R255 53A6< 32B6<> 31B7< PCI_CBE<3> AJ15 PCI_CBE_3 PCIAD_22 AT12 PCI_AD<22> 31C6< 32C6<> 53A6< 59B3>
0 0 VPP VCC
(0.35 ns) 5% 5% PCIAD_23 AM11 PCI_AD<23> 31C7< 32C6<> 53A6< U42
1/16W 1/16W 54A7< INT_ROM_OVERLAY_PU AK17 ROM_OVRLY_EN FEPR-1MX8
MF Adds 6" MF
INT_ROM_CS_L AM9 ROM_CS
PCIAD_24 AR13 PCI_AD<24> 30C1<> 31B6< 32C6<> 53A6< 59B3>
110
PCI_FBI_PLUS2 2 402 2 402 AK15 PCI_AD<25> 30C1<> 31B7< 32C6<> 53A6< PCI_AD<0> PCI_AD<24>
C 54C7<
Adds 2"
(1 ns)
54C7< PCI_FB_PLUS6
INT_ROM_OE_L
INT_ROM_RW_L
AR7
AN9
ROM_OE
ROM_WE
PCIAD_25
PCIAD_26 AH15 PCI_AD<26> 30C1<> 31B6< 32B6<> 53A6< 59B3>
59C3> 53A6< 32C6<> 31C7< 30D4<>
53A6< 32C6<> 31C7< 30D4<> PCI_AD<1>
21
20
A0 TSOP DQ0
A1 SEE_TABLEDQ1
25
26 PCI_AD<25>
30C4<>
59B3>
30C4<>
31B6< 32C6<> 53A6<
31B7< 32C6<> 53A6<
C
(0.7 ns) NO_TEST PCIAD_27 AN14 PCI_AD<27> 30C1<> 31B7< 32B7<> 53A6< 53A6< 32C6<> 31C7< 30D4<> PCI_AD<2> 19
A2 DQ2
27 PCI_AD<26> 30C4<> 31B6< 32B6<> 53A6<
59B3>
PCIAD_28 AT13 PCI_AD<28> 30C1<> 31B6< 32B6<> 53A6< 53A6< 32C6<> 31C7< 30D4<> PCI_AD<3> 18
A3 DQ3
28 PCI_AD<27> 30C4<> 31B7< 32B7<> 53A6<
PLACE ALL SERPENTINES ON INTERNAL LAYER PCIAD_29 AK14 PCI_AD<29> 30C1<> 31B7< 32B6<> 53A6< 59C3> 53A6< 32C6<> 31C7< 30D4<> PCI_AD<4> 17
A4 DQ4
32 PCI_AD<28> 30C4<> 31B6< 32B6<> 53A6<
ALLOWS ADJUSTING FEEDBACK CLOCK FROM MATCHED (0 NS) PCIAD_30 AN15 PCI_AD<30> 30C1<> 31B6< 32B6<> 53A6< 59B3> 53A6< 32C6<> 31C7< 30D4<> PCI_AD<5> 16
A5 DQ5
33 PCI_AD<29> 30C4<> 31B7< 32B6<> 53A6<
R227 PCI_AD<31> 30C1<> 31B7< 32B6<> 53A6<
TO +10" (1.7 NS) IN 2" (0.35 NS) INCREMENTS 22 1 (PLL4) PCIAD_31 AM15 59C3> 53A6< 32C6<> 31C7< 30D4<> PCI_AD<6> 15
A6 DQ6
34 PCI_AD<30> 30C4<> 31B6< 32B6<> 53A6<
59C8> 31B4<> 30B4< ROM_CS_L 2 VSSA_6 53A6< 32C6<> 31C7< 30D4<> PCI_AD<7> 14 35 PCI_AD<31> 59B3>
30C4<> 31B7< 32B6<> 53A6<
5% J10 A7 DQ7
1/16W 53A6< 32C6<> 31C7< 30D4<> PCI_AD<8> 8
A8
MF R230
402 22 1 59C3> 53A6< 32C6<> 31C7< 30D4<> PCI_AD<9> 7
A9
59C8> 31B2<> 30B2< ROM_OE_L 2
NO_TEST INT_PLL4_GND 30D4< 53A6< 32C6<> 31C7< 30C4<> PCI_AD<10> 36
5%
A10
PCI PULL-UPS 1/16W 59C3> 53A6< 32C6<> 31C7< 30C4<> PCI_AD<11> 6
A11
R578 MF 2
+3V_MAIN 53A6< 32C6<> 31C7< 30C4<> PCI_AD<12> 5
+3V_MAIN 59B8> 31B4<> 30B2< ROM_RW_L 2
22 1 402
XW49 59C3> 53A6< 32C6<> 31C7< 30C4<> PCI_AD<13> 4
A12
RP63 SM A13
10K 5% 53A6< 32C6<> 31C7< 30C4<> PCI_AD<14> 3
A14
1/16W 1
8 1 PCI_IRDY_L 30C5<> 31B7< 32B6<> 54D7< MF 59B3> 53A6< 32C6<> 31C7< 30C4<> PCI_AD<15> 2
A15
402
5% 1 1 59B3> 53A6< 32C6<> 31C7< 30C4<> PCI_AD<16> 1
A16
1/16W RP63 R139 R212 53A6< 32C6<> 31C6< 30C4<> PCI_AD<17> 40
SM1 10K A17
PCI_TRDY_L 10K 10K
7 2 30C5<> 31B7< 32B6<> 54D7< 59A6> 1% 1% 59B3> 53A6< 32C6<> 31C7< 30C4<> PCI_AD<18> 13
A18
1/16W 1/16W
5% MF MF 53A6< 32C6<> 31C6< 30C4<> PCI_AD<19> 37
A19
RP63 1/16W 402 2 402 2
59B3> 53A6< 32C6<> 31C6< 30C4<> PCI_AD<20> 38
10K SM1 A20
6 3 PCI_FRAME_L 30C5<> 31B7< 32B6<> 53A6< 59A6> R138
ROM_CS_L 1
1K 2 59D6> 31B4<> ROM_ONBOARD_CS_L 22
5% 59C8> 31B4<> 30C6< CE
1/16W RP63
SM1 10K +3V_MAIN 1%
1/16W
59C8> 31B2<> 30C6< ROM_OE_L 24
OE
5 4 PCI_DEVSEL_L 30C5<> 31B7< 32B6<> 54D7< 59A6> MF 59B8> 31B4<> 30B6< ROM_RW_L 9
WE
402
5% INTREPID PCI INTERFACE 59A8> ROM_WP_L 12
WP
RP69 1/16W
SM1
RP38 59A6> 44C4<> 32A8< 31D4< 17C8< MAIN_RESET_L 10
4.7K 10K PWD
B 5 4 PCI_STOP_L 30C5<> 31B7< 32B6<> 54D7< 59A6> 5 4 PCI_SLOTC_GNT_L 30D5<> GND B
5% 5%
1/16W
SM1
RP69 1/16W
SM1
RP38 23 39
4.7K 10K
8 1 PCI_SLOTB_REQ_L 30D5<> 31C3<> 59A6> 8 1 PCI_SLOTB_GNT_L 30D5<> 31C2<> 59A6> OVERRIDE ROM MODULE
5% 5% INTERCEPTS ROM CHIP SELECT
RP69 1/16W RP38 1/16W
4.7K SM1 10K SM1
6 3 PCI_SLOTC_REQ_L 30D5<> 6 3 NO_TEST NC_RP1399 52C4 49B2<> +2_5V_MAIN
59D8>
5% 5% DEV 1MB BOOT ROM
1/16W RP69 1/16W RP38 DEV
U38
SM1 4.7K SM1 10K R510 5
7 2 PCI_SLOTD_REQ_L 30D5<> 32B6> 7 2 PCI_SLOTD_GNT_L 30D5<> 32B6< 0 2 SN74AUC1G04
1 LED_ROMCS_L 2 4 LED_ROMCS
5% 5% 04
INT_V1 1/16W 1/16W 5% SC70-5
SM1 SM1 1/16W 3
MF
R579 402 DEV
10K 1
2 INT_ROM_OVERLAY_PU 16D7< 30C5<> 54A7< R5111
1%
1/16W
681
1%
MF
402
FLASH BOOT ROM SUPPORT 1/16W
MF
402 2
ROM PULL-UP PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION
341S1289 1 IC,FLASH,ROM,Q59 EVT,VER TBD U42 CRITICAL ROM_EVT LED_ROMCS_LIGHT
341S1290 1 IC,FLASH,ROM,Q59 DVT,4.7.4B0 U42 CRITICAL ROM_DVT DEV 1
DS4
341S1291 1 IC,FLASH,ROM,Q59 PVT,VER TBD U42 CRITICAL ROM_PVT GREEN ROM CHIP SELECT
SM
341S1280 1 IC,FLASH,ROM,Q59 PROD,VER TBD U42 CRITICAL ROM_PROD 2
INTREPID PCI
A 009-6525 1 IC,FEPR,FLASH ROM,DEV U42 ROM_IMG_Q59 & BOOT ROM A
335S0350 1 IC,FLASH ROM,1MB,BLANK U42 OMIT LAST_MODIFIED=Wed Sep 17 12:16:31 2003
341T1292 1 IC,FLASH,ROM,Q59 PROD,VER TBD U42 CRITICAL ROM_PROD_T II NOT TO REPRODUCE OR COPY IT
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 30 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
+3V_MAIN
+3V_MAIN NOSTUFF
1 C250 1C260 1 C259 1 C249
10UF 10UF 0.01UF 0.1UF
N20P80% N20P80% 10% 20%
D 1
NOSTUFF
NOSTUFF
10V
2 Y5V
805
10V
2 Y5V
805
16V
2 CERM
402
10V
2 CERM
402
D
R949 1
10K R950
1% 10K
1/16W 1%
MF 1/16W
2 402 MF
2 402
+3V_MAIN
R948
0 2 J25
59A6> 44C4<> 32A8< 30B2< 17C8< MAIN_RESET_L 1 MAIN_RESET_L_PU EDGE-SOCKET-UP
5% F-RT-SM-4MM
PLACE RP’S NEAR WIRELESS CONNECTOR 1/16W
MF
TOP_CONTACTS BOT_CONTACTS
402 1 2 CLK33M_PCI_SLOTB 30D7< 54D7< 59A6>
RF_DISABLE_L 3 4 PCI_SLOTB_GNT_L 30B5< 30D5<> 59A6>
59C3> 53A6< 32C6<> 30D4<> 30C2< PCI_AD<0> 1 8 PCIT_AD<0> 31B2<> 54C7<
RP77 NO_TEST PCIT_AD<1> 59A6> 30D5<> 30B7< PCI_SLOTB_REQ_L 5 6
53A6< 32C6<> 30D4<> 30C2< PCI_AD<1> 2 33 7 31B3<> 54C7< 59C3> 7 8 R951NOSTUFF
5% NO_TEST PCIT_AD<2>
53A6< 32C6<> 30D4<> 30C2< PCI_AD<2> 3 1/16W 6 31B2<> 54C7< 59C3> 0 2 MF
SM1 NO_TEST PCIT_AD<3> 59B3> 54C7< 31B6< PCIT_AD<31> 9 10 PMU_PME_LL 5% 1 PMU_PME_L 28B5<> 32A8< 44B2<> 59A6>
53A6< 32C6<> 30D4<> 30C2< PCI_AD<3> 4 5 31B3<> 54C7< 59C3> 11 12
1/16W 402
59C3> 53A6< 32C6<> 30D4<> 30C2< PCI_AD<4> 1 8 PCIT_AD<4> 31B2<> 54C7<
RP75 NO_TEST PCIT_AD<5> 59B3> 54C7< 31B6< PCIT_AD<29> 13 14 33SLOTB_INT_L 28B7<> 59A6>
53A6< 32C6<> 30D4<> 30C2< PCI_AD<5> 2 33 7 31B3<> 54C7< 59C3>
5% NO_TEST PCIT_AD<6> 59B3> 54C7< 31B6< PCIT_AD<27> 15 16 PCIT_AD<30> 31B7< 54C7<
59C3> 53A6< 32C6<> 30D4<> 30C2< PCI_AD<6> 3 1/16W 6 31B2<> 54C7<
SM1 59B3> 54C7< 31B6< PCIT_AD<25> 17 18 PCIT_AD<28> 31B7< 54C7< 59B3>
53A6< 32C6<> 30D4<> 30C2< PCI_AD<7> 4 5 PCIT_AD<7> 31B3<> 54C7< 59C3> 19 20 PCIT_AD<26> 31B7< 54C7<
53A6< 32C6<> 30D4<> 30C2< PCI_AD<8> 1 8 PCIT_AD<8> 31B3<> 54C7< 59C3>
RP73 NO_TEST PCIT_AD<9> 59A6> 54C7< 31B6< PCIT_CBE<3> 21 22 PCIT_AD<24> 31B7< 54C7<
59C3> 53A6< 32C6<> 30D4<> 30C2< PCI_AD<9> 2 33 7 31B2<> 54C7<
23 24 59A6> WL_PCI_IDSEL
53A6< 32C6<> 30C4<> 30C2< PCI_AD<10> 3 1/16W 6 31B3<> 54C7< 59C3>
SM1 NO_TEST PCIT_AD<11> 59B3> 54C7< 31C6< PCIT_AD<23> 25 26
59C3> 53A6< 32C6<> 30C4<> 30B2< PCI_AD<11> 4 5 31B2<> 54C7<
59B3> 54C7< 31C6< PCIT_AD<21> 27 28 PCIT_AD<22> 31C7< 54C7< R285
53A6< 32C6<> 30C4<> 30B2< PCI_AD<12> 1 8 PCIT_AD<12> 31B3<> 54C7< 59C3> 2
RP72 PCIT_AD<19> 29 30 PCIT_AD<20> 31C7< 54C7<
C 59C3> 53A6< 32C6<> 30C4<> 30B2< PCI_AD<13>
53A6< 32C6<> 30C4<> 30B2< PCI_AD<14>
2
3
33
5%
1/16W
7
6
NO_TEST PCIT_AD<13>
NO_TEST PCIT_AD<14>
31B2<> 54C7<
31C3<> 54C7< 59B3>
59B3> 54C7< 31C7<
31 32 PCIT_PAR 31B6< 54C7<
22
5%
1/16W
C
SM1 NO_TEST PCIT_AD<15> 59B3> 54C7< 31C7< PCIT_AD<17> 33 34 PCIT_AD<18> 31C6< 54C7< MF
59B3> 53A6< 32C6<> 30C4<> 30B2< PCI_AD<15> 4 5 31C2<> 54C7< 402
35 36 PCIT_AD<16> 31C6< 54C7< 1
59B3> 53A6< 32C6<> 30C4<> 30B2< PCI_AD<16> 1 8 PCIT_AD<16> 31C2<> 54C7<
RP59 59A6> 54C7< 31B6< PCIT_CBE<2> 37 38
59B3> 54C7< 31C3<> PCIT_AD<17> 2 33 7 PCI_AD<17> 30B2< 30C4<> 32C6<> 53A6<
5% 59B6> 54C7< 31B6< PCIT_IRDY_L 39 40 PCIT_FRAME_L 31B6< 54C7<
59B3> 53A6< 32C6<> 30C4<> 30B2< PCI_AD<18> 3 1/16W 6 PCIT_AD<18> 31C2<> 54C7<
SM1 41 42 PCIT_TRDY_L 31B6< 54C7<
59B3> 54C7< 31C3<> PCIT_AD<19> 4 5 PCI_AD<19> 30B2< 30C4<> 32C6<> 53A6<
59B6> RF_CLKRUN_L 43 44 PCIT_STOP_L 31B6< 54C7<
53A6< 32C6<> 30C4<> PCI_AD<23> 1 8 PCIT_AD<23> 31C3<> 54C7< 59B3>
RP58 45 46 PCIT_DEVSEL_L 31B6< 54C7<
53A6< 32C6<> 30C4<> PCI_AD<21> 2 33 7 PCIT_AD<21> 31C3<> 54C7< 59B3> R2931
5% 59A6> 54C7< 31B6< PCIT_CBE<1> 47 48
54C7< 31C2<> PCIT_AD<22> 3 1/16W 6 PCI_AD<22> 30C4<> 32C6<> 53A6< 59B3> 10K
SM1 1% 59B3> 54C7< 31C6< PCIT_AD<14> 49 50 PCIT_AD<15> 31C6< 54C7<
54C7< 31C2<> PCIT_AD<20> 4 5 PCI_AD<20> 30B2< 30C4<> 32C6<> 53A6< 59B3> 1/16W
MF 51 52 PCIT_AD<13> 31C6< 54C7<
53A6< 32B7<> 30C4<> 30C1<> PCI_AD<27> 1 8 PCIT_AD<27> 31C3<> 54C7< 59B3> 402 2
RP56 59C3> 54C7< 31C6< PCIT_AD<12> 53 54 PCIT_AD<11> 31C6< 54C7<
53A6< 32C6<> 30C4<> 30C1<> PCI_AD<25> 2 33 7 PCIT_AD<25> 31C3<> 54C7< 59B3>
5% 59C3> 54C7< 31C6< PCIT_AD<10> 55 56
54C7< 31C2<> PCIT_AD<26> 3 1/16W 6 PCI_AD<26> 30C1<> 30C4<> 32B6<> 53A6< 59B3>
SM1 59B8> 30B6< 30B2< ROM_RW_L 57 58 PCIT_AD<9> 31C6< 54C7<
54C7< 31C2<> PCIT_AD<24> 4 5 PCI_AD<24> 30C1<> 30C4<> 32C6<> 53A6< 59B3>
59C3> 54C7< 31C6< PCIT_AD<8> 59 60 PCIT_CBE<0> 31B6< 54C7<
59B3> 54C7< 31C2<> PCIT_AD<28> 1 8 PCI_AD<28> 30C1<> 30C4<> 32B6<> 53A6<
RP54 59C3> 54C7< 31C6< PCIT_AD<7> 61 62 ROM_OE_L 30B2< 30C6< 59C8>
54C7< 31C2<> PCIT_AD<30> 2 33 7 PCI_AD<30> 30C1<> 30C4<> 32B6<> 53A6< 59B3>
63 64 PCIT_AD<6> 31C6< 54C7<
53A6< 32B6<> 30C4<> 30C1<> PCI_AD<31> 3 1/16W 6 31C3<> 54C7< 59B3>
SM1 NO_TEST PCIT_AD<29> 59C3> 54C7< 31C6< PCIT_AD<5> 65 66
53A6< 32B6<> 30C4<> 30C1<> PCI_AD<29> 4 5 31C3<> 54C7< 59B3> ROM_ONBOARD_CS_L
59D6> 30B2< 67 68 PCIT_AD<4> 31C6< 54C7<
59A6> 54D7< 32B6<> 30C5<> PCI_PAR 1 8 PCIT_PAR 31C2<> 54C7<
RP61 59C3> 54C7< 31C6< PCIT_AD<3> 69 70 PCIT_AD<2> 31C6< 54C7< 59C3>
59A6> 53A6< 32B6<> 30C5<> 30B7< PCI_FRAME_L 2 33 7 NO_TEST PCIT_FRAME_L 31C2<> 54C7<
5% 71 72 PCIT_AD<0> 31C6< 54C7<
59A6> 54D7< 32B6<> 30C5<> 30B7< PCI_TRDY_L 3 1/16W 6 NO_TEST PCIT_TRDY_L 31C2<> 54C7<
SM1 59C3> 54C7< 31C6< PCIT_AD<1> 73 74
54D7< 32B6<> 30C5<> 30B7< PCI_IRDY_L 4 5 NO_TEST PCIT_IRDY_L 31C3<> 54C7< 59B6>
ROM_CS_L
59C8> 30C6< 30B4< 75 76 NO_TEST NC_USB_M
59A6> 54D7< 32B6<> 30C5<> 30B7< PCI_STOP_L 1 8 PCIT_STOP_L 31C2<> 54C7<
RP67 NC_WL<1> NO_TEST 77 78 NO_TEST NC_USB_P
59A6> 54D7< 32B6<> 30C5<> 30B7< PCI_DEVSEL_L 2 33 7 NO_TEST PCIT_DEVSEL_L 31C2<> 54C7<
5% NC_WL<3> NO_TEST 79 80
53A6< 32B6<> 30C5<> PCI_CBE<1> 3 1/16W 6 NO_TEST PCIT_CBE<1> 31C3<> 54C7< 59A6>
SM1 NC_WL<5> NO_TEST 81 82 NO_TEST NC_WL<2>
B 59A6> 53A6< 32B6<> 30C5<> PCI_CBE<0>
53A6< 32B6<> 30C5<> PCI_CBE<2>
4
1
5
8
NO_TEST PCIT_CBE<0> 31B2<> 54C7<
PCIT_CBE<2> 31C3<> 54C7< 59A6>
NC_WL<7> NO_TEST 83 84 NO_TEST NC_WL<4> B
RP64 NC_WL<9> NO_TEST 85 86 NO_TEST NC_WL<6>
53A6< 32B6<> 30C5<> PCI_CBE<3> 2 33 7 NO_TEST PCIT_CBE<3> 31C3<> 54C7< 59A6>
5% NC_WL<11> NO_TEST 87 88 NO_TEST NC_WL<8>
NC_PCIR0 NO_TEST 3 1/16W 6 NO_TEST NC_PCITR0
NO_TEST SM1 NC_WL<13> NO_TEST 89 90 NO_TEST NC_WL<10>
NC_PCIR1 4 5 NO_TEST NC_PCITR1
NC_WL<15> NO_TEST 91 92 NO_TEST NC_WL<12>
(516S0046)
WIRELESS CARD MOUNTING HARDWARE SUPPORT
815-7245 1 WIRELESS CARD GUIDE,J25 J251
452-0411 2 NUT,HEX,M2 X 1.5H, J25 J252,J253
452-0412 2 SCREW,M2 X 0.4 X 6.0 L,J25 J254,J255
WIRELESS PCI
A
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 31 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
+3V_MAIN
USB2
+3V_MAIN L58 NOSTUFF
USB2 USB2 USB2 USB2 100-OHM-EMI
1 C519 1 C522 1 C527 1 C547 R89
1 2 52A3> NEC_AVDD 100K 2
0.1UF 0.1UF 0.1UF 0.1UF 1 NEC_XT2_B
20% 20% 20% 20% SM
10V
2 CERM 10V
2 CERM 10V
2 CERM 10V
2 CERM USB2 USB2 USB2 1%
1/16W
D
402 402 402 402 1
20%
C526
0.1UF
1
20%
C529
0.1UF
1 C511
10UF
N20P80%
MF
402 D
USB2 USB2 USB2 USB2 10V 10V 10V
1 C523 1 C541 1 C548 1 C555 2 CERM 2 CERM 2 Y5V Y7
402 402 805 30.0000M
0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% 20% 1 2 CRITICAL
2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
402 402 402 402 USB2 8X4.5MM-SM USB2 USB2
C77 1 USB2 1 C114 1
R129
USB2 USB2 USB2 USB2 10PF 10PF 100
5% 5% 1%
1 C559 1 C546 1 C516 1 C537 50V 2 50V
CERM 2 CERM 1/16W
MF
0.1UF 0.1UF 0.1UF 0.1UF 402 402
P12
A13
A12
L13
J13
H13
F13
D13
G12
N10
N12
20% 20% 20% 20% 2 402
H3
M4
C8
P2
P3
A3
E2
N8
H4
D7
USB2
2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
402 402 402 402
59C3> 53A6< 31C7< 30D4<> 30C2< PCI_AD<0> M5
AD0
VDD_PCI
VDD
AVDD
USB2 USB2 USB2 USB2 53A6< 31C7< 30D4<> 30C2< PCI_AD<1> P5
AD1 XT1/SCLK L9 56B3> USB2_XT1
1 C536 1 C515 1 C570 1 C530 53A6< 31C7< 30D4<> 30C2< PCI_AD<2> N5
AD2 XT2 P8 56B3> USB2_XT2
0.1UF 0.1UF 0.1UF 0.1UF 53A6< 31C7< 30D4<> 30C2< PCI_AD<3> P4 AD3 USB2 R464
20% 20% 20% 20% 35.7 2
2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 59C3> 53A6< 31C7< 30D4<> 30C2< PCI_AD<4> N4
AD4 RSDM1 M14 56B3> USB2_RSDAM 1 USB2_DAN_F 33B7< 56B3>
402 402 402 402
53A6< 31C7< 30D4<> 30C2< PCI_AD<5> M3 AD5 DM1 M13 USB2_DAN_F
USB2 R465
59C3> 53A6< 31C7< 30D4<> 30C2< PCI_AD<6> N3
AD6 DP1 L14 USB2_DAP_F
NOSTUFF USB2 NOSTUFF USB2
1 C517 1 C573 1 C574 1 C531 53A6< 31C7< 30D4<> 30C2< PCI_AD<7> M1
AD7 U11 RSDP1 K13 56B3> USB2_RSDAP 1 2 USB2_DAP_F 33B7< 56B3>
53A6< 31C7< 30D4<> 30C2< PCI_AD<8> L2
AD8 NEC_UPD720101_USB2 35.7 USB2 R466
10UF 10UF 10UF 10UF 35.7 2
N20P80% N20P80% N20P80% N20P80% 59C3> 53A6< 31C7< 30D4<> 30C2< PCI_AD<9> L1
AD9 FBGA RSDM2 K14 56B3> USB2_RSDBM 1 USB2_DBN_F 33C7< 56B3>
2 10V 2 10V 2 10V 2 10V
Y5V
805
Y5V
805
Y5V
805
Y5V
805 53A6< 31C7< 30C4<> 30C2< PCI_AD<10> K2
AD10 DM2 K12 USB2_DBN_F
USB2 R467
59C3> 53A6< 31C7< 30C4<> 30B2< PCI_AD<11> L3
AD11 DP2 J14 USB2_DBP_F
35.7 2
53A6< 31C7< 30C4<> 30B2< PCI_AD<12> K1
AD12 RSDP2 J12 56B3> USB2_RSDBP 1 USB2_DBP_F 33C7< 56B3>
59C3> 53A6< 31C7< 30C4<> 30B2< PCI_AD<13> K3
AD13 USB2 R468
35.7 2
53A6< 31C7< 30C4<> 30B2< PCI_AD<14> J2
AD14 RSDM3 H11 56B3> USB2_RSDCM 1 USB2_DCN_F 33D7< 56B3>
CRITICAL USB2_DCN_F
59B3> 53A6< 31C7< 30C4<> 30B2< PCI_AD<15> J1 G11
C 59B3> 53A6< 31C7< 30C4<> 30B2< PCI_AD<16> F2
AD15
AD16
DM3
DP3 G13 USB2_DCP_F R469 C
53A6< 31C6< 30C4<> 30B2< PCI_AD<17> E3
AD17 RSDP3 G14 56B3> USB2_RSDCP 1 2 USB2_DCP_F 33D7< 56B3>
59B3> 53A6< 31C7< 30C4<> 30B2< PCI_AD<18> E1 AD18 35.7
USB2
53A6< 31C6< 30C4<> 30B2< PCI_AD<19> D3
AD19 RSDM4 F12 NC_USB2_RSDEM
59B3> 53A6< 31C6< 30C4<> 30B2< PCI_AD<20> D1 AD20 DM4 F14 OVERLAP STUFFING OF 35.7OHMS HERE WITH 0OHMS ON SH31 TO MINIMIZE STUBS
53A6< 31C7< 30C4<> PCI_AD<21> D2
AD21 DP4 E12
59B3> 53A6< 31C6< 30C4<> PCI_AD<22> C2

AD22 RSDP4 E14 NC_USB2_RSDEP
53A6< 31C7< 30C4<> PCI_AD<23> C1
AD23 +3V_MAIN
59B3> 53A6< 31B6< 30C4<> 30C1<> PCI_AD<24> B4
AD24 RSDM5 E13 NC_USB2_RSDFM
53A6< 31B7< 30C4<> 30C1<> PCI_AD<25> A4
AD25 DM5 D14
59B3> 53A6< 31B6< 30C4<> 30C1<> PCI_AD<26> B5

AD26 DP5 C13 USB2
USB2
53A6< 31B7< 30C4<> 30C1<> PCI_AD<27> C4
AD27 RSDP5 C14 NC_USB2_RSDFP 1
R480
53A6< 31B6< 30C4<> 30C1<> PCI_AD<28> A5
AD28 R476 4.7K
PCI_AD<29> 9.09K2 TIED TO BALL N11 5%
53A6< 31B7< 30C4<> 30C1<> C5
AD29 56B3> RREF P11 USB2_RREF 1 1/16W
MF
59B3> 53A6< 31B6< 30C4<> 30C1<> PCI_AD<30> B6
AD30 1%
2 402
1/16W
53A6< 31B7< 30C4<> 30C1<> PCI_AD<31> A6 AD31 MF
402
59A6> 53A6< 31B7< 30C5<> PCI_CBE<0> M2 CBE0

53A6< 31B7< 30C5<> PCI_CBE<1> J3
CBE1 OCI1 B12 USB_PWR_FLT* USB_PWR_FLT* 28B3< 28C1< 33A7>
53A6< 31B7< 30C5<> PCI_CBE<2> F1
CBE2 OCI2 B11
+3V_MAIN 53A6< 31B7< 30C5<> PCI_CBE<3> C3
CBE3 OCI3 B10
OCI4 A10 U_USB_PWR_FLT*

PCI_PAR
59A6> 54D7< 31B7< 30C5<> J4
PAR OCI5 B9
+3V_MAIN
59A6> 53A6< 31B7< 30C5<> 30B7< PCI_FRAME_L F3
FRAME
USB2 USB2 54D7< 31B7< 30C5<> 30B7< PCI_IRDY_L F4
IRDY PPON1 C12 NC_USB2_PPON1
USB2 USB2
R127
1
R128
1 59A6> 54D7< 31B7< 30C5<> 30B7< PCI_TRDY_L G1
TRDY PPON2 A11 NC_USB2_PPON2 USB2
B 4.7K
5%
4.7K
5%
R494
22 2 59A6> 54D7< 31B7< 30C5<> 30B7< PCI_STOP_L G3
STOP PPON3 C11 NC_USB2_PPON3
1
R470
2.2K
1
R490 B
1/16W 1/16W 1 USB2_IDSEL B3
IDSEL PPON4 C10 NC_USB2_PPON4 5% 2.2K
MF MF 1/16W 5%
402 2 402 2 5% 59A6> 54D7< 31B7< 30C5<> 30B7< PCI_DEVSEL_L G2
DEVSEL PPON5 A9 NC_USB2_PPON5 MF 1/16W
1/16W
MF 30D5<> 30B7< PCI_SLOTD_REQ_L C6 2 402 MF
402
REQ P6 USB2_NC1 2 402
NC1
30D5<> 30B5< PCI_SLOTD_GNT_L D6 GNT
NC2 M6 USB2_NC2
PCI_SLOTD_PERR_L H2
PERR
33PCI_SLOTD_SERR_L OD H1 SERR
28B8< 28B5<> INT_EXTINT17_PU OD C7
INTA
OD B7
INTB
OD A7
INTC
54A7< 30D7< CLK33M_PCI_SLOTD A8
PCLK NTEST1 M8 NC_USB2_NTEST1
USB2
59A8> 44D3< 44B8<> 35B8< IO_RESET_L B8
VBBRST STARTUP & RESTARTS SMC M7 NC_USB2_SMC
R484 USB2_CRUN_L N6
CRUN
0 2
44B2<> 31C2< 28B5<> PMU_PME_L 1 USB2_PME_L OD D9
PME
59A6>
5% C9
VCCRST STARTUP, RESTARTS, WAKEUP TEB N7 NC_USB2_TEB
1/16W
402 NC_USB2_SMI_L OD L6
SMI AMC P7 NC_USB2_AMC
TEST L8 NC_USB2_TEST
R373 NOSTUFF L7 LEGC
0 2
28B5<> 28A8< USB2_CRUN_L_INT 1
5% NANDTEST M10 NC_USB2_NANDTEST
1/16W
402 AVSS(R) SRCLK M9 NC_USB2_SRCLK
R78 1 SRDTA N9 NC_USB2_SRDTA
1K
1%
+3V_MAIN VSS SRMOD P9 NC_USB2_SRMOD
USB2 CONTROLLER
A 1/16W
MF
402 2
AVSS
A
B1
N1
P10
N14
H14
B14
A2
B2
N2
N13
B13
M11
L12
H12
D12
G4
J11
F11
D8
N11
P13
M12
1 LAST_MODIFIED=Wed Sep 17 12:16:33 2003

R1029 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
4.7K AGREES TO THE FOLLOWING
5%
1/16W I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
MF
2 402
D3_HOT
D3_COLD
R1028 SIZE DRAWING NUMBER REV.

0 USB2_VCCRST
44C4<> 31D4< 30B2< 17C8<
59A6>
MAIN_RESET_L 1 2 D 051-6497 13
5% APPLE COMPUTER INC.
1/16W SCALE SHT OF
MF
402 NONE 32 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
NOSTUFF
USB1 R1007 J7
F-RT-USB-NMP1
R44 1
0 2 TH-1
USB_DCN_F 1
0 2 7
SYM_VER-2
58B5> 28B2< 5%
1/16W
5% MF
1/16W 402 5
USB2 MF
402
R460 L100 59B6> 52A3> 33C3<> 33B3<> 33A4<> USB_PORT_PWR 1
USB2_DCN_F 0 2 USBT_DCN_F 2
165-OHM
SM 3 59C6> 56A3> USB_DCN_CON 2
56B3> 32C1<> 1 56A3>
5%
1/16W
59C6> 56A3> USB_DCP_CON 3 USB PORT 3
MF 4
402 USB1 USB_GND
SYM_VER-2
1 4
R43
D 58B5> 28B2< USB_DCP_F 1
0 2 56A3> USBT_DCP_F
1
C2
6
D
5% R1006 USB1 USB1 10UF
N20P80% (514-0048)
1/16W 0 1 1 2 10V 1
USB2 MF
402 1
1 2 C403 C404 Y5V C405 52C4 36C1< 36C1<> 36B6<> 36B6< 36B2<
33D4< 33C4< 33C2< 33B4< 33B2< 25C3< 25B3<>
1 R454 5% 33PF 33PF 805 0.01UF 36A7<>
R461 R455 15K 1/16W 5% 5% 10%
0 2 15K MF 50V 50V 16V
5% 2 CERM 2 CERM 2 CERM
56B3> 32C1<> USB2_DCP_F 1 5% 1/16W 402
402 402 1 402
1/16W MF NOSTUFF 1
5%
1/16W
MF 2 402 C397 C413 ALT
MF 2 402 52C4 0.01UF 0.01UF CHASSIS
402 2 10%
16V
10%
CERM 2 16V
CERM
402 402
ALT
CHASSIS PLACE UNDER
USB CONNECTOR
ALT
CHASSIS
NOSTUFF
USB1 R1008 J4
1
0 2 F-RT-USB-NMP1
R46 TH-1
USB_DBN_F 1
0 2
5%
1/16W 7
SYM_VER-2
58B5> 28B2<
MF
5% 402
1/16W 5
USB2 MF
402 L101 59B6>
52A3> 33D3<>
R458 165-OHM 33B3<> 33A4<> USB_PORT_PWR 1
0 2 SM
56B3> 32C1<> USB2_DBN_F 1 56A3> USBT_DBN_F 2 3 59C6> 56A3> USB_DAN_CON 2
5%
1/16W
59C6> 56A3> USB_DAP_CON 3 USB PORT 2
MF 4
402 USB1 USB_GND
SYM_VER-2
1 4
R45 6
0 1
C 58B5> 28B2< USB_DBP_F 1
5%
2 56A3> USBT_DBP_F R1009
NOSTUFF
0 USB1 USB1
C1
10UF (514-0048)
C
1/16W 1 2 2 N20P80% 52C4
USB2 MF 1 C387 1 C383 10V 1 C386 36C1<> 36B6<> 36B6< 36B2< 36A7<> 33D4<
402 5% Y5V 33C4<
1
R453 1
R452 1/16W 33PF 33PF 805 0.01UF 33B2<
R459 MF 5%
50V
5%
50V
10% 25B3<>
0 2 15K 15K 402 16V 25C3<
56B3> 32C1<> USB2_DBP_F 1 5% 5% 402 402 1 402
1 C433 33B4<
1/16W 1/16W 0.01UF 33D2<
5%
1/16W
MF MF 52C4 C380 10% ALT 36C1<
MF 2 402 2 402 0.01UF 16V
2 CERM
CHASSIS
402 10%
2 16V 402
CERM
ALT 402
CHASSIS
52C4
PLACE NEAR CONNECTOR
PLACE UNDER
NOSTUFF USB CONNECTOR
R1010 ALT
CHASSIS
USB1
1
0 2 J6
R48 F-RT-USB-NMP1
5% TH-1
USB_DAN_F 1
0 2
1/16W
MF 7
SYM_VER-2
58B5> 28B2<
402
5%
1/16W 5
402
USB2
MF L102
165-OHM
59B6>
52A3> 33D3<>
R456 33C3<> 33A4<> USB_PORT_PWR 1
0 2 2 SM 3
56B3> 32C1<> USB2_DAN_F 1 56B3> USBT_DAN_F 59C6> 56A3> USB_DBN_CON 2
5%
1/16W
59C6> 56A3> USB_DBP_CON 3 USB PORT 1
MF 4
402 USB1 1 4 USB_GND
SYM_VER-2
R47 6
0 1
58B5> 28B2< USB_DAP_F 1 2 56B3> USBT_DAP_F R1011 C6
USB1 USB1 10UF
B USB2
5%
1/16W
MF
1
0 2
1 C391 1 C389
2 N20P80%
10V
Y5V
1 C398 36A7<>
(514-0048) 52C4 36C1<> 36B6<> 36B6<
33D4< 33D2< 33C4< 33C2< 33B4< 25C3< 25B3<>
B
402
1 1
5%
33PF 33PF 805 0.01UF 36B2<
R451 R450 1/16W 36C1<
R457 MF 5% 5% 10%
0 2 15K 15K 402 50V 50V 16V
56B3> 32C1<> USB2_DAP_F 1 5% 5% 402 402 1 402 1
1/16W 1/16W NOSTUFF C417
5%
1/16W
MF MF C385 0.01UF
MF 2 402 2 402 0.01UF 10% ALT
CHASSIS
16V
402 2 10%
16V 2 CERM
CERM 402
ALT 36B2< 36A7<> 33D4< 402
CHASSIS33B2< 25C3< 25B3<>
THE ABOVE RESISTORS SHARE 33D2< 33C4< 33C2<
52C4 36C1< 36C1<> 36B6<> 36B6<
+5V_MAIN THE SAME PIN-2 PAD AND ARE
LOCATED AT THE USB2 CHIP
PLACE UNDER
USB CONNECTOR
ALT
CHASSIS
USB_PWR 25B5<> 25C2< 25D3<> 52A3>
U3501 L2
TPS2023 FERRITE-4532
SOI
2 IN_0 OUT_0 8 1 2 59B6> 52A3> 33D3<> 33C3<> 33B3<> USB_PORT_PWR
SM
3 IN_1 OUT_1 7
NOSTUFF NOSTUFF
OUT_2 6 1 1 1 1 1
C7 C5 C396 C377 C382
USB_PWR_EN 4 EN OC 5 USB_PWR_FLT* 28B3< 28C1< 32B1< 150UF 150UF 0.01UF 0.01UF 0.01UF
20% 20% 10% 10% 10%
16V 16V 16V
10K PULLUP ON PAGE 28 2 6.3V
POLY
2 6.3V
POLY
1 1 C3502 GND 402 402 402
R3501 0.1UF 1
SMD SMD
47
5%
1/16W
MF
20%
2 10V
CERM
402 USB_GND
USB CONNS & PWR
A 2 402

A
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 33 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
D D
CLKENET_LINK_TX 35C8<
57C5>
R307
33 2
57C5> 35C6< ENET_PHY_TX_EN 1 57C5> ENET_LINK_TX_EN
5%
1/16W
MF
402
R303
33 2 TEST PULL-DOWNS
57C5> 35C6< ENET_PHY_TX_ER 1 57C5> ENET_LINK_TX_ER H9
TX_CLK U25 R707
5% A7 1
47 2 INT_RESET_L
1/16W TX_EN INTREPID SEE_TABLE 35B8< 41A7< 43C7< 44D2<> R575
MF A5 BGA 1K 2
402 TX_ER (4 OF 9)
(ON PAGE 12) 5%
1/16W INT_JTAG_TEI 1
34B7<
MF
57C5> 35C6<> ENET_PHY_TXD<0> 4 5 57C5> ENET_LINK_TXD<0> H10 TXD_0 402 R275 1%
RP70 47 2 R576 1/16W
57C5> 35C6<> ENET_PHY_TXD<1> 3 6 57C5> ENET_LINK_TXD<1> E9
TXD_1 1 INT_PU_RESET_L 15B3< 44C2<> MF
33 1K 2 402
57C5> 35C6<> ENET_PHY_TXD<2> 2 1/16W 7 57C5> ENET_LINK_TXD<2> D8 TXD_2 5% 34B7< INT_TST_MONIN_PD 1
5% 1/16W
57C5> 35C6<> ENET_PHY_TXD<3> 1 SM1 8 57C5> ENET_LINK_TXD<3> A6
TXD_3 MISC
RESET U5 RINT_RESET_L MF 1%
402 1/16W
NC_ENET_LINK_TXD<4> B7
TXD_4 MF
PURESET T2 RINT_PU_RESET_L 402
NC_ENET_LINK_TXD<5> G10
TXD_5
NC_ENET_LINK_TXD<6> D9
TXD_6
PHY_DATA0 L4 57A5> FW_LINK_DATA<0> 1 8 FW_D<0> 36C8< 57A5>
NC_ENET_LINK_TXD<7> E10
TXD_7 RP112 NO_TEST
R684
PHY_DATA1 M4 57A5> FW_LINK_DATA<1> 2 7 FW_D<1> 36C8< 57A5> 10K 2
22 NO_TEST 34B5<> FW_PINT 1
57C5> 35C8< CLKENET_LINK_RX J12
RX_CLK PHY_DATA2 P7 57A5> FW_LINK_DATA<2> 3 5% 6 FW_D<2> 36B8< 57A5>
NO_TEST 1%
57B5> 35B8< ENET_RX_DV C4 RX_DV PHY_DATA3 N5 57A5> FW_LINK_DATA<3> 4 1/16W 5 FW_D<3> 36B8< 57A5> 1/16W
SM1 MF
ENET_RX_ER D2 K1 57A5> FW_LINK_DATA<4> 4 5 NO_TEST FW_D<4> 36B8< 402
57B5> 35B8< RX_ER PHY_DATA4 57A5>
K2 57A5> FW_LINK_DATA<5> 3
RP65 6 NO_TEST FW_D<5> 36B8< 57A5>
ENET_LINK_RXD<0> D3 PHY_DATA5 22
C 57B5> 35C8<
57B5> 35C8< ENET_LINK_RXD<1> E7
RXD_0
RXD_1
GB ETHERNET
PHY_DATA6 L2
N4
57A5> FW_LINK_DATA<6> 2
57A5> FW_LINK_DATA<7> 1
5%
1/16W
7
8
NO_TEST FW_D<6> 36B8<
FW_D<7> 36B8<
57A5>
57A5>
C
ENET_LINK_RXD<2> D6 PHY_DATA7 SM1
57B5> 35C8< RXD_2
57B5> 35B8< ENET_LINK_RXD<3> B4 RXD_3 PHY_LPS M1 FW_LPS 36C8< R269 I2C 3.3V PULL-UPS
FIREWIRE 22 2
1 8 ENET_LINK_RXD<4> A4
RXD_4 PHY_CTL0 P5 57A5> FW_LINK_CNTL<0> 1 FW_CNTL0 36C8< 57A5> +3V_MAIN
RP76
2
33
7 ENET_LINK_RXD<5> D7 RXD_5 PHY_CTL1 L1 57A5> FW_LINK_CNTL<1> 402 5% MF
R709
1/16W RP119
3 1/16W 6 ENET_LINK_RXD<6> G9
RXD_6 PHY_LREQ M2 57A5> FW_LINK_LREQ 22 2 4.7K 5
5% 1 FW_CNTL1 36C8< 57A5> INT_I2C_CLK0R 4
4 SM1 5 ENET_LINK_RXD<7> E8
RXD_7 FWR_PCLK T7 FW_SCLK 36C8< 57A5> 34B5<>
402 5% MF
CLKENET_LINK_GBE_REF L13
GBE_REFCLK R702 1/16W 5%
1/16W
NC_CLKENET_LINK_GTX H12
GTX_CLK FWR_LCLK U14 CLKFW_LINK_LCLK 22 2 SM1 RP119
1 FW_LREQ 36C8< 57A5> 4.7K 7
57B5> 35B8< ENET_CRS E6
CRS FW_LINKON N2 FW_C_LKON 28B6< 36B5<> 34B5<> INT_I2C_DATA0R 2
5%
57B5> 35B8< ENET_COL C5
COL FW_PINT N1 FW_PINT 34C1< 1
R673 1/16W
5%
MF
35A8<> ENET_MDIO B5
MDIO 1K 402 RP101 1/16W
SM1
35B6< ENET_MDC B6 1% 4.7K 8
MDC 1/16W
MF 34A3<> INT_I2C_CLK1 1
2 402 5%
1/16W
59D8> 28C6< 8A4<> JTAG_ASIC_TDI AK8
TDI SM1 RP101
35B3< 28C6< JTAG_INTRP_TDO AT5 INT_V2 4.7K 6
TDO R257 34A3<> INT_I2C_DATA1 3
59D8> 35C4< 8A4<> JTAG_ASIC_TCK AP5
TCK 0 2
1 INT_I2C_CLK0 14A6<> 15A6< 5%
59D8> 35B4<> 35A2< 8A4<> JTAG_ASIC_TMS AR5
TMS 1/16W
SM1
MF 5% 402
59C8> 8A4<> JTAG_ASIC_TRST_L AN6
TRSTN TEST 34C1< IICCLK_0 AN2 INT_I2C_CLK0R 1/16W
INT_V2
34C1< INT_JTAG_TEI AH10
TEI 34C1< IICDATA_0 AN1 INT_I2C_DATA0R R254
34C1< INT_TST_MONIN_PD AM7
TST_MONIN 0 2
NO_TEST INT_I2C_CLK1 1 INT_I2C_DATA0 14A6<> 15A6<
NC_INT_TST_MONOUT_TP AK10
TST_MONOUT IICCLK_1 AK5 MF 5% 402
28C6< INT_TST_PLLEN_PD AR6 TST_PLLEN IICDATA_1 AM3 INT_I2C_DATA1 1/16W
INT_V1
NOSTUFF R637
1 0 2
R714
B 1K
1%
1
5%
C92
47PF
59A8> 39B1<> 29C7<> 28D1< 28A3<> INT_I2C_CLK2
MF
1
5% 402
B
1/16W INT_V1 1/16W
MF 2 50V
CERM R647
2 402 402 0 2
59A8> 39B1<> 29C7<> 28D1< 28A3<> INT_I2C_DATA2 1
MF 5% 402
1/16W
NOSTUFF
+3V_MAINJ18
M-ST-LK
TH
1
INT_I2C_CLK1 2
INT_I2C_DATA1 3
4
INTREPID VERSION 1 HAS AN I2C BUS PROBLEM
USE KEY LARGO’S I2C INSTEAD.
(515-1560) FIXED IN INTREPID VERSION 2
I2C DEBUG HEADER
INT_I2C_CLK1 34B1<
INT_I2C_DATA1 34B1<
INTREPID ENET & FW
A
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 34 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
PLACE CLOSER TO PIN 22
ENET_DVDD PIN 12 PIN 55

PIN 27, 28 ENET_AVDD 35D2<>
MIN_LINE_WIDTH=20 52C6>
MIN_LINE_WIDTH=20
1 C57 1 C67 1 C53
+3V_MAIN 10UF
N20P80% 10%
0.01UF
20%
0.1UF
1 C56
0.01UF
1 C44
0.1UF
1 C52
10UF
10V 16V 10V 10% 20% N20P80%
PLACE NEAR PIN 20 2 Y5V 2 CERM 2 CERM
805 402 402 2 16V
CERM 2 10V
CERM 2 10V
Y5V
402 402 805
PIN 3 PIN 46 PIN 8 MIN_LINE_WIDTH=20
D ENET_AVDD 35D4<> 52C6>
D
RE-PLACE NEAR PIN 1> 1 C41 1 C66 1 C37 1 C65 1 C3501 1 C68
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 10UF 1 C438 1 C434
20% 20% 20% 20% 20% N20P80%
2 10V
CERM 2 10V
CERM
10V
2 CERM 2 10V
CERM 2 10V
CERM 2 10V
Y5V
0.1UF 0.1UF
20% 2 20%
402 402 402 402 402 805 10V 10V
2 CERM CERM
402 402
NC_UB3P4 NO_TEST
1 C401
0.1UF
20%
MIN_LINE_WIDTH=20 10V
NOTE: 1.5MM SPACE FROM TRACE TO GND 2 CERM
402
20
55
27
28
46
22
3
8
R372 R402 R331 R301 J1
49.9 49.9 49.9 49.9
REGDVDD
REGAVDD
DVDD1
DVDD2
AVDD1
AVDD2
OVDD1
OVDD2
REFCLK
BIASVDD
OVDD/NC
TH-NMP-1
1% 1% 1% 1% T1 10
1/16W 1/16W 1/16W 1/16W
MF
402 1
MF
402 1
MF
402 2
MF
402 2
XFR-100BT SYM_VER-2
MDIX
57B5> ENET_TDP 1 SM 16 57B5> RJ45_TXP 1
57B5> RJ45_TXN 2
ENET_AVDD 2 15 57B5> RJ45_TREF 57B5> RJ45_RXP 3
R38 4
33 CLKENET_PHY_TX U37
57C5> 34D7< CLKENET_LINK_TX 1 2 NO_TEST 57C5> 53 TXC TD+ 31 57B5> ENET_TDN 3 14 57B5> RJ45_4_5 5
5%
ENET_PHY_TXD<0> 57 TXD0 TD- 30 NC_TX1_1 NO_TEST 4 NC1 TX NC4 13 NO_TEST NC_TX1_3 57B5> RJ45_RXN 6
1/16W
MF
57C5> 34C7< FLAS-1 NC_TX1_2 NO_TEST 5 NC2 NC3 12 NO_TEST NC_TX1_4 57B5> RJ45_7_8 7
402 57C5> 34C7< ENET_PHY_TXD<1> 58 TXD1 RD+ 26
TRANSC_BCM5221 57B5> ENET_RDP 6 11 8
34C7< ENET_PHY_TXD<2> 59 TXD2 RD- 25 C
C 57C5>
57C5> 34C7< ENET_PHY_TXD<3> 60 TXD3 SD+ 21 +3V_MAIN ENET_AVDD
CRITICAL 7 10 57B5> RJ45_RREF
9
57C5> 34C7< CLKENET_LINK_RX 57C5> 34D7< ENET_PHY_TX_EN 56 TXEN SEE_TABLE
SD- 19 NC
57C5> 34D7< ENET_PHY_TX_ER 52 TXER 1 1 57B5> ENET_RDN 8 9

R27 R165 RX
R34 10K 10K 1 C400
RP1 1% 1%
33 33 1/16W 1/16W 0.1UF
1 2 57C5> CLKENET_PHY_RX 50
RXC FDX 39 FDX 35A5< MF MF 52C4 20%
10V
5%
1/16W 5% 402 MF F100/JTAG_TCK 37 JTAG_ASIC_TCK 8A4<> 34B7< 2 402 2 402 2 CERM
57B5> 34C7< ENET_LINK_RXD<0> 8 1 57B5> ENET_PHY_RXD<0> 48
RXD0 59D8> 402
ENET_LINK_RXD<1> 7 2 57B5> ENET_PHY_RXD<1> 47 ANEN/JTAG_TRST 38 ANEN
57B5> 34C7< RXD1 TESTEN 15 TESTEN 35A5< R3941 R3931 R3911 R3901
57B5> 34C7< ENET_LINK_RXD<2> 6 3 57B5> ENET_PHY_RXD<2> 44
RXD2 75 75 75 75
MII_EN 18 MII_EN
57B5> 34C7< ENET_LINK_RXD<3> 5
1/16W
4 57B5> ENET_PHY_RXD<3> 43
RXD3 LOW_PWR 16 LOW_PWR 35A5<
1%
1/16W
MF
1%
1/16W
MF
1%
1/16W
MF
1%
1/16W
MF
(514-0030)
R29 57B5> ENET_PHY_RX_DV 49 402 2 402 2 402 2 402 2
ENET_RX_DV
SM1
33 RXDV
57B5> 34C7< 1 2 57B5> ENET_PHY_RX_ER 51
RXER
5%
57B5> ENET_PHY_CRS 62
CRS
RP15
1/16W
MF ENERGY_DET 17 ENET_ENERGY_DET 28B5<> 28C1< NOSTUFF
57B5> ENET_PHY_COL 61
34C7< ENET_RX_ER
RP15 1 8 33 402
COL ENET_RDAC_PD R326 57B5> RJ45_F_TREF
57B5>
57B5> 34C7< ENET_CRS 2 7 1/16W
33 5% ETHPHYRESET_L 9 RDAC 23 0 1 C3
1/16W 5% RP15 33
RESET* MIN_LINE_WIDTH=20 1 2 JTAG_INTRP_TDO 28C6< 34B7> 0.001UF
57B5> 34B7< ENET_COL 3 6
1/16W 5% 34B7> ENET_MDC 42
MDC 5% 20%
2KV
1/16W 2 CERM
41
MDIO JTAG_ENET_TDI 35A2< MF
1808
402
R75 57B5> CLK25M_ENET_XIN 6 LNKLED/JTAG_TDI* 35 JTAG_ENET_TDI
43C7<
NOSTUFF
1K XTALI SPDLED/JTAG_TMS* 36 JTAG_ASIC_TMS 8A4<> 34B7< 35A2< 59D8>
34C3< INT_RESET_L 1 2 57B5> CLK25M_ENET_XOUT 5
XTALO 42A5<> 41D3< 41C3< 41B3< 41B1<> 41A4< 41A2<> 40C6< 40B6< 40B5<> 35C1<>
41A7<
5%
XMTLED* 34 XMIT_LED 35A2< 52C4 43A5< 42A6<>
44D2<> 1/16W
MF
NC 10
PHYAD0 RCVLED/JTAG_TDO* 33 JTAG_ASIC_TDO 8A4<> 59D8>
11
402 NC
12
PHYAD1
NC PHYAD2 +3V_MAIN
B R76
1K CRITICAL
NC 13
PHYAD3 1
R26 1
R42 B
INT_ENET_RST_L
28D1< 1 2 NC 14
PHYAD4 10K 1.27K
Y6 1% 1%
JTAG_EN
BIASGND
1% 1/16W 1/16W
1/16W 25.0000M MF MF
OGND3/
PLLGND
MF
402 1 2 2 402 2 402
OGND1
OGND2
DGND1
DGND2
AGND1
AGND2
DEV DEV DEV
1 1 1
D9 8X4.5MM-SM R486 R491 R492
44D3< C74 1 1 C76 330 330 330
32A6< IO_RESET_L 3 1
27PF 27PF 5% 5% 5%
44B8<> 5% 5% 1/16W 1/16W 1/16W
59A8> 50V 50V 1 MF MF MF 1
1N914 CERM 2 2 CERM R485 2 402 2 402 2 402 R96
SOT23
40
45
64
54
63
29
32
24
402 402 4.7K 4.7K
5% DS3P1 DS1P1 DS2P1 5%
1/16W 1/16W
MF 1 DEV 1 DEV 1 DEV MF
2 402 DS1 DS3 DS2 2 402
ADD DUAL LAYOUT SUPPORT GREEN GREEN GREEN

SM SM SM
FOR ALTERNATE CRYSTAL 2 2 2
PHY ADDRESS 00000 10/100 XMIT LINK
59D8> 35B4<> 34B7< 8A4<> JTAG_ASIC_TMS
+3V_MAIN RP16
10K 35B4<> XMIT_LED
5%
1
R28 35B5<> JTAG_ENET_TDI
FDX 35C4< 1 8
1.5K
1% TESTEN 35C4< 2 7
1/16W
MF LOW_PWR 35B4< 3 6
2 402 OGND3_JTAG_EN 4 5
1/16W
SM1
ETHERNET PHY
A
TABLE_5_HEAD

34B7<> ENET_MDIO PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
TABLE_5_ITEM
338S0127 1 IC,BCM5231,FAST ENET XCVR,64P,TQFP U37 CRITICAL ENET_BCM5231 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 35 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
D8 FW_12V
MURS320T3 SEE_TABLE
52B6> 51D2<> FW_PWR_SW 1 2 L1
NOSTUFF F2
0.75AMP FERRITE-4532
R1016 SM
52B6>
0 52B6> FW_VP 1 2 52B6> FW_VP_1 36D1<> 1 2 FW_VP1
50D5< 44D7<> 44C6< 44C2< 3.8V_TRICKLE 1 2
SM
52C2> 52C1> 1
5%
D47 SM C381
1/16W
MF MURS320T3
PHY_NOT_LEAKS 1 C410 3A 0.001UF
603 1 0.1UF (155S0109) 10%
51D4<> 50C6<> 29B3< FW_PWR 1 2 R39 10% 50V
2 CERM
52B6>
FW_24V
390K
5%
50V
2 CERM NOSTUFF 402 PORT 1
SM 1/16W
MF
1210 1
R1 L7 (514-0023)
0 DO NOT STUFF R1 PER SAFETY REQUIREMENTS 165-OHM
52B6> 36D7< 36B7< 36B5< FW_PHY_3_3 2 603 5% SM
1/8W 1 SYM_VER-2 4 J5
D FW_VREG_FB 1
R409
PHY_LEAKS
SEE_TABLE
FF
2 1206
TH-NMP-UF1161C
D
1
R35 2 3
57A5> 36B8<> FW_TPO1P 6
TPO
4.7K L3
6 5% 47 F3
1/16W 5% FERRITE-4532 57A5> 36A8<> FW_TPO1N 5
TPO#
VTAP MF 1/16W 0.75AMP 52B6> L8
2 402 MF 1 2 52B6> FW_VP_2 36C1<> 1 2 FW_VP2 165-OHM 57A5> 36A8<> FW_TPI1P 4
+12V_MAIN
59D8> U3 2 402 SM TPI
R404 LP2951 SM 1 SYM_VER-2 4
56 2 SOI-3.3V SM 1 C376 57A5> 36A8<> FW_TPI1N 3
TPI#
1 U22_8 8
IN OUT
1
52B6>
1 C418 3A 0.001UF
5% 2 5 36B7< 36B5< FW_PHY_3_3 0.1UF (155S0109) 10% 52B6> 36D3<> FW_VP1 1
1W SENSE ERR 36D7< 10% 2 50V 2 3 VP
FF 3
SHUT FDBK 7
1 C12 1 2 50V
CERM
CERM
402 2
2512
FW_XI_A
C10 1210 VGND
GND 22UF 22UF
1 C27 20% 20%
1UF 4 2 4V 2 4V 1 1 7 8 9 33C2<
20%
ELEC
SM
ELEC
SM C477 C384 C378 33B2<
R418 0.01UF 0.01UF
FW_CPS
25V U4
2 CERM NOSTUFF 27PF 100 2 5% 5%
25B3<>
25C3<
1206 1 2 57A5> 1 FW_XI FW802A 50V
CERM 2
50V
CERM 2 33B4<
30 AVDD0 TQFP DVDD0 7
603 603 33C4<
1% 33D2<
5% NOSTUFF 31 AVDD1 17
50V
1/16W
MF
DVDD1 33D4<
CERM 1 43 AVDD2 26 36A7<>
3
402 R422 DVDD2 36B2<
R438 R4171 402
1 5.1M 50 AVDD3 DVDD3 27 52C4
ALT
CHASSIS 36B6<
2K 2 10K Y1 5% 36B6<>
28C5<> FWPHYRST 1 FW_PHY_RST 1 Q30 1% 24.576M 1/16W 51 AVDD4 DVDD4 62
1 1 1 1
52C4 36C1< 36C1<>
1/16W MF R9 R8 R13 R12 ALT
5% 2N3904 MF SM 402 2 CHASSIS
1/16W R425
1 SM 603 2 C500 2 CRITICAL 24 CPS 57A5> TPBIAS0 37 FW_BIAS1 56.2 56.2 56.2 56.2
MF 2 1% 1% 1% 1%
402 4.7K
5%
27PF 59 XI TPBIAS1 42 57A5> FW_BIAS2 1/16W
MF
1/16W
MF
1/16W
MF
1/16W
MF
PORT 2
1/16W 1 2 57A5> FW_XO 60 XO NC_48 48 2 603 2 603 2 603 2 603 (514-0023)
MF
402 2 19 PD L5 J2
5%
TPA0+ 36 57A5> FW_TPA1P 165-OHM
50V 28 SE SM TH-NMP-UF1161C
CERM TPA0- 35 57A5> FW_TPA1N 1 SYM_VER-2 4
402 29 SM 57A5> 36A8<> FW_TPO2P
TPB0+ 34 57A5> FW_TPB1P 6
FW_PHY_RST* 61 RESET TPO
TPB0- 33 57A5> FW_TPB1N 57A5> 36A8<> FW_TPO2N
FW_PHY_ISO* 2 3 5
C 34C4<> FW_LPS
23 ISO
16 LPS TPA1+ 41 57A5> FW_TPA2P
57A5> FW_TPA2N
L6
165-OHM 57A5> 36A8<> FW_TPI2P 4
TPO# C
57A5> 34C3< FW_LREQ 1 LREQ TPA1- 40 SM TPI
TPB1+ 39 57A5> FW_TPB2P 1 SYM_VER-2 4 57A5> 36A8<> FW_TPI2N
57 PLLVDD 3
57A5> 33 R424 [OUT] TPB1- 38 57A5> FW_TPB2N TPI#
34C5<> FW_SCLK 1 2 57A5> FW_PHY_SCLK 63 SYSCLK 52B6> 36D3<> FW_VP2 1
33 NC_47 47 VP
34C3< FW_CNTL0 1 2 1/16W 5% MF 402 57A5> FW_PHY_CNTL0 3 CTL0
NOSTUFF NOSTUFF
2 3
57A5>
FW_CNTL1 33 FW_PHY_CNTL1 NC_46 46
34C3< 1/16W 5% MF 402 57A5> 1 2 4 CTL1 C442 1 1 C441 2
VGND
57A5>
RP2 1/16W 5% MF 402
NC_45 45 10PF 10PF NOSTUFF NOSTUFF
R432 NC_44 44 5% 5%
R431 50V 2 50V C446 1 1 C445 C379 1 C375 1
33 5% CERM 2 CERM 7 8 9 33C2<
57A5> 34C3< FW_D<0> 1 8 57A5> FW_PHY_D<0> 5 D0 R0 54 FW_R0 402 402 10PF 10PF 0.01UF 0.01UF 33B2<
1 1 1 1 5% 5% 5% 5% 25B3<>
57A5> 34C3< FW_D<1> 2 7 57A5> FW_PHY_D<1> 6 D1 R1 55 FW_R1 1 R11 R10 R15 R14 50V 2 50V 50V 50V 25C3<
56.2 56.2 56.2 56.2 CERM 2 CERM CERM 2 CERM 2 33B4<
57A5> 34C3< FW_D<2> 3 6 57A5> FW_PHY_D<2> 8 D2 PC2 22 R411 1% 1% 1% 1%
402 402 603 603
33C4<
2.49K 1/16W 1/16W 1/16W 1/16W 33D2<
57A5> 34C3< FW_D<3> 33 5%
4 5 57A5> FW_PHY_D<3> 9 D3 PC1 21 1% MF MF 1 MF MF 1
36C1< 36C1<> 36B6<> 33D4<
SM1 1/16W 2 603 2 603 C457 2 603 2 603 C456 33C2< 33B4< 33B2< 25C3< 25B3<> 36A7<>
57A5> 34C3< FW_D<4> 1 8 1/16W 57A5> FW_PHY_D<4> 10 D4 PC0 20 MF 0.47UF 0.47UF 36B6< 36A7<> 33D4< 33D2< 33C4< 36B2<
2 603 52C4 36B6<
57A5> 34C3< FW_D<5> 2 7 57A5> FW_PHY_D<5> 11 D5 20%
16V
20%
16V
NOSTUFF ALT
PLLVSS 58 FW_TPB2 2 CERM FW_TPB1 2 CERM CHASSIS 36B6<>
57A5> 34C3< FW_D<6> 3 6 57A5> FW_PHY_D<6> 12 D6 805 805 C444 1 36C1<>
52C4 36C1<
57A5> 34C3< FW_D<7> 4 5 57A5> FW_PHY_D<7> 13 D7 C/LKON 18 10PF NOSTUFF ALT
NOSTUFF NOSTUFF 5% CHASSIS
SM1 1 1 50V 1
1/16W
1 1 1 R402 1 R16 CERM 2 C443
15 CNA C440 C439 C452 C450 402 10PF
NOSTUFF RP3 1 10PF 10PF 220PF 4.99K 220PF 4.99K 5%
R423 1% 1%
1 C42 R4301 R4331 2 DGND0 AGND0 32 5%
50V
5%
50V
5%
25V 1/16W 5%
25V 1/16W 2 50V
CERM
47PF 4.7K CERM 2 2 CERM 2 CERM MF 2 CERM MF 402
5% C490 1 4.7K 4.7K 14 DGND1 AGND1 49 5% 402 402 402 2 603 402 2 603
0.01UF 5% 5% 1/16W
2 50V
CERM 10% 1/16W 1/16W 25 DGND2 AGND2 52 MF
402 16V MF MF 2 402
CERM 2 402 2 402 2 56 DGND3 AGND3 53
402 64 DGND4
FW_C_LKON 28B6< 34C5<>

NC_FW_CNA
B R395
L32
100-OHM-EMI
NO_TEST
B
52B6> 36D7< 36B5< FW_PHY_3_3
52B6> 1
10K 2 FW_DIO_V 1 2
1% SM52B6> 36B7<> FW_DIODE_BYPASS_V
1/16W
MF
52B6> 36B6<> FW_DIODE_BYPASS_V
1N5227B
402 1 C4 1 C406 52B6>

3
DVDD BYPASS
SOT23
5 1 0.1UF 0.001UF 36B7< FW_PHY_3_3

C428
D25
20% 10% 36D7<

D4 0.1UF 10V 50V
36D1<> FW_TPO1P 3 D4 BAV99DW 20% C424 1 2 CERM 2 CERM
NOSTUFF NOSTUFF
BAV99DW SOT-363 10V 402 402
57A5> 2 CERM 0.1UF
1
SOT-363 1 C484 1 C455 1 C463 1 C464 1 C471 1 C458 1 C481 1C483 1 C482 1 C451 1 C496 1 C495 1 C468 1 C472 1 C485
4 2 402 20%
10V
CERM 2
10UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 10UF 10UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF
N20P80% 10% 10% 10% 10% 10% 10% N20P80% N20P80% 10% 10% 10% 10% 10% 10%
FW_TPO1N 6 402 10V 16V 16V 16V 16V 16V 16V 10V 10V 16V 16V 16V 16V 16V 16V
36D1<> ALT ALT 2 Y5V 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 Y5V 2 Y5V 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
57A5> CHASSIS CHASSIS 805 402 402 402 402 402 402 805 805 402 402 402 402 402 402
1
5
36D1<> FW_TPI1P 3 D3 D3
57A5> BAV99DW BAV99DW 1 C399 1 C392 1 C393 1 C390
SOT-363 SOT-363
4 0.001UF 0.001UF 0.001UF 0.001UF
2 10% 10% 10% 10%
2 50V
CERM 2 50V
CERM 2 50V
CERM
50V
2 CERM
FW_TPI1N 6 402 402 402 402
36D1<>
57A5>
1
5
1 C411 1 C395 1 C394 1 C407
36C1<> FW_TPO2P 3 D2 D2
57A5> BAV99DW BAV99DW 0.001UF 0.001UF 0.001UF 0.001UF
SOT-363 SOT-363 10% 10% 10% 10%
4
2 2 50V
CERM 2 50V
CERM 2 50V
CERM
50V
2 CERM
402 402 402 402 TABLE_5_HEAD

36C1<>
57A5>
FW_TPO2N 6
740S0527 2 FUSE,0.75A,30V,SMD F2,F3 PWRS_Q26
TABLE_5_ITEM
FIREWIRE PHY
A 5
1 ONE CAP FOR EACH DIODE PIN
AVDD BYPASS 740S0506 2 FUSE,0.5A,SMD F2,F3 PWRS_Q59
TABLE_5_ITEM

A
36C1<> FW_TPI2P 3 D1 LAST_MODIFIED=Wed Sep 17 12:16:41 2003
57A5> BAV99DW THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
SOT-363 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
4 AGREES TO THE FOLLOWING
D1 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
BAV99DW II NOT TO REPRODUCE OR COPY IT
SOT-363
52C4 SIZE DRAWING NUMBER REV.

36C1<> FW_TPI2N 6
57A5>
1 D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
ALT
CHASSIS
NONE 36 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
+5V_SLEEP 3_6V_SLEEP 51C1<
+5V_SLEEP
NOSTUFF NOSTUFF
NOSTUFF NOSTUFF
1 1 1 1 C3901
R944 R943 R941
4.7K 10K 4.7K 0.1UF
1 1 10%
R623 1 R754 5% 1% 5% 16V
10K R768 1K R6351 1/16W
MF
1
R767 1/16W
MF
R7591 1/16W
MF
2 X7R
1% 10K 1% 10K 10K 4.7K 603
1/16W 1% 1/16W 1% 2 402 1% 2 402 5% 2 402
MF 1/16W MF 1/16W 1/16W 1/16W
402 2 MF 2 402 MF MF MF
2 402 402 2 2 402 402 2
D D
ATA_D0 V5 UIDE_DATA<0> 37C3< 58C5> R627 R626
33 2 33 2
ATA_D1 T1 UIDE_DATA<1> 37C3< 58C5> 58D5> 37A7> EIDE_RST_L 1 CD_RESET_L 38C6<> 58D5> 58C5> 37C7<> UIDE_RST_L 1 HD_RESET_L 38C3<> 58C5>
U25 ATA_D2 U1 UIDE_DATA<2> 37C3< 58C5> 5% 5%
INTREPID 1/16W 1/16W
ATA_D3 U2 UIDE_DATA<3> 37C3< 58C5> MF R774 MF R773
BGA 402 22 2 402 22 2
(5 OF 9) ATA_D4 V4 UIDE_DATA<4> 37B3< 58C5> 58D5> 37A7<> EIDE_DMACK_L 1 CD_DMACK_L 38C6<> 58D5> 58C5> 37C7<> UIDE_DMACK_L 1 HD_DMACK_L 38C3<> 58C5>
SEE_TABLE ATA_D5 V2 UIDE_DATA<5> 37B3< 58C5> 5% 5%
1/16W 1/16W
(ON PAGE 12) ATA_D6 W1 UIDE_DATA<6> 37B3< 58C5> R258 MF R273 MF
22 2 402 22 2 402
ATA_D7 V1 UIDE_DATA<7> 37B3< 58C5> 58D5> 37A7> EIDE_STOP 1 CD_STOP 38C6<> 58D5> 58C5> 37C7<> UIDE_DIOR_L 1 HD_DIOR_L 38C3<> 58C5>
ATA_D8 W2 UIDE_DATA<8> 37B3< 58C5> 5% 5%
1/16W 1/16W
ATA_D9 W8 UIDE_DATA<9> 37B3< 58C5> MF R263 MF R270
W4 UIDE_DATA<10> 37B3< 58C5> EIDE_HSTB_RDY
402
1
22 2 CD_HSTB_RDY 38C6<> UIDE_DIOW_L
402
1
22 2 HD_DIOW_L 38C3<>
ATA_D10 58D5> 37A7> 58D5> 58C5> 37C7<> 58C5>
UATA100 W5 UIDE_DATA<11> 37B3< 58C5> 5% 5%
ATA_D11
1/16W 1/16W
ATA_D12 Y2 UIDE_DATA<12> 37B3< 58C5> R761 MF R753 MF
UIDE_DATA<13> 37A3< 58C5> 82.5 2 402 82.5 2 402
ATA_D13 Y1 58D5> 37A7< EIDE_DSTB_RDY 1 CD_DSTB_RDY 38C6<> 58D5> 58C5> 37C7< UIDE_IOCHRDY 1 HD_IOCHRDY 38C3<> 58C5>
ATA_D14 W7 UIDE_DATA<14> 37A3< 58C5> 1% 1%
1/16W 1/16W
ATA_D15 Y8 UIDE_DATA<15> 37A3< 58C5> C917 1 MF C911 1 MF
402 402
10PF 10PF
ATA_A0 Y5 UIDE_ADDR<0> 38B4< 58B5> 5%
50V
5%
50V
UIDE_ADDR<1> CERM 2 CERM 2
ATA_A1 AB1 38B4< 58B5> 402 402
ATA_A2 Y7 UIDE_ADDR<2> 38A4< 58B5> NOSTUFF
NOSTUFF
ATA_VREF Y15 UIDE_REF
ATA_RST Y4 UIDE_RST_L 37D3< 58C5>
ATA_WR AA1 UIDE_DIOW_L 37C3< 58C5> RP111 RP118
ATA_RD AA2 UIDE_DIOR_L 37D3< 58C5> 33 8 33 8
58D5> 37B7<> EIDE_DATA<0> 1 UATAD<0> 38C6<> 58D5> 58C5> 37D7<> UIDE_DATA<0> 1 T_UD_IDEDD_0 38C3<> 58C2>
ATA_CHRDY AA5 UIDE_IOCHRDY 37C3< 58C5>
C ATA_CS0
ATA_CS1
AA4
AB2
UIDE_CS1FX_L 38B4< 58B5>
UIDE_CS3FX_L 38B4< 58B5>
5%
1/16W
SM1
RP111
33 7
5%
1/16W
SM1
RP118
33 7
C
ATA_DMACK AC1 UIDE_DMACK_L 37D3< 58C5>
5% 5%
ATA_DMARQ AC2 UIDE_DMARQ 38C4< 58C5> RP111 1/16W RP118 1/16W
33 6 SM1 33 6 SM1
ATA_INTRQ AA8 UIDE_INTRQ 38C4< 58C5>
5% 5%
+3V_MAIN 1/16W
SM1
RP111
33 5
1/16W
SM1
RP118
33 5
CS_CE1 AD1 NC_CSLOT_CE1_L
CS_CE2 AB4 NC_CSLOT_CE2_L 1
R266 5% 5%
CS_IORD AB5 NC_CSLOT_IORD_L RP104 1/16W RP103 1/16W
10K 33 SM1 33 SM1
CS_IOWR AD2 NC_CSLOT_IOWR_L 1%
CARDSLOT 1/16W 58D5> 37B7<> EIDE_DATA<4> 1 8 UATAD<4> 38C6<> 58D5> 58C5> 37D7<> UIDE_DATA<4> 1 8 T_UD_IDEDD_4 38C3<> 58C2>
CS_OE AC4 NC_CSLOT_OE_L MF
402 2 5% 5%
CS_WE AE1 NC_CSLOT_WE_L 1/16W RP104 1/16W RP103
SM1 33 7 SM1 33 7
52A8> CS_WAIT AE2 CSLOT_IOWAIT_L
5% 5%
RP104 1/16W RP103 1/16W
33 6 SM1 33 6 SM1
IDEDD0 AC5 EIDE_DATA<0> 37C5< 58D5>
58D5> 37B7<> EIDE_DATA<6> 3 UATAD<6> 38C6<> 58D5> 58C5> 37D7<> UIDE_DATA<6> 3 T_UD_IDEDD_6 38C3<> 58B2>
IDEDD1 AD4 EIDE_DATA<1> 37C5< 58D5>
5% 5%
IDEDD2 AF1 EIDE_DATA<2> 37C5< 58D5> 1/16W RP104 1/16W RP103
SM1 33 5 SM1 33 5
IDEDD3 AG1 EIDE_DATA<3> 37C5< 58D5>
IDEDD4 AF2 EIDE_DATA<4> 37B5< 58D5>
5% 5%
IDEDD5 AH1 EIDE_DATA<5> 37B5< 58D5> RP107 1/16W RP106 1/16W
33 1 SM1 33 1 SM1
IDEDD6 AD5 EIDE_DATA<6> 37B5< 58D5>
IDEDD7 AG2 EIDE_DATA<7> 37B5< 58D5>
5% 5%
IDEDD8 AE4 EIDE_DATA<8> 37B5< 58D5> 1/16W RP107 1/16W RP106
SM1 33 2 SM1 33 2
IDEDD9 AE5 EIDE_DATA<9> 37B5< 58D5>
B IDEDD10
IDEDD11
AF4
AH2
EIDE_DATA<10> 37B5< 58D5>
EIDE_DATA<11> 37B5< 58D5> RP107
5%
1/16W RP106
5%
1/16W
B
33 3 SM1 33 3 SM1
IDEDD12 AD7 EIDE_DATA<12> 37B5< 58D5>
58D5> 37B7<> EIDE_DATA<10> 6 UATAD<10> 38C6<> 58D5> 58C5> 37C7<> UIDE_DATA<10> 6 T_UD_IDEDD_10 38C2<> 58B2>
IDEDD13 AG4 EIDE_DATA<13> 37A5< 58D5>
5% 5%
IDEDD14 AJ1 EIDE_DATA<14> 37A5< 58D5> 1/16W RP107 1/16W RP106
SM1 33 4 SM1 33 4
IDEDD15 AJ2 EIDE_DATA<15> 37A5< 58D5>
IDE IDEA0 AF5 EIDE_ADDR<0> 38B8< 58C5> 5% 5%
AE7 EIDE_ADDR<1> 38B8< 58C5> RP115 1/16W RP114 1/16W
IDEA1 33 8 SM1 33 1 SM1
IDEA2 AK1 EIDE_ADDR<2> 38A8< 58C5> 58D5> 37B7<> EIDE_DATA<12> 1 UATAD<12> 38C6<> 58D5> 58C5> 37C7<> UIDE_DATA<12> 8 T_UD_IDEDD_12 38C2<> 58B2>
IDEA3 AG5 NC_CSLOT_ADDR<3> 5% 5%
AH4 NC_CSLOT_ADDR<4> 1/16W RP115 1/16W RP114
IDEA4 SM1 33 7 SM1 33 2
IDEA5 AL1 NC_CSLOT_ADDR<5> 58D5> 37B7<> EIDE_DATA<13> 2 UATAD<13> 38C6<> 58D5> 58C5> 37C7<> UIDE_DATA<13> 7 T_UD_IDEDD_13 38C2<> 58B2>
IDEA6 AK2 NC_CSLOT_ADDR<6> 5% 5%
AH5 NC_CSLOT_ADDR<7> RP115 1/16W RP114 1/16W
IDEA7 33 6 SM1 33 3 SM1
IDEA8 AF7 NC_CSLOT_ADDR<8> 58D5> 37B7<> EIDE_DATA<14> 3 UATAD<14> 38C6<> 58D5> 58C5> 37C7<> UIDE_DATA<14> 6 T_UD_IDEDD_14 38C2<> 58B2>
IDEA9 AG7 NC_CSLOT_ADDR<9> 5% 5%
1/16W RP115 1/16W RP114
SM1 33 5 SM1 33 4
IDECHRDY AK4 EIDE_DSTB_RDY 37C5< 58D5>
IDECS0 AB7 EIDE_CS1FX_L 38B8< 58C5>
5% 5%
IDECS1 AM1 EIDE_CS3FX_L 38B8< 58C5> 1/16W 1/16W
1 SM1 1 SM1
AJ4 EIDE_RST_L 37D5< 58D5> R640 R679
IDERST 10K 10K
IDEWR AM2 EIDE_STOP 37D5< 58D5> 1%
1/16W
1%
1/16W
IDERD AL2 EIDE_HSTB_RDY 37C5< 58D5> MF MF
2 402 2 402
IDEDMACK AG8 EIDE_DMACK_L 37D5< 58D5>
IDEDMARQ AH7
AA7
EIDE_DMARQ 38C8< 58D5>
EIDE_INTRQ 38C8< 58C5>
INTREPID UATA/IDE
A IDEINTRQ
A
2
R624 LAST_MODIFIED=Wed Sep 17 12:16:43 2003
1K THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1% AGREES TO THE FOLLOWING
1/16W
MF I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
1 402
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 37 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
D D
OPTICAL DRIVE INTERFACE ATA-100 INTERFACE

J15 J16
R737 ST-NC20 R743 ST-NC20
58D5> 37A7< EIDE_DMARQ 1
82.5 2 TH
58C5> 37C7<> UIDE_DMARQ 1
82.5 2 TH +5V_SLEEP
1% 58D5> 37D4< CD_RESET_L 1 2 1%
1 58C5> 37D1< HD_RESET_L 1 2
1/16W 1/16W R745
MF 1
R744 58D5> 37B4< UATAD<7> 3 4 UATAD<8> 37B4< 58D5> MF 58B2> 37B1< T_UD_IDEDD_7 3 4 T_UD_IDEDD_8 37B1< 58B2>
402 402 5.6K
5.6K 58D5> 37B4< UATAD<6> 5 6 UATAD<9> 37B4< 58D5> 5% 58B2> 37B1< T_UD_IDEDD_6 5 6 T_UD_IDEDD_9 37B1< 58B2>
5% 1/16W
1/16W 58D5> 37B4< UATAD<5> 7 8 UATAD<10> 37B4< 58D5> MF 58C2> 37B1< T_UD_IDEDD_5 7 8 T_UD_IDEDD_10 37B1< 58B2>
MF
2 402 58D5> 37B4< UATAD<4> 9 10 UATAD<11> 58D5> +5V_SLEEP 2 402 58C2> 37B1< T_UD_IDEDD_4 9 10 T_UD_IDEDD_11 37B1< 58B2>
58D5> 37C4< UATAD<3> 11 12 UATAD<12> 37B4< 58D5> 58C2> 37C1< T_UD_IDEDD_3 11 12 T_UD_IDEDD_12 37B1< 58B2> 59D8>
51C8<
58D5> 37C4< UATAD<2> 13 14 UATAD<13> 37A4< 58D5> NOSTUFF 58C2> 37C1< T_UD_IDEDD_2 13 14 T_UD_IDEDD_13 37A1< 58B2> 51C5<>
50D5<
58D5> 37C4< UATAD<1> 15 16 UATAD<14> 37A4< 58D5> 1
R781 58C2> 37C1< T_UD_IDEDD_1 15 16 T_UD_IDEDD_14 37A1< 58B2> 46D6<>
46C7<
58D5> 37C4< UATAD<0> 17 18 UATAD<15> 37A4< 58D5> 1K 58C2> 37C1< T_UD_IDEDD_0 17 18 T_UD_IDEDD_15 37A1< 58B2> 1 NOSTUFF
19 5% 19 R779
1/16W
CD_DMARQ 21 22 MF
HD_DMARQ 21 22
1K
58D5> 58C5>
2 402 5%
1/16W
58D5> 37D4< CD_STOP 23 24 58C5> 37C1< HD_DIOW_L 23 24 MF
58D5> 37C4< CD_HSTB_RDY 25 26 58C5> 37D1< HD_DIOR_L 25 26 2 402
C R782
58D5> 37C4< CD_DSTB_RDY
58D5> 37D4< CD_DMACK_L
27
29
28
30
52A8> EIDE_CSELP_L
PLACE NEAR CONNECTOR
R783
58C5> 37C1< HD_IOCHRDY
58C5> 37D1< HD_DMACK_L
27
29
28
30
52A8> UIDE_CSELP_L C
82.5 2 82.5 2
58C5> 37A7< EIDE_INTRQ 1 58D5> UATA0IRQ 31 32 52A8> EIDE_IOCS16_L 58C5> 37C7< UIDE_INTRQ 1 58C5> HD_INTRQ 31 32 52A8> UNUSED_ATAIOCS16_L
1% 58C5> CD_EIDE_ADDR<1> 33 34 EIDE_PDIAG 1% 58C5> HD_UIDE_ADDR<1> 33 34 UIDE_PDIAG
1/16W 1/16W
MF 58C5> CD_EIDE_ADDR<0> 35 36 58C5> CD_EIDE_ADDR<2> MF 58C5> HD_UIDE_ADDR<0> 35 36 58C5> HD_UIDE_ADDR<2> 1
R758
402 402
58C5> CD_CS1FX_L 37 38 58C5> CD_CS3FX_L 1
R760 58B5> HD_UIDE_CS1FX_L 37 38 58B5> HD_UIDE_CS3FX_L 1 C920 0
1 C921 5%
39 40 0 39 40 0.047UF 1/16W
0.047UF 5% 5% MF
5% 1/16W 1
R780 2 16V 2 603
2 16V
CERM MF CERM
603
1 NOSTUFF 603 2 402
6.2K
R775
6.2K
1 C919 (515-1588) 5%
1/16W
MF
(515-1588)
R784 5% 100PF R785 402
5% 2
58C5> 37B7> EIDE_ADDR<1> 1
33 2 1/16W
MF 50V
2 CERM
+5V_SLEEP 58B5> 37C7<> UIDE_ADDR<1> 1
33 2 +5V_SLEEP
5% 2 402 603 5%
1/16W 1/16W
MF DEV MF DEV
402 402
1 1
R793 R792
R789 330 DEV 330
EIDE_ADDR<0> 33 2 5% 5%
58C5> 37B7> 1 DEV 1/16W DS7 1/16W
MF MF
5%
1/16W
DS8 2 402 R787 2 402
MF 33 2 DS2_2 2 1 DS2_1
402 58B5> 37C7<> UIDE_ADDR<0> 1
DS6_2 2 1 DS6_1
R790 5%
1/16W
GREEN
SM
EIDE_CS1FX_L 33 2 GREEN MF
58C5> 37A7> 1 SM 402 ATA-100 ACTIVE
5%
1/16W
OPTICAL DRIVE ACTIVE
MF C924 1
402
100PF
5%
50V
CERM 2
R268
33 2
B R791
402 58B5> 37C7<> UIDE_CS1FX_L 1
5%
B
1/16W
EIDE_CS3FX_L 1
33 2 MF
402
58C5> 37A7>
5%
1/16W
MF
402
C923 1 R265
100PF UIDE_CS3FX_L 1
33 2
5% 58B5> 37C7<>
50V 5%
CERM 2 1/16W
402 MF
402
R788
33 2
58C5> 37B7> EIDE_ADDR<2> 1
5%
1/16W R786
MF
402 UIDE_ADDR<2> 1
33 2
58B5> 37C7<>
5%
1/16W
MF
402
CD/HD CONS
A
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 38 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
AUD_R_FB
VTAP
U14
41B8<> 39C6<> +5V_AUDIO LP2951 +3V_AUDIO 39D2< 39D7< 40C3< 43B2< 43C6<
8 SOI-3.3V 1
IN OUT L63
43C6< 43B2< 40C3< 39D6< 39D2< +3V_AUDIO 2
SENSE ERR
5 NC_VR4 100UH
3 7 52C4 43C7< 42C8< 42B7< 42B5< 41A7< 41A5< 40D5< +3V_MAIN +3V_AUDIO 39D6< 39D7< 40C3< 43B2< 43C6<
1 C549 SHUT FDBK 1
C538
59D8> 1 2 TAS_DVDD
D 0.1UF
20%
16V
GND 22UF
20%
SMA D
2 CERM 4 2 10V 1 1 1 1 NOSTUFF
603
TANT
SMB C600 C599 C584 C591
3.3UF 0.1UF 0.1UF 3.3UF
10% 20% 20% 10%
2 16V 2 16V
CERM
16V
CERM 2 2 16V
TANT TANT
OPA_STAR_GND 39A7<> SMA 603 603 SMA
40C2< 43A3<
+3V_MAIN
R502 TAS_STAR_GND 39A7<>
100K 2
1 TAS_PWR_DOWN 39B4<
1%
1/16W
MF 3
402
D
Q32
R501 2N7002
0 2 SLEEP_OFF_L2 SM
59D6> 51C6< 50C8< 50C3< 42D8< PWR_UP 1 1 G S
5%
1/16W 2
MF
402
1 C579 17 35
1000pF
5% DVDD AVDD
25V
2 CERM
R5211 603
AINLM 46 AINLM AOUTL 39 AOUTL 41D7< 43D3<
24.9K AINLP 47 AINLP U15
1%
1/16W
AINRM 43 TAS3004 37 AOUTR
MF AINRM PQFP AOUTR 41C7< 43D3<
402 2
AINRP 42 AINRP
1
R517 1 C578 40C2< LINA 1 LINA
24.9K 1000pF
1% 5%
UX6_LINB 48 LINB
1/16W
2 25V
C DIRECT FROM PS (TRACES)
VR1 +5V_AUDIO
MF
2 402
CERM
603
1 C121
0.1UF 43B2<
RINA
40B2<
MIC_IN
40
41
RINA
RINB
C
51A7< 51A5< 50D5<> LM1117 39D7< 41B8<> 20%
51B7< 49D3<> 49C4<> 48D6<> SOT-223-4 2 16V R531
CERM
45B4<> 44D8< 42B3< 36D8< +12V_MAIN 3 IN OUT 2 603 47 2
51C3< 48C8<> 48C4<> 45D7< 45D3<> 28B1< SND_TO_AUDIO 22 SDIN1 SDOUT0 25 U5_SDOUT 1 AUDIO_TO_SND 28B1<
50D2< 50C4<> 50B4<> 49D7<> 23 26 NO_TESTNC_TAS_SDOUT1
59D8> 52C1> 51D7<> ADJ/GND SDIN2 SDOUT1
(SYM_VER1) UX6P23 SDOUT2 24 NO_TESTNC_SDOUT2
1 1 28
R482 GPI0
180 C597 29 GPI1
1 5% 0.01UF R5281 R5321 30 INPA 5 NO_TEST NC_INPA
C126 1/16W 2 1 10K 0 GPI2
MF
47UF 2 402 1% 5% 31 GPI3
20% 1
C85 5% 1/16W 1/16W 32 GPI4 LRCLK/O 19 SND_SYNC 28B1<
16V 2 MF MF
ELEC VR4210P1 47UF 50V
CERM 402 2 402 2 33 GPI5 12
SM 20%
603 MCLKO
2 16V
ELEC
1 1 SM C592 SCL 15 INT_I2C_CLK2 28A3<> 28D1< 29C7<> 34B5<
C539 R481 1UF R524 21 IFM/S 59A8>
22UF 560 5.11 2
20% 5% 1 2 CY69P2 1 27 ALLPASS SCLK/O 20 SND_SCLK 28A1<
2 10V 1/16W
TANT MF 1%
SMB 2 402
10%
10V
1/10W CAP_PLL 10 CAP_PLL SDA 16 INT_I2C_DATA2 28A3<> 28D1< 29C7<>
XW4 CERM
FF
11 34B5< 59A8>
SM 805
805 CLKSEL 2 VRFILT
52C4 R264P2 7 CS1 VRFILT
1 2
VCOM 38 TAS_VCOM TAS_VCOM 39B1<> 43D5< 39B1<> 43D5<
VREFM 45 VREFM
43A3< VREFP 44 VREFP
XW32 C588 1 1 C595
SM 1UF 0.1UF 28A1< SND_CLKOUT 13 XTIN1/MCLK
1 2 HP_STAR_GND 41A8< 41B4< 41B8< 41C5< 41D4< 41D7< 10%
10V
20%
16V
CERM 2 2 CERM NC_XTLINO NO_TEST 14 XTLIN0 1
C580 1
805 603 NC0 34 22UF C127
TAS_PWR_DOWN
39D7< 8 PWR_DN 20% 22UF
NC1 36 2 10V 20%
28B5<> 28A8< SND_HW_RESET_L 6 RESET TANT 2 10V
B XW5
SM 9 TEST
SMB TANT
SMB B
1 2 AUD_GND 42B2< 42C4< 42D3< 42D4< 42D6< 42D7< 43C2< 43D2< 43D4< AVSS
DVSS AVSS (REF)
18 4 3
XW1 NOSTUFF C587 1 C581 1

SM 1 C248 0.1UF 0.1UF
PSEUDO_STAR_GND C594 20% 20%
1 2 40B4< 0.1UF 47PF 16V 16V
20% 2 1 CERM 2 CERM 2
16V 603 603
2 CERM
603 5%
XW37 50V
SM CERM
402
1 2 REF_STAR_GND
XW38
SM
1 2 39D2< TAS_STAR_GND
XW34 REF_STAR_GND 39A5<> 39A5<>

SM
1 2 OPA_STAR_GND 39D6< 40C2< 43A3<
ZH3
50R28
1
AUDIO CODEC
& VOLTAGE REGS
A
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 39 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
52C4 43C7< 42C8< 42B7< 42B5< 41A7< 41A5< 39D4< +3V_MAIN

59D8>
D 1 1
D
R180 R175
470K 47.5K
5% 1%
1/16W 1/16W
MF MF
2 402 2 402
SND_LIN_SENSE_L 28B5<> 59B6>

NOSTUFF
C505
3 560PF
L51 L53 D
Q35
1 2 C756_2
1000-OHM-EMI 1000-OHM-EMI 2N7002
SM 5%
59B6> 40B7<> LINE_IN_SENSE 1 2 L3202_1 1 2 LINSENSE 1 G S 50V
R442 CERM
SM SM 14.7K2 603
2 1
1 C454 1 C204 1%
1/16W
100PF 0.1UF MF
5% 20% 402
50V
2 CERM 10V
2 CERM
43C6<
40B5<>
402 402
39D6< 39D2<
43B2< 39D7<
+3V_AUDIO KEEP CLOSE TO IC
35B1<
35C1<>
40B6<
41D3< 41C3< 41B3< 41B1<> 41A4< 41A2<> 40C6< U6
52C4 43A5< 42A6<> 42A5<>
TLV2362 1
C506
KEEP SHORT 0.1UF
20%
8 10V
U4202P3 5 CERM 2 C64
SOI 402
V+ 0.47UF
L46 L50 C25 7 1 2 LINA 39C4<
1000-OHM-EMI 1000-OHM-EMI 3.3UF R435
LINE_IN_L 1 2 L31_2 1 2 LP4202P2 2 1 C4237P2 147.5K2 U4202P2 6 V- 20%
C 59B6> 40B7<>
SM SM
10%
1%
1/16W
4
16V
CERM
805
C
16V MF
1 C437 TANT 402
100PF 1 SMA
5% R407
50V 100K
2 CERM
J10 402 1% NOSTUFF
JA1333C-AN4 1/16W C514 39D6< 39A7<> OPA_STAR_GND
F-RT-TH 35B1< MF 43A3<
35C1<>
40B5<> 2 402 180PF
40B6< 1 2
5
42A5<> 41D3< 41C3< 41B3< 41B1<> 41A4< 41A2<> 40C6<
6 L48 52C4 43A5< 42A6<> L52 5%
1000-OHM-EMI 1000-OHM-EMI C479 50V
3.3UF R434 R474 CERM
C4240P2 47.5K2 14.7K2 402
59B6> 1 LINE_IN_COM 1 2 L32_2 1 2 LP4202P4 2 1 1 1
59B6> 40C7<> 3 LINE_IN_SENSE SM SM 1% 1%
10% 1/16W 1/16W
59B6> 40B6<> 4 LINE_IN_R 16V MF MF
TANT 402 402
59B6> 40C7<> 2 LINE_IN_L SMA OPA_VREF 43A4<>
NOSTUFF
7 3 C480 C513
1 2
R410 1
R420 1 3.3UF R436 180PF
8 C447 1 47.5K2
D5 D29 100K 100 2 1 C4242P2 1 1 2
100PF 1% 5%
5%
50V 15V 15V 1/16W 1/16W 1%
5%
1/16W
CERM 2 SOT23 SOT23 MF
402 2
MF
603 2
10%
16V MF 50V
402 2 1 TANT 402 R462 CERM
3 SMA 14.7K2
1
402
1%
(514-0084) 52C4 43A5< 42A6<>
35B1<
1/16W
MF
42A5<> 41D3< 41C3< 41B3< 41B1<> 41A4< 41A2<> 40C6< 40B6< 35C1<> 402
U6
PSEUDO_STAR_GND 39B7<> 8 TLV2362
U4202P5 3
SOI
V+
B L36
1000-OHM-EMI
L49
1000-OHM-EMI C24
3.3UF R437
1 U4202P7 B
47.5K2 V-
59B6> 40B7<> LINE_IN_R 1 2 L36_2 1 2 LP4202P3 2 1 C4243P2 1 U4202P6 2
SM SM 1% 4
10% 1/16W
16V MF
1 C431 TANT 402
100PF SMA
5%
50V
2 CERM R448
402 1
14.7K2 C63
40B5<>
35B1< 1%
0.47UF
35C1<> 1/16W NOSTUFF 1 2 RINA 39C4<
40C6< MF
41A2<> 402 C507
560PF 20%
52C4 43A5< 42A6<> 42A5<> 41D3< 41C3< 41B3< 41B1<> 41A4< 16V
1 2 CERM
805
5%
50V
CERM
603
LINE IN BUFFER
A
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 40 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
R441
20.5K2
LPL1 1
1%
1/16W
MF
C525 402
C499 C26 L45 L34
3.3UF R473 R447 100PF 100UF R406 1000-OHM-EMI 1000-OHM-EMI
AOUTL 2 1 OGAL 9.09K2
1 1
25.5K2 1 2 1 2 HPGAL_L 1
33 2 HP16_L 1 2 HP_TL 1 2 HEADPHONE_L
43D3< 39C2> 41B2<>
1% 1% 5% SM SM
10% 1/16W 1/16W 5% 20% 1/10W
16V MF MF 50V 16V FF
TANT 402 402 CERM ELEC 805
D SMA 402
+5V_HP 41A8<
41B7<>
SM 1
R419
1 C420
100PF D
1
4.7K 5%
50V
C43 5% 2 CERM
0.001UF 1/16W 402
10% U8 MF
40C6<
2 50V 2 402 40B5<>
CERM TPA6112A2 35B1<
402 SOI 35C1<>
HPIN_L 2 IN1- VDD 10 40B6<
41A2<>
3 IN1+ VO1 1 HP_OUT_L 52C4 43A5< 42A6<> 42A5<> 41C3< 41B3< 41B1<> 41A4<
41D4< 41C5< 41B8< 41B4< 41A8< 39B7<> HP_STAR_GND
41B5< HPBYP 4 BYPASS SHUTDOWN 6 HP_OFF 41A7< HP_STAR_GND 39B7<> 41A8< 41B4< 41B8< 41C5< 41D7<
41B4< PROBE_DIV 7 IN2+ VO2 9 HP_OUT_R

HPIN_R 8 IN2- GND 5
R4121
1 C60 1 C508 4.7K
0.001UF 0.47UF 5%
10% 20% 1/16W
50V 16V MF
2 CERM 2 CERM 402 2
402 805
41D7<
HP_STAR_GND 39B7<> 41A8< 41B4<
C524 C503 C1341B8< 41D4< L44 L27
3.3UF R472 R446 100PF 100UF R400 1000-OHM-EMI 1000-OHM-EMI
9.09K2 25.5K2 33 2
43D3< 39C2> AOUTR 2 1 OGAR 1 1 1 2 1 2 HPGAL_R 1 HP16_R 1 2 HP_TR 1 2 HEADPHONE_R 41B2<>
1% 1% 5% SM
10% 1/16W 1/16W 5% 20% 1/10W SM
16V MF MF 50V 16V FF
TANT 402 402 CERM ELEC 805
SMA 402 SM 1 C412
R444 100PF
20.5K2 5%
LPR1 1 50V
2 CERM
C 1%
1/16W
MF
40B5<>
35B1<
402
C
402
HEADPHONE DRIVER AND 2ND ORDER LPF 35C1<>
40B6<
40C6<
52C4 43A5< 42A6<> 42A5<> 41D3< 41B3< 41B1<> 41A4< 41A2<>
J8
JA1333C-AN4
F-RT-TH
XW33
39D7< 39C6<> +5V_AUDIO SM +5V_HP 41A8< 41D5< 8
1 2 7
HEADPHONE_L
41D2< 2
C453 L42 L35 HEADPHONE_R

41C2< 4
R478 R477 1UF 1000-OHM-EMI 1000-OHM-EMI 41A3< SND_HP_SENSE_CONN 3
1 1 C518 1 C504 9.09K2 20.5K2
C512 41D6< HPBYP 1 1 PB_GAL 1 2 PB_AUD 1 2 C412P1 1 2 HEADPHONE_COM 1
22UF 0.1UF 0.1UF
10% 10% 10% 1% 1% SM
2 6.3V 2 16V
X7R 2 16V
X7R
1/16W 1/16W 20%
25V
SM
6
TANT MF MF
603 603 CERM 1
SMA 402 402
1206 C427 5
100PF
41D7< PROBE_DIV 5%
50V
2 CERM 52C4
41D7< 41D4< 42A5<> 41D3< 41C3< 41B1<> 41A4< 41A2<> 40C6< 40B6< 40B5<> 35C1<> 35B1< 402
41A8< 39B7<> HP_STAR_GND 52C4 43A5< 42A6<>
41C5< 41B4<
LOCATE CLOSE TO AMP
(514-0084)
B POWER SOURCE L47
FERR-250-OHM R392 B
0 2
1 2 HP_TP 1
41D7< 41D4< 41C5< 41B8< 41A8< 39B7<> HP_STAR_GND SM 5%
1/10W
FF
805 3
C408 1
D26
GROUND NOISE CANCELLATION 0.1UF
20%
16V D24
1 2
15V
SOT23
CERM 2 15V 2 1
603
SOT23
52C4 43A5<
3 41B3<
40B5<> 35C1<> 35B1<
41B1<> 41A4< 40C6< 40B6<
41D5< 41B7<> +5V_HP 42A6<> 42A5<> 41D3< 41C3<
1 52C4 43C7< 42C8< 42B7< 42B5< 41A7< 40D5< 39D4< +3V_MAIN

R440 59D8>
100K 39D4< 40D5< 41A5< 42B5< 42B7< 42C8< 43C7< 52C4 59D8>
1% +3V_MAIN
1/16W
MF 1
2 402 NOSTUFF 1 C4301 R162
HP_OFF 41D5< R4301 0.1UF 10K
20% 1%
1
0 2 10V
2 CERM 1/16W
MF
402 2 402
5%
3 1/16W 1
MF 59B8> 28B5<> SND_HP_SENSE_L R181
Q31 D 402
8 100K
1%
2N7002 A
5 SND_HP_MUTE_L 28C5<> 1/16W
SM MF
S G 1 SND_HP_M_L 3
Y U48
B
6 INT_RESET_L 34C3< 35B8< 43C7< 44D2<> Q5
3
D
2 402
L43 L39
HEADPHONE OUT AMP
A 2 NC7WZ08
SOI 4
2N7002
SM
S G 1
Q25_1 1
R182
100K 2 L43_1
1000-OHM-EMI
1 2
LO_T1
1000-OHM-EMI
1 2 SND_HP_SENSE_CONN 41B2<> NOTICE OF PROPRIETARY PROPERTY
A
41B8< 41B4< 39B7<> HP_STAR_GND 1% SM SM LAST_MODIFIED=Wed Sep 17 12:16:50 2003
41D7< 41D4< 41C5< 2 1/16W THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
MF PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
402 AGREES TO THE FOLLOWING
1 C436
1 C208 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
100PF
0.1UF 5% II NOT TO REPRODUCE OR COPY IT
20%
10V 2 50V
CERM
2 CERM 402 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
402
HP DETECT 35B1<
35C1<>
40B5<>
MUTE & SHUTDOWN

40B6<
52C4 43A5< 42A6<> 42A5<> 41D3< 41C3< 41B3< 41B1<> 41A2<> 40C6< D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 41 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
TABLE_5_HEAD
TPA_5V IS NOT USED IN THIS SCHEMATIC

TABLE_5_ITEM
155S0148 4 FILTR,EMI,160OHM,6A,1206 L90,L91,L93,L96

C1068 42C5< 42C4< 42B7< 42B2< +12V_TPA
10UF
43D4< 43D2< 43C2< 42D6< 42D4< 42D3< 42C4< 42B2< 39B7<> AUD_GND 2 1 TPA_V2P5 TPA_5V 3
MIN_LINE_WIDTH=25
51C6< 50C8< 50C3< 39C8< PWR_UP 20%
6.3V MIN_LINE_WIDTH=25 Q36 D
59D6> R109 NOSTUFF CERM 1
R984 2N7002
1
R108 1
0 2
1206 1 C1069 100K
SM
S G 1 SND_AMP_M_L 43C7<>
47.5K 1UF
R99 1% 5% 20%
25V
1%
1/16W
U10_OUT 160K 2 1/16W 1/16W
R981 TPA_AVDD_REF 2 CERM MF 2 1
R985
42C7> 1 Q2_GATE MF MF
805
43D4<
2 402
2 402
402
2
14.7K1 43C2< 100K
5% 42D6< 1%
D
1/16W
MF
402
1 C36
1UF
20% 1
1%
1/16W 4 33 29 7 8
42C4<
AUD_GND 39B7<>
42B2<
1/16W
MF
2 402
D
25V
2 CERM 3 R982 MF
402 V2P5 AVCC AVDD AVDD VREF 42D3<
42D7< AUD_GND 39B7<> 42B2< 42C4< 42D4< 42D6< 42D7< 43C2< 43D2< 43D4<
805 24.9K REF 43D2<
D Q2 1%
1/16W
2N7002 MF
SM 402 2 TI_MODE_OUT
1 G S TI_SD* 1 SD* MODE_OUT 35
1
R135 MODE 34 TPA_MODE
2 42D7< 42D4< 42D3< 42C4< 42B2< 39B7<> AUD_GND 9 VARDIFF NET_PHYSICAL_TYPE=AUDIO
0 43D4< 43D2< 43C2< 10 32
5% VARMAX VAROUTR NC
1/16W NET_PHYSICAL_TYPE=AUDIO 31
MF TPA_VOL 11 VOL VAROUTL NC
2 402
NOSTUFF
NET_PHYSICAL_TYPE=AUDIO TPA_BSLN 13 BSLN U49 BSRN 48 NET_PHYSICAL_TYPE=AUDIO TPA_BSRN
NET_PHYSICAL_TYPE=AUDIOTPA_BSLP 24 BSLP SN0210045A BSRP 37NET_PHYSICAL_TYPE=AUDIO TPA_BSRP
C1063 1 PQFP 1 C1072 SEE_TABLE
SPKROUT_R_N 42A8<
42A8< SPKROUT_L_N SEE_TABLE 0.01UF 1 C1064 43D4< LINP 5 LINP RINP 3 RINP 43D4< C1071 1
L90
5%
50V 0.01UF LINN 6 LINN
CRITICAL
RINN 2 RINN 43C2< 0.01UF 5%
0.01UF L96 L95
L89 CERM 2 5% 43D2< 5% 2 50V
TB321611B130 10UH 1 C1100
C1099 1 TB321611B130 603 50V 50V CERM
10UH 1206 2 CERM
16 LOUTN0 ROUTN0 44 CERM 2 603 1 2 PRESPK_ROUTN 1 2 1UF
1UF 603 603 20%
20% 1 2 PRESPK_LOUTN 1 2 TPA_LOUTN 17 LOUTN1 45 TPA_ROUTN 1206 SM-9 25V
25V ROUTN1 2 CERM
CERM 2 SM-9 NET_PHYSICAL_TYPE=AUDIO NET_PHYSICAL_TYPE=AUDIO 805
805 SEE_TABLE 20 40 SEE_TABLE
LOUTP0 ROUTP0
PRESPK_LOUTP
42A8< SPKROUT_L_P 1 2 1 2 TPA_LOUTP 21 LOUTP1 ROUTP1 41 TPA_ROUTP 1 2 PRESPK_ROUTP 1 2 SPKROUT_R_P 42A8<
NET_PHYSICAL_TYPE=AUDIO NET_PHYSICAL_TYPE=AUDIO
L92 L91 14 PVCCL0 PVCCR0 38
L93 L94
10UH TB321611B130 42D5< 42C4< 42B7< 42B2< +12V_TPA +12V_TPA 42B2< 42B7<
TB321611B130 10UH
SM-9 1206 NET_PHYSICAL_TYPE=AUDIO 15 PVCCL1 PVCCR1 39 NET_PHYSICAL_TYPE=AUDIO 42C5< 42D5< 1206 SM-9
42B5< 41A7< 41A5< 40D5< 39D4< +3V_MAIN C1059 1 1 C1060 22 PVCCL2 PVCCR2 46 C1074 1 1 C1075
2700PF 2700PF
59D8> 52C4 43C7< 42B7< 5%
50V
5%
50V
23 PVCCL3 PVCCR3 47 2700PF 2700PF
5% 5%
CERM 2 2 CERM 50V 50V
805 805 18 42 CERM 2 2 CERM
PGNDL0 PGNDR0 805 805
NET_PHYSICAL_TYPE=AUDIO
NET_PHYSICAL_TYPE=AUDIO 19 PGNDL1 PGNDR1 43
1
R121
C 1%
47.5K
1/16W C1066 1
TPA_VCLAMPL
NET_PHYSICAL_TYPE=AUDIO
25 VCLAMPL VCLAMPR 36 TPA_VCLAMPR NET_PHYSICAL_TYPE=AUDIO
1 C1073
C
MF 1UF 30 FADE* COSC 28 TPA_COSC NET_PHYSICAL_TYPE=AUDIO 1UF
2 402 8 20% ROSC 27 TPA_ROSC NET_PHYSICAL_TYPE=AUDIO 20%
U10_A 1
A
SOI 25V
CERM 2 REF THRML 25V
2 CERM
7 U10_OUT 805 GND AGND PAD 805
3 2
U10 Y 42D8<
12 26 49
R9831 1 C1070
B 118K 220PF
NC7WZ08 1% 5%
R110
D Q3 4 1/16W
MF
25V
2 CERM
2N7002 402 2 402
SPKR_RM 1
100K 2 SPKR_RMS 1 G
SM
S
R4202 AUD_GND 39B7<> 42B2< 42D3< 42D4< 42D6< 42D7< 43C2< 43D2< 43D4<
1% 1/16W
1 TI_MODE_OUT_2 30.1K2
1
MF 402 2
1 C45 1%
R120 1UF 1/16W
MF L99
100K 20% 603 FERRITE-4532
1% 2 25V
CERM
1/16W 2 59D8> 52C1> 51D7<> 51C3< 51B7< 51A7< 51A5< (+12V_TPA)
MF
805 L41 D48 1 C4201 1
R4203 48C8<> 48C4<> 45D7< 45D3<> 45B4<> 44D8< 39C8< 36D8< +12V_MAIN 1 2
402 1000-OHM-EMI SOT23E 10UF 30.1K 50D5<> 50D2< 50C4<> 50B4<> 49D7<> 49D3<> 49C4<> 48D6<> SM
43C7< 42C8< 42B5< 41A7< 41A5< 40D5< 39D4< +3V_MAIN 1 2 L41_FILT 2

10%
16V
2 CERM
1%
1/16W
1 C1082 1 C1089PLACE C4306
59D8> 52C4 MF 10UF 0.1UF
SM 1210 10% 20% NEAR PINS 33, 26
3 2 603 16V
2 CERM 2 16V
1 +3V_MAIN CERM
R525 39D4< 40D5< 41A5< 41A7< 42B7< 42C8< 43C7< 52C4 59D8> 1210 603
47.5K 1
1 1
AUD_GND 39B7<> 42C4< 42D3< 42D4< 42D6< 42D7< 43C2< 43D2< 43D4<
1%
1/16W
R4201 R242 MIN_LINE_WIDTH=12
MF
BAV99 4.7K 47.5K +12V_TPA
R522 2 402 5%
1/16W
1%
1/16W
NOSTUFF 42B7< 42C4< 42C5< 42D5<
SND_SPKR_ID 121 SND_SPKR_ID_U10 R249
28B5<> 1 2
MF
2 402
MF
2 402 0
1 C1083 1 C1090MIN_LINE_WIDTH=25
PLACE C4307 AND C4308
1% 1 2 10UF 0.1UF
3 10% 20% NEAR PINS 14,15, 18
MF Q4 5% 16V
2 CERM 16V
2 CERM
402 D 1/16W 1210 603
1/16W 2N7002 42C5< 42C4< 42B2< +12V_TPA 3 MF
SM 42D5< 402
B S G 1 SPDA
2N7002
Q6 D
R324
MIN_LINE_WIDTH=20
(+12V_TPA)
B
SM 4.7K 2
2 1NOSTUFF 1
1
R239 1
R240 S G 1 42_I295 1 KS_INT_SPKR- 29A3< 43D7< 58A5> 59B8> NOSTUFF
R526 1 C582 1 C108 R51 2K 2K 1
5% C1102 1 C1080 1 1 C1084 1 C1091
249K 2.2UF 10UF 47.5K 1% 1% 2 R245 1/16W
220UF 220UF 10UF 0.1UF PLACE C4309 AND C4310
1% 1% 1/8W 1/8W MF
1/16W N20P80%
16V
10%
16V 1/16W FF FF 470K 402 20% 20% 10%
16V
20%
16V NEAR PINS 22,23, 19
MF 2 CERM 2 CERM MF 16V 2 16V 2
2 1206 2 1206 5%
ELEC ELEC
2 CERM 2 CERM
2 402 805 1210 2 402 1/16W
MF SM-2 SM-2 1210 603
(TPA_GND)
2 402
42_I291 (+12V_TPA)
1 C1085 1 C1092
J3 10UF
10%
0.1UF
20%
PLACE C4311 AND C4312
NEAR PINS 38,39, 42
HSJ1724-REV-E-NMP 2 16V
CERM 2 16V
CERM
TH-2MT 1210 603
10 MIN_LINE_WIDTH=20
LP1 SPKR_JACK_DALLAS 7 (+12V_TPA)
FERR-8A
MIN_LINE_WIDTH=25
42C1< SPKROUT_R_N 1 8 SPKR_RM 6
SPKR_LP 2 C1081 1 1 C1086 1 C1093 PLACE C4313 AND C4314
MIN_LINE_WIDTH=25 220UF 10UF 0.1UF NEAR PINS 46,47, 43
42C1< SPKROUT_R_P 2 7 43D8< INT_SPKR+ 4 20% 10% 20%
5
16V 2 2 16V
CERM 2 16V
CERM
43D8< INT_SPKR- ELEC
1210 603
MIN_LINE_WIDTH=25 SM-2
42C8< SPKROUT_L_N 3 6 SPKR_LM 3 (TPA_GND)
SPKR_RP 1
MIN_LINE_WIDTH=25
42C8< SPKROUT_L_P 4 5 NET32_B 8
SM
(514-0020)
C1061 1 C1062 1 C1065 1 C1067 1 L26 52C4
9
L40
SPEAKER AMP
A 0.01UF
20%
0.01UF
20%
0.01UF
20%
0.01UF
20%
1000-OHM-EMI 1000-OHM-EMI
A
50V 50V 50V 50V 1 2 NET32 1 2
CERM 2 CERM 2 CERM 2 CERM 2 LAST_MODIFIED=Wed Sep 17 12:16:53 2003
805 805 805 805 D23
SOT23
SM SM THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
2
1 C388 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
47PF
5% II NOT TO REPRODUCE OR COPY IT
3
52C4 43A5< 42A5<> 2 50V
CERM
41B3< 41B1<>
1 40C6< 40B6<
35B1< SIZE DRAWING NUMBER REV.
40B5<> 35C1<>
BAS40-4 41A4< 41A2<>
41D3< 41C3< D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 42 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
L97
TB321611B130
41D7< 39C2> AOUTL
42A6<> INT_SPKR+ 1 2 KS_INT_SPKR+ 29A3< 58A5> 59B8> C1076
1206 1UF R986 C1088 1
1 2 200 2 1UF
VCOML 1 LINP 42C5<
L98 AUDIO 5%
10%
10V
TB321611B130 10% 1/16W
NET_PHYSICAL_TYPE=AUDIO CERM 2
10V 1 805
MF C1078 R989
D 42A6<> INT_SPKR- 1
1206
2 KS_INT_SPKR- 29A3< 42B4< 58A5> 59B8> CERM
805
402
0.047UF
10%
16V LINN1 1
200 2 LINN 42C5<
D
2 CERM
5%
402 1/16W
39B1<> TAS_VCOM AUD_GND 39B7<> 42B2< 42C4< 42D3< 42D4< 42D6< 42D7< 43C2< 43D2< MF 1 C1095
NET_PHYSICAL_TYPE=AUDIO 402
0.047UF
1 C1079 10%
16V
0.047UF 2 CERM
10% 402
C1077 2 16V 41C7< 39C2> AOUTR
1UF R987 CERM
402 AUD_GND 39B7<> 42B2< 42C4< 42D3< 42D4< 42D6< 42D7< 43C2<
1 2 VCOMR 200 2 RINP 1 43D4<
1 42C4< C1087
AUDIO 5% NET_PHYSICAL_TYPE=AUDIO 1UF
10% 1/16W 10%
10V MF 10V
CERM 402 CERM 2
805 805
R988
R4401 +3V_MAIN 39D4< 40D5< 41A5< 41A7< 42B5< 42B7< 42C8< 52C4 59D8> 200 2
NOSTUFF
1
0 2 RINN1 1 RINN 42C4<
5%
5% 1/16W
1/16W MF 1 C1094
MF 402
402 NC7WZ08 0.047UF
8 10%
SND_AMP_MUTE_L 1 SOI 16V
28C5<> A 2 CERM
7 SND_AMP_M_L 42D3< 402
U48 Y AUD_GND 39B7<> 42B2< 42C4< 42D3< 42D4< 42D6< 42D7<
44D2<> 41A7< 35B8< 34C3< INT_RESET_L 2
B 43D2< 43D4<
4
C C
R4507
330 2 MIC_FIX
43B2< 40C3< 39D7< 39D6< 39D2< +3V_AUDIO 1
1/16W
5%
MF
402
518S0008
J4501 J4502
DF13B-4P-1.25V DF13B-4P-1.25V
NOSTUFF F-ST-SM F-ST-SM NOSTUFF
5 5
1 43A6<> 1 M1S NEEDED FOR MIC NOISE

2 43B6<> 2 M1H
1
3 43A6<> 3 M1L C4502
4 4
22UF
20%
2 10V R421
2
TANT
SMB 2.2K
6 6 5%
1/16W
MF
402
1
C542
100PF
2
B 5% 50V B
CERM 402
L79 L60 C35 R488 C556
1000-OHM-EMI R4501 R4504 1000-OHM-EMI R414 2.2UF 2.2K R489 0.1UF
43B6<> 0 2 JAZ 1 0 2 M1H 330 2 121K 2
MICHIGH M1FH M1HFILT MIC1 MIC2 MIC3 MIC4 MIC_IN
2
59A8> 58A5> 29A5<> 1 2 1 1 2 1 1 2 1 39C4<
SM 5% NO_TEST 5% SM 5% 5% 1% 20% 16V
1/16W 1/16W 1/16W 20% 1/16W 1/16W
1 C642 MF MF MF 10V MF MF CERM 603
47PF 402 402 402 CERM
805
402 402 +3V_AUDIO 39D2< 39D6< 39D7< 40C3< 43C6<
5%
50V
2 CERM 1
402 C551
24B3< R413 0.1UF
2
29A3< 1 C478 20%
52C4 43A7< 47.5K U13 2 16V
470PF 1% TLV2362 CERM
10% 1/16W 8 SOI 603
50V MF 5
2 CERM
402
V+
1
402
7
6 V-
L81 L59 3
1000-OHM-EMI 1000-OHM-EMI 4
R4502 R4505
43B6<> 0 2 ASH 1 0 2 M1L Q33
59A8> 58A5> 29A5<> MICLOW 1 2 M1FL 1 1 2 39B4< VREFP 1
SM 5% NO_TEST 5% SM 2N3904
1/16W 1/16W SM
1 C675 MF MF
402 402 2
47PF
5% U13
2 50V TLV2362 8
CERM
402 SOI
3 MIC5
V+
24B3<
29A3<
52C4 43B7<
1
V- 2 1 C550
1
R498
47.5K
MIC PREAMP
A 4
10%
1UF 1%
1/16W
MF NOTICE OF PROPRIETARY PROPERTY
A
10V
2 X5R 2 402
603 LAST_MODIFIED=Wed Sep 17 12:16:55 2003
52C4 42A6<> 42A5<> THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
L83 41D3< 41C3< PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
1000-OHM-EMI R4503 R4506 R487 41B3< 41B1<> 40B3< OPA_VREF AGREES TO THE FOLLOWING
0 2 KAVAN 0 2 0 2 41A4< 41A2<> 39D6< 39A7<> OPA_STAR_GND I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
59A8> 58A5> 29A5<> MICSHLD 1 2 MIC1S1 1 43B6<> 1 M1S 1 40C6< 40B6< 40C2<
35B1< II NOT TO REPRODUCE OR COPY IT
5% NO_TEST 5% 5% 40B5<> 35C1<>
SM 1/16W 1/16W 1/16W III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
MF MF MF
402 402 402
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
PLACE R4501, R4502 AND R4503 NEAR AUDIO PLACE R4504, R4505 AND R4506 NEAR KITCHENSINK NONE 43 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
NOSTUFF
3.8V_TRICKLE 36D8< 44C2< 44C6< 50D5< 52C1> 52C2>
PMU SUPPORT
R280 PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION
0 2 2
1 3.8VH_TRICKLE
52B3>
D12 341S1008 1 PMU,M16C62,64KB,PRMGD U26
5%
1/16W
Q12 MBR0530 SM 59C6>
R693 MF 2N3904 D11 52B3> 44C2< 44B1< 44A5<> 29C3<> PMU_POWER R287 44B5< PMU_AVCC 525-0057 1 CONN,BATTERY HOLDER BT1
603 SM 52B3>
100 2 SM 1 4.7 2 59C8>
2
PMU OPERATES ON 2.7 TO 3.6 VOLTS
+12V_MAIN
59D8> 1 +12V_DROPPED 1 2 1 8D1< 8A3<> 7C7< 7C5< 7C3< 7B3< 7A3< 6D6< 6C5< 4D5< +MAXBUS_SLEEP NOSTUFF
52C6> 46D4< 45D2<> 44D2< 44B7< 9D8< 9B7< 8D4<
5%
1
5% U46
1W
FF 1 MBR0530 R297 1 C267 1 C759 1
1/16W
MF
SN74LVC1G04
2512 R290 0 C245 603
5
2.2UF 0.1UF
1
787 1 5% N20P80% 20%
47UF 1 C783 59C8> 44C2< 8A3<> 7B3< 7A5< 7A3< 4B3< CPU_HRESET_L 2 4 VGER_INV_HRESET 7A3< 7B3<
1% R281 1/16W 20% 7C3<
1/16W MF
16V
2 CERM
10V
2 CERM 2 16V 0.1UF SOT23-5
MF 787 ELEC 20% 3
603 2 1% 2 603 805 402 SM 10V
2 CERM AGP_RESET_L IS USED AS MAIN_RESET_L FOR SIL1162
1/16W NET19
D MF
2 603
2
D35
402
+3V_MAIN
THROUGH R1027 AND IS NOT USED IN ANY OTHER DEVICE
NOSTUFF R699
D
U28 SM 0 2 402
TL431 MBR0530 35B8< 32A6< IO_RESET_L 1 AGP_RESET_L 17B8< 27C5<
59A8> 44B8<>
2 SOI 1 NET22 1 1/16W 5% MF
ANODE1 CAT NET18
3 4 NO_TEST NC_UT164 2
6
ANODE2 NC
5 NO_TEST NC_UT165
1
R701 NOSTUFF R700 +MAXBUS_SLEEP 4D5< 6C5< 6D6< 7A3< 7B3< 7C3< 7C5< 7C7< 8A3<> 8D1<
ANODE3 NC D36 14 60 97 4.7K 0 2 402
8D4< 9B7< 9D8< 44B7< 44D1< 45D2<> 46D4< 52C6> 59C8>
7 8 NET24 SM 5% 1 1
ANODE4 REF MBR0530 1/16W
R690
1 1
VCC AVCC MF 1/16W 5% MF 2K
R282 51A6< BT1 2 402 5%
1/16W
1.5K MF
518-0054 1% BATTERY HOLDER 1
BT1 NOSTUFF
NC_P00_D0 NO_TEST 86
SEE_TABLE 44
PMU_AP 29B3<> 2 402
1/16W ALSO CE* FOR LOADING CODE
MF (525-0057) 3.6V-850MAH P00_D0 P50_WRL_WR 43
2 402 2 TH NC_P01_D1 NO_TEST 85
P01_D1 U26 P51_WRH_BHE INT_RESET_L INT_RESET_L 34C3< 35B8< 41A7< 43C7<
P02_D2 M16C62 P52_RD
42
MAIN_RESET_L 32A8< 59A6>
17C8< 30B2< R717 R688
NC_P03_D3 NO_TEST 83 FLAS 41
PMU_AGP_RESET 31D4< 1
100K 2 1
10K 2
P03_D3 P53_BCLK 40
52C2> 52C1> 50D5< 44D7<> 44C2< 36D8< 3.8V_TRICKLE NC_P04_D4 NO_TEST 82
P04_D4 P54_HLDA PMU_INT_NMI 28A8< 28B5<> 1% 1%
39 1/16W 1/16W
1
P05_D5 P55_HOLD PMU_EPM* 29B3<> MF MF
402 402
R729 NC_P6_D6 NO_TEST 80 38
INT_PU_RESET_L INT_PU_RESET_L 15B3< 34C3< 44C2<>
44C2<>
10K P06_D6 P56_ALE 37
R730 1% NC_P07_D7 NO_TEST 79
P07_D7 P57_RDY_CLKOUT CPU_HDRST_L R689
0 2 402 NOSTUFF
1/16W
MF 36 47 1 52B3> 44D7<> 3.8VH_TRICKLE
45D8< VC_CNTL1 1 NC_P10_D8 NO_TEST
2 402
78
P10_D8 P60_CTS0_RTS0 PMU_ACK_L 28C3< 2 CPU_HRESET_L 4B3< 7A3< 7A5< 7B3< 8A3<> 44D2< 59C8>
1/16W 5% MF R722 NC_P11_D9 NO_TEST 77 35
PMU_CLK 28C3<> 1/16W 5% MF 402
402 0 2 P11_D9 P61_CLK0 34 PMU_P64 29B2<>
NC_PPL* NO_TEST 1 PMU_PWR_LED* 76
P12_D10 (SEC_FPB_LED*) P62_RXD0 PMU_FROM_INT 28C3<>
1/16W 5% MF POWER_UP* 75 33
PMU_TO_INT 28C3<> R677
P13_D11 P63_TXD0 32 ALSO "BUSY" FOR LOADING CODE 1K 2 1
R671 1
R665
(BACKUP SELECT) NC_P14_D12 NO_TEST 74 PMU_P64 1 PMU_REQ_L 28A8< 28C3>
P14_D12 P64_CTS1_RTS1_CTS0_CLKS1 31 2K 2K
59D6> 44B1< 8A8<> PWR_SWITCH* 73
P15_D13_INT3 P65_CLK1 LID_SWITCH 29B2<> ALSO SCLK FOR LOADING CODE 1% 5% 5%
30 1/16W 1/16W 1/16W
59D6> 29C5<> 28B8< 28B5<> COMM_RING_DET_L 72
P16_D14_INT4 P66_RXD1 RESET_BUTTON* 29B2<> 59D6> ALSO "RXD" FOR LOADING CODE MF MF MF
402
28A5> INT_WATCHDOG_L 71 29
NMI_BUTTON* 29B2<> 59D6> ALSO "TXD" FOR LOADING CODE 2 402 2 402
P17_D15_INT5 P67_TXD1
C 59D6> 51A8< POWER_UP* NC_P20_A0_D0
NC_P21_A1_D1_D0
NO_TEST
NO_TEST
70
69
P20_A0_D0 P70_TXD2_SDA_TA0OUT
28
27
PMU_5V_SDA
PMU_5V_SCL
C
P21_A1_D1_D0 P71_RXD2_SCL_TA0IN_TB5IN 26
NC_P22_A2_D2_D1 NO_TEST 68
P22_A2_D2_D1 P72_CLK2_TA1OUT_V SYSTEM_CLK_EN 28A5< PMU_POWER 29C3<> 44A5<> 44B1< 44D5<> 52B3>
+3V_MAIN NC_P23_A3_D3_D2 NO_TEST 67
P23_A3_D3_D2 P73_CTS2_RTS2_TA1IN_V
25
CPU_CLK_EN 9A3< 3.8V_TRICKLE 36D8< 44C6< 44D7<> 50D5< 52C1> 52C2>
24
NC_P24_A4_D4_D3 NO_TEST 66
P24_A4_D4_D3 P74_TA2OUT_W
NO_TEST NC_P74_TA2OUT_W 1 1
NOSTUFF NC_P25_A5_D5_D4 NO_TEST 65 23 NO_TEST NC_P75_TA2IN_W R657 R658 NOSTUFF
P25_A5_D5_D4 P75_TA2IN_W 22 10K 10K
R732
1 NC_P26_A6_D6_D5 NO_TEST 64
P26_A6_D6_D5 P76_TA3OUT
NO_TEST NC_P76_TA3OUT 1% 1% 1
R649 1
21 1/16W 1/16W R659
10K NC_P27_A7_D7_D6 NO_TEST 63
P27_A7_D7_D6 P77_TA3IN
NO_TEST NC_P77_TA3IN MF MF 10K
5% 2 402 2 402 1% 10K
1/16W LOW INDICATES 20 1/16W 1%
MF DESKTOP SYSTEM 61
P30_A8_D7 P80_TA4OUT_U CPU_STATE_LED* 51A8< MF 1/16W
402 2 19 2 402 MF R646
PMU_STRAP1 59
P31_A9 P81_TA4IN_U CPU_SMI_L 4B3< 7A5< 2 402
IO_RESET_L 18 0 2 402
35B8< 32A6< IO_RESET_L 58
P32_A10 P82_INT0 PWR_FAILPMU* 1 PWR_FAIL* 50D5<
59A8> 44D3< 17
1
NOSTUFF NC_P33_A11 NO_TEST 57
P33_A11 P83_INT1 PMU_PME_L 28B5<> 1/16W 5% MF
+MAXBUS_SLEEP
59C8> R731 NC_P34_A12 NO_TEST 56 16
INT_PEND_PROC_INT 28A5> 31C2< 32A8< 59A6>
10K P34_A12 P84_INT2 15
1
R726 LOW INDICATES 1% NC_P35_A13 NO_TEST 55
P35_A13 P85_NMI PMU_NMI
IVAD PRESENT 1/16W 9 58A5> PMU_CLKOUT
10K MF NC_P36_A14 NO_TEST 54
P36_A14 P86_XCOUT
1% 2 402 8
1/16W NC_P37_A15 NO_TEST 53 58A5> PMU_CLKIN
MF P37_A15 P87_XCIN
2 402 PMU_INT_L
28B8< 28B5<> 52 5
NOSTUFF
P40_A16 P90_TB0IN_CLK3 4
R725 PMU_LOW_DSKTP 51
P41_A17 P91_TB1IN_SIN3 3
R648
6B8< CPU_PLL_STOP 1 2 PMU_PRE_PLLSTOP 50
P42_A18 P92_TB2IN_SOUT3
NO_TEST NC_P92_TB2IN_SOUT3 5.1M 2
DRIVEN OPEN COLLECTOR 2 1
22 5% 402 NO NEED TO VOLTAGE CONVERT NC_P43_A19 NO_TEST 49
P43_A19 P93_DA0_TB3IN
NO_TEST NC_P93_DA0_TB3IN
1/16W 1 5%
MF 59C6> 50C2< SLEEP 48 INT_PROC_SLEEP_REQ_L 28A5< 1/16W
P44_CS0 P94_DA1_TB4IN 100 (OK TO POWER UP SIGNAL) MF
(WAS KW_SUSPEND_REQ*) NC_P45_CS1_L NO_TEST 47
P45_CS1 P95_ANEX0_CLK4 POWERUP_OK 402 1
R655
99
9B3> INT_SUSPEND_ACK_L 46
P46_CS2 P96_ANEX1_SOUT4
NO_TEST NC_P96_ANEX0_CLK4 160K
INT_SUSPEND_REQ_L 98 5%
9B3< INT_SUSPEND_REQ_L 45
P47_CS3 P97_ADTRG_SIN4 1/16W
MF
95
(THERMISTOR) 2 402
P100_AN0
B P101_AN1
93
92
PWR_FAIL* (TRICKLE_DETECT)
B
PMU_BYTE 6
BYTE P102_AN2 91 CRITICAL
58A5> PMU_XO 11 NO_TEST NC_P103_AN3 52B3> 44D5<> 44C2< 44A5<> 29C3<> PMU_POWER
XOUT P103_AN3 90
58A5> PMU_XI 13 PMU_IIC_CLK 44A8< Y4
XIN P104_AN4_KI0 89 SM 1
R298
NOSTUFF 44A5<> 29B3<> 8A8<> PMU_RST* 10 PMU_IIC_DAT 44A8<
1
R716
1
R733
1
R734
1
R653 59D6> 59C6> RESET P105_AN5_KI1 88 1 4 10K
1 C862 44D4<> PMU_AVCC 96
VREF P106_AN6_KI2 1%
100K 100K 1K 1K 0.001UF 52B3> 87 58A5> PMU_CLKT 1/16W
1% 1% 1% 1% 10% 29B3<> PMU_CNVSS 7 CNVSS P107_AN7_KI3 +3V_MAIN 32.768K MF
1/16W 1/16W 1/16W 1/16W 2 603
MF MF MF MF 2 50V NOSTUFF
CERM VSS AVSS NET40
2 402 2 402 2 402 2 402 402 1 C715 1 C701 59D6> 44C5<> 8A8<> PWR_SWITCH*
R636
5.1M 2 1
R676 10PF 22PF
1 12 62 94 5% 5%
LOCATE NEAR TO PMU 1 1K 1 1 50V
2 CERM
50V
2 CERM
S1 L57
5% R654 1% R692 R698 TACT-SPST 1000-OHM-EMI
1/16W 10K 1/16W 10K 10K 402 402 TH
MF 1% MF 1% 1% 1 C861
402 1/16W 2 402 1/16W 1/16W 1 2 S3700P2 1 2
0.1UF
MF MF MF 20%
SM
2 402 402 2 2 402 10V
2 CERM
L56 402
PMU_SMB_SCK 1000-OHM-EMI
1
R656 PMU_SMB_SDA S3700P1 1 2
10 44C2< 44B1< 29C3<> PMU_POWER SM
1% 52B3> 44D5<>
1/16W
MF
IIC BUS PULLUPS 2 402
+3V_MAIN Y3
1
R605
58A5> PMU_XT 10K 2
10.0000M 1%
R686 1 2 1/16W VCC
MF PMU RESET BUTTON
4.7K 2 2 402
PMU_IIC_CLK 1
44B4<>
5%
1/16W
SM
CRITICAL
U21
SM R604
33 2
S2
SM-SKQDAA
PMU POWER MGR
A 44B4<> PMU_IIC_DAT 1
R687
4.7K 2
MF
402
44B5<> 29B3<> 8A8<>
59D6>
PMU_RST* 1 RESET 44A4< DELAY 5
59D6>
PMURESETBUTTON* 1
5%
SB1P1 1 2

A
1 C705 1 C706 1 C239 1/16W
5% NOSTUFF 3 VOLTAGE DETECTOR MF 3 4 LAST_MODIFIED=Wed Sep 17 12:16:57 2003
1/16W 22PF 10PF MC33465N_22ATR 1UF 402 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
MF 5% 5% 10% PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
402 50V
2 CERM 50V
2 CERM VCC GND
10V
2 X5R AGREES TO THE FOLLOWING
402 402 U23 603
PMU NOT RATED STRONG ENOUGH FOR 1K SOT23-2.32V 3
MAX6328 NOSTUFF
MAIN RAIL, TO PREVENT LEAKAGE INTO UNPOWERED DEVICES 2 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
RESET R606
33 2 59D6> SIZE DRAWING NUMBER REV.
1 44A4< PMURESETBUTTON*
GND 5%
1/16W
D 051-6497 13
1 MF APPLE COMPUTER INC.
402 SCALE SHT OF
NONE 44 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
51A5< 50D5<> 50D2< 50C4<> 50B4<>

45D3<> 45B4<> 44D8< 42B3< 39C8< 36D8< +12V_MAIN R908 51B7< 51C3< 51D7<> 52C1> 59D8>
49D7<> 49D3<> 49C4<> 48D6<> 48C8<> 48C4<> NO_TEST +12V_MAIN 36D8< 39C8< 42B3< 44D8< 45B4<> 45D7< 48C4<> 48C8<> 48D6<>
59D8> 52C1> 51D7<> 51C3< 51B7< 51A7< VCORE_VIN 1
4.7 2 49C4<> 49D3<> 49D7<> 50B4<> 50C4<> 50D2< 50D5<> 51A5< 51A7<
NOSTUFF 1
R931
510K
5%
+5V_MAIN 5%
1/16W
MF NOSTUFF NOSTUFF
1/16W 603
1 C963 1 C964 1 C952 1 C965 1 1 1 C944
MF
603 1 C343 C357
2 D45 10UF 10UF 10UF 10UF 150UF 150UF 0.1UF
1 10% 10% 10% 10% 20% 20% 20% 52C6> 59C8>
R899 SM
D
45C7< 45C6< FLOW_SS 1 C1044
0.1UF
10%
0
5% 2
MBR0540
1
16V
2 CERM
1210
16V
2 CERM
1210
16V
2 CERM
1210
16V
2 CERM
1210
2 16V
ELEC
SM-1
2 16V
ELEC
SM-1
16V
2 CERM
603
+MAXBUS_SLEEP 4D5< 6C5< 6D6< 7A3< 7B3< 7C3< 7C5< 7C7< 8A3<>
8D1< 8D4< 9B7< 9D8< 44B7< 44D1< 44D2< 46D4< D
3 50V 1/16W
VCOREIN C1047
Q29 2 CERM MF 4.7UF
D 1210 2 603 20% 2
16V
2N7002 VCORE_EXTVCC 2 CERM D44
SM 1206-1 SM
VC_CNTL1
44C7< 1 G S NOSTUFF NOSTUFF MBRS130T3
NC_VCORE10 45D7<> 45C5<> VCORE_INTVCC 1 1 1 1 1
45D5<>
45C5<> VCORE_INTVCC
NO_TEST C951 C950 C966 C953
2 10UF 10UF 10UF 10UF
10% 10% 10% 10%
R933
1 D20 SM 2 16V
CERM 2 16V
CERM 2 16V
CERM 2 16V
CERM
30.1K 22 21 24 10 2 1 1210 1210 1210 1210
1% EXT INT VIN 3.3 NOSTUFF NOSTUFF
1/16W VCC VCC VOUT
MF MBR0540 1
R4707
1
R4706 CPU_VCORE_SLEEP 4D3< 4D7< 8B7< 8C1< 52C6> 59B6> 59D8>
603 2 D4
45C8<> U47 R384 0 0
45C7<> 45B7<> VCORE_SGND LTC3707 Q44 5% 5%
0 2 1/16W 1/16W
45B5< VCORE_TG_1 27 TG1 SSOP TG2 16 VCORE_TG 1 BRE 1 SUD50N03 MF MF
G TO-252 2 603 2 603
45B5< VCORE_BOOST2_1 25 BOOST1 BOOST2 18 VCORE_BOOST2 5%
S 3
1/16W
C1039 L20
45B5<> CORE_MOSFET_1 26 SW1 SW2 17 CORE_MOSFET 45C4<> MF 2.2UH R801
603 0.22UF
45B5< VCORE_BG_1 23 BG1 BG2 19 VCORE_BG 0.0082
VCORE_BOOST 1 2 45C6<> CORE_MOSFET 1 2 1
DON’T EVER STUFF THIS 45B5< SENSE+_1 2 SNS1+ SNS2+ 14 SENSE+ R896 10%
SMC 1%
2 1W
CONN NOT FIT ON PCB 10 2 50V NOSTUFF MF 1 C1006 1 C1048 1 C1046
45C8<> 45B5< SENSE-_1 3 SNS1- SNS2- 13 SENSE- 1 CERM
D41 2512
VCORE_SENA+
FOR DANNY ITANI FMAX!!! 1210
SM
1 C4509 10UF 0.1UF 0.01UF
59D6> 1% 10% 20% 5%
D4 1000PF R800 16V 16V 50V
45C8<> FLO_KNOWS_BEST 4 VOSNS1 VOSNS2 12 1/16W 2 CERM 2 CERM 2 CERM
NOSTUFF MF
Q43 MBRS340T31 5% 0.0082
45C7<> SUPER_FLO 8 ITH1 ITH2 11 603 2 25V 1 1210 603 603
J21 1 SUD70N03 CERM
603
TH FLOW_SS
45D8< 1 RUN/ RUN/ 15 R900 G TO-252
NOSTUFF
1%
SS1 SS2 1W
0 2 MR_FLO S 3 MF
1 SENSE- 45C6< 7 FCB 28
1 45_I525 2512
PGOOD D 4 NOSTUFF
2 FLO_KNOWS_BEST 45C7<> 59D6> VCORE_FREQSET 5 FREQSET C371 MF 5% 603 1
3 VCORE_SGND 45B7<> 45C7<> VCORE_STBY 6 STBYMD 0.001UF
1/16W Q40 R4509 2
1 SUD70N03 1
C 515-1563
45C8<> 1
R932
10K
C1050 1
0.01UF
SGND PGND
1 2
C949 1
G
S 3
TO-252 1%
1/10W
FF
XW26
SM
C
5% 9 20 1 10% 1
C373 1% 50V R929 50V R928 0.0022UF 2 805 2
1/16W CERM MF NOSTUFF 1
45C8<>
45C7<>
47PF MF 603 2 10 CERM
402
10 10%
50V XW27
45B7<> VCORE_SGND 1 2 2 603 1%
1/16W
1%
1/16W CERM 2 SM
603
45C8<> XW29 603 MF
5% SM 2 2 603 1
45C7<>
50V 45B7<> VCORE_SGND 1 2
CERM
603
VCORE_SEN+ SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE
C1052 CPU_VCORE_SLEEPA 1 1 1 1 1 1
470PF R934 45C7<> SUPER_FLO C337 C335 C340 C336 C947 C334
10K 1 1000UF 1000UF 330UF 1000UF 330UF 1000UF
1 2 VCORE_SF 2 45D8< 45C7< FLOW_SS 1
R4708 VCORE_INTVCC 45D5<> 45D7<> 20% 20% 20% 20% 20% 20%
2 2.5V 2 2.5V 2 4V 2 2.5V 2 4V 2 2.5V
1% FLO_KNOWS_BEST 0 51B7< 51C3< 51D7<> POLY POLY TANT POLY TANT POLY
5% 1/16W 5% 50B4<> 50C4<> 50D2< NOSTUFF SM SM SMD SM SMD SM
50V MF
CERM
603
603 NOSTUFF
1/16W
MF +12V_MAIN 48C4<> 48C8<> 48D6<>
36D8< 39C8< 42B3< R4703
R4701 2 603 44D8< 45D3<> 45D7<
49C4<> 49D3<> 49D7<> 0 2
0 2 50D5<> 51A5< 51A7< 1 TRANS_ADJ
C1049 1 C1051 1 R3891 1
52C1> 59D8> 5% NOSTUFF NOSTUFF
0.047UF 47PF 475K R47091 5%
1/16W
D21 1/16W
MF 1 1
5% 5% 0.1% SM D4 R4704 R4705
16V 50V 1/8W 0 MF 603
CERM CERM 2 TF 5% 603 2 1
Q50 0 0
603 2 402 805 2 1/16W DUKE_BD 1 5% 5%
MF SUD50N03 1/16W 1/16W
603 MBR0540 G TO-252 MF MF
1 1 C1045 1 2 1 S 3 2 603 2 603
C372 0.047UF C367 R387
47PF 5% 47PF 45_I408 R897 L24
16V 274K 2.2UH R362
5% 5% 0.1% 0 2
2 50V
CERM 2 CERM
603 2 50V
CERM
1
R388 1/8W 1 BRE_1 CORE_MOSFET_1 1 2 1
0.0082 CPU_VCORE_SLEEP
402 402 TF
442K 2805
5%
1/16W SMC 1%
0.1%
1/10W MF 1W
1 C4701 FF SEE_TABLE 603 MF 1 C960 1 C1030 1 C1034
C1038 NOSTUFF 2
2512
45C8<> 45C7<> VCORE_SGND 220PF 2805 VCORE_BOOST_1 0.22UF 10UF 0.1UF 0.01UF 2
5% PG_E D43 10% 20% 5%
2 25V 1 2 SM 2 16V 2 16V 2 50V XW28
CERM CERM CERM CERM SM
402
45C7> VCORE_TG_1 R898 MBRS340T31 1 C4504 R361 1210 603 603
B R4702 1 45C7<> VCORE_BOOST2_1

1%
1
10 2
MF
10%
50V
CERM
D4
5%
1000PF 1
0.0082 1
B
7.5K 1/16W 603 1210
Q49 2 25V 1%
VC_SENA
0.1% 45C7<> CORE_MOSFET_1 CERM 1W
1 SUD70N03 603 MF
1/8W
TF G TO-252 NOSTUFF 2512
805 R386
2 0 2 S 3 45_I526
45C7<> VCORE_BG_1 1 D4 NOSTUFF SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE SEE_TABLE
MF 5% 603
1/16W MR_FLO_1
Q51 1
R4508 1
C347 1
C361 1
C362 1
C348 1
C957 1
C346
1 SUD70N03 1 1000UF 1000UF 330UF 1000UF 330UF 1000UF
G TO-252 1% 20% 20% 20% 20% 20% 20%
45C7< SENSE+_1 1 S 3 1/10W 2 2 2.5V 2 2.5V 2 4V 2 2.5V 2 4V 2 2.5V
C374 C1029 FF
POLY
SM
POLY
SM
TANT
SMD
POLY
SM
TANT
SMD
POLY
SM
0.001UF 0.0022UF 2 805 XW31
45C7< SENSE-_1 1 2
10%
50V NOSTUFF SM
CERM 2 2
TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION 603 1

TABLE_5_ITEM 10% XW30
103S0041 1 RES,CER,374K,0.1%,1/10W,0805 R388 CRITICAL 1GHZ_DECOUP 50V SM
CERM
TABLE_5_ITEM 402 R936 1
103S0042 1 RES,CER,453K,0.1%,1/10W,0805 R388 CRITICAL 1_25GHZ_DECOUP 10 2
R935 1 VCORE_SEN+_1
1% MF
10 2 1/16W 603
1 CPU_VCORE_SLEEPB
1% MF
1/16W 603
CPU_VCORE_SLEEPC
CPU_VCORE_SLEEP
1.0GHZ,1.5V+30/-130MV,35W
1.25GHZ,1.57V+70/-70MV,35W TABLE_5_HEAD

TABLE_5_ITEM
128S0012 4 CAP,TANT,POLY,330UF,4.OV,D4 C340,C947,C362,C957 1_25GHZ_DECOUP
128S0410 8 CAP,TANT,POLY,1000UF,2.5V,D4 C337,C335,C336,C334,C347,C361,C348,C346 1_25GHZ_DECOUP

TABLE_5_ITEM
CPU & AGP VREGS

A KUMA SERVER(1):HARDWARE:KUMA DESIGNS:KUMA POWER SUPPLIES:VCORE WITH AVP TABLES 128S0022 12 CAP,EL,POLY,220UF,20%,2V 1GHZ_DECOUP
TABLE_5_ITEM

A
C337,C335,C336,C334,C347,C361,C348,C346,C340,C947,C362,C957
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 45 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
INTREPID MAXBUS & CPU OVDD POWER CONVERTER

(OFF DURING SLEEP)
D +MAXBUS_SLEEP 1.8V,+/-2%,.606W D
59D8> 51C8< 51C5<> 50D5< 46C7< 38C1< +5V_SLEEP +1_8V_MAIN
+3V_MAIN
D19 R372
0
2 1 1 2 +MAXBUS_SLEEP 4D5< 6C5< 6D6< 7A3< 7B3< 7C3< 7C5< 7C7< 8A3<> 8D1<
1 8D4< 9B7< 9D8< 44B7< 44D1< 44D2< 45D2<> 52C6> 59C8>
R385 5%
1/4W
0 MBRS130T3 FF
1210
5% SM
1/4W 1
FF
2 1210 CRITICAL R927
10K
1%
1/16W
VR4 MF
2 402
MIC39102
SOP-8
R4801 KYLE 2 IN OUT 3 NOSTUFF
200K 2 1
R959
59D8> 51C8< 51C5<> 50D5< 46D6<> 38C1< +5V_SLEEP 1 MAXBUS_PWR_EN 1 EN ADJ 4 MAX_PWR_ADJ
150
1 C363
1% 1% 22UF
1/16W GND 1/16W 20%
MF MF 10V
2 CERM
5 6 7 8
603
2 402 1210
1 C4081 1 C365
0.47UF
10%
16V
22UF
2 X7R 20%
10V 1
805 2 CERM
1210
R930
22.1K
1%
1/16W
MF
2 402
C C
MAXBUS I/O SUPPLY SUPPORT

114S4754 1 RES,FF,47.5K-OHM,1% R930 MAXIO_1’50V
114S2214 1 RES,FF,22.1K-OHM,1% R930 MAXIO_1’80V *
+1_5V_AGP 1.5V,+/-5%,.6W
AGP I/O POWER CONVERTER

+3V_MAIN +1_5V_AGP 10D6< 11A6< 16A8< 16C2< 16D7< 17A3< 17A4< 17D5<
52C3> 59C8>
+3V_MAIN NOSTUFF
D33 R610
0
B 2 1 1
5%
2 +INTREPID_CORE_MAIN 10D6< 11D3< 47B2<> 59C8>
B
MBRS130T3 1/4W
FF
SM
1210
1
R945 CRITICAL 1
R518
100K
1% 10K
1/16W 1%
MF
2 402
VR2 1/16W
MF
MIC39102 2 402 NOSTUFF
SOP-8 1
2 IN OUT 3 R958 1 C138
150 22UF
1 EN ADJ 4 AGP_PWR_ADJ 1% 20%
1/16W 10V
GND MF 2 CERM
47A6<> IPWRGD 2 402 1210
5 6 7 8
1 C1053
1 C171 1
0.1UF
22UF
20%
R519
47.5K
10%
16V 2 10V
CERM 1%
2 X7R 1210 1/16W
603 MF
2 402
AGP I/O SUPPLY SUPPORT

CPU & AGP VREGS
A 114S4754 1 RES,FF,47.5K-OHM,1% R519 AGPIO_1’50V * NOTICE OF PROPRIETARY PROPERTY
A
114S3014 1 RES,FF,30.1K-OHM,1% R519 AGPIO_1’65V THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
114S2674 1 RES,FF,26.7K-OHM,1% R519 AGPIO_1’70V
114S2214 1 RES,FF,22.1K-OHM,1% R519 AGPIO_1’80V II NOT TO REPRODUCE OR COPY IT
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 46 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
D D
+5V_MAIN
XW14
+5V_MAIN RT401P1 1
SM
2
1 R318
C 1%
10
1/16W
1 R317
1K C273
NOSTUFF
C298
NOSTUFF
C297 C305 C299
C
MF
603
1%
1/16W
1
1000PF
1
10UF
1
10UF
1
10UF
1
10UF
1
C301 1
C300
MF 5% 10% 10% 10% 10%
150UF 150UF
2 603 25V 16V 16V 16V 16V 20% 20%
1 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 6.3V 2 6.3V
MBR0530 POLY POLY
603 1210 1210 1210 1210 SMD SMD
2
SM INTCORE_VCC
2
D13
C283 1
0.1UF
20%
16V
+5V_MAIN
CERM 2
603
59C8> INTREPID_VSENSE
INTCORE_1
+5V_MAIN INTCORE_BSTH_TERM 1
R299
51.1
1%
1/16W
MF
1 R304 1 R295 2 402
R296 Q26 5 6 7 8 CRITICAL 20K
0.1%
6.98K
0.1%
+3V_MAIN
IRF7807Z 1/16W 1/8W
20
1 2
1 SO-8 2 1 C262 2
FF
603
2
TF
805
1 C265
0.1UF
1/16W 603 1% MF VCC XW13 1UF 20%
16V
BSTH 10 INTCORE_BSTH SM 10% 2 CERM
U31 4 2 10V
CERM RT406P2 603
2
SC2602
BSTL 9 R320 1 805 D4901
SM
0
SO DH 6 INTCORE_DH 1 2 2 MBR0540
INTCORE_OCSET 4 OCSET
INTREPID_VPWR XW12 1
INTCORE_DHT
PHASE 5 5%
48A5<> GPWRGD 13 SS/SHDN
DL 8 INTCORE_DL
1/16W
MF
1 2 3 L19 SM
603 3.8UH
11 SENSE 1
PGND 7 INTREPID_VPWRA 1 2 +INTREPID_CORE_MAIN 10D6< 11D3< 46B3< 59C8>
B 1 2
INTCORE_OVP
ICORE_COMP
3 OVP
12 COMP PWRGD 2 2
SM1 B
R316 NO_TEST D14
1 GND MBR0530
R309
1K 30.1K 14 SM
1 C4702
1% 5 6 7 8
1% 1000PF
ICW
1/16W 1/16W
MF 1 CRITICAL 5%
MF 603 25V
603 2 CERM
603
2 CRITICAL CRITICAL CRITICAL +INTREPID_CORE_MAIN (MEASURED), 1.7V +/-50MV, 3.752W
1 R301 Q25 NOSTUFF
C284 NOSTUFF
+INTREPID_CORE_MAIN (BUDGET MAX), 1.7V +/-50MV, 6W
C266 1 C286 1 C285 1 C282 1
0 2 INTREP_DLT 4
IRF7807Z
47_I66 0.1UF
1 1
C928 1 C296 1
C935 1
R315
1UF 0.1UF 0.1UF 10PF SO-8 20% 220UF 220UF 220UF 100
10% 5% 20% 5% 5% 16V 20% 20% 20% 5%
10V 25V 2 16V 50V 1/16W 1 CERM 2 2V 2V 2 2V
X5R
2 603
2 CERM CERM 2 CERM MF
NOSTUFF
R4710 603 2
TANT 2 TANT TANT
1/10W
FF
805 603 603 603
1 C270 1 2 3 1 7343 7343 7343
2 805
0.0022UF 1%
1/10W
10%
50V FF
2 CERM 2 805
XW15
SM
402
NOSTUFF
INTCORE_GND 1 2
46A8< IPWRGD
INTREPID CORE
A
TABLES FOR INTREPID CORE RESISTOR VALUES TO VOLTAGES ARE LOCATED AT LAST_MODIFIED=Wed Sep 17 12:17:02 2003
KUMA SERVER(1):HARDWARE:KUMA DESIGNS;KUMA POWER SUPPLIES;ICORE R TOLERANCE PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 47 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
D D
59D8> 52C1> 51D7<> 51C3< 51B7< 51A7<

51A5< 48C4<> 45D7< 45D3<> 45B4<> 44D8< 42B3< 39C8< 36D8< +12V_MAIN
50D5<> 50D2< 50C4<> 50B4<> 49D7<> 49D3<> 49C4<> 48C8<>
1 1
R523 D30 GRAPH_CORE (NV18B), 1.6V +/-100MV, 12W
10 MBR0530
1%
1/16W SM GRAPH_CORE (NV34), 1.45V +/-100MV, 16W
MF 2
603
+12V_MAIN
59D8> XW7
SM
2
TABLE_5_HEAD
1 2 RB37P1 GCORE_VCC GCORE_BSTH_TERM TABLE_5_ITEM
110S5233 1 RES,5.23K OHMS,1%,1/16W,0603 R499 NV18B

1
1
C220 1 C634 1 C633 1 C631 1 C632 1 C596 R529 1
R505 110S2943 1 RES,2.94K OHMS,1%,1/16W,0603 R499 NV34
TABLE_5_ITEM
150UF 10UF 10UF 10UF 10UF 330PF 1.5K

1%
1 C589 10
20% 10%
16V
10% 10% 10% 10% 1/16W 0.1UF 1%
2 16V 2 CERM 16V
2 CERM 16V
2 CERM 16V
2 CERM 50V
2 CERM MF 20% 1/16W
ELEC 16V
SM-1 1210 1210 1210 1210 603 2 603 2 CERM MF
603 2 603
NO_TEST SEE_TABLE
C 48B6<> GCORE_VSENSE 1 R499 1
R496 C
5.23K 51.1
1%
1/16W 1%
MF 1/16W
51D7<> 51C3< 51B7< 603 MF
50D2< 50C4<> 50B4<> 2 402
48D6<> 48C8<> 45D7< 2
42B3< 39C8< 36D8< +12V_MAIN GCORE_1 NO_TEST
45D3<> 45B4<>
49D7<> 49D3<>
44D8<
49C4<>
R504
1
51A7< 51A5< 50D5<> 20K 48_I10
1 59D8> 52C1>
1 C576 1%
1/16W
1 C564
VCC NO_TEST 0.1UF MF 0.1UF
20% 603 20%
GCORE_BSTH 25V 1 16V
U40 BSTH 10
(+12V_MAIN) D4
2 CERM
603
2 R4803 2 CERM
603
GRAPH_CORE 17D4< 23C7<> 52A6>
BSTL 9 R150 0
SC2602 0 Q9 5%
1/16W
SO DH 6 GCORE_DH 1 2 QT2P1 1 SUD50N03 MF
GCORE_OCSET 4 OCSET G TO-252 2 603
PHASE 5 GRAPHICS_VPWR 5%
49B5<> 48B7< 49B5<> 48B7< MPWRGD MPWRGD 13 SS/SHDN 1/16W S 3
+2_5V_MAIN
DL 8 GCORE_DL MF
603
48C4<> GCORE_VSENSE 11 SENSE
PGND 7 D 4 NOSTUFF
GCORE_OVP 3 OVP RB22P2
GCORE_COMP 12 COMP PWRGD 2 Q8 2
NO_TEST XW6
SM
1
G
SUD50N03
TO-252
D34
GND SM
2
1 R527 R5031
14
1 2 S 3 MBRS130T3
1K
1% 3.92K XW2
SM
1
1/16W 1% 2
MF 1/16W
MF
D32 L12 1
2
603
2 603 C563 1 SM
MBR0530 2.2UH
10PF
RB27-1 5%
50V 1
QT2P3 1 2
CERM SMC SEE_TABLE
1 C572 1 C552 603 2 C585 1 NOSTUFF SEE_TABLE NOSTUFF SEE_TABLE NOSTUFF
C88
NOSTUFF NOSTUFF
0.1UF 0.1UF 0.1UF

20%
2 NOSTUFF 1 C543 1
C528 1
C106 1
C558 C132
1
1
C59 1
1000UF
1
C71 1
R475
5% 20% 16V D31 0.1UF 1000UF 1000UF 1000UF 1000UF 1000UF 20% 1000UF 100
B 2 25V
CERM
805
2 16V
CERM
603
CERM 2
603
Q7
SM
MBRS340T3
20%
16V
2 CERM
20%
2 2.5V
POLY
20%
2 2.5V
POLY
20%
2 2.5V
POLY
20%
2.5V
2 POLY
20%
2 2.5V
POLY
2.5V
2 POLY
SM
20%
2 2.5V
POLY
5%
1/10W
FF
B
GCORE_GND
SUD70N03 D4
1 C4801 1
603 SM SM SM SM SM SM
2 805
TO-252 1000PF
5%
1 2 25V
CERM
1
R515 G
603
XW39
SM 1
0 2 S 3
NOSTUFF
48_I99
5%
1/16W
2 MF 1
603
NOSTUFF
Q34 D4 R4802
SUD70N03 1
1%
TO-252 1/10W
1
QT1P1 FF
G
2 805
S 3 NOSTUFF
TABLE_5_HEAD
NOSTUFF PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION

1 C586 128S0410 3 CAP,TANT,POLY,1000UF,2.5V,D4 C106,C132,C88 1_25GHZ_DECOUP
TABLE_5_ITEM
0.0022UF
10% TABLE_5_ITEM
50V
2 CERM 128S0410 3 CAP,TANT,POLY,1000UF,2.5V,D4 C106,C132,C88 1GHZ_DECOUP
402
GPWRGD 47B8<
GRAPHICS CORE
A
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 48 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
D D
59D8> 52C1> 51D7<> 51C3< 51B7< 51A7< 51A5<

48C4<> 45D7< 45D3<> 45B4<> 44D8< 42B3< 39C8< 36D8< +12V_MAIN
50D5<> 50D2< 50C4<> 50B4<> 49D3<> 49C4<> 48D6<> 48C8<>
MAIN MEMORY DDR AND FRAME BUFFER POWER CONVERTER (2.50VDC)
51B7< 51C3< 51D7<> 52C1> 59D8>
1 R888 +12V_MAIN 36D8< 39C8< 42B3< 44D8< 45B4<> 45D3<> 45D7< 48C4<> 48C8<>
48D6<> 49C4<> 49D7<> 50B4<> 50C4<> 50D2< 50D5<> 51A5< 51A7<
10
1%
1/16W
MF
XW25
SM
603 RB227P1 1 2
2
25V_VCC
1 NOSTUFF
C1019 1 R884
0.1UF 1K 1 C1005 1 C959 1 C968 1 C975 1 C989 1 1
20% 1%
1/16W 470PF 10UF 10UF 10UF 10UF
C342 C351
16V
CERM 2 MF 10% 10% 10% 10% 10%
150UF 150UF
603 20% 20%
1 603 2 50V 2 16V 2 16V 2 16V 2 16V 2 16V 2 16V
CERM CERM CERM CERM CERM ELEC ELEC
MBR0530 2 402 1210 1210 1210 1210 SM-1 SM-1
SM
2
D18
25V_OCSET
C 25V_VSENSE NO_TEST C
25V_BSTH_TERM 1
49B5<> 25V_VPWR R872
49D3<>
51.1
1%
R369 48C4<> 51D7<>
45B4<> 51A7< 1 R880 1 R871 1/16W
MF
20 39C8< 36D8< +12V_MAIN 20K 22.1K 2 402
1 2 25V_BSTH 44D8< 42B3< 2
45D7< 45D3<>
1 C358 1%
1/16W
1%
1/16W 25_CORE_1 NO_TEST
1%
1/16W
1
48D6<> 48C8<>
50B4<> 49D7<>
XW24
SM
0.1UF
20%
MF
603
MF
603
1 C962
MF
603 VCC 50D2< 50C4<> 25V
2 CERM 2 2 0.1UF
51A5< 50D5<> 1 20%
BSTH 10 51C3< 51B7< 603 2 16V
U45 BSTL 9
59D8> 52C1> D4 RB213P2
CERM
603
SC2602 R873 Q28 +2_5V_MAIN
0 2
4 OCSET
SO DH 6 25V_DH 1 2 1 SUD50N03
PHASE 5 25V_VPWR 49C4<> 5% 25V_DHT G TO-252
L21 XW23
50A6> 49B7< 50A6> 49B7< PGOOD PGOOD 13 SS/SHDN 1/16W S 3 SM
+3V_MAIN
DL 8 25V_DL MF 4.0UH
3
59D8>
D46
R883 11 SENSE
603 1
52C4
SM
4.75K PGND 7 25V_VPWRA 2 30B3< 1 2
25V_OVP 3 OVP
SM1
1 2 25V_COMP 12 COMP PWRGD 2 MBRS130T3
25V_COMP_DWN
1% NO_TEST 1
1/16W GND
MF 14
603 2
D42 1 C4901 1 1 1
NOSTUFF
1
SM
D4 1000PF 2 NOSTUFF C218 C330 C323 C332
C1015 1
MBR0530 1 R827 5%
2 25V
D15 330UF 330UF 330UF 330UF
0.1UF 0 Q27 CERM
603
SM
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
5%
25V
1 2 25V_DLT 1 SUD70N03 MBRS340T3 POLY POLY POLY POLY
1
CERM 2
805
5%
G
S 3
TO-252 NOSTUFF 1
SMD SMD SMD SMD
R334
1/16W 49_I70 100
MF
1 C359 1 R371 1 C1004 1 C1000 603
5%
1/10W
B 0.1UF
20%
1K
1%
1/16W
0.1UF
20% 5%
10PF
1
NOSTUFF
C948
1
R4901
1
C329 1
0.1UF
C324
NOSTUFF
1 C235 1 C331 1 FF
2 805
B
2 16V
CERM MF 2 16V
CERM
50V
0.0022UF 1% 330UF 330UF 330UF
603 603 603 2 CERM
603 10% 1/10W
20%
16V 20% 20% 20%
6.3V 6.3V 6.3V 2
2 XW41
SM
50V
2 CERM
FF
2 805
CERM
603 2
POLY
SMD
2 POLY
SMD
2 POLY
SMD
402 NOSTUFF
25V_GND 1 2
MPWRGD 48B7<
+2_5V_MAIN, 1.61V +/-50MV, 12.908W
MEMORY PS
A
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 49 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
59D8> 52C1> 51D7<> 51C3< 51B7< 51A7<
51A5< 48C4<> 45D7< 45D3<> 45B4<> 44D8< 42B3< 39C8< 36D8< +12V_MAIN
50D2< 50C4<> 50B4<> 49D7<> 49D3<> 49C4<> 48D6<> 48C8<>
DEV
R3701 1 C978 1 C979 1 C956 1 C955 1
C356 1
C354 1
C355
787 10UF 10UF 10UF 10UF 100UF 100UF 100UF
1 1 1 1% 10% 10% 10% 10%
C339 C349 C338 1/16W
MF
16V
2 CERM
16V
2 CERM
16V
2 CERM
16V
2 CERM
20%
2 35V
20%
2 35V
20%
2 35V
100UF 100UF 100UF 603 2 1210 1210 1210 1210
ELEC ELEC ELEC
20% 20% 20% SM-1 SM-1 SM-1
2 35V 2 35V 2 35V 3.8V_TRICKLE
52C2>
ELEC
SM-1
ELEC
SM-1
ELEC
SM-1
MAIN_SUPPLY_LED
1 1
PWRS_Q59 CRITICAL R682 DEV
10K DS9
D
1
R1013
10K
J17
L85
1%
1/16W
MF
GREEN
SM 2
D
1%
1/16W
M-ST-43045 FERR-250-OHM 2 402
1 C971 1 C970 1 C986 1 C985
MF TH 10UF 10UF 10UF 10UF 51B7< 51A7< 51A5< 50D5<> 50C4<> 50B4<> 50B8< SW5V_RUNSS
2 402 8 16
1 2 PWR_FAIL* 44B1<> 10%
16V
10%
16V
10%
16V
10%
16V 45D7< 45D3<> 45B4<> 44D8< 42B3< 39C8< 36D8< +12V_MAIN
SM 2 CERM 2 CERM 2 CERM 2 CERM 49D7<> 49D3<> 49C4<> 48D6<> 48C8<> 48C4<>
7 15 1210 1210 1210 1210 59D8> 52C1> 51D7<> 51C3<
6 14
L86 1
5 13
FERR-250-OHM R323
47K
1 2 +12V_SLEEP 29A3< 29A8< 29C5<> 51A5< 51C2< 51D6<> 52C1> 59D8> 5% 3
Q22
PWR_UP* 4 12 PWR_FAIL_T SM 1/16W
MF D
3 11 +12VSD_T 2 603
2 10 +5VSD_T L84 2N7002
FERR-250-OHM 50C8< RUNSS 1 G S
SM
1 9
1 2 +5V_SLEEP 38C1< 46C7< 46D6<> 51C5<> 51C8< 59D8>
PWRS_Q26 SM
2
3
R721 NOSTUFF 3
3
Q24
22.1K2 Q23
50C3< 42D8< 39C8<
59D6> 51C6<
PWR_UP 1 SHS 1 Q39 (517-0886) FW_PWR 29B3< 36D6< 51D4<> 52B6>
1 C241 1
C295 D
D 1
R322
1% 2N3904 10UF 47UF 2N7002 0
1/16W SM 10% 20% 2N7002 SM 5% SW3V_RUNSS 50B6<
MF 2 2 16V
CERM 2 16V SM 1 G S 1/16W
603 1210
ELEC 59D6> 51C6< 50C8< 42D8< 39C8< PWR_UP 1 G S MF
SM
2 603 3
2
2 Q21
D
PWRS_Q59 2N7002
R1014 SW3V_RUNSSR 1 G S
SM
47K R806 +12V_MAIN 51B7<
36D8<
51C3< 51D7<> 52C1> 59D8>
39C8< 42B3< 44D8< 45B4<> 45D3<> 45D7< 48C4<> 48C8<>
50D3< RUNSS 1 2 48D6<> 49C4<> 49D3<> 49D7<> 50B4<> 50D2< 50D5<> 51A5< 51A7<
5% SW3V5V_12VIN 1
4.7 2
NOSTUFF 2
1/16W
MF 5%
1 C303
603 1/16W 59C6> 44B5<> SLEEP 0.1UF
MF 5 6 7 8 20%
603 2 10V
1 C937 +5V_MAIN CRITICAL
CERM
402
0.1UF
C 20%
25V
2 CERM 1
R336 Q46 C
603 10 IRF7807Z
R794 1 1 2 SW3V_TG2R 4
SO-8
0 2 1%
50B8<> 50B7<> 50A8<> 50A7<> SW3V5V_SGND 5%
1/16W
D38
SM
1/16W
MF
+3V_MAIN, 3.3V +/-3%,7.567W
MF 603
MBR0540 1 2 3
603 2
SW3V5V_VIN D16 C941 L23 +3V_MAIN
RT418P2 SM 0.22UF 10UH R808
50B5<> SW3V5V_INTVCC 1 2 SW3V_BOOST2R 1 2 50B6<> SW3V_SW2 1 2 1
0.0082
SM1
MBR0540 R811 10%
1%
1W
+5V_MAIN 1
10 2
50V
CERM C5001 1
MF
2512
1 C926
NC_SW3V5V_33OUT 0.1UF
SW3V_SW2A
1210
NO_TEST
1% 1000PF 20%
22 21 24 10 1/16W 5 6 7 8 CRITICAL 5%
25V 1 NOSTUFF
1 C934 16V
2 CERM
2
EXT INT VIN 3.3
VCC VCC VOUT
MF
603 CERM 2
1
C327 1
C326 C328 10UF 603
603 150UF 150UF 150UF 10%
16V
XW17 U33 NOSTUFF
50_I408
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
2 CERM
C927 1
SM
LTC3707 R337 Q45 POLY
SMD
POLY
SMD
POLY
SMD
1210
0.01UF
C930 50B5< SW5V_TG1 27 TG1 SSOP TG2 16 SW3V_TG2 NO_TEST 0 IRF7807Z 1 5%
1
1 2 SW3V_BG2R 4
SO-8 R5001 50V
CERM 2
180PF 50A5< SW5V_BOOST1 25 BOOST1 BOOST2 18 SW3V_BOOST2 1 603
MF 5% 603 1%
1 2 50A5<> SW5V_SW1 26 SW1 SW2 17 SW3V_SW2 50C4<> 1/16W NOSTUFF 1/10W 2
NOSTUFF 2 2
5% 50A5< SW5V_BG1 23 BG1 BG2 19 SW3V_BG2 C344 1 1 2 3
FF
2 805 XW20
0.01UF D39 XW19
50V
CERM
402 50A5< SW5V_SNSP 2 SNS1+ SNS2+ 14 SW3V_SNSP +3V_MAIN0.001UF
C931 5%
50V
SM NOSTUFF SM
1
SM
CERM MBRS340T31
603 2 1
R799 50A5< SW5V_SNSM 3 SNS1- SNS2- 13 SW3V_SNSM 1 2
VOSNS1 2 107K 1 NO_TEST SW5V_VOSNS 4 VOSNS1 VOSNS2 12 SW3V_VOSNS NO_TEST 2 10%

50V
MF 1% 603 SW5V_ITH1 8 ITH1 ITH2 11 SW3V_ITH2 50A7< XW22 CERM
402
1/16W
50D1< SW5V_RUNSS 1 RUN/ RUN/ 15 50C1< SW3V_RUNSS SM
1
1
R803
SS1 SS2 R804 R802
B 50V
C318
470PF402 50B8<>
50C7<
50A8<> 50A7<> SW3V5V_SGND 7
5
FCB
PGOOD 28 2
62K 1
1
10
1%
1%
10
1/16W
B
50B8<> 50B7<> FREQSET 1/16W MF
50C7< 50A8<> 50A7<> SW3V5V_SGND 1 2 5% MF 603
STBYMD 6 STBYMD 1/16W 603 2
10% CERM MF
603
2
SW3V_3VSENSE +5V_MAIN, 5.1V +/-3%, 32.172W
SGND PGND
C317 C333 5V_XRA
1000PF R331 C341 1 1 C321 9 20
180PF D17 SM
15K 4.7UF 0.01UF 1
1 2 SW5VITH1R 2 1 20% 5% 1 2 VOSNS2 2 1 SW3V5V_INTVCC 51B7< 51C3< 51D7<> 52C1> 59D8>
5% 1%
16V
CERM 2 2
50V
CERM (THIS PAGE)
50C6<>
+12V_MAIN 36D8< 39C8< 42B3< 44D8< 45B4<> 45D3<> 45D7< 48C4<> 48C8<> D37
SM
25V 50C7< 1206-1 603 5% 48D6<> 49C4<> 49D3<> 49D7<> 50C4<> 50D2< 50D5<> 51A5< 51A7<
1/16W MBR0540 MBRS130T3
CERM 50B8<>
603 50B7<>
50A8<> 50A7<> SW3V5V_SGND
MF
603
50V
CERM
402 1/16W
R807
0 NOSTUFF 2
+5V_MAIN
50B7> 1
SW5V_TG1 1 2 SW5V_TG1R R815
R795 MF 5% 603
C940 D4 0.0102
C316 20K 1
50B8<>
SW3V_ITH2 50B6> 1% 0.22UF Q48
220PF402 1/16W 1%
50B7<>
50C7< 50A7<> SW3V5V_SGND 1 2 XW21 MF R335 1 2 1 SUD50N03 1W
MF
SM 2 603 10 G TO-252 NOSTUFF NOSTUFF 1
5%
25V
CERM 1 2 50B7<> SW5V_BOOST1 1 2 RB160P1 10%
50V
S 3
2512
1
C309 1
C306 1
C307 1
C302 1 C287 1 C293 1 C294 R5003
CERM L22 150UF 150UF 150UF 150UF 10UF 0.1UF 0.01UF 470
C315
SW5V_SW1A
R330
1%
1/16W 1210
4.0UH
3 R805 20% 20% 20% 20% 10% 20% 5% 5%
1/10W
1000PF MF 0.0052 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 16V
CERM 2 16V
CERM 2 50V
CERM FF
15K 603 1 POLY POLY POLY POLY
1210 603 603 2 805
1 2 SW3VITH2R 2 1 50B7<> 50A5<> 50A5<> SW5V_SW1 SW5V_SW1 2 SMD SMD SMD SMD
50B7<> SM1 5%
5% 1% 0 1W
25V
CERM
1/16W
MF C939 1 1 C933 50B7<> SW5V_BG1 1 2 SW5V_BG1R C5002 1 MPL
2512
603 603 0.01UF 50B7< SW5V_SNSP MF 5% 603 1000PF 1
C322 2200PF
R3321 1
0.01UF
5%
50V
5%
50V
CERM 50B7< SW5V_SNSM R810
1/16W 5%
25V
CERM 2
CRITICAL
20K 5% CERM 2 2 603 D4 603
1%
1/16W 2 50V
CERM
603 C932 Q47 NOSTUFF 50_I410
MF 603 0.001UF 1 SUD50N03 1
603 2
50B8<>
50B7<>
1
10%
2 NOSTUFF
C938 1
G
S 3
TO-252 2 NOSTUFF
D40
R5002
1%
1 1
C308
150UF
1
C310
DC/DC CONVERTER
A 50C7< 50A8<> SW3V5V_SGND 50V
CERM
402 1
0.01UF
5%
50V
SM
MBRS340T3
1/10W
FF
2 805 XW18
2
20%
2 6.3V
150UF
20% A
R798 CERM
603 2 1 NOSTUFF SM
POLY
SMD
2 6.3V
POLY
1 10 2 SMD LAST_MODIFIED=Wed Sep 17 12:17:09 2003
R797 1%
1/16W
1
XW16
PGOOD 49B7< 10 MF SM AGREES TO THE FOLLOWING
1% 2 603
1/16W I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
MF SW5V_5VSENSE 1
2 603 II NOT TO REPRODUCE OR COPY IT
SW5V_SNSMA III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 50 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
FIREWIRE POWER SWITCH
+12V MAIN POWER SWITCH EVALUATE CIRCUIT FOR SURGE PROTECTION FOR Q59C
FW_12V U35
(OFF DURING SLEEP) +12V_SLEEP 29A3< 29A8< 29C5<> 50D5< 51A5< 51C2< 52C1> 59D8> SI4435DY
SOI
50B4<> 49D7<> 49D3<> 49C4<> 51B7< 52B6> 50C6<> 36D6< 29B3< FW_PWR 8
45B4<> 44D8< 42B3< 39C8< 36D8< +12V_MAIN 3 S3 D4
7
48D6<> 48C8<> 48C4<> 45D7< 45D3<>
Q20 2 S2 D3
51A7< 51A5< 50D5<> 50D2< 50C4<> 6 FW_PWR_SW 36D6<
59D8> 52C1> 51C3< FDC602P 1 D2 52B6>
R769 SOT-6 1 S1
D1 5
1
470K 2 2 GATE
5% 5 4
1
1/16W
MF 3 6 C19 FW_12V
D
402
4
47UF
20%
2 35V C18 C473 D
1
C269 ELEC
SM
0.01UF 0.0022UF
C915 C918 47UF 1 2 Q42P4 1 2
20%
0.01UF 0.0022UF 2 16V CERM 5% 603 10%
1 2 SW12V_SLEEP 1 2
ELEC
SM 50V 50V FW_12V
CERM
FW_12V 402
CERM 10% 402 10% FW_12V
16V 1 50V 1
R770 CERM R23 R21
100K
1%
1/16W
402
+5V_MAIN 1
470K 2 100K
5%
1/16W
MF 5% MF
402 2 1/16W
MF 2 603
1FW_12V
603
R22 Q1P3
SW12V_SL
10K 3
3 1%
1/16W
D Q14
MF
2 603
D
Q1
2N7002
2N7002 SM
SM Q1P1 1 G S
51B6< SLEEP_OFF_L 1 G S FW_12V
2
1 2
R739
0
5%
1/16W
MF
2 402 +3.3VFPD (3_6V_SLEEP), 3.6V +/-50MV, 3.32W
PWR_UP
46D6<> 46C7< 38C1< +5V_SLEEP
39C8< 42D8< 50C3< 50C8< 59D6>
TMDS POWER CONVERTER & SWITCH +12V_SLEEP 29A3< 29A8< 29C5<> 50D5< 51A5<
51D6<> 52C1> 59D8>
59D8> 51C5<> 50D5< VOLTAGE TO SUPPORT 3.3V AT PANEL
(OFF DURING SLEEP) VOLTAGE HERE WILL EXCEED 3.3V FPD_12VS
1
R1018
C 1
DEV
R300
+5V POWER SWITCH 59D8> 52C1> 51D7<> 51B7< 51A7< 51A5<
48C8<> 48C4<> 45D7< 45D3<> 45B4<> 44D8< 42B3< 39C8< 36D8< +12V_MAIN
50D5<> 50D2< 50C4<> 50B4<> 49D7<> 49D3<> 49C4<> 48D6<>
0
5%
C
330
(OFF DURING SLEEP) FPD_12VM 1/8W
FF
1
5% R1017 2 1206
1/16W
MF Q37 0 FPD_3V3&FPD_12VM
2 402 FDC602P 5%
1/8W Q11
SOT-6 1 +3.3VFPD
FF FDC602P 24D7< 52B6>
2 2 1206 SOT-6 1
RUNLED1 +5V_MAIN 5 +5V_SLEEP 38C1< 46C7< 46D6<> 50D5< 51C8< 59D8> 2
1 DEV 3 6 5 R5301
DS5 3 6 1
0 2 3_6V_SLEEP 37D1<
GREEN 4
5% NOSTUFF
2 SM
C742 C773 1
C238 3_5_HONKER 4 1/16W
0.01UF 0.0022UF 150UF
20%
+5V_MAIN 1 C254
MF
402
1 2 SWITCH5V_4 1 2 2 6.3V FPD_3V3 1 10UF
CERM 10% 402 10%
POLY
SMD +5V_MAIN SENSE
FPD_3V3&FPD_12VM FPD_3V3&FPD_12VM 10%
16V
16V 50V
VR3
FPD_3V3 C257 C252 2 CERM
+5V POWER LED 1
R645 1
R664 CERM
402 EZ1582
1
R251 0.01UF 0.0022UF 1210
470K 100K 5
SM
3
102 1 2 SWITCH5V_6 1 2
5% 1% 52C4 51B4<> 1%
1/16W 1/16W 59D8> VPWR VOUT 1/16W 402 10% CERM 10%
MF MF MF FPD_3V3
2 402 2 402
59D8> 52C4 51B4<> 4 VCTRL VOUT 6
2 402
16V 50V
SWITCH5V_3 ADJ
TAB 1
C246 1
R278 1
R277
CERM
402
1
R279
150UF 10K
3
20% 100K 10K 1%
2 6.3V 1% FPD_3V3&FPD_12VM 1% 1/16W
2 POLY 1/16W 1/16W MF
D Q38 HONK_ADJ SMD MF MF 2 402
R685 2N7002 FPD_3V3 FPD_3V3 FPD_3V3 2 402 402
2FPD_3V3&FPD_12VM TMDS_EN 23D7<>
0 SLEEP_OFF_L SM FPD_3V3
51C7< 1 2 1 G S 1
R601 SWITCH5V_5 NOSTUFF
5%
1 C654 1 C653 1 C236 182 1 C258
1/16W 2 10UF 10UF 0.022UF 1%
MF 10%
16V
10%
16V
10%
50V 1/16W R10121 SEE_TABLE 0.01UF
402 2 CERM 2 CERM 2 CERM MF 20%
B 1210 1210 805 2 402 100K

1%
1/16W
2 16V
CERM
402
3 FPD_12VS&FPD_12VM
B
MF
402 2 DZ1
51C3< 51A7< 51A5< 50D5<> 1N5227B
49D3<> 49C4<> 48D6<> LED_RET 29A3< 52B3>
1
45B4<> 44D8< 42B3< 39C8< 36D8< +12V_MAIN SOT23
48C8<> 48C4<> 45D7< 45D3<>
50D2< 50C4<> 50B4<> 49D7<> 1 3 CHOC_BROWNIE
59D8> 52C1> 51D7<> R738 FPD_3V3&FPD_12VM
R283
4.7K D Q17
5% 0
1/16W 2N7002 FPD_PWR_ON
23D7<> 1 2 FPD_PWR_ON_T 3
MF
2 402
CPU_SLEEPIN 1 G S
SM
+5V POWER, SLEEP & TESTPOINT LEDS 5%
1/16W
D Q13
2
(TESTPOINT LED IS USED TO FOR SERVICE AND MF
402
2N7002
SM
Q15 3 IF NOT ILLUMINATED, TELLS USER ITS OK TO ADD MEMORY) 1 G S
FPD_3V3&FPD_12VM
3
D 2
1
D Q16 2N7002 R284
2N7002
SM 1 G S
SM
44D6<> BT1
+5V_MAIN +12V_MAIN 51B7<
36D8<
51C3< 51D7<> 52C1> 59D8>
39C8< 42B3< 44D8< 45B4<> 45D3<> 45D7< 48C4<> 48C8<> 100K
48D6<> 49C4<> 49D3<> 49D7<> 50B4<> 50C4<> 50D2< 50D5<> 51A7< 1%
59D6> 44C7<> POWER_UP* 1 G S 1/16W
+3V_MAIN +12V_SLEEP 29A3< 29A8< 29C5<> 50D5< 51C2< 51D6<> 52C1> 59D8> MF
2 TESTPOINT TESTPOINT TESTPOINT
2 402
2 TESTPOINT
NOSTUFF NOSTUFF NOSTUFF FPD_3V3&FPD_12VM
1 1 1 1
DEV R615 R607 R609 R608
1
R302 0 0 0 0
5% 5% 5% 5%
1
330 1/16W 1/16W 1/16W 1/16W
R741 5%
1/16W
MF
2 402
MF
2 402
MF
2 402
MF
2 402
47.5K MF
1% 2 402 TESTPOINT TESTPOINT TESTPOINT TESTPOINT
TABLE_5_HEAD
50C4<> 50B4<> 49D7<> 49D3<> 52C1>

45D3<> 45B4<> 44D8< 42B3< 39C8< 36D8<
49C4<> 48D6<> 48C8<> 48C4<> 45D7<
51D7<> 51C3< 51B7< 51A5< 50D5<> 50D2<
+12V_MAIN
1
1/16W
MF
2 402
SLEEPLED_TERM
1 RT373P1
R612
787
PWR_LED
PART#
114S1005
QTY
1
DESCRIPTION
RES,100K OHM,1%,1/16W,O4O2,SMD
REFERENCE DESIGNATOR(S)
R1012
BOM OPTION
FPD_12VM
TABLE_5_ITEM
+5V/+12V, AUDIO
R740 1 2
59D8>
10K
1%
DS6
GREEN
SM NOSTUFF
1%
1/16W
116S1000 1 RES,0 OHM,5%,1/16W,O4O2,SMD R1012 FPD_3V3
TABLE_5_ITEM
FW & TMDS PWR

A 1/16W
MF 2 DEV R614 MF
603
A
2 402
470
SLEEP_LED_BD BT1_LED 1 2 NOTICE OF PROPRIETARY PROPERTY
SLEEP2 5% LAST_MODIFIED=Wed Sep 17 12:17:11 2003
1/16W
3 DEV MF 1 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
402 DS10 AGREES TO THE FOLLOWING
3
D
Q19 RED I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
2N7002 SM
R751
D
Q18 1 G S
SM 2 II NOT TO REPRODUCE OR COPY IT
2N7002 TESTPOINT III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
CPU_STATE_LED*
44C4<> 1
0 2 SLEEP1 1 G S
SM
2
JAZ1 1
A SIZE DRAWING NUMBER REV.
5% TH-TP50
1/16W
MF
402
2
D 051-6497 13
APPLE COMPUTER INC.
SLEEP LED GENERAL POWER LED SCALE SHT OF
(NOT ILLUMINATED = OK TO ADD MEMORY) NONE 51 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
INTREPID POWER CONSTRAINT TABLE
D SIG_NAME MIN_NECK_WIDTH VOLTAGE MIN_LINE_WIDTH D

OUT
+1_5V_INTREPID_PLL 10 1.5 20 9D4< 16D6< 28D6<> 30D5<
OUT
+1_5V_INTREPID_PLL1 10 1.5 20 28C4<
OUT
+1_5V_INTREPID_PLL2 10 1.5 20 28D4<
OUT
+1_5V_INTREPID_PLL3 10 1.5 20 28D4<
OUT
+1_5V_INTREPID_PLL4 10 1.5 20 28D4<
OUT
+1_5V_INTREPID_PLL5 10 1.5 20 16D5<
OUT
+1_5V_INTREPID_PLL6 10 1.5 20 30D4<
OUT
+1_5V_INTREPID_PLL7 10 1.5 20 9D2<
OUT
+1_5V_INTREPID_PLL8 10 1.5 20 28D4<
OUT
+1_5V_AGP 10 1.5 20 10D6< 11A6< 16A8< 16C2< 16D7< 17A3< 17A4< 17D5< 46B4<> 59C8>
INT_AGP_VREF 10 0.75 20
CPU POWER CONSTRAINT TABLE OUT 16A7< 16C6<>
SIG_NAME MIN_NECK_WIDTH VOLTAGE MIN_LINE_WIDTH
+MAXBUS_SLEEP 10 1.8 20
OUT
CPU_AVDD 10 1.85 20
4D5< 6C5< 6D6< 7A3< 7B3< 7C3< 7C5< 7C7< 8A3<> 8D1< 8D4< 9B7< 9D8< 44B7<
44D1< 44D2< 45D2<> 46D4< 59C8>
4D3<
MAIN POWER CONSTRAINT TABLE +1_8V_MAIN
OUT
OUT
CPU_VCORE_SLEEP 10 1.85 20 4D3< 4D7< 8B7< 8C1< 45D2<> 59B6> 59D8>
+2_5V_MAIN
+3V_MAIN
59D8>
OUT
+1_8V_MAIN 10 1.8 20 3.8V_TRICKLE 36D8< 44C2< 44C6< 44D7<> 50D5< 52C2>
59D8> 49B2<> 30B3< +2_5V_MAIN 10 2.5 20 36D8< 44C2< 44C6< 44D7<> 50D5< 52C1>
43C7< 42C8< 42B7< 42B5< 41A7< 41A5< 40D5< 39D4<
OUT
+3V_MAIN 10 3.3 20 +5V_MAIN
59D8> OUT 59D8>
ETHERNET POWER CONSTRAINT TABLE OUT
3.8V_TRICKLE 10 3.8 20 +12V_MAIN 59D8> 51D6<> 52C1>
51A5< 51C2<
+5V_MAIN 10 5 20 59D8>
C SIG_NAME MIN_NECK_WIDTH VOLTAGE MIN_LINE_WIDTH
59D8> 51B4<>
OUT
OUT
+12V_MAIN 10 12 20 +12V_SLEEP59D8>
29C5<> 50D5<
29A3< 29A8<
29A3< 29A8< 29C5<> 50D5<
C
+12V_SLEEP 10 12 20 51A5< 51C2< 51D6<> 52C1>
OUT
ENET_AVDD 10 2.5 20 35D2<> 35D4<>

OUT
OUT
GND 10 0 20
39B7<>
OUT
AGND 10 0 20
41B3< 41B1<> 41A4< 41A2<> 40C6< 40B6< 40B5<> 35C1<> 35B1<
OUT
ANALOGGND 10 0 20
43A5< 42A6<> 42A5<> 41D3< 41C3<
36B2< 36A7<> 33D4< 33D2< 33C4< 33C2< 33B4< 33B2< 25C3< 25B3<> ALTCHGND 10 0 20
36C1< 36C1<> 36B6<> 36B6< OUT
43B7< 43A7< 29A3< 24B3<
OUT
CHGND 10 0 20
FIREWIRE POWER CONSTRAINT TABLE
ALT
CHASSIS
FW_DIO_V 10 3.3 20
OUT
FW_DIODE_BYPASS_V 10 3.3 20
36B6< PMU POWER CONSTRAINT TABLE
OUT 36B6<> 36B7<>
OUT
FW_PWR 10 24 20 29B3< 36D6< 50C6<> 51D4<>
FW_PWR_SW 10 24 20 SIG_NAME MIN_NECK_WIDTH VOLTAGE MIN_LINE_WIDTH
OUT 36D6< 51D2<>
OUT
FW_PHY_3_3 10 3.3 20 36B5< 36B7< 36D7<
OUT
FW_VGND 10 0 20 OUT
3.8VH_TRICKLE 10 3.8 20 44C1< 44D7<>
OUT
FW_VP 10 12 20 36D5< OUT
PMU_AVCC 10 3.5 20 44B5< 44D4<> 59C6>
OUT
FW_VP1 10 12 20 36D1<> 36D3<> OUT
PMU_POWER 10 3.5 20 29C3<> 44A5<> 44B1< 44C2< 44D5<>
OUT
FW_VP2 10 12 20 36C1<> 36D3<>
OUT
FW_VP_1 10 12 20 36D4<
OUT
FW_VP_2 10 12 20 36D4
OUT
FAN_12V_FILT 10 12 20 29A5<> 59C8>
KS5VSD 10 5 20 29A5<> 59A8>
+3.3VFPD 10 3.6 20 24D7< 51C1<>
OUT
OUT LED_5V 10 5 20 29A8<
DAC2VDD 10 3.3 20 22C5<
OUT
OUT LED_5V_FILT 10 5 20 29A5<> 59A8>
DACVDD 10 3.3 20 22C4< OUT
OUT LED_RET 10 0 20 29A3< 51B6<
DDC_VCC_3 10 3.3 20 24B3<> 59B8>
OUT
OUT LED_RET_FILT 10 0 20 29A5<> 59A8>
OUT
DDC_VCC_5 10 5 20 25C4< 59B8> OUT
OUT
DDR_VREF 10 1.25 20 12A7< 14D2<> 14D8<> 15D8<
OUT
IFP0AVCC 10 3.8 20 23A6< 23C1<
OUT
IFP0VREF 10 3.8 20 23B4<>
OUT
INT_TMDS_3V 10 3.6 20 24C3<> 59C8>
OUT
GPU_AGP_VREF 10 0.75 20 17A2< 17A8<
GPU_FB_VREF 10 1.25 20
OUT
GRAPH_CORE 10 1.6 20
18C8< USB POWER CONSTRAINT TABLE
OUT 17D4< 23C7<> 48C2<>
OUT
NVPLLVDD 10 3.3 20 22D5<
SGRAVREF 10 1.25 20 SIG_NAME MIN_NECK_WIDTH VOLTAGE MIN_LINE_WIDTH
OUT 20A3< 20C4< 20C8<
OUT
SGRBVREF 10 1.25 20 21A3< 21C4< 21C8<
OUT
+3V_INTREPID_USB 10 3.3 20 28C4<
OUT
NEC_AVDD 10 3.3 20 32D5<
USB_GND 10 0 20
17B5<> GPU_50PULLUP 1.5
0
OUT
OUT
USB_PORT_PWR 10 5 20 33A4<> 33B3<> 33C3<> POWER CONSTRAINTS
A 17A5<>
17A5<
GPU_50PULLDWN
GPU_TMODE 0
OUT
OUT
OUT
OUT
USB_PWR 10 5 20 33D3<> 59B6>
25B5<> 25C2< 25D3<> 33A6<>
A
22B2< 22A5< GPU_XTALSSIN 0 OUT
22D4< VIPCLK 0 OUT

37B7< CSLOT_IOWAIT_L
3.3 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
OUT
38C6<> EIDE_CSELP_L 0 OUT SIZE DRAWING NUMBER REV.
38C6<> EIDE_IOCS16_L 5 OUT
38C2<> UIDE_CSELP_L 0 OUT
D 051-6497 13
5 APPLE COMPUTER INC.
38C2<> UNUSED_ATAIOCS16_L OUT SCALE SHT OF
NONE 52 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
RATSNEST_SCHEDULE MIN_NECK_WIDTH
SIG_NAME RELATIVE_PROPAGATION_DELAY
MAX_VIAS
PROPAGATION_DELAY
STUB_LENGTH NET_SPACING_TYPE MAX_EXPOSED_LENGTH NO_TEST FUNC_TEST PULSE_PARAM
13C4<> 13B6<> 13B3<> 13A6<> 12D8<> 12C8<> 12B8<> MEM_DATA<0..63> MEM_GROUP0:G:L:S:0:150 8 L:S::1300 3 167 MHZ
14D6<> 14D4<> 14C6<> 13C8<> RAM_GROUP0_A:G:L:S:0:180 8 L:S::1800 3 167 MHZ
13D4<> 13C7<> 13C4<> 13C2<> 13B5<> 13B2<> RAM_DATA_A<0..63>
14C4<> 14B6<> 14B4<> 14A6<> 14A4<> 13D7<> RAM_GROUP0_B:G:L:S:0:180 2 L:S::2400 3 167 MHZ
RAM_DATA_B<0..63>
15D6<
D 13C8<> 13C4<> 13B3<> 13A6<> 12C6<> MEM_DQS<0..7>

14A6<> 13D7<> 13D4<> 13C7<> 13C4<> 13B5<> 13B2<> RAM_DQS_A<0..7>
MEM_GROUP0:G:L:S:0:180
RAM_GROUP0_A:G:L:S:0:180
3
3
L:S::1300
L:S::1700
3
3
167
167
MHZ
MHZ
D
14D6<> 14C8< 14C6<> 14B8< 14B6<> 14A8< RAM_GROUP0_B:G:L:S:0:180 2 L:S::2400 3 167 MHZ
13C7<> 13C4<> 13B7<> 13B4<> 13B2<> 13A5<> 13A2<> RAM_DQS_B<0..7>
15D6< 15C8< 15C6< 15B8< 15B6< 15A8< 15A6< MEM_GROUP0:G:L:S:0:180 3 L:S::1300 3 167 MHZ
13C8<> 13C4<> 13B3<> 13A6<> 12C6<> MEM_DQM<0..7>
13D7<> 13D4<> 13C7<> 13C4<> 13B5<> 13B2<> 13A5<> RAM_DQM_A<0..7> RAM_GROUP0_A:G:L:S:0:180 3 L:S::1800 3 167 MHZ
14D4<> 14C4<> 14B4<> 14A4<> RAM_GROUP0_B:G:L:S:0:180 2 L:S::2400 3 167 MHZ
13C7<> 13C4<> 13B7<> 13B4<> 13B2<> 13A5<> 13A2<> RAM_DQM_B<0..7>
15D4> 15C4> 15B4> 15A4>
12D6<> 12D3< 12D2< 12C3< 12C2< 12B3< MEM_ADDR<0..12> MEM_ADDR:G:L:S:0:200 3 L:S::600

15B4> 14B6<> 14B4<> 12D3< 12D1< 12C3< 12C1< 12B3< RAM_ADDR<0..12> RAM_ADDR:G:L:S:0:1300 4 L:S::3500 200
15C6< 15C4> 15B6< MEM_ADDR:G:L:S:0:1300 3 L:S::600
12D6<> 12B3< MEM_BA<0..1>
15B6< 14B6<> 14B4<> 12B3< RAM_BA<0..1> RAM_ADDR:G:L:S:0:1300 4 L:S::4000 200
12C6<> 12C2< 12B2< MEM_CS_L<0..3> MEM_ADDR:G:L:S:0:200 3 L:S::600 10 MIL SPACING
14B6<> 14B4<> 12C1< RAM_CS_L<0..1> RAM_CS_GROUP0:G:L:S:0:400 3 L:S:2000:3500 10 MIL SPACING
15B4> 12B1< RAM_CS_L<2..3> RAM_CS_GROUP1:G:L:S:0:350 2 L:S:2000:3500 10 MIL SPACING
12C6<> 12A3< MEM_RAS_L MEM_ADDR:G:L:S:0 MIL:200 MIL 3 L:S::600 MIL
12C6<> 12A3< MEM_CAS_L MEM_ADDR:G:L:S:0 MIL:200 MIL 3 L:S::600 MIL
12C6<> 12B3< MEM_WE_L MEM_ADDR:G:L:S:0 MIL:280 MIL 3 L:S::600 MIL

15B6< 14B4<> 12A2< RAM_CAS_L RAM_ADDR:G:L:S:0 MIL:2000 MIL 4 L:S::4000 MIL 200
15B4> 14B4<> 12A2< RAM_RAS_L RAM_ADDR:G:L:S:0 MIL:2000 MIL 4 L:S::4000 MIL 200
15B6< 14B6<> 12B3< RAM_WE_L RAM_ADDR:G:L:S:0 MIL:2000 MIL 4 L:S::4000 MIL 200
12C6<> 12C2< 12B6<> 12B2< MEM_CKE<0..3> MEM_ADDR:G:L:S:0:200 3 L:S::600 10 MIL SPACING
15C1< 14B6<> 14B4<> 12C1< 12B1< RAM_CKE<0..1> RAM_CS_GROUP0:G:L:S:0:400 3 L:S::2500 10 MIL SPACING
15C6< 15C4> 15B1< 15A1< 12C1< 12B1< RAM_CKE<2..3> RAM_CS_GROUP1:G:L:S:0:350 2 L:S::2500 10 MIL SPACING
12B6<> MEM_MUXSEL_H<0..1> 3 L:S::1000
12B6<> MEM_MUXSEL_L<0..1> 3 L:S::1000 167 MHZ
4 L:S::2000 MIL 200 167 MHZ
13C4<> 13A3<> 12D4< MUX_SEL_H
C 13C8<> 13A6<> 12D4< MUX_SEL_L 4 L:S::2000 MIL
L:S:500
3 MIL:850 MIL
200
8 MIL SPACING 270
167
167
MHZ
MHZ
C
12B6<> SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_A0_L_UF
12B6<> L:S:500
3 MIL:850 MIL 8 MIL SPACING 270 167 MHZ
14D6<> 12C4< SYSCLK_DDRCLK_A0 SYSCLK_DDRCLKA0:G:L:S:0 MIL:100 MIL 3 L:S::2600 MIL 200 8 MIL SPACING 270 167 MHZ
14D6<> 12C4< SYSCLK_DDRCLK_A0_L SYSCLK_DDRCLKA0:G:L:S:0 MIL:100 MIL 3 L:S::2600 MIL 200 8 MIL SPACING 270 167 MHZ
12B6<> SYSCLK_DDRCLK_A1_UF L:S:500
12B6<> L:S:500
14A4<> 12C4< SYSCLK_DDRCLK_A1 SYSCLK_DDRCLKA1:G:L:S:0 MIL:100 MIL 3 L:S::2600 MIL 200 8 MIL SPACING 270 167 MHZ
14A4<> 12B4< SYSCLK_DDRCLK_A1_L SYSCLK_DDRCLKA1:G:L:S:0 MIL:100 MIL 3 L:S::2600 MIL 200 8 MIL SPACING 270 167 MHZ
12B6<> SYSCLK_DDRCLK_A2_UF L:S:500
12B6<> L:S:500
SYSCLK_DDRCLK_A2_L 3 L:S::750 MIL 8 MIL SPACING 270 167 MHZ
12B6<> SYSCLK_DDRCLK_B0_UF L:S:500
SYSCLK_DDRCLK_B0_L_UF
12B6<> L:S:500
15B4> 12B4< SYSCLK_DDRCLK_B0 SYSCLK_DDRCLKB0:G:L:S:0 MIL:100 MIL 3 L:S::3500 MIL 200 8 MIL SPACING 270 167 MHZ
SYSCLK_DDRCLK_B0_L
15B3> SYSCLK_DDRCLKB0:G:L:S:0 MIL:100 MIL 3 L:S::3500 MIL 200 8 MIL SPACING 270 167 MHZ

12B6<> L:S:500
15D6< 12A4< SYSCLK_DDRCLK_B1 SYSCLK_DDRCLKB1:G:L:S:0 MIL:100 MIL 3 L:S::3500 MIL 200 8 MIL SPACING 270 167 MHZ
SYSCLK_DDRCLK_B1_L
15C6< SYSCLK_DDRCLKB1:G:L:S:0 MIL:100 MIL 3 L:S::3200 MIL 200 8 MIL SPACING 270 167 MHZ
12B6<> L:S:500
15A6< 12A4< SYSCLK_DDRCLK_B2 SYSCLK_DDRCLKB2:G:L:S:0 MIL:100 MIL 3 L:S::3500 MIL 200 8 MIL SPACING 270 167 MHZ
SYSCLK_DDRCLK_B2_L
15A6< SYSCLK_DDRCLKB2:G:L:S:0 MIL:100 MIL 3 L:S::3500 MIL 200 8 MIL SPACING 270 167 MHZ
B B
28A6< INT_REF_CLK_IN_PD 8 L:S::2500 MIL 10 MIL SPACING 270 66.56 MHZ

31C6< 31B7< 31B6< 30D4<> 30C4<> 30C2< 30C1<> 30B2< PCI_AD<31..0> MIN_DAISY_CHAIN 6 L:S:6000:8000 500 33 MHZ
59C3> 59B3> 32C6<> 32B7<> 32B6<> 31C7<
59A6> 32B6<> 31B7< 30C5<> PCI_CBE<3..0> MIN_DAISY_CHAIN 6 L:S:6000:8000 500 33 MHZ SIGNAL CONSTRAINTS
A 59A6> 32B6<> 31B7< 30C5<> 30B7< PCI_FRAME_L MIN_DAISY_CHAIN L:S:6000
7 MIL:8000 MIL
500 33 MHZ
A
DIGITAL SIGNAL CONSTRAINTS AGREES TO THE FOLLOWING
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 53 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
RATSNEST_SCHEDULE DIFFERENTIAL_PAIR
SIG_NAME
RELATIVE_PROPAGATION_DELAY
MAX_VIAS
PROPAGATION_DELAYSTUB_LENGTH NET_SPACING_TYPE MAX_EXPOSED_LENGTH FUNC_TEST PULSE_PARAM
D 32B6<> 31B7< 30C5<> 30B7< PCI_IRDY_L MIN_DAISY_CHAIN L:S:6000

6 500
MIL:8000 MIL 33 MHZ I1
D
59A6> 32B6<> 31B7< 30C5<> 30B7< PCI_TRDY_L MIN_DAISY_CHAIN L:S:6000
6 500
59A6> 32B6<> 31B7< 30C5<> 30B7< PCI_DEVSEL_L MIN_DAISY_CHAIN L:S:6000
6 500
59A6> 32B6<> 31B7< 30C5<> 30B7< PCI_STOP_L MIN_DAISY_CHAIN L:S:6000
6 500
59A6> 32B6<> 31B7< 30C5<> PCI_PAR MIN_DAISY_CHAIN L:S:6000
6 MIL:8000 500
MIL 33 MHZ I5
30D5<> CLK33M_PCI_SLOTB_UF L:S:600
3 200
MIL:1000 MIL 450 33 MHZ I6
30D5<> CLK33M_PCI_SLOTC_UF L:S:600
3 200
MIL:1200 MIL 450 33 MHZ I7
30D5<> CLK33M_PCI_SLOTD_UF L:S:600
3 200
MIL:1000 MIL 450 33 MHZ I8
59A6> 31C2<> 30D7< CLK33M_PCI_SLOTB L:S:3000
5 200
MIL:4000 MIL 10 MIL SPACING 450 33 MHZ I9
30C5<> INT_PCI_FB_OUT 4 L:S::1000 MIL 200 450 33 MHZ I10
30D8< PCI_FBO_PLUS2 4 L:S::200 MIL 200 450 33 MHZ I11
30C8< PCI_FB_PLUS4 L:S:1900
4 MIL:2000 MIL 450 33 MHZ I12
30C8< PCI_FBI_PLUS2 L:S:1900
4 200
MIL:2000 MIL 450 33 MHZ I13
30C7< PCI_FBI_EQUAL L:S:2000
4 200
MIL:3000 MIL 450 33 MHZ I14
30C7< PCI_FB_PLUS6 L:S:5900
4 MIL:6000 MIL 450 33 MHZ I15
30C5< INT_PCI_FB_IN 4 L:S::1080 MIL 200 450 33 MHZ I16
31C6< 31C3<> 31C2<> 31B7< 31B6< 31B3<> 31B2<> PCIT_AD<31..0> 3 L:S::1000 33 MHZ I17
59C3> 59B3> 31C7< 3 L:S::1000 33 MHZ
59A6> 31C3<> 31B6< 31B2<> PCIT_CBE<31..0> I18
31C2<> 31B6< PCIT_FRAME_L 3 L:S::1000 MIL 33 MHZ I19
59B6> 31C3<> 31B6< PCIT_IRDY_L 3 L:S::1000 MIL 33 MHZ I20
31C2<> 31B6< PCIT_TRDY_L 3 L:S::1000 MIL 33 MHZ I21
31C2<> 31B6< PCIT_DEVSEL_L 3 L:S::1000 MIL 33 MHZ I22
31C2<> 31B6< PCIT_STOP_L 3 L:S::1000 MIL 33 MHZ I23
31C2<> 31B6< PCIT_PAR 3 L:S::1000 MIL 33 MHZ I24
17D8< 17C8< 16C4<> AGP_AD<0..15> AGP_GROUP0:G:L:S:0:280 5 L:S::4500 266 MHZ I25
17C8< 16B4<> AGP_CBE<0..1> AGP_GROUP0:G:L:S:0:330 5 L:S::4500 266 MHZ I26
4 L:S::4400 MIL 200 8 MIL SPACING 500 AGP_ADSTBDP0 133 MHZ
C 17B8< 16B3< 16A4<> AGP_AD_STB<0> AGP_GROUP0:G:L:S:0 MIL:330 MIL
17B8< 16D1< 16A4<> AGP_AD_STB_L<0> AGP_GROUP0:G:L:S:0 MIL:330 MIL 4 L:S::4400 MIL 200 8 MIL SPACING 500 AGP_ADSTBDP0 133 MHZ
I27
I28
C
17C8< 16C4<> 16B4<> AGP_AD<16..31> AGP_GROUP0:G:L:S:0:280 5 L:S::4500 266 MHZ I29
17C8< 16B4<> AGP_CBE<2..3> AGP_GROUP0:G:L:S:0:280 5 L:S::4500 266 MHZ I30
17B8< 16B3< 16A4<> AGP_AD_STB<1> AGP_GROUP0:G:L:S:0 MIL:280 MIL 4 L:S::4400 MIL 200 8 MIL SPACING 500 AGP_ADSTBDP1 133 MHZ I31
17B8< 16D1< 16A4<> AGP_AD_STB_L<1> AGP_GROUP0:G:L:S:0 MIL:330 MIL 4 L:S::4400 MIL 200 8 MIL SPACING 500 AGP_ADSTBDP1 133 MHZ I32
17B8< 16C3< 16B4<> AGP_FRAME_L L:S:4000
5 MIL:4500 MIL 66 MHZ I33
17B8< 16C3< 16B4<> AGP_IRDY_L L:S:4000
17B8< 16B4<> 16B3< AGP_TRDY_L L:S:4000
17B8< 16C3< 16B4<> AGP_DEVSEL_L L:S:4000
17B8< 16B4<> 16B3< AGP_STOP_L L:S:4000
17B8< 16B4<> AGP_PAR L:S:4000
17A8< 16C1< 16B4< 16B4<> 16B1< 16A4<> AGP_SBA<0..7> 5 L:S:4000:4500 I39
17B8< 16B3< 16A4<> AGP_SB_STB AGP_GROUP99:G:L:S:0 MIL:200 5
MIL L:S::4500 MIL AGP_SBSTBB I40
17A8< 16D1< 16A4<> AGP_SB_STB_L AGP_GROUP99:G:L:S:0 MIL:200 MIL 5 L:S::4500 MIL AGP_SBSTBB I41
17B6< 16B1< 16A4<> AGP_ST<0..2> 5 L:S:4500:5000 I42
17B8< 16B3< 16A4<> AGP_PIPE_L L:S:4000
5 MIL:4500 MIL I43
17B8< 16B3< 16A4<> AGP_RBF_L L:S:4000
5 MIL:4500 MIL I44
17B7<> 16C4<> 16C3< AGP_REQ_L L:S:4500
5 MIL:5000 MIL I45
17B7< 16C4<> 16C3< AGP_GNT_L L:S:4500
5 MIL:5000 MIL I46
17B8< 16B1< 16A6<> AGP_WBF_L L:S:4000
5 MIL:4500 MIL I47
17A8> 16D3< 16D1< 16C6<> AGP_BUSY_L L:S:4500
5 MIL:5000 MIL I48
17A8< 16D3< 16C6<> STOP_AGP_L L:S:4500
5 MIL:5000 MIL I49
17D7<> 17D6<> 17C6<> GPU_AGP_AD<0..15> GPU_AGP_GROUP0:G:L:S:0:100 3 L:S::600 266 MHZ I50
17C6<> GPU_AGP_CBE<0..1> GPU_AGP_GROUP0:G:L:S:0:100 3 L:S::600 266 MHZ I51
AGP_AD_STB_GPUUF<0>
17B6< 3
GPU_AGP_STB0:G:L:S:0 MIL:50 MIL L:S::450 MIL 8 MIL SPACING 500 GPU_ADSTBDP0 133 MHZ I52
AGP_AD_STB_L_GPUUF<0>17B6< 3
GPU_AGP_STB0:G:L:S:0 MIL:50 MIL L:S::800 MIL 8 MIL SPACING 500 GPU_ADSTBDP0 133 MHZ
B 17C6<> GPU_AGP_AD<16..31> GPU_AGP_GROUP1:G:L:S:0:100 3 L:S::600 266 MHZ
I53
I54
B
17C6<> GPU_AGP_CBE<2..3> GPU_AGP_GROUP1:G:L:S:0:100 3 L:S::600 266 MHZ I55
AGP_AD_STB_GPUUF<1>
17B6< 3
GPU_AGP_STB1:G:L:S:0 MIL:50 MIL L:S::800 MIL 8 MIL SPACING 500 GPU_ADSTBDP1 133 MHZ I56
AGP_AD_STB_L_GPUUF<1>17B6< GPU_AGP_STB1:G:L:S:0 MIL:50 3
MIL L:S::800 MIL 8 MIL SPACING 500 GPU_ADSTBDP1 133 MHZ I57
17B6<> GPU_AGP_FRAME_L 3L:S:300 MIL:600 MIL 66 MHZ I58
17B6<> GPU_AGP_IRDY_L 3L:S:300 MIL:600 MIL 66 MHZ I59
17B6<> GPU_AGP_TRDY_L 3L:S:300 MIL:600 MIL 66 MHZ I60
17B6<> GPU_AGP_DEVSEL_L 3L:S:300 MIL:600 MIL 66 MHZ I61
17B6<> GPU_AGP_STOP_L 3L:S:300 MIL:600 MIL 66 MHZ I62
17B6<> GPU_AGP_PAR 3L:S:300 MIL:600 MIL 66 MHZ I63
17A6<> GPU_AGP_SBA<0..7> 3 L:S:300:600 I64
17B6<> GPU_AGP_SB_STB GPU_AGP_SBSTB:G:L:S:0 MIL:50 MIL 3L:S:300 MIL:600 MIL GPU_SBSTBB I65
17A6<> GPU_AGP_SB_STB_L GPU_AGP_SBSTB:G:L:S:0 MIL:50 MIL 3L:S:300 MIL:600 MIL GPU_SBSTBB I66
17B6<> GPU_AGP_PIPE_L 3L:S:300 MIL:600 MIL I67
17B6<> GPU_AGP_RBF_L 3L:S:300 MIL:600 MIL I68
16C6<> CLK66M_GPU_UF L:S:1000

3 MIL:1100 MIL 10 MIL SPACING 250 66 MHZ I70
17C7< 16D8< CLK66M_GPU_AGP L:S:3700
4 200
MIL:3900 MIL 10 MIL SPACING 250 66 MHZ I71
16C6<> INT_AGP_FB_OUT L:S:1400
4 200
MIL:1500 MIL 250 66 MHZ I72
16B7< AGP_FBO_EQUAL L:S:900
4 200
MIL:1080 MIL 250 66 MHZ I73
16B8< AGP_FB_PLUS2 L:S:1900
4 MIL:2000 MIL 250 66 MHZ I74
16C7< AGP_FBI_EQUAL 4 L:S::200 MIL 200 250 66 MHZ I75
16C6< INT_AGP_FB_IN 4 L:S::1200 MIL 200 250 66 MHZ I76
30C5<> 30A7< 16D7< INT_ROM_OVERLAY_PU 3L:S:600 MIL:800 MIL 10 MIL SPACING 250 66 MHZ I77
3 L:S::2800 MIL 8 MIL SPACING 250 166 MHZ
59A8> 56B3> 16C7< 9B4< 8A2< INT_ANALYZER_CLK I78 SIGNAL CONSTRAINTS
A 32A6< 30D7< CLK33M_PCI_SLOTD L:S:3000
4 200
MIL:3500 MIL 8 MIL SPACING 250 33 MHZ I79 NOTICE OF PROPRIETARY PROPERTY
A
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 54 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
DIGITAL SIGNALS RATSNEST_SCHEDULE
GROUP SIG_NAME RELATIVE_PROPAGATION_DELAY MAX VIAS PROPAGATION_DELAY STUB_LENGTH NET_SPACING_TYPE MAX EXPOSED LENGTH PULSE PARAM
FBD<0..63> GPU_FBDATA_A:G:L:S:0:225
4 L:S::800 300 MHZ 18E8<> 18F8<> 18G8<> 19C5< 19C8< 19D5< 19D8<
RFBD<0..63> 4
RAM_FBDATA_A:G:L:S:0:300 L:S::1000 300 MHZ 19C4< 19C7< 19D4< 19D7< 20B1<> 20B5<> 20C1<> 20C5<>
FBDQM<0..7> 4
GPU_FBDQM_A:G:L:S:0:200 L:S::800 300 MHZ 18D8> 18G3<
RFBDQM<0..7> 4
RAM_FBDQM_A:G:L:S:0:200 L:S::1000 300 MHZ 18G2< 20C2< 20C6<
FBA<0..12> 4
GPU_FBADDR_A:G:L:S:0:200 L:S::700 300 MHZ 18C8> 18D8> 18E3< 18F3<
5 L:S::2400 2350
D RFBA<0..11>
FBABA<0..1>
RAM_FBADDR_A:G:L:S:0:530
4
GPU_FBADDR_A:G:L:S:0:200 L:S::600
300
300
MHZ
MHZ
18E2<> 18F2<> 20C2< 20C6< 20D2< 20D6<
18C8<> 18E3<
D
RFBABA<0..1> 5
RAM_FBADDR_A:G:L:S:0:530 L:S::2400 50 300 MHZ 18E2<> 20C2< 20C6<
FBARAS_L GPU_FBCNTL_A:G:L:S:0 MIL:200 L:S::400
4 MIL MIL 300 MHZ 18C8> 18G3<
FBACAS_L GPU_FBCNTL_A:G:L:S:0 MIL:200 L:S::400
4 MIL MIL 300 MHZ 18C8> 18G3<
FBAWE_L GPU_FBCNTL_A:G:L:S:0 4
MIL:200 L:S::400
MIL MIL 300 MHZ 18C8> 18F3<
FBACS0_L GPU_FBCNTL_A:G:L:S:0 4
MIL:200 L:S::400
MIL MIL 300 MHZ 18C8> 18F3<
FBACKE 5 L:S::400
GPU_FBCNTL_A:G:L:S:0 MIL:200 MIL MIL 100 300 MHZ 18D3< 18D7<>
RFBARAS_L RAM_FBCNTL_A:G:L:S:0 5
MIL:350 L:S::2700
MIL MIL 50 300 MHZ 18G2<> 20B2< 20B6<
RFBACAS_L RAM_FBCNTL_A:G:L:S:0 5
MIL:500 L:S::2700
MIL MIL 50 300 MHZ 18G2<> 20B2< 20B6<
RFBAWE_L 5 L:S::2700
RAM_FBCNTL_A:G:L:S:0 MIL:500 MIL MIL 50 300 MHZ 18F2<> 20B2< 20B6<
RFBACS0_L 5 L:S::2700
RAM_FBCNTL_A:G:L:S:0 MIL:350 MIL MIL 50 300 MHZ 18F2<> 20B2< 20B6<
RFBACKE RAM_FBCNTL_A:G:L:S:0 5
MIL:500 L:S::2700
MIL MIL 50 300 MHZ 18D2<> 20C2< 20C6<
FBDQS<0..7> 3
GPU_FBDQS_A:G:L:S:0:100 L:S::350 300 MHZ 18C7<> 19A8<
FBDQSTERM<0..7> 3
FB_DQSTERM_A:G:L:S:0:50 L:S::1500 10 MIL SPACING 300 MHZ 19A7<
RFBDQS<0..7> L:S::150 10 MIL SPACING 300 MHZ
RAM_FBDQS_A:G:L:S:0:55
3 19A6< 20C2<> 20C6<>
FBACLK0 3
GPU_FBCLK_A:G:L:S:0 MIL:50 MIL
L:S::150 MIL 200 300 MHZ
18D7> 19C3<
FBACLK0_L 3
L:S::150 MIL 200 300 MHZ
18D7> 19C3<
FBACLK1 3
L:S::150 MIL 200 300 MHZ
18D7> 19D3<
FBACLK1_L 3
L:S::150 MIL 200 300 MHZ
18D7> 19D3<
RFBACLK1 3
RAM_FBCLK_A:G:L:S:0 MIL:80 MIL
L:S::2500 MIL 200 300 MHZ
19D1< 20C2<
RFBACLK1_L 3
L:S::2500 MIL 200 300 MHZ
19D1< 20C2<
RFBACLK0 3
L:S::2500 MIL 200 300 MHZ
19C1< 20C6<
RFBACLK0_L 3
L:S::2500 MIL 200 300 MHZ
19C1< 20C6<
FBD<64..127> 4
GPU_FBDATA_B:G:L:S:0:225 L:S::800 300 MHZ
18E5<> 18F5<> 18G5<> 19B5< 19B8< 19C5< 19C8<
4
C RFBD<64..127>
FBDQM<8..15>
RAM_FBDATA_B:G:L:S:0:325
4
GPU_FBDQM_B:G:L:S:0:120
L:S::1000
L:S::800
300
300
MHZ
MHZ
19B4< 19B7< 19C4< 19C7< 21B1<> 21B5<> 21C1<> 21C5<>
18C3< 18D3< 18D5>
C
RFBDQM<8..15> 4
RAM_FBDQM_B:G:L:S:0:120 L:S::1000 300 MHZ
18C2< 18D2< 21C2< 21C6<
FBBA<0..12> 4
GPU_FBADDR_B:G:L:S:0:120 L:S::600 300 MHZ
18A3< 18B3< 18C3< 18C5<> 18D5<>
RFBBA<0..11> RAM_FBADDR_B:G:L:S:0:370
5 L:S::2400 50 300 MHZ
18B2<> 18C2<> 21C2< 21C6< 21D2< 21D6<
FBBBA<0..1> 4
GPU_FBADDR_B:G:L:S:0:120 L:S::600 300 MHZ
18A3< 18C5<>
RFBBBA<0..1> RAM_FBADDR_B:G:L:S:0:370
5 L:S::2400 50 300 MHZ
18A2<> 21C2< 21C6<
FBBRAS_L 4
GPU_FBCNTL_B:G:L:S:0 MIL:120 MIL
L:S::400 MIL 300 MHZ
18C3< 18D4<>
FBBCAS_L GPU_FBCNTL_B:G:L:S:0 4
MIL:120 MIL
18C3< 18D4<>
FBBWE_L GPU_FBCNTL_B:G:L:S:0 4
MIL:120 MIL
18C3< 18D4<>
FBBCS0_L 4
GPU_FBCNTL_B:G:L:S:0 MIL:120 MIL
18C3< 18C4<>
FBBCKE GPU_FBCNTL_B:G:L:S:0 5
MIL:120 MIL
L:S::400 MIL 100 300 MHZ
18A3< 18C4<>
RFBBRAS_L RAM_FBCNTL_B:G:L:S:0 5
MIL:2000 L:S::3500
MIL MIL 3550 300 MHZ
18C2<> 21B2< 21B6<
RFBBCAS_L RAM_FBCNTL_B:G:L:S:0 5
MIL:2000 L:S::3500
18C2<> 21B2< 21B6<
RFBBWE_L RAM_FBCNTL_B:G:L:S:0 5
MIL:2000 L:S::3500
18C2<> 21B2< 21B6<
RFBBCS0_L RAM_FBCNTL_B:G:L:S:0 5
MIL:2000 L:S::3500
18C2<> 21B2< 21B6<
RFBBCKE RAM_FBCNTL_B:G:L:S:0 MIL:2000
5 L:S::3500
18A2<> 21C2< 21C6<
FBDQS<8..15> GPU_FBDQS_B:G:L:S:0:100
3 L:S::350 300 MHZ
10 MIL SPACING 18D4<> 19A5<
FBDQSTERM<8..15> FB_FBDQSTERM_B:G:L:S:0:60
3 L:S::1500 300 MHZ
10 MIL SPACING 19A4<
RFBDQS<8..15> RAM_FBDQS_B:G:L:S:0:50
3 L:S::150 300 MHZ
10 MIL SPACING 19A3< 21C2<> 21C6<>
FBBCLK0 GPU_FBCLK_B:G:L:S:0 MIL:50
3 MIL L:S::150 MIL 300 MHZ
200 18C5<> 19B3<
FBBCLK0_L GPU_FBCLK_B:G:L:S:0 MIL:50
200 18C5<> 19B3<
FBBCLK1 GPU_FBCLK_B:G:L:S:0 MIL:50
200 18C5<> 19C3<
FBBCLK1_L GPU_FBCLK_B:G:L:S:0 MIL:50
3 MIL L:S::150 MIL 200 300 MHZ
18C5<> 19B3<
RFBBCLK1 RAM_FBCLK_B:G:L:S:0 MIL:90
4 MIL L:S::2500 MIL 200 300 MHZ
19C1< 21C2<
RFBBCLK1_L RAM_FBCLK_B:G:L:S:0 MIL:90
3 MIL L:S::2500 MIL 200 300 MHZ
19B1< 21C2<
B RFBBCLK0
RFBBCLK0_L
RAM_FBCLK_B:G:L:S:0 MIL:90
3
RAM_FBCLK_B:G:L:S:0 MIL:90
3
MIL L:S::2500 MIL
MIL L:S::2500 MIL
200
200
300
300
MHZ
MHZ
19B1< 21C6
8 7 6 5 4 3 2 1
DIGITAL SIGNALS
D GROUP SIG_NAME RELATIVE_PROPAGATION_DELAY
MAX_VIAS PROPAGATION_DELAY
STUB_LENGTH NET_SPACING_TYPE NO_TEST PULSE_PARAM MAX_EXPOSED_LENGTH D
L:S::5000
CPU_ADDR<0..31> CPU_ADDR_GROUP:G:L:S:0:1250 250 166 MHZ
MAXBUS I1 7 4B7<> 4C7<> 8B4<> 8B5<> 8B7<> 8B8<> 8C4<> 8C5<> 8C7<> 8C8<>
:::5000
CPU_DATA<0..63>CPU_DATA_GROUP:G:L:S:0:1400 1550 166 MHZ 9C3<> 9D3<> 9D5< 9D8<
I2 7 5A4<> 5B4<> 5C4<> 5D4<> 6C4< 8C4<> 8C4< 8C5<> 8C7<> 8C7< 8C8<>
CPU_BR_L :::5000 250 10 MIL SPACING 8D4<> 8D5<> 8D7<> 8D8<> 9A7< 9B1<> 9B7< 9C1<> 9C5< 9C8< 9D1<>
I4 CPU_CNTL_GROUP:G:L:S:0
7 MIL:1100 MIL 166 MHZ 4D7> 7C7< 8B4<> 9D3<
I3
CPU_BG_L CPU_CNTL_GROUP:G:L:S:0
7 :::5000
MIL:1100 MIL
250 10 MIL SPACING 166 MHZ 4D7< 7B7< 8B4<> 9D3<>
I5
CPU_TS_L CPU_CNTL_GROUP:G:L:S:0
7 :::5000
MIL:1000 250
MIL 10 MIL SPACING 166 MHZ 4D7<> 7C7< 8B7<> 9D3<>
I6
CPU_TT<0..4> 7 :::5000
CPU_CNTL_GROUP:G:L:S:0:1300 250 10 MIL SPACING 166 MHZ 4B7<> 7A7< 8B4<> 8B5<> 9B3<>
CPU_TBST_L :::5000 250 10 MIL SPACING
I7 CPU_CNTL_GROUP:G:L:S:0
7 MIL:1100 MIL 166 MHZ 4B7> 7B7< 8B4<> 9B3<>
I9 7 :::5000
CPU_TSIZ<0..2> CPU_CNTL_GROUP:G:L:S:0:1260 250 10 MIL SPACING 166 MHZ 4B7> 8B5<> 8B7< 9B3<>
I8
CPU_ARTRY_L CPU_CNTL_GROUP:G:L:S:0
7 :::5000
MIL:1000 250
MIL 10 MIL SPACING 166 MHZ 4A7<> 7C7< 8B8<> 9B3<>
I10
CPU_AACK_L CPU_CNTL_GROUP:::1000
7 :::5000 250 10 MIL SPACING 166 MHZ 4A7< 7B7< 8B5<> 9B3<>
I11
CPU_GBL_L CPU_CNTL_GROUP:::1000
3 :::1000 250 10 MIL SPACING 166 MHZ 4B8<> 8B5<>
I12
CPU_INT_GBL_L CPU_CNTL_GROUP:G:L:S:0
5 :::3500
MIL:1100 MIL
250 10 MIL SPACING 166 MHZ 4B8< 7B7< 9C3<>
I14
CPU_CI_L CPU_CNTL_GROUP:G:L:S:0
7 :::5000
MIL:1000 250
MIL 10 MIL SPACING 166 MHZ 4A7> 7A7< 8C5<> 9C3<>
I13
CPU_HIT_L CPU_CNTL_GROUP:G:L:S:0
7 :::5000
MIL:1000 MIL
250 10 MIL SPACING 166 MHZ 4A7> 7C7< 8B8<> 9B3<
I15
CPU_DBG_L CPU_CNTL_GROUP:G:L:S:0
7 :::3500
MIL:1000 MIL
250 10 MIL SPACING 166 MHZ 4C3< 7B7< 8B8<> 9B1<>
I16
CPU_DRDY_L CPU_CNTL_GROUP:G:L:S:0
5 :::500
MIL:1100 MIL
250 10 MIL SPACING 166 MHZ 4C2< 7B7< 8B5<> 9B1<
I17
CPU_WT_L CPU_CNTL_GROUP:G:L:S:0
7 :::5000
MIL:1000 MIL
250 10 MIL SPACING 166 MHZ 4B7> 7A7< 8B5<> 9B3<>
I18
CPU_DRDY_L_UF 2 :::5000 250 10 MIL SPACING 166 MHZ 4C3<>
I19 7 :::5000
CPU_DTI<0..2> CPU_CNTL_GROUP:G:L:S:0:1150 250 10 MIL SPACING 166 MHZ 4C3< 8B4<> 8B7<> 9A1<>
I20
CPU_TA_L CPU_CNTL_GROUP:G:L:S:0
7 :::5000
MIL:1100 MIL
250 10 MIL SPACING 166 MHZ 4C3< 7C7< 8C4<> 9A1<>
I21
CPU_TEA_L CPU_CNTL_GROUP:G:L:S:0
7 :::5000
MIL:1100 MIL
250 10 MIL SPACING 166 MHZ 4C3< 7B7< 8B5<> 9A1<>
I22
CPU_QREQ_L CPU_CNTL_GROUP:G:L:S:0
7 :::5000
MIL:1000 MIL
250 10 MIL SPACING 166 MHZ 4C3> 7D5< 8B7<> 9B3<
:::4000 10 MIL SPACING

C I23
CPU_QACK_L
SYSCLK_CPU_UF
CPU_CNTL_GROUP:G:L:S:0
8
2
MIL:1000 MIL
:::150
250
10 MIL SPACING
166
166
MHZ
MHZ 315
4C3< 8B4<> 9B3<>
9A3<>
C
I25
I24
SYSCLK_CPU 4 ::2200:2400 200 10 MIL SPACING 166 MHZ 315 4D2< 9A4<
I26
INT_CPU_FB_OUT 3 :::1000 200 166 MHZ 315 9B3<>
I27
CPU_FBO_PLUS1 3 :::200 200 166 MHZ 315 9A5<
I28
CPU_FBI_PLUS1 3 ::1400:1500 200 166 MHZ 315 9A5<
I29
CPU_FB_MINUS3 4 ::900:1000 200 166 MHZ 315 9A4<
I30
INT_CPU_FB_IN 4 :::1000 200 166 MHZ 315 9B3<
I31
CPU_FB_PLUS2 3 ::900:1000 166 MHZ 315 9A5<
I33
CPU_FB_PLUS3 3 ::2900:3000 166 MHZ 315 9A4<
I32
INT_ANALYZER_CLK 3 :::300 166 MHZ 8A2< 9B4< 16C7< 54A7< 59A8>
I34
SYSCLK_LA 2 :::2000 166 MHZ 8A2< 8D8<>
INT_CLOCK_OUT :::3000 166 MHZ

I35 3 8B2<>
MIN_LINE_WIDTH DIFFERENTIAL_PAIR
I36
USB2_XT1 3 :::1000 100 10 MIL SPACING 30 MHZ 32C4<
I37
USB2_XT2_B 3 :::1000 100 10 MIL SPACING 30 MHZ
I38
USB2_XT2 3 :::100 100 10 MIL SPACING 30 MHZ 32C4<>
I40
USB2_RREF 2 :::100 32B4<>
I39
USB2_RSDAM USB2_RSDA:G:L:S:02 MIL:20 :::500
MIL 8 MIL SPACING 3.5 480 MHZ 32C4<>
I41
USB2_RSDAP USB2_RSDA:G:L:S:02 MIL:20 :::500
I42
USB2_RSDBM USB2_RSDB:G:L:S:02 MIL:20 :::500
USB2_RSDBP USB2_RSDB:G:L:S:02 MIL:20 :::500
MIL 8 MIL SPACING 3.5 480 MHZ
B I43
I45
USB2_RSDCM USB2_RSDC:G:L:S:02 MIL:20 MIL:::500 8 MIL SPACING 3.5 480 MHZ
32C4<>
32C4<> RATSNEST_SCEDULE
B
I44
USB2_RSDCP USB2_RSDC:G:L:S:02 MIL:20 :::500
USB2_DAN_F :::500 50 8 MIL SPACING 3.5 USB2_DMA_DP MIN_DAISY_CHAIN
I46 USB2_DMA:G:L:S:0 MIL:30 3 MIL 480 MHZ 32C1<> 33B7<
USB2_DAP_F :::500 50 8 MIL SPACING 3.5 USB2_DMA_DP MIN_DAISY_CHAIN
I47 USB2_DMA:G:L:S:0 MIL:30 3 MIL 480 MHZ 32C1<> 33B7<
USB2_DBN_F :::500 50 8 MIL SPACING 3.5 USB2_DMB_DP MIN_DAISY_CHAIN
I48 USB2_DMB:G:L:S:0 MIL:20 3 MIL 480 MHZ 32C1<> 33C7<
USB2_DBP_F :::500 50 8 MIL SPACING 3.5 USB2_DMB_DP MIN_DAISY_CHAIN
I50 USB2_DMB:G:L:S:0 MIL:20 3 MIL 480 MHZ 32C1<> 33C7<
USB2_DCN_F :::500 50 8 MIL SPACING 3.5 USB2_DMC_DP MIN_DAISY_CHAIN
I49 USB2_DMC:G:L:S:0 MIL:20 3 MIL 480 MHZ 32C1<> 33D7<
USB2_DCP_F :::500 50 8 MIL SPACING 3.5 USB2_DMC_DP MIN_DAISY_CHAIN
I51 USB2_DMC:G:L:S:0 MIL:20 3 MIL 480 MHZ 32C1<> 33D7<
USBT_DAN_F :::3000 2000 8 MIL SPACING 3.5 USB2_DMAT_DP MIN_DAISY_CHAIN
I52 USB2_DMAT:G:L:S:04 MIL:60 MIL 480 MHZ 33B6<>
USBT_DAP_F :::3000 2000 8 MIL SPACING 3.5 USB2_DMAT_DP MIN_DAISY_CHAIN
I53 USB2_DMAT:G:L:S:04 MIL:60 MIL 480 MHZ 33B6<>
USBT_DBN_F :::3000 2000 8 MIL SPACING 3.5 USB2_DMBT_DP MIN_DAISY_CHAIN
I55 USB2_DMBT:G:L:S:04 MIL:60 MIL 480 MHZ 33C6<>
USBT_DBP_F :::3000 2000 8 MIL SPACING 3.5 USB2_DMBT_DP MIN_DAISY_CHAIN
I54 USB2_DMBT:G:L:S:04 MIL:60 MIL 480 MHZ 33C6<>
USBT_DCN_F :::3000 2000 8 MIL SPACING 3.5 USB2_DMCT_DP MIN_DAISY_CHAIN
I56 USB2_DMCT:G:L:S:04 MIL:60 MIL 480 MHZ 33D6<>
USBT_DCP_F :::3000 2000 8 MIL SPACING 3.5 USB2_DMCT_DP MIN_DAISY_CHAIN
I57 USB2_DMCT:G:L:S:04 MIL:60 MIL 480 MHZ 33D6<>
USB_DAN_CON :::750 50 8 MIL SPACING 3.5 USB2_CONA_DP MIN_DAISY_CHAIN
I58 USB2_CONA:G:L:S:02 MIL:30 MIL 480 MHZ 33C3<> 59C6>
USB_DAP_CON :::750 50 8 MIL SPACING 3.5 USB2_CONA_DP MIN_DAISY_CHAIN
I59 USB2_CONA:G:L:S:02 MIL:30 MIL 480 MHZ 33C3<> 59C6>
USB_DBN_CON :::750 50 8 MIL SPACING 3.5 USB2_CONB_DP MIN_DAISY_CHAIN
I60 USB2_CONB:G:L:S:02 MIL:30 MIL 480 MHZ 33B3<> 59C6>
USB_DBP_CON :::750 50 8 MIL SPACING 3.5 USB2_CONB_DP MIN_DAISY_CHAIN
I61 USB2_CONB:G:L:S:02 MIL:30 MIL 480 MHZ 33B3<> 59C6>
USB_DCN_CON :::750 50 8 MIL SPACING 3.5 USB2_CONC_DP MIN_DAISY_CHAIN
I63 USB2_CONC:G:L:S:02 MIL:30 MIL 480 MHZ 33D3<> 59C6>
USB_DCP_CON :::750 50 8 MIL SPACING 3.5 USB2_CONC_DP MIN_DAISY_CHAIN
I62 USB2_CONC:G:L:S:0 MIL:30 MIL
2 480 MHZ 33D3<> 59C6>
SIGNAL CONSTRAINTS
A
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 56 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
DIGITAL SIGNALS DIGITAL SIGNALS
MIN_LINE_WIDTH MIN_LINE_WIDTH
GROUP GROUP RELATIVE_PROPAGATION_DELAY
SIG_NAME RELATIVE_PROPAGATION_DELAY
MAX_VIAS PROPAGATION_DELAY
STUB_LENGTH NET_SPACING_TYPE MAX_EXPOSED_LENGTH PULSE_PARAM SIG_NAME MAX_VIAS STUB_LENGTH NET_SPACING_TYPE MAX_EXPOSED_LENGTH PULSE_PARAM
NEW VSYNC* 3 L:S::1000 MIL 22C5<> NEW

STUFF ANALOG_VSYNC* 4 L:S::3500 MIL 22D7< 25C6<> 26B5< 59B8> STUFF
3 TMDS_CKP TMDS:G:L:S:0 MIL:120 MIL 3 70 8 MIL SPACING TMDS_CLK 23D1< 24B7<> 27C2< 59A8>
HERE HSYNC* L:S::1000 MIL 22C5<> HERE
I281
5 TMDS_CKM TMDS:G:L:S:0 MIL:120 MIL 3 70 8 MIL SPACING TMDS_CLK 23D1< 24A7<> 27C2< 59A8>
ANALOG_HSYNC* L:S::3500 MIL 22D7< 25D6<> 26B5< 59B8>
I278
TMDS:G:L:S:0 MIL:120 MIL 8 MIL SPACING TMDS_D0
4 L:S::4000 MIL 10 MIL SPACING 5.8 TMDS_D0P 3 70 23D1< 24B7<> 27C2< 59B8>
ANALOG_BLU 200 22C7<> 25C6<
I277
TMDS:G:L:S:0 MIL:120 MIL TMDS_D0
4 L:S::4000 MIL 10 MIL SPACING 5.8 TMDS_D0M 3 70 8 MIL SPACING 23D1< 24B7<> 27C2< 59A8>
ANALOG_GRN 200 22C7<> 25C6<
I279
TMDS:G:L:S:0 MIL:120 MIL
4 L:S::4000 MIL
200 10 MIL SPACING 5.8 TMDS_D1P 3 70 8 MIL SPACING TMDS_D1 23D1< 24C7<> 27C2< 59B8>
ANALOG_RED 22C7<> 25B6<
I280
TMDS:G:L:S:0 MIL:120 MIL 3 70 8 MIL SPACING TMDS_D1
2 L:S::500 MIL 10 MIL SPACING 5.8 TMDS_D1M 23D1< 24C7<> 27C2< 59B8>
D
FILT_ANALOG_RED
FILT_ANALOG_GRN 2 L:S::500 MIL 10 MIL SPACING 5.8
25C5< 59B8>
25C5< 59B8>
I276
I274
TMDS_D2P TMDS:G:L:S:0
TMDS:G:L:S:0
MIL:120
MIL:120
MIL
MIL
3
3
70
70
8
8
MIL
MIL
SPACING
SPACING
TMDS_D2
TMDS_D2
23D1< 24D7<> 27C2< 59B8> D
2 L:S::500 MIL 10 MIL SPACING 5.8 TMDS_D2M 23D1< 24D7<> 27C2< 59B8>
FILT_ANALOG_BLU 25C5< 59B8>
I275
DAC2RSET L:S::1000 MIL 10 MIL SPACING 22C5<>

I282
GPU_TMDS_CKP GTMDS:G:L:S:0 MIL:120 MIL 3 50 8 MIL SPACING G_TMDS_CLK 23C2< 23D3<>
DAC2VREF L:S::1000 MIL 10 MIL SPACING GPU_TMDS_CKM GTMDS:G:L:S:0 MIL:120 MIL 3 50 8 MIL SPACING G_TMDS_CLK
22C5<> I284 23C2< 23D3<>
NV11_XTALIN 4 L:S::1000 MIL
100 8 MIL SPACING 27 MHZ 22B4<> I283
GPU_TMDS_D0P GTMDS:G:L:S:0 MIL:120 MIL 3 50 8 MIL SPACING G_TMDS_D0 23C2< 23D3<>
NV11_XTALOUT 4 L:S::1000 MIL
100 8 MIL SPACING 27 MHZ 22B4<> I285
GPU_TMDS_D0M GTMDS:G:L:S:0 MIL:120 MIL 3 50 8 MIL SPACING G_TMDS_D0 23C2< 23D3<>
I287
I286
I289
I288
I291
SI_TMDS_CKP STMDS:G:L:S:0 MIL:120 MIL 3 50 8 MIL SPACING S_TMDS_CLK 27C3<>
I290
SI_TMDS_CKM STMDS:G:L:S:0 MIL:120 MIL 3 50 8 MIL SPACING S_TMDS_CLK 27C3<>
I293
SI_TMDS_D0P STMDS:G:L:S:0 MIL:120 MIL 3 50 8 MIL SPACING S_TMDS_D0 27C3<>
I292
SI_TMDS_D0M STMDS:G:L:S:0 MIL:120 MIL 3 50 8 MIL SPACING S_TMDS_D0 27C3<>
I294
TCKP TMDSFILT:G:L:S:02 MIL:110 MIL 110 8 MIL SPACING TMDSFILT_CLK 24C4<> I295
TCKM TMDSFILT:G:L:S:02 MIL:110 MIL 110 8 MIL SPACING TMDSFILT_CLK 24C3<> I296
TD0P TMDSFILT:G:L:S:02 MIL:110 MIL 110 8 MIL SPACING TMDSFILT_D0 24C3<> I297
TD0M TMDSFILT:G:L:S:02 MIL:110 MIL 110 8 MIL SPACING TMDSFILT_D0 24C4<>
TMDSFILT:G:L:S:02 MIL:110 MIL 110 8 MIL SPACING TMDSFILT_D1 DVOD0 TMDS_XMIT:G:L:S:0 MIL:400 MIL 200 165MHZ
TD1P 24C4<> I299 22C5<> 27A8< 27C5<
DVOD1 TMDS_XMIT:G:L:S:0 MIL:400 MIL 200 165MHZ 22C5<> 27A8< 27C5<
I300
TMDS_XMIT:G:L:S:0 MIL:400 MIL 200 165MHZ
DVOD2 22C5<> 26D1< 27C5<
TD2P TMDSFILT:G:L:S:02 MIL:110 MIL 110 8 MIL SPACING TMDSFILT_D2 24C3<>
I298
DVOD3 22B5<> 26D1< 27C5<
I302
I301
DVOD4 22B5<> 27A8< 27C5<
DVOD5 TMDS_XMIT:G:L:S:0 MIL:400 MIL 200 165MHZ 22B5<> 27A8< 27C5<
C ENET_LINK_TX_EN
ENET_LINK_TX_ER
4
4
L:S::1000 MIL
L:S::1000 MIL
25
25
MHZ
MHZ
34D6<>
I303
I304
DVOD6 TMDS_XMIT:G:L:S:0 MIL:400 MIL 200 165MHZ 22B5<> 27A8< 27C5< C
34D6<> DVOD7 TMDS_XMIT:G:L:S:0 MIL:400 MIL 200 165MHZ 22B5<> 27A8< 27C5<
ENET_LINK_TXD<0..3> 4 L:S::1000 25 MHZ 34C6<>
I305
TMDS_XMIT:G:L:S:0 MIL:400 MIL 200
DVOD8 165MHZ 22B5<> 26B1< 27C5<
ENET_PHY_TX_EN 4 L:S::5600 MIL 25 MHZ 34D7< 35C6<
I307
DVOD9 22B5<> 27A8< 27C5<
ENET_PHY_TX_ER 4 L:S::5600 MIL 25 MHZ 34D7< 35C6<
I306
DVOD10 22B5<> 27A8< 27B5<
ENET_PHY_TXD<0..3> 4 L:S:4600:5600 25 MHZ 34C7< 35C6<>
I308
DVOD11 22B5<> 27A8< 27B5<
CLKENET_LINK_TX 4 L:S:4600 MIL:5600 MIL 25 MHZ 34D7< 35C8<
I309
CLKENET_PHY_TX 4 L:S::1000 MIL 25 MHZ 35C6<>

CLKENET_LINK_RX 4 L:S:4600 MIL:5600 MIL 25 MHZ 34C7< 35C8<
CLKENET_PHY_RX 4 L:S::1000 MIL 25 MHZ 35C6<>
ENET_PHY_RXD<0..3> 4 L:S::1000 25 MHZ 35B6<> 35C6<>
ENET_PHY_RX_DV 4 L:S::1000 MIL 25 MHZ 35B6<>
ENET_PHY_RX_ER 4 L:S::1000 MIL 25 MHZ 35B6<>
ENET_PHY_CRS 4 L:S::1000 MIL 25 MHZ 35B6<>
ENET_PHY_COL 4 L:S::1000 MIL 25 MHZ 35B6<>
ENET_LINK_RXD<0..3> 4 L:S:4600:5600 25 MHZ 34C7< 35B8< 35C8<
ENET_CRS 4 L:S:4600 MIL:5600 MIL 25 MHZ 34C7< 35B8<
ENET_COL 4 L:S:4600 MIL:5600 MIL 25 MHZ 34B7< 35B8<
ENET_RX_DV 4 L:S:4600 MIL:5600 MIL 25 MHZ 34C7< 35B8<
ENET_RX_ER 4 L:S:4600 MIL:5600 MIL 25 MHZ 34C7< 35B8<
3 8 MIL SPACING 25 MHZ 35B6<
CLK25M_ENET_XIN L:S::1000 100
MIL
CLK25M_ENET_XOUT 3 100 8 MIL SPACING 25 MHZ 35B6<>
L:S::1000 MIL
ENET_TDP ETHTD:G:L:S:0 MIL:70

3 MIL
L:S::4000 MIL
3150 10 MIL SPACING ETH_TXD 100 MHZ 35C3<>
ENET_TDN ETHTD:G:L:S:0 3
MIL:70 MIL
L:S::4000 MIL
3150 10 MIL SPACING ETH_TXD 100 MHZ 35C3<>
ENET_RDP ETHRD:G:L:S:0 3
MIL:70 MIL
L:S::4000 MIL
3150 10 MIL SPACING ETH_RXD 100 MHZ 35C3<>
B ENET_RDN ETHRD:G:L:S:0
RJTXD:G:L:S:0
3
MIL:70
MIL:70
2
MIL
L:S::4000
MIL
L:S::750
MIL
3150
MIL
10 MIL SPACING
2KV_ISO
ETH_RXD
RJ45_TXD
100
100
MHZ
MHZ
35C3<> B
RJ45_TXP 35C1<>
RJ45_TXN RJTXD:G:L:S:0 2
MIL:70 MIL
L:S::750 MIL 2KV_ISO RJ45_TXD 100 MHZ 35C1<>
RJ45_RXP RJRXD:G:L:S:0 2
MIL:70 MIL
L:S::750 MIL 2KV_ISO RJ45_RXD 100 MHZ 35C1<>
RJ45_RXN RJRXD:G:L:S:0 2
MIL:70 MIL
L:S::750 MIL 2KV_ISO RJ45_RXD 100 MHZ 35C1<>
RJ45_TREF 2KV_ISO 35C2<>

RJ45_RREF 2KV_ISO 35C2<>
RJ45_4_5 2KV_ISO 35C1<>
RJ45_7_8 2KV_ISO 35C1<>
RJ45_F_TREF 2KV_ISO 35B2<
FW_LINK_DATA<0..7> 4 L:S::1000 34C4<>

FW_LINK_CNTL<0..1> 4 L:S::1000 49.152 MHZ 34C4<>
FW_LINK_LREQ 4 L:S::1000 MIL 49.152 MHZ 34C4<>
FW_SCLK 4 L:S:3500 MIL:4500 MIL 49.152 MHZ 34C5<> 36C8<
FW_D<0..7> 4 L:S:3700:4700 49.152 MHZ 34C3< 36B8< 36C8<
FW_CNTL0 4 L:S:3700 MIL:4700 MIL 49.152 MHZ 34C3< 36C8<
FW_CNTL1 4 L:S:3700 MIL:4700 MIL 49.152 MHZ 34C3< 36C8<
FW_LREQ 4 L:S:3700 MIL:4700 MIL 49.152 MHZ 34C3< 36C8<
FW_PHY_SCLK 4 L:S::500 MIL 49.152 MHZ 36C7<>
FW_PHY_CNTL0 4 L:S::1000 MIL 49.152 MHZ 36C7<>
FW_PHY_CNTL1 4 L:S::1000 MIL 49.152 MHZ 36C7<>
FW_PHY_D<0..7> 4 L:S::1000 49.152 MHZ 36B7<> 36C7<>
FW_XI 3 L:S::1000 MIL
100 8 MIL SPACING 24.576 MHZ 36C6<
FW_XO 3 L:S::1000 MIL
100 8 MIL SPACING 24.576 MHZ 36C6<>
FW_BIAS1 36C5<>
FW_BIAS2 36C5<>
FW_TPA1P FWTPA1:G:L:S:0 MIL:50L:S::1220

3 MIL MIL
5000 FW_TPA1 400 MHZ 36C5<>
FW_TPA1N FWTPA1:G:L:S:0
FWTPB1:G:L:S:0
MIL:50L:S::1220
3 MIL
MIL:50L:S::1220
3 MIL
MIL
5000
MIL
FW_TPA1
FW_TPB1
400
400
MHZ
MHZ
36C5<> SIGNAL CONSTRAINTS
A FW_TPB1P
FW_TPB1N
FW_TPA2P
FWTPB1:G:L:S:0
FWTPA2:G:L:S:0
MIL:50
3 MIL
L:S::1220
MIL:50L:S::1220
3 MIL
5000
MIL
5000
MIL
5000
FW_TPB1
FW_TPA2
400
400
MHZ
MHZ
36C5<>
36C5<>
A
36C5<>
FW_TPA2N FWTPA2:G:L:S:0 MIL:50
3 MIL
L:S::1220 MIL
5000 FW_TPA2 400 MHZ 36C5<> LAST_MODIFIED=Wed Sep 17 12:12:40 2003
FW_TPB2P FWTPB2:G:L:S:0 MIL:50L:S::1220
3 MIL 5000
MIL FW_TPB2 400 MHZ 36C5<> THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
FWTPB2:G:L:S:0 MIL:50L:S::1220
3 MIL MIL 400 MHZ PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
FW_TPB2N 5000 FW_TPB2 36C5<> AGREES TO THE FOLLOWING
FW_TPO1P FWTPO1:G:L:S:0 MIL:50L:S::1220
3 MIL MIL
5000 FW_TPO1 400 MHZ 36B8<> 36D1<>
FW_TPO1N FWTPO1:G:L:S:0 MIL:50L:S::1220
3 MIL MIL
5000 FW_TPO1 400 MHZ 36A8<> 36D1<>
FW_TPI1P FWTPL1:G:L:S:0 MIL:50L:S::1220
3 MIL MIL
5000 FW_TPL1 400 MHZ 36A8<> 36D1<>
FW_TPI1N FWTPL1:G:L:S:0 MIL:50
3 MIL
L:S::1220 5000
MIL FW_TPL1 400 MHZ 36A8<> 36D1<>
FW_TPO2P FWTPO2:G:L:S:0 MIL:50L:S::1220
3 MIL 5000
MIL FW_TPO2 400 MHZ 36A8<> 36C1<>
FWTPO2:G:L:S:0 MIL:50L:S::1220
MIL SIZE DRAWING NUMBER REV.
FW_TPO2N 3 MIL
5000 FW_TPO2 400 MHZ 36A8<> 36C1<>
FW_TPI2P FWTPL2:G:L:S:0 MIL:50L:S::1220
3 MIL 5000
MIL FW_TPL2 400 MHZ
FW_TPI2N FWTPL2:G:L:S:0 MIL:50L:S::1220
3 MIL 5000
MIL FW_TPL2 400 MHZ
36A8<>
36A8<>
36C1<>
36C1<>
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 57 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
DIGITAL SIGNALS (CONT’D)

MAX_VIAS STUB_LENGTH MAX_EXPOSED_LENGTH
GROUP SIG_NAME RELATIVE_PROPAGATION_DELAY PROPAGATION_DELAY NET_SPACING_TYPE PULSE_PARAM
CD DRIVE BUS I17
EIDE_RST_L L:S:3500 MIL:5500 MIL 33 MHZ 37A7> 37D5<
I18
EIDE_DMACK_L L:S:3500 MIL:5500 MIL 33 MHZ 37A7<> 37D5<
I19
EIDE_STOP L:S::5500 MIL 33 MHZ 37A7> 37D5<
EIDE_HSTB_RDY L:S::5500 MIL 33 MHZ 37A7> 37C5<
D
I20
I21
EIDE_DSTB_RDY L:S:3500 MIL:5500 MIL
L:S:3500:5500
33
33
MHZ 37A7< 37C5<
MHZ 37A5< 37B5< 37B7<> 37C5<
D
I22
EIDE_DATA<0..15>
I23
CD_RESET_L L:S::1000 MIL 33 MHZ 37D4< 38C6<>
I24
CD_DMACK_L L:S::4000 MIL 33 MHZ 37D4< 38C6<>
I25
CD_STOP L:S::5000 MIL 33 MHZ 37D4< 38C6<>
I26
CD_HSTB_RDY L:S::5000 MIL 33 MHZ 37C4< 38C6<>
I27
CD_DSTB_RDY L:S::1000 MIL 33 MHZ 37C4< 38C6<>
I28
UATAD<0..15> L:S::1000 33 MHZ 37A4< 37B4< 37C4< 38C6<>
I29
CD_DMARQ L:S::1000 MIL 33 MHZ 38C6<>
I30
EIDE_DMARQ L:S:3500 MIL:5500 MIL 33 MHZ 37A7< 38C8<
I31
UATA0IRQ L:S::1000 MIL 33 MHZ 38C6<>
I32
EIDE_INTRQ L:S:3500 MIL:5500 MIL 33 MHZ 37A7< 38C8<
CD_EIDE_ADDR<0..2> L:S::1000 33 MHZ 38C6<>
I33
EIDE_ADDR<0..2> L:S:3500:5500 33 MHZ 37B7> 38A8< 38B8<
I34
CD_CS1FX_L L:S::1000 MIL 33 MHZ 38C6<>
I35
EIDE_CS1FX_L L:S:3500 MIL:5500 MIL 33 MHZ 37A7> 38B8<
I36
CD_CS3FX_L L:S::1000 MIL 33 MHZ 38C6<>
I37
EIDE_CS3FX_L L:S:3500 MIL:5500 MIL 33 MHZ 37A7> 38B8<
I38
HD DRIVE BUS
UIDE_RST_L L:S:100 MIL:6000 MIL
I39 HD_DATA:G:L:S:0 MIL:5500 MIL
500 100 MHZ 37C7<> 37D3<
UIDE_DMACK_L HD_DATA:G:L:S:0 L:S:100 MIL:6000
MIL:5500 MIL
500
MIL
100 MHZ 37C7<> 37D3<
I40
UIDE_DIOR_L HD_DATA:G:L:S:0 L:S:100 MIL:6000
MIL:5500 MIL
MIL
100 MHZ 37C7<> 37D3<
I41
UIDE_DIOW_L HD_DATA:G:L:S:0 L:S::6000 MIL
MIL:5500 MIL 100 MHZ 37C3< 37C7<>
I42
UIDE_IOCHRDY HD_DATA:G:L:S:0 L:S:100 MIL:6000
MIL:5500 MIL
500
MIL 100 MHZ
37C3< 37C7<
I43
UIDE_DATA<0..15> L:S:100:6000
I44 HD_DATA:G:L:S:0:5500 100 MHZ 37A3< 37B3< 37C3< 37C7<> 37D7<>
HD_RESET_L L:S::1000 MIL 100 MHZ 37D1< 38C3<>
I45
HD_DMACK_L L:S::1000 MIL 100 MHZ
C I46
I47
HD_DIOR_L L:S::5500 MIL 100 MHZ
37D1< 38C3<>
37D1< 38C3<>
SIG_NAME PROPAGATION_DELAY
PULSE_PARAM C
HD_DIOW_L L:S::55000 MIL 100 MHZ T_UD_IDEDD_0 L:S::1000 MIL 100 MHZ
37C1< 38C3<>
37C1< 38C3<> I1
I48
HD_IOCHRDY 100 MHZ T_UD_IDEDD_1 L:S::1000 MIL 100 MHZ
I49 L:S::1000 MIL 37C1< 38C3<>
I2 37C1< 38C3<>
HD_DMARQ L:S::1000 MIL 100 MHZ T_UD_IDEDD_2 L:S::1000 MIL 100 MHZ
37C1< 38C3<>
38C3<> I3
I50
UIDE_DMARQ HD_DATA:G:L:S:0 MIL:5500
L:S:100 MIL:6000
MIL MIL 100 MHZ
37C7<> 38C4< T_UD_IDEDD_3 L:S::1000 MIL 100 MHZ
I51
100 MHZ I4 37C1< 38C3<>
HD_INTRQ L:S::1000 500
MIL 38C3<>
I52
UIDE_INTRQ HD_DATA:G:L:S:0 MIL:5500
L:S:100 MIL:6000
MIL MIL T_UD_IDEDD_4 L:S::1000 MIL 100 MHZ
37B1< 38C3<>
I53 100 MHZ 37C7< 38C4< I5
HD_UIDE_ADDR<0..2> 100 MHZ T_UD_IDEDD_5 L:S::1000 MIL 100 MHZ
I54 L:S::1000 38C2<> 38C3<> 37B1< 38C3<>
HD_DATA:G:L:S:0:5500
UIDE_ADDR<0..2> L:S:100:6000 100 MHZ I6
37C7<> 38A4< 38B4<
I55
HD_UIDE_CS1FX_L 100 MHZ T_UD_IDEDD_6 L:S::1000 MIL 100 MHZ
37B1< 38C3<>
I56 L:S::6000 MIL 38C3<> I7
UIDE_CS1FX_LHD_DATA:G:L:S:0 MIL:5500
L:S::6000MIL
MIL 100 MHZ
37C7<> 38B4< T_UD_IDEDD_7 L:S::1000 MIL 100 MHZ
I57
100 MHZ I8 37B1< 38C3<>
HD_UIDE_CS3FX_L L:S::6000 MIL 38C2<>
I58
UIDE_CS3FX_LHD_DATA:G:L:S:0 MIL:5500
L:S::6000MIL
MIL 100 MHZ T_UD_IDEDD_8 L:S::1000 MIL 100 MHZ
37B1< 38C2<>
37C7<> 38B4< I9
I59
T_UD_IDEDD_9 L:S::1000 MIL 100 MHZ
37B1< 38C2<>
I10
I60
CLK_18M_INT_XOUT 3 L:S::1000 100
L:S::1000
8 MIL SPACING 18.432 MHZ 58B5>
CLK_18M_INT_XOUT 3 100 8 MIL SPACING 18.432 MHZ 58B5> I11 37B1< 38C2<>
I61
L:S::200 50 8 MIL SPACING T_UD_IDEDD_11 L:S::1000 MIL 100 MHZ
37B1< 38C2<>
I62
CLK_18M_INT_XOUT 3 18.432 MHZ 58B5> I12

37B1< 38C2<>
I14
USB_DAP USBA:G:L:S:0 MIL:500 MIL 28A3< 28B3<>
I63 T_UD_IDEDD_13 L:S::1000 MIL 100 MHZ
37A1< 38C2<>
I64
USB_DAN USBA:G:L:S:0 MIL:500 MIL 28A3< 28B3<> I13
USB_DAP_F 100 T_UD_IDEDD_14 L:S::1000 MIL 100 MHZ

I65 USBA_F:G:L:S:0 MIL:500 MIL 28B2< 33B7< 37A1< 38C2<>
USB_DAN_F 100 I16
I66 USBA_F:G:L:S:0 MIL:500 MIL 28B2< 33B7< T_UD_IDEDD_15 L:S::1000 MIL 100 MHZ
USB_DBP USBB:G:L:S:0 MIL:500 MIL 28A3< 28B3<> I15 37A1< 38C2<>
I67
USB_DBN USBB:G:L:S:0 MIL:500 MIL
B I68
USB_DBP_F USBB_F:G:L:S:0 MIL:500 MIL 100

28A3< 28B3<>
28B2< 33C7
USB_DCN USBC:G:L:S:0 MIL:500 MIL
I72 28A3< 28B3<>
USB_DCP_F USBC_F:G:L:S:0 MIL:500 MIL 100
I73 28B2< 33D7<
USB_DCN_F USBC_F:G:L:S:0 MIL:500 MIL 100
I74 28B2< 33D7<
USB_DEP USBE:G:L:S:0 MIL:500 MIL
I75 28B3<>
USB_DEN USBE:G:L:S:0 MIL:500 MIL
I77 28B3<>
BT_USB_DP USBE_F:G:L:S:0 MIL:500 MIL 100
I78 28B2< 29D3<> 59B6>
BT_USB_DM USBE_F:G:L:S:0 MIL:500 MIL 100
I79 28B2< 29D3<> 59B6>
USB_DFP USBF:G:L:S:0 MIL:500 MIL
I80 28B3<>
USB_DFN USBF:G:L:S:0 MIL:500 MIL
I81 28B3<>
I82
MODEM_USB_DP USBF_F:G:L:S:0 MIL:500 MIL 100 28B2< 29C5<> 59B6>
MODEM_USB_DM USFE_F:G:L:S:0 MIL:500 MIL 100 28B2< 29C5<> 59B6>
I83
PMU_XO 3 L:S::1000 MIL

100 8 MIL SPACING 10 MHZ
I76 44B5<
I85
PMU_XI 3 L:S::1000 MIL
100 8 MIL SPACING 10 MHZ 44B5<
I86
PMU_XT 3 L:S::300 MIL
50 8 MIL SPACING 10 MHZ 44A6<
I87
PMU_CLKOUT 3 L:S::1000 MIL
100 8 MIL SPACING 32.768 MHZ 44B4<>
I88
PMU_CLKIN 3 L:S::1000 MIL
I84
PMU_CLKT 3 L:S::300 MIL
MICSHLD 10 MIL SPACING
I89
MICHIGH 10 MIL SPACING
29A5<> 43A8< 59A8>
SIGNAL CONSTRAINTS
A I90
I91
MICLOW 10 MIL SPACING
29A5<> 43B8< 59A8>
29A5<> 43A8< 59A8> A
I92
KS_INT_SPKR+ 10 MIL SPACING 29A3< 43D7< 59B8>
KS_INT_SPKR- 10 MIL SPACING LAST_MODIFIED=Wed Sep 17 12:12:41 2003
I93 29A3< 42B4< 43D7< 59B8> THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 58 69
8 7 6 5 4 3 2 1 DRAWING
<XR_PAGE_TITLE>
8 7 6 5 4 3 2 1
FUNC_TEST FUNC_TEST
+1_8V_MAIN
52C1> 51D7<> 51C3<
52C4 OUT COMM_SHUTDOWN
29D7<> 28D1< 28C5<> OUT
51B7< 51A7< 51A5< 50D5<> 50D2<
50C4<> 50B4<> 49D7<> 49D3<> 49C4<> +12V_MAIN MON_DETECT
45B4<> 44D8< 42B3< 39C8< 36D8< OUT 25C6< 23D7<> OUT
48D6<> 48C8<> 48C4<> 45D7< 45D3<>
+12V_SLEEP FLO_KNOWS_BEST
51A5< 50D5< 29C5<> 29A8< 29A3< OUT 45C8<> 45C7<> OUT
52C1> 51D6<> 51C2<
+12V_SLEEPA FUNC_TEST NMI_BUTTON*
OUT 44C4<> 29B2<> OUT
+5V_MAIN PWR_SWITCH*
52C4 51B4<> OUT 59D6> 44C5<> 44B1< 8A8<> OUT
+5V_SLEEP PMU_RST*
51C5<> 50D5< 46D6<> 46C7< 38C1< 44B5<> 44A5<> 29B3<> 8A8<>
D 51C8<
52C4 49B2<> 30B3<
+2_5V_MAIN
OUT
OUT 44A4<
PMURESETBUTTON*
OUT
OUT
D
+3V_MAIN PWR_SWITCH*
42B5< 41A7< 41A5< 40D5< 39D4< OUT 59D6> 44C5<> 44B1< 8A8<> OUT
52C4 43C7< 42C8< 42B7<
CPU_VCORE_SLEEP PWR_UP
52C6> 45D2<> 8C1< 8B7< 4D7< 4D3< OUT 51C6< 50C8< 50C3< 42D8< 39C8< OUT
59B6>
JTAG_ASIC_TCK POWER_UP*
35C4< 34B7< 8A4<> OUT 51A8< 44C7<> OUT
JTAG_ASIC_TDI RESET_BUTTON*
34B7< 28C6< 8A4<> OUT 44C4<> 29B2<> OUT
JTAG_ASIC_TDO COMM_RING_DET_L
35B4<> 8A4<> OUT 44C5<> 29C5<> 28B8< 28B5<> OUT
JTAG_ASIC_TMS ROM_ONBOARD_CS_L
35B4<> 35A2< 34B7< 8A4<> OUT 31B4<> 30B2< OUT
JTAG_ASIC_TRST_L COMM_DTR_L
34B7< 8A4<> OUT 29C7<> 28C3> OUT
INT_TMDS_3V COMM_TXD_L
52A6> 24C3<> OUT 29C7<> 28C3<> OUT
+1_5V_AGP COMM_TRXC
16D7< 16C2< 16A8< 11A6< 10D6<
52C3> 46B4<> 17D5< 17A4< 17A3<
FAN_12V_FILT
OUT 29C7<> 28D3< 28C3<>
COMM_RTS_L
OUT FUNC_TEST
52B3> 29A5<> OUT
29D5<> 28C3> OUT 53A6< 32C6<> 31C7< 30D4<> 30C2< PCI_AD<0> OUT
+INTREPID_CORE_MAIN
47B2<> 46B3< 11D3< 10D6< OUT COMM_RXD
29C5<> 28C3<> OUT 54C7< 31C6< 31B3<> PCIT_AD<1> OUT
INTREPID_VSENSE
47C6<> OUT COMM_GPIO_L
29C5<> 28D3< 28C3<> OUT 54C7< 31C6< 31B2<> PCIT_AD<2> OUT
OVDD_ADJ FUNC_TEST
OUT SLEEP
50C2< 44B5<> OUT 54C7< 31C6< 31B3<> PCIT_AD<3> OUT
CPU_CHKSTP_OUT_L
8D5<> 8A3<> 7B5< 4B3> OUT CPU_SRESET_L
8A3<> 7A5< 4B3< OUT 53A6< 32C6<> 31C7< 30D4<> 30C2< PCI_AD<4> OUT
CPU_CHKSTP_IN_L
7B5< 4B3< OUT PMU_AVCC
52B3> 44D4<> 44B5< OUT 54C7< 31C6< 31B3<> PCIT_AD<5> OUT
CPU_HRESET_L
44C2< 8A3<> 7B3< 7A5< 7A3< 4B3< OUT TMDS_DDC_CLK
44D2< 24B3<> OUT 53A6< 32C6<> 31C7< 30D4<> 30C2< PCI_AD<6> OUT
JTAG_CPU_TCK
TMDS_DDC_DAT
C 8A3<> 7D5< 4C3<
8A3<> 7A5< 4C3<

JTAG_CPU_TDI
OUT
24B4<>
USB_DCN_CON
OUT 54C7< 31C6< 31B3<> PCIT_AD<7> OUT C
OUT PCIT_AD<8>
56A3> 33D3<> OUT 54C7< 31C6< 31B3<> OUT
JTAG_CPU_TDO
8A3<> 4C3> OUT USB_DCP_CON
56A3> 33D3<> OUT 53A6< 32C6<> 31C7< 30D4<> 30C2< PCI_AD<9> OUT
JTAG_CPU_TMS
8A3<> 7A5< 4C3< OUT USB_DBN_CON
56A3> 33B3<> OUT 54C7< 31C6< 31B3<> PCIT_AD<10> OUT
JTAG_CPU_TRST_L
8A3<> 7C5< 4C3< OUT USB_DBP_CON
56A3> 33B3<> OUT 53A6< 32C6<> 31C7< 30C4<> 30B2< PCI_AD<11> OUT
52C6> 46D4< 45D2<> 44D2< 44D1< +MAXBUS_SLEEP
7C7< 7C5< 7C3< 7B3< 7A3< 6D6< 6C5< 4D5< OUT USB_DAN_CON
44B7< 9D8< 9B7< 8D4< 8D1< 8A3<> 56A3> 33C3<> OUT 54C7< 31C6< 31B3<> PCIT_AD<12> OUT
ROM_CS_L
31B4<> 30C6< 30B4< OUT USB_DAP_CON
56A3> 33C3<> OUT 53A6< 32C6<> 31C7< 30C4<> 30B2< PCI_AD<13> OUT
ROM_OE_L
31B2<> 30C6< 30B2< OUT BT_USB_DP
58B5> 29D3<> 28B2< OUT 54C7< 31C6< 31C3<> PCIT_AD<14> OUT
ROM_RW_L
31B4<> 30B6< 30B2< OUT BT_USB_DM
58A5> 29D3<> 28B2< OUT 53A6< 32C6<> 31C7< 30C4<> 30B2< PCI_AD<15> OUT
DDC_VCC_3
52B6> 24B3<> OUT MODEM_USB_DP
58A5> 29C5<> 28B2< OUT 53A6< 32C6<> 31C7< 30C4<> 30B2< PCI_AD<16> OUT
DDC_VCC_5
52A6> 25C4< OUT MODEM_USB_DM
58A5> 29C5<> 28B2< OUT 54C7< 31C7< 31C3<> PCIT_AD<17> OUT
SND_HP_SENSE_L
41A5< 28B5<> OUT USB_PORT_PWR
52A3> 33D3<> 33C3<> 33B3<> 33A4<> OUT 53A6< 32C6<> 31C7< 30C4<> 30B2< PCI_AD<18> OUT
ANALOG_HSYNC*
57D5> 26B5< 25D6<> 22D7< OUT VGA_IIC_CLK
25C4<> OUT 54C7< 31C7< 31C3<> PCIT_AD<19> OUT
ANALOG_VSYNC*
57D5> 26B5< 25C6<> 22D7< OUT VGA_IIC_DAT
25C4<> OUT 53A6< 32C6<> 31C6< 30C4<> 30B2< PCI_AD<20> OUT
FILT_ANALOG_BLU
57D5> 25C5< OUT CPU_VCORE_SLEEP
59D8> 52C6> 45D2<> 8C1< 8B7< 4D7< 4D3< OUT 54C7< 31C6< 31C3<> PCIT_AD<21> OUT
FILT_ANALOG_RED
57D5> 25C5< OUT LINE_IN_COM
40B7<> OUT 53A6< 32C6<> 31C6< 30C4<> PCI_AD<22> OUT
FILT_ANALOG_GRN
57D5> 25C5< OUT LINE_IN_R
40B7<> 40B6<> OUT 54C7< 31C6< 31C3<> PCIT_AD<23> OUT
GND
OUT LINE_IN_SENSE
40C7<> 40B7<> 53A6< 32C6<> 31B6< 30C4<> 30C1<> PCI_AD<24>
B 58A5> 43D7< 29A3<
KS_INT_SPKR+
OUT
40C7<> 40B7<>
LINE_IN_L
OUT
OUT 54C7< 31C3<> 31B6< PCIT_AD<25>

OUT
OUT
B
KS_INT_SPKR-
58A5> 43D7< 42B4< 29A3< OUT SND_LIN_SENSE_L
40D4< 28B5<> OUT 53A6< 32B6<> 31B6< 30C4<> 30C1<> PCI_AD<26> OUT
TMDS_D2P
57D2> 27C2< 24D7<> 23D1< OUT OUT_R FUNC_TEST
OUT 54C7< 31C3<> 31B6< PCIT_AD<27> OUT
TMDS_D2M
57D2> 27C2< 24D7<> 23D1< OUT LINEOUT_COMM2 FUNC_TEST
TMDS_D1P
57D2> 27C2< 24C7<> 23D1< OUT LINE_OUT_L FUNC_TEST
TMDS_D1M
57D2> 27C2< 24C7<> 23D1< OUT PCIT_IRDY_L
54C7< 31C3<> 31B6< OUT 53A6< 32B6<> 31B6< 30C4<> 30C1<> PCI_AD<30> OUT
TMDS_D0P
57D2> 27C2< 24B7<> 23D1< OUT RF_CLKRUN_L
31C3<> OUT 54C7< 31C3<> 31B6< PCIT_AD<31> OUT
TMDS_D0M
57D2> 27C2< 24B7<> 23D1< OUT NC_RF_DISABLE_L FUNC_TEST
TMDS_CKP OUT
57D2> 27C2< 24B7<> 23D1< OUT PCI_DEVSEL_L
TMDS_CKM 54D7< 32B6<> 31B7< 30C5<> 30B7< OUT
57D2> 27C2< 24A7<> 23D1< OUT PCI_STOP_L
INV_CUR_HI_FILT 54D7< 32B6<> 31B7< 30C5<> 30B7< OUT
29A5<> OUT PCI_TRDY_L
IO_RESET_L 54D7< 32B6<> 31B7< 30C5<> 30B7< OUT
44D3< 44B8<> 35B8< 32A6< OUT PCI_FRAME_L
KS5VSD 53A6< 32B6<> 31B7< 30C5<> 30B7< OUT
52B3> 29A5<> OUT PCI_PAR
INT_I2C_CLK2 54D7< 32B6<> 31B7< 30C5<> OUT
39B1<> 34B5< 29C7<> 28D1< 28A3<> OUT WL_PCI_IDSEL
INT_I2C_DATA2 31C2<> OUT
39B1<> 34B5< 29C7<> 28D1< 28A3<> OUT 33SLOTB_INT_L
INT_ANALYZER_CLK 31C2<> 28B7<> OUT
56B3> 54A7< 16C7< 9B4< 8A2< OUT PMU_PME_L
LAMP_STS_FILT 44B2<> 32A8< 31C2< 28B5<> OUT
29A5<>
LCD_PWM_FILT
OUT
PCI_SLOTB_GNT_L CONSTRINT TABLES
A 29A5<>
LED_5V_FILT
OUT
31C2<> 30D5<> 30B5<
54D7< 31C2<> 30D7< CLK33M_PCI_SLOTB

OUT

A
OUT
52B3> 29A5<> OUT PCI_SLOTB_REQ_L LAST_MODIFIED=Wed Sep 17 12:12:42 2003
LED_RET_FILT 31C3<> 30D5<> 30B7< OUT THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
52A3> 29A5<> OUT PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
MICSHLD 44C4<> 32A8< 31D4< 30B2< 17C8< MAIN_RESET_L OUT
58A5> 43A8< 29A5<> OUT I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
MICHIGH 53A6< 32B6<> 31B7< 30C5<> PCI_CBE<0> OUT II NOT TO REPRODUCE OR COPY IT
58A5> 43B8< 29A5<> OUT
MICLOW 54C7< 31C3<> 31B6< PCIT_CBE<1> OUT
58A5> 43A8< 29A5<> OUT
COMM_RESET_L 54C7< 31C3<> 31B6< PCIT_CBE<2> OUT
29D5<> 28C5<>
IIC_ADD
OUT
54C7< 31C3<> 31B6< PCIT_CBE<3> D 051-6497 13
29C6<> OUT
OUT APPLE COMPUTER INC.
UNUSED_GPIO15 SCALE SHT OF
ROM_WP_L 28C1< 28B5<>
30B2< OUT
OUT
NONE 59 69
8 7 6 5 4 3 2 1 DRAWING
8 7 6 5 4 3 2 1
*** Signal Cross-Reference for the entire design *** AGP_AD<19> 16C4<> 17C8< CD_STOP 37D4< 38C6<> 58D5> CPU_DATA<31> 5C4<> 8D7<> 9C1<> DDR_VREF 12A7< 14D2<> 14D8<> 15D8< 52A6> EXTINT14 28A8< 28B5<>
AGP_AD<20> 16C4<> 17C8< CHGND 24B3< 29A3< 43A7< 43B7< 52C4 CPU_DATA<32> 5C4<> 8D7<> 9B7< 9C1<> DS1P1 35B2< FAN_12V_FILT 29A5<> 52B3> 59C8>
+1_5V_AGP 10D6< 11A6< 16A8< 16C2< 16D7< AGP_AD<21> 16C4<> 17C8< CHOC_BROWNIE 51B2< CPU_DATA<33> 5C4<> 8D8<> 9B7< 9C1<> DS2P1 35B1< FBA<0> 18D8> 18F3<
17A3< 17A4< 17D5< 46B4<> 52C3> 59C8> AGP_AD<22> 16C4<> 17C8< CLK18M_INT_EXT 28B6<> CPU_DATA<34> 5C4<> 8D8<> 9B7< 9C1<> DS2_1 38B2< FBA<0..12> 55D3>
AGP_AD<23> 16C4<> 17C8< CLK18M_INT_XIN 28A5< CPU_DATA<35> 5C4<> 8D7<> 9B7< 9C1<> DS2_2 38B2<> FBA<1> 18D8> 18F3<
+1_5V_INTREPID_PLL 9D4< 16D6< 28D6<> 30D5< 52D3> AGP_AD<24> 16B4<> 17C8< CLK18M_INT_XO 28A6< CPU_DATA<36> 5C4<> 8D4<> 9A7< 9C1<> DS3P1 35B2< FBA<2> 18D8> 18F3<
+1_5V_INTREPID_PLL1 28C4< 52D3> AGP_AD<25> 16B4<> 17C8< CLK18M_INT_XOUT 28A5<> CPU_DATA<37> 5B4<> 8D5<> 9C1<> DS6_1 38B6< FBA<3> 18D8> 18F3<
+1_5V_INTREPID_PLL2 28D4< 52D3> AGP_AD<26> 16B4<> 17C8< CLK25M_ENET_XIN 35B6< 57B5> CPU_DATA<38> 5B4<> 8D5<> 9C1<> DS6_2 38B6<> FBA<4> 18D8> 18F3<
+1_5V_INTREPID_PLL3 28D4< 52D3> AGP_AD<27> 16B4<> 17C8< CLK25M_ENET_XOUT 35B6<> 57B5> CPU_DATA<39> 5B4<> 8D5<> 9C1<> DUKE_BD 45B5< FBA<5> 18D8> 18F3<
+1_5V_INTREPID_PLL4 28D4< 52D3> AGP_AD<28> 16B4<> 17C8< CLK27M_MEM_SS 22A6<> CPU_DATA<40> 5B4<> 6C4< 8D7<> 9C1<> DVOCLKIN 22C5< FBA<6> 18D8> 18E3<
+1_5V_INTREPID_PLL5 16D5< 52D3> AGP_AD<29> 16B4<> 17C8< CLK33M_PCI_SLOTB 30D7< 31C2<> 54D7< 59A6> CPU_DATA<41> 5B4<> 6C4< 8C4<> 9C1<> DVOCLKOUT 22C5> 27B5< FBA<7> 18D8> 18E3<
D +1_5V_INTREPID_PLL6 30D4< 52D3>

+1_5V_INTREPID_PLL7 9D2< 52D3>
AGP_AD<30>
AGP_AD<31>
16B4<> 17C8<
16B4<> 17C8<
CLK33M_PCI_SLOTB_UF 30D5<> 54D7<
CLK33M_PCI_SLOTC_UF 30D5<> 54D7<
CPU_DATA<42>
CPU_DATA<43>
5B4<> 6C4< 8C5<> 9B1<>
5B4<> 6C4< 8C4< 9B1<>
DVOCLKOUT*
DVOD0
22C5<> 27B6<
22C5<> 27A8< 27C5< 57C2>
FBA<8>
FBA<9>
18D8> 18E3<
18D8> 18E3<
D
+1_5V_INTREPID_PLL8 28D4< 52D3> AGP_AD_STB<0> 16A4<> 16B3< 17B8< 54C7< CLK33M_PCI_SLOTD 30D7< 32A6< 54A7< CPU_DATA<44> 5B4<> 6C4< 8C8<> 9B1<> DVOD1 22C5<> 27A8< 27C5< 57C2> FBA<10> 18D8> 18E3<
+1_8V_MAIN 52C4 59D8> AGP_AD_STB<1> 16A4<> 16B3< 17B8< 54C7< CLK33M_PCI_SLOTD_UF 30D5<> 54D7< CPU_DATA<45> 5B4<> 6C4< 8C7<> 9B1<> DVOD2 22C5<> 26D1< 27C5< 57C2> FBA<11> 18C8> 18E3<
+2_5V_MAIN 30B3< 49B2<> 52C4 59D8> AGP_AD_STB_GPUUF<0> 17B6< 54B7< CLK66M_GPU_AGP 16D8< 17C7< 54A7< CPU_DATA<46> 5B4<> 6C4< 8C4<> 9B1<> DVOD3 22B5<> 26D1< 27C5< 57C2> FBA<12> 18C8> 18E3<
+3.3VFPD 24D7< 51C1<> 52B6> AGP_AD_STB_GPUUF<1> 17B6< 54B7< CLK66M_GPU_UF 16C6<> 54A7< CPU_DATA<47> 5B4<> 6C4< 8C7< 9B1<> DVOD4 22B5<> 27A8< 27C5< 57C2> FBABA<0> 18C8<> 18E3<
+3V_AUDIO 39D2< 39D6< 39D7< 40C3< 43B2< AGP_AD_STB_L<0> 16A4<> 16D1< 17B8< 54C7< CLKENET_LINK_GBE_REF 34C6< CPU_DATA<48> 5B4<> 8C5<> 9B1<> 9D8< DVOD5 22B5<> 27A8< 27C5< 57C2> FBABA<0..1> 55D3>
43C6< AGP_AD_STB_L<1> 16A4<> 16D1< 17B8< 54C7< CLKENET_LINK_RX 34C7< 35C8< 57C5> CPU_DATA<49> 5B4<> 8C4<> 9B1<> 9D8< DVOD6 22B5<> 27A8< 27C5< 57C2> FBABA<1> 18C8<> 18E3<
+3V_GPU_SS 22A6< 22A8< 22B7< AGP_AD_STB_L_GPUUF<0> 17B6< 54B7< CLKENET_LINK_TX 34D7< 35C8< 57C5> CPU_DATA<50> 5B4<> 8C8<> 9B1<> 9D8< DVOD7 22B5<> 27A8< 27C5< 57C2> FBACAS_L 18C8> 18G3< 55D3>
+3V_INTREPID_USB 28C4< 52A3> AGP_AD_STB_L_GPUUF<1> 17B6< 54B7< CLKENET_PHY_RX 35C6<> 57C5> CPU_DATA<51> 5B4<> 8C8<> 9B1<> 9D8< DVOD8 22B5<> 26B1< 27C5< 57C2> FBACKE 18D3< 18D7<> 55D3>
+3V_MAIN 39D4< 40D5< 41A5< 41A7< 42B5< AGP_BUSY_L 16C6<> 16D1< 16D3< 17A8> 54B7< CLKENET_PHY_TX 35C6<> 57C5> CPU_DATA<52> 5B4<> 8C5<> 9B1<> 9C8< DVOD9 22B5<> 27A8< 27C5< 57C2> FBACLK0 18D7> 19C3< 55C3>
42B7< 42C8< 43C7< 52C4 59D8> AGP_CBE<0> 16B4<> 17C8< CLKFW_LINK_LCLK 34C5<> CPU_DATA<53> 5B4<> 8C7<> 9B1<> 9C8< DVOD10 22B5<> 27A8< 27B5< 57C2> FBACLK0_L 18D7> 19C3< 55C3>
+5VSD_T 50D6<> AGP_CBE<0..1> 54C7< CLK_18M_INT_XOUT 58B5> 58B5> 58B5> CPU_DATA<54> 5B4<> 8D7<> 9B1<> 9C8< DVOD11 22B5<> 27A8< 27B5< 57C2> FBACLK1 18D7> 19D3< 55C3>
+5V_AUDIO 39C6<> 39D7< 41B8<> AGP_CBE<1> 16B4<> 17C8< COMM_DTR_L 28C3> 29C7<> 59C6> CPU_DATA<55> 5B4<> 8C5<> 9B1<> 9C8< DVODE 22C5<> 27B5< FBACLK1_L 18D7> 19D3< 55C3>
+5V_HP 41A8< 41B7<> 41D5< AGP_CBE<2> 16B4<> 17C8< COMM_GPIO_L 28C3<> 28D3< 29C5<> 59C6> CPU_DATA<56> 5B4<> 8D8<> 9B1<> DVOHSYNC 22C5> 26D7< 27B5< FBACS0_L 18C8> 18F3< 55D3>
+5V_MAIN 51B4<> 51B4<> 52C4 59D8> AGP_CBE<2..3> 54C7< COMM_RESET_L 28C5<> 29D5<> 59A8> CPU_DATA<57> 5B4<> 8D5<> 9B1<> 9D5< DVOVREF 22C5<> FBARAS_L 18C8> 18G3< 55D3>
+5V_SLEEP 38C1< 46C7< 46D6<> 50D5< 51C5<> AGP_CBE<3> 16B4<> 17C8< COMM_RING_DET_L 28B5<> 28B8< 29C5<> 44C5<> 59D6> CPU_DATA<58> 5B4<> 8D4<> 9B1<> 9D5< DVOVSYNC 22C5> 27B5< FBAWE_L 18C8> 18F3< 55D3>
51C8< 59D8> AGP_DEVSEL_L 16B4<> 16C3< 17B8< 54C7< COMM_RTS_L 28C3> 29D5<> 59C6> CPU_DATA<59> 5B4<> 8D8<> 9B1<> 9D5< DVO_PD 22B5< FBBA<0> 18C3< 18D5<>
+12VSD_FILT 29A5<> 52B3> AGP_FBI_EQUAL 16C7< 54A7< COMM_RXD 28C3<> 29C5<> 59C6> CPU_DATA<60> 5B4<> 8D8<> 9B1<> 9D5< DVO_PU 22B5< FBBA<0..12> 55C3>
+12VSD_T 50D6<> AGP_FBO_EQUAL 16B7< 54A7< COMM_SHUTDOWN 28C5<> 28D1< 29D7<> 59D6> CPU_DATA<61> 5B4<> 8D4<> 9B1<> 9C5< EIDE_ADDR<0> 37B7> 38B8< FBBA<1> 18B3< 18D5<>
+12V_DROPPED 44D8< AGP_FB_PLUS2 16B8< 54A7< COMM_TRXC 28C3<> 28D3< 29C7<> 59C6> CPU_DATA<62> 5B4<> 8D4<> 9B1<> 9C5< EIDE_ADDR<0..2> 58C5> FBBA<2> 18B3< 18D5<>
+12V_MAIN 36D8< 39C8< 42B3< 44D8< 45B4<> AGP_FRAME_L 16B4<> 16C3< 17B8< 54C7< COMM_TXD_L 28C3<> 29C7<> 59C6> CPU_DATA<63> 5A4<> 8D5<> 9B1<> 9C5< EIDE_ADDR<1> 37B7> 38B8< FBBA<3> 18B3< 18D5<>
45D3<> 45D7< 48C4<> 48C8<> 48D6<> AGP_GNT_L 16C3< 16C4<> 17B7< 54B7< CORE_MOSFET 45C4<> 45C6<> CPU_DBG_L 4C3< 7B7< 8B8<> 9B1<> 56C3> EIDE_ADDR<2> 37B7> 38A8< FBBA<4> 18B3< 18D5<>
49C4<> 49D3<> 49D7<> 50B4<> 50C4<> AGP_INT_L 17B6<> 28B5<> 28B8< CORE_MOSFET_1 45B5<> 45C7<> CPU_DRDY_L 4C2< 7B7< 8B5<> 9B1< 56C3> EIDE_CS1FX_L 37A7> 38B8< 58C5> FBBA<5> 18B3< 18D5<>
50D2< 50D5<> 51A5< 51A7< 51B7< 51C3< AGP_IRDY_L 16B4<> 16C3< 17B8< 54C7< CPU_AACK_L 4A7< 7B7< 8B5<> 9B3<> 56C3> CPU_DRDY_L_UF 4C3<> 56C3> EIDE_CS3FX_L 37A7> 38B8< 58C5> FBBA<6> 18B3< 18D5<>
51D7<> 52C1> 52C1> 59D8> AGP_PAR 16B4<> 17B8< 54B7< CPU_ADDR<0> 4C7<> 8B4<> 9D3<> CPU_DTI<0> 4C3< 8B7<> 9A1<> EIDE_CSELP_L 38C6<> 52A8> FBBA<7> 18B3< 18D5<>
+12V_SLEEP 29A3< 29A8< 29C5<> 50D5< 51A5< AGP_PIPE_L 16A4<> 16B3< 17B8< 54B7< CPU_ADDR<0..31> 56D3> CPU_DTI<0..2> 56C3> EIDE_DATA<0> 37B7<> 37C5< FBBA<8> 18B3< 18D5<>
51C2< 51D6<> 52C1> 52C1> 59D8> AGP_PLLVDD 17C5< CPU_ADDR<1> 4C7<> 8B5<> 9D3<> CPU_DTI<1> 4C3< 8B4<> 9A1<> EIDE_DATA<0..15> 58D5> FBBA<9> 18B3< 18D5<>
+12V_SLEEPA 59D8> AGP_PWR_ADJ 46A5<> CPU_ADDR<2> 4C7<> 8B4<> 9D3<> CPU_DTI<2> 4C3< 8B4<> 9A1<> EIDE_DATA<1> 37B7<> 37C5< FBBA<10> 18B3< 18D5<>
+12V_TPA 42B2< 42B7< 42C4< 42C5< 42D5< AGP_RBF_L 16A4<> 16B3< 17B8< 54B7< CPU_ADDR<3> 4C7<> 8B8<> 9D3<> CPU_EDTI 4C3< 7C5< EIDE_DATA<2> 37B7<> 37C5< FBBA<11> 18B3< 18C5<>
C +INTREPID_CORE_MAIN 10D6< 11D3< 46B3< 47B2<> 59C8> AGP_REQ_L
AGP_RESET_L
16C3< 16C4<> 17B7<> 54B7<
17B8< 27C5< 44D3<
CPU_ADDR<4>
CPU_ADDR<5>
4C7<> 8B5<> 9D3<>
4C7<> 8B7<> 9D3<>
CPU_EMODE0_L
CPU_EMODE1_L
4B3< 7A4<
4B3< 7A4<
EIDE_DATA<3>
EIDE_DATA<4>
37B7<> 37C5<
37B5< 37B7<>
FBBA<12>
FBBBA<0>
18A3< 18C5<>
18A3< 18C5<>
C
+MAXBUS_SLEEP 4D5< 6C5< 6D6< 7A3< 7A3< 7B3< 7C3< AGP_SBA<0> 16B4< 16C1< 17A8< CPU_ADDR<6> 4C7<> 8C4<> 9D3<> CPU_FBI_PLUS1 9A5< 56C3> EIDE_DATA<5> 37B5< 37B7<> FBBBA<0..1> 55C3>
7C3< 7C5< 7C7< 8A3<> 8D1< 8D4< 9B7< AGP_SBA<0..7> 54B7< CPU_ADDR<7> 4C7<> 8B7<> 9D3<> CPU_FBO_PLUS1 9A5< 56C3> EIDE_DATA<6> 37B5< 37B7<> FBBBA<1> 18A3< 18C5<>
9D8< 44B7< 44D1< 44D2< 45D2<> 46D4< AGP_SBA<1> 16B4<> 16C1< 17A8< CPU_ADDR<8> 4C7<> 8C5<> 9D3<> CPU_FB_MINUS3 9A4< 56C3> EIDE_DATA<7> 37B5< 37B7<> FBBCAS_L 18C3< 18D4<> 55C3>
52C6> 59C8> AGP_SBA<2> 16B1< 16B4<> 17A8< CPU_ADDR<9> 4C7<> 8B8<> 9C3<> CPU_FB_PLUS2 9A5< 56C3> EIDE_DATA<8> 37B5< 37B7<> FBBCKE 18A3< 18C4<> 55B3>
3.8VH_TRICKLE 44C1< 44D7<> 52B3> AGP_SBA<3> 16B4<> 16C1< 17A8< CPU_ADDR<10> 4C7<> 8B8<> 9C3<> CPU_FB_PLUS3 9A4< 56B3> EIDE_DATA<9> 37B5< 37B7<> FBBCLK0 18C5<> 19B3< 55B3>
3.8V_TRICKLE 36D8< 44C2< 44C6< 44D7<> 50D5< AGP_SBA<4> 16B4<> 16C1< 17A8< CPU_ADDR<11> 4C7<> 8C4<> 9C3<> CPU_GBL_L 4B8<> 8B5<> 56C3> EIDE_DATA<10> 37B5< 37B7<> FBBCLK0_L 18C5<> 19B3< 55B3>
52C1> 52C2> AGP_SBA<5> 16B4<> 16C1< 17A8< CPU_ADDR<12> 4C7<> 8B7<> 9C3<> CPU_HDRST_L 44C4<> EIDE_DATA<11> 37B5< 37B7<> FBBCLK1 18C5<> 19C3< 55B3>
3V_SI_AVCC 27D4< AGP_SBA<6> 16A4<> 16B1< 17A8< CPU_ADDR<13> 4C7<> 8B8<> 9C3<> CPU_HIT_L 4A7> 7C7< 8B8<> 9B3< 56C3> EIDE_DATA<12> 37B5< 37B7<> FBBCLK1_L 18C5<> 19B3< 55B3>
3V_SI_PLLVCC 27D4< AGP_SBA<7> 16A4<> 16B1< 17A8< CPU_ADDR<14> 4C7<> 8B7<> 9C3<> CPU_HRESET_L 4B3< 7A3< 7A5< 7B3< 7B3< 8A3<> EIDE_DATA<13> 37A5< 37B7<> FBBCS0_L 18C3< 18C4<> 55C3>
3V_SI_VCC 27B2< 27D3< AGP_SB_STB 16A4<> 16B3< 17B8< 54B7< CPU_ADDR<15> 4C7<> 8B7<> 9C3<> 44C2< 44D2< 59C8> EIDE_DATA<14> 37A5< 37B7<> FBBRAS_L 18C3< 18D4<> 55C3>
3_5_HONKER 51C4<> AGP_SB_STB_L 16A4<> 16D1< 17A8< 54B7< CPU_ADDR<16> 4C7<> 8B8<> 9C3<> CPU_INT_GBL_L 4B8< 7B7< 9C3<> 56C3> EIDE_DATA<15> 37A5< 37B7<> FBBWE_L 18C3< 18D4<> 55C3>
3_6V_SLEEP 37D1< 51C1< AGP_ST<0> 16A4<> 16B1< 17B6< CPU_ADDR<17> 4C7<> 8B8<> 9C3<> CPU_L1TSTCLK 4C3< 7B4< EIDE_DMACK_L 37A7<> 37D5< 58D5> FBCAL_CLK_GND 18A5< 18D7<
5V_XRA 50B4<> AGP_ST<0..2> 54B7< CPU_ADDR<18> 4C7<> 8C8<> 9C3<> CPU_L2TSTCLK 4C3< 7C4< EIDE_DMARQ 37A7< 38C8< 58D5> FBCAL_PD_VDDQ 18D7<
15_I282 15B2< AGP_ST<1> 16A4<> 16B1< 17B6< CPU_ADDR<19> 4C7<> 8B7<> 9C3<> CPU_LSSD_MODE 4C3< 7B5< EIDE_DSTB_RDY 37A7< 37C5< 58D5> FBCAL_PU_GND 18A5< 18D7<
15_I286 15B3< AGP_ST<2> 16A4<> 16B1< 17B6< CPU_ADDR<20> 4C7<> 8B8<> 9C3<> CPU_MCP_L 4B3< 7B5< EIDE_HSTB_RDY 37A7> 37C5< 58D5> FBCAL_TERM_GND 18A5< 18D7<
18P_GND 29B5<> AGP_STOP_L 16B3< 16B4<> 17B8< 54C7< CPU_ADDR<21> 4C7<> 8C7<> 9C3<> CPU_PLL_CFG<0> 4D3< 6C6< 8A8<> EIDE_INTRQ 37A7< 38C8< 58C5> FBD<0> 18G8<> 19D8<
25V_BSTH 49C5<> AGP_TRDY_L 16B3< 16B4<> 17B8< 54C7< CPU_ADDR<22> 4C7<> 8C7<> 9C3<> CPU_PLL_CFG<1> 4D3< 6C6< 8A8<> EIDE_IOCS16_L 38C6<> 52A8> FBD<0..63> 55D3>
25V_BSTH_TERM 49C5<> AGP_WBF_L 16A6<> 16B1< 17B8< 54B7< CPU_ADDR<23> 4C7<> 8C8<> 9C3<> CPU_PLL_CFG<2> 4D3< 6C6< 8A8<> EIDE_PDIAG 38C6<> FBD<1> 18G8<> 19D8<
25V_COMP 49B6< AINLM 39C4< CPU_ADDR<24> 4B7<> 8B7<> 9C3<> CPU_PLL_CFG<3> 4C3< 6C6< 8A8<> EIDE_RST_L 37A7> 37D5< 58D5> FBD<2> 18G8<> 19D8<
25V_COMP_DWN 49B6< AINLP 39C4< CPU_ADDR<25> 4B7<> 8B8<> 9C3<> CPU_PLL_CFGEXT 4C3< 6C6< 8A8<> EIDE_STOP 37A7> 37D5< 58D5> FBD<3> 18G8<> 19D8<
25V_DH 49B5<> AINRM 39C4< CPU_ADDR<26> 4B7<> 8C8<> 9C3<> CPU_PLL_STOP 6B8< 44B8< ENET_AVDD 35D2<> 35D4<> 52C6> FBD<4> 18G8<> 19D8<
25V_DHT 49B5<> AINRP 39C4< CPU_ADDR<27> 4B7<> 8C8<> 9C3<> CPU_PMONIN_L 4B3< 7C5< ENET_COL 34B7< 35B8< 57B5> FBD<5> 18G8<> 19D8<
25V_DL 49B5<> ALTCHGND 25B3<> 25C3< 33B2< 33B4< 33C2< CPU_ADDR<28> 4B7<> 8C7<> 9C3<> CPU_PULLDOWN 4A3< 4D7<> 7C5< ENET_CRS 34C7< 35B8< 57B5> FBD<6> 18G8<> 19D8<
25V_DLT 49B4<> 33C4< 33C4< 33D2< 33D4< 36A7<> 36B2< CPU_ADDR<29> 4B7<> 8C8<> 9C3<> CPU_PULLUP 4A3< 7A5< ENET_DVDD 35D6<> FBD<7> 18G8<> 19D8<
25V_GND 49B6<> 36B6< 36B6<> 36C1<> 36C1<> 36C1< CPU_ADDR<30> 4B7<> 8C7<> 9C3<> CPU_QACK_L 4C3< 8B4<> 9B3<> 56C3> ENET_ENERGY_DET 28B5<> 28C1< 35B4> FBD<8> 18G8<> 19D8<
25V_OCSET 49C5<> 52C4 CPU_ADDR<31> 4B7<> 8C7<> 9C3<> CPU_QREQ_L 4C3> 7D5< 8B7<> 9B3< 56C3> ENET_LINK_RXD<0> 34C7< 35C8< FBD<9> 18G8<> 19D8<
25V_OVP 49B6<> ANALOGGND 35B1< 35C1<> 40B5<> 40B6< 40C6< CPU_ARTRY_L 4A7<> 7C7< 8B8<> 9B3<> 56C3> CPU_SHD0_L 4A7<> 7B5< ENET_LINK_RXD<0..3> 57B5> FBD<10> 18G8<> 19D8 49C4<>
40C6< 41A2<> 41A4< 41B1<> 41B3<
41C3< 41D3< 42A5<> 42A6<> 43A5< 52C4
CPU_AVDD
CPU_BG_L
4D3< 52C6>
4D7< 7B7< 8B4<> 9D3<> 56D3>
CPU_SHD1_L
CPU_SLEEPIN
4A7<> 7B5<
51B7<
ENET_LINK_RXD<1> 34C7< 35C8<
ENET_LINK_RXD<2> 34C7< 35C8<
FBD<11>
FBD<12>
18G8<> 19D8<
18G8<> 19D8 CPU_BR_L 4D7> 7C7< 8B4<> 9D3< 56D3> CPU_SMI_L 4B3< 7A5< 44C4<> ENET_LINK_RXD<3> 34C7< 35B8< FBD<13> 18G8<> 19D8<
25V_VSENSE 49C4<> ANALOG_BLU 22C7<> 25C6< 57D5> CPU_BUS_VSEL 4D3< 7C4< CPU_SRESET_L 4B3< 7A5< 8A3<> 59C6> ENET_LINK_RXD<4> 34C6< FBD<14> 18G8<> 19D8<
25_CORE_1 49C3< ANALOG_GRN 22C7<> 25C6< 57D5> CPU_CHKSTP_IN_L 4B3< 7B5< 59C8> CPU_STATE_LED* 44C4<> 51A8< ENET_LINK_RXD<5> 34C6< FBD<15> 18G8<> 19D8<
33PCI_SLOTD_SERR_L 32B6<> ANALOG_HSYNC* 22D7< 25D6<> 26B5< 57D5> 59B8> CPU_CHKSTP_OUT_L 4B3> 7B5< 8A3<> 8D5<> 59C8> CPU_TA_L 4C3< 7C7< 8C4<> 9A1<> 56C3> ENET_LINK_RXD<6> 34C6< FBD<16> 18G8<> 19D8<
33SLOTB_INT_L 28B7<> 28B7<> 28B7<> 31C2<> 59A6> ANALOG_RED 22C7<> 25B6< 57D5> CPU_CI_L 4A7> 7A7< 8C5<> 9C3<> 56C3> CPU_TBEN 4C3< 7C5< 9A3<> ENET_LINK_RXD<7> 34C6< FBD<17> 18G8<> 19D8<
42_I291 42B6< ANALOG_VSYNC* 22D7< 25C6<> 26B5< 57D5> 59B8> CPU_CLK_EN 9A3< 44C4<> CPU_TBST_L 4B7> 7B7< 8B4<> 9B3<> 56D3> ENET_LINK_TXD<0> 34C6<> FBD<18> 18G8<> 19D8<
42_I295 42B5< ANEN 35C4< CPU_DATA<0> 5D4<> 8C4<> 9D1<> CPU_TEA_L 4C3< 7B7< 8B5<> 9A1<> 56C3> ENET_LINK_TXD<0..3> 57C5> FBD<19> 18G8<> 19C8<
45_I408 45B6< AOUTL 39C2> 41D7< 43D3< CPU_DATA<0..63> 56D3> CPU_TSIZ<0> 4B7> 8B5<> 9B3<> ENET_LINK_TXD<1> 34C6<> FBD<20> 18G8<> 19C8<
45_I525 45C4< AOUTR 39C2> 41C7< 43D3< CPU_DATA<1> 5D4<> 8C7<> 9D1<> CPU_TSIZ<0..2> 56D3> ENET_LINK_TXD<2> 34C6<> FBD<21> 18G8<> 19C8<
45_I526 45B3< ASH 43A6< CPU_DATA<2> 5D4<> 8C8<> 9D1<> CPU_TSIZ<1> 4B7> 8B5<> 9B3<> ENET_LINK_TXD<3> 34C6<> FBD<22> 18G8<> 19C8<
47_I66 47B4< AUDIO_TO_SND 28B1< 39C1< CPU_DATA<3> 5D4<> 8C5<> 9D1<> CPU_TSIZ<2> 4B7> 8B7< 9B3<> ENET_LINK_TX_EN 34D6<> 57C5> FBD<23> 18G8<> 19C8<
48_I10 48C3< AUD_GND 39B7<> 42B2< 42C4< 42D3< 42D4< CPU_DATA<4> 5D4<> 8C7<> 9D1<> CPU_TS_L 4D7<> 7C7< 8B7<> 9D3<> 56D3> ENET_LINK_TX_ER 34D6<> 57C5> FBD<24> 18G8<> 19C8<
48_I99 48B4< 42D6< 42D7< 43C2< 43D2< 43D4< CPU_DATA<5> 5D4<> 8C8<> 9D1<> CPU_TT<0> 4B7<> 7A7< 8B4<> 9B3<> ENET_MDC 34B7> 35B6< FBD<25> 18F8<> 19C8<
49_I70 49B4< AUD_R_FB 39D6< CPU_DATA<6> 5D4<> 8C4<> 9D1<> CPU_TT<0..4> 56D3> ENET_MDIO 34B7<> 35A8<> FBD<26> 18F8<> 19C8<
50_I408 50B3< BRE 45C5<> CPU_DATA<7> 5D4<> 8C8<> 9D1<> CPU_TT<1> 4B7<> 7A7< 8B5<> 9B3<> ENET_PHY_COL 35B6<> 57B5> FBD<27> 18F8<> 19C8<
50_I410 50A3< BRE_1 45B5<> CPU_DATA<8> 5D4<> 8C5<> 9D1<> CPU_TT<2> 4B7<> 7A7< 8B4<> 9B3<> ENET_PHY_CRS 35B6<> 57B5> FBD<28> 18F8<> 19C8<
AGND 39B7<> 52C4 BT1 44D6<> 51A6< CPU_DATA<9> 5D4<> 8C4<> 9D1<> CPU_TT<3> 4B7<> 7A7< 8B5<> 9B3<> ENET_PHY_RXD<0> 35C6<> FBD<29> 18F8<> 19C8<
AGP_AD<0> 16C4<> 17D8< BT1_LED 51A6< CPU_DATA<10> 5D4<> 8C7<> 9D1<> CPU_TT<4> 4B7<> 7A7< 8B4<> 9B3<> ENET_PHY_RXD<0..3> 57B5> FBD<30> 18F8<> 19C8<
AGP_AD<0..15> 54C7< BT_USB_DM 28B2< 29D3<> 58A5> 59B6> CPU_DATA<11> 5C4<> 8C5<> 9D1<> CPU_VCORE_SLEEP 4D3< 4D7< 8B7< 8C1< 45D2<> 52C6> ENET_PHY_RXD<1> 35C6<> FBD<31> 18F8<> 19C8<
AGP_AD<1> 16C4<> 17D8< BT_USB_DP 28B2< 29D3<> 58B5> 59B6> CPU_DATA<12> 5C4<> 8C5<> 9D1<> 59B6> 59D8> ENET_PHY_RXD<2> 35C6<> FBD<32> 18F8<> 19D5<
AGP_AD<2> 16C4<> 17D8< C412P1 41B3< CPU_DATA<13> 5C4<> 8C7<> 9D1<> CPU_VCORE_SLEEPA 45C3<> ENET_PHY_RXD<3> 35B6<> FBD<33> 18F8<> 19D5<
AGP_AD<3> 16C4<> 17D8< C756_2 40D3<> CPU_DATA<14> 5C4<> 8C8<> 9D1<> CPU_VCORE_SLEEPB 45A4<> ENET_PHY_RX_DV 35B6<> 57B5> FBD<34> 18F8<> 19D5<
AGP_AD<4> 16C4<> 17D8< C4237P2 40C4< CPU_DATA<15> 5C4<> 8C5<> 9D1<> CPU_VCORE_SLEEPC 45A1<> ENET_PHY_RX_ER 35B6<> 57B5> FBD<35> 18F8<> 19D5<
AGP_AD<5> 16C4<> 17D8< C4240P2 40C4< CPU_DATA<16> 5C4<> 8C4<> 9C1<> CPU_WT_L 4B7> 7A7< 8B5<> 9B3<> 56C3> ENET_PHY_TXD<0> 34C7< 35C6<> FBD<36> 18F8<> 19D5<
AGP_AD<6> 16C4<> 17D8< C4242P2 40B4< CPU_DATA<17> 5C4<> 8C7<> 9C1<> CSLOT_IOWAIT_L 37B7< 52A8> ENET_PHY_TXD<0..3> 57C5> FBD<37> 18F8<> 19D5<
AGP_AD<7> 16C4<> 17D8< C4243P2 40B4< CPU_DATA<18> 5C4<> 8C4<> 9C1<> CVBS_CNT 22B7< 23D7<> ENET_PHY_TXD<1> 34C7< 35C6<> FBD<38> 18F8<> 19D5<
AGP_AD<8> 16C4<> 17D8< CAP_PLL 39B4< CPU_DATA<19> 5C4<> 8C4<> 9C1<> CVBS_D 22B7< ENET_PHY_TXD<2> 34C7< 35C6<> FBD<39> 18F8<> 19D5<
A AGP_AD<9> 16C4<> 17D8< CD_CS1FX_L 38C6<> 58C5> CPU_DATA<20> 5C4<> 8C4<> 9C1<> CY69P2 39B5< ENET_PHY_TXD<3> 34C7< 35C6<> FBD<40> 18F8<> 19D5< A
AGP_AD<10> 16C4<> 17D8< CD_CS3FX_L 38C6<> 58C5> CPU_DATA<21> 5C4<> 8C8<> 9C1<> CY811_S0 22A7< ENET_PHY_TX_EN 34D7< 35C6< 57C5> FBD<41> 18F8<> 19D5<
AGP_AD<11> 16C4<> 17D8< CD_DMACK_L 37D4< 38C6<> 58D5> CPU_DATA<22> 5C4<> 8C7<> 9C1<> CY811_S1 22A7< ENET_PHY_TX_ER 34D7< 35C6< 57C5> FBD<42> 18F8<> 19D5<
AGP_AD<12> 16C4<> 17D8< CD_DMARQ 38C6<> 58D5> CPU_DATA<23> 5C4<> 8C8<> 9C1<> DAC2RSET 22C5<> 57D5> ENET_RDAC_PD 35B5<> FBD<43> 18F8<> 19D5<
AGP_AD<13> 16C4<> 17D8< CD_DSTB_RDY 37C4< 38C6<> 58D5> CPU_DATA<24> 5C4<> 8D4<> 9C1<> DAC2VDD 22C5< 52B6> ENET_RDN 35C3<> 57B5> FBD<44> 18F8<> 19D5<
AGP_AD<14> 16C4<> 17D8< CD_EIDE_ADDR<0> 38C6<> CPU_DATA<25> 5C4<> 8D7<> 9C1<> DAC2VREF 22C5<> 57D5> ENET_RDP 35C3<> 57B5> FBD<45> 18E8<> 19D5<
AGP_AD<15> 16C4<> 17C8< CD_EIDE_ADDR<0..2> 58C5> CPU_DATA<26> 5C4<> 8C5<> 9C1<> DACRSET 22C4< ENET_RX_DV 34C7< 35B8< 57B5> FBD<46> 18E8<> 19D5<
AGP_AD<16> 16C4<> 17C8< CD_EIDE_ADDR<1> 38C6<> CPU_DATA<27> 5C4<> 8C7<> 9C1<> DACVDD 22C4< 52B6> ENET_RX_ER 34C7< 35B8< 57B5> FBD<47> 18E8<> 19D5<
AGP_AD<16..31> 54C7< CD_EIDE_ADDR<2> 38C6<> CPU_DATA<28> 5C4<> 8D8<> 9C1<> DACVREF 22C4< ENET_TDN 35C3<> 57B5> FBD<48> 18E8<> 19D5<
AGP_AD<17> 16C4<> 17C8< CD_HSTB_RDY 37C4< 38C6<> 58D5> CPU_DATA<29> 5C4<> 8C8<> 9C1<> DDC_VCC_3 24B3<> 52B6> 59B8> ENET_TDP 35C3<> 57B5> FBD<49> 18E8<> 19D5<
AGP_AD<18> 16C4<> 17C8< CD_RESET_L 37D4< 38C6<> 58D5> CPU_DATA<30> 5C4<> 8C5<> 9C1<> DDC_VCC_5 25C4< 52A6> 59B8> ETHPHYRESET_L 35B6< FBD<50> 18E8<> 19D5<
60
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
FBD<51> 18E8<> 19C5< FBDQS<12> 18D4<> 19A5< FW_VREG_FB 36D7< GPWRGD 47B8< 48A5<> INT_PLL9_GND 28A4<> 28D4< MEM_ADDR<7> 12D3< 12D6<>
FBD<52> 18E8<> 19C5< FBDQS<13> 18D4<> 19A5< FW_XI 36C6< 57A5> GRAPHICS_VPWR 48B5<> INT_PROC_SLEEP_REQ_L 28A5< 44B4<> MEM_ADDR<8> 12D2< 12D6<>
FBD<53> 18E8<> 19C5< FBDQS<14> 18D4<> 19A5< FW_XI_A 36C6< GRAPH_CORE 17D4< 23C7<> 48C2<> 52A6> INT_PU_RESET_L 15B3< 34C3< 44C2<> 44C2<> MEM_ADDR<9> 12C3< 12D6<>
FBD<54> 18E8<> 19C5< FBDQS<15> 18D4<> 19A5< FW_XO 36C6<> 57A5> GRAPH_DDC_SCL 22D5<> 24A7< INT_REF_CLK_IN_PD 28A6< 53A6< MEM_ADDR<10> 12C3< 12D6<>
FBD<55> 18E8<> 19C5< FBDQSTERM<0> 19A7< GCORE_1 48C2< GRAPH_DDC_SDA 22D5<> 24A7< INT_RESET_L 34C3< 35B8< 41A7< 43C7< 44D2<> MEM_ADDR<11> 12B3< 12D6<>
FBD<56> 18E8<> 19C5< FBDQSTERM<0..7> 55C3> GCORE_BSTH 48C5<> GRAPH_IIC_SCL2 23D3<> INT_ROM_CS_L 30C5<> MEM_ADDR<12> 12D2< 12D6<>
FBD<57> 18E8<> 19C5< FBDQSTERM<1> 19A7< GCORE_BSTH_TERM 48C3<> GRAPH_IIC_SDA2 23D3<> INT_ROM_OE_L 30C5<> MEM_BA<0> 12B3< 12D6<>
FBD<58> 18E8<> 19C5< FBDQSTERM<2> 19A7< GCORE_COMP 48B6< HD_DIOR_L 37D1< 38C3<> 58C5> INT_ROM_OVERLAY_PU 16D7< 30A7< 30C5<> 54A7< MEM_BA<0..1> 53D6<
FBD<59> 18E8<> 19C5< FBDQSTERM<3> 19A7< GCORE_DH 48B5<> HD_DIOW_L 37C1< 38C3<> 58C5> INT_ROM_RW_L 30C5<> MEM_BA<1> 12B3< 12D6<>
FBD<60> 18E8<> 19C5< FBDQSTERM<4> 19A7< GCORE_DL 48B5<> HD_DMACK_L 37D1< 38C3<> 58C5> INT_SND_CLKOUT 28A3<> MEM_CAS_L 12A3< 12C6<> 53C6<
FBD<61> 18E8<> 19C5< FBDQSTERM<5> 19A7< GCORE_GND 48B5<> HD_DMARQ 38C3<> 58C5> INT_SND_SCLK 28A3<> MEM_CKE<0> 12C2< 12C6<>
D FBD<62>
FBD<63>
18E8<> 19C5<
18E8<> 19C5<
FBDQSTERM<6>
FBDQSTERM<7>
19A7<
19A7<
GCORE_OCSET
GCORE_OVP
48B6<>
48B6<>
HD_INTRQ
HD_IOCHRDY
38C3<> 58C5>
37C1< 38C3<> 58C5>
INT_SND_SYNC 28B3<>
INT_SND_TO_AUDIO 28B3<>
MEM_CKE<0..3>
MEM_CKE<1>
53C6<
12B2< 12B6<>
D
FBD<64> 18G5<> 19C8< FBDQSTERM<8> 19A4< GCORE_VCC 48C6< HD_RESET_L 37D1< 38C3<> 58C5> INT_SPKR+ 42A6<> 43D8< MEM_CKE<2> 12B6<> 12C2<
FBD<64..127> 55C3> FBDQSTERM<8..15> 55B3> GCORE_VSENSE 48B6<> 48C4<> HD_UIDE_ADDR<0> 38C3<> INT_SPKR- 42A6<> 43D8< MEM_CKE<3> 12B2< 12B6<>
FBD<65> 18G5<> 19C8< FBDQSTERM<9> 19A4< GPULNKON 23C4<> HD_UIDE_ADDR<0..2> 58C5> INT_SUSPEND_ACK_L 9B3> 44B5<> MEM_CS_L<0> 12C2< 12C6<>
FBD<66> 18G5<> 19C8< FBDQSTERM<10> 19A4< GPU_50PULLDWN 17A5<> 52A8> HD_UIDE_ADDR<1> 38C3<> INT_SUSPEND_REQ_L 9B3< 44B8<> MEM_CS_L<0..3> 53C6<
FBD<67> 18G5<> 19C8< FBDQSTERM<11> 19A4< GPU_50PULLUP 17B5<> 52A8> HD_UIDE_ADDR<2> 38C2<> INT_TMDS_3V 24C3<> 52A6> 59C8> MEM_CS_L<1> 12C2< 12C6<>
FBD<68> 18G5<> 19C8< FBDQSTERM<12> 19A4< GPU_AGP_AD<0> 17D6<> HD_UIDE_CS1FX_L 38C3<> 58B5> INT_TST_MONIN_PD 34B7< 34C1< MEM_CS_L<2> 12B2< 12C6<>
FBD<69> 18G5<> 19C8< FBDQSTERM<13> 19A4< GPU_AGP_AD<0..15> 54B7< HD_UIDE_CS3FX_L 38C2<> 58B5> INT_TST_PLLEN_PD 28C6< 34B7< MEM_CS_L<3> 12B2< 12C6<>
FBD<70> 18G5<> 19C8< FBDQSTERM<14> 19A4< GPU_AGP_AD<1> 17D6<> HEADPHONE_COM 41B2<> INT_WATCHDOG_L 28A5> 44C5<> MEM_DATA<0> 12D8<> 13C8<>
FBD<71> 18G5<> 19C8< FBDQSTERM<15> 19A4< GPU_AGP_AD<2> 17D6<> HEADPHONE_L 41B2<> 41D2< INV_CUR_HI 23D7< 29B8< MEM_DATA<0..63> 53D6<
FBD<72> 18G5<> 19C8< FB_DLLVDD 18C6< 18D7< GPU_AGP_AD<3> 17D6<> HEADPHONE_R 41B2<> 41C2< INV_CUR_HI_FILT 29A5<> 59A8> MEM_DATA<1> 12D8<> 13C8<>
FBD<73> 18G5<> 19C8< FDX 35A5< 35C4< GPU_AGP_AD<4> 17D7<> HONK_ADJ 51B4<> IO_RESET_L 32A6< 35B8< 44B8<> 44D3< 59A8> MEM_DATA<2> 12D8<> 13C8<>
FBD<74> 18G5<> 19B8< FILT_ANALOG_BLU 25C5< 57D5> 59B8> GPU_AGP_AD<5> 17D7<> HP16_L 41D4< IPWRGD 46A8< 47A6<> MEM_DATA<3> 12D8<> 13C8<>
FBD<75> 18G5<> 19B8< FILT_ANALOG_GRN 25C5< 57D5> 59B8> GPU_AGP_AD<6> 17D7<> HP16_R 41C4< JAZ 43B6< MEM_DATA<4> 12D8<> 13C8<>
FBD<76> 18G5<> 19B8< FILT_ANALOG_RED 25C5< 57D5> 59B8> GPU_AGP_AD<7> 17D7<> HPBYP 41B5< 41D6< JTAG_ASIC_TCK 8A4<> 34B7< 35C4< 59D8> MEM_DATA<5> 12D8<> 13C8<>
FBD<77> 18G5<> 19B8< FLOW_SS 45C6< 45C7< 45D8< GPU_AGP_AD<8> 17D6<> HPGAL_L 41D4< JTAG_ASIC_TDI 8A4<> 28C6< 34B7< 59D8> MEM_DATA<6> 12D8<> 13C8<>
FBD<78> 18G5<> 19B8< FLO_KNOWS_BEST 45C7<> 45C8<> 59D6> GPU_AGP_AD<9> 17D6<> HPGAL_R 41C4< JTAG_ASIC_TDO 8A4<> 35B4<> 59D8> MEM_DATA<7> 12D8<> 13C8<>
FBD<79> 18G5<> 19B8< FPD_PWR_ON 23D7<> 51B3< GPU_AGP_AD<10> 17D6<> HPIN_L 41D6< JTAG_ASIC_TMS 8A4<> 34B7< 35A2< 35B4<> 59D8> MEM_DATA<8> 12D8<> 13C8<>
FBD<80> 18G5<> 19B8< FPD_PWR_ON_T 51B3< GPU_AGP_AD<11> 17D6<> HPIN_R 41D6< JTAG_ASIC_TRST_L 8A4<> 34B7< 59C8> MEM_DATA<9> 12D8<> 13C8<>
FBD<81> 18G5<> 19B8< FWPHYRST 28C5<> 36C8< GPU_AGP_AD<12> 17D6<> HP_OFF 41A7< 41D5< JTAG_CPU_TCK 4C3< 7D5< 8A3<> 59C8> MEM_DATA<10> 12D8<> 13C8<>
FBD<82> 18G5<> 19B8< FW_BIAS1 36C5<> 57A5> GPU_AGP_AD<13> 17D6<> HP_OUT_L 41D5<> JTAG_CPU_TDI 4C3< 7A5< 8A3<> 59C8> MEM_DATA<11> 12D8<> 13C8<>
FBD<83> 18G5<> 19B8< FW_BIAS2 36C5<> 57A5> GPU_AGP_AD<14> 17D6<> HP_OUT_R 41D5<> JTAG_CPU_TDO 4C3> 8A3<> 59C8> MEM_DATA<12> 12D8<> 13C8<>
FBD<84> 18G5<> 19B8< FW_CNTL0 34C3< 36C8< 57A5> GPU_AGP_AD<15> 17C6<> HP_STAR_GND 39B7<> 41A8< 41B4< 41B8< 41C5< JTAG_CPU_TMS 4C3< 7A5< 8A3<> 59C8> MEM_DATA<13> 12D8<> 13C8<>
FBD<85> 18G5<> 19B8< FW_CNTL1 34C3< 36C8< 57A5> GPU_AGP_AD<16> 17C6<> 41D4< 41D7< JTAG_CPU_TRST_L 4C3< 7C5< 8A3<> 59C8> MEM_DATA<14> 12C8<> 13C8<>
FBD<86> 18G5<> 19B8< FW_CPS 36C6< GPU_AGP_AD<16..31> 54B7< HP_TL 41D3< JTAG_ENET_TDI 35A2< 35B5<> MEM_DATA<15> 12C8<> 13C8<>
FBD<87> 18G5<> 19B8< FW_C_LKON 28B6< 34C5<> 36B5<> GPU_AGP_AD<17> 17C6<> HP_TP 41B3< JTAG_INTRP_TDO 28C6< 34B7> 35B3< MEM_DATA<16> 12C8<> 13B6<>
FBD<88> 18G5<> 19B8< FW_D<0> 34C3< 36C8< GPU_AGP_AD<18> 17C6<> HP_TR 41C3< KAVAN 43A6< MEM_DATA<17> 12C8<> 13B6<>
FBD<89> 18F5<> 19B8< FW_D<0..7> 57A5> GPU_AGP_AD<19> 17C6<> HSYNC* 22C5<> 57D5> KS5VSD 29A5<> 52B3> 59A8> MEM_DATA<18> 12C8<> 13B6<>
FBD<90> 18F5<> 19B8< FW_D<1> 34C3< 36C8< GPU_AGP_AD<20> 17C6<> ICORE_COMP 47B6< KS_INT_SPKR+ 29A3< 43D7< 58A5> 59B8> MEM_DATA<19> 12C8<> 13B6<>
C FBD<91>
FBD<92>
18F5<> 19B8<
18F5<> 19B8<
FW_D<2>
FW_D<3>
34C3< 36B8<
34C3< 36B8<
GPU_AGP_AD<21>
GPU_AGP_AD<22>
17C6<>
17C6<>
ICW
IFP0AVCC
47B7<
23A6< 23C1< 52A6>
KS_INT_SPKR+_FILT 29A5<>
KS_INT_SPKR- 29A3< 42B4< 43D7< 58A5> 59B8>
MEM_DATA<20>
MEM_DATA<21>
12C8<> 13B6<>
12C8<> 13B6<>
C
FBD<93> 18F5<> 19B8< FW_D<4> 34C3< 36B8< GPU_AGP_AD<23> 17C6<> IFP0PLLVDD 23B4< KS_INT_SPKR-_FILT 29A5<> MEM_DATA<22> 12C8<> 13B6<>
FBD<94> 18F5<> 19B8< FW_D<5> 34C3< 36B8< GPU_AGP_AD<24> 17C6<> IFP0RSET 23B4<> KYLE 46C6< MEM_DATA<23> 12C8<> 13B6<>
FBD<95> 18F5<> 19B8< FW_D<6> 34C3< 36B8< GPU_AGP_AD<25> 17C6<> IFP0VREF 23B4<> 52A6> L31_2 40C6< MEM_DATA<24> 12C8<> 13A6<>
FBD<96> 18F5<> 19C5< FW_D<7> 34C3< 36B8< GPU_AGP_AD<26> 17C6<> IFP_AVCC 23A7<> L32_2 40B6<> MEM_DATA<25> 12C8<> 13A6<>
FBD<97> 18F5<> 19C5< FW_DIODE_BYPASS_V 36B6<> 36B7<> 52B6> GPU_AGP_AD<27> 17C6<> IFP_VADJ 23A8< L36_2 40B6< MEM_DATA<26> 12C8<> 13A6<>
FBD<98> 18F5<> 19C5< FW_DIO_V 36B6< 52B6> GPU_AGP_AD<28> 17C6<> IIC_ADD 29C6<> 59A8> L41_FILT 42B7<> MEM_DATA<27> 12C8<> 13A6<>
FBD<99> 18F5<> 19C5< FW_LINK_CNTL<0> 34C4<> GPU_AGP_AD<29> 17C6<> INTCORE_1 47B3< L43_1 41A4< MEM_DATA<28> 12C8<> 13A6<>
FBD<100> 18F5<> 19C5< FW_LINK_CNTL<0..1> 57A5> GPU_AGP_AD<30> 17C6<> INTCORE_BSTH 47B6<> L3202_1 40C6< MEM_DATA<29> 12C8<> 13A6<>
FBD<101> 18F5<> 19C5< FW_LINK_CNTL<1> 34C4<> GPU_AGP_AD<31> 17C6<> INTCORE_BSTH_TERM 47B6<> LAMP_STS 23D7< 29A3< MEM_DATA<30> 12C8<> 13A6<>
FBD<102> 18F5<> 19C5< FW_LINK_DATA<0> 34C4<> GPU_AGP_CBE<0> 17C6<> INTCORE_DH 47B6<> LAMP_STS_FILT 29A5<> 59A8> MEM_DATA<31> 12C8<> 13A6<>
FBD<103> 18F5<> 19C5< FW_LINK_DATA<0..7> 57A5> GPU_AGP_CBE<0..1> 54B7< INTCORE_DHT 47B5<> LCD_PWM 23D7< 29A8< MEM_DATA<32> 12C8<> 13C4<>
FBD<104> 18F5<> 19C5< FW_LINK_DATA<1> 34C4<> GPU_AGP_CBE<1> 17C6<> INTCORE_DL 47B6<> LCD_PWM_FILT 29A5<> 59A8> MEM_DATA<33> 12C8<> 13C4<>
FBD<105> 18F5<> 19C5< FW_LINK_DATA<2> 34C4<> GPU_AGP_CBE<2> 17C6<> INTCORE_GND 47A7<> LED_5V 29A8< 52B3> MEM_DATA<34> 12C8<> 13C4<>
FBD<106> 18F5<> 19B5< FW_LINK_DATA<3> 34C4<> GPU_AGP_CBE<2..3> 54B7< INTCORE_OCSET 47B6<> LED_5V_FILT 29A5<> 52B3> 59A8> MEM_DATA<35> 12C8<> 13C4<>
FBD<107> 18F5<> 19B5< FW_LINK_DATA<4> 34C4<> GPU_AGP_CBE<3> 17C6<> INTCORE_OVP 47B6<> LED_RET 29A3< 51B6< 52B3> MEM_DATA<36> 12C8<> 13C4<>
FBD<108> 18F5<> 19B5< FW_LINK_DATA<5> 34C4<> GPU_AGP_DEVSEL_L 17B6<> 54B7< INTCORE_VCC 47C7< LED_RET_FILT 29A5<> 52A3> 59A8> MEM_DATA<37> 12C8<> 13C4<>
FBD<109> 18E5<> 19B5< FW_LINK_DATA<6> 34C4<> GPU_AGP_FRAME_L 17B6<> 54B7< INTREPID_ACS_REF 9A3< LED_ROMCS 30B3<> MEM_DATA<38> 12C8<> 13C4<>
FBD<110> 18E5<> 19B5< FW_LINK_DATA<7> 34C4<> GPU_AGP_IRDY_L 17B6<> 54B7< INTREPID_VPWR 47B6<> LED_ROMCS_L 30B4< MEM_DATA<39> 12C8<> 13C4<>
FBD<111> 18E5<> 19B5< FW_LINK_LREQ 34C4<> 57A5> GPU_AGP_PAR 17B6<> 54B7< INTREPID_VPWRA 47B4<> LED_ROMCS_LIGHT 30A3< MEM_DATA<40> 12B8<> 13C4<>
FBD<112> 18E5<> 19B5< FW_LPS 34C4<> 36C8< GPU_AGP_PIPE_L 17B6<> 54A7< INTREPID_VSENSE 47C6<> 59C8> LID_SWITCH 29B2<> 44C4<> MEM_DATA<41> 12B8<> 13C4<>
FBD<113> 18E5<> 19B5< FW_LREQ 34C3< 36C8< 57A5> GPU_AGP_RBF_L 17B6<> 54A7< INTREP_DLT 47B5<> LINA 39C4< 40C2< MEM_DATA<42> 12B8<> 13C4<>
FBD<114> 18E5<> 19B5< FW_PHY_3_3 36B5< 36B7< 36D7< 36D7< 52B6> GPU_AGP_SBA<0> 17A6<> INT_AGPPVT 16C6<> LINEOUT_COMM2 59B6> MEM_DATA<43> 12B8<> 13C4<>
FBD<115> 18E5<> 19B5< FW_PHY_CNTL0 36C7<> 57A5> GPU_AGP_SBA<0..7> 54A7< INT_AGP_FB_IN 16C6< 54A7< LINE_IN_COM 40B7<> 59B6> MEM_DATA<44> 12B8<> 13C4<>
FBD<116> 18E5<> 19B5< FW_PHY_CNTL1 36C7<> 57A5> GPU_AGP_SBA<1> 17A6<> INT_AGP_FB_OUT 16C6<> 54A7< LINE_IN_L 40B7<> 40C7<> 59B6> MEM_DATA<45> 12B8<> 13C4<>
FBD<117> 18E5<> 19B5< FW_PHY_D<0> 36C7<> GPU_AGP_SBA<2> 17A6<> INT_AGP_VREF 16A7< 16C6<> 52C3> LINE_IN_R 40B6<> 40B7<> 59B6> MEM_DATA<46> 12B8<> 13C4<>
FBD<118> 18E5<> 19B5< FW_PHY_D<0..7> 57A5> GPU_AGP_SBA<3> 17A6<> INT_ANALYZER_CLK 8A2< 9B4< 16C7< 54A7< 56B3> 59A8> LINE_IN_SENSE 40B7<> 40C7<> 59B6> MEM_DATA<47> 12B8<> 13C4<>
FBD<119> 18E5<> 19B5< FW_PHY_D<1> 36C7<> GPU_AGP_SBA<4> 17A6<> LINE_OUT_L 59B6> MEM_DATA<48> 12B8<> 13B3<>
B FBD<120>
FBD<121>
18E5<> 19B5<
18E5<> 19B5<
FW_PHY_D<2>
FW_PHY_D<3>
36B7<>
36B7<>
GPU_AGP_SBA<5>
GPU_AGP_SBA<6>
17A6<>
17A6<>
INT_ANALYZER_CLKA 9B3<>
INT_CLOCK_OUT 8B2<> 56B3>
LINN
LINN1
42C5< 43D2<
43D2<
MEM_DATA<49>
MEM_DATA<50>
12B8<> 13B3<>
12B8<> 13B3<>
B
FBD<122> 18E5<> 19B5< FW_PHY_D<4> 36B7<> GPU_AGP_SBA<7> 17A6<> INT_CPU_FB_IN 9B3< 56C3> LINP 42C5< 43D4< MEM_DATA<51> 12B8<> 13B3<>
FBD<123> 18E5<> 19B5< FW_PHY_D<5> 36B7<> GPU_AGP_SB_STB 17B6<> 54A7< INT_CPU_FB_OUT 9B3<> 56C3> LINSENSE 40C5< MEM_DATA<52> 12B8<> 13B3<>
FBD<124> 18E5<> 19B5< FW_PHY_D<6> 36B7<> GPU_AGP_SB_STB_L 17A6<> 54A7< INT_ENET_RST_L 28B5<> 28D1< 35B8< LOW_PWR 35A5< 35B4< MEM_DATA<53> 12B8<> 13B3<>
FBD<125> 18E5<> 19B5< FW_PHY_D<7> 36B7<> GPU_AGP_STOP_L 17B6<> 54B7< INT_EXTINT3_PU 28B5<> 28B8< LO_T1 41A4< MEM_DATA<54> 12B8<> 13B3<>
FBD<126> 18E5<> 19B5< FW_PHY_ISO* 36C6< GPU_AGP_TRDY_L 17B6<> 54B7< INT_EXTINT12_PU 28B5<> 28B8< LP4202P2 40C5< MEM_DATA<55> 12B8<> 13B3<>
FBD<127> 18E5<> 19B5< FW_PHY_RST 36C8< GPU_AGP_VREF 17A2< 17A8< 52A6> INT_EXTINT13_PU 28B5<> 28B8< LP4202P3 40B5< MEM_DATA<56> 12B8<> 13B3<>
FBDQM<0> 18D8> 18G3< FW_PHY_RST* 36C6< GPU_AGP_VREF_H 16A7< INT_EXTINT17_PU 28B5<> 28B8< 32B6> LP4202P4 40B5< MEM_DATA<57> 12B8<> 13B3<>
FBDQM<0..7> 55D3> FW_PHY_SCLK 36C7<> 57A5> GPU_AGP_VREF_L 16A7< INT_GPIO1_PD 28A8< 28C5<> LPL1 41D6< MEM_DATA<58> 12B8<> 13B3<>
FBDQM<1> 18D8> 18G3< FW_PINT 34B5<> 34C1< GPU_AGP_VREF_X 17A2< INT_GPIO9_PU 28B5<> 28B8< LPR1 41C6< MEM_DATA<59> 12B8<> 13B3<>
FBDQM<2> 18D8> 18G3< FW_PWR 29B3< 36D6< 50C6<> 51D4<> 52B6> GPU_AGP_VREF_Y 17A2< INT_GPIO12_PU 28A8< 28B5<> LT1962_INT_ADJ 28D7< MEM_DATA<60> 12B8<> 13B3<>
FBDQM<3> 18D8> 18G3< FW_PWR_SW 36D6< 51D2<> 52B6> GPU_AGP_WBF_L 17B6<> INT_I2C_CLK0 14A6<> 15A6< 34B3< LT1962_INT_BYP 28D7<> MEM_DATA<61> 12B8<> 13B3<>
FBDQM<4> 18D8> 18G3< FW_R0 36C5<> GPU_FB_VREF 18C8< 52A6> INT_I2C_CLK0R 34B5<> 34C1< LT1962_INT_VIN 28D7<> MEM_DATA<62> 12B8<> 13B3<>
FBDQM<5> 18D8> 18G3< FW_R1 36C5<> GPU_FPBCLK 23C4<> INT_I2C_CLK1 34A3<> 34B1< M1FH 43B7<> MEM_DATA<63> 12B8<> 13B3<>
FBDQM<6> 18D8> 18G3< FW_SCLK 34C5<> 36C8< 57A5> GPU_FPBCLK_L 23C4<> INT_I2C_CLK2 28A3<> 28D1< 29C7<> 34B5< 39B1<> M1FL 43A7<> MEM_DQM<0> 12C6<> 13C8<>
FBDQM<7> 18D8> 18G3< FW_TPA1N 36C5<> 57A5> GPU_FW_PME_L 23C4<> 59A8> M1H 43B6<> 43B6<> MEM_DQM<0..7> 53D6<
FBDQM<8> 18D3< 18D5> FW_TPA1P 36C5<> 57A5> GPU_IFB1IOVDD 23B3< INT_I2C_DATA0 14A6<> 15A6< 34B3< M1HFILT 43B5< MEM_DQM<1> 12C6<> 13C8<>
FBDQM<8..15> 55C3> FW_TPA2N 36C5<> 57A5> GPU_IFP1PLLVDD 23B3< INT_I2C_DATA0R 34B5<> 34C1< M1L 43A6<> 43B6<> MEM_DQM<2> 12C6<> 13A6<>
FBDQM<9> 18D3< 18D5> FW_TPA2P 36C5<> 57A5> GPU_MBDET_L 17A6<> INT_I2C_DATA1 34A3<> 34B1< M1S 43A6<> 43B6<> MEM_DQM<3> 12C6<> 13A6<>
FBDQM<10> 18D3< 18D5> FW_TPB1 36B3< GPU_SS_XIN 22A7< INT_I2C_DATA2 28A3<> 28D1< 29C7<> 34B5< 39B1<> MAIN_RESET_L 17C8< 30B2< 31D4< 32A8< 44C4<> MEM_DQM<4> 12C6<> 13C4<>
FBDQM<11> 18D3< 18D5> FW_TPB1N 36C5<> 57A5> GPU_STEREO 23C4<> 59A8> 59A6> MEM_DQM<5> 12C6<> 13C4<>
FBDQM<12> 18D3< 18D5> FW_TPB1P 36C5<> 57A5> GPU_STRAP<0> 22B4<> 26A4< INT_JTAG_TEI 34B7< 34C1< MAIN_RESET_L_PU 31D3<> MEM_DQM<6> 12C6<> 13B3<>
FBDQM<13> 18D3< 18D5> FW_TPB2 36B4< GPU_STRAP<1> 22B4<> 26B3< INT_MEM_REF 12B6< MAIN_SUPPLY_LED 50D5< MEM_DQM<7> 12C6<> 13B3<>
FBDQM<14> 18C3< 18D5> FW_TPB2N 36C5<> 57A5> GPU_STRAP<2> 22B4<> 26D3< INT_MEM_VREF 12A8<> 14A1< MAXBUS_PWR_EN 46C7< MEM_DQS<0> 12C6<> 13C8<>
FBDQM<15> 18C3< 18D5> FW_TPB2P 36C5<> 57A5> GPU_STRAP<3> 22B4<> 26D3< INT_MOD_BITCLK 28A3<> 28A8< 28C6< MAX_PWR_ADJ 46C5<> MEM_DQS<0..7> 53D6<
FBDQS<0> 18C7<> 19A8< FW_TPI1N 36A8<> 36D1<> 57A5> GPU_SWAP_A 23C4<> INT_MOD_CLKOUT 28A3> 28A8< 28C6< MEMREFG1 20A5<> MEM_DQS<1> 12C6<> 13C8<>
FBDQS<0..7> 55C3> FW_TPI1P 36A8<> 36D1<> 57A5> GPU_SWAP_B 23C4<> INT_MOD_DTI 28A3< 28A8< 28C6< MEMREFG2 20A4<> MEM_DQS<2> 12C6<> 13A6<>
FBDQS<1> 18C7<> 19A8< FW_TPI2N 36A8<> 36C1<> 57A5> GPU_TESTMECLK 23C4<> INT_MOD_DTO 28A3> 28A8< 28C6< MEMREFG3 21A4<> MEM_DQS<3> 12C6<> 13A6<>
A FBDQS<2> 18C7<> 19A8< FW_TPI2P 36A8<> 36C1<> 57A5> GPU_TMDS_CKM 23C2< 23D3<> 57D2> INT_MOD_SYNC 28A3<> 28A8< 28C6< MEMREFG4 21A4<> MEM_DQS<4> 12C6<> 13C4<> A
FBDQS<3> 18C7<> 19A8< FW_TPO1N 36A8<> 36D1<> 57A5> GPU_TMDS_CKP 23C2< 23D3<> 57D2> INT_PCI_FB_IN 30C5< 54C7< MEMREFN1 18B8<> MEM_DQS<5> 12C6<> 13C4<>
FBDQS<4> 18C7<> 19A8< FW_TPO1P 36B8<> 36D1<> 57A5> GPU_TMDS_D0M 23C2< 23D3<> 57D2> INT_PCI_FB_OUT 30C5<> 54D7< MEMREFN2 18B7<> MEM_DQS<6> 12C6<> 13B3<>
FBDQS<5> 18C7<> 19A8< FW_TPO2N 36A8<> 36C1<> 57A5> GPU_TMDS_D0P 23C2< 23D3<> 57D2> INT_PEND_PROC_INT 28A5> 44B4<> MEM_ADDR<0> 12C3< 12D6<> MEM_DQS<7> 12C6<> 13B3<>
FBDQS<6> 18C7<> 19A8< FW_TPO2P 36A8<> 36C1<> 57A5> GPU_TMDS_D1M 23C2< 23D3<> 57D2> INT_PLL1_GND 28A5<> 28C4< MEM_ADDR<0..12> 53D6< MEM_MUXSEL_H<0..1> 53C6<
FBDQS<7> 18C7<> 19A8< FW_VGND 52B6> GPU_TMDS_D1P 23C2< 23D3<> 57D2> INT_PLL2_GND 28A5<> 28D4< MEM_ADDR<1> 12C3< 12D6<> MEM_MUXSEL_H<1> 12B6<>
FBDQS<8> 18D4<> 19A5< FW_VP 36D5< 52B6> GPU_TMDS_D2M 23C2< 23D3<> 57D2> INT_PLL3_GND 28A4<> 28D4< MEM_ADDR<2> 12C3< 12D6<> MEM_MUXSEL_L<0..1> 53C6<
FBDQS<8..15> 55B3> FW_VP1 36D1<> 36D3<> 52B6> GPU_TMDS_D2P 23C2< 23D3<> 57D2> INT_PLL4_GND 30C4<> 30D4< MEM_ADDR<3> 12D3< 12D6<> MEM_MUXSEL_L<1> 12B6<>
FBDQS<9> 18D4<> 19A5< FW_VP2 36C1<> 36D3<> 52B6> GPU_TMODE 17A5< 52A8> INT_PLL5_GND 16A5<> 16D5< MEM_ADDR<4> 12D3< 12D6<> MEM_RAS_L 12A3< 12C6<> 53C6<
FBDQS<10> 18D4<> 19A5< FW_VP_1 36D4< 52B6> GPU_XTALOUTBUFF 22A8< 22B4<> INT_PLL6_GND 9A2<> 9D3< MEM_ADDR<5> 12C2< 12D6<> MEM_WE_L 12B3< 12C6<> 53C6<
FBDQS<11> 18D4<> 19A5< FW_VP_2 36D4< 52B6> GPU_XTALSSIN 22A5< 22B2< 52A8> INT_PLL7_GND 28A4<> 28D4< MEM_ADDR<6> 12D2< 12D6<> MIC1 43B5<
61
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
MIC1S1 43A7<> NC_CPUCRUD<41> 5B7<> NC_FB2<2> 20B2<> NC_PCITR1 31B6< NC_WL<17> 31B3<> PCI_AD<20> 30B2< 30C4<> 31C6< 32C6<> 59B3>
MIC2 43B4< NC_CPUCRUD<42> 5B7<> NC_FB2<3> 20B2<> NC_PMON_OUT_L 4B3> NC_WL<18> 31B2<> PCI_AD<21> 30C4<> 31C7< 32C6<>
MIC3 43B4< NC_CPUCRUD<43> 5B7<> NC_FB2<4> 20B2<> NC_PMU_DL_10 29B2<> NC_WL<19> 31B3<> PCI_AD<22> 30C4<> 31C6< 32C6<> 59B3>
MIC4 43B3<> NC_CPUCRUD<44> 5B7<> NC_FB2<5> 20B2<> NC_PMU_DL_12 29B2<> NC_WL<20> 31B2<> PCI_AD<23> 30C4<> 31C7< 32C6<>
MIC5 43A3< NC_CPUCRUD<45> 5B7<> NC_FB2<6> 20B2<> NC_PPL* 44C6< NC_WL<21> 31B3<> PCI_AD<24> 30C1<> 30C4<> 31B6< 32C6<> 59B3>
MICHIGH 29A5<> 43B8< 58A5> 59A8> NC_CPUCRUD<46> 5B7<> NC_FB2<7> 20B2<> NC_RESET_BUTTON_L 8A8<> NC_WL<23> 31B3<> PCI_AD<25> 30C1<> 30C4<> 31B7< 32C6<>
MICLOW 29A5<> 43A8< 58A5> 59A8> NC_CPUCRUD<47> 5B7<> NC_FB2<8> 20B2<> NC_RFBA<12> 18E2< NC_XTLINO 39B4< PCI_AD<26> 30C1<> 30C4<> 31B6< 32B6<> 59B3>
MICSHLD 29A5<> 43A8< 58A5> 59A8> NC_CPUCRUD<48> 5B7<> NC_FB2<9> 20B1<> NC_RFBBA<12> 18A2< NEC_AVDD 32D5< 52A3> PCI_AD<27> 30C1<> 30C4<> 31B7< 32B7<>
MIC_FIX 43C5< NC_CPUCRUD<49> 5B7<> NC_FB2<10> 20B1<> NC_RF_DISABLE_L 59A6> NEC_XT2_B 32D3< PCI_AD<28> 30C1<> 30C4<> 31B6< 32B6<>
MIC_IN 39C4< 43B2< NC_CPUCRUD<50> 5B7<> NC_FB3<0> 21B6<> NC_ROMCS_L 18C8> NET18 44D6<> PCI_AD<29> 30C1<> 30C4<> 31B7< 32B6<>
MII_EN 35C4< NC_CPUCRUD<51> 5B7<> NC_FB3<1> 21B6<> NC_RP1PIN4 16B3< NET19 44D6<> PCI_AD<30> 30C1<> 30C4<> 31B6< 32B6<> 59B3>
D MODEM_USB_DM
MODEM_USB_DP
28B2< 29C5<> 58A5> 59B6>
28B2< 29C5<> 58A5> 59B6>
NC_CPUCRUD<52>
NC_CPUCRUD<53>
5B7<>
5B7<>
NC_FB3<2>
NC_FB3<3>
21B6<>
21B6<>
NC_RP1399
NC_RP2848
30B5<
28A8<
NET22
NET24
44D8<>
44D8<>
PCI_AD<31>
PCI_CBE<0>
30C1<> 30C4<> 31B7< 32B6<>
30C5<> 31B7< 32B6<> 59A6>
D
MON_DETECT 23D7<> 25C6< 59D6> NC_CPUCRUD<54> 5B7<> NC_FB3<4> 21B6<> NC_RP3319 28D3< NET32 42A5< PCI_CBE<3..0> 53A6<
MON_I2C_SCL 22D5<> 25B6< NC_CPUCRUD<55> 5B7<> NC_FB3<5> 21B6<> NC_RP3324_2 28C1< NET32_B 42A5<> PCI_CBE<1> 30C5<> 31B7< 32B6<>
MON_I2C_SDA 22D5<> 25B6< NC_CPUCRUD<56> 5B7<> NC_FB3<6> 21B6<> NC_RPT48P1 28D3< NET40 44B4<> PCI_CBE<2> 30C5<> 31B7< 32B6<>
MPIC_CPU_INT_L 4B3< 7A5< 8D7<> 28B5> NC_CPUCRUD<57> 5B7<> NC_FB3<7> 21B6<> NC_RPT77P6 28B8< NMI_BUTTON* 29B2<> 44C4<> 59D6> PCI_CBE<3> 30C5<> 31B7< 32B6<>
MPWRGD 48B7< 48B7< 49B5<> NC_CPUCRUD<58> 5B7<> NC_FB3<8> 21B6<> NC_SDOUT2 39C2> NV11_HSYNC 22C4<> 26D3< PCI_DEVSEL_L 30B7< 30C5<> 31B7< 32B6<> 54D7<
MR_FLO 45C5<> NC_CPUCRUD<59> 5B7<> NC_FB3<9> 21B5<> NC_SODIMM71 14C5<> NV11_VSYNC 22C4<> 26D3< 59A6>
MR_FLO_1 45B4<> NC_CPUCRUD<60> 5B7<> NC_FB3<10> 21B5<> NC_SODIMM72 14C4<> NV11_XTALIN 22B4<> 57D5> PCI_FBI_EQUAL 30C7< 54C7<
MUX_SEL_H 12D4< 13A3<> 13C4<> 53C6< NC_CPUCRUD<61> 5B7<> NC_FB4<0> 21B2<> NC_SODIMM73 14C5<> NV11_XTALOUT 22B4<> 57D5> PCI_FBI_PLUS2 30C8< 54C7<
MUX_SEL_L 12D4< 13A6<> 13C8<> 53C6< NC_CPUCRUD<62> 5B7<> NC_FB4<1> 21B2<> NC_SODIMM74 14C4<> NVAGP_TCLK 17A5<> PCI_FBO_PLUS2 30D8< 54D7<
M_SPD_WP 15A7< NC_CPUCRUD<63> 5B7<> NC_FB4<2> 21B2<> NC_SODIMM77 14C5<> NVAGP_TDI 17A5<> PCI_FB_PLUS4 30C8< 54C7<
M_VDDID 15A7< NC_CPUCRUD<64> 5B7<> NC_FB4<3> 21B2<> NC_SODIMM78 14C4<> NVAGP_TMS 17A5<> PCI_FB_PLUS6 30C7< 54C7<
NC_-10VUNREG 29C7<> NC_CPUCRUD<65> 5B7<> NC_FB4<4> 21B2<> NC_SODIMM79 14C5<> NVAGP_TRST_L 17A5<> PCI_FRAME_L 30B7< 30C5<> 31B7< 32B6<> 53A6<
NC_-12VREG 29C6<> NC_CPUCRUD<66> 5B7<> NC_FB4<5> 21B2<> NC_SODIMM80 14C4<> NVPLLVDD 22D5< 52A6> 59A6>
NC_AUDIO2MODEM 29C6<> NC_CPUCRUD<67> 5A7<> NC_FB4<6> 21B2<> NC_SODIMM83 14C5<> NV_BLUE2 22C1<> 22C1<> PCI_IRDY_L 30B7< 30C5<> 31B7< 32B6<> 54D7<
NC_AUDIO2MODEMRTN 29C6<> NC_CPUCRUD<68> 5A7<> NC_FB4<7> 21B2<> NC_SODIMM84 14C4<> NV_GPIOD0 23D4<> PCI_PAR 30C5<> 31B7< 32B6<> 54D7< 59A6>
NC_AUD_MODEM 29C6<> NC_CPUCRUD<69> 5A7<> NC_FB4<8> 21B2<> NC_SODIMM85 14C5<> NV_GPIOD2 23D4<> PCI_SLOTB_GNT_L 30B5< 30D5<> 31C2<> 59A6>
NC_AUD_MODEM_RTN 29C6<> NC_CPUCRUD<70> 5A7<> NC_FB4<9> 21B1<> NC_SODIMM86 14C4<> NV_GPIOD5 23D4<> PCI_SLOTB_REQ_L 30B7< 30D5<> 31C3<> 59A6>
NC_BIGDIMM9 15D6< NC_CPUCRUD<71> 5A7<> NC_FB4<10> 21B1<> NC_SODIMM89 14C5<> NV_GPIOD7 22A8< 23D5<> PCI_SLOTC_GNT_L 30B5< 30D5<>
NC_BIGDIMM10 15D6< NC_CPUCRUD<72> 5A7<> NC_FBACS1_L 18C8> NC_SODIMM91 14C5<> NV_GPIOD8 22A6< 23D5<> PCI_SLOTC_REQ_L 30B7< 30D5<>
NC_BIGDIMM44 15B6< NC_CPUCRUD<73> 5A7<> NC_FBBCS1_L 18C4<> NC_SODIMM97 14B5<> NV_GPIOD9 23C4<> PCI_SLOTD_GNT_L 30B5< 30D5<> 32B6<
NC_BIGDIMM45 15B6< NC_CPUCRUD<74> 5A7<> NC_FBDQS_L<0> 18C7<> NC_SODIMM98 14B4<> NV_GREEN2 22C1<> 22C1<> PCI_SLOTD_PERR_L 32B6<>
NC_BIGDIMM47 15B6< NC_CPUCRUD<75> 5A7<> NC_FBDQS_L<1> 18C7<> NC_SODIMM123 14B5<> NV_PCI_RST_L 17C7< PCI_SLOTD_REQ_L 30B7< 30D5<> 32B6>
NC_BIGDIMM49 15B6< NC_CPUCRUD<76> 5A7<> NC_FBDQS_L<2> 18C7<> NC_SODIMM124 14B4<> NV_RED2 22C1<> 22C1<> PCI_STOP_L 30B7< 30C5<> 31B7< 32B6<> 54D7<
NC_BIGDIMM51 15B6< NC_CPUCRUD<77> 5A7<> NC_FBDQS_L<3> 18C7<> NC_SODIMM199 14A5<> OGAL 41D7< 59A6>
NC_BIGDIMM71 15A6< NC_CPUCRUD<78> 5A7<> NC_FBDQS_L<4> 18C7<> NC_SODIMM200 14A4<> OGAR 41C7< PCI_TRDY_L 30B7< 30C5<> 31B7< 32B6<> 54D7<
NC_BIGDIMM101 15D4> NC_CPUCRUD<79> 5A7<> NC_FBDQS_L<5> 18C7<> NC_SODIMM201 14D5<> OGND3_JTAG_EN 35A5<> 59A6>
NC_BIGDIMM102 15D4> NC_CPUCRUD<80> 5A7<> NC_FBDQS_L<6> 18C7<> NC_SODIMM202 14A6<> OPA_STAR_GND 39A7<> 39D6< 40C2< 43A3< PGOOD 49B7< 49B7< 50A6>
NC_BIGDIMM103 15D4> NC_CPUCRUD<81> 5A7<> NC_FBDQS_L<7> 18C7<> NC_SW3V5V_33OUT 50C6< OPA_VREF 40B3< 43A4<> PG_E 45B6<
C NC_BIGDIMM113
NC_BIGDIMM134
15C4>
15C4>
NC_CPUCRUD<82>
NC_CPUCRUD<83>
5A7<>
5A7<>
NC_FBDQS_L<8>
NC_FBDQS_L<9>
18D4<>
18D4<>
NC_SYSCLK_DDRCLK_A2 12B4<
NC_SYSCLK_DDRCLK_A2_L 12B4<
OUT_R
OVDD_ADJ
59B6>
59C8>
PMURESETBUTTON* 44A4< 44A4< 59D6>
PMU_5V_SCL 44C3<>
C
NC_BIGDIMM135 15B4> NC_CPUCRUD<84> 5A7<> NC_FBDQS_L<10> 18D4<> NC_TAS_SDOUT1 39C2> PB_AUD 41B4< PMU_5V_SDA 44C3<>
NC_BIGDIMM140 15B4> NC_CPUCRUD<85> 5A7<> NC_FBDQS_L<11> 18D4<> NC_TESTMODE 8A4<> PB_GAL 41B4< PMU_ACK_L 28C3< 44C4<>
NC_BIGDIMM142 15B4> NC_CPUCRUD<86> 5A7<> NC_FBDQS_L<12> 18D4<> NC_TMDS_TXD3M 23C3> PCIT_AD<0> 31B2<> 31C6< PMU_AGP_RESET 44C4<>
NC_BIGDIMM144 15B4> NC_CPUCRUD<87> 5A7<> NC_FBDQS_L<13> 18D4<> NC_TMDS_TXD3P 23C3> PCIT_AD<31..0> 54C7< PMU_AP 29B3<> 44D4<>
NC_BIGDIMM163 15A4> NC_CPUCRUD<88> 5A7<> NC_FBDQS_L<14> 18D4<> NC_TMDS_TXD7M 23C3> PCIT_AD<1> 31B3<> 31C6< 59C3> PMU_AVCC 44B5< 44D4<> 52B3> 59C6>
NC_BIGDIMM167 15A4> NC_CPUCRUD<89> 5A7<> NC_FBDQS_L<15> 18D4<> NC_TMDS_TXD7P 23C3> PCIT_AD<2> 31B2<> 31C6< 59C3> PMU_BYTE 44B5<
NC_BIGDIMM173 15A4> NC_CPUDP<0> 5A4<> NC_FMAX7 8A8<> NC_TX1_1 35C3< PCIT_AD<3> 31B3<> 31C6< 59C3> PMU_CLK 28C3<> 44C4<>
NC_BRCLKO 28A5> NC_CPUDP<1> 5A4<> NC_FMAX8 8A8<> NC_TX1_2 35C3< PCIT_AD<4> 31B2<> 31C6< PMU_CLKIN 44B4<> 58A5>
NC_BS1 29B7<> NC_CPUDP<2> 5A4<> NC_FW_CNA 36B6> NC_TX1_3 35C2< PCIT_AD<5> 31B3<> 31C6< 59C3> PMU_CLKOUT 44B4<> 58A5>
NC_BS2 29B6<> NC_CPUDP<3> 5A4<> NC_GPU<0> 17A6<> NC_TX1_4 35C2< PCIT_AD<6> 31B2<> 31C6< PMU_CLKT 44B2<> 58A5>
NC_BS3 29D1<> NC_CPUDP<4> 5A4<> NC_GPU<1> 17A6<> NC_UB3P4 35D5<> PCIT_AD<7> 31B3<> 31C6< 59C3> PMU_CNVSS 29B3<> 44B5<
NC_BS4 29D1<> NC_CPUDP<5> 5A4<> NC_GPU<2> 17A6<> NC_USB2_AMC 32A4< PCIT_AD<8> 31B3<> 31C6< 59C3> PMU_EPM* 29B3<> 44C4<>
NC_BT1 29D2<> NC_CPUDP<6> 5A4<> NC_GPU<3> 17A6<> NC_USB2_NANDTEST 32A4< PCIT_AD<9> 31B2<> 31C6< PMU_FROM_INT 28C3<> 44C4<>
NC_BT3 29D2<> NC_CPUDP<7> 5A4<> NC_GPU<4> 17A6<> NC_USB2_NTEST1 32A4< PCIT_AD<10> 31B3<> 31C6< 59C3> PMU_IIC_CLK 44A8< 44B4<>
NC_BT4 29D2<> NC_CPU_CLKOUT 4D3> NC_GPULPS 23C4<> NC_USB2_PPON1 32B4> PCIT_AD<11> 31B2<> 31C6< PMU_IIC_DAT 44A8< 44B4<>
NC_BT5 29D2<> NC_CSLOT_ADDR<3> 37B7> NC_GPU_DBI_LO 17B6<> NC_USB2_PPON2 32B4> PCIT_AD<12> 31B3<> 31C6< 59C3> PMU_INT_L 28B5<> 28B8< 44B5<>
NC_BT6 29D2<> NC_CSLOT_ADDR<4> 37A7> NC_GPU_INTB_L 17B6<> NC_USB2_PPON3 32B4> PCIT_AD<13> 31B2<> 31C6< PMU_INT_NMI 28A8< 28B5<> 44C4<>
NC_BUF_RST 22B5> NC_CSLOT_ADDR<5> 37A7> NC_GPU_THERMA 23C4<> NC_USB2_PPON4 32B4> PCIT_AD<14> 31C3<> 31C6< 59B3> PMU_LOW_DSKTP 44B5<>
NC_CBUS_INT_L 28A8< NC_CSLOT_ADDR<6> 37A7> NC_GPU_THERMC 23C4<> NC_USB2_PPON5 32B4> PCIT_AD<15> 31C2<> 31C6< PMU_NMI 44B4<>
NC_CLK33M_PCI_SLOTC 30D7< NC_CSLOT_ADDR<7> 37A7> NC_IFP1RSET 23B3<> NC_USB2_RSDEM 32C4> PCIT_AD<16> 31C2<> 31C6< PMU_P64 29B2<> 44C2<>
NC_CLKENET_LINK_GTX 34C6> NC_CSLOT_ADDR<8> 37A7> NC_IFP1VREF 23B3<> NC_USB2_RSDEP 32C4> PCIT_AD<17> 31C3<> 31C7< 59B3> PMU_PME_L 28B5<> 31C2< 32A8< 44B2<> 59A6>
NC_CPUAP<0> 4B7<> NC_CSLOT_ADDR<9> 37A7> NC_INPA 39C2> NC_USB2_RSDFM 32C4> PCIT_AD<18> 31C2<> 31C6< PMU_PME_LL 31C2<>
NC_CPUAP<1> 4B7<> NC_CSLOT_CE1_L 37C7> NC_INT_TST_MONOUT_TP 34B6> NC_USB2_RSDFP 32B4> PCIT_AD<19> 31C3<> 31C7< 59B3> PMU_POWER 29C3<> 44A5<> 44B1< 44C2< 44D5<>
NC_CPUAP<2> 4B7<> NC_CSLOT_CE2_L 37C7> NC_JTAG7 8A4<> NC_USB2_SMC 32A4< PCIT_AD<20> 31C2<> 31C7< 52B3>
NC_CPUAP<3> 4B7<> NC_CSLOT_IORD_L 37C7> NC_JTAG10 8A3<> NC_USB2_SMI_L 32A6> PCIT_AD<21> 31C3<> 31C6< 59B3> PMU_PRE_PLLSTOP 44B5<>
NC_CPUAP<4> 4B7<> NC_CSLOT_IOWR_L 37C7> NC_LCENABLE 8A4<> NC_USB2_SRCLK 32A4> PCIT_AD<22> 31C2<> 31C7< PMU_PWR_LED* 44C5<>
NC_CPUCRUD<0> 5D7<> NC_CSLOT_OE_L 37B7> NC_MEM_MUXSEL_H<0> 12B6<> NC_USB2_SRDTA 32A4<> PCIT_AD<23> 31C3<> 31C6< 59B3> PMU_REQ_L 28A8< 28C3> 44C2
NC_CPUCRUD<2>
5D7<>
5D7<>
NC_CSLOT_WE_L
NC_DAA_CLKOUT
37B7>
29C7<>
NC_MEM_MUXSEL_L<0> 12B6<>
NC_MODEM_DETECT_L 29C7<>
NC_USB2_SRMOD
NC_USB2_TEB
32A4<
32A4<
PCIT_AD<24>
PCIT_AD<25>
31B7< 31C2<>
31B6< 31C3<> 59B3>
PMU_RST*
PMU_SMB_SCK
8A8<> 29B3<> 44A5<> 44B5<> 59D6>
44A3<>
B
NC_CPUCRUD<3> 5D7<> NC_DAA_LOADOUT 29C7<> NC_NVAGP_TDO 17A5<> NC_USB2_TEST 32A4< PCIT_AD<26> 31B7< 31C2<> PMU_SMB_SDA 44A3<>
NC_CPUCRUD<4> 5D7<> NC_DACC_BLU 22C4> NC_P00_D0 44D5<> NC_USB_M 31B2<> PCIT_AD<27> 31B6< 31C3<> 59B3> PMU_STRAP1 44C5<>
NC_CPUCRUD<5> 5D7<> NC_DACC_GRN 22C4> NC_P01_D1 44D5<> NC_USB_P 31B2<> PCIT_AD<28> 31B7< 31C2<> 59B3> PMU_TO_INT 28C3<> 44C4<>
NC_CPUCRUD<6> 5D7<> NC_DACC_RED 22C4> NC_P02_D2 44C5<> NC_UT6P6 28D8<> PCIT_AD<29> 31B6< 31C3<> 59B3> PMU_XI 44B5< 58A5>
NC_CPUCRUD<7> 5D7<> NC_DACC_RSET 22C4> NC_P03_D3 44C5<> NC_UT6P7 28D8<> PCIT_AD<30> 31B7< 31C2<> PMU_XO 44B5< 58A5>
NC_CPUCRUD<8> 5D7<> NC_DFPCLK 23C3> NC_P04_D4 44C5<> NC_UT164 44D7<> PCIT_AD<31> 31B6< 31C3<> 59B3> PMU_XT 44A6< 58A5>
NC_CPUCRUD<9> 5D7<> NC_DFPCLK* 23C3> NC_P05_D5 44C5<> NC_UT165 44D7<> PCIT_CBE<0> 31B2<> 31B6< POWERUP_OK 44B4<>
NC_CPUCRUD<10> 5D7<> NC_DFPD0 23C3> NC_P6_D6 44C5<> NC_VCORE10 45D6< PCIT_CBE<31..0> 54C7< POWER_UP* 44C7<> 51A8< 59D6>
NC_CPUCRUD<11> 5D7<> NC_DFPD1 23C3> NC_P07_D7 44C5<> NC_VIPHCLK 22D5> PCIT_CBE<1> 31B6< 31C3<> 59A6> PRESPK_LOUTN 42C7<
NC_CPUCRUD<12> 5D7<> NC_DFPD2 23C3> NC_P10_D8 44C5<> NC_VR4 39D6< PCIT_CBE<2> 31B6< 31C3<> 59A6> PRESPK_LOUTP 42C7<
NC_CPUCRUD<13> 5D7<> NC_DFPD3 23C3> NC_P11_D9 44C5<> NC_VTT<0> 18G7< PCIT_CBE<3> 31B6< 31C3<> 59A6> PRESPK_ROUTN 42C3<
NC_CPUCRUD<14> 5D7<> NC_DFPD5 23C3> NC_P14_D12 44C5<> NC_VTT<1> 18G7< PCIT_DEVSEL_L 31B6< 31C2<> 54C7< PRESPK_ROUTP 42C3<
NC_CPUCRUD<15> 5D7<> NC_DFPD6 23C3> NC_P20_A0_D0 44C5<> NC_VTT<2> 18G7< PCIT_FRAME_L 31B6< 31C2<> 54C7< PROBE_DIV 41B4< 41D7<
NC_CPUCRUD<16> 5D7<> NC_ENET_LINK_TXD<4> 34C6> NC_P21_A1_D1_D0 44C5<> NC_VTT<3> 18G7< PCIT_IRDY_L 31B6< 31C3<> 54C7< 59B6> PSEUDO_STAR_GND 39B7<> 40B4<
NC_CPUCRUD<17> 5C7<> NC_ENET_LINK_TXD<5> 34C6> NC_P22_A2_D2_D1 44C5<> NC_VTT<4> 18G7< PCIT_PAR 31B6< 31C2<> 54C7< PWR_FAIL* 44B1<> 50D5<
NC_CPUCRUD<18> 5C7<> NC_ENET_LINK_TXD<6> 34C6> NC_P23_A3_D3_D2 44C5<> NC_VTT<5> 18G7< PCIT_STOP_L 31B6< 31C2<> 54C7< PWR_FAILPMU* 44B4<>
NC_CPUCRUD<19> 5C7<> NC_ENET_LINK_TXD<7> 34C6> NC_P24_A4_D4_D3 44C5<> NC_VTT<6> 18G7< PCIT_TRDY_L 31B6< 31C2<> 54C7< PWR_FAIL_T 50D6<>
NC_CPUCRUD<20> 5C7<> NC_EXT_TMDS_CKM 23C3> NC_P25_A5_D5_D4 44C5<> NC_VTT<7> 18G7< PCI_AD<0> 30C2< 30D4<> 31C7< 32C6<> 59C3> PWR_LED 51A4<
NC_CPUCRUD<21> 5C7<> NC_EXT_TMDS_CKP 23C3> NC_P26_A6_D6_D5 44C5<> NC_VTT<8> 18G7< PCI_AD<31..0> 53A6< PWR_SWITCH* 8A8<> 44B1< 44C5<> 59D6> 59D6>
NC_CPUCRUD<22> 5C7<> NC_EXT_TMDS_D0M 23C3> NC_P27_A7_D7_D6 44C5<> NC_VTT<9> 18F7< PCI_AD<1> 30C2< 30D4<> 31C7< 32C6<> PWR_UP 39C8< 42D8< 50C3< 50C8< 51C6<
NC_CPUCRUD<23> 5C7<> NC_EXT_TMDS_D0P 23C3> NC_P33_A11 44B5<> NC_VTT<10> 18F7< PCI_AD<2> 30C2< 30D4<> 31C7< 32C6<> 59D6>
NC_CPUCRUD<24> 5C7<> NC_EXT_TMDS_D1M 23C3> NC_P34_A12 44B5<> NC_VTT<11> 18F7< PCI_AD<3> 30C2< 30D4<> 31C7< 32C6<> PWR_UP* 50D7<>
NC_CPUCRUD<25> 5C7<> NC_EXT_TMDS_D1P 23C3> NC_P35_A13 44B5<> NC_WL<1> 31B3<> PCI_AD<4> 30C2< 30D4<> 31C7< 32C6<> 59C3> Q1P1 51C3<
NC_CPUCRUD<26> 5C7<> NC_EXT_TMDS_D2M 23C3> NC_P36_A14 44B5<> NC_WL<2> 31B2<> PCI_AD<5> 30C2< 30D4<> 31C7< 32C6<> Q1P3 51D3<
NC_CPUCRUD<27> 5C7<> NC_EXT_TMDS_D2P 23C3> NC_P37_A15 44B5<> NC_WL<3> 31B3<> PCI_AD<6> 30C2< 30D4<> 31C7< 32C6<> 59C3> Q2_GATE 42D7<
NC_CPUCRUD<28> 5C7<> NC_FB1<0> 20B6<> NC_P43_A19 44B5<> NC_WL<4> 31B2<> PCI_AD<7> 30C2< 30D4<> 31C7< 32C6<> Q25_1 41A5<
NC_CPUCRUD<29> 5C7<> NC_FB1<1> 20B6<> NC_P45_CS1_L 44B5<> NC_WL<5> 31B3<> PCI_AD<8> 30C2< 30D4<> 31C7< 32C6<> Q42P4 51D3<>
A NC_CPUCRUD<30> 5C7<> NC_FB1<2> 20B6<> NC_P74_TA2OUT_W 44C4<> NC_WL<6> 31B2<> PCI_AD<9> 30C2< 30D4<> 31C7< 32C6<> 59C3> QT1P1 48A4<> A
NC_CPUCRUD<31> 5C7<> NC_FB1<3> 20B6<> NC_P75_TA2IN_W 44C4<> NC_WL<7> 31B3<> PCI_AD<10> 30C2< 30C4<> 31C7< 32C6<> QT2P1 48B4<>
NC_CPUCRUD<32> 5C7<> NC_FB1<4> 20B6<> NC_P76_TA3OUT 44C4<> NC_WL<8> 31B2<> PCI_AD<11> 30B2< 30C4<> 31C7< 32C6<> 59C3> QT2P3 48B4<>
NC_CPUCRUD<33> 5C7<> NC_FB1<5> 20B6<> NC_P77_TA3IN 44C4<> NC_WL<9> 31B3<> PCI_AD<12> 30B2< 30C4<> 31C7< 32C6<> R264P2 39B4<
NC_CPUCRUD<34> 5C7<> NC_FB1<6> 20B6<> NC_P92_TB2IN_SOUT3 44B4<> NC_WL<10> 31B2<> PCI_AD<13> 30B2< 30C4<> 31C7< 32C6<> 59C3> RAM_ADDR<0> 12C3< 14B4<> 15B6<
NC_CPUCRUD<35> 5C7<> NC_FB1<7> 20B6<> NC_P93_DA0_TB3IN 44B4<> NC_WL<11> 31B3<> PCI_AD<14> 30B2< 30C4<> 31C7< 32C6<> RAM_ADDR<0..12> 53D6<
NC_CPUCRUD<36> 5C7<> NC_FB1<8> 20B6<> NC_P96_ANEX0_CLK4 44B4<> NC_WL<12> 31B2<> PCI_AD<15> 30B2< 30C4<> 31C7< 32C6<> 59B3> RAM_ADDR<1> 12C3< 14B6<> 15B6<
NC_CPUCRUD<37> 5C7<> NC_FB1<9> 20B5<> NC_P103_AN3 44B4<> NC_WL<13> 31B3<> PCI_AD<16> 30B2< 30C4<> 31C7< 32C6<> 59B3> RAM_ADDR<2> 12C3< 14B4<> 15C6<
NC_CPUCRUD<38> 5C7<> NC_FB1<10> 20B5<> NC_PCIR0 31B7< NC_WL<14> 31B2<> PCI_AD<17> 30B2< 30C4<> 31C6< 32C6<> RAM_ADDR<3> 12D3< 14B6<> 15C4>
NC_CPUCRUD<39> 5C7<> NC_FB2<0> 20B2<> NC_PCIR1 31B7< NC_WL<15> 31B3<> PCI_AD<18> 30B2< 30C4<> 31C7< 32C6<> 59B3> RAM_ADDR<4> 12D3< 14B4<> 15C6<
NC_CPUCRUD<40> 5C7<> NC_FB2<1> 20B2<> NC_PCITR0 31B6< NC_WL<16> 31B2<> PCI_AD<19> 30B2< 30C4<> 31C6< 32C6<> RAM_ADDR<5> 12C1< 14B6<> 15C6<
62
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
RAM_ADDR<6> 12D1< 14B4<> 15C4> RAM_DATA_B<21> 13A5<> 15C4> RFBACLK1 19D1< 20C2< 55C3> RFBD<78> 19B7< 21C5<> RT373P1 51A5< SYSCLK_CPU_UF 9A3<> 56C3>
RAM_ADDR<7> 12D3< 14B6<> 15C6< RAM_DATA_B<22> 13A5<> 15C4> RFBACLK1_L 19D1< 20C2< 55C3> RFBD<79> 19B7< 21C5<> RT401P1 47C5<> SYSCLK_DDRCLK_A0 12C4< 14D6<> 53C6<
RAM_ADDR<8> 12D1< 14B4<> 15C4> RAM_DATA_B<23> 13A5<> 15C4> RFBACS0_L 18F2<> 20B2< 20B6< 55C3> RFBD<80> 19B7< 21C5<> RT406P2 47B3<> SYSCLK_DDRCLK_A0_L 12C4< 14D6<> 53C6<
RAM_ADDR<9> 12C3< 14B6<> 15C6< RAM_DATA_B<24> 13A5<> 15C6< RFBARAS_L 18G2<> 20B2< 20B6< 55D3> RFBD<81> 19B7< 21C5<> RT418P2 50C7< SYSCLK_DDRCLK_A0_L_UF 12B6<> 53C6<
RAM_ADDR<10> 12C3< 14B6<> 15B4> RAM_DATA_B<25> 13A5<> 15C6< RFBAWE_L 18F2<> 20B2< 20B6< 55D3> RFBD<82> 19B7< 21C5<> RUNLED1 51C8< SYSCLK_DDRCLK_A0_UF 12B6<> 53C6<
RAM_ADDR<11> 12B3< 14B4<> 15C4> RAM_DATA_B<26> 13A5<> 15C6< RFBBA<0> 18C2<> 21D2< 21D6< RFBD<83> 19B7< 21C5<> RUNSS 50C8< 50D3< SYSCLK_DDRCLK_A1 12C4< 14A4<> 53C6<
RAM_ADDR<12> 12D1< 14B6<> 15C4> RAM_DATA_B<27> 13A5<> 15C6< RFBBA<0..11> 55C3> RFBD<84> 19B7< 21C5<> S3700P1 44A1<> SYSCLK_DDRCLK_A1_L 12B4< 14A4<> 53C6<
RAM_BA<0> 12B3< 14B6<> 15B6< RAM_DATA_B<28> 13A5<> 15C4> RFBBA<1> 18B2<> 21C2< 21C6< RFBD<85> 19B7< 21C5<> S3700P2 44A1<> SYSCLK_DDRCLK_A1_L_UF 12B6<> 53C6<
RAM_BA<0..1> 53D6< RAM_DATA_B<29> 13A5<> 15C4> RFBBA<2> 18B2<> 21C2< 21C6< RFBD<86> 19B7< 21C5<> SB1P1 44A3< SYSCLK_DDRCLK_A1_UF 12B6<> 53C6<
RAM_BA<1> 12B3< 14B4<> 15B6< RAM_DATA_B<30> 13A5<> 15C4> RFBBA<3> 18B2<> 21C2< 21C6< RFBD<87> 19B7< 21C5<> SENSE+ 45C6< SYSCLK_DDRCLK_A2_L 53B6<
RAM_CAS_L 12A2< 14B4<> 15B6< 53C6< RAM_DATA_B<31> 13A5<> 15C4> RFBBA<4> 18B2<> 21C2< 21C6< RFBD<88> 19B7< 21C5<> SENSE+_1 45B5< 45C7< SYSCLK_DDRCLK_A2_L_UF 12B6<> 53B6<
D RAM_CKE<0>
RAM_CKE<0..1>
12C1< 14B4<> 15C1<
53C6<
RAM_DATA_B<32>
RAM_DATA_B<33>
13C4<> 15B6<
13C4<> 15B6<
RFBBA<5>
RFBBA<6>
18B2<> 21C2< 21C6<
18B2<> 21C2< 21C6<
RFBD<89>
RFBD<90>
19B7< 21C5<>
19B7< 21B5<>
SENSE-
SENSE-_1
45C6< 45C8<>
45B5< 45C7<
SYSCLK_DDRCLK_A2_UF 12B6<> 53C6<
SYSCLK_DDRCLK_B0 12B4< 15B4> 53B6<
D
RAM_CKE<1> 12B1< 14B6<> 15C1< RAM_DATA_B<34> 13C4<> 15B6< RFBBA<7> 18B2<> 21C2< 21C6< RFBD<91> 19B7< 21B5<> SGRAVREF 20A3< 20C4< 20C8< 52A6> SYSCLK_DDRCLK_B0_L 12B4< 15B3> 53B6<
RAM_CKE<2> 12C1< 15B1< 15C6< RAM_DATA_B<35> 13C4<> 15B6< RFBBA<8> 18B2<> 21C2< 21C6< RFBD<92> 19B7< 21B5<> SGRBVREF 21A3< 21C4< 21C8< 52A6> SYSCLK_DDRCLK_B0_L_UF 12B6<> 53B6<
RAM_CKE<2..3> 53C6< RAM_DATA_B<36> 13C4<> 15B4> RFBBA<9> 18B2<> 21C2< 21C6< RFBD<93> 19B7< 21B5<> SHS 50C7< SYSCLK_DDRCLK_B0_UF 12B6<> 53B6<
RAM_CKE<3> 12B1< 15A1< 15C4> RAM_DATA_B<37> 13C4<> 15B4> RFBBA<10> 18B2<> 21C2< 21C6< RFBD<94> 19B7< 21B5<> SI_EDGE 27C5< SYSCLK_DDRCLK_B1 12A4< 15D6< 53B6<
RAM_CS_L<0> 12C1< 14B6<> RAM_DATA_B<38> 13C4<> 15B4> RFBBA<11> 18B2<> 21C2< 21C6< RFBD<95> 19B7< 21B5<> SI_EXT_SWING_SET 27B3<> SYSCLK_DDRCLK_B1_L 12A4< 15C6< 53B6<
RAM_CS_L<0..1> 53C6< RAM_DATA_B<39> 13C4<> 15B4> RFBBBA<0> 18A2<> 21C2< 21C6< RFBD<96> 19C4< 21C1<> SI_I2C_OFF 27C5< SYSCLK_DDRCLK_B1_L_UF 12B6<> 53B6<
RAM_CS_L<1> 12C1< 14B4<> RAM_DATA_B<40> 13C4<> 15B6< RFBBBA<0..1> 55C3> RFBD<97> 19C4< 21C1<> SI_IDCK_M 27B5< SYSCLK_DDRCLK_B1_UF 12B6<> 53B6<
RAM_CS_L<2> 12B1< 15B4> RAM_DATA_B<41> 13C4<> 15B6< RFBBBA<1> 18A2<> 21C2< 21C6< RFBD<98> 19C4< 21C1<> SI_SCA 23D2< 27C5< SYSCLK_DDRCLK_B2 12A4< 15A6< 53B6<
RAM_CS_L<2..3> 53C6< RAM_DATA_B<42> 13C4<> 15A6< RFBBCAS_L 18C2<> 21B2< 21B6< 55B3> RFBD<99> 19C4< 21C1<> SI_SCL 23D2< 27C5< SYSCLK_DDRCLK_B2_L 12A4< 15A6< 53B6<
RAM_CS_L<3> 12B1< 15B4> RAM_DATA_B<43> 13C4<> 15A6< RFBBCKE 18A2<> 21C2< 21C6< 55B3> RFBD<100> 19C4< 21C1<> SI_TMDS_CKM 27C3<> 57C2> SYSCLK_DDRCLK_B2_L_UF 12B6<> 53B6<
RAM_DATA_A<0> 13D7<> 14D6<> RAM_DATA_B<44> 13C4<> 15B4> RFBBCLK0 19B1< 21C6< 55B3> RFBD<101> 19C4< 21C1<> SI_TMDS_CKP 27C3<> 57C2> SYSCLK_DDRCLK_B2_UF 12B6<> 53B6<
RAM_DATA_A<0..63> 53D6< RAM_DATA_B<45> 13C4<> 15B4> RFBBCLK0_L 19B1< 21C6< 55B3> RFBD<102> 19C4< 21C1<> SI_TMDS_D0M 27C3<> 57C2> SYSCLK_LA 8A2< 8D8<> 56B3>
RAM_DATA_A<1> 13D7<> 14D6<> RAM_DATA_B<46> 13B4<> 15A4> RFBBCLK1 19C1< 21C2< 55B3> RFBD<103> 19C4< 21C1<> SI_TMDS_D0P 27C3<> 57C2> SYSTEM_CLK_EN 28A5< 44C4<>
RAM_DATA_A<2> 13D7<> 14D6<> RAM_DATA_B<47> 13B4<> 15A4> RFBBCLK1_L 19B1< 21C2< 55B3> RFBD<104> 19C4< 21C1<> SI_TMDS_D1M 27C3<> 57C2> TAS_DVDD 39D3<
RAM_DATA_A<3> 13D7<> 14D6<> RAM_DATA_B<48> 13B2<> 15A6< RFBBCS0_L 18C2<> 21B2< 21B6< 55B3> RFBD<105> 19C4< 21C1<> SI_TMDS_D1P 27C3<> 57C2> TAS_PWR_DOWN 39B4< 39D7<
RAM_DATA_A<4> 13D7<> 14D4<> RAM_DATA_B<49> 13B2<> 15A6< RFBBRAS_L 18C2<> 21B2< 21B6< 55B3> RFBD<106> 19B4< 21C1<> SI_TMDS_D2M 27C3<> 57C2> TAS_STAR_GND 39A7<> 39D2<
RAM_DATA_A<5> 13D7<> 14D4<> RAM_DATA_B<50> 13B2<> 15A6< RFBBWE_L 18C2<> 21B2< 21B6< 55B3> RFBD<107> 19B4< 21C1<> SI_TMDS_D2P 27C3<> 57C2> TAS_VCOM 39B1<> 39B1<> 43D5<
RAM_DATA_A<6> 13D7<> 14D4<> RAM_DATA_B<51> 13B2<> 15A6< RFBD<0> 19D7< 20C5<> RFBD<108> 19B4< 21C1<> SI_VREF 27B3< TCKM 24C3<> 57C5>
RAM_DATA_A<7> 13D7<> 14D4<> RAM_DATA_B<52> 13B2<> 15A4> RFBD<0..63> 55D3> RFBD<109> 19B4< 21C1<> SLEEP 44B5<> 50C2< 59C6> TCKP 24C4<> 57C5>
RAM_DATA_A<8> 13C7<> 14D6<> RAM_DATA_B<53> 13B2<> 15A4> RFBD<1> 19D7< 20C5<> RFBD<110> 19B4< 21C1<> SLEEP1 51A8< TD0M 24C4<> 57C5>
RAM_DATA_A<9> 13C7<> 14D6<> RAM_DATA_B<54> 13B2<> 15A4> RFBD<2> 19D7< 20C5<> RFBD<111> 19B4< 21C1<> SLEEP2 51A7< TD0P 24C3<> 57C5>
RAM_DATA_A<10> 13C7<> 14D6<> RAM_DATA_B<55> 13B2<> 15A4> RFBD<3> 19D7< 20C5<> RFBD<112> 19B4< 21C1<> SLEEPLED_TERM 51A6< TD1M 24C3<> 57C5>
RAM_DATA_A<11> 13C7<> 14D6<> RAM_DATA_B<56> 13B2<> 15A6< RFBD<4> 19D7< 20C5<> RFBD<113> 19B4< 21C1<> SLEEP_LED_BD 51A6< TD1P 24C4<> 57C5>
RAM_DATA_A<12> 13C7<> 14D4<> RAM_DATA_B<57> 13A2<> 15A6< RFBD<5> 19D7< 20C5<> RFBD<114> 19B4< 21C1<> SLEEP_OFF_L 51B6< 51C7< TD2M 24C4<> 57C5>
RAM_DATA_A<13> 13C7<> 14D4<> RAM_DATA_B<58> 13A2<> 15A6< RFBD<6> 19D7< 20C5<> RFBD<115> 19B4< 21C1<> SLEEP_OFF_L2 39C7< TD2P 24C3<> 57C5>
RAM_DATA_A<14> 13C7<> 14D4<> RAM_DATA_B<59> 13A2<> 15A6< RFBD<7> 19D7< 20C5<> RFBD<116> 19B4< 21C1<> SND_AMP_MUTE_L 28C5<> 43C8< TESTEN 35A5< 35C4<
RAM_DATA_A<15> 13C7<> 14D4<> RAM_DATA_B<60> 13A2<> 15A4> RFBD<8> 19D7< 20C5<> RFBD<117> 19B4< 21C1<> SND_AMP_M_L 42D3< 43C7<> TI_MODE_OUT 42D4<>
RAM_DATA_A<16> 13B5<> 14D6<> RAM_DATA_B<61> 13A2<> 15A4> RFBD<9> 19D7< 20C5<> RFBD<118> 19B4< 21C1<> SND_CLKOUT 28A1< 39B4< TI_MODE_OUT_2 42C7<
C RAM_DATA_A<17>
RAM_DATA_A<18>
13B5<> 14C6<>
13B5<> 14C6<>
RAM_DATA_B<62>
RAM_DATA_B<63>
13A2<> 15A4>
13A2<> 15A4>
RFBD<10>
RFBD<11>
19D7< 20C5<>
19D7< 20C5<>
RFBD<119>
RFBD<120>
19B4< 21C1<>
19B4< 21C1<>
SND_HP_MUTE_L
SND_HP_M_L
28C5<> 41A7<
41A7<>
TI_SD*
TMDS_CKM
42D5<
23D1< 24A7<> 27C2< 57D2> 59A8>
C
RAM_DATA_A<19> 13B5<> 14C6<> RAM_DQM_A<0> 13D7<> 14D4<> RFBD<12> 19D7< 20C5<> RFBD<121> 19B4< 21C1<> SND_HP_SENSE_CONN 41A3< 41B2<> TMDS_CKP 23D1< 24B7<> 27C2< 57D2> 59A8>
RAM_DATA_A<20> 13B5<> 14D4<> RAM_DQM_A<0..7> 53D6< RFBD<13> 19D7< 20C5<> RFBD<122> 19B4< 21B1<> SND_HP_SENSE_L 28B5<> 41A5< 59B8> TMDS_D0M 23D1< 24B7<> 27C2< 57D2> 59A8>
RAM_DATA_A<21> 13B5<> 14C4<> RAM_DQM_A<1> 13C7<> 14D4<> RFBD<14> 19D7< 20C5<> RFBD<123> 19B4< 21B1<> SND_HW_RESET_L 28A8< 28B5<> 39B4< TMDS_D0P 23D1< 24B7<> 27C2< 57D2> 59B8>
RAM_DATA_A<22> 13B5<> 14C4<> RAM_DQM_A<2> 13B5<> 14C4<> RFBD<15> 19D7< 20C5<> RFBD<124> 19B4< 21B1<> SND_LIN_SENSE_L 28B5<> 40D4< 59B6> TMDS_D1M 23D1< 24C7<> 27C2< 57D2> 59B8>
RAM_DATA_A<23> 13B5<> 14C4<> RAM_DQM_A<3> 13A5<> 14C4<> RFBD<16> 19D7< 20C5<> RFBD<125> 19B4< 21B1<> SND_SCLK 28A1< 39B1<> TMDS_D1P 23D1< 24C7<> 27C2< 57D2> 59B8>
RAM_DATA_A<24> 13B5<> 14C6<> RAM_DQM_A<4> 13D4<> 14B4<> RFBD<17> 19D7< 20C5<> RFBD<126> 19B4< 21B1<> SND_SPKR_ID 28B5<> 42B8< TMDS_D2M 23D1< 24D7<> 27C2< 57D2> 59B8>
RAM_DATA_A<25> 13B5<> 14C6<> RAM_DQM_A<5> 13C4<> 14A4<> RFBD<18> 19D7< 20C5<> RFBD<127> 19B4< 21B1<> SND_SPKR_ID_U10 42B8< TMDS_D2P 23D1< 24D7<> 27C2< 57D2> 59B8>
RAM_DATA_A<26> 13B5<> 14C6<> RAM_DQM_A<6> 13B2<> 14A4<> RFBD<19> 19C7< 20C5<> RFBDQM<0> 18G2< 20C6< SND_SYNC 28B1< 39C1<> TMDS_DDC_CLK 24B3<> 59C6>
RAM_DATA_A<27> 13B5<> 14C6<> RAM_DQM_A<7> 13B2<> 14A4<> RFBD<20> 19C7< 20C5<> RFBDQM<0..7> 55D3> SND_TO_AUDIO 28B1< 39C4< TMDS_DDC_DAT 24B4<> 59C6>
RAM_DATA_A<28> 13B5<> 14C4<> RAM_DQM_B<0> 13C7<> 15D4> RFBD<21> 19C7< 20C5<> RFBDQM<1> 18G2< 20C6< SNF_FSEL 28C5<> 28D3< TMDS_EN 23D7<> 51B1<>
RAM_DATA_A<29> 13B5<> 14C4<> RAM_DQM_B<0..7> 53D6< RFBD<22> 19C7< 20C5<> RFBDQM<2> 18G2< 20C6< SPDA 42B7< TPA_5V 42D4<
RAM_DATA_A<30> 13B5<> 14C4<> RAM_DQM_B<1> 13B7<> 15D4> RFBD<23> 19C7< 20C5<> RFBDQM<3> 18G2< 20C6< SPKROUT_L_N 42A8< 42C8< TPA_AVDD_REF 42D4<
RAM_DATA_A<31> 13B5<> 14C4<> RAM_DQM_B<2> 13A5<> 15C4> RFBD<24> 19C7< 20C5<> RFBDQM<4> 18G2< 20C2< SPKROUT_L_P 42A8< 42C8< TPA_BSLN 42D5<>
RAM_DATA_A<32> 13D4<> 14B6<> RAM_DQM_B<3> 13A5<> 15C4> RFBD<25> 19C7< 20C5<> RFBDQM<5> 18G2< 20C2< SPKROUT_R_N 42A8< 42C1< TPA_BSLP 42D5<>
RAM_DATA_A<33> 13D4<> 14B6<> RAM_DQM_B<4> 13C4<> 15B4> RFBD<26> 19C7< 20B5<> RFBDQM<6> 18G2< 20C2< SPKROUT_R_P 42A8< 42C1< TPA_BSRN 42D4<>
RAM_DATA_A<34> 13D4<> 14B6<> RAM_DQM_B<5> 13B4<> 15B4> RFBD<27> 19C7< 20B5<> RFBDQM<7> 18G2< 20C2< SPKR_JACK_DALLAS 42A5<> TPA_BSRP 42D4<>
RAM_DATA_A<35> 13D4<> 14B6<> RAM_DQM_B<6> 13B2<> 15A4> RFBD<28> 19C7< 20B5<> RFBDQM<8> 18D2< 21C6< SPKR_LM 42A5<> TPA_COSC 42C4<>
RAM_DATA_A<36> 13D4<> 14B4<> RAM_DQM_B<7> 13A2<> 15A4> RFBD<29> 19C7< 20B5<> RFBDQM<8..15> 55C3> SPKR_LP 42A5<> TPA_LOUTN 42C5<>
RAM_DATA_A<37> 13D4<> 14B4<> RAM_DQS_A<0> 13D7<> 14C8< 14D6<> RFBD<30> 19C7< 20B5<> RFBDQM<9> 18D2< 21C6< SPKR_RM 42A5<> TPA_LOUTP 42C5<>
RAM_DATA_A<38> 13D4<> 14B4<> RAM_DQS_A<0..7> 53D6< RFBD<31> 19C7< 20B5<> RFBDQM<10> 18D2< 21C6< SPKR_RMS 42C8< TPA_MODE 42D4<
RAM_DATA_A<39> 13D4<> 14B4<> RAM_DQS_A<1> 13C7<> 14C8< 14D6<> RFBD<32> 19D4< 20C1<> RFBDQM<11> 18D2< 21C6< SPKR_RP 42A5<> TPA_ROSC 42C4<>
RAM_DATA_A<40> 13D4<> 14B6<> RAM_DQS_A<2> 13B5<> 14C6<> 14C8< RFBD<33> 19D4< 20C1<> RFBDQM<12> 18D2< 21C2< STBYMD 50B7<> TPA_ROUTN 42C4<>
RAM_DATA_A<41> 13C4<> 14B6<> RAM_DQS_A<3> 13B5<> 14C6<> 14C8< RFBD<34> 19D4< 20C1<> RFBDQM<13> 18D2< 21C2< STOP_AGP_L 16C6<> 16D3< 17A8< 54B7< TPA_ROUTP 42C4<>
RAM_DATA_A<42> 13C4<> 14A6<> RAM_DQS_A<4> 13D4<> 14B6<> 14B8< RFBD<35> 19D4< 20C1<> RFBDQM<14> 18C2< 21C2< SUPER_FLO 45C7<> 45C7<> TPA_V2P5 42D5<
RAM_DATA_A<43> 13C4<> 14A6<> RAM_DQS_A<5> 13C4<> 14A6<> 14B8< RFBD<36> 19D4< 20C1<> RFBDQM<15> 18C2< 21C2< SW3V5V_12VIN 50C7<> TPA_VCLAMPL 42C5<
RAM_DATA_A<44> 13C4<> 14B4<> RAM_DQS_A<6> 13B2<> 14A6<> 14B8< RFBD<37> 19D4< 20C1<> RFBDQS<0> 19A6< 20C6<> SW3V5V_INTVCC 50B5<> 50C6<> TPA_VCLAMPR 42C4<
RAM_DATA_A<45> 13C4<> 14B4<> RAM_DQS_A<7> 13B2<> 14A6<> 14A8< RFBD<38> 19D4< 20C1<> RFBDQS<0..7> 55C3> SW3V5V_SGND 50A7<> 50A8<> 50B7<> 50B8<> 50B8<> TPA_VOL 42D5
RAM_DATA_A<47>
13C4<> 14A4<>
13C4<> 14A4<>
RAM_DQS_B<0>
RAM_DQS_B<0..7>
13C7<> 15C8< 15D6<
53D6<
RFBD<39>
RFBD<40>
19D4< 20C1<>
19D4< 20C1<>
RFBDQS<1>
RFBDQS<2>
19A6< 20C6<>
19A6< 20C6<> SW3V5V_VIN
50C7<
50C6<>
TRANS_ADJ
T_UD_IDEDD_0
45B3<
37C1< 38C3<> 58C2>
B
RAM_DATA_A<48> 13C2<> 14A6<> RAM_DQS_B<1> 13B7<> 15C8< 15D6< RFBD<41> 19D4< 20C1<> RFBDQS<3> 19A6< 20C6<> SW3VITH2R 50A8< T_UD_IDEDD_1 37C1< 38C3<> 58C2>
RAM_DATA_A<49> 13C2<> 14A6<> RAM_DQS_B<2> 13A5<> 15C6< 15C8< RFBD<42> 19D4< 20C1<> RFBDQS<4> 19A6< 20C2<> SW3V_3VSENSE 50B4<> T_UD_IDEDD_2 37C1< 38C3<> 58C2>
RAM_DATA_A<50> 13C2<> 14A6<> RAM_DQS_B<3> 13A5<> 15B8< 15C6< RFBD<43> 19D4< 20C1<> RFBDQS<5> 19A6< 20C2<> SW3V_BG2 50B6<> T_UD_IDEDD_3 37C1< 38C3<> 58C2>
RAM_DATA_A<51> 13C2<> 14A6<> RAM_DQS_B<4> 13C4<> 15B6< 15B8< RFBD<44> 19D4< 20C1<> RFBDQS<6> 19A6< 20C2<> SW3V_BG2R 50B5<> T_UD_IDEDD_4 37B1< 38C3<> 58C2>
RAM_DATA_A<52> 13C2<> 14A4<> RAM_DQS_B<5> 13B4<> 15B6< 15B8< RFBD<45> 19D4< 20C1<> RFBDQS<7> 19A6< 20C2<> SW3V_BOOST2 50B6<> T_UD_IDEDD_5 37B1< 38C3<> 58C2>
RAM_DATA_A<53> 13C2<> 14A4<> RAM_DQS_B<6> 13B2<> 15A6< 15B8< RFBD<46> 19D4< 20C1<> RFBDQS<8> 19A3< 21C6<> SW3V_BOOST2R 50C5<> T_UD_IDEDD_6 37B1< 38C3<> 58B2>
RAM_DATA_A<54> 13B2<> 14A4<> RAM_DQS_B<7> 13A2<> 15A6< 15A8< RFBD<47> 19D4< 20C1<> RFBDQS<8..15> 55B3> SW3V_ITH2 50A7< 50B6> T_UD_IDEDD_7 37B1< 38C3<> 58B2>
RAM_DATA_A<55> 13B2<> 14A4<> RAM_RAS_L 12A2< 14B4<> 15B4> 53C6< RFBD<48> 19D4< 20C1<> RFBDQS<9> 19A3< 21C6<> SW3V_RUNSS 50B6< 50C1< T_UD_IDEDD_8 37B1< 38C2<> 58B2>
RAM_DATA_A<56> 13B2<> 14A6<> RAM_SA0 15A4< RFBD<49> 19D4< 20C1<> RFBDQS<10> 19A3< 21C6<> SW3V_RUNSSR 50C2< T_UD_IDEDD_9 37B1< 38C2<> 58B2>
RAM_DATA_A<57> 13B2<> 14A6<> RAM_WE_L 12B3< 14B6<> 15B6< 53C6< RFBD<50> 19D4< 20C1<> RFBDQS<11> 19A3< 21C6<> SW3V_SNSM 50B6< T_UD_IDEDD_10 37B1< 38C2<> 58B2>
RAM_DATA_A<58> 13B2<> 14A6<> RB22P2 48B3<> RFBD<51> 19C4< 20C1<> RFBDQS<12> 19A3< 21C2<> SW3V_SNSP 50B6< T_UD_IDEDD_11 37B1< 38C2<> 58B2>
RAM_DATA_A<59> 13B2<> 14A6<> RB27-1 48B6< RFBD<52> 19C4< 20C1<> RFBDQS<13> 19A3< 21C2<> SW3V_SW2 50B6<> 50C4<> T_UD_IDEDD_12 37B1< 38C2<> 58B2>
RAM_DATA_A<60> 13B2<> 14A4<> RB37P1 48C6<> RFBD<53> 19C4< 20C1<> RFBDQS<14> 19A3< 21C2<> SW3V_SW2A 50B3<> T_UD_IDEDD_13 37A1< 38C2<> 58B2>
RAM_DATA_A<61> 13B2<> 14A4<> RB160P1 50A5<> RFBD<54> 19C4< 20C1<> RFBDQS<15> 19A3< 21C2<> SW3V_TG2 50B6<> T_UD_IDEDD_14 37A1< 38C2<> 58B2>
RAM_DATA_A<62> 13B2<> 14A4<> RB213P2 49C3<> RFBD<55> 19C4< 20C1<> RF_CLKRUN_L 31C3<> 59B6> SW3V_TG2R 50C5<> T_UD_IDEDD_15 37A1< 38C2<> 58B2>
RAM_DATA_A<63> 13B2<> 14A4<> RB227P1 49C5<> RFBD<56> 19C4< 20C1<> RF_DISABLE_L 31C3<> SW3V_VOSNS 50B6<> U5_SDOUT 39C3<>
RAM_DATA_B<0> 13C7<> 15D6< REF_STAR_GND 39A5<> 39A5<> RFBD<57> 19C4< 20C1<> RINA 39C4< 40B2< SW5VITH1R 50B8< U10_A 42C7<
RAM_DATA_B<0..63> 53D6< RESET_BUTTON* 29B2<> 44C4<> 59D6> RFBD<58> 19C4< 20B1<> RINN 42C4< 43C2< SW5V_5VSENSE 50A4<> U10_OUT 42C7> 42D8<
RAM_DATA_B<1> 13C7<> 15D6< RFBA<0> 18F2<> 20D2< 20D6< RFBD<59> 19C4< 20B1<> RINN1 43C2< SW5V_BG1 50A5< 50B7<> U22_8 36D8<
RAM_DATA_B<2> 13C7<> 15D6< RFBA<0..11> 55D3> RFBD<60> 19C4< 20B1<> RINP 42C4< 43D4< SW5V_BG1R 50A5<> U4202P2 40C3<
RAM_DATA_B<3> 13C7<> 15D6< RFBA<1> 18F2<> 20C2< 20C6< RFBD<61> 19C4< 20B1<> RINT_PU_RESET_L 34C5< SW5V_BOOST1 50A5< 50B7<> U4202P3 40C3<
RAM_DATA_B<4> 13C7<> 15D4> RFBA<2> 18F2<> 20C2< 20C6< RFBD<62> 19C4< 20B1<> RINT_RESET_L 34C5< SW5V_ITH1 50B7<> U4202P5 40B3<
RAM_DATA_B<5> 13C7<> 15D4> RFBA<3> 18F2<> 20C2< 20C6< RFBD<63> 19C4< 20B1<> RJ45_4_5 35C1<> 57B5> SW5V_RUNSS 50B8< 50D1< U4202P6 40B3<
RAM_DATA_B<6> 13C7<> 15D4> RFBA<4> 18F2<> 20C2< 20C6< RFBD<64> 19C7< 21C5<> RJ45_7_8 35C1<> 57B5> SW5V_SNSM 50A5< 50B7< U4202P7 40B3<>
RAM_DATA_B<7> 13C7<> 15D4> RFBA<5> 18F2<> 20C2< 20C6< RFBD<64..127> 55C3> RJ45_F_TREF 35B2< 57B5> SW5V_SNSMA 50A4<> UATA0IRQ 38C6<> 58D5>
RAM_DATA_B<8> 13C7<> 15D6< RFBA<6> 18E2<> 20C2< 20C6< RFBD<65> 19C7< 21C5<> RJ45_RREF 35C2<> 57B5> SW5V_SNSP 50A5< 50B7< UATAD<0> 37C4< 38C6<>
RAM_DATA_B<9> 13C7<> 15D6< RFBA<7> 18E2<> 20C2< 20C6< RFBD<66> 19C7< 21C5<> RJ45_RXN 35C1<> 57B5> SW5V_SW1 50A5<> 50A5<> 50B7<> UATAD<0..15> 58D5>
A RAM_DATA_B<10> 13C7<> 15C6< RFBA<8> 18E2<> 20C2< 20C6< RFBD<67> 19C7< 21C5<> RJ45_RXP 35C1<> 57B5> SW5V_SW1A 50A3<> UATAD<1> 37C4< 38C6<> A
RAM_DATA_B<11> 13C7<> 15C6< RFBA<9> 18E2<> 20C2< 20C6< RFBD<68> 19C7< 21C5<> RJ45_TREF 35C2<> 57B5> SW5V_TG1 50B5< 50B7> UATAD<2> 37C4< 38C6<>
RAM_DATA_B<12> 13C7<> 15D4> RFBA<10> 18E2<> 20C2< 20C6< RFBD<69> 19C7< 21C5<> RJ45_TXN 35C1<> 57B5> SW5V_TG1R 50B4<> UATAD<3> 37C4< 38C6<>
RAM_DATA_B<13> 13B7<> 15D4> RFBA<11> 18E2<> 20C2< 20C6< RFBD<70> 19C7< 21C5<> RJ45_TXP 35C1<> 57B5> SW5V_VOSNS 50B7<> UATAD<4> 37B4< 38C6<>
RAM_DATA_B<14> 13B7<> 15C4> RFBABA<0> 18E2<> 20C2< 20C6< RFBD<71> 19C7< 21C5<> ROMA14 18C8> 26D8< SW12V_SL 51C7< UATAD<5> 37B4< 38C6<>
RAM_DATA_B<15> 13B7<> 15C4> RFBABA<0..1> 55D3> RFBD<72> 19C7< 21C5<> ROMA15 18C8< 26D8< SW12V_SLEEP 51D7<> UATAD<6> 37B4< 38C6<>
RAM_DATA_B<16> 13A5<> 15C6< RFBABA<1> 18E2<> 20C2< 20C6< RFBD<73> 19C7< 21C5<> ROM_CS_L 30B4< 30C6< 31B4<> 59C8> SWITCH5V_3 51B6< UATAD<7> 37B4< 38C6<>
RAM_DATA_B<17> 13A5<> 15C6< RFBACAS_L 18G2<> 20B2< 20B6< 55D3> RFBD<74> 19B7< 21C5<> ROM_OE_L 30B2< 30C6< 31B2<> 59C8> SWITCH5V_4 51B6<> UATAD<8> 37B4< 38C6<>
RAM_DATA_B<18> 13A5<> 15C6< RFBACKE 18D2<> 20C2< 20C6< 55C3> RFBD<75> 19B7< 21C5<> ROM_ONBOARD_CS_L 30B2< 31B4<> 59D6> SWITCH5V_5 51B3< UATAD<9> 37B4< 38C6<>
RAM_DATA_B<19> 13A5<> 15C6< RFBACLK0 19C1< 20C6< 55C3> RFBD<76> 19B7< 21C5<> ROM_RW_L 30B2< 30B6< 31B4<> 59B8> SWITCH5V_6 51B2<> UATAD<10> 37B4< 38C6<>
RAM_DATA_B<20> 13A5<> 15C4> RFBACLK0_L 19C1< 20C6< 55C3> RFBD<77> 19B7< 21C5<> ROM_WP_L 30B2< 59A8> SYSCLK_CPU 4D2< 9A4< 56C3> UATAD<11> 37B4< 38C6<>
63
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
UATAD<12> 37B4< 38C6<> VCOMR 43D5<

UATAD<13> 37A4< 38C6<> VCOREIN 45D6<>
UATAD<14> 37A4< 38C6<> VCORE_BG 45C6<>
UATAD<15> 37A4< 38C6<> VCORE_BG_1 45B5< 45C7<>
UIDE_ADDR<0> 37C7<> 38B4< VCORE_BOOST 45C5<>
UIDE_ADDR<0..2> 58B5> VCORE_BOOST2 45C6<>
UIDE_ADDR<1> 37C7<> 38B4< VCORE_BOOST2_1 45B5< 45C7<>
UIDE_ADDR<2> 37C7<> 38A4< VCORE_BOOST_1 45B5<>
UIDE_CS1FX_L 37C7<> 38B4< 58B5> VCORE_EXTVCC 45D7<
UIDE_CS3FX_L 37C7<> 38B4< 58B5> VCORE_FREQSET 45C7<
UIDE_CSELP_L 38C2<> 52A8> VCORE_INTVCC 45C5<> 45D5<> 45D7<>
D UIDE_DATA<0> 37C3< 37D7<>

UIDE_DATA<0..15> 58C5>
VCORE_SEN+
VCORE_SEN+_1
45C3<>
45A3<>
D
UIDE_DATA<1> 37C3< 37D7<> VCORE_SENA+ 45C3<>
UIDE_DATA<2> 37C3< 37D7<> VCORE_SF 45C8<
UIDE_DATA<3> 37C3< 37D7<> VCORE_SGND 45B7<> 45C7<> 45C7<> 45C8<> 45C8<>
UIDE_DATA<4> 37B3< 37D7<>
UIDE_DATA<5> 37B3< 37D7<> VCORE_STBY 45C7<>
UIDE_DATA<6> 37B3< 37D7<> VCORE_TG 45C6<>
UIDE_DATA<7> 37B3< 37D7<> VCORE_TG_1 45B5< 45C7>
UIDE_DATA<8> 37B3< 37D7<> VCORE_VGATE 28B5<> 28D3<
UIDE_DATA<9> 37B3< 37D7<> VCORE_VIN 45D7<>
UIDE_DATA<10> 37B3< 37C7<> VC_CNTL1 44C7< 45D8<
UIDE_DATA<11> 37B3< 37C7<> VC_SENA 45B3<>
UIDE_DATA<12> 37B3< 37C7<> VGA_IIC_CLK 25C4<> 59B6>
UIDE_DATA<13> 37A3< 37C7<> VGA_IIC_DAT 25C4<> 59B6>
UIDE_DATA<14> 37A3< 37C7<> VGER_INV_HRESET 7A3< 7B3< 7B3< 7C3< 44D1>
UIDE_DATA<15> 37A3< 37C7<> VIPCLK 22D4< 52A8>
UIDE_DIOR_L 37C7<> 37D3< 58C5> VIPD0 22D4<> 26B7<
UIDE_DIOW_L 37C3< 37C7<> 58C5> VIPD1 22D4<> 26B7<
UIDE_DMACK_L 37C7<> 37D3< 58C5> VIPD2 22D4<> 26B8<
UIDE_DMARQ 37C7<> 38C4< 58C5> VIPD3 22D4<> 26D7<
UIDE_INTRQ 37C7< 38C4< 58C5> VIPD4 22D4<> 26D7<
UIDE_IOCHRDY 37C3< 37C7< 58C5> VIPD5 22D4<> 26D7<
UIDE_PDIAG 38C2<> VIPD6 22D4<> 26B8<
UIDE_REF 37C7<> VIPD7 22D4<> 26C5<
UIDE_RST_L 37C7<> 37D3< 58C5> VIPHAD0 22D5<> 26B7<
UNUSED_ATAIOCS16_L 38C2<> 52A8> VIPHAD1 22D5<> 26B7<
UNUSED_EXTINT7 28B5<> 28B8<> VIPHCTL 22D5<> 26D5<
UNUSED_EXTINT8 28B5<> 28B8<> VIP_PD 22D4<
UNUSED_GPIO15 28B5<> 28C1< 59A6> VIP_PU 22D4<
C USB2_CRUN_L 32A6<>
USB2_CRUN_L_INT 28A8< 28B5<> 32A8<
VOSNS1
VOSNS2
50B8<>
50B5<>
C
USB2_DAN_F 32C1<> 33B7< 56B3> VR4210P1 39B7<
USB2_DAP_F 32C1<> 33B7< 56B3> VREFM 39B4<
USB2_DBN_F 32C1<> 33C7< 56B3> VREFP 39B4< 43A3<
USB2_DBP_F 32C1<> 33C7< 56B3> VRFILT 39B3<>
USB2_DCN_F 32C1<> 33D7< 56B3> VSYNC* 22C5<> 57D5>
USB2_DCP_F 32C1<> 33D7< 56B3> WL_PCI_IDSEL 31C2<> 59A6>
USB2_IDSEL 32B6< XMIT_LED 35A2< 35B4<>
USB2_NC1 32B4<> ZT8P1 4A1<>
USB2_NC2 32B4<> ZT9P1 4B2<>
USB2_PME_L 32A6<> ZT10P1 4A2<>
USB2_RREF 32B4<> 56B3> ZT11P1 4B1<>
USB2_RSDAM 32C4<> 56B3>
USB2_RSDAP 32C4<> 56B3>
USB2_RSDBM 32C4<> 56B3>
USB2_RSDBP 32C4<> 56B3>
USB2_RSDCM 32C4<> 56B3>
USB2_RSDCP 32C4<> 56B3>
USB2_VCCRST 32A6<
USB2_XT1 32C4< 56B3>
USB2_XT2 32C4<> 56B3>
USB2_XT2_B 56B3>
USBT_DAN_F 33B6<> 56B3>
USBT_DAP_F 33B6<> 56B3>
USBT_DBN_F 33C6<> 56A3>
USBT_DBP_F 33C6<> 56A3>
USBT_DCN_F 33D6<> 56A3>
USBT_DCP_F 33D6<> 56A3>
B USB_DAN
USB_DAN_CON
28A3< 28B3<> 58B5>
33C3<> 56A3> 59C6>
B
USB_DAN_F 28B2< 33B7< 58B5>
USB_DAP 28A3< 28B3<> 58B5>
USB_DAP_CON 33C3<> 56A3> 59C6>
USB_DAP_F 28B2< 33B7< 58B5>
USB_DBN 28A3< 28B3<> 58B5>
USB_DBN_CON 33B3<> 56A3> 59C6>
USB_DBN_F 28B2< 33C7< 58B5>
USB_DBP 28A3< 28B3<> 58B5>
USB_DBP_CON 33B3<> 56A3> 59C6>
USB_DBP_F 28B2< 33C7< 58B5>
USB_DCN 28A3< 28B3<> 58B5>
USB_DCN_CON 33D3<> 56A3> 59C6>
USB_DCN_F 28B2< 33D7< 58B5>
USB_DCP 28A3< 28B3<> 58B5>
USB_DCP_CON 33D3<> 56A3> 59C6>
USB_DCP_F 28B2< 33D7< 58B5>
USB_DDN 28B3<>
USB_DDN_F_TERM 28B2<
USB_DDP 28B3<>
USB_DDP_F_TERM 28B2<
USB_DEN 28B3<> 58B5>
USB_DEP 28B3<> 58B5>
USB_DFN 28B3<> 58A5>
USB_DFP 28B3<> 58A5>
USB_GND 52A3>
USB_OC_EF_L 28B3< 28C2<
USB_PORT_PWR 33A4<> 33B3<> 33C3<> 33D3<> 52A3>
A 59B6>
A
USB_PWR 25B5<> 25C2< 25D3<> 33A6<> 52A3>
USB_PWREN_AB_L 28B3<> 28C2<
USB_PWREN_CD_L 28B3<> 28C2< PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
USB_PWREN_EF_L 28B3<> 28C2<
USB_PWR_EN 33A8<> I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
USB_PWR_FLT* 28B3< 28C1< 32B1< 33A7> II NOT TO REPRODUCE OR COPY IT
UX6P23 39C4< III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
UX6_LINB 39C4<
U_USB_PWR_FLT* 32B4<
VCOML 43D5< D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 64
64 69
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
*** Part Cross-Reference for the entire design *** C104 CAP 17D4 C220 CAP_P 48C8 C337 CAP_P 45C2 C455 CAP 36B4 C578 CAP 39C5
C105 CAP 17B2 C222 CAP 16A8 C338 CAP_P 50D6 C456 CAP 36B3 C579 CAP 39C5
BS1 PCB_STANDOFF 29B5 C106 CAP_P 48B2 C223 CAP 17C2 C339 CAP_P 50D6 C457 CAP 36B4 C580 CAP_P 39B2
BS2 PCB_STANDOFF 29B6 C107 CAP 24B2 C224 CAP 22C2 C340 CAP_P 45C2 C458 CAP 36B3 C581 CAP 39B2
BS3 PCB_STANDOFF 29D1 C108 CAP 42B7 C225 CAP 30C2 C341 CAP 50B7 C460 CAP 21D2 C582 CAP 42B7
BS4 PCB_STANDOFF 29D1 C109 CAP 17D3 C226 CAP 22D6 C342 CAP_P 49C3 C461 CAP 21B7 C583 CAP 27D3
BT1 BATTERY 44D6 C110 CAP 17D2 C227 CAP 22C3 C343 CAP_P 45D3 C462 CAP 21B8 C584 CAP 39D3
C1 CAP 33C4 C111 CAP 17B3 C228 CAP 22C3 C344 CAP 50B4 C463 CAP 36B4 C585 CAP 48B5
C2 CAP 33D4 C112 CAP 17B2 C229 CAP 28C6 C345 CAP 4B1 C464 CAP 36B4 C586 CAP 48A4
C3 CAP 35B1 C113 CAP 27D5 C230 CAP 13D7 C346 CAP_P 45B1 C466 CAP 21B7 C587 CAP 39B2
C4 CAP 36B6 C114 CAP 32D3 C231 CAP 11A6 C347 CAP_P 45B2 C467 CAP 21D8 C588 CAP 39B5
D C5
C6
CAP_P
CAP
33A5
33B4
C115
C116
CAP
CAP
18H3
17B3
C232
C233
CAP
CAP
11A6
28D6
C348
C349
CAP_P
CAP_P
45B2
50D6
C468
C469
CAP
CAP
36B1
21B7
C589
C591
CAP
CAP_P
48C5
39D2
D
C7 CAP_P 33A5 C117 CAP 17D3 C234 CAP 28D7 C350 CAP 8D4 C470 CAP 21B8 C592 CAP 39B5
C8 CAP 21A4 C118 CAP 17C3 C235 CAP_P 49B2 C351 CAP_P 49C3 C471 CAP 36B4 C593 CAP 15D2
C9 CAP 21A4 C119 CAP 23B5 C236 CAP 51B3 C352 CAP 4B1 C472 CAP 36B1 C594 CAP 39B5
C10 CAP_P 36D7 C120 CAP 17C3 C238 CAP_P 51C5 C353 CAP 8D4 C473 CAP 51D2 C595 CAP 39B5
C11 CAP 21A4 C121 CAP 39C4 C239 CAP 44A4 C354 CAP_P 50D3 C475 CAP 21B6 C596 CAP 48C6
C12 CAP_P 36D7 C123 CAP 30C3 C240 CAP 11C8 C355 CAP_P 50D3 C476 CAP 21B6 C597 CAP 39C4
C13 CAP_P 41C4 C124 CAP 18H1 C241 CAP 50C5 C356 CAP_P 50D3 C477 CAP 36C7 C598 CAP 8B2
C14 CAP 12A7 C125 CAP 23B6 C242 CAP 14C2 C357 CAP_P 45D3 C478 CAP 43A5 C599 CAP 39D4
C15 CAP 21D2 C126 CAP_P 39C7 C243 CAP 14C2 C358 CAP 49C4 C479 CAP_P 40C4 C600 CAP_P 39D4
C16 CAP 21B4 C127 CAP_P 39B2 C244 CAP 14C3 C359 CAP 49B7 C480 CAP_P 40B4 C601 CAP 29A5
C17 CAP 21D5 C128 CAP 22D3 C245 CAP_P 44D5 C360 CAP 27D4 C481 CAP 36B3 C602 CAP 15D2
C18 CAP 51D3 C129 CAP 17B3 C246 CAP_P 51B3 C361 CAP_P 45B2 C482 CAP 36B3 C603 CAP 16A8
C19 CAP_P 51D4 C130 CAP 23B6 C248 CAP 39B4 C362 CAP_P 45B2 C483 CAP 36B3 C604 CAP 29A7
C20 CAP 21B2 C131 CAP 23B4 C249 CAP 31D1 C363 CAP 46C4 C484 CAP 36B5 C605 CAP 22C2
C21 CAP 21D5 C132 CAP_P 48B2 C250 CAP 31D2 C364 CAP 8C1 C485 CAP 36B1 C606 CAP 22C2
C22 CAP 21B4 C133 CAP 18H6 C252 CAP 51B2 C365 CAP 46C6 C486 CAP 21B6 C607 CAP 22C1
C23 CAP 21B4 C134 CAP 17D3 C254 CAP 51B1 C366 CAP 27D4 C487 CAP 21D7 C608 CAP 29A6
C24 CAP_P 40B4 C135 CAP 17C2 C255 CAP 14C2 C367 CAP 45B6 C488 CAP 21B7 C609 CAP 29A4
C25 CAP_P 40C4 C136 CAP 17B3 C256 CAP 14C1 C368 CAP 22B6 C489 CAP 21B5 C610 CAP 24A3
C26 CAP_P 41D4 C137 CAP 17B4 C257 CAP 51B2 C369 CAP 4A1 C490 CAP 36B6 C611 CAP 13D7
C27 CAP 36D8 C138 CAP 46B4 C258 CAP 51B2 C370 CAP 4A1 C492 CAP 21D1 C612 CAP 13D6
C28 CAP 21B1 C139 CAP 17D1 C259 CAP 31D1 C371 CAP 45C5 C493 CAP 21D7 C613 CAP 13D6
C29 CAP 21B3 C140 CAP 17C2 C260 CAP 31D2 C372 CAP 45B7 C494 CAP 21D7 C614 CAP 29A6
C30 CAP 12A6 C141 CAP 20B3 C261 CAP 14C1 C373 CAP 45C8 C495 CAP 36B2 C615 CAP 29A4
C31 CAP 21B2 C142 CAP 20D5 C262 CAP 47B4 C374 CAP 45B5 C496 CAP 36B2 C616 CAP 22A2
C32 CAP 21D4 C143 CAP 20D5 C263 CAP 14C2 C375 CAP 36C1 C499 CAP 41D6 C617 CAP 22A3
C33 CAP 21B2 C144 CAP 20D5 C264 CAP 11C4 C376 CAP 36D3 C500 CAP 36C7 C618 CAP 23A6
C34 CAP 21B3 C145 CAP 18H2 C265 CAP 47B3 C377 CAP 33A4 C503 CAP 41C6 C619 CAP 29C7
C C35
C36
CAP
CAP
43B5
42D7
C146
C147
CAP
CAP
17D1
17C3
C266
C267
CAP
CAP
47B8
44D6
C378
C379
CAP
CAP
36C1
36C2
C504
C505
CAP
CAP
41B7
40D3
C620
C621
CAP
CAP
29C7
29D7
C
C37 CAP 35D7 C148 CAP 17C4 C269 CAP_P 51D6 C380 CAP 33C4 C506 CAP 40C3 C622 CAP 29D7
C38 CAP 21D2 C149 CAP 17C3 C270 CAP 47A5 C381 CAP 36D3 C507 CAP 40B3 C623 CAP 28D7
C39 CAP 21D5 C150 CAP 17C3 C271 CAP 11C8 C382 CAP 33A4 C508 CAP 41C6 C624 CAP 15D2
C40 CAP 21B3 C151 CAP 17C2 C272 CAP 27D4 C383 CAP 33C4 C509 CAP 18B8 C625 CAP 29A7
C41 CAP 35D8 C152 CAP 23B5 C273 CAP 47C5 C384 CAP 36C2 C510 CAP 18B8 C626 CAP 23A6
C42 CAP 36B8 C153 CAP 22C7 C275 CAP 14C2 C385 CAP 33B4 C511 CAP 32D5 C627 CAP 29A6
C43 CAP 41D6 C157 CAP 20A4 C276 CAP 14C2 C386 CAP 33C3 C512 CAP_P 41B7 C628 CAP 11A6
C44 CAP 35D4 C158 CAP 20D5 C277 CAP 11C8 C387 CAP 33C4 C513 CAP 40B3 C629 CAP_P 29A5
C45 CAP 42B8 C159 CAP 18H5 C278 CAP 11C6 C388 CAP 42A5 C514 CAP 40C3 C630 CAP 29A6
C46 CAP 14D8 C160 CAP 23C6 C279 CAP 11C5 C389 CAP 33B4 C515 CAP 32C8 C631 CAP 48C7
C47 CAP 14D8 C161 CAP 17C4 C280 CAP 11C6 C390 CAP 36A6 C516 CAP 32D8 C632 CAP 48C7
C48 CAP 15D8 C162 CAP 22C6 C281 CAP 11C6 C391 CAP 33B4 C517 CAP 32C8 C633 CAP 48C7
C49 CAP 15D8 C163 CAP 22C6 C282 CAP 47B6 C392 CAP 36A6 C518 CAP 41B7 C634 CAP 48C7
C50 CAP 15D7 C164 CAP 22C6 C283 CAP 47C7 C393 CAP 36A6 C519 CAP 32D8 C635 CAP_P 23A6
C51 CAP 15C3 C165 CAP 20B3 C284 CAP 47B4 C394 CAP 36A6 C520 CAP 20D2 C636 CAP_P 23A8
C52 CAP 35D4 C166 CAP 20B3 C285 CAP 47B7 C395 CAP 36A6 C521 CAP 20D2 C637 CAP 11C4
C53 CAP 35D5 C167 CAP 18H5 C286 CAP 47B7 C396 CAP 33A5 C522 CAP 32D8 C638 CAP 11A6
C54 CAP 18B8 C168 CAP 17C3 C287 CAP 50A2 C397 CAP 33D4 C523 CAP 32D8 C639 CAP 29A4
C55 CAP 15C1 C169 CAP 17C2 C288 CAP 11D8 C398 CAP 33B3 C524 CAP_P 41C7 C640 CAP 29A3
C56 CAP 35D4 C170 CAP 22C7 C289 CAP 11D8 C399 CAP 36A7 C525 CAP_P 41D7 C641 CAP 11C8
C57 CAP 35D6 C171 CAP 46A6 C290 CAP 11D8 C400 CAP 35C1 C526 CAP 32D5 C642 CAP 43B7
C58 CAP 15B1 C172 CAP 20A4 C291 CAP 11D8 C401 CAP 35D1 C527 CAP 32D8 C643 CAP 11C2
C59 CAP_P 48B2 C173 CAP 20B2 C292 CAP 11D4 C403 CAP 33D4 C528 CAP_P 48B3 C644 CAP 11B2
C60 CAP 41C6 C174 CAP 20B4 C293 CAP 50A1 C404 CAP 33D4 C529 CAP 32D5 C645 CAP 11B1
C61 CAP 18B6 C175 CAP 18H3 C294 CAP 50A1 C405 CAP 33D3 C530 CAP 32C7 C646 CAP 11B1
C62 CAP 18D6 C176 CAP 17D2 C295 CAP_P 50C5 C406 CAP 36B6 C531 CAP 32C7 C647 CAP 11A5
C63 CAP 40B2 C177 CAP 17B4 C296 CAP_P 47B3 C407 CAP 36A6 C532 CAP 20D7 C648 CAP 11A5
B C64
C65
CAP
CAP
40C2
35D7
C178
C179
CAP
CAP
17D4
17B3
C297
C298
CAP
CAP
47C4
47C5
C408
C409
CAP
CAP
41B3
25B3
C533
C534
CAP
CAP
20D7
20B6
C649
C650
CAP
CAP
11A4
11A6
B
C66 CAP 35D7 C180 CAP 17D3 C299 CAP 47C4 C410 CAP 36D4 C535 CAP 20B6 C651 CAP 11A3
C67 CAP 35D5 C181 CAP 17B2 C300 CAP_P 47C3 C411 CAP 36A7 C536 CAP 32C8 C652 CAP 24B2
C68 CAP 35D6 C182 CAP 17B1 C301 CAP_P 47C4 C412 CAP 41C3 C537 CAP 32D7 C653 CAP 51B4
C69 CAP 18B5 C183 CAP 17D2 C302 CAP_P 50A2 C413 CAP 33D3 C538 CAP_P 39D6 C654 CAP 51B4
C70 CAP 18B6 C184 CAP 17B2 C303 CAP 50C2 C414 CAP 25B4 C539 CAP_P 39B7 C655 CAP 11C4
C71 CAP_P 48B1 C185 CAP 17D3 C304 CAP 14C2 C415 CAP 25A4 C540 CAP 20D8 C656 CAP 11C2
C72 CAP 18H7 C186 CAP 17B4 C305 CAP 47C4 C416 CAP 25A4 C541 CAP 32D8 C657 CAP 11B3
C73 CAP 18H7 C187 CAP 17B3 C306 CAP_P 50A2 C417 CAP 33B3 C542 CAP 43B4 C658 CAP 11B2
C74 CAP 35B7 C188 CAP 17B1 C307 CAP_P 50A2 C418 CAP 36D4 C543 CAP 48B3 C659 CAP 11B3
C75 CAP 18H5 C189 CAP 23C7 C308 CAP_P 50A3 C420 CAP 41D3 C544 CAP 20D7 C660 CAP 11B1
C76 CAP 35B7 C190 CAP 22C7 C309 CAP_P 50A3 C421 CAP 25D4 C545 CAP 20B7 C661 CAP 11A6
C77 CAP 32D3 C191 CAP 20A5 C310 CAP_P 50A2 C422 CAP 25C4 C546 CAP 32D8 C662 CAP 11A6
C78 CAP 18H6 C192 CAP 17D4 C311 CAP 14C1 C423 CAP 25C3 C547 CAP 32D7 C663 CAP 11A4
C79 CAP 18H4 C193 CAP 17B5 C312 CAP 29D3 C424 CAP 36B6 C548 CAP 32D8 C664 CAP 11A3
C80 CAP 18H2 C194 CAP 20B4 C313 CAP 14C3 C427 CAP 41B3 C549 CAP 39D7 C665 CAP 11A4
C81 CAP 18H7 C195 CAP 20B1 C314 CAP 29D3 C428 CAP 36B7 C550 CAP 43A3 C666 CAP 11A4
C82 CAP 18H4 C196 CAP 20B2 C315 CAP 50A8 C431 CAP 40B6 C551 CAP 43B3 C667 CAP 11A4
C83 CAP 18H3 C197 CAP 20B2 C316 CAP 50A8 C432 CAP 25B3 C552 CAP 48B6 C668 CAP 11B5
C84 CAP 18H8 C198 CAP 20B4 C317 CAP 50B8 C433 CAP 33C3 C553 CAP 20B6 C669 CAP 13C5
C85 CAP_P 39C6 C199 CAP 18H3 C318 CAP 50B8 C434 CAP 35D3 C554 CAP 20B7 C670 CAP 13C5
C86 CAP 18H8 C200 CAP 17D4 C319 CAP 14A7 C436 CAP 41A4 C555 CAP 32D7 C671 CAP 13C5
C87 CAP 17B2 C201 CAP 17D4 C320 CAP 14C2 C437 CAP 40C6 C556 CAP 43B3 C672 CAP 15D1
C88 CAP_P 48B1 C202 CAP 17D3 C321 CAP 50B7 C438 CAP 35D3 C557 CAP 27D4 C673 CAP 11B2
C89 CAP 18H2 C203 CAP 17D2 C322 CAP 50A7 C439 CAP 36B4 C558 CAP_P 48B2 C674 CAP 11A5
C90 CAP 18H7 C204 CAP 40C5 C323 CAP_P 49B2 C440 CAP 36B4 C559 CAP 32D8 C675 CAP 43A7
C91 CAP 17B3 C205 CAP 20D2 C324 CAP_P 49B2 C441 CAP 36C4 C562 CAP 15D3 C676 CAP 11B3
C92 CAP 34B6 C206 CAP 22C2 C325 CAP 27D4 C442 CAP 36C5 C563 CAP 48B6 C677 CAP 11B1
A C93 CAP 17C3 C207 CAP 22C7 C326 CAP_P 50B2 C443 CAP 36B2 C564 CAP 48C2 C678 CAP 11B3 A
C94 CAP 17C3 C208 CAP 41A5 C327 CAP_P 50B2 C444 CAP 36B2 C565 CAP 20B5 C679 CAP 11B1
C95 CAP 18H5 C209 CAP 22B6 C328 CAP_P 50B2 C445 CAP 36C3 C566 CAP 20B7 C680 CAP 11C3
C96 CAP 18H2 C212 CAP 22D6 C329 CAP 49B3 C446 CAP 36C3 C567 CAP 20B7 C681 CAP 11B3
C97 CAP 17B3 C213 CAP 22D6 C330 CAP_P 49B2 C447 CAP 40B6 C568 CAP 20B8 C682 CAP 11B3
C98 CAP 18H6 C214 CAP 17B3 C331 CAP_P 49B2 C449 CAP 27D4 C569 CAP 20B8 C683 CAP 11A4
C99 CAP 17D1 C215 CAP 17A3 C332 CAP_P 49B2 C450 CAP 36B3 C570 CAP 32C8 C684 CAP 11A5
C100 CAP 17D3 C216 CAP 20D2 C333 CAP 50B6 C451 CAP 36B2 C572 CAP 48B7 C685 CAP 11A5
C101 CAP 17D2 C217 CAP 17C1 C334 CAP_P 45C1 C452 CAP 36B4 C573 CAP 32C8 C686 CAP 11A5
C102 CAP 17C2 C218 CAP_P 49B3 C335 CAP_P 45C2 C453 CAP 41B4 C574 CAP 32C8 C687 CAP 11B6
C103 CAP 17D2 C219 CAP 17C2 C336 CAP_P 45C2 C454 CAP 40C6 C576 CAP 48C3 C688 CAP 11C7
65
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
C689 CAP 11C1 C811 CAP 11D2 C929 CAP 14A7 C1041 CAP 8D3 C1912 CAP 8C1 J18 CON_M4ST_LCK 34B4
C690 CAP 11B2 C812 CAP 11C2 C930 CAP 50B8 C1042 CAP 8C1 C1913 CAP 8C1 J19 CON_37SM_MTOR 8C4
C691 CAP 11C2 C813 CAP 11B5 C931 CAP 50B5 C1043 CAP 8D2 C1914 CAP 8C1 J20 CON_38SM_MTOR 8D7
C692 CAP 28D6 C814 CAP 11B6 C932 CAP 50A5 C1044 CAP 45D7 C2201 CAP 20C8 J21 CON_M3ST_LCK 45C8
C693 CAP 11A6 C815 CAP 11C6 C933 CAP 50A6 C1045 CAP 45B7 C2202 CAP 20C4 J22 CON_F20SM_KX 8A4
C694 CAP 11A4 C816 CAP 11B6 C934 CAP 50B1 C1046 CAP 45C1 C2301 CAP 21C8 J23 CON_F1ST_S2MT_SM 28B7
C695 CAP 11A4 C817 CAP 11C6 C935 CAP_P 47B3 C1047 CAP 45D5 C2302 CAP 21C4 J24 CON_M12ST_SM 29B3
C696 CAP 11A4 C818 CAP 11B5 C936 CAP 15D3 C1048 CAP 45C2 C2501 CAP_P 23A8 J25 CON_F100RT_LP_SM 31D3
C697 CAP 11A6 C819 CAP 15D3 C937 CAP 50C7 C1049 CAP 45B7 C3001 CAP 28C5 J26 CON_F200RT_DDRDIMM_SM2 14D5
C698 CAP 11C5 C820 CAP 28C3 C938 CAP 50A4 C1050 CAP 45C7 C3002 CAP 28D5 J27 CON_F1ST_S2MT_SM 8B1
C699 CAP 11B7 C821 CAP 11C1 C939 CAP 50A6 C1051 CAP 45B6 C3003 CAP 28D5 J28 CON_F10ST_D_SMA 29D2
D C700
C701
CAP
CAP
11C7
44B2
C822
C823
CAP
CAP
11C1
11D7
C940
C941
CAP
CAP
50A5
50C5
C1052
C1053
CAP
CAP
45C8
46A7
C3004
C3005
CAP
CAP
28D4
28D4
J30
J31
CON_38SM_MTOR 8D4
CON_38SM_MTOR 8C7
D
C702 CAP 11D4 C824 CAP 11D6 C943 CAP 15A3 C1054 CAP 8B2 C3201 CAP 30D4 J32 CON_F12RT_S2MT_SM 8A8
C703 CAP 28D6 C825 CAP 11B7 C944 CAP 45D3 C1055 CAP 8B2 C3501 CAP 35D6 J4501 CON_F4ST_S2MT_SM 43B6
C704 CAP 28D5 C826 CAP 11B7 C945 CAP 15A2 C1056 CAP 8B1 C3502 CAP 33A8 J4502 CON_F4ST_S2MT_SM 43B6
C705 CAP 44A6 C827 CAP 11C5 C947 CAP_P 45C1 C1057 CAP 8B1 C3901 CAP 37D1 JAZ1 TP 51A5
C706 CAP 44A6 C828 CAP 11C1 C948 CAP 49B4 C1058 CAP 8B1 C4081 CAP 46C7 L1 IND 36D4
C707 CAP 11B3 C829 CAP 11C2 C949 CAP 45C5 C1059 CAP 42C7 C4201 CAP 42B6 L2 IND 33A5
C708 CAP 11B3 C830 CAP 11C3 C950 CAP 45D4 C1060 CAP 42C6 C4301 CAP 41A6 L3 IND 36D4
C709 CAP 11A5 C831 CAP 11D3 C951 CAP 45D4 C1061 CAP 42A7 C4502 CAP_P 43B5 L4 IND 27D5
C710 CAP 11A5 C832 CAP 11D7 C952 CAP 45D4 C1062 CAP 42A7 C4504 CAP 45B3 L5 FILTER_4P 36C2
C711 CAP 11A5 C833 CAP 11D3 C953 CAP 45D4 C1063 CAP 42C6 C4509 CAP 45C4 L6 FILTER_4P 36C2
C712 CAP 11B1 C834 CAP 11D6 C954 CAP 4C2 C1064 CAP 42C6 C4701 CAP 45B6 L7 FILTER_4P 36D2
C713 CAP 28D5 C835 CAP 11B3 C955 CAP 50D3 C1065 CAP 42A7 C4702 CAP 47B4 L8 FILTER_4P 36D2
C714 CAP 11B5 C836 CAP 11C6 C956 CAP 50D4 C1066 CAP 42C6 C4801 CAP 48B4 L9 IND 25C2
C715 CAP 44B2 C837 CAP 11C7 C957 CAP_P 45B1 C1067 CAP 42A7 C4901 CAP 49B4 L12 IND 48B3
C716 CAP 11B2 C838 CAP 11B7 C958 CAP 8D4 C1068 CAP 42D6 C5001 CAP 50C3 L13 IND 22D7
C717 CAP 11C3 C839 CAP 11C6 C959 CAP 49C4 C1069 CAP 42D4 C5002 CAP 50A3 L16 IND 28C3
C718 CAP 11B1 C840 CAP 28A6 C960 CAP 45B2 C1070 CAP 42C4 D1 DIODE_DUAL_6P 36A7 L19 IND 47B4
C719 CAP 11D2 C841 CAP 11D4 C961 CAP 8C2 C1071 CAP 42C4 D2 DIODE_DUAL_6P 36A7 L20 IND 45C3
C720 CAP 11C3 C842 CAP 11D6 C962 CAP 49C3 C1072 CAP 42C3 D3 DIODE_DUAL_6P 36A7 L21 IND_3P 49B3
C721 CAP 11D3 C843 CAP 11C7 C963 CAP 45D4 C1073 CAP 42C3 D4 DIODE_DUAL_6P 36B7 L22 IND_3P 50A3
C722 CAP 11B7 C844 CAP 11D6 C964 CAP 45D4 C1074 CAP 42C3 D5 ZENER_MMBZ15VDLT1 40B6 L23 IND 50C3
C723 CAP 11B6 C845 CAP 11D6 C965 CAP 45D4 C1075 CAP 42C2 D6 DIODE_DUAL_6P 25D4 L24 IND 45B3
C724 CAP 11B5 C846 CAP 11D7 C966 CAP 45D4 C1076 CAP 43D5 D7 DIODE_DUAL_6P 25D4 L26 IND 42A6
C725 CAP 11C7 C848 CAP 30D5 C967 CAP 8C1 C1077 CAP 43D5 D8 DIODE 36D6 L27 IND 41C3
C726 CAP 15D3 C849 CAP 11C6 C968 CAP 49C4 C1078 CAP 43D5 D9 DIODE 35B8 L32 IND 36B6
C727 CAP 11D4 C850 CAP 11B3 C969 CAP 8D4 C1079 CAP 43D5 D10 DIODE_SCHOT 23B8 L33 IND 22B7
C728 CAP 11C3 C851 CAP 11B3 C970 CAP 50D4 C1080 CAP_P 42B3 D11 DIODE_SCHOT 44D7 L34 IND 41D3
C729 CAP 11B3 C852 CAP 11B2 C971 CAP 50D4 C1081 CAP_P 42A3 D12 DIODE_SCHOT 44D7 L35 IND 41B3
C C730
C731
CAP
CAP
11D3
11D1
C854
C855
CAP
CAP
9D3
11C5
C972
C973
CAP
CAP
8D2
8D1
C1082
C1083
CAP
CAP
42B2
42B2
D13
D14
DIODE_SCHOT 47C7
DIODE_SCHOT 47B5
L36
L39
IND
IND
40B6
41A3
C
C732 CAP 11D1 C856 CAP 11B7 C974 CAP 8D1 C1084 CAP 42B2 D15 DIODE_SCHOT 49B3 L40 IND 42A5
C733 CAP 11A6 C857 CAP 11C6 C975 CAP 49C4 C1085 CAP 42B2 D16 DIODE_SCHOT 50C5 L41 IND 42B7
C734 CAP 11D2 C858 CAP 13D4 C976 CAP 8C1 C1086 CAP 42A2 D17 DIODE_SCHOT 50B5 L42 IND 41B3
C735 CAP 11B7 C859 CAP 13D3 C977 CAP 8D1 C1087 CAP 43D2 D18 DIODE_SCHOT 49C6 L43 IND 41A4
C736 CAP 11B5 C860 CAP 13D4 C978 CAP 50D4 C1088 CAP 43D2 D19 DIODE_SCHOT 46D6 L44 IND 41C3
C741 CAP 15D3 C861 CAP 44A1 C979 CAP 50D4 C1089 CAP 42B2 D20 DIODE_SCHOT 45D5 L45 IND 41D3
C742 CAP 51C6 C862 CAP 44B7 C980 CAP 8D2 C1090 CAP 42B2 D21 DIODE_SCHOT 45B5 L46 IND 40C6
C743 CAP 11B3 C863 CAP 11C2 C981 CAP 8D2 C1091 CAP 42B2 D23 DIODE_SCHOT_3P 42A6 L47 IND 41B3
C744 CAP 11B1 C864 CAP 15D2 C982 CAP 8D2 C1092 CAP 42B2 D24 ZENER_MMBZ15VDLT1 41B2 L48 IND 40C6
C745 CAP 11C3 C865 CAP 11B1 C983 CAP 8D3 C1093 CAP 42A2 D25 ZENER 36B6 L49 IND 40B5
C746 CAP 11D3 C866 CAP 11C3 C984 CAP 27D3 C1094 CAP 43C2 D26 ZENER_MMBZ15VDLT1 41B2 L50 IND 40C5
C747 CAP 11D1 C867 CAP 11C3 C985 CAP 50D3 C1095 CAP 43D2 D27 DIODE_DUAL_6P 25B4 L51 IND 40D6
C748 CAP 11D2 C868 CAP 11C2 C986 CAP 50D4 C1096 CAP 8A7 D28 DIODE_DUAL_6P 25B4 L52 IND 40C5
C749 CAP 11D3 C869 CAP 11D5 C987 CAP 8D2 C1097 CAP 8A7 D29 ZENER_MMBZ15VDLT1 40B5 L53 IND 40D5
C750 CAP 11B6 C870 CAP 11D6 C988 CAP 8D3 C1098 CAP 8B5 D30 DIODE_SCHOT 48C5 L56 IND 44A1
C751 CAP 11B7 C871 CAP 11D6 C989 CAP 49C3 C1099 CAP 42C8 D31 DIODE_SCHOT 48B3 L57 IND 44A1
C752 CAP 11B6 C872 CAP 11D5 C990 CAP 8D1 C1100 CAP 42C2 D32 DIODE_SCHOT 48B5 L58 IND 32D6
C753 CAP 11B6 C873 CAP 11D5 C991 CAP 8D1 C1101 CAP 9D3 D33 DIODE_SCHOT 46B6 L59 IND 43A5
C754 CAP 11B5 C874 CAP 11D5 C992 CAP 8D3 C1102 CAP_P 42B3 D34 DIODE_SCHOT 48B2 L60 IND 43B5
C755 CAP 11B6 C875 CAP 11B3 C993 CAP 8D1 C1103 CAP 22B5 D35 DIODE_SCHOT 44D6 L63 IND 39D4
C759 CAP 44D5 C876 CAP 11C5 C994 CAP 8C2 C1401 CAP 14D7 D36 DIODE_SCHOT 44D6 L64 IND 24A5
C760 CAP 16D6 C877 CAP 11C7 C995 CAP 8D2 C1402 CAP 14D2 D37 DIODE_SCHOT 50B2 L65 IND 29A7
C761 CAP 11B3 C878 CAP 11C7 C996 CAP 8A7 C1403 CAP 14C1 D38 DIODE_SCHOT 50C6 L66 IND 29A3
C762 CAP 11C1 C879 CAP 11B2 C997 CAP 8A6 C1404 CAP 14C1 D39 DIODE_SCHOT 50B4 L67 FILTER_4P 24B5
C763 CAP 11D2 C880 CAP 11C5 C998 CAP 8D2 C1405 CAP 14C1 D40 DIODE_SCHOT 50A4 L68 IND 22D2
C764 CAP 11D3 C881 CAP 11B3 C999 CAP 8D1 C1406 CAP 14C3 D41 DIODE_SCHOT 45C4 L69 IND 29A3
C765 CAP 11D3 C882 CAP 11B1 C1000 CAP 49B6 C1407 CAP 14C2 D42 DIODE_SCHOT 49B5 L70 IND 29A7
B C766
C767
CAP
CAP
11D1
11C6
C883
C884
CAP
CAP
11B2
11D6
C1001
C1002
CAP
CAP
8A6
8A7
C1408
C1409
CAP
CAP
14C2
14C2
D43
D44
DIODE_SCHOT 45B4
DIODE_SCHOT 45D2
L71
L72
FILTER_4P 24B5
IND 29A7
B
C768 CAP 11B6 C885 CAP 11D7 C1003 CAP 8D1 C1410 CAP 14C2 D45 DIODE_SCHOT 45D6 L73 IND 29A3
C773 CAP 51C6 C886 CAP 11D5 C1004 CAP 49B6 C1411 CAP 14C1 D46 DIODE_SCHOT 49B1 L74 FILTER_4P 24C5
C774 CAP 11C1 C887 CAP 11D7 C1005 CAP 49C4 C1412 CAP 14C1 D47 DIODE 36D6 L75 IND 29A7
C775 CAP 11C3 C888 CAP 11D6 C1006 CAP 45C2 C1413 CAP 14C1 D48 DIODE_DUAL_SWI 42B6 L76 FILTER_4P 24D5
C776 CAP 11B2 C889 CAP 11D6 C1007 CAP 8C2 C1414 CAP 14B1 D4901 DIODE_SCHOT 47B2 L77 IND 29B7
C777 CAP 11C1 C890 CAP 11D7 C1008 CAP 8B6 C1415 CAP 14C3 DS1 LED 35A2 L78 IND 29A3
C778 CAP 22B6 C891 CAP 11D6 C1009 CAP 8A7 C1416 CAP 14C2 DS2 LED 35A1 L79 IND 43B7
C779 CAP 11D1 C892 CAP 11C4 C1010 CAP 8B6 C1417 CAP 14C2 DS3 LED 35A1 L80 IND 29B3
C780 CAP 11D2 C893 CAP 11C1 C1011 CAP 8B6 C1418 CAP 14C2 DS4 LED 30A3 L81 IND 43A7
C781 CAP 11B5 C894 CAP 11C2 C1012 CAP 8A7 C1419 CAP 14C2 DS5 LED 51C8 L82 IND 24D5
C782 CAP 11B7 C895 CAP 11D5 C1013 CAP 8D2 C1420 CAP 14C1 DS6 LED 51A6 L83 IND 43A7
C783 CAP 44D5 C896 CAP 11D5 C1014 CAP 8D2 C1421 CAP 14C1 DS7 LED 38B2 L84 IND 50D6
C784 CAP 28A6 C897 CAP 11D6 C1015 CAP 49B7 C1501 CAP 15D7 DS8 LED 38B6 L85 IND 50D6
C785 CAP 28C3 C898 CAP 11D5 C1016 CAP 8C1 C1502 CAP 15D1 DS9 LED 50D5 L86 IND 50D6
C786 CAP 27D3 C899 CAP 11D5 C1017 CAP 8A6 C1503 CAP 15D1 DS10 LED 51A4 L87 IND 27D5
C787 CAP 11D3 C900 CAP 11D7 C1018 CAP 8A6 C1504 CAP 15D3 DZ1 ZENER 51B1 L88 IND 27D2
C788 CAP 11D3 C901 CAP 11D7 C1019 CAP 49C6 C1505 CAP 15D3 F2 FUSE 36D5 L89 IND 42C7
C789 CAP 11D3 C902 CAP 11C7 C1020 CAP 8C1 C1506 CAP 15D3 F3 FUSE 36D5 L90 IND 42C6
C790 CAP 11D1 C903 CAP 11B2 C1021 CAP 8C1 C1507 CAP 15D2 FL2 FILTER_LC 25C6 L91 IND 42C6
C791 CAP 11B6 C904 CAP 11C6 C1022 CAP 8B7 C1508 CAP 15D2 FL3 FILTER_LC 25C6 L92 IND 42C7
C792 CAP 11B6 C908 CAP 13C2 C1023 CAP 8A6 C1509 CAP 15D2 FL4 FILTER_LC 25B6 L93 IND 42C3
C793 CAP 11C6 C909 CAP 13C2 C1024 CAP 8A6 C1510 CAP 15D1 J1 CON_RJ45 35C1 L94 IND 42C2
C794 CAP 11C5 C910 CAP 13C1 C1025 CAP 8B6 C1511 CAP 15D1 J2 CON_FWVERT_SKT 36C1 L95 IND 42C2
C795 CAP 28C3 C911 CAP 37C2 C1026 CAP 8D2 C1512 CAP 15D1 J3 CON_F8RT_S_TH1 42B5 L96 IND 42C3
C796 CAP 11C3 C914 CAP 15D2 C1027 CAP 8B7 C1513 CAP 15D1 J4 CON_F4RT_USB_UPRIGHT 33C3 L97 IND 43D7
C797 CAP 11D3 C915 CAP 51D7 C1028 CAP 8A6 C1514 CAP 15C3 J5 CON_FWVERT_SKT 36D1 L98 IND 43D7
C798 CAP 11D1 C917 CAP 37C5 C1029 CAP 45B4 C1515 CAP 15C3 J6 CON_F4RT_USB_UPRIGHT 33B3 L99 IND 42B3
A C799 CAP 11D1 C918 CAP 51D6 C1030 CAP 45B2 C1601 CAP 14D7 J7 CON_F4RT_USB_UPRIGHT 33D3 L100 FILTER_4P 33D5 A
C800 CAP 11D2 C919 CAP 38C7 C1031 CAP 8A6 C1602 CAP 14D3 J8 CON_F4RT_S4MT_TH1 41C1 L101 FILTER_4P 33C5
C801 CAP 11B7 C920 CAP 38C1 C1032 CAP 8C2 C1702 CAP 15D7 J9 CON_F14RT_D4MT_TH1 25C5 L102 FILTER_4P 33B5
C802 CAP 11B5 C921 CAP 38C5 C1033 CAP 8C1 C1801 CAP 16D5 J10 CON_F4RT_S4MT_TH1 40C7 L103 IND 29B3
C803 CAP 11B6 C922 CAP 15D2 C1034 CAP 45B2 C1802 CAP 16A7 J11 CON_F184ST_DDRDIMM 15D5 L2401 IND 22C7
C805 CAP 11B2 C923 CAP 38B5 C1035 CAP 4D3 C1901 CAP 8A7 J12 CON_F21ST_D2MT_SM 24C4 L2501 IND 23A6
C806 CAP 11C2 C924 CAP 38B7 C1036 CAP 4D3 C1902 CAP 8A6 J13 CON_M40SM_635 29D6 LP1 LPAK4P 42A8
C807 CAP 11B2 C925 CAP 15D3 C1037 CAP 8C1 C1903 CAP 8A6 J14 CON_M18ST_D_TH 29B5 Q1 TRA_2N7002 51C3
C808 CAP 11D2 C926 CAP 50C1 C1038 CAP 45B4 C1904 CAP 8A6 J15 CON_M40ST_NC20 38D6 Q2 TRA_2N7002 42D7
C809 CAP 11C3 C927 CAP 50B1 C1039 CAP 45C5 C1910 CAP 8A6 J16 CON_M40ST_NC20 38D2 Q3 TRA_2N7002 42C7
C810 CAP 11D2 C928 CAP_P 47B4 C1040 CAP 8C2 C1911 CAP 8C2 J17 CON_M16ST_MICROFIT 50D7 Q4 TRA_2N7002 42B8
66
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Q5 TRA_2N7002 41A5 R61 RES 18A3 R171 RES 22B6 R288 RES 12D5 R400 RES 41C4 R510 RES 30B4
Q6 TRA_2N7002 42B6 R62 RES 18A2 R172 RES 12A1 R289 RES 28C8 R401 RES 26B6 R511 RES 30A3
Q7 TRA_SUD70N03 48B4 R63 RES 19A4 R173 RES 22C7 R290 RES 44D8 R402 RES 36B4 R512 RES 15C3
Q8 TRA_SUD50N03 48B4 R64 RES 18D3 R174 RES 22C6 R291 RES 28C7 R403 RES 19B2 R515 RES 48B5
Q9 TRA_SUD50N03 48C4 R65 RES 19A4 R175 RES 40D4 R292 RES 28C7 R404 RES 36D8 R517 RES 39C5
Q10 TRA_2N7002 22B7 R66 RES 18D2 R176 RES 20A4 R293 RES 31C5 R405 RES 15C2 R518 RES 46B5
Q11 TRA_FDC602P 51C2 R67 RES 18D2 R177 RES 17A5 R294 RES 28C1 R406 RES 41D4 R519 RES 46A5
Q12 TRA_2N3904 44D7 R68 RES 19A4 R178 RES 22C7 R295 RES 47B3 R407 RES 40C5 R521 RES 39C5
Q13 TRA_2N7002 51B2 R69 RES 19A4 R179 RES 22C6 R296 RES 47B7 R408 RES 26A6 R522 RES 42B8
Q14 TRA_2N7002 51C7 R70 RES 18D3 R180 RES 40D5 R297 RES 44D6 R409 RES 36D7 R523 RES 48C6
Q15 TRA_2N7002 51B7 R71 RES 18D6 R181 RES 41A4 R298 RES 44B1 R410 RES 40B5 R524 RES 39B4
D Q16
Q17
TRA_2N7002 51A7
TRA_2N7002 51B6
R72
R73
RES
RES
17A5
26C2
R182
R183
RES
RES
41A4
22C3
R299
R300
RES
RES
47B3
51C8
R411
R412
RES
RES
36C5
41C4
R525
R526
RES
RES
42B7
42B7
D
Q18 TRA_2N7002 51A7 R74 RES 26D2 R184 RES 23C6 R301 RES 47B5 R413 RES 43B5 R527 RES 48B7
Q19 TRA_2N7002 51A6 R75 RES 35B8 R185 RES 22B6 R302 RES 51A6 R414 RES 43B5 R528 RES 39C4
Q20 TRA_FDC602P 51D7 R76 RES 35B8 R186 RES 19A6 R303 RES 34D7 R415 RES 19A3 R529 RES 48C6
Q21 TRA_2N7002 50C1 R77 RES 26D2 R187 RES 19A6 R304 RES 47B3 R416 RES 19A3 R531 RES 39C2
Q22 TRA_2N7002 50D1 R78 RES 32A7 R188 RES 22B2 R305 RES 28A2 R417 RES 36C7 R532 RES 39C4
Q23 TRA_2N7002 50C2 R79 RES 26C2 R191 RES 22B6 R306 RES 28B8 R418 RES 36C6 R533 RES 26D6
Q24 TRA_2N7002 50C2 R80 RES 17A5 R192 RES 17A2 R307 RES 34D7 R419 RES 41D4 R535 RES 26D1
Q25 TRA_IRF7807Z 47B5 R81 RES 19A7 R193 RES 17A2 R308 RES 8B1 R420 RES 40B4 R537 RES 27A5
Q26 TRA_IRF7807Z 47B5 R82 RES 12A8 R194 RES 22B6 R309 RES 47B7 R421 RES 43B5 R540 RES 24A6
Q27 TRA_SUD70N03 49B4 R83 RES 18A5 R195 RES 17A3 R310 RES 9A4 R422 RES 36C6 R541 RES 26A6
Q28 TRA_SUD50N03 49B4 R84 RES 18G2 R196 RES 17A3 R311 RES 4B8 R423 RES 36B5 R542 RES 26B6
Q29 TRA_2N7002 45D8 R85 RES 23D6 R197 RES 16A7 R312 RES 4A8 R424 RES 36C7 R543 RES 26B1
Q30 TRA_2N3904 36C7 R86 RES 23D6 R198 RES 17C1 R313 RES 8A2 R425 RES 36C7 R545 RES 16A7
Q31 TRA_2N7002 41A8 R87 RES 26B3 R199 RES 22D6 R314 RES 8B2 R426 RES 26A5 R546 RES 24A5
Q32 TRA_2N7002 39C7 R88 RES 18A5 R200 RES 22D6 R315 RES 47B3 R427 RES 26B5 R547 RES 24A6
Q33 TRA_2N3904 43A2 R89 RES 32D3 R203 RES 16C8 R316 RES 47B7 R428 RES 19A3 R548 RES 27A7
Q34 TRA_SUD70N03 48B4 R90 RES 18G3 R204 RES 16B8 R317 RES 47C5 R429 RES 19A3 R549 RES 16A8
Q35 TRA_2N7002 40D4 R91 RES 23D6 R205 RES 16A8 R318 RES 47C6 R430 RES 36B6 R550 RES 24A5
Q36 TRA_2N7002 42D3 R92 RES 23D6 R206 RES 22D6 R319 RES 9A5 R431 RES 36C7 R551 RES 24A5
Q37 TRA_FDC602P 51C6 R93 RES 12A8 R207 RES 23D2 R320 RES 47B5 R432 RES 36C7 R552 RES 26C8
Q38 TRA_2N7002 51B6 R94 RES 26A3 R208 RES 23D2 R321 RES 9A5 R433 RES 36B6 R553 RES 26D8
Q39 TRA_2N3904 50C7 R95 RES 18A5 R210 RES 17B7 R322 RES 50C2 R434 RES 40C4 R554 RES 22C7
Q40 TRA_SUD70N03 45C4 R96 RES 35B1 R211 RES 16C7 R323 RES 50D2 R435 RES 40C4 R555 RES 22C3
Q41 TRA_2N7002 15B2 R97 RES 19A7 R212 RES 30B3 R324 RES 42B5 R436 RES 40B4 R556 RES 22C2
Q42 TRA_2N7002 15C2 R98 RES 23D6 R213 RES 23C5 R326 RES 35B3 R437 RES 40B4 R557 RES 22C2
Q43 TRA_SUD70N03 45C4 R99 RES 42D8 R214 RES 12B1 R328 RES 29D3 R438 RES 36C8 R558 RES 17B7
Q44 TRA_SUD50N03 45C4 R100 RES 26A8 R215 RES 16C7 R329 RES 29D3 R439 RES 26B4 R559 RES 24B6
Q45 TRA_IRF7807Z 50B4 R101 RES 19A7 R216 RES 16B7 R330 RES 50A8 R440 RES 41A8 R560 RES 26C7
C Q46
Q47
TRA_IRF7807Z 50C4
TRA_SUD50N03 50A4
R102
R103
RES
RES
23C5
19B2
R217
R218
RES
RES
16D3
30D6
R331
R332
RES
RES
50B8
50A7
R441
R442
RES
RES
41D6
40C4
R561
R562
RES
RES
26D7
22C6
C
Q48 TRA_SUD50N03 50A4 R104 RES 19B2 R219 RES 30D6 R333 RES 28A2 R443 RES 26A4 R563 RES 27A6
Q49 TRA_SUD70N03 45B4 R105 RES 19C2 R220 RES 16C7 R334 RES 49B1 R444 RES 41C6 R564 RES 23C5
Q50 TRA_SUD50N03 45B4 R106 RES 19C2 R221 RES 16D1 R335 RES 50A5 R445 RES 26B6 R565 RES 28D5
Q51 TRA_SUD70N03 45B4 R107 RES 23D5 R222 RES 16D3 R336 RES 50C5 R446 RES 41C6 R566 RES 30D6
Q52 TRA_2N7002 15B2 R108 RES 42D7 R223 RES 16D1 R337 RES 50B5 R447 RES 41D6 R567 RES 24B5
Q53 TRA_2N7002 15A2 R109 RES 42D6 R224 RES 16C7 R338 RES 9C5 R448 RES 40B3 R568 RES 24B5
Q54 TRA_2N7002 15B2 R110 RES 42C8 R225 RES 16D7 R339 RES 9D5 R449 RES 26A6 R569 RES 22B3
R1 RES 36D4 R111 RES 18G2 R226 RES 16C7 R340 RES 9D5 R450 RES 33B5 R570 RES 24B6
R2 RES 25B4 R112 RES 23D6 R227 RES 30C6 R341 RES 9C5 R451 RES 33B6 R571 RES 28D8
R3 RES 25B4 R113 RES 23D5 R228 RES 28C7 R342 RES 9A7 R452 RES 33C5 R572 RES 28D8
R4 RES 21A4 R114 RES 23C5 R230 RES 30C6 R343 RES 9C6 R453 RES 33C6 R573 RES 28C6
R5 RES 21A3 R115 RES 23C5 R231 RES 28C8 R344 RES 9A7 R454 RES 33D5 R574 RES 28C8
R6 RES 21A4 R116 RES 26C6 R232 RES 28C6 R345 RES 9A7 R455 RES 33D6 R575 RES 34C1
R7 RES 25B5 R117 RES 18G3 R233 RES 16B3 R346 RES 7C7 R456 RES 33B7 R576 RES 34C1
R8 RES 36C4 R118 RES 22D3 R234 RES 16D1 R347 RES 7C7 R457 RES 33B7 R577 RES 28C7
R9 RES 36C4 R119 RES 23C5 R235 RES 12A1 R348 RES 7C7 R458 RES 33C7 R578 RES 30B6
R10 RES 36C4 R120 RES 42B8 R236 RES 26D2 R349 RES 7B7 R459 RES 33C7 R579 RES 30A8
R11 RES 36C4 R121 RES 42C8 R237 RES 23C5 R350 RES 7A7 R460 RES 33D7 R580 RES 16B3
R12 RES 36C3 R122 RES 19A7 R238 RES 27A6 R351 RES 9C5 R461 RES 33D7 R581 RES 24B5
R13 RES 36C3 R123 RES 19D2 R239 RES 42B7 R352 RES 9C6 R462 RES 40B3 R582 RES 24C5
R14 RES 36C3 R124 RES 23C5 R240 RES 42B6 R353 RES 9A7 R463 RES 18B8 R583 RES 26D3
R15 RES 36C3 R125 RES 26D5 R241 RES 27A5 R354 RES 9C6 R464 RES 32C3 R584 RES 29D7
R16 RES 36B3 R126 RES 26C6 R242 RES 42B5 R355 RES 9C7 R465 RES 32C3 R585 RES 29D6
R17 RES 21A3 R127 RES 32B8 R243 RES 27A6 R356 RES 6C4 R466 RES 32C2 R586 RES 28D6
R18 RES 21A4 R128 RES 32B8 R244 RES 27A5 R357 RES 6C4 R467 RES 32C2 R587 RES 16B3
R19 RES 25B5 R129 RES 32D3 R245 RES 42B5 R358 RES 9C6 R468 RES 32C3 R588 RES 26C3
R20 RES 19C2 R130 RES 18D2 R246 RES 23B7 R359 RES 9C7 R469 RES 32C3 R589 RES 28A8
B R21
R22
RES
RES
51D3
51C4
R131
R132
RES
RES
18D3
19D2
R247
R248
RES
RES
28A2
27A7
R360
R361
RES
RES
9C6
45B3
R470
R471
RES
RES
32B3
15C1
R590
R591
RES
RES
28D6
24C6
B
R23 RES 51D3 R133 RES 22D3 R249 RES 42B5 R362 RES 45B3 R472 RES 41C7 R592 RES 23A7
R24 RES 19A3 R134 RES 26B8 R250 RES 27A7 R363 RES 6C5 R473 RES 41D7 R593 RES 24C5
R25 RES 19A3 R135 RES 42D7 R251 RES 51B3 R364 RES 6C5 R474 RES 40C3 R594 RES 24D5
R26 RES 35B4 R136 RES 26C5 R252 RES 30C7 R365 RES 6C4 R475 RES 48B1 R595 RES 26D5
R27 RES 35C4 R137 RES 12B1 R253 RES 30C8 R366 RES 9C7 R476 RES 32B3 R596 RES 26D5
R28 RES 35A8 R138 RES 30B3 R254 RES 34B4 R367 RES 6C4 R477 RES 41B4 R597 RES 26C3
R29 RES 35B7 R139 RES 30B4 R255 RES 30C7 R368 RES 6C4 R478 RES 41B5 R598 RES 26D3
R30 RES 35C3 R140 RES 19A7 R256 RES 30C8 R369 RES 49C6 R479 RES 19A6 R599 RES 22A8
R31 RES 19A3 R141 RES 23B5 R257 RES 34B3 R370 RES 50D5 R480 RES 32B2 R600 RES 24D6
R32 RES 19A3 R142 RES 26C5 R258 RES 37D5 R371 RES 49B6 R481 RES 39B6 R601 RES 51B3
R33 RES 35C4 R143 RES 18G2 R259 RES 30C7 R372 RES 46D4 R482 RES 39C6 R602 RES 23A7
R34 RES 35C7 R144 RES 23B2 R261 RES 12D5 R373 RES 32A7 R483 RES 19A6 R603 RES 24D5
R35 RES 36D6 R145 RES 22D3 R262 RES 30C8 R374 RES 6C6 R484 RES 32A7 R604 RES 44A3
R36 RES 18B8 R146 RES 19A7 R263 RES 37D4 R375 RES 6C6 R485 RES 35B2 R605 RES 44A5
R37 RES 35C4 R147 RES 19A7 R264 RES 28D1 R376 RES 6C7 R486 RES 35B2 R606 RES 44A5
R38 RES 35C7 R148 RES 19C2 R265 RES 38B4 R377 RES 6C7 R487 RES 43A6 R607 RES 51A5
R39 RES 36D6 R149 RES 23B5 R266 RES 37C6 R378 RES 6C7 R488 RES 43B4 R608 RES 51A5
R40 RES 35C4 R150 RES 48C5 R267 RES 28B1 R379 RES 6C8 R489 RES 43B4 R609 RES 51A5
R41 RES 18B8 R151 RES 20A4 R268 RES 38B4 R380 RES 6C7 R490 RES 32B3 R610 RES 46B4
R42 RES 35B4 R152 RES 20A5 R269 RES 34C4 R381 RES 6C8 R491 RES 35B2 R611 RES 28A6
R43 RES 33D7 R153 RES 19A7 R270 RES 37D2 R382 RES 6C8 R492 RES 35B1 R612 RES 51A5
R44 RES 33D7 R154 RES 18G3 R271 RES 28B3 R383 RES 6C8 R493 RES 28A2 R613 RES 29A8
R45 RES 33C7 R155 RES 18G2 R272 RES 28B3 R384 RES 45C5 R494 RES 32B7 R614 RES 51A5
R46 RES 33C7 R156 RES 19C2 R273 RES 37D2 R385 RES 46D6 R495 RES 15B1 R615 RES 51A6
R47 RES 33B7 R157 RES 23B3 R274 RES 28C7 R386 RES 45B5 R496 RES 48C2 R616 RES 30D8
R48 RES 33B7 R158 RES 19D2 R275 RES 34C4 R387 RES 45B5 R497 RES 15C1 R617 RES 30D8
R49 RES 18B7 R159 RES 19A7 R276 RES 28C8 R388 RES 45B6 R498 RES 43A2 R618 RES 30C7
A R50 RES 18B7 R160 RES 17A5 R277 RES 51B2 R389 RES 45B6 R499 RES 48C3 R619 RES 16D6 A
R51 RES 42B7 R161 RES 16D1 R278 RES 51B3 R390 RES 35C1 R500 RES 19C2 R620 RES 28D5
R52 RES 18C5 R162 RES 41A5 R279 RES 51B2 R391 RES 35C2 R501 RES 39C7 R621 RES 30C6
R53 RES 19A4 R163 RES 20A4 R280 RES 44D8 R392 RES 41B3 R502 RES 39D7 R622 RES 16C6
R54 RES 18D3 R164 RES 18G3 R281 RES 44D7 R393 RES 35C2 R503 RES 48B6 R623 RES 37D5
R55 RES 19A4 R165 RES 35C4 R282 RES 44D7 R394 RES 35C2 R504 RES 48C3 R624 RES 37A7
R56 RES 18D2 R166 RES 20A4 R283 RES 51B3 R395 RES 36B7 R505 RES 48C5 R625 RES 12B6
R57 RES 19A4 R167 RES 19A7 R284 RES 51A3 R396 RES 28A2 R506 RES 19A7 R626 RES 37D2
R58 RES 18D3 R168 RES 17A7 R285 RES 31C1 R397 RES 26A7 R507 RES 15B1 R627 RES 37D5
R59 RES 18C2 R169 RES 17A4 R286 RES 12A3 R398 RES 28A2 R508 RES 15B3 R628 RES 28D5
R60 RES 19A4 R170 RES 22B5 R287 RES 44D5 R399 RES 26B7 R509 RES 19A7 R629 RES 28D5
67
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R630 RES 28D5 R761 RES 37C5 R896 RES 45C5 R1007 RES 33D5 RP19 RPAK4P 19D7 U6 OPAMP_TLV2362 40B3 40C3
R635 RES 37D3 R762 RES 28B3 R897 RES 45B5 R1008 RES 33C5 RP20 RPAK4P 19D7 U7 SHNTREG_TLV431A 18B8
R636 RES 44B6 R763 RES 28B3 R898 RES 45B5 R1009 RES 33C5 RP21 RPAK4P 19D7 U8 AMP_TPA6112A2 41D5
R637 RES 34B3 R764 RES 9B4 R899 RES 45D6 R1010 RES 33B5 RP22 RPAK4P 18F2 18F3 18G2 18G3 U9 CLK_GEN_CY25811 22A7
R640 RES 37A5 R765 RES 9A4 R900 RES 45C5 R1011 RES 33B5 RP23 RPAK4P 18E2 18E3 U10 NC7WZ08 42C7
R641 RES 28D1 R766 RES 9A4 R901 RES 4D3 R1012 RES 51B2 RP24 RPAK4P 19C5 U11 UPD720101_FBGA 32C5
R645 RES 51B6 R767 RES 37D2 R902 RES 7A3 R1013 RES 50D7 RP25 RPAK4P 19C5 19D5 U12 SDRAM_DDR_4MX32 20D6 20D7
R646 RES 44C1 R768 RES 37D5 R903 RES 7A3 R1014 RES 50C8 RP26 RPAK4P 19C5 U13 OPAMP_TLV2362 43A3 43A4
R647 RES 34B4 R769 RES 51D7 R904 RES 7A3 R1015 RES 29B4 RP27 RPAK4P 19D5 U14 VREG_LP2951 39D6
R648 RES 44B2 R770 RES 51D7 R905 RES 7A3 R1016 RES 36D7 RP28 RPAK4P 19D5 U15 TAS3004 39C3
R649 RES 44C3 R772 RES 9A4 R906 RES 7B3 R1017 RES 51C3 RP29 RPAK4P 19D5 U16 SHNTREG_TLV431A 20A5
D R650
R651
RES
RES
28A2
28A2
R773
R774
RES
RES
37D2
37D4
R907
R908
RES
RES
7B3
45D6
R1018
R1019
RES
RES
51C2
23C6
RP30
RP31
RPAK4P
RPAK4P
17D7
17C7
U18
U19
CBTV4020 13D7
VREG_LT1962 28D7
D
R653 RES 44B7 R775 RES 38C7 R909 RES 7B5 R1020 RES 23C6 RP32 RPAK4P 17D7 U20 VREG_LM1117 23A8
R654 RES 44A5 R776 RES 9A5 R910 RES 7B5 R1021 RES 26A1 RP33 RPAK4P 17B7 U21 VDET_MC33465N_22ATR 44A4
R655 RES 44B2 R777 RES 9A4 R911 RES 7B5 R1022 RES 26C2 RP34 RPAK4P 17C7 U22 CBTV4020 13B6
R656 RES 44A6 R779 RES 38C1 R912 RES 7A5 R1023 RES 26C1 RP35 RPAK4P 17B7 U23 MAX6328 44A5
R657 RES 44C3 R780 RES 38C3 R913 RES 7C3 R1024 RES 17A4 RP36 RPAK4P 17A7 U25 INTREPID 9D2 10D5 10D7 12D7 16D5 28C4 30D5
R658 RES 44C3 R781 RES 38C5 R914 RES 7C3 R1025 RES 17A4 RP37 RPAK4P 16B3 16C3 16C3 34C5 37D8
R659 RES 44C2 R782 RES 38C7 R915 RES 7C3 R1026 RES 17C7 RP38 RPAK4P 30B6 U26 M16C62 44C5
R660 RES 28A1 R783 RES 38C4 R916 RES 7B3 R1027 RES 17C7 RP39 RPAK4P 28D2 U27 CBTV4020 13D4
R661 RES 28C7 R784 RES 38C7 R917 RES 7B3 R1028 RES 32A7 RP40 RPAK4P 17D7 U28 VREG_TL431 44D8
R664 RES 51B6 R785 RES 38C4 R918 RES 7C3 R1029 RES 32A7 RP41 RPAK4P 17C7 U29 CBTV4020 13C2
R665 RES 44C1 R786 RES 38A4 R919 RES 7B3 R1401 RES 14B2 RP42 RPAK4P 17D7 U31 DCDC_SC2602 47B6
R666 RES 28A6 R787 RES 38B4 R920 RES 7B3 R1402 RES 14A2 RP43 RPAK4P 17C7 U33 LTC3707 50B6
R667 RES 16D6 R788 RES 38A7 R921 RES 7B5 R1403 RES 14D7 RP44 RPAK4P 17C7 U34 APOLLO_MPC7445_360 4C5 5D3 5D6
R668 RES 29C3 R789 RES 38B7 R922 RES 7A5 R1404 RES 14C7 RP45 RPAK4P 17B7 U35 TRA_SI4435DY 51D3
R669 RES 29C2 R790 RES 38B7 R923 RES 7A5 R1405 RES 14C7 RP46 RPAK4P 17B7 U36 SDRAM_DDR_4MX32 21D2 21D3
R670 RES 29C2 R791 RES 38B7 R924 RES 7D5 R1406 RES 14C7 RP47 RPAK4P 17A7 U37 TRANSCEIVER_BCM5221 35C5
R671 RES 44C1 R792 RES 38B2 R925 RES 7C5 R1407 RES 14C7 RP48 RPAK4P 16B3 U38 SN74AUC1G04 30B3
R672 RES 28A6 R793 RES 38B6 R926 RES 7C3 R1408 RES 14C7 RP49 RPAK4P 16B1 16B1 16C1 U39 NV18B 17D6 18G5 18G7 22D4 23D4
R673 RES 34B4 R794 RES 50C7 R927 RES 46C5 R1409 RES 14C7 RP50 RPAK4P 16B1 U40 DCDC_SC2602 48C6
R676 RES 44B4 R795 RES 50A6 R928 RES 45C5 R1410 RES 14C7 RP51 RPAK4P 12C2 U41 SDRAM_DDR_4MX32 20D2 20D3
R677 RES 44C2 R796 RES 15A8 R929 RES 45C5 R1411 RES 14B7 RP52 RPAK4P 12B2 U42 FEPR_1MX8 30C2
R678 RES 28C8 R797 RES 50A5 R930 RES 46C5 R1412 RES 14B7 RP54 RPAK4P 31B7 U45 DCDC_SC2602 49C5
R679 RES 37A2 R798 RES 50A5 R931 RES 45D7 R1413 RES 14B7 RP56 RPAK4P 31B7 U46 SN74LVC1G04 44D1
R680 RES 28A8 R799 RES 50B8 R932 RES 45C7 R1414 RES 14B7 RP58 RPAK4P 31C7 U47 LTC3707 45C6
R682 RES 50D5 R800 RES 45C3 R933 RES 45D7 R1415 RES 14B7 RP59 RPAK4P 31C7 U48 NC7WZ08 41A7 43C7
R683 RES 28A1 R801 RES 45C3 R934 RES 45C8 R1416 RES 14B7 RP60 RPAK4P 28C2 U49 AMP_SN0210045A 42D5
R684 RES 34C1 R802 RES 50B5 R935 RES 45A5 R1417 RES 14B7 RP61 RPAK4P 31B7 U3501 SWI_TPS2023 33A7
R685 RES 51B7 R803 RES 50B5 R936 RES 45A5 R1418 RES 14A7 RP62 RPAK4P 12C3 VR1 VREG_LM1117 39C7
C R686
R687
RES
RES
44A7
44A7
R804
R805
RES
RES
50B6
50A3
R937
R939
RES
RES
8A4
8A4
R1503
R1504
RES
RES
15C7
15C7
RP63
RP64
RPAK4P
RPAK4P
30B8
31B7
VR2
VR3
VREG_MIC39102 46B6
VREG_EZ1582 51B4
C
R688 RES 44C2 R806 RES 50C6 R940 RES 8A4 R1505 RES 15C7 RP65 RPAK4P 34C4 VR4 VREG_MIC39102 46C5
R689 RES 44C3 R807 RES 50B5 R941 RES 37D1 R1506 RES 15C7 RP66 RPAK4P 28A8 XW1 SHORT 39B7
R690 RES 44D3 R808 RES 50C3 R942 RES 22A7 R1507 RES 15C7 RP67 RPAK4P 31B7 XW2 SHORT8L25_WITH_ALTS 48B2
R691 RES 28B3 R809 RES 15A8 R943 RES 37D2 R1508 RES 15C7 RP68 RPAK4P 12D3 XW4 SHORT 39B7
R692 RES 44A3 R810 RES 50A5 R944 RES 37D2 R1509 RES 15C7 RP69 RPAK4P 30B8 XW5 SHORT 39B7
R693 RES 44D8 R811 RES 50C5 R945 RES 46B7 R1510 RES 15B7 RP70 RPAK4P 34C7 XW6 SHORT8L25_WITH_ALTS 48B4
R694 RES 28B3 R815 RES 50B3 R946 RES 23D2 R1511 RES 15B7 RP71 RPAK4P 12C2 12D2 XW7 SHORT8L25_WITH_ALTS 48C7
R697 RES 12A3 R825 RES 15A3 R947 RES 23D2 R1512 RES 15B7 RP72 RPAK4P 31C7 XW12 SHORT8L25_WITH_ALTS 47B3
R698 RES 44A3 R827 RES 49B5 R948 RES 31D4 R1513 RES 15B7 RP73 RPAK4P 31C7 XW13 SHORT8L25_WITH_ALTS 47B4
R699 RES 44D3 R832 RES 9D6 R949 RES 31D4 R1514 RES 15B7 RP74 RPAK4P 28A8 XW14 SHORT8L25_WITH_ALTS 47C5
R700 RES 44D3 R833 RES 9B7 R950 RES 31D3 R1515 RES 15B7 RP75 RPAK4P 31C7 XW15 SHORT8L25_WITH_ALTS 47A6
R701 RES 44D4 R840 RES 7C7 R951 RES 31C2 R1516 RES 15B7 RP76 RPAK4P 34C7 XW16 SHORT8L25_WITH_ALTS 50A3
R702 RES 34C4 R841 RES 7C7 R952 RES 22A7 R1517 RES 15A7 RP77 RPAK4P 31C7 XW17 SHORT8L25_WITH_ALTS 50B8
R705 RES 29B3 R842 RES 7B7 R953 RES 22A7 R1518 RES 15A7 RP78 RPAK4P 7A7 XW18 SHORT8L25_WITH_ALTS 50A3
R706 RES 29C3 R843 RES 7A7 R954 RES 22A6 R3001 RES 28A2 RP79 RPAK4P 7A5 7C5 XW19 SHORT8L25_WITH_ALTS 50B2
R707 RES 34D4 R844 RES 7A7 R955 RES 22A6 R3002 RES 28A2 RP80 RPAK4P 19B7 XW20 SHORT8L25_WITH_ALTS 50B3
R708 RES 28C8 R845 RES 7B7 R956 RES 22A6 R3501 RES 33A8 RP81 RPAK4P 19B7 XW21 SHORT8L25_WITH_ALTS 50A6
R709 RES 34C3 R846 RES 7B7 R957 RES 22A6 R4201 RES 42B6 RP82 RPAK4P 19B7 19C7 19C7 XW22 SHORT8L25_WITH_ALTS 50B5
R710 RES 28A5 R847 RES 7B7 R958 RES 46B5 R4202 RES 42C5 RP83 RPAK4P 18B2 18B3 18B3 XW23 SHORT8L25_WITH_ALTS 49B2
R711 RES 28A6 R848 RES 7D5 R959 RES 46C5 R4203 RES 42B5 RP84 RPAK4P 18B2 18B2 18B3 XW24 SHORT8L25_WITH_ALTS 49C4
R712 RES 9A3 R849 RES 7B7 R960 RES 23D2 R4301 RES 41A7 RP85 RPAK4P 18B3 18C2 18C3 XW25 SHORT8L25_WITH_ALTS 49C4
R713 RES 9A4 R850 RES 4C2 R961 RES 23D1 R4401 RES 43C7 RP86 RPAK4P 19B5 XW26 SHORT8L25_WITH_ALTS 45C3
R714 RES 34B7 R851 RES 7B7 R962 RES 23D1 R4501 RES 43B6 RP87 RPAK4P 19B5 XW27 SHORT8L25_WITH_ALTS 45C3
R716 RES 44B8 R852 RES 9B7 R963 RES 23D1 R4502 RES 43A6 RP88 RPAK4P 19C5 XW28 SHORT8L25_WITH_ALTS 45B1
R717 RES 44C3 R853 RES 9B7 R964 RES 23D1 R4503 RES 43A6 RP89 RPAK4P 19C5 XW29 SHORT8L25_WITH_ALTS 45C6
R718 RES 28B2 R854 RES 9B7 R965 RES 27B5 R4504 RES 43B6 RP90 RPAK4P 19C7 XW30 SHORT8L25_WITH_ALTS 45A3
R719 RES 30D5 R855 RES 9D6 R966 RES 27B4 R4505 RES 43A6 RP91 RPAK4P 19C7 19D7 XW31 SHORT8L25_WITH_ALTS 45B3
B R720
R721
RES
RES
9D3
50C8
R856
R857
RES
RES
7C5
7B5
R967
R968
RES
RES
27C5
27B4
R4506
R4507
RES
RES
43A6
43C5
RP92
RP93
RPAK4P
RPAK4P
19C7
18E2 18E3
XW32 SHORT
XW33 SHORT
39B7
41B7
B
R722 RES 44C6 R858 RES 7C5 R969 RES 27C4 R4508 RES 45B3 RP94 RPAK4P 18F2 18F3 XW34 SHORT 39A7
R723 RES 28B2 R859 RES 7C5 R970 RES 27B4 R4509 RES 45C4 RP95 RPAK4P 18F2 18F2 18F3 XW37 SHORT 39B7
R724 RES 28C2 R860 RES 7B5 R971 RES 27C4 R4701 RES 45B6 RP96 RPAK4P 19C5 XW38 SHORT 39A7
R725 RES 44B6 R861 RES 9A7 R972 RES 27C3 R4702 RES 45B6 RP97 RPAK4P 19D5 XW39 SHORT8L25_WITH_ALTS 48B5
R726 RES 44B7 R862 RES 9B7 R973 RES 27C2 R4703 RES 45B3 RP98 RPAK4P 16B3 16C3 16C3 XW41 SHORT8L25_WITH_ALTS 49B5
R727 RES 28C7 R863 RES 9D6 R974 RES 27C2 R4704 RES 45B3 RP99 RPAK4P 16C1 XW42 SHORT 28A5
R728 RES 28B2 R864 RES 9D7 R975 RES 27C2 R4705 RES 45B3 RP100 RPAK4P 28A8 XW43 SHORT 28A5
R729 RES 44C6 R865 RES 9D6 R976 RES 27C2 R4706 RES 45D3 RP101 RPAK4P 34B1 XW44 SHORT 28A5
R730 RES 44C7 R866 RES 6C4 R977 RES 27C2 R4707 RES 45D3 RP102 RPAK4P 12C5 XW45 SHORT 28A4
R731 RES 44B6 R867 RES 6C4 R978 RES 27C2 R4708 RES 45C5 RP103 RPAK4P 37B2 37C2 XW46 SHORT 28A4
R732 RES 44C7 R868 RES 9D7 R979 RES 27C2 R4709 RES 45B6 RP104 RPAK4P 37B4 37B5 37C5 XW47 SHORT 9A2
R733 RES 44B7 R869 RES 9D5 R980 RES 27C2 R4710 RES 47B4 RP105 RPAK4P 12B5 XW48 SHORT 16A5
R734 RES 44B7 R870 RES 9C5 R981 RES 42D6 R4801 RES 46C7 RP106 RPAK4P 37B2 XW49 SHORT 30B5
R735 RES 28C7 R871 RES 49C3 R982 RES 42D6 R4802 RES 48B4 RP107 RPAK4P 37B4 37B4 37B5 Y1 CRYSTAL 36C6
R736 RES 28B2 R872 RES 49C3 R983 RES 42C4 R4803 RES 48C3 RP108 RPAK4P 28A3 28B3 Y2 CRYSTAL_4PIN 22B3
R737 RES 38C7 R873 RES 49C5 R984 RES 42D4 R4901 RES 49B4 RP109 RPAK4P 12A5 Y3 CRYSTAL 44A6
R738 RES 51B7 R874 RES 6C4 R985 RES 42D3 R5001 RES 50B3 RP110 RPAK4P 28A8 Y4 CRYSTAL_4PIN 44B2
R739 RES 51C7 R875 RES 6C4 R986 RES 43D5 R5002 RES 50A3 RP111 RPAK4P 37C4 37C4 37C5 37C5 Y5 CRYSTAL 28A6
R740 RES 51A7 R876 RES 9D7 R987 RES 43D5 R5003 RES 50A1 RP112 RPAK4P 34C4 Y6 CRYSTAL 35B7
R741 RES 51A7 R877 RES 6C4 R988 RES 43C2 R5301 RES 51C1 RP113 RPAK4P 28B8 Y7 CRYSTAL 32D3
R742 RES 28B2 R878 RES 6C5 R989 RES 43D2 RP1 RPAK4P 35C7 RP114 RPAK4P 37A2 37B2 ZH3 MTGHOLE 39A7
R743 RES 38C4 R879 RES 6C5 R990 RES 23D2 RP2 RPAK4P 36C7 RP115 RPAK4P 37A4 37A5 37B4 37B5 ZH4 MTGHOLE 4B2
R744 RES 38C7 R880 RES 49C3 R991 RES 23D2 RP3 RPAK4P 36B7 RP116 RPAK4P 12B3 ZH5 SLOT 4B1
R745 RES 38C3 R881 RES 23D2 R992 RES 23C1 RP4 RPAK4P 19B5 19C5 RP117 RPAK4P 28C1 28C1 28D1 28D1 ZH6 SLOT 4B2
R746 RES 28B8 R882 RES 7B5 R993 RES 23C1 RP5 RPAK4P 19B5 RP118 RPAK4P 37C2 ZH7 MTGHOLE 4B1
R747 RES 28B6 R883 RES 49B6 R994 RES 23C1 RP6 RPAK4P 19B5 RP119 RPAK4P 34C1 ZT1 HOLE_VIA 18C2
R749 RES 28B8 R884 RES 49C5 R995 RES 23C1 RP7 RPAK4P 19B5 S1 SWI_TACT_2P1 44B2 ZT2 HOLE_VIA 18C2
A R750 RES 28B8 R885 RES 9D6 R996 RES 23C1 RP8 RPAK4P 18A2 18A3 18B2 S2 SWI_TACT 44A3 ZT3 HOLE_VIA 18C2 A
R751 RES 51A8 R886 RES 9C6 R997 RES 23C1 RP9 RPAK4P 18C2 18C2 18C3 18C3 SP1 SPRING_CLIP_1P_EMI 10D2 ZT4 HOLE_VIA 18A2
R752 RES 9A4 R887 RES 6C5 R998 RES 23C1 RP10 RPAK4P 19C7 SP2 SPRING_CLIP_1P_EMI 10D2 ZT5 HOLE_VIA 18C2
R753 RES 37C2 R888 RES 49D5 R999 RES 23C1 RP11 RPAK4P 19B7 SP3 SPRING_CLIP_1P_EMI 10D1 ZT6 HOLE_VIA 18C2
R754 RES 37D4 R889 RES 6C5 R1000 RES 27B5 RP12 RPAK4P 19B7 SP4 SPRING_CLIP_1P_EMI 10D1 ZT7 HOLE_VIA 18A2
R755 RES 28D2 R890 RES 9D7 R1001 RES 27C4 RP13 RPAK4P 19B7 T1 XFR_100BT_MDIX 35C3 ZT8 HOLE_VIA 18C2
R756 RES 28D2 R891 RES 4D6 R1002 RES 27B4 RP14 RPAK4P 19C7 U1 SIL1162 27C3 ZT9 HOLE_VIA 18B2
R757 RES 9A4 R892 RES 9D7 R1003 RES 27B3 RP15 RPAK4P 35B7 35B8 U2 SHNTREG_TLV431A 21A4 ZT10 HOLE_VIA 18B2
R758 RES 38C1 R893 RES 9C7 R1004 RES 27B3 RP16 RPAK4P 35A4 U3 VREG_LP2951 36D7 ZT11 HOLE_VIA 18B2
R759 RES 37D2 R894 RES 9C7 R1005 RES 28C1 RP17 RPAK4P 19C7 U4 FW802A 36C5 ZT12 HOLE_VIA 18B2
R760 RES 38C5 R895 RES 4D2 R1006 RES 33D5 RP18 RPAK4P 19D7 U5 SDRAM_DDR_4MX32 21D6 21D7 ZT13 HOLE_VIA 18B2
68
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ZT14 HOLE_VIA 18B2

ZT15 HOLE_VIA 18B2
ZT16 HOLE_VIA 18B2
ZT17 HOLE_VIA 18B2
ZT18 HOLE_VIA 18B2
ZT19 HOLE_VIA 18A2
ZT20 HOLE_VIA 18G2
ZT21 HOLE_VIA 18E2
ZT22 HOLE_VIA 18F2
D
ZT23
ZT24
HOLE_VIA
HOLE_VIA
18F2
18F2 D
ZT25 HOLE_VIA 18F2
ZT26 HOLE_VIA 18F2
ZT27 HOLE_VIA 18E2
ZT28 HOLE_VIA 18D2
ZT29 HOLE_VIA 18G2
ZT30 HOLE_VIA 18F2
ZT31 HOLE_VIA 18F2
ZT32 HOLE_VIA 18E2
ZT33 HOLE_VIA 18E2
ZT34 HOLE_VIA 18F2
ZT35 HOLE_VIA 18E2
ZT36 HOLE_VIA 18E2
ZT37 HOLE_VIA 18F2
ZT38 HOLE_VIA 18E2
ZT39 HOLE_VIA 3B3
ZT40 HOLE_VIA 3B3
ZT41 HOLE_VIA 3B3
ZT42 HOLE_VIA 3B3
ZT43 HOLE_VIA 3A3
ZT44 HOLE_VIA 3A3
ZT45 HOLE_VIA 3A3
ZT46 HOLE_VIA 3B3
ZT47 HOLE_VIA 3B3
ZT48 HOLE_VIA 3B3
ZT49 HOLE_VIA 3B3
ZT50 HOLE_VIA 3A3
ZT51 HOLE_VIA 3A3
ZT52 HOLE_VIA 3A3
C ZT53
ZT54
HOLE_VIA
HOLE_VIA
3B2
3B2
C
ZT55 HOLE_VIA 3B2
ZT56 HOLE_VIA 3B2
ZT57 HOLE_VIA 3A2
ZT58 HOLE_VIA 3A2
ZT59 HOLE_VIA 3B2
ZT60 HOLE_VIA 3B2
ZT61 HOLE_VIA 3B2
ZT62 HOLE_VIA 3B2
ZT63 HOLE_VIA 3A2
ZT64 HOLE_VIA 3B1
ZT65 HOLE_VIA 3B1
ZT66 HOLE_VIA 3B1
ZT67 HOLE_VIA 3B1
ZT68 HOLE_VIA 3A1
B B

A
D 051-6497 13
APPLE COMPUTER INC.
SCALE SHT OF
NONE 69 69
8 7 6 5 4 3 2 1
69

Apple Macbook q59v13

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<XR_PAGE_TITLE>

01 279015 ENGINEERING RELEASED 06/06/03 ?

B 34 INTREPID ETHERNET & FIREWIRE (SECTION 4) 820-1550 1 PCB,MLB,IMACG4 PCB1 CRITICAL

37 INTREPID UATA/IDE (SECTION 5) 630-XXXX 1 630-XXXX,PCBA,H,Q59,EEE XXX HYNIX OMIT

39 AUDIO CODEC & VOLTAGE REGS

THIRD ANGLE PROJECTION

FW - B Inverter LCD Panel

P.36 P.29 P.24 D

DDR SDRAM DIMM 0 SYSTEM BLOCK

P.14 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

LAYER THICKNESS COPPER TRACE WIDTH

CPU OPTICAL NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF

3.3V 1.5V ZT45 ZT52 II NOT TO REPRODUCE OR COPY IT

SIZE DRAWING NUMBER REV.

56D3> 9D3< 8B4<> 7C7< CPU_BR_L D2

7C5< 4A3< CPU_PULLDOWN E11

870-1114 1 CLIP,HEAT SINK,CPU,Q26.U34 U343 ? DEV SIZE DRAWING NUMBER REV.

412-0042 1 SCREW,MACH,3MM W,8MM L,U34 U344 ? DEV D 051-6497 13

NC_CPUCRUD<0> NO_TEST F18

NC_CPUCRUD<81> NO_TEST N12

CPU_PLL_CFG<1> 4D3< 8A8<>

1: PLL5 (NO SPREAD)

1: PLL5 (NO SPREAD)

CPU SPEED & BUS RATIO SUPPORT

SIZE DRAWING NUMBER REV.

56D3> 9B3<> 8B5<> 4B7<> CPU_TT<1> 3

MAXBUS LOGIC ANALYZER SUPPORT 1 C969

59D8> 59B6> 52C6> 45D2<> 8C1< 4D7< 4D3< CPU_VCORE_SLEEP

132S0013 21 CAP,CER,.22UF,20%,6.3V,0402,X5R 1GHZ_DECOUP 47

PULLDOWN ON TRST* STRONGER TO OVERCOME POSSIBLE LEAKAGE

59D8> 35B4<> 35A2< 34B7< JTAG_ASIC_TMS

402 402 402 402 402 402 402 10K 1K

1: 0-1 IDE / 2-3 PCI1

1: 60X BUS (G3)

1/16W 1/16W 1/16W

5% 5% SIZE DRAWING NUMBER REV.

LAST_MODIFIED=Wed Sep 17 12:15:48 2003

SIZE DRAWING NUMBER REV.

1 C902 1 C843 1 C278 1 C849 1 C281 1 C280 1 C279

INTREPID DDR DECOUPLING 51 X 0.1UF (0402)

1 C657 1 C851 1 C875 1 C659 1 C690 1 C658 1 C852 1 C646

MUX_SEL_H 13A3<> 13C4<> 53C6<

D 53D6< 13C8<> MEM_DATA<3> AK35

SIZE DRAWING NUMBER REV.

NOTICE OF PROPRIETARY PROPERTY

53D6< 13C7<> RAM_DATA_B<9> 13

52C3> 46B4<> 17A4< 17A3< 16D7< 16C2< 16A8< 11A6< 10D6<

D 54C7< 16C4<> AGP_AD<3>

54B7< 16B1< 16A4<> AGP_ST<2> AE13 AGPST2 : ST2 VD50CLAMP1 AE9

54C7< 16D1< 16A4<> AGP_AD_STB_L<1> 3

52A6> 17A2< GPU_AGP_VREF AK29 AGPVREF : AGPVREF +3V_MAIN 1 2 GPU_AGP_VREF_Y

CERM NOTICE OF PROPRIETARY PROPERTY

1 10K 1% AGREES TO THE FOLLOWING

G 55D3> 19D8< FBD<11>

F 55D3> 19D5< FBD<33>

E 55D3> 19C5< FBD<54>

C 52A6> GPU_FB_VREF C28 FBVREF NC_FBADQS2*

PLACE R’S BETWEEN GPU & MEMORY

C 55C3> 18G5<> FBD<64> 15 1 8 RP10 NV34

+2_5V_MAIN +2_5V_MAIN +2_5V_MAIN

C521 C520 C216 C205

55D3> 18G2< RFBDQM<4>