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2009 Exam - ELEC2104

Electronic Devices and Circuits (University of Sydney)

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THE UNIVERSITY OF SYDNEY

TABLE NO .

CANDIDATE'S SURNAME ..

OTHER NAMES ........••..•.•..•..••...••••.•..•.••..•..

FACULTY OF ENGINEERING'
SCHOOL OF ELECTRICAL & INFORMATION ENGINEERING

ELEC2104 Electronic Devices and Basic Circuits

ELEC5720 Foundations of Electronic Devices and Basic Circuits
November 2009 Time Allowed: Two hours

Total number of questions: 5 Total marks: 60

All questions .may be attempted. The questions are not necessarily of equal value and
same difficulty.

The candidate is allowed to bring drawing and writing instruments into the
examination room. University calculator is provided.

Useful fonnulae are given in the last page.

Any working for which credit is expected must appear in this combinedquston~
answer book.
Answers should be written clearly and legibly following a logical sequence.

This examination book consists of 22 pages, numbered from 1 to 22 inclusive. There

are 5 questions, numbered from 1 to 5 inclusive. Students are asked to check that their
booklets are complete, and to indicate that they have done so by signing, as provided
below.

I have checked this booklet and affinn it is complete.

SIGNATURE _

Students finding an incomplete booklet should obtain a replacement from the

Examination supervisor immediately.

Question 1 2 3 4 5
Mark
I

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Question 1 (24 marks)

(i) (3 marks) An amplifier designed using a single metal-oxide- Useful formulae

semiconductor (MOS) transistor has the transfer characteristic Diode eguations:
Vo = lO-S(v1 _2)2 j =/ s (e v/nVr -1)
where VI and are in volts. This transfer characteristic applies for
VD
and for j »/s,
2 S VIS V0 + 2 and VD positive. At the limits of this region the amplifier
saturates. The amplifier is biased with the DC input voltage VI to obtain a j = /se v/ nvr or v = nVT In_l_
de output voltage of 5 V. For signals Vi superimposed on the bias voltage Is
VI, find the amplifier voltage gain (vo/vJ.

MOSFET eguations:
.
lD
1, W (
= - kn - V GS - ~
)2 (
= k v GS - ~
)2
2 L
gm = kn, -W (VGS - ~
)
=( 2iD
.)
L VGS-~

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(ii) (3 marks) The circuit shown in the Figure (lb) utilizes a 10-ill
potentiometer to realize an adjustable-gain amplifier. What should be the
value of resistor R so that the voltage gain range can be 1 to 11 VN?

R lOkO pot

Figure 1 b

R=

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(iii) (3 marks) Assuming that all the diodes in the circuits of Figure (lc) are
ideal, find the values of labelled current and voltage.

V=
1=

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(iv) (3 marks) A full-wave rectifier circuit with 1-kQ load operates from 120-
V (rms)/60 HZ supply through a 10-to-1 step down transformer having a
single secondary winding. It uses four diodes each of which is modelled to
have a 0.7-V drop for any current. What is the peak value (Vp ) of the
rectified voltage across the load?

V:=
p

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(v) (3 marks) For the circuit in Figure (le) assume that the transistor has very
large p. Find the current Is through the 5kQ resistor.

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(vi) (3 marks) A transistor with p = 120 is biased to operate ata dc collector

current of 1.2 mA. Find the small signal emitter resistance re of the
transistor.

V o / Vi =
End of Examination

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Question 5. (9 marks)
(vii) (3 marks) In the circuit of Figure (lg) the MOS transistor has . .
k:(o/i)= OAmAN ,V; = 1V, and A = O.Find the drain voltageV of the
2
6 Consider the NMOS transistor amplifier circuit biased with a current source as shown
in Figure 5. The transistor has 1v;1 = 0.9V and VA = 50 V and operates with VD =2 V.
transistor.
What is the voltage gain of the V o / Vi amplifier?
+.sv

Figure 19

Figure 5

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(viii) (3 marks) The differential amplifier in Figure (lh) uses transistor with ~. =
100.Find the input differential resistance Rid of the amplifier.
+lS:V

--
Figure 1h

Vo /Vsig =

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Question 4. (9 marks)

For the the circuit shown in figure 4, draw a complete small-signal equivalent circuit
utilizing an appropriate T-model for the BIT (use a = 0.99). Your circuit should show
the values of all components, including the model parameters. Calculate the overall
gain Vo /Vsig.

Figure 4

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Question 2. (9 marks)

Assuming the op-amp to be ideal, it is required to design the circuit shown in Figure
2 to implement a current amplifier with gain iiji[ = 20.
(i) Find the required value for R.
(ii) If RL = 1 ill and theop-amp operates in an·ideal manner so long as vo is in
the range ± 12 V. What range of i[ is possible?
lOkO

.--
Figure 2

R=

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Question 3. (9 marks)

Design a 7.5-V zener regulator circuit using a 7.5-V zener specified at 12 mA. The
zenerhas an incremental resistance rz = 30 Q and a knee current of 0.5mA. The
regulator operates from a 10-V nominal supply that can vary +/- 10 % and has a 1.2-
kQ load.
(i) What is the value of R you will chose?
(ii) What is the nominal regulator output voltage Vo when the loadis
connected?
(ill) . What is the regulator output voltage when the supply varies by +/- 10 %
. with the load connected?

. 1. 5 -v

zener

--..
Figure 3

R=

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