Identify Name

Instruction Set x86 integer

Architecture registers

MACHINE
PROGRAMMING

① Instruction Set Architectures

② Machine Programming
 Add 5 and 8

011000110101
instructions words
instruction set vocabulary
machine language assembly language
MACHINE VS. HUMAN
03 45 08
LANGUAGE add 0x8(%ebp),%eax
2
Code time Compile time Run time

C/C++ ASM Object

Compiler Assembler Linker
LIFETIME OF PROGRAM
3
 Compiler Assembler

C/C++ ASM Object

Disassembler
CODE EXAMPLES
gcc –Og –c example.c objdump –d example.o
gcc –Og –S example.c 4
 Program Compiler

Hardwar
Architecture
PROGRAM PERFORMANCE e

CHA 5
P
 ① System’s state
③
② Instructions
CPU can execute

Instruction
Architecture
Set
Architecture
6
 x86 MIPS
INSTRUCTION SET
ARCHITECTURES
PowerPC
7
 1968 1985 2016

1978 2005

INTEL
Transistor
29K 275K 250M 7.2B
count
Gordon Moore
Co-founder of Intel

The number of transistors in a chip

will approximately double every
two years. 9
ADVANCED MICRO DEVICES
10
 Memory
Object
Address Code
Registers
Data Program
Condition Data
Codes Instructions
Program OS Data
Counter
PROGRAMMER’S VIEW
Stack
CPU 11
 32-bit
int sum(int x, int y) sum:
{ push %ebp
int t = x+y; mov %esp,%ebp
return t; mov 12(%ebp),%eax
} add 8(%ebp),%eax
mov %ebp,%esp
code.c pop %ebp
ret
gcc –O1 –S code.c
COMPILING sum:
leal (%rdi,%rsi),%eax
64-bit ret 12
 Data
 Address
 Floating point
 Instruction
Conditional

General purpose registers (GPRS)
 Constant (zero, one, or pi)
 Vector
 Special-purpose

CATEGORIES OF REGISTERS
13
 IA32 Integer Registers
%rax %eax %ax accumulate
%r8

%rbx %ebx %bx base

%r9

%rcx %ecx %cx counter

%r10

%rdx %edx %dx %r11

data
%rsi %esi %si source index
%r12

%rdi %edi %di %r13

destination index

%rsp %esp %sp %r14

stack pointer
%b
%rbp %ebp %r15
base pointer 14
p
x86-64 Integer Registers
 rax

al
ax
eax
SUB-REGISTER
Same for rbx, rcx, rdx 15
 rsi

sil
si
esi
SUB-REGISTER
Same for rdi, rbp, rsp 16
 r8

r8b
r8w
r8d
SUB-REGISTER
Same for r9, r10, r11, r12, r13, r14, r15 17
 Instruction Set Architecture
 Program Performance
 Intel x86 Architecture
 x86 Registers

SUMMARY
18