Experiment 10 The Common Base Amplifier

Experiment 10

The Common Base Amplifier

Objectives

The purpose of this experiment is to test the common base amplifier circuit and evaluate its
characteristics.

Required Parts and Equipments

1. Experimental Test Board.

2. DC Power Supply.
3. Function Generator.
4. Two-Channel Oscilloscope.
5. Digital Multimeter.
6. NPN Silicon Transistor, 2N2222.
7. Resistors 10 kΩ, 3.3 kΩ, 1.5 kΩ, 1 kΩ.
8. Capacitors 2.2 µF, and 10 µF.

1. Theory

The common base amplifier is shown in the schematic diagram of Fig.1.

Figure 1: The Common Base Amplifier Topology

The DC biasing circuit uses one power supply and is identical to that of the common emitter
amplifier with voltage-divider biasing. Thus, the same technique used for β-independent
operating point biasing in the common emitter amplifier will work for this application. As
shown from this circuit, the input signal is coupled to the emitter of the transistor through the
DC blocking capacitor Cin, and the output signal is taken from the collector via the coupling
capacitor Cout. The base capacitor CB is used to bypass the base resistors R1 and R2, thereby
putting the base at AC ground.

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 Experiment 10 The Common Base Amplifier

The Q-point point (VCBQ, ICQ) of the transistor can be obtained by evaluating the base voltage,
VB, assuming that IB is negligible when compared with the current flowing in resistor R2. This
condition can be justified if β.RE ≥ 10 R2. On this basis, the DC voltage at the base is
approximated by:

R2 .VCC
VB = (1)
R1 + R2

The emitter voltage, VE, is given by:

VE = VB − VBE (2)

The emitter quiescent current, IEQ, can be calculated from:

VE
I EQ = (3)
RE

I CQ ≅ I EQ (4)

The collector voltage, VC, is determined from:

VC = VCC − I CQ .RC (5)

On the other hand, the collector-base quiescent voltage, VCBQ, is determined from:

VCBQ = VC − VB (6)

The emitter small signal AC resistance is found from:

VT
re = (7)
I EQ

Where VT is the thermal voltage and equals to 26 mV at room temperature.

The small signal AC equivalent circuit of the amplifier is presented in Fig.2.

Figure 2: The Small Signal Equivalent Circuit of the Common Base Amplifier

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 Experiment 10 The Common Base Amplifier

The theoretical value of the voltage gain can be estimated from the small signal equivalent
circuit to be:

RC || RL
Av ≅ (8)
re
As indicated from the voltage gain equation, the output signal is in-phase with the input
signal.

The input impedance seen from the signal source is determined as:

Z in = RE || re (9)

The output impedance seen from the load terminals is given by:

Z out = RC (10)

It is important to remember that the common base amplifier provides no current gain. On the
other hand, the input impedance is very low which may load the signal source resulting in a
reduction of the net input voltage delivered to the amplifier especially when the source
resistance is significantly high. In this case, the overall voltage gain of the amplifier, taking
the effect of source resistance Rs into account, will be:

vout vout vin RC || RL Z in

Avs = = . = . (11)
vs vin vs re Z in + Rs

2. Procedure

1. Connect the DC bias circuit shown in Fig.3.

Figure 3: The Practical Common Base Bias Circuit

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 Experiment 10 The Common Base Amplifier

2. Measure the DC voltages VB, VE, and VC using a digital voltmeter. Try to measure the
transistor current gain β with the aid of a multi-meter. Tabulate your results as shown in
Table-1.

Table-1: Measured Bias Circuit Parameters

Parameter β VB VE VC ICQ VCBQ VBEQ re

Value

3. Connect the amplifier circuit shown in Fig.4.

Figure 4: The Practical Common Base Amplifier Circuit

4. Apply a sinusoidal source signal with 0.1Vp-p amplitude, and frequency of 10 KHz (In this
case Vs(p-p) = 0.1V). Display the input signal at channel 1 of the oscilloscope, and the output
signal at channel 2. Measure the amplitudes of both signals and determine the practical
voltage gains Av and Avs as indicated in Table-2.

Table-2: Voltage Gain Measurement

Quantity Value

Vin(p-p)

Vout(p-p)

Av = Vout(p-p) /Vin(p-p)

Avs = Vout(p-p) /Vs(p-p)

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Experiment 10 The Common Base Amplifier

3. Calculations and Discussion

1. Determine the theoretical bias point of the transistor and compare it with the measured
value.

2. Calculate the theoretical voltage gain Av of the amplifier, and compare it with the
measured value.

3. Justify the difference between the measured value of Av and that of Avs.

4. Determine the input impedance Zin and the output impedance Zout for the amplifier.

5. Estimate the value of the internal source resistance Rs from Av and Avs.

6. Assume that the DC coupling capacitor Cout in Fig.4 is shorted. What DC voltage will
appear at the collector of the transistor in this case?

7. If capacitor CB in the circuit of Fig.4 is opened, what is its effect on the voltage gain
and the input impedance of the amplifier?

8. What is the main disadvantage of the common base amplifier when compared to the
common emitter amplifier?

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Experiment 11 The Emitter Follower

Experiment 11

The Emitter Follower

Objectives

The purpose of this experiment is to examine the operation of the emitter follower and
evaluate its characteristics.

Required Parts and Equipments

1. Experimental Test Board.

2. DC Power Supply.
3. Function Generator.
4. Two-Channel Oscilloscope.
5. Digital Multimeter.
6. PNP Silicon Transistor, BC178.
7. Resistors 10 kΩ, 2.2 kΩ.
8. Capacitors 10 µF.

1. Theory

In the common collector amplifier, the output signal is taken from the emitter while the input
signal is applied to the base of the BJT. This amplifier is usually referred to as an emitter
follower. In this amplifier, the output voltage (emitter voltage) is always slightly less than the
input voltage (base voltage) in magnitude, and is in-phase with it. The voltage gain is
therefore approximately equal to unity. So, the emitter voltage always follows the base voltage
and hence the circuit is well-known as the emitter follower. Figure 1 shows a schematic
diagram for a typical emitter follower using a PNP transistor.

Figure 1: Schematic Diagram for a Typical Emitter Follower Circuit

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Experiment 11 The Emitter Follower

The base bias voltage VB can be approximately calculated from:

VEE .R2
VB ≅ (1)
R1 + R2

The emitter DC voltage is thus given by:

VE = VB + VEB (2)

Where VEB = -VBE ≈ 0.7V for Silicon. In this case VE > VB.

The emitter quiescent current IEQ is given by:

VEE − VE
I EQ = (3)
RE

The collector current IC is approximately equal to emitter current IE.

The emitter-collector voltage VEC is equal to the emitter voltage as the collector is grounded in
this circuit. Thus:

VEC = VE (4)

Where VC = 0. Note that in PNP transistor biasing VE > VB > VC.

The emitter small-signal resistance can be obtained from:

VT
re = (5)
I EQ

Where VT is the thermal voltage and equals to 26 mV at room temperature.

Figure 2 presents the small-signal equivalent circuit of the amplifier.

Figure 2: The Small Signal Equivalent Circuit of the Emitter Follower

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Experiment 11 The Emitter Follower

The output signal vo is related with the input signal vi according to the relation:

vo = vi + vbe (6)

Since vbe is a very small signal, therefore vo follows vi in magnitude and phase. The voltage
gain of the amplifier can be derived to be:

vo RL || RE
Av = = (7)
vi RL || RE + re

In this case the signal generator internal resistance is neglected.

The input impedance seen from the input terminal can be proved to be:

Z i = R1 || R2 || (β (re + RE || RL ) ) (8)

On the other hand, the output impedance seen from the load resistance after neglecting the
internal resistance of the source generator is:

Z o = RE || re (9)

As indicated in the above equations, the emitter follower has large input impedance and very
low output impedance and can therefore be used as a buffer stage between a high output
impedance amplifier and a low resistance load.

2. Procedure

1. Connect the DC bias circuit shown in Figure 3.

Figure 3: The Practical Emitter Follower Bias Circuit

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Experiment 11 The Emitter Follower

2. Measure the DC voltages VB and VE using a digital voltmeter. Try to measure the
transistor current gain β with the aid of a multi-meter. Tabulate your results as shown
in Table-1.

Table-1: Measured Bias Circuit Parameters

Parameter β VB VE VEBQ VECQ IEQ re

Value

3. Connect the amplifier circuit shown in Figure 4.

Figure 4: The Practical Emitter Follower Circuit

4. Apply a sinusoidal signal with amplitude of 2Vp-p and frequency of 10 KHz. Display
the input signal on channel 1, and the output signal on channel 2. Try to measure the
amplitude of the output signal before and after removing RL.

5. Tabulate your results as shown in Table-2.

Table-2: Measured Voltage Gain

Vo(p-p) Av = Vo(p-p) /Vs(p-p)

RL = 10KΩ
RL = ∞

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Experiment 11 The Emitter Follower

3. Calculations and Discussion

1. Calculate the Q-Point parameters of the circuit and compare them with the measured
values.

2. Sketch the DC load line of the transistor (IE versus VEC) indicating the position of the
Q-Point.

3. Evaluate the theoretical values of the voltage gain for both cases before and after
removing the load resistor, and compare them with the measured quantities.

4. Determine the input and output impedances of the amplifier.

5. What is the effect of adding a collector resistor RC = 1KΩ on the Q-Point and the
voltage gain of the amplifier?

6. Derive an equation for the emitter quiescent current IEQ if resistor R1 in Figure 1 is
removed.

7. Modify the circuit of Figure 1 if an NPN transistor is to be used instead of the PNP
transistor.

8. Derive an equation for the current gain of the amplifier circuit shown in Figure 1.

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 Experiment 12 Amplifier Frequency Response

Experiment 12

Amplifier Frequency Response

Objectives

The purpose of this experiment is to evaluate the frequency response of a common emitter
amplifier.

Required Parts and Equipments

1. Experimental Test Board

2. Signal Generator
3. Two-Channel Oscilloscope
4. Digital Multimeter
5. NPN Silicon Transistor BC107
6. Resistors 10 KΩ, 3.3 KΩ, 2.7 KΩ, 1 KΩ, 120 Ω.
7. Capacitors 2.2 µF and 10 µF.

1. Theory

All amplifiers have a finite bandwidth. The low cutoff frequency can in some cases extend
down to DC and is a parameter under direct control of the designer. The ultimate high
frequency limit is determined by the physical characteristics of the components and the
construction of the circuit.

A typical BJT common emitter amplifier is shown in Fig.1. The input signal source and load
resistor are capacitively coupled to the amplifier via capacitors Cc1 and Cc2 respectively. The
coupling capacitors Cc1 and Cc2, emitter bypass capacitor CE, and internal transistor
capacitances shape the frequency response of the amplifier.

Figure 1: Typical Common Emitter Amplifier

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 Experiment 12 Amplifier Frequency Response

A typical amplifier frequency response curve is shown in Fig.2. This curve presents the
magnitude of the voltage gain versus frequency.

Figure 2: Typical Amplifier Frequency Response

The voltage gain in decibels is calculated as:

Av (dB ) = 20 log( Av ) (1)

In Fig.2, Avm represents the mid-band (or mid range) gain of the amplifier. For the circuit of
Fig.1, it is given by:

( RC || RL )
Avm = − (2)
re + RE1
At the lower cut-off frequency fL and upper cut-off frequency fH, the voltage gain of the
amplifier drops to 0.707 of its mid-band value (or -3dB below the maximum value). The
frequency fL is dependent on the coupling and bypass capacitors, while the frequency fH is
determined by the transistor internal capacitances (mainly Cbc and Cbe). The bandwidth of the
amplifier is the difference between fH and fL:

BW = f H − f L (3)

As the signal frequency drops below mid-band, the impedances of the coupling and bypass
capacitors will increase, resulting in a reduction of the voltage gain. In other words, the low
frequency response of the amplifier is determined by the capacitors Cc1, Cc1, and CE. Each one
of the three capacitors makes a contribution to the overall frequency response of the amplifier.
Each capacitor behaves like a capacitor in a high pass filter. Therefore, each one will
contribute with a cut-off frequency of its own.

The cut-off frequency due to the input coupling capacitor Cc1 is fL1, and is calculated from the
following equation when ignoring the source resistance Rs:

1
f L1 = (4)
2π .Z in .Cc1
Where Zin is the input impedance of the amplifier and is given by:

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 Experiment 12 Amplifier Frequency Response

Z in = R1 || R2 || ( β (re + RE1 )) (5)

The cut-off frequency due to the output coupling capacitor Cc2 is fL2, and is given by:

1
fL2 = (6)
2π ( RC + RL ).Cc 2

Finally, the cut-off frequency due to the emitter bypass capacitor CE is fL3, and is given by:

1
f L3 = (7)
2π .Z e .CE

Where Ze is the effective emitter impedance seen from the terminals of capacitor CE, and is
given by:

Z e = ( RE1 + re ) || RE 2 (8)

In equation (8), the source resistance Rs is so small to be ignored.

Among the three corner frequencies, fL3 will usually have the largest value.

The low cut-off frequency of the amplifier can be approximated as the largest value of the
three individual lower corner frequencies:

f L = max( f L1 , f L 2 , f L 3 ) (9)

The high frequency response of the amplifier is determined by the internal parasitic
capacitances of the transistor. These capacitances, Cbe and Cbc, are proportional to the
physical area of the junctions and inversely proportional to the width of the depletion region.
This means that the capacitance is a function of bias conditions. A forward biased junction
has relatively high capacitance (tens to over one hundred pico-farads) because the width of
the depletion region is narrow. A reverse biased junction has relatively low capacitance
(typically less than ten pico-farads) because the width of the depletion region is wide.

Two corner frequencies are existed due to the total transistor parasitic capacitances at input
(base) and output (collector). The first corner frequency fH1 is inversely proportional to
Cbe+CM, where CM is known as the Miller capacitance and is given by:

CM = Cbc .(1 + Avm ) (10)

The second corner frequency fH2, on the other hand, is inversely proportional to Cbc. The
corner frequencies fH1 and fH2 can be determined from the high-frequency equivalent circuit of
the amplifier.

The high cut-off frequency of the amplifier can be approximated as the lowest value of the
two individual upper corner frequencies:

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 Experiment 12 Amplifier Frequency Response

f H = min( f H 1 , f H 2 ) (11)

The frequency at which the amplifier’s gain drops to 1 (or 0 dB) is called the unity-gain
frequency and is denoted by fT. The significance of fT is that it always equals the product of
the mid-band gain times the bandwidth of the amplifier.

fT = Avm .BW (12)

2. Procedure

1. Connect the circuit shown in Fig.3 and measure the DC voltages VB, VE, and VC. Try
to measure the DC current gain of the BC107 transistor hFE using a multi-meter.
Tabulate your results as illustrated in Table-1.

Table-1: Measured Quantities for the DC Bias Circuit

Parameter β VB VE VC ICQ VCEQ VBEQ re

Value

Figure 3: The DC Bias Circuit of the Amplifier

2. Connect the amplifier circuit shown in Fig.4. Apply a sinusoidal source signal with peak-
to-peak amplitude of 0.2V and vary the frequency from 50 Hz to 10 MHz in several steps.
Display both the input (source) and output (load) signals on the oscilloscope. Try to
measure the amplitude of the output signal, and the amplifier gain as unit-less value, and in
dB as well. Tabulate your results as illustrated in Table-2.

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Experiment 12 Amplifier Frequency Response

Figure 4: The Practical Amplifier Circuit

Table-2: Measured Voltage Gain versus Frequency

Frequency (Hz) Vout(p-p) Av=Vout/Vs Av(dB)=20log(Av)

50

100

150

200

400

800

1K

2K

4K

8K

10K

20K

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Experiment 12 Amplifier Frequency Response

Table-2: Continued

Frequency (Hz) Vout(p-p) Av=Vout/Vs Av(dB)=20log(Av)

50K

100K

200K

500K

600K

800K

1M

2M

4M

6M

8M

10M

3. Calculations and Discussion

1. Sketch the frequency response of the amplifier on a semi-log paper.

2. From the frequency-response plot, determine the -3 dB cut-off frequencies fL and fH of

the amplifier, and find the bandwidth.

3. Calculate the lower break frequencies fL1, fL2, and fL3 due to the coupling and bypass
capacitors. Find the dominant corner frequency and compare it with the measured
value of fL.

4. From your plot, determine the unity-gain frequency fT.

5. Calculate the theoretical value of the mid-band gain, and compare it with the
practically measured value.

6. State how you can reduce the overall bandwidth of the amplifier practically.

7. What is meant by Miller input capacitance, and what are the factors on which it
depends?

8. What is meant by one decade, and one octave?

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