ARM7 LPC2148

Prepared By
HARISH
I2C bus has become one of the most important
microcontroller subsystem used for interfacing various IC
devices with microcontroller. It is unique for its ability to
maximize hardware efficiency & circuit simplicity. The I2C
bus uses only 2-bidirectional data lines for communicating
with the microcontroller. This bus is called Inter IC or I2C
bus. All I2C-bus compatible devices incorporate an on-
chip interface which allows them to communicate directly
with each other via I2C-bus. I2C protocol specification can
support up to 128 devices attached to the same bus.
Today many I2C IC devices available in the market such as
Serial EEPROM, I/O Expander, RTC, ADC, DAC, Sensors etc.
The I2C protocol uses master and slave method, the
master which is in most cases a microcontroller while the
slave can be any I2C device such as Serial EEPROM, RTC
etc. The I2C protocol uses only two
signals: clock and data. The Clock referred as SCL (Serial
Clock) while data is referred as SDA (Serial Data).
In I2C protocol we have to use special combinations of
signal conditions. Fundamentally, there are just two
conditions START and STOP. A START condition is
generated by master followed by 7-bit of address,
then a Read/Write (R/W) bit. If a slave device detects
an address match then it sends ACK by driving SDA
low during the next clock cycle; if no slave recognizes
the address then the SDA line will left alone and pulled
up high. Once ACK received, data will be either sent to
the slave device or read from the slave device
(depending on the status of R/W bit).
Therefore, each byte is 9-bits in which 7-bits in which 7-
bits for address and one R/W plus one ACK/NAK, or 8-bit
data plus one ACK/NAK. The last data byte of a transaction
should generally be followed by NAK, to indicate that it is
intended to be the final byte. After this, either a STOP or a
ReSTART should be issued by the master. Bus errors are
rarely introduced when using a dedicated I2C peripheral
on the master.
Features of I2C in LPC2148 ARM7 Microcontroller
•LPC2148 supports two fast I2C-buses (I2C0 & I2C1).
•I2C bus interface that may be configured as Master, Slave
or Master/Slave.
•Supports programmable clock to allow adjustment of
multiple data speed: standard (100 kbps), fast (400 kbps)
and high speed (3.4 Mbps).
•Supports bi-directional data transfer between master and
slave.
•I2C protocol is useful where many devices connected on
the bus. This helps to reduce the cost and complexity of
circuit as more devices allowed to communicate through
same bus.
•The I2C bus may be used for test and diagnostic
purposes.
•Application: Interfaces to external I2C standard parts such
as serial EEPROM, Ram, and LCDs etc.