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Prof.

Ram Meghe institute of Technology and Research, Badnera


P. G. Department of Computer Applications
Question Bank
Subject: Computer Organization & Architecture

Unit 1

1 Explain the Amdahl’s law in detail

2 Explain the difference between RISC and CISC

3 State and Explain Von Neumann machine architecture in detail.

4 Explain Generation of memory addresses and addressing modes.

5 Explain Design of ALU

6 Explain general functions of operating system in detail.

7 Explain types of operating system in detail.

8 Explain Bit slice Processor in detail.

9 Explain the types of operands and operations

10 Explain Processor organizations with its all componants.

11 Explain Embedded Systems Requirements in detail

12 Explain Stack based organizations in detail.

13 Explain all Address Instruction Types

14 Explain Performance Assessment in detail.

15 Explain structure of register in Pentium processor in detail.

Unit 2

1 Explain Symmetric Multiprocessors (SMP) in detail.

2 Explain Thread Level Parallelism in Detail.

3 Explain the concepts of Conventional and EPIC architecture in Detail.


4 State and explain the concept of Parallel Processing and Pipelining Processing.

5 Explain the diffrence between uni-processors and parallel processors

6 Explain Instruction Level Parallelism in Detail.


State and explain Instruction Level Parallelism &Thread Level Parallelism in
7
Detail.
8 Explain the Performance Metrics and Measures in detail.

9 Explain the Types of Speedups and Scaling.

10 Explain the Speedup Performance Laws in detail.

11 Explain Taxonomy of Parallel Computers in detail

Unit 3

1 Explain Instruction Pipeline and Instruction pipeline hazards in detail.

2 Explain Structural Hazards in detail

3 Explain Branch Hazards in detail

4 Explain Data Hazards in detail

5 Explain the different ways for overcoming hazards

6 Explain VLIW in detail, also explain the advantages of VLIW

7 Explain VLIW compiler in detail.

8 Explain Vector processor and Array Processor in details.

9 Explain instruction set design influence on pipelining.

10 Explain Instruction Pipelining for pipelined CISC processor.

11 Explain Instruction Pipelining for pipelined RISC processor.

12 Explain Multithreaded processors in detail.

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