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5 4 3 2 1

SU4EA Block Diagram


eDP CONN. eDP
D
14" Panel DDR4_CHB D

DDR4 Memory Down


DDR4_CHA
HDMI 1.4 TMDS DDI1 DDR4 Memory Down
HDMI LS KabyLake-U
HDMI CONN
USB 3.0 1

1 USB3.0 Port S/C


2
CPU
TPM U22 2 USB3.0 Port Power
NUVOTON/NPCT650AA0WX U42
3, 4 +VCORE
+VCCGT
3 +VCCSA
LPC USB Type-C
Debug Conn. 4 Page 80

System (5V & 3.3V)


C
Keyboard / ClickPad
PCH 5 Page 81 C
USB2.0 Port
EC +1.0VSUS
USB 2.0
Thermal/Fan
IT8987E/BX 7
Page 82

Camera DDR & VTT


SPI Page 83

8 CR CONTROLLER +1.8VSUS
SPI ROM REALTEK/RTS5170-GR SD Card Page 84

DDR(2.5V)
9 Page 85
Finger Printer
Universal Jack
Battery Charger
HDA 6 Page 88
Speaker Audio Codec
REALTEK/ALC255-CGT M.2 2230
PCIe X1 (9)
WLAN & BT Load Switch
DMIC Page 91
B B
PCIe X4 (5, 6, 7, 8)
Power Protect
SATA1 M.2 2240/2260/2280 Page 92
SSD1
PCIe X2 (11, 12)
EMMC EMMC SATA2 M.2 2240/2260/2280
SSD2

A A

Title : Block Diagram


PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Monday, February 20, 2017 Sheet 1 of 94
5 4 3 2 1
5 4 3 2 1

Option Optional Remark

N/A Mount /SSD1 Support M.2 SSD1


/@ Ummount /SSD2 Support M.2 SSD2
/Debug Debug only /EMMC Support EMMC
D D

/EMI Reserved EMI part

/UMA Support UMA


/VGA Support VGA
/SDP Support SDP DRAM
/DDP Support DDP DRAM
/U22 Support 2+2 CPU
/U42 Support 4+2 CPU
/14inch Support 14"
/15inch Support 15"

C
/TPM Support TPM function C

/IOAC Support IOAC


/NON-IOAC Not support IOAC

/PTP Support PTP


/NON-PTP Not support PTP

B B

A A

Title : Option
PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW3 RD Engineer: James_Liao


Size Project Name Rev
C SU4EA 1.0
Date: Monday, February 20, 2017 Sheet 2 of 94
5 4 3 2 1
5 4 3 2 1

+VCCIO +VCCIO 5,7,9,57,91

03 CPU(1)_DDI_eDP +VCCST_CPU

+VCCSTG

+3VS
+VCCST_CPU

+VCCSTG

+3VS
7
7

4,20,21,22,23,24,30,31,32,36,41,44,45,48,49,50,51,53,56,57,62,64,65,91,92

DDI#1 DDPB_CTRLDATA
DDI#2 DDPC_CTRLDATA
DDPD_CTRLDATA
- Internal weak pull down 20k ohm
D
- 0 : port is not detected D
SKYLAKE-U symbol ReV0.53 #545316 / Ballout_Rev0_71 #543787 / PEGA local PN is 4201-0062000 1 : port is deteccted

U0301A

E55 C47 EDP_TXN0


48 HDMI_TXN2 DDI1_TXN[0] EDP_TXN[0] EDP_TXP0 EDP_TXN0 45 +3VS
F55 C46 EDP_TXP0 45
48 HDMI_TXP2 E58 DDI1_TXP[0] EDP_TXP[0] D46 EDP_TXN1
48 HDMI_TXN1 DDI1_TXN[1] EDP_TXN[1] EDP_TXP1 EDP_TXN1 45
DDI Port 1: HDMI F58 C45 DDPB_CTRLDATA
48 HDMI_TXP1 DDI1_TXP[1] EDP_TXP[1] DDPB_CTRLCLK
F53 A45
48 HDMI_TXN0 G53 DDI1_TXN[2] EDP_TXN[2] B45 both pull-up deleted, HDMI side pull-up
48 HDMI_TXP0 DDI1_TXP[2] EDP_TXP[2] EDP_TXP1 45
F56 A47
48 HDMI_CLKN G56 DDI1_TXN[3] EDP_TXN[3] B47
48 HDMI_CLKP DDI1_TXP[3] EDP_TXP[3] DDPC_CTRLDATA R0305 1 @ 2 2.2KOhm
C50 E45 EDP_AUXN
D50 DDI2_TXN[0] DDI EDP EDP_AUXN F45 EDP_AUXP EDP_AUXN 45 DDPC_CTRLCLK 1 2 2.2KOhm
R0340 @
DDI2_TXP[0] EDP_AUXP EDP_AUXP 45
C52
D52 DDI2_TXN[1] B52
A50 DDI2_TXP[1] EDP_DISP_UTIL
B50 DDI2_TXN[2] G50 +3VS
D51 DDI2_TXP[2] DDI1_AUXN F50
C51 DDI2_TXN[3] DDI1_AUXP E48 EXT_SCI# R0307 1 2 10KOhm
DDI2_TXP[3] DDI2_AUXN F48
DDI2_AUXP G46 EXT_SMI# R0308 1 2 10KOhm
DISPLAY SIDEBANDS RSVD_1 F46
DDPB_CTRLCLK L13 RSVD_2
48 HDMI_SCL_PCH DDPB_CTRLDATA GPP_E18/DDPB_CTRLCLK DPB_HPD
L12 L9 DPB_HPD 48 HDMI HPD
48 HDMI_SDA_PCH GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 L7
DDPC_CTRLCLK N7 GPP_E14/DDPC_HPD1 L6 EXT_SMI#_R R0302 1 2 0Ohm EXT_SMI#
DDPC_CTRLDATA GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 EXT_SCI#_R EXT_SCI# EXT_SMI# 30,44
N8 N9 R0303 1 2 0Ohm
GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 eDP_HPD EXT_SCI# 30
L10 eDP HPD
GPP_E17/EDP_HPD eDP_HPD 45
N11
+VCCIO N12 GPP_E22 R12 LCD_BKLTEN_PCH
GPP_E23 eDP_BKLTEN LCD_BKLTEN_PCH 21,45
R11 LCD_BL_PWM_PCH
DP_COMP eDP_BKLTCTL LCD_BL_PWM_PCH 45
R0301 2 1% 1 24.9Ohm E52 U13 EDP_VDD_EN
eDP_RCOMP eDP_VDDEN EDP_VDD_EN 45
C C
947859
0101-03860PB

141024 follow PDG V1.0 Table 10-4


+1.0V +VCCIO Rpu = 1K ohm 5% +1.0V
Rs = 500 ohm 5% Closeer EC
1

R0311 R0312 R0313


1KOhm 1KOhm @ 49.9Ohm
5% 1%
U0301D
2

TP_CATERR#_R D63 +VCCIO


R0315 1 2 43Ohm H_PECI A54 CATERR#
H_PROCHOT# 30 H_PECI_EC H_PROCHOT#_R PECI
R0314 1 2 499Ohm C65 JTAG
SP03011 2 0Ohm H_THRMTRIP#_R C63 PROCHOT#
32 H_THRMTRIP# THERMTRIP#
T0306 1 SKTOCC# A65
SKTOCC# B61 XDP_TCLK
CPU MISC PROC_TCK
C55 D60 XDP_TDI_CPU
D55 BPM#[0] PROC_TDI A61 XDP_TDO_CPU XDP_TDO_CPU R0323 2 1 51Ohm
B54 BPM#[1] PROC_TDO C60 XDP_TMS_CPU
B
C56 BPM#[2] PROC_TMS B59 XDP_TRST_CPU_N XDP_TMS_CPU 1 T0319
B
BPM#[3] PROC_TRST#
A6 B56 PCH_JTAG_TCLK 1 T0315 XDP_TDI_CPU 1 T0318
A7 GPP_E3/CPU_GP0 PCH_JTAG_TCK D59 XDP_TDI_CPU
BA5 GPP_E7/CPU_GP1 PCH_JTAG_TDI A56 XDP_TDO_CPU XDP_TRST_CPU_N 1 T0317
AY5 GPP_B3/CPU_GP2 PCH_JTAG_TDO C59 XDP_TMS_CPU
GPP_B4/CPU_GP3 PCH_JTAG_TMS C61 XDP_TRST_CPU_N XDP_TCLK R0324 2 1 51Ohm
R0316 1 2 49.9Ohm CPU_POPIRCOMP AT16 PCH_TRST# A59 XDP_TCLK
R0317 1 2 49.9Ohm PCH_POPIRCOMP AU16 PROC_POPIRCOMP JTAGX
R0318 1 2 49.9Ohm EDRAM_OPIO_RCOMP H66 PCH_OPIRCOMP
R0319 1 2 49.9Ohm EOPIO_RCOMP H65 OPCE_RCOMP
OPC_RCOMP

947859
0101-03860PB

R1.2 MB_Lesson learnt template

30 THRO_CPU 由
R0341 EC control 觸觸觸觸觸觸觸觸觸觸觸觸觸
預預70-200
0ohm觸是是是是
(depends on under-shoot measurement result),
ohm
1
1
G

2 3 R0341 2 1 0Ohm R0326 2 1 0Ohm H_PROCHOT#


2 S

3
D

Q0301 @ C0301
2N7002 0.1UF/16V
2

R0325 2 1 0Ohm GND


88 PROCHOT#
A A

R0320 2 @ 1 0Ohm
80 VR_HOT#

Title : CPU(1)_DDI_eDP
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Thursday, February 23, 2017 Sheet 3 of 94
5 4 3 2 1
5 4 3 2 1

04 Memory bus_DDR4
16 M_A_D[63:0] 17 M_B_D[63:0]
Used NIL Used NIL
SKL_ULT
U0301B U0301C

AU53 M_A_DIM0_CK_DDR0_DN
M_A_D0 DDR0_CKN[0] M_A_DIM0_CK_DDR0_DP M_A_DIM0_CK_DDR0_DN 15,16 M_A_D16 M_B_DIM0_CK_DDR0_DN
AL71 AT53 AF65 AN45
D M_A_D1 DDR0_DQ[0] DDR0_CKP[0] M_A_DIM0_CK_DDR0_DP 15,16 M_A_D17 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] M_B_DIM0_CK_DDR0_DN 15,17 D
AL68 AU55 AF64 AN46
M_A_D2 AN68 DDR0_DQ[1] DDR0_CKN[1] AT55 M_A_D18 AK65 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] AP45 M_B_DIM0_CK_DDR0_DP
A_Byte_0 DDR0_DQ[2] DDR0_CKP[1] A_Byte_2 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] M_B_DIM0_CK_DDR0_DP 15,17
M_A_D3 AN69 M_A_D19 AK64 AP46
M_A_D4 AL70 DDR0_DQ[3] BA56 M_A_DIM0_CKE0 M_A_D20 AF66 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1]
M_A_D5 DDR0_DQ[4] DDR0_CKE[0] M_A_DIM0_CKE0 15,16 M_A_D21 DDR1_DQ[4]/DDR0_DQ[20] M_B_DIM0_CKE0
AL69 BB56 AF67 AN56
M_A_D6 DDR0_DQ[5] DDR0_CKE[1] M_A_D22 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] M_B_DIM0_CKE0 15,17
AN70 AW56 AK67 AP55
M_A_D7 AN71 DDR0_DQ[6] DDR0_CKE[2] AY56 M_A_D23 AK66 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] AN55
M_A_D8 AR70 DDR0_DQ[7] DDR0_CKE[3] M_A_D24 AF70 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2] AP53
M_A_D9 AR68 DDR0_DQ[8] AU45 M_A_DIM0_CS0_N M_A_D25 AF68 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3]
M_A_D10 DDR0_DQ[9] DDR0_CS#[0] M_A_DIM0_CS0_N 15,16 M_A_D26 DDR1_DQ[9]/DDR0_DQ[25] M_B_DIM0_CS0_N
AU71 AU43 A_Byte_3 AH71 BB42
M_A_D11 DDR0_DQ[10] DDR0_CS#[1] M_A_DIM0_ODT0 M_A_D27 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] M_B_DIM0_CS0_N 15,17
A_Byte_1 AU68 AT45 AH68 AY42
M_A_D12 AR71 DDR0_DQ[11] DDR0_ODT[0] AT43 M_A_DIM0_ODT0 15,16 M_A_D28 AF71 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] BA42 M_B_DIM0_ODT0
M_A_D13 DDR0_DQ[12] DDR0_ODT[1] M_A_D29 DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] M_B_DIM0_ODT0 15,17
AR69 AF69 AW42
M_A_D14 AU70 DDR0_DQ[13] BA51 M_A_A5 M_A_D30 AH70 DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1]
M_A_D15 DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] M_A_A9 M_A_A5 15,16 M_A_D31 DDR1_DQ[14]/DDR0_DQ[30] M_B_A5
AU69 BB54 AH69 AY48
M_A_D32 DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] M_A_A6 M_A_A9 15,16 M_A_D48 DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] M_B_A9 M_B_A5 15,17
BB65 BA52 AT66 AP50
M_A_D33 AW65 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AY52 M_A_A8 M_A_A6 15,16 M_A_D49 AU66 DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] BA48 M_B_A6 M_B_A9 15,17
M_A_D34 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] M_A_A7 M_A_A8 15,16 M_A_D50 DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] M_B_A8 M_B_A6 15,17
A_Byte_4 AW63 AW52 A_Byte_6 AP65 BB48
M_A_D35 AY63 DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AY55 M_A_BG0 M_A_A7 15,16 M_A_D51 AN65 DDR1_DQ[18]/DDR0_DQ[50] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AP48 M_B_A7 M_B_A8 15,17
M_A_D36 DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] M_A_A12 M_A_BG0 15,16 M_A_D52 DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] M_B_BG0 M_B_A7 15,17
BA65 AW54 AN66 AP52
M_A_D37 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] M_A_A11 M_A_A12 15,16 M_A_D53 DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] M_B_A12 M_B_BG0 15,17
AY65 BA54 AP66 AN50
M_A_D38 BA63 DDR0_DQ[21]/DDR0_DQ[37] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] BA55 M_A_ACT_N M_A_A11 15,16 M_A_D54 AT65 DDR1_DQ[21]/DDR0_DQ[53] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AN48 M_B_A11 M_B_A12 15,17
M_A_D39 DDR0_DQ[22]/DDR0_DQ[38] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# M_A_BG1_CPU R0412 1 M_A_ACT_N 15,16 M_A_BG1 M_A_D55 DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] M_B_ACT_N M_B_A11 15,17
BB63 AY54 2 AU65 AN53
M_A_D40 BA61 DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_A_BG1 15,16 M_A_D56 AT61 DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# AN52 M_B_BG1_CPU 1 R0413 2 M_B_ACT_N
M_B_BG1 15,17
0Ohm /DDP
M_A_D41 DDR0_DQ[24]/DDR0_DQ[40] M_A_A13 M_A_D57 DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] M_B_BG1 15,17
AW61 AU46 AU61 0Ohm /DDP
DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] M_A_A13 15,16 DDR1_DQ[25]/DDR0_DQ[57]

1
A_Byte_5 M_A_D42 BB59 AU48 M_A_A15_CAS_N A_Byte_7 M_A_D58 AP60 BA43 M_B_A13
M_A_D43 AW59 DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] AT46 M_A_A14_WE_N M_A_A15_CAS_N 15,16 M_A_D59 AN60 DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] AY43 M_B_A15_CAS_N M_B_A13 15,17
R0411
M_A_D44 DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] M_A_A16_RAS_N M_A_A14_WE_N 15,16 M_A_D60 DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] M_B_A14_WE_N M_B_A15_CAS_N 15,17
BB61 AU50 0Ohm AN61 AY44
M_A_D45 AY61 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] AU52 M_A_BA0 M_A_A16_RAS_N 15,16 M_A_D61 AP61 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] AW44 M_B_A16_RAS_N M_B_A14_WE_N 15,17
/SDP
M_A_D46 DDR0_DQ[29]/DDR0_DQ[45] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] M_A_A2 M_A_BA0 15,16 M_A_D62 DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] M_B_BA0 M_B_A16_RAS_N 15,17
BA59 AY51 AT60 BB44
M_A_A2 15,16 M_B_BA0 15,17

2
M_A_D47 AY59 DDR0_DQ[30]/DDR0_DQ[46] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] AT48 M_A_BA1 M_A_D63 AU60 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] AY47 M_B_A2
DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] M_A_BA1 15,16 DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] M_B_A2 15,17

1
M_B_D0 AY39 AT50 M_A_A10_AP M_B_D16 AU40 BA44 M_B_BA1
M_B_D1 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] M_A_A1 M_A_A10_AP 15,16 M_B_D17 DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] M_B_A10_AP M_B_BA1 15,17
AW39 BB50 B_Byte_2 AT40 AW46 R0414
M_B_D2 AY37 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] AY50 M_A_A0 M_A_A1 15,16 M_B_D18 AT37 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AY46 M_B_A1 M_B_A10_AP 15,17
DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] M_A_A0 15,16 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] M_B_A1 15,17 0Ohm
B_Byte_0 M_B_D3 AW37 BA50 M_A_A3 M_B_D19 AU37 BA46 M_B_A0
M_B_D4 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] M_A_A4 M_A_A3 15,16 M_B_D20 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] M_B_A3 M_B_A0 15,17
BB39 BB52 AR40 BB46 /SDP
M_A_A4 15,16 M_B_A3 15,17

2
M_B_D5 BA39 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] M_B_D21 AP40 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3] BA47 M_B_A4
M_B_D6 DDR0_DQ[37]/DDR1_DQ[5] M_A_DQS_DN0 M_B_D22 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4] M_B_A4 15,17
C BA37 AM70 AP37 C
M_B_D7 BB37 DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] AM69 M_A_DQS_DP0 M_A_DQS_DN0 16 M_B_D23 AR37 DDR1_DQ[38]/DDR1_DQ[22] AH66 M_A_DQS_DN2
M_B_D8 DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] M_A_DQS_DN1 M_A_DQS_DP0 16 M_B_D24 DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2] M_A_DQS_DP2 M_A_DQS_DN2 16
AY35 AT69 AT33 AH65
M_B_D9 DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] M_A_DQS_DP1 M_A_DQS_DN1 16 M_B_D25 DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] M_A_DQS_DN3 M_A_DQS_DP2 16
AW35 AT70 AU33 AG69
M_B_D10 AY33 DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1] BA64 M_A_DQS_DN4 M_A_DQS_DP1 16 M_B_D26 AU30 DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] AG70 M_A_DQS_DP3 M_A_DQS_DN3 16
B_Byte_1 DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] M_A_DQS_DN4 16 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] M_A_DQS_DP3 16
M_B_D11 AW33 AY64 M_A_DQS_DP4 B_Byte_3 M_B_D27 AT30 AR66 M_A_DQS_DN6
M_B_D12 BB35 DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] AY60 M_A_DQS_DN5 M_A_DQS_DP4 16 M_B_D28 AR33 DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6] AR65 M_A_DQS_DP6 M_A_DQS_DN6 16
M_B_D13 DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQSN[3]/DDR0_DQSN[5] M_A_DQS_DP5 M_A_DQS_DN5 16 M_B_D29 DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSP[2]/DDR0_DQSP[6] M_A_DQS_DN7 M_A_DQS_DP6 16
BA35 BA60 AP33 AR61
M_B_D14 DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQSP[3]/DDR0_DQSP[5] M_B_DQS_DN0 M_A_DQS_DP5 16 M_B_D30 DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQSN[3]/DDR0_DQSN[7] M_A_DQS_DP7 M_A_DQS_DN7 16
BA33 BA38 AR30 AR60
M_B_D15 BB33 DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQSN[4]/DDR1_DQSN[0] AY38 M_B_DQS_DP0 M_B_DQS_DN0 17 M_B_D31 AP30 DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQSP[3]/DDR0_DQSP[7] AT38 M_B_DQS_DN2 M_A_DQS_DP7 16
M_B_D32 DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSP[4]/DDR1_DQSP[0] M_B_DQS_DN1 M_B_DQS_DP0 17 M_B_D48 DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQSN[4]/DDR1_DQSN[2] M_B_DQS_DP2 M_B_DQS_DN2 17
AY31 AY34 AU27 AR38
M_B_D33 AW31 DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] BA34 M_B_DQS_DP1 M_B_DQS_DN1 17 M_B_D49 AT27 DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2] AT32 M_B_DQS_DN3 M_B_DQS_DP2 17
B_Byte_5 DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] M_B_DQS_DP1 17 B_Byte_6 DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3] M_B_DQS_DN3 17
M_B_D34 AY29 BA30 M_B_DQS_DN4 M_B_D50 AT25 AR32 M_B_DQS_DP3
M_B_D35 DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] M_B_DQS_DP4 M_B_DQS_DN4 17 M_B_D51 DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3] M_B_DQS_DN6 M_B_DQS_DP3 17
AW29 AY30 AU25 AR25
M_B_D36 BB31 DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] AY26 M_B_DQS_DN5 M_B_DQS_DP4 17 M_B_D52 AP27 DDR1_DQ[51] DDR1_DQSN[6] AR27 M_B_DQS_DP6 M_B_DQS_DN6 17
M_B_D37 DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] M_B_DQS_DP5 M_B_DQS_DN5 17 M_B_D53 DDR1_DQ[52] DDR1_DQSP[6] M_B_DQS_DN7 M_B_DQS_DP6 17
BA31 BA26 AN27 AR22
M_B_D38 BA29 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5] M_B_DQS_DP5 17 M_B_D54 AN25 DDR1_DQ[53] DDR1_DQSN[7] AR21 M_B_DQS_DP7 M_B_DQS_DN7 17
M_B_D39 DDR0_DQ[54]/DDR1_DQ[38] DDR0_A_ALERT_N M_B_D55 DDR1_DQ[54] DDR1_DQSP[7] M_B_DQS_DP7 17
BB29 AW50 AP25
M_B_D40 DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# DDR0_A_PARITY DDR0_A_ALERT_N 15,16 M_B_D56 DDR1_DQ[55] DDR1_B_ALERT_N
AY27 AT52 AT22 AN43
M_B_D41 AW27 DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR DDR0_A_PARITY 15,16 M_B_D57 AU22 DDR1_DQ[56] DDR1_ALERT# AP43 DDR1_B_PARITY DDR1_B_ALERT_N 15,17
B_Byte_6 DDR0_DQ[57]/DDR1_DQ[41] DDR1_DQ[57] DDR1_PAR DDR1_B_PARITY 15,17
M_B_D42 AY25 AY67 +V_DDR_CA_VREF M_B_D58 AU21 AT13 DDR4_DRAMRST_N
M_B_D43 AW25 DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA AY68 +V_DDR_CA_VREF 19 M_B_D59 AT21 DDR1_DQ[58] DRAM_RESET# AR18 SM_RCOMP_0 R0402 1 2 121OHM /DDP
DDR0_DQ[59]/DDR1_DQ[43] DDR0_VREF_DQ B_Byte_7 DDR1_DQ[59] DDR_RCOMP[0]
1%
M_B_D44 BB27 DDR CH - A BA67 +V_DDR_VREFDQ02_CHB M_B_D60 AN22 AT18 SM_RCOMP_1 R0403 1 1% 2 80.6Ohm
M_B_D45 DDR0_DQ[60]/DDR1_DQ[44] DDR1_VREF_DQ +V_DDR_VREFDQ02_CHB 19 M_B_D61 DDR1_DQ[60] DDR_RCOMP[1] SM_RCOMP_2 R0404
BA27 AP22 AU18 1 1% 2 100Ohm
M_B_D46 BA25 DDR0_DQ[61]/DDR1_DQ[45] AW67 DDR_VTT_CTRL M_B_D62 AP21 DDR1_DQ[61] DDR_RCOMP[2]
M_B_D47 BB25 DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL M_B_D63 AN21 DDR1_DQ[62] DDR CH - B
DDR0_DQ[63]/DDR1_DQ[47] DDR1_DQ[63]

947859 947859

SM_RCOMP_0 R0410 1 2 200Ohm 10V220000034

/SDP

R0402 and R0410 overlap


B B
RCOMP[0] value for SDP is 200+/-1% ohm, and for DDP is 121+/- 1% ohm

R1.1 +1.2V
EMI
+1.2V @

1
+3VS +3VSUS C0403 1 2 0.1UF/16V
+1.2V
R0408
470Ohm
1

C0401
U0401 0.1UF/16V R0405

2
1KOhm R0406 DDR4_DRAMRST_N R0409 1 2 0Ohm
DDR4_DRAMRST_R_N 16,17
2

1 NC 5 220KOhm
DDR_VTT_CTRL VCC
2 A @
2

1
3 Y 4 C0402
GND DDR_PG_CTRL 83
1

0.1UF/16V
R0401 DDR_VTT_CNTL to VTT @

2
10KOhm 74AUP1G07GW Controls reset to the memory subsystems,
power ready < 35us (tCPU18)
1

@ and is used on DDR3L, DDR4


R0407 (not applicable to LPDDR3).
2

2MOHM
@ 546765_SKL_MOW
DDR4/3L Reset signal - DRAMRST
2

It is recommended not to install any capacitor


on DDR Reset signal (DRAMRST).

Symbol U0301 B Symbol U0301 C


A A
interleaved(Symbol default) Non-interleaved interleaved(Symbol default) Non-interleaved
BYTE 0 ChannelA DQ[0..15] BYTE 0 ChannelA DQ[16..31]
BYTE 1 DQS/DQS#[0,1] BYTE 1 DQS/DQS#[2,3]
BYTE 2 ChannelADQ[32..47] BYTE 2 ChannelADQ[48..63]
BYTE 3 ChannelA DQ[0..63] DQS/DQS#[4,5] BYTE 3 ChannelB DQ[0..63] DQS/DQS#[6,7]
BYTE 4 DQS/DQS#[0..7] ChannelB DQ[0..15] BYTE 4 DQS/DQS#[0..7] ChannelB DQ[16..31] Title : Memory bus_DDR4
BYTE 5 DQS/DQS#[0,1] BYTE 5 DQS/DQS#[2,3] PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
BYTE 6 ChannelB DQ[32..47] BYTE 6 ChannelB DQ[48..63] Size Project Name Rev
BYTE 7 DQS/DQS#[4,5] BYTE 7 DQS/DQS#[6,7] C SU4EA 1.0
Date: Thursday, February 23, 2017 Sheet 4 of 94
5 4 3 2 1
5 4 3 2 1

05 CPU(3)_+VCCCORE

D R1.1 follow intel PDG_James D

+VCORE

+VCORE +VCORE
U0301L
1

1
C0511 C0513 C0509 C0510 C0514 C0515 CPU POWER 1 OF 4
@ 1UF/6.3V @ 1UF/6.3V @ 1UF/6.3V @ 1UF/6.3V @ 1UF/6.3V @ 1UF/6.3V
A30 G32
2

2
A34 VCC_1 VCC_19 G33
A39 VCC_2 VCC_20 G35
A44 VCC_3 VCC_21 G37
AK33 VCC_4 VCC_22 G38 2016.03.18
AK35 VCC_5 VCC_23 G40 R0524,R0522,R0525,R0523,R0526 and C0505 close to U8000
VCC_6 VCC_24 CPU side VR side
1

1
C0518 C0519 C0530 C0543 C0522 AK37 G42
@ 1UF/6.3V @ 1UF/6.3V @ 1UF/6.3V @ 1UF/6.3V @ 1UF/6.3V AK38 VCC_7 VCC_25 J30
AK40 VCC_8 VCC_26 J33 R0524 1 2 0Ohm
VR_SVID_ALERT# 80
2

2
AL33 VCC_9 VCC_27 J37
AL37 VCC_10 VCC_28 J40
AL40 VCC_11 VCC_29 K33 +1.0V
AM32 VCC_12 VCC_30 K35 +1.0V
AM33 VCC_13 VCC_31 K37
Pull H/L near CPU side
VCC_14 VCC_32
1

1
C0525 C0526 C0527 C0523 C0524 C0528 C0529 AM35 K38 R0536 1 1% 2 100Ohm
@ 1UF/6.3V @ 1UF/6.3V @ 1UF/6.3V @ 1UF/6.3V @ 1UF/6.3V @ 1UF/6.3V @ 1UF/6.3V AM37 VCC_15 VCC_33 K40 +VCORE
VCC_16 VCC_34

1
AM38 K42 VCORE_VCCSENSE 80
2

2
VCC_17 VCC_35

1
G30 K43 R0520
VCC_18 VCC_36 R0522 C0505
C VCORE_VSSSENSE 80 56Ohm C
K32 E32 45.3Ohm 0.1UF/16V

2
RSVD_3 VCC_SENSE E33 R0537 1 1% 2 100Ohm 1%

2
AK32 VSS_SENSE 1%

2
RSVD_4 B63 VIDALERT# R0517 1 1% 2 220Ohm VIDALERT#_R
VIDALERT#
1

C0542 AB62 A63 VIDSCK R0518 1 2 0Ohm VIDSCK_R R0525 1 1% 2 51Ohm


P62 VCCOPC_1 VIDSCK D64 VR_SVID_CLK 80
@ C0544 @ C0545 @ 1UF/6.3V @ C0547 @ C0548 VIDSOUT R0519 1 2 0Ohm
47UF/6.3V 47UF/6.3V 47UF/6.3V 47UF/6.3V V62 VCCOPC_2 VIDSOUT
2

VCCOPC_3 G20 +1.0V +1.0V


H63 VCCSTG
VCC_OPC_1P8_1 +VCCIO
G61
VCC_OPC_1P8_2

1
AC63 R0521 R0523
AE63 VCCOPC_SENSE
VSSOPC_SENSE 100Ohm 100Ohm
AE62 1% 1%

2
AG62 VCCEOPIO_1
VCCEOPIO_2 VIDSOUT_R R0526 1 1% 2 10Ohm
AL63 VR_SVID_DATA 80
AJ62 VCCEOPIO_SENSE
VSSEOPIO_SENSE

947859
0101-03860PB

B B

A A

Title :CPU(3)_+VCCCORE
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Thursday, February 23, 2017 Sheet 5 of 94
5 4 3 2 1
5 4 3 2 1

06 CPU(4)_+VCCGT R1.1 follow intel PDG

+VCORE +VCORE_U42_+VCCGT_U22 +VCCGT


+VCCGT
+VCCGT
U0301M
R0601 1 /U42 2 0ohm R0602 1 /U22 2 0ohm
CPU POWER 2 OF 4
N70
VCCGT_56

1
A48 N71 C0602 C0603 C0605 C0604 C0606 C0607 C0608
A53 VCCGT_1 VCCGT_57 R63 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
A58 VCCGT_2 VCCGT_58 R64 @ @ @ @ @ @ @

2
D
A62 VCCGT_3 VCCGT_59 R65 D
A66 VCCGT_4 VCCGT_60 R66
AA63 VCCGT_5 VCCGT_61 R67
R0601~R0606 AA64 VCCGT_6
VCCGT_7
VCCGT_62
VCCGT_63
R68
AA66 R69
VCCGT_8 VCCGT_64
20161212 R1.1 Kai AA67
VCCGT_9 VCCGT_65
R70
change to VX AA69
VCCGT_10 VCCGT_66
R71

1
AA70 T62 C0628 C0629 C0610 C0609 C0611 C0612 C0613
VCCGT_11 VCCGT_67

U42 U42
AA71 U65
20161223 R1.1 James VCCGT_12 VCCGT_68
47UF/6.3V 47UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V

U22
AC64 U68 @ @ @ @ @ @ @
change package size from 0805 to 0603

2
AC65 VCCGT_13 VCCGT_69 U71
AC66 VCCGT_14 VCCGT_70 W63
20161223 R1.1 Kai AC67 VCCGT_15 VCCGT_71 W64
change VX to P/N, for layout AC68 VCCGT_16
VCCGT_17
VCCGT_72
VCCGT_73
W65
AC69 W66
VCCGT_18 VCCGT_74

1
R1.2 AC70 W67 C0616 C0618 C0617 C0614 C0615 C0619 C0620
AC71 VCCGT_19 VCCGT_75 W68 +VCORE_U42_+VCCGTx_U23 +VCORE 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
J43 VCCGT_20 VCCGT_76 W69 @ @ @ @ @ @ @

2
+VCORE_U42_+VCCGT_U22 J45 VCCGT_21 VCCGT_77 W70
J46 VCCGT_22 VCCGT_78 W71 R0603 1 /U42 2 0ohm
J48 VCCGT_23 VCCGT_79 Y62
J50 VCCGT_24 VCCGT_80
J52 VCCGT_25
VCCGT_26
1

C0630 C0631 C0632 J53 AK42


1UF/6.3V 1UF/6.3V 1UF/6.3V J55 VCCGT_27 VccGTx_1 AK43
/U42 /U42 /U42 J56 VCCGT_28 VccGTx_2 AK45
2

VCCGT_29 VccGTx_3

1
J58 AK46 C0623 C0624 C0621 C0622 C0627
J60 VCCGT_30 VccGTx_4 AK48 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
K48 VCCGT_31 VccGTx_5 AK50 @ @ @ @ @

2
K50 VCCGT_32 VccGTx_6 AK52
R0607 1 /U22 2 0Ohm K52 VCCGT_33 VccGTx_7 AK53
VCCGT_34 VccGTx_8
1

C0633 C0634 C0635 R1.1 short pin K53 AK55


1UF/6.3V 1UF/6.3V 1UF/6.3V K55 VCCGT_35 VccGTx_9 AK56
/U42 /U42 /U42 to 0 ohm K56 VCCGT_36 VccGTx_10 AK58
2

K58 VCCGT_37 VccGTx_11 AK60


K60 VCCGT_38 VccGTx_12 AK70
L62 VCCGT_39 VccGTx_13 AL43
L63 VCCGT_40 VccGTx_14 AL46
C C
L64 VCCGT_41 VccGTx_15 AL50
L65 VCCGT_42 VccGTx_16 AL53
L66 VCCGT_43 VccGTx_17 AL56
L67 VCCGT_44 VccGTx_18 AL60
+VCCGT L68 VCCGT_45 VccGTx_19 AM48
L69 VCCGT_46 VccGTx_20 AM50
L70 VCCGT_47 VccGTx_21 AM52
L71 VCCGT_48 VccGTx_22 AM53
VCCGT_49 VccGTx_23
2

M62 AM56
N63 VCCGT_50 VccGTx_24 AM58
R0609 N64 VCCGT_51 VccGTx_25 AU58
100Ohm N66 VCCGT_52 VccGTx_26 AU63
1% N67 VCCGT_53 VccGTx_27 BB57
1

N69 VCCGT_54 VccGTx_28 BB66


Pull H/L near CPU side VCCGT_55 VccGTx_29
VCCGT_VCCSENSE J70 AK62
80 VCCGT_VCCSENSE VCCGT_SENSE VCCGTx_SENSE
VCCGT_VSSSENSE J69 AL61
80 VCCGT_VSSSENSE VSSGT_SENSE VSSGTx_SENSE

947859
1

0101-03860PB
R0610
100Ohm
1%
2

Pull H/L near CPU side

B B

A A

Title : CPU(4)_+VCCGT
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 6 of 94
5 4 3 2 1
5 4 3 2 1

07 CPU(5)_+VDDQ/IO/SA

D D

+1.2V +VDDQ_CPU U0301N


C0701 - C0704 : Near by package +VCCIO
JP0701 C0705 - C0710 : Underneath the package 2.8A
CPU POWER 3 OF 4

1 2 AU23 AK28
1 2 AU28 VDDQ_1 VCCIO_1 AK30
VDDQ_2 VCCIO_2

1
3MM_OPEN_5MIL AU35 AL30
VDDQ_3 VCCIO_3
1

1
AU42 AL42 C0717 C0718 C0719 C0720
JP0702 C0701 C0702 C0703 C0704 C0705 C0706 C0707 C0708 C0709 C0710 BB23 VDDQ_4 VCCIO_4 AM28 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
1 2 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V BB32 VDDQ_5 VCCIO_5 AM30
2

2
1 2 BB41 VDDQ_6 VCCIO_6 AM42
3MM_OPEN_5MIL BB47 VDDQ_7 VCCIO_7
R1.1 BB51 VDDQ_8 AK23 +VCCSA
+VDDQ_CPU +VDDQ_CPU_CLK VDDQ_9 VCCSA_1 AK25
VCCSA_2 G23
R0701 1 2 0Ohm
Decoupling cap for internal power AM40 VCCSA_3 G25
4.5A
VDDQC VCCSA_4 G27
VCCSA_5

1
R2.0_0816 A18 G28
C0711 VCCST VCCSA_6 J22
R1.1 follow intel PDG 10UF/6.3V A22 VCCSA_7 J23 +VCCIO

2
+VCCST_CPU VCCSTG VCCSA_8 J27
1AV200000074 VCCSA_9
0.1A AL23 K23
VCCPLL_OC VCCSA_10

1
vx_c0402_h28_small K25
+VCCSA K20 VCCSA_11 K27 R0714
VccPLL_1 VCCSA_12

1
K21 K28 1KOhm
C0712 VccPLL_2 VCCSA_13 K30 @
1UF/6.3V VCCSA_14
Reserved PH/PD

2
AM23 VCCIO_VR_FB
VCCIO_SENSE
1

C C0731 C0732 C0734 C0733 C0735 C0736 C0737 AM22 VSSIO_VR_FB C


10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V VSSIO_SENSE

1
@ @ @ @ @ @ @ +VCCSTG H21 VCCSA_VSSSENSE 80
2

VSSSA_SENSE H20 R0715


VCCSA_SENSE VCCSA_VCCSENSE 80
1KOhm
@

1
947859

2
C0713
1UF/6.3V 0101-03860PB

2
1

C0743 C0744 C0738 C0739 C0740 C0741 C0742


47UF/6.3V 47UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
@ @ @ @ @ @ @
2

+VCCSFR_OC

+VCCSA
1

2
C0714 R0720
0.1UF/16V 100Ohm
2

1%

1
VCCSA_VCCSENSE
VCCSA_VSSSENSE
+VCCSFR

2
R0721
100Ohm
1

1%
C0715 C0716 +1.0V +VCCST_CPU

1
0.1UF/16V 0.1UF/16V
2

0.24A 0.24A
R0710 1 2 0Ohm

RES 0 OHM 1/10W (0603) JUMP

+1.0V +VCCSFR
B B
0.24A 0.24A
R0711 1 2 0Ohm

RES 0 OHM 1/10W (0603) JUMP

+1.2V +VCCSFR_OC
Refer to CRB 0.53
R0709 1 2 0Ohm

RES 0 OHM 1/10W (0603) JUMP


+VCCSTG
+VCCIO

0.12A 0.12A
R0713 1 2 0Ohm

RES 0 OHM 1/10W (0603) JUMP

A A

Title :
CPU(5)_+VDDQ/IO/SA
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Thursday, February 23, 2017 Sheet 7 of 94
5 4 3 2 1
5 4 3 2 1

08 CPU(6)_CPU GND

U0301P U0301Q U0301R


D D
GND 1 OF 3 GND 2 OF 3 GND 3 OF 3

A5 AL65 AT63 BA49 F8 L18


A67 VSS_1 VSS_71 AL66 AT68 VSS_141 VSS_209 BA53 G10 VSS_278 VSS_319 L2
A70 VSS_2 VSS_72 AM13 AT71 VSS_142 VSS_210 BA57 G22 VSS_279 VSS_320 L20
AA2 VSS_3 VSS_73 AM21 AU10 VSS_143 VSS_211 BA6 G43 VSS_280 VSS_321 L4
AA4 VSS_4 VSS_74 AM25 AU15 VSS_144 VSS_212 BA62 G45 VSS_281 VSS_322 L8
AA65 VSS_5 VSS_75 AM27 AU20 VSS_145 VSS_213 BA66 G48 VSS_282 VSS_323 N10
AA68 VSS_6 VSS_76 AM43 AU32 VSS_146 VSS_214 BA71 G5 VSS_283 VSS_324 N13
AB15 VSS_7 VSS_77 AM45 AU38 VSS_147 VSS_215 BB18 G52 VSS_284 VSS_325 N19
AB16 VSS_8 VSS_78 AM46 AV1 VSS_148 VSS_216 BB26 G55 VSS_285 VSS_326 N21
AB18 VSS_9 VSS_79 AM55 AV68 VSS_149 VSS_217 BB30 G58 VSS_286 VSS_327 N6
AB21 VSS_10 VSS_80 AM60 AV69 VSS_150 VSS_218 BB34 G6 VSS_287 VSS_328 N65
AB8 VSS_11 VSS_81 AM61 AV70 VSS_151 VSS_219 BB38 G60 VSS_288 VSS_329 N68
AD13 VSS_12 VSS_82 AM68 AV71 VSS_152 VSS_220 BB43 G63 VSS_289 VSS_330 P17
AD16 VSS_13 VSS_83 AM71 AW10 VSS_153 VSS_221 BB55 G66 VSS_290 VSS_331 P19
AD19 VSS_14 VSS_84 AM8 AW12 VSS_154 VSS_222 BB6 H15 VSS_291 VSS_332 P20
AD20 VSS_15 VSS_85 AN20 AW14 VSS_155 VSS_223 BB60 H18 VSS_292 VSS_333 P21
AD21 VSS_16 VSS_86 AN23 AW16 VSS_156 VSS_224 BB64 H71 VSS_293 VSS_334 R13
AD62 VSS_17 VSS_87 AN28 AW18 VSS_157 VSS_225 BB67 J11 VSS_294 VSS_335 R6
AD8 VSS_18 VSS_88 AN30 AW21 VSS_158 VSS_226 BB70 J13 VSS_295 VSS_336 T15
AE64 VSS_19 VSS_89 AN32 AW23 VSS_159 VSS_227 C1 J25 VSS_296 VSS_337 T17
AE65 VSS_20 VSS_90 AN33 AW26 VSS_160 VSS_228 C25 J28 VSS_297 VSS_338 T18
AE66 VSS_21 VSS_91 AN35 AW28 VSS_161 VSS_229 C5 J32 VSS_298 VSS_339 T2
AE67 VSS_22 VSS_92 AN37 AW30 VSS_162 VSS_230 D10 J35 VSS_299 VSS_340 T21
AE68 VSS_23 VSS_93 AN38 AW32 VSS_163 VSS_231 D11 J38 VSS_300 VSS_341 T4
AE69 VSS_24 VSS_94 AN40 AW34 VSS_164 VSS_232 D14 J42 VSS_301 VSS_342 U10
AF1 VSS_25 VSS_95 AN42 AW36 VSS_165 VSS_233 D18 J8 VSS_302 VSS_343 U63
AF10 VSS_26 VSS_96 AN58 AW38 VSS_166 VSS_234 D22 K16 VSS_303 VSS_344 U64
AF15 VSS_27 VSS_97 AN63 AW41 VSS_167 VSS_235 D25 K18 VSS_304 VSS_345 U66
AF17 VSS_28 VSS_98 AP10 AW43 VSS_168 VSS_236 D26 K22 VSS_305 VSS_346 U67
AF2 VSS_29 VSS_99 AP18 AW45 VSS_169 VSS_237 D30 K61 VSS_306 VSS_347 U69
AF4 VSS_30 VSS_100 AP20 AW47 VSS_170 VSS_238 D34 K63 VSS_307 VSS_348 U70
AF63 VSS_31 VSS_101 AP23 AW49 VSS_171 VSS_239 D39 K64 VSS_308 VSS_349 V16
AG16 VSS_32 VSS_102 AP28 AW51 VSS_172 VSS_240 D44 K65 VSS_309 VSS_350 V17
AG17 VSS_33 VSS_103 AP32 AW53 VSS_173 VSS_241 D45 K66 VSS_310 VSS_351 V18
AG18 VSS_34 VSS_104 AP35 AW55 VSS_174 VSS_242 D47 K67 VSS_311 VSS_352 W13
C C
AG19 VSS_35 VSS_105 AP38 AW57 VSS_175 VSS_243 D48 K68 VSS_312 VSS_353 W6
AG20 VSS_36 VSS_106 AP42 AW6 VSS_176 VSS_244 D53 K70 VSS_313 VSS_354 W9
AG21 VSS_37 VSS_107 AP58 AW60 VSS_177 VSS_245 D58 K71 VSS_314 VSS_355 Y17
AG71 VSS_38 VSS_108 AP63 AW62 VSS_178 VSS_246 D6 L11 VSS_315 VSS_356 Y19
AH13 VSS_39 VSS_109 AP68 AW64 VSS_179 VSS_247 D62 L16 VSS_316 VSS_357 Y20
AH6 VSS_40 VSS_110 AP70 AW66 VSS_180 VSS_248 D66 L17 VSS_317 VSS_358 Y21
AH63 VSS_41 VSS_111 AR11 AW8 VSS_181 VSS_249 D69 VSS_318 VSS_359
AH64 VSS_42 VSS_112 AR15 AY66 VSS_182 VSS_250 E11
AH67 VSS_43 VSS_113 AR16 B10 VSS_183 VSS_251 E15
AJ15 VSS_44 VSS_114 AR20 B14 VSS_184 VSS_252 E18
AJ18 VSS_45 VSS_115 AR23 B18 VSS_185 VSS_253 E21 947859
AJ20 VSS_46 VSS_116 AR28 B22 VSS_186 VSS_254 E46 0101-03860PB
AJ4 VSS_47 VSS_117 AR35 B30 VSS_187 VSS_255 E50
AK11 VSS_48 VSS_118 AR42 B34 VSS_188 VSS_256 E53
AK16 VSS_49 VSS_119 AR43 B39 VSS_189 VSS_257 E56
AK18 VSS_50 VSS_120 AR45 B44 VSS_190 VSS_258 E6
AK21 VSS_51 VSS_121 AR46 B48 VSS_191 VSS_259 E65
AK22 VSS_52 VSS_122 AR48 B53 VSS_192 VSS_260 E71
AK27 VSS_53 VSS_123 AR5 B58 VSS_193 VSS_261 F1
AK63 VSS_54 VSS_124 AR50 B62 VSS_194 VSS_262 F13
AK68 VSS_55 VSS_125 AR52 B66 VSS_195 VSS_263 F2
AK69 VSS_56 VSS_126 AR53 B71 VSS_196 VSS_264 F22
AK8 VSS_57 VSS_127 AR55 BA1 VSS_197 VSS_265 F23
AL2 VSS_58 VSS_128 AR58 BA10 VSS_198 VSS_266 F27
AL28 VSS_59 VSS_129 AR63 BA14 VSS_199 VSS_267 F28
AL32 VSS_60 VSS_130 AR8 BA18 VSS_200 VSS_268 F32
AL35 VSS_61 VSS_131 AT2 BA2 VSS_201 VSS_269 F33
AL38 VSS_62 VSS_132 AT20 BA23 VSS_202 VSS_270 F35
AL4 VSS_63 VSS_133 AT23 BA28 VSS_203 VSS_271 F37
AL45 VSS_64 VSS_134 AT28 BA32 VSS_204 VSS_272 F38
AL48 VSS_65 VSS_135 AT35 BA36 VSS_205 VSS_273 F4
AL52 VSS_66 VSS_136 AT4 F68 VSS_206 VSS_274 F40
AL55 VSS_67 VSS_137 AT42 BA45 VSS_207 VSS_275 F42
AL58 VSS_68 VSS_138 AT56 VSS_208 VSS_276 BA41
AL64 VSS_69 VSS_139 AT58 VSS_277
VSS_70 VSS_140

B B

947859 947859
0101-03860PB 0101-03860PB

A A

Title : CPU(6)_CPU GND


PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Monday, February 20, 2017 Sheet 8 of 94
5 4 3 2 1
5 4 3 2 1

09CPU(7)_CFG/RSVD
U0301S

RESERVED SIGNALS-1

CFG0 E68 BB68


B67 CFG[0] RSVD_TP_3 BB69
CFG2 D65 CFG[1] RSVD_TP_4
T0923 1 CFG3 D67 CFG[2] AK13
CFG4 E70 CFG[3] RSVD_TP_5 AK12
D
C68 CFG[4] RSVD_TP_6 D
D68 CFG[5] BB2
CFG7 C67 CFG[6] RSVD_21 BA3
T0924 1 CFG8 F71 CFG[7] RSVD_22
T0925 1 CFG9 G69 CFG[8]
T0926 1 CFG10 F70 CFG[9] AU5
T0927 1 CFG11 G68 CFG[10] TP5 AT5
T0928 1 CFG12 H70 CFG[11] TP6
T0929 1 CFG13 G71 CFG[12]
T0930 1 CFG14 H69 CFG[13] D5
T0931 1 CFG15 G70 CFG[14] RSVD_23 D4
CFG[15] RSVD_24 B2
T0919 1 CFG16 E63 RSVD_25 C2
T0920 1 CFG17 F63 CFG[16] RSVD_26
CFG[17] B3
T0921 1 CFG18 E66 RSVD_27 A3
T0922 1 CFG19 F66 CFG[18] RSVD_28
CFG[19] AW1
R0901 1 1% 2 49.9Ohm CFG_RCOMP E60 RSVD_29
CFG_RCOMP E1
T0901 1 ITP_PMODE E8 RSVD_30 E2
Reserve TP for XDP ITP_PMODE RSVD_31
AY2 BA4
AY1 RSVD_5 RSVD_32 BB4
RSVD_6 RSVD_33
D1 A4
D3 RSVD_7 RSVD_34 C4
RSVD_8 RSVD_35
K46 BB5
K45 RSVD_9 TP4
RSVD_10 A69
AL25 RSVD_36 B69
AL27 RSVD_11 RSVD_37
RSVD_12 AY3 RSVD_AY3 R0902 1 2 0Ohm
C71 RSVD_38
B70 RSVD_13 D71
RSVD_14 RSVD_39 C70
F60 RSVD_40
C C
RSVD_15 C54
A52 RSVD_41 D54
RSVD_16 RSVD_42
BA70 AY4
BA68 RSVD_TP_1 TP1 BB3
RSVD_TP_2 TP2
J71 AY71 VSS_AY71 R0903 1 2 0Ohm
J68 RSVD_17 VSS_362 AR56
RSVD_18 ZVM#
T0917 1 RSVD_VSS_F65 F65 AW71
T0918 1 RSVD_VSS_G65 G65 VSS_360 RSVD_TP_7 AW70 +1.0V MOW WW48
VSS_361 RSVD_TP_8 1. Ball C64 which is PROC_SELECT# needs to be pulled to VCCST for
F61
RSVD_19 MSM#
AP56 Cannonlake support via 100K ohm resistor and with no resistor populated
E61 C64 SKL_CNL# R0904 1 @ 2 100KOhm
Remove SNN RSVD_20 PROC_SELECT# (floating pin) for Skylake.

947859
0101-03860PB

+VCCIO

U0301T

R0906 1 @ 2 10KOhm CFG0 R0922 1 @ 2 1KOhm SPARE


1% PDG 1.2 AW69 F6
Placeholder only. Does not need to be stuffed. AW68 RSVD_43 RSVD_51 E3 U42_XTAL24_IN R0940 1 /U42 2 0Ohm U42_XTAL24_IN_R C0903 1 2 10PF/50V
RSVD_44 RSVD_52 GND
Placement are required for future platform compatibility purpose only. AU56
RSVD_45 RSVD_53
C11 10V240000001
+1.8VSUS AW48 B11 /U42 1AV200000001
RSVD_46 RSVD_54

1
R0908 1 @ 2 10KOhm CFG2 R0924 1 @ 2 1KOhm C7 A11
RSVD_47 RSVD_55

1
1% R0930 1 @ 2 0Ohm VCC_1P8_U12 U12 D12 07V080000024
R0931 1 @ 2 0Ohm VCC_1P8_U11 U11 RSVD_48 RSVD_56 C12 R0932 X0901 2
RSVD_49 RSVD_57 GND
H11 F52 1MOhm 24MHZ
B RSVD_50 RSVD_58 /U42 /U42 4 B
1

1
C0901 C0902 10V240000006

2
R0910 1 @ 2 10KOhm CFG4 R0926 1 2 1KOhm 0.1UF/16V 0.1UF/16V
1% @ @ C0904
947859
2

3
U42_XTAL24_OUT R0941 1 /U42 2U42_XTAL24_OUT_R
0Ohm 1 2 U42_XTAL24_OUT_R_R 1 2 10PF/50V
0101-03860PB GND
10V240000001 SP0910 0Ohm
/U42 1AV200000001

R0913 1 @ 2 10KOhm CFG7 R0929 1 @ 2 1KOhm


1%
Name P5HCJ_KBL Description

CFG0 1 1 = (Default) Normal Operation; No stall


0 = Stall
CFG1 1 Reserved configuration lane

PCI Express* Static x16 Lane Numbering Reversal


CFG2 1 1 = Normal operation
0 = Lane numbers reversed
CFG3 1 Reserved configuration lane

CFG[4]: eDP* enable:


CFG4 0 1 = Disabled.
0 = Enabled

CFG[6:5]: PCI Express* Bifurcation


A A
00 = 1 x8, 2 x4 PCI Express*
CFG5 1 01 = reserved
CFG6
10 = 2 x8 PCI Express*
11 = 1 x16 PCI Express*
The CFG signals have a default value of '1' if not terminated on the board.
*All processor lines. CFG[7]: PEG Training:
CFG[2], CFG[6:5] and CFG[7] are relevant for H and S-processor line only 1 = (default) PEG Train immediately following
and test point may be placed on the board for them CFG7 1 RESET# de assertion
0 = PEG Wait for BIOS for training. Title :CPU(7)_CFG/RSVD
PEGATRON PROPRIETARY AND CONFIDENTIAL
CFG[19:8] 1 Reserved configuration lane BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
From EDS_Intel_CPU(Kabylake.UY)_Vol1_559100_Rev0p91 Page.123 C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 9 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A Title : Block Diagram A


PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
A SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 10 of 94

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 11 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 12 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 13 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 14 of 94


5 4 3 2 1
5 4 3 2 1

15 DDR4(0)_Termination
+0.6VS
Average placed close to +VDDQ_VTT power plane
R1.1 follow intel PDG
36OHM N/A +0.6VS
4,16 M_A_DIM0_CS0_N R1521 1 2 1%
+0.6VS
36OHM N/A 36OHM N/A
R1501 1 2 1% M_A_A0 R1522 1 2 1%
M_A_A0 4,16 4,16 M_A_DIM0_CKE0

1
36OHM N/A C1501 C1502 C1503 C1504 C1505 C1506 C1507 C1508
D M_A_A1 D
R1502 1 2 1% M_A_A1 4,16 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
+0.6VS X5R/10% X5R/10% X5R/10% X5R/10% N/A N/A N/A N/A
36OHM N/A
R1503 1 2 1% M_A_A2 vx_c0402_small vx_c0402_small vx_c0402_small vx_c0402_small X5R/10% X5R/10% X5R/10% X5R/10%
M_A_A2 4,16
N/A N/A N/A N/A vx_c0402_small vx_c0402_smallvx_c0402_smallvx_c0402_small
36OHM N/A N/A 36OHM
R1504 1 2 1% M_A_A3 1% 2 1 R1517
M_A_A3 4,16 4,16 M_A_BG1
36OHM N/A N/A 36OHM
R1505 1 2 1% M_A_A4 1% 2 1 R1523
M_A_A4 4,16 4,16 M_A_BG0
36OHM N/A N/A 36OHM
R1506 1 2 1% M_A_A5 1% 2 1 R1524 +0.6VS
M_A_A5 4,16 4,16 M_A_BA0
36OHM N/A N/A 36OHM
R1507 1 2 1% M_A_A6 1% 2 1 R1525
M_A_A6 4,16 4,16 M_A_BA1

1
36OHM N/A N/A 36OHM

CHA R1508 1 2 1% M_A_A7


M_A_A7 4,16 4,16 M_A_DIM0_ODT0 1% 2 1 R1530 C1532
1UF/6.3V
C1535
1UF/6.3V
C1538
1UF/6.3V
C1531
1UF/6.3V
C1537
1UF/6.3V
C1536
1UF/6.3V
C1533
1UF/6.3V
C1534
1UF/6.3V

2
36OHM N/A N/A 36OHM
M_A_A8 X5R/10% X5R/10% X5R/10% X5R/10% N/A N/A N/A N/A
R1509 1 2 1% M_A_A8 4,16 4,16 M_A_ACT_N 1% 2 1 R1532
vx_c0402_small vx_c0402_small vx_c0402_small vx_c0402_small X5R/10% X5R/10% X5R/10% X5R/10%
36OHM N/A N/A 36OHM N/A N/A N/A N/A vx_c0402_small vx_c0402_smallvx_c0402_smallvx_c0402_small
R1510 1 2 1% M_A_A9 1% 2 1 R1534
M_A_A9 4,16 4,16 DDR0_A_PARITY
36OHM N/A
R1511 1 2 1% M_A_A10_AP +0.6VS
M_A_A10_AP 4,16
36OHM N/A
R1512 1 2 1% M_A_A11
M_A_A11 4,16
36OHM N/A 36OHM N/A +0.6VS +0.6VS +0.6VS
R1513 1 2 1% M_A_A12 R1536 1 2 1%
M_A_A12 4,16 4,16 M_A_DIM0_CK_DDR0_DN
36OHM N/A

1
R1514 1 2 1% M_A_A13
M_A_A13 4,16

1
C C1521 N/A N/A N/A N/A @ @ C
36OHM N/A 3300PF/25V C1511 C1515 C1539 C1540 C1524 C1525

2
R1515 1 2 1% M_A_A14_WE_N @ 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
M_A_A14_WE_N 4,16

2
36OHM N/A X5R/20% X5R/20% X5R/20% X5R/20% X5R/20% X5R/20%
36OHM N/A 4,16 M_A_DIM0_CK_DDR0_DP R1537 1 2 1% vx_c0603_small vx_c0603_small vx_c0603_small vx_c0603_small vx_c0603_small vx_c0603_small
R1516 1 2 1% M_A_A15_CAS_N
M_A_A15_CAS_N 4,16
36OHM N/A +1.2V
R1529 1 2 1% M_A_A16_RAS_N
M_A_A16_RAS_N 4,16

N/A
4,16 DDR0_A_ALERT_N 1% R1535 1 2 49.9Ohm

+0.6VS
R1.1 follow intel PDG

36OHM /CHB
4,17 M_B_DIM0_CS0_N R1554 1 2 1%
+0.6VS
36OHM /CHB 36OHM /CHB
R1555 1 2 1% M_B_A0 R1542 1 2 1%
M_B_A0 4,17 4,17 M_B_DIM0_CKE0 +0.6VS
36OHM /CHB
R1561 1 2 1% M_B_A1
M_B_A1 4,17
36OHM /CHB +0.6VS

CHB

1
B M_B_A2 B
R1563 1 2 1% M_B_A2 4,17 X5R/10% X5R/10% X5R/10% X5R/10%
C1520 C1518 C1519 C1517 C1516 C1514 C1513 C1512
36OHM /CHB /CHB 36OHM 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
R1540 1 2 1% M_B_A3 1% 2 1 R1518 X5R/10% X5R/10% X5R/10% X5R/10% /CHB /CHB /CHB /CHB
M_B_A3 4,17 4,17 M_B_BG1
vx_c0402_small vx_c0402_small vx_c0402_small vx_c0402_small vx_c0402_small vx_c0402_smallvx_c0402_smallvx_c0402_small
36OHM /CHB /CHB 36OHM
R1543 1 2 1% M_B_A4 1% 2 1 R1546 /CHB /CHB /CHB /CHB
M_B_A4 4,17 4,17 M_B_BG0
36OHM /CHB /CHB 36OHM
R1544 1 2 1% M_B_A5 1% 2 1 R1549
M_B_A5 4,17 4,17 M_B_BA0 +0.6VS +0.6VS +0.6VS
36OHM /CHB /CHB 36OHM
R1545 1 2 1% M_B_A6 1% 2 1 R1553
M_B_A6 4,17 4,17 M_B_BA1
36OHM /CHB /CHB 36OHM

1
R1548 1 2 1% M_B_A7 1% 2 1 R1560 /CHB /CHB /CHB /CHB @ @
M_B_A7 4,17 4,17 M_B_DIM0_ODT0
C1509 C1510 C1549 C1550 C1526 C1527
36OHM /CHB /CHB 36OHM 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V

2
R1552 1 2 1% M_B_A8 1% 2 1 R1558 X5R/20% X5R/20% X5R/20% X5R/20% X5R/20% X5R/20%
M_B_A8 4,17 4,17 M_B_ACT_N
vx_c0603_small vx_c0603_small vx_c0603_small vx_c0603_small vx_c0603_small vx_c0603_small
36OHM /CHB /CHB 36OHM
R1557 1 2 1% M_B_A9 1% 2 1 R1547
M_B_A9 4,17 4,17 DDR1_B_PARITY
36OHM /CHB
R1559 1 2 1% M_B_A10_AP
M_B_A10_AP 4,17 +0.6VS
36OHM /CHB +0.6VS
R1562 1 2 1% M_B_A11
M_B_A11 4,17
36OHM /CHB 36OHM /CHB

1
R1565 1 2 1% M_B_A12 R1538 1 2 1% X5R/10% X5R/10% X5R/10% X5R/10%
M_B_A12 4,17 4,17 M_B_DIM0_CK_DDR0_DN
C1543 C1541 C1547 C1548 C1545 C1544 C1546 C1542
36OHM /CHB 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
R1551 1 2 1% M_B_A13 X5R/10% X5R/10% X5R/10% X5R/10% /CHB /CHB /CHB /CHB
M_B_A13 4,17
1

vx_c0402_small vx_c0402_small vx_c0402_small vx_c0402_small vx_c0402_small vx_c0402_smallvx_c0402_smallvx_c0402_small


36OHM /CHB C1523
R1556 1 2 1% M_B_A14_WE_N /CHB /CHB /CHB /CHB
M_B_A14_WE_N 4,17 3300PF/25V
2

A @ A
36OHM /CHB 36OHM /CHB
R1550 1 2 1% M_B_A15_CAS_N R1541 1 2 1%
M_B_A15_CAS_N 4,17 4,17 M_B_DIM0_CK_DDR0_DP
36OHM /CHB
R1564 1 2 1% M_B_A16_RAS_N
M_B_A16_RAS_N 4,17

+1.2V

Title : DDR4(0)_Termination
/CHB PEGATRON PROPRIETARY AND CONFIDENTIAL

4,17 DDR1_B_ALERT_N 1% R1539 1 2 49.9Ohm BG1-HW3 RD Engineer:


Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 15 of 94
5 4 3 2 1
5 4 3 2 1

16 DDR4(1)_CH0
U1604
U1601 U1602 U1603
DDR4 +1.2V
M_A_D[0:63] 4 DDR4 +1.2V DDR4 +1.2V DDR4 +1.2V
256M x 16 (4Gbit)
M_A_A0 P3 B3
M_A_A0
256M x 16 (4Gbit) M_A_A0
256M x 16 (4Gbit) M_A_A0
256M x 16 (4Gbit) M_A_A1 A0 VDD_1
P3 B3 P3 B3 P3 B3 P7 B9
4,15 M_A_A0 M_A_A1 A0 VDD_1 M_A_A1 A0 VDD_1 M_A_A1 A0 VDD_1 M_A_A2 A1 VDD_2
P7 B9 P7 B9 P7 B9 R3 D1
4,15 M_A_A1 M_A_A2 A1 VDD_2 M_A_A2 A1 VDD_2 M_A_A2 A1 VDD_2 M_A_A3 A2 VDD_3
R3 D1 R3 D1 R3 D1 N7 G7
4,15 M_A_A2 M_A_A3 A2 VDD_3 M_A_A3 A2 VDD_3 M_A_A3 A2 VDD_3 M_A_A4 A3 VDD_4
N7 G7 N7 G7 N7 G7 N3 J1
4,15 M_A_A3 M_A_A4 A3 VDD_4 M_A_A4 A3 VDD_4 M_A_A4 A3 VDD_4 M_A_A5 A4 VDD_5
N3 J1 N3 J1 N3 J1 P8 J9
4,15 M_A_A4 M_A_A5 A4 VDD_5 M_A_A5 A4 VDD_5 M_A_A5 A4 VDD_5 M_A_A6 A5 VDD_6
P8 J9 P8 J9 P8 J9 P2 L1
4,15 M_A_A5 M_A_A6 A5 VDD_6 M_A_A6 A5 VDD_6 M_A_A6 A5 VDD_6 M_A_A7 A6 VDD_7
P2 L1 P2 L1 P2 L1 R8 L9
4,15 M_A_A6 M_A_A7 A6 VDD_7 M_A_A7 A6 VDD_7 M_A_A7 A6 VDD_7 M_A_A8 A7 VDD_8
R8 L9 R8 L9 R8 L9 R2 R1
4,15 M_A_A7 M_A_A8 A7 VDD_8 M_A_A8 A7 VDD_8 M_A_A8 A7 VDD_8 M_A_A9 A8 VDD_9
R2 R1 R2 R1 R2 R1 R7 T9
4,15 M_A_A8 M_A_A9 A8 VDD_9 M_A_A9 A8 VDD_9 M_A_A9 A8 VDD_9 M_A_A10_AP A9 VDD_10
R7 T9 R7 T9 R7 T9 M3
4,15 M_A_A9 M_A_A10_AP A9 VDD_10 M_A_A10_AP A9 VDD_10 M_A_A10_AP A9 VDD_10 M_A_A11 A10/AP
M3 M3 M3 T2 A1
4,15 M_A_A10_AP M_A_A11 A10/AP M_A_A11 A10/AP M_A_A11 A10/AP M_A_A12 A11 VDDQ_1
T2 A1 T2 A1 T2 A1 M7 A9
D
4,15 M_A_A11 M_A_A12 A11 VDDQ_1 M_A_A12 A11 VDDQ_1 M_A_A12 A11 VDDQ_1 M_A_A13 A12/BC_n VDDQ_2 D
M7 A9 M7 A9 M7 A9 T8 C1
4,15 M_A_A12 M_A_A13 A12/BC_n VDDQ_2 M_A_A13 A12/BC_n VDDQ_2 M_A_A13 A12/BC_n VDDQ_2 M_A_A14_WE_N A13 VDDQ_3
T8 C1 T8 C1 T8 C1 L2 D9
4,15 M_A_A13 M_A_A14_WE_N A13 VDDQ_3 M_A_A14_WE_N A13 VDDQ_3 M_A_A14_WE_N A13 VDDQ_3 M_A_A15_CAS_N WE_n/A14 VDDQ_4
L2 D9 L2 D9 L2 D9 M8 F2
4,15 M_A_A14_WE_N M_A_A15_CAS_N WE_n/A14 VDDQ_4 M_A_A15_CAS_N WE_n/A14 VDDQ_4 M_A_A15_CAS_N WE_n/A14 VDDQ_4 M_A_A16_RAS_N CAS_n/A15 VDDQ_5
M8 F2 M8 F2 M8 F2 L8 F8
4,15 M_A_A15_CAS_N M_A_A16_RAS_N CAS_n/A15 VDDQ_5 M_A_A16_RAS_N CAS_n/A15 VDDQ_5 M_A_A16_RAS_N CAS_n/A15 VDDQ_5 M_A_ACT_N RAS_n/A16 VDDQ_6
L8 F8 L8 F8 L8 F8 L3 G1
4,15 M_A_A16_RAS_N M_A_ACT_N RAS_n/A16 VDDQ_6 M_A_ACT_N RAS_n/A16 VDDQ_6 M_A_ACT_N RAS_n/A16 VDDQ_6 ACT_n VDDQ_7
L3 G1 L3 G1 L3 G1 G9
4,15 M_A_ACT_N ACT_n VDDQ_7 ACT_n VDDQ_7 ACT_n VDDQ_7 M_A_BA0 VDDQ_8 +2P5VPP
G9 G9 G9 N2 J2
M_A_BA0 N2 VDDQ_8 J2 +2P5VPP M_A_BA0 N2 VDDQ_8 J2 +2P5VPP M_A_BA0 N2 VDDQ_8 J2 +2P5VPP M_A_BA1 N8 BA0 VDDQ_9 J8
4,15 M_A_BA0 M_A_BA1 BA0 VDDQ_9 M_A_BA1 BA0 VDDQ_9 M_A_BA1 BA0 VDDQ_9 BA1 VDDQ_10
N8 J8 N8 J8 N8 J8
4,15 M_A_BA1 BA1 VDDQ_10 BA1 VDDQ_10 BA1 VDDQ_10 M_A_BG0
R1.4 0.1uf change 0.047uf M2 R1.4 0.1uf change 0.047uf
M_A_BG0 M2 M_A_BG0 M2 M_A_BG0 M2 BG0 B1
4,15 M_A_BG0 BG0 follow intel PDG BG0 R1.4 0.1uf change 0.047uf BG0 R1.4 0.1uf change 0.047uf DDR0_A_PARITY T3 VPP_1 follow intel PDG
B1 B1 B1 R9
DDR0_A_PARITY T3 VPP_1 R9 DDR0_A_PARITY T3 VPP_1 R9 follow intel PDG DDR0_A_PARITY T3 VPP_1 R9 follow intel PDG PAR VPP_2
4,15 DDR0_A_PARITY PAR VPP_2 PAR VPP_2 PAR VPP_2 M_A_DIM0_CS0_N L7 +V_DDR_VREFCA_CHA_DIMM
M_A_DIM0_CS0_N L7 +V_DDR_VREFCA_CHA_DIMM M_A_DIM0_CS0_N L7 +V_DDR_VREFCA_CHA_DIMM M_A_DIM0_CS0_N L7 +V_DDR_VREFCA_CHA_DIMM CS_n
4,15 M_A_DIM0_CS0_N CS_n CS_n CS_n M_A_DIM0_ODT0 K3 M1
M_A_DIM0_ODT0 K3 M1 M_A_DIM0_ODT0 K3 M1 M_A_DIM0_ODT0 K3 M1 ODT VREFCA
4,15 M_A_DIM0_ODT0 ODT VREFCA ODT VREFCA ODT VREFCA

1
M_A_DIM0_CKE0 K2

1
M_A_DIM0_CKE0 K2 M_A_DIM0_CKE0 K2 M_A_DIM0_CKE0 K2 CKE C1666
4,15 M_A_DIM0_CKE0 CKE CKE CKE M_A_DIM0_CK_DDR0_DP K7
C1647 C1648 C1676 0.047UF/16V

2
M_A_DIM0_CK_DDR0_DP K7 0.047UF/16V M_A_DIM0_CK_DDR0_DP K7 0.047UF/16V M_A_DIM0_CK_DDR0_DP K7 0.047UF/16V M_A_DIM0_CK_DDR0_DN K8 CK_t F9 DDR4_A_ZQ_67
4,15 M_A_DIM0_CK_DDR0_DP

2
M_A_DIM0_CK_DDR0_DN K8 CK_t F9 DDR4_A_ZQ_01 M_A_DIM0_CK_DDR0_DN K8 CK_t F9 DDR4_A_ZQ_23 M_A_DIM0_CK_DDR0_DNK8 CK_t F9 DDR4_A_ZQ_54 CK_c ZQ
4,15 M_A_DIM0_CK_DDR0_DN CK_c ZQ CK_c ZQ CK_c ZQ

1
1
DDR0_A_ALERT_NP9 R1604
ALERT_n

2
DDR0_A_ALERT_NP9 R1602 DDR0_A_ALERT_NP9 DDR0_A_ALERT_N P9 N9 240Ohm
4,15 DDR0_A_ALERT_N ALERT_n ALERT_n ALERT_n TEN
N9 240Ohm N9 R1603 N9 R1605
TEN RES 240 OHM 1/16W (0402) 1% TEN 240Ohm TEN 240Ohm M_A_D54 G2

2
M_A_D6 G2 M_A_D18 G2 RES 240 OHM 1/16W (0402) 1% M_A_D46 G2 RES 240 OHM 1/16W (0402) 1% M_A_D53 F7 DQ0

2
M_A_D1 F7 DQ0 M_A_D16 F7 DQ0 M_A_D44 F7 DQ0 M_A_D49 H3 DQ1

1
M_A_D2 H3 DQ1 M_A_D23 H3 DQ1 M_A_D43 H3 DQ1 M_A_D51 H7 DQ2
20161101 SWAP M_A_D5 H7 DQ2 20161101 SWAP M_A_D20 H7 DQ2 M_A_D41 H7 DQ2 20161101 SWAP M_A_D55 H2 DQ3
M_A_D7 H2 DQ3 M_A_D19 H2 DQ3 20161101 SWAP M_A_D47 H2 DQ3 M_A_D52 H8 DQ4
M_A_D4 H8 DQ4 M_A_D17 H8 DQ4 M_A_D40 H8 DQ4 M_A_D48 J3 DQ5 /DDP
M_A_D3 J3 DQ5 /DDP M_A_D22 J3 DQ5 /DDP M_A_D42 J3 DQ5 /DDP +1.2V M_A_D50 J7 DQ6 T7 R1627 2 1 0Ohm
+1.2V M_A_D0 J7 DQ6 T7 R1624 2 1 0Ohm +1.2V M_A_D21 J7 DQ6 T7 R1625 2 1 0Ohm +1.2V M_A_D45 J7 DQ6 T7 R1626 2 1 0Ohm DQ7 NC
DQ7 NC DQ7 NC DQ7 NC E7
E7 E7 E7 NF/LDM_n/LDBI_n
NF/LDM_n/LDBI_n NF/LDM_n/LDBI_n NF/LDM_n/LDBI_n M_A_DQS_DP6 G3
M_A_DQS_DP0 G3 M_A_DQS_DP2 G3 M_A_DQS_DP5 G3 4 M_A_DQS_DP6 M_A_DQS_DN6 F3 LDQS_t B2
4 M_A_DQS_DP0 M_A_DQS_DN0 F3 LDQS_t B2 4 M_A_DQS_DP2 M_A_DQS_DN2 F3 LDQS_t B2 4 M_A_DQS_DP5 M_A_DQS_DN5 F3 LDQS_t B2 4 M_A_DQS_DN6 LDQS_c VSS_1 E1 /DDP
4 M_A_DQS_DN0 LDQS_c VSS_1 4 M_A_DQS_DN2 LDQS_c VSS_1 4 M_A_DQS_DN5 LDQS_c VSS_1 VSS_2 A_MEM4_E9
E1 /DDP E1 /DDP E1 /DDP E9 R1614 1 2 240Ohm
VSS_2 E9 A_MEM1_E9 R1608 1 2 240Ohm VSS_2 E9 A_MEM2_E9 R1610 1 2 240Ohm VSS_2 E9 A_MEM3_E9 R1612 1 2 240Ohm M_A_D59 A3 VSS_3 G8
M_A_D11 A3 VSS_3 G8 M_A_D26 A3 VSS_3 G8 M_A_D34 A3 VSS_3 G8 M_A_D57 B8 DQ8 VSS_4 K1 /SDP
M_A_D13 B8 DQ8 VSS_4 K1 M_A_D24 B8 DQ8 VSS_4 K1 M_A_D32 B8 DQ8 VSS_4 K1 M_A_D62 C3 DQ9 VSS_5 K9 R1620 1 2 0Ohm
M_A_D15 C3 DQ9 VSS_5 K9 M_A_D31 C3 DQ9 VSS_5 K9 R1618 1 /SDP 2 0Ohm M_A_D38 C3 DQ9 VSS_5 K9 R1622 1 /SDP 2 0Ohm M_A_D61 C7 DQ10 VSS_6 M9
20161101 SWAP M_A_D12 C7 DQ10 VSS_6 M9 R1616 1
/SDP
2 0Ohm
20161101 SWAP M_A_D28 C7 DQ10 VSS_6 M9 M_A_D36 C7 DQ10 VSS_6 M9
20161101 SWAP M_A_D58 C2 DQ11 VSS_7 N1
M_A_D14 C2 DQ11 VSS_7 N1 M_A_D30 C2 DQ11 VSS_7 N1
20161101 SWAP M_A_D39 C2 DQ11 VSS_7 N1 M_A_D56 C8 DQ12 VSS_8 T1
M_A_D8 C8 DQ12 VSS_8 T1 M_A_D29 C8 DQ12 VSS_8 T1 M_A_D37 C8 DQ12 VSS_8 T1 M_A_D63 D3 DQ13 VSS_9
M_A_D10 D3 DQ13 VSS_9 M_A_D27 D3 DQ13 VSS_9 M_A_D35 D3 DQ13 VSS_9 +1.2V M_A_D60 D7 DQ14 A2
+1.2V M_A_D9 D7 DQ14 A2 +1.2V M_A_D25 D7 DQ14 A2 +1.2V M_A_D33 D7 DQ14 A2 DQ15 VSSQ_1 A8
C DQ15 VSSQ_1 A8 DQ15 VSSQ_1 A8 DQ15 VSSQ_1 A8 E2 VSSQ_2 C9
Colay C
E2 VSSQ_2 C9 E2 VSSQ_2 C9
Colay E2 VSSQ_2 C9
Colay NF/UDM_n/UDBI_n VSSQ_3 D2
NF/UDM_n/UDBI_n VSSQ_3 D2
Colay NF/UDM_n/UDBI_n VSSQ_3 D2 NF/UDM_n/UDBI_n VSSQ_3 D2 M_A_DQS_DP7 B7 VSSQ_4 D8
M_A_DQS_DP1 B7 VSSQ_4 D8 M_A_DQS_DP3 B7 VSSQ_4 D8 M_A_DQS_DP4 B7 VSSQ_4 D8 4 M_A_DQS_DP7 M_A_DQS_DN7 A7 UDQS_t VSSQ_5 E3
4 M_A_DQS_DP1 M_A_DQS_DN1 A7 UDQS_t VSSQ_5 E3 4 M_A_DQS_DP3 M_A_DQS_DN3 A7 UDQS_t VSSQ_5 E3 4 M_A_DQS_DP4 M_A_DQS_DN4 A7 UDQS_t VSSQ_5 E3 4 M_A_DQS_DN7 UDQS_c VSSQ_6 E8
4 M_A_DQS_DN1 UDQS_c VSSQ_6 4 M_A_DQS_DN3 UDQS_c VSSQ_6 4 M_A_DQS_DN4 UDQS_c VSSQ_6 VSSQ_7
E8 E8 E8 F1
VSSQ_7 F1 VSSQ_7 F1 VSSQ_7 F1 VSSQ_8 H1
VSSQ_8 H1 VSSQ_8 H1 VSSQ_8 H1 DDR4_DRAMRST_R_N P1 VSSQ_9 H9 M_A_BG1
DDR4_DRAMRST_R_N P1 VSSQ_9 H9 DDR4_DRAMRST_R_N P1 VSSQ_9 H9 M_A_BG1 DDR4_DRAMRST_R_N P1 VSSQ_9 H9 M_A_BG1 RESET_n VSSQ_10
4,17 DDR4_DRAMRST_R_N RESET_n VSSQ_10 M_A_BG1 4,15 RESET_n VSSQ_10 RESET_n VSSQ_10

1
C1651
1

1
C1605 C1604 C1655 0.1UF/16V MT40A256M16GE-083E
0.1UF/16V MT40A256M16GE-083E 0.1UF/16V MT40A256M16GE-083E 0.1UF/16V MT40A256M16GE-083E @

2
@ @ @
2

2
R1.1 follow intel PDG

+1.2V

+1.2V +1.2V
+1.2V
1

C1607 C1608 C1601


10UF/6.3V 10UF/6.3V 10UF/6.3V
1

1
N/A N/A N/A C1631 C1632 C1602 C1674 C1668 C1650
2

1
10UF/6.3V 10UF/6.3V 10UF/6.3V C1675 C1671 C1652 10UF/6.3V 10UF/6.3V 10UF/6.3V
N/A N/A N/A 10UF/6.3V 10UF/6.3V 10UF/6.3V N/A N/A N/A
2

2
N/A N/A N/A

2
1

C1611 C1615 C1613 C1616 C1612 C1614 C1699 C1698


1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
1

1
N/A N/A N/A N/A N/A N/A N/A N/A C1635 C1636 C1638 C1641 C1640 C1637 C1697 C1696 C1659 C1669 C1653 C1664 C1673 C1661 C1693 C1692
2

1
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V C1663 C1672 C1658 C1665 C1649 C1670 C1695 C1694 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
N/A N/A N/A N/A N/A N/A N/A N/A 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V N/A N/A
2

2
N/A N/A N/A N/A N/A N/A N/A N/A

2
N/A N/A N/A N/A N/A N/A
+2P5VPP

+2P5VPP +2P5VPP
+2P5VPP
1

C1628 C1627 C1626 C1691 C1690 C1689 C1688 C1617 C1618


0.1UF/16V 0.1UF/16V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V
1

1
N/A N/A N/A N/A N/A N/A N/A N/A N/A C1643 C1644 C1642 C1687 C1686 C1684 C1685 C1619 C1620 C1656 C1662 C1654 C1679 C1678 C1625 C1677 C1624 C1623
2

1
0.1UF/16V 0.1UF/16V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V C1660 C1667 C1657 C1683 C1682 C1680 C1681 C1621 C1622 0.1UF/16V 0.1UF/16V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V
N/A N/A N/A N/A N/A N/A N/A N/A N/A 0.1UF/16V 0.1UF/16V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V N/A N/A N/A
2

2
B N/A N/A N/A N/A N/A N/A N/A N/A N/A B

2
N/A N/A N/A N/A N/A N/A

A A

Title : DDR4(1)_CH0
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer:
Size Project Name Rev
D SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 16 of 94
5 4 3 2 1
5 4 3 2 1

17 DDR4(2)_CH1 19 +V_DDR_VREFCA_CHB_DIMM
+V_DDR_VREFCA_CHB_DIMM

U1703 U1704
M_B_D[63:0] 4
U1701 U1702
DDR4 +1.2V DDR4 +1.2V
DDR4 +1.2V DDR4 +1.2V 256M x 16 (4Gbit) 256M x 16 (4Gbit)
M_B_A0 P3 B3 M_B_A0 P3 B3
M_B_A0
256M x 16 (4Gbit) M_B_A0
256M x 16 (4Gbit) M_B_A1 A0 VDD_1 M_B_A1 A0 VDD_1
P3 B3 P3 B3 P7 B9 P7 B9
4,15 M_B_A0 M_B_A1 P7 A0 VDD_1 B9 M_B_A1 P7 A0 VDD_1 B9 M_B_A2 R3 A1 VDD_2 D1 M_B_A2 R3 A1 VDD_2 D1
4,15 M_B_A1 M_B_A2 R3 A1 VDD_2 D1 M_B_A2 R3 A1 VDD_2 D1 M_B_A3 N7 A2 VDD_3 G7 M_B_A3 N7 A2 VDD_3 G7
4,15 M_B_A2 M_B_A3 A2 VDD_3 M_B_A3 A2 VDD_3 M_B_A4 A3 VDD_4 M_B_A4 A3 VDD_4
N7 G7 N7 G7 N3 J1 N3 J1
4,15 M_B_A3 M_B_A4 N3 A3 VDD_4 J1 M_B_A4 N3 A3 VDD_4 J1 M_B_A5 P8 A4 VDD_5 J9 M_B_A5 P8 A4 VDD_5 J9
4,15 M_B_A4 M_B_A5 A4 VDD_5 M_B_A5 A4 VDD_5 M_B_A6 A5 VDD_6 M_B_A6 A5 VDD_6
P8 J9 P8 J9 P2 L1 P2 L1
4,15 M_B_A5 M_B_A6 P2 A5 VDD_6 L1 M_B_A6 P2 A5 VDD_6 L1 M_B_A7 R8 A6 VDD_7 L9 M_B_A7 R8 A6 VDD_7 L9
4,15 M_B_A6 M_B_A7 R8 A6 VDD_7 L9 M_B_A7 R8 A6 VDD_7 L9 M_B_A8 R2 A7 VDD_8 R1 M_B_A8 R2 A7 VDD_8 R1
4,15 M_B_A7 M_B_A8 A7 VDD_8 M_B_A8 A7 VDD_8 M_B_A9 A8 VDD_9 M_B_A9 A8 VDD_9
R2 R1 R2 R1 R7 T9 R7 T9
4,15 M_B_A8 M_B_A9 R7 A8 VDD_9 T9 M_B_A9 R7 A8 VDD_9 T9 M_B_A10_AP M3 A9 VDD_10 M_B_A10_AP M3 A9 VDD_10
4,15 M_B_A9 M_B_A10_AP A9 VDD_10 M_B_A10_AP A9 VDD_10 M_B_A11 A10/AP M_B_A11 A10/AP
M3 M3 T2 A1 T2 A1
4,15 M_B_A10_AP M_B_A11 T2 A10/AP A1 M_B_A11 T2 A10/AP A1 M_B_A12 M7 A11 VDDQ_1 A9 M_B_A12 M7 A11 VDDQ_1 A9
4,15 M_B_A11 M_B_A12 M7 A11 VDDQ_1 A9 M_B_A12 M7 A11 VDDQ_1 A9 M_B_A13 T8 A12/BC_n VDDQ_2 C1 M_B_A13 T8 A12/BC_n VDDQ_2 C1
D 4,15 M_B_A12 M_B_A13 A12/BC_n VDDQ_2 M_B_A13 A12/BC_n VDDQ_2 M_B_A14_WE_N A13 VDDQ_3 M_B_A14_WE_N A13 VDDQ_3 D
T8 C1 T8 C1 L2 D9 L2 D9
4,15 M_B_A13 M_B_A14_WE_N L2 A13 VDDQ_3 D9 M_B_A14_WE_N L2 A13 VDDQ_3 D9 M_B_A15_CAS_N M8 WE_n/A14 VDDQ_4 F2 M_B_A15_CAS_N M8 WE_n/A14 VDDQ_4 F2
4,15 M_B_A14_WE_N M_B_A15_CAS_N WE_n/A14 VDDQ_4 M_B_A15_CAS_N WE_n/A14 VDDQ_4 M_B_A16_RAS_N CAS_n/A15 VDDQ_5 M_B_A16_RAS_N CAS_n/A15 VDDQ_5
M8 F2 M8 F2 L8 F8 L8 F8
4,15 M_B_A15_CAS_N M_B_A16_RAS_N L8 CAS_n/A15 VDDQ_5 F8 M_B_A16_RAS_N L8 CAS_n/A15 VDDQ_5 F8 M_B_ACT_N L3 RAS_n/A16 VDDQ_6 G1 M_B_ACT_N L3 RAS_n/A16 VDDQ_6 G1
4,15 M_B_A16_RAS_N M_B_ACT_N L3 RAS_n/A16 VDDQ_6 G1 M_B_ACT_N L3 RAS_n/A16 VDDQ_6 G1 ACT_n VDDQ_7 G9 ACT_n VDDQ_7 G9
4,15 M_B_ACT_N ACT_n VDDQ_7 ACT_n VDDQ_7 M_B_BA0 VDDQ_8 +2P5VPP M_B_BA0 VDDQ_8 +2P5VPP
G9 G9 N2 J2 N2 J2
M_B_BA0 N2 VDDQ_8 J2 +2P5VPP M_B_BA0 N2 VDDQ_8 J2 +2P5VPP M_B_BA1 N8 BA0 VDDQ_9 J8 M_B_BA1 N8 BA0 VDDQ_9 J8
4,15 M_B_BA0 M_B_BA1 BA0 VDDQ_9 M_B_BA1 BA0 VDDQ_9 BA1 VDDQ_10 BA1 VDDQ_10
N8 J8 N8 J8 R1.4 0.1uf change 0.047uf
4,15 M_B_BA1 BA1 VDDQ_10 BA1 VDDQ_10 M_B_BG0 M2 M_B_BG0 M2
M_B_BG0 M_B_BG0 BG0 R1.4 0.1uf change 0.047uf BG0 follow intel PDG
M2 R1.4 0.1uf change 0.047uf M2 R1.4 0.1uf change 0.047uf B1 B1
4,15 M_B_BG0 BG0 B1 BG0 B1 DDR1_B_PARITY T3 VPP_1 R9 follow intel PDG DDR1_B_PARITY T3 VPP_1 R9
DDR1_B_PARITY T3 VPP_1 R9 follow intel PDG DDR1_B_PARITY T3 VPP_1 R9 follow intel PDG PAR VPP_2 PAR VPP_2
4,15 DDR1_B_PARITY PAR VPP_2 PAR VPP_2 M_B_DIM0_CS0_N +V_DDR_VREFCA_CHB_DIMM M_B_DIM0_CS0_N +V_DDR_VREFCA_CHB_DIMM
L7 L7
M_B_DIM0_CS0_N L7 +V_DDR_VREFCA_CHB_DIMM M_B_DIM0_CS0_N L7 +V_DDR_VREFCA_CHB_DIMM CS_n CS_n
4,15 M_B_DIM0_CS0_N CS_n CS_n M_B_DIM0_ODT0 K3 M1 M_B_DIM0_ODT0 K3 M1
M_B_DIM0_ODT0 K3 M1 M_B_DIM0_ODT0 K3 M1 ODT VREFCA ODT VREFCA
4,15 M_B_DIM0_ODT0

1
ODT VREFCA ODT VREFCA M_B_DIM0_CKE0 K2 M_B_DIM0_CKE0 K2
CKE CKE

1
M_B_DIM0_CKE0 K2 M_B_DIM0_CKE0 K2 /CHB C1745 /CHB C1756
4,15 M_B_DIM0_CKE0 CKE CKE M_B_DIM0_CK_DDR0_DP K7 M_B_DIM0_CK_DDR0_DP K7
/CHB C1711 /CHB C1705 0.047UF/16V 0.047UF/16V

2
M_B_DIM0_CK_DDR0_DP K7 0.047UF/16V M_B_DIM0_CK_DDR0_DP K7 0.047UF/16V M_B_DIM0_CK_DDR0_DN K8 CK_t F9 DDR4_B_ZQ_45 M_B_DIM0_CK_DDR0_DN K8 CK_t F9 DDR4_B_ZQ_67

2
4,15 M_B_DIM0_CK_DDR0_DP M_B_DIM0_CK_DDR0_DN CK_t DDR4_B_ZQ_01 M_B_DIM0_CK_DDR0_DN CK_t DDR4_B_ZQ_23 CK_c ZQ CK_c ZQ
K8 F9 K8 F9
4,15 M_B_DIM0_CK_DDR0_DN

1
CK_c ZQ CK_c ZQ

2
DDR1_B_ALERT_N P9 R1703 DDR1_B_ALERT_N P9

2
DDR1_B_ALERT_N P9 R1701 DDR1_B_ALERT_N P9 ALERT_n N9 /CHB 240Ohm ALERT_n N9 R1704
4,15 DDR1_B_ALERT_N ALERT_n N9 ALERT_n N9 TEN TEN
/CHB 240Ohm R1702 240Ohm
TEN TEN M_B_D38 G2 M_B_D55 G2
RES 240 OHM 1/16W (0402) 1% 20161101 SWAP 240Ohm 20161101 SWAP /CHB RES 240 OHM 1/16W (0402) 1%

2
M_B_D2 G2 M_B_D19 G2 /CHB RES 240 OHM 1/16W (0402) 1% M_B_D32 F7 DQ0 M_B_D48 F7 DQ0

1
M_B_D0 F7 DQ0 M_B_D21 F7 DQ0 M_B_D34 H3 DQ1 M_B_D50 H3 DQ1
Byte_6

1
M_B_D6 H3 DQ1 M_B_D18 H3 DQ1 M_B_D33 H7 DQ2 M_B_D49 H7 DQ2
20161101 SWAP DQ2 Byte_2 DQ2 Byte_4 20161101 SWAP DQ3 DQ3
M_B_D5 H7 M_B_D17 H7 M_B_D39 H2 M_B_D54 H2
M_B_D7 H2 DQ3 M_B_D23 H2 DQ3 M_B_D37 H8 DQ4 M_B_D52 H8 DQ4
M_B_D3 H8 DQ4 M_B_D20 H8 DQ4 M_B_D35 J3 DQ5 M_B_D51 J3 DQ5
Byte_0 DQ5 DQ5 DQ6
/DDP
DQ6
/DDP
M_B_D4 J3 /DDP M_B_D22 J3 /DDP +1.2V M_B_D36 J7 T7 R1719 2 1 0Ohm +1.2V M_B_D53 J7 T7 R1721 2 1 0Ohm
+1.2V M_B_D1 J7 DQ6 T7 R1705 2 1 0Ohm +1.2V M_B_D16 J7 DQ6 T7 R1714 2 1 0Ohm DQ7 NC DQ7 NC
DQ7 NC DQ7 NC E7 E7
E7 E7 NF/LDM_n/LDBI_n NF/LDM_n/LDBI_n
NF/LDM_n/LDBI_n NF/LDM_n/LDBI_n M_B_DQS_DP4 G3 M_B_DQS_DP6 G3
M_B_DQS_DP0 M_B_DQS_DP2 4 M_B_DQS_DP4 M_B_DQS_DN4 LDQS_t 4 M_B_DQS_DP6 M_B_DQS_DN6 LDQS_t
G3 G3 F3 B2 F3 B2
4 M_B_DQS_DP0 M_B_DQS_DN0 F3 LDQS_t B2 4 M_B_DQS_DP2 M_B_DQS_DN2 F3 LDQS_t B2 4 M_B_DQS_DN4 LDQS_c VSS_1 E1 4 M_B_DQS_DN6 LDQS_c VSS_1 E1
/DDP /DDP
4 M_B_DQS_DN0 LDQS_c VSS_1 E1 4 M_B_DQS_DN2 LDQS_c VSS_1 E1 VSS_2 E9 B_MEM3_E9 VSS_2 B_MEM4_E9 R1724 1
/DDP /DDP R1717 1 2 240Ohm E9 2 240Ohm
VSS_2 E9 B_MEM1_E9 R1706 1 2 240Ohm VSS_2 E9 B_MEM2_E9 R1711 1 2 240Ohm M_B_D46 A3 VSS_3 G8 M_B_D62 A3 VSS_3 G8
M_B_D15 A3 VSS_3 G8 M_B_D26 A3 VSS_3 G8 M_B_D45 B8 DQ8 VSS_4 K1 M_B_D56 B8 DQ8 VSS_4 K1
DQ8 VSS_4 DQ8 VSS_4 DQ9 VSS_5
/SDP 20161101 SWAP DQ9 VSS_5
M_B_D13 B8 K1 20161101 SWAP M_B_D29 B8 K1 Byte_5 20161101 SWAP M_B_D47 C3 K9 R1720 1 2 0Ohm M_B_D63 C3 K9 R1725 1 /SDP 2 0Ohm
M_B_D10 C3 DQ9 VSS_5 K9 M_B_D30 C3 DQ9 VSS_5 K9 R1712 1 /SDP 2 0Ohm M_B_D44 C7 DQ10 VSS_6 M9 M_B_D57 C7 DQ10 VSS_6 M9
DQ10 VSS_6
/SDP
DQ10 VSS_6 DQ11 VSS_7 Byte_7 DQ11 VSS_7
Byte_1 20161101 SWAP M_B_D12 C7 M9 R1708 1 2 0Ohm Byte_3 M_B_D24 C7 M9 M_B_D43 C2 N1 M_B_D59 C2 N1
M_B_D14 C2 DQ11 VSS_7 N1 M_B_D27 C2 DQ11 VSS_7 N1 M_B_D40 C8 DQ12 VSS_8 T1 M_B_D61 C8 DQ12 VSS_8 T1
M_B_D8 C8 DQ12 VSS_8 T1 M_B_D28 C8 DQ12 VSS_8 T1 M_B_D42 D3 DQ13 VSS_9 M_B_D58 D3 DQ13 VSS_9
M_B_D11 D3 DQ13 VSS_9 M_B_D31 D3 DQ13 VSS_9 +1.2V M_B_D41 D7 DQ14 A2 +1.2V M_B_D60 D7 DQ14 A2
+1.2V M_B_D9 D7 DQ14 A2 +1.2V M_B_D25 D7 DQ14 A2 DQ15 VSSQ_1 A8 DQ15 VSSQ_1 A8
DQ15 VSSQ_1 A8 DQ15 VSSQ_1 A8 E2 VSSQ_2 C9
Colay E2 VSSQ_2 C9
Colay
C E2 VSSQ_2 C9 E2 VSSQ_2 C9
Colay NF/UDM_n/UDBI_n VSSQ_3 D2 NF/UDM_n/UDBI_n VSSQ_3 D2 C
NF/UDM_n/UDBI_n VSSQ_3 D2
Colay NF/UDM_n/UDBI_n VSSQ_3 D2 M_B_DQS_DP5 B7 VSSQ_4 D8 M_B_DQS_DP7 B7 VSSQ_4 D8
M_B_DQS_DP1 VSSQ_4 M_B_DQS_DP3 VSSQ_4 4 M_B_DQS_DP5 M_B_DQS_DN5 UDQS_t VSSQ_5 4 M_B_DQS_DP7 M_B_DQS_DN7 UDQS_t VSSQ_5
B7 D8 B7 D8 A7 E3 A7 E3
4 M_B_DQS_DP1 M_B_DQS_DN1 A7 UDQS_t VSSQ_5 E3 4 M_B_DQS_DP3 M_B_DQS_DN3 A7 UDQS_t VSSQ_5 E3 4 M_B_DQS_DN5 UDQS_c VSSQ_6 E8 4 M_B_DQS_DN7 UDQS_c VSSQ_6 E8
4 M_B_DQS_DN1 UDQS_c VSSQ_6 E8 4 M_B_DQS_DN3 UDQS_c VSSQ_6 E8 VSSQ_7 F1 VSSQ_7 F1
VSSQ_7 F1 VSSQ_7 F1 VSSQ_8 H1 VSSQ_8 H1
VSSQ_8 H1 VSSQ_8 H1 DDR4_DRAMRST_R_N P1 VSSQ_9 H9 M_B_BG1 DDR4_DRAMRST_R_N P1 VSSQ_9 H9 M_B_BG1
DDR4_DRAMRST_R_N P1 VSSQ_9 H9 DDR4_DRAMRST_R_N P1 VSSQ_9 H9 M_B_BG1 RESET_n VSSQ_10 RESET_n VSSQ_10
4,16 DDR4_DRAMRST_R_N M_B_BG1 4,15

1
RESET_n VSSQ_10 RESET_n VSSQ_10 C1731 C1736
1

1
C1718 C1722 0.1UF/16V MT40A256M16GE-083E 0.1UF/16V MT40A256M16GE-083E
0.1UF/16V MT40A256M16GE-083E 0.1UF/16V MT40A256M16GE-083E @ /CHB @ /CHB

2
@ /CHB @ /CHB
2

2
R1.1 follow intel PDG

+1.2V +1.2V

+1.2V +1.2V
1

1
C1724 C1717 C1703 C1720 C1725 C1721
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V

1
/CHB /CHB /CHB /CHB /CHB /CHB C1755 C1747 C1730 C1754 C1751 C1732
2

2
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
/CHB /CHB /CHB /CHB /CHB /CHB

2
1

1
C1728 C1707 C1716 C1709 C1710 C1702 C1769 C1768 C1704 C1715 C1701 C1726 C1708 C1706 C1771 C1770
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

1
/CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB C1739 C1750 C1734 C1744 C1752 C1741 C1773 C1772 C1743 C1753 C1737 C1746 C1729 C1749 C1775 C1774
2

2
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
/CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB

2
+2P5VPP +2P5VPP

+2P5VPP +2P5VPP
1

1
C1719 C1712 C1723 C1799 C1798 C1796 C1797 C1795 C1794 C1714 C1727 C1713 C1793 C1792 C1790 C1791 C1789 C1788
0.1UF/16V 0.1UF/16V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V 0.1UF/16V 0.1UF/16V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V

1
/CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB C1735 C1742 C1733 C1787 C1786 C1784 C1785 C1783 C1782 C1740 C1748 C1738 C1781 C1780 C1778 C1779 C1777 C1776
2

2
0.1UF/16V 0.1UF/16V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V 0.1UF/16V 0.1UF/16V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V
/CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB /CHB

2
B B

A A

Title : DDR4(2)_CH0
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer:
Size Project Name Rev
D SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 17 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 18 of 94


5 4 3 2 1
5 4 3 2 1

19 DDR4(3)_CA/DQ Voltage +1.2V

+V_DDR_VREFCA_CHB_DIMM
+1.2V 4,7,15,16,17,57,83

+V_DDR_VREFCA_CHB_DIMM 17

+V_DDR_VREFCA_CHA_DIMM +V_DDR_VREFCA_CHA_DIMM 16

D D
+1.2V

2
R1912
1.8KOhm +V_DDR_VREFCA_CHA_DIMM
1%

1
R1910
1 2
4 +V_DDR_CA_VREF
2.7Ohm

1
10V220000434
C1903
0.022UF/16V R1911
2

1.8KOhm
1%

2
1

R1909
24.9Ohm
1%
2

+1.2V

2
R1907
C 1.8KOhm +V_DDR_VREFCA_CHB_DIMM C
1%

R1906 1
1 2
4 +V_DDR_VREFDQ02_CHB
2.7Ohm
1

10V220000434
C1902
0.022UF/16V R1908
2

1.8KOhm
1%
2
1

R1905
24.9Ohm
1%
2

B B

A A

Title : DDR4(3)_CA/DQ Voltage


BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 19 of 94
5 4 3 2 1
5 4 3 2 1

20 PCH(1)_SPI/LPC

D D

RF requirement
U0301E
RF requirement SPI - FLASH
SML1_CLK
SMBUS, SMLINK
SPI_CLK SPI_CLK AV2
28 SPI_CLK SPI_SO SPI0_CLK SMB_CLK
AW3 R7
28 SPI_SO SPI0_MISO GPP_C0/SMBCLK

1
SPI_SI AV3 R8 SMB_DAT
28 SPI_SI SPI_WP#_IO2 SPI0_MOSI GPP_C1/SMBDATA
AW2 R10 SMBALERT# 1 T2008 C2004
28 SPI_WP#_IO2 SPI0_IO2 GPP_C2/SMBALERT#
1

SPI_HOLD#_IO3 AU4 0.1UF/16V


28 SPI_HOLD#_IO3

2
C2003 SPI_CS#0 AU3 SPI0_IO3 R9 SML0_CLK_NFC 1 T2003
28 SPI_CS#0 SPI0_CS0# GPP_C3/SML0CLK @
0.1UF/16V T2011 1 SPI_CS1# AU2 W2 SML0_DAT_NFC 1 T2004
2

T2001 1 SPI_CS2# AU1 SPI0_CS1# GPP_C4/SML0DATA W1 SML0ALERT#


@ SPI0_CS2# GPP_C5/SML0ALERT# near W3
near AV2 W3 SML1_CLK
SPI - TOUCH GPP_C6/SML1CLK SML1_DAT SML1_CLK 28
V3 SML1_DAT 28 To EC
T2002 1 GPP_D1 M2 GPP_C7/SML1DATA AM7 SML1ALERT# 1 T2010
M3 GPP_D1/SPI1_CLK GPP_B23/SML1ALERT#/PCHHOT#
J4 GPP_D2/SPI1_MISO
FN_ID1 V1 GPP_D3/SPI1_MOSI
FN_ID2 V2 GPP_D21/SPI1_IO2
20170126 T2007 1 GPP_D0 M1 GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#
LPC
Reserver GPIO for function ID GPP_A1/LAD0/ESPI_IO0
AY13
BA13
LPC_AD0
LPC_AD1 LPC_AD0 30,44,62
C LINK GPP_A2/LAD1/ESPI_IO1 LPC_AD2 LPC_AD1 30,44,62
BB13 TPM
CL_CLK GPP_A3/LAD2/ESPI_IO2 LPC_AD3 LPC_AD2 30,44,62
G3 AY12 LPC_AD3 30,44,62 EC
53 CL_CLK CL_DATA CL_CLK GPP_A4/LAD3/ESPI_IO3 LPC_FRAME#
G2 BA12 DEBUG
+3VSUS 53 CL_DATA CL_RST# CL_DATA GPP_A5/LFRAME#/ESPI_CS# PM_SUS_STAT# LPC_FRAME# 30,44,62
G1 BA11
53 CL_RST# CL_RST# GPP_A14/SUS_STAT#/ESPI_RESET# PM_SUS_STAT# 62
Function ID AW13 AW9 CLK_KBCPCI_PCH_R
RCIN# R2001 1 2 22Ohm 1% CLK_KBCPCI_PCH 30
30 RCIN# GPP_A0/RCIN# GPP_A9/CLKOUT_LPC0/ESPI_CLK AY9 CLK_LPC1 R2002 1 /Debug 2 22Ohm 1%
INT_SERIRQ GPP_A10/CLKOUT_LPC1 CLK_DEBUG 44
AY11 AW11 R2014 1 /TPM 2 22Ohm 1%
30,44,62 INT_SERIRQ GPP_A6/SERIRQ GPP_A8/CLKRUN# LPCCLK_TPM 62
1

C C

1
R2015 R2017 C2001 C2002
10KOhm 10KOhm 10PF/50V 10PF/50V
947859
@ @ @ @

2
0101-03860PB
2

FN_ID2
PM_CLKRUN#
FN_ID1 PM_CLKRUN# 30,62
1

R2016 R2018
10KOhm 10KOhm
2

Unmount R2013,R2009
Vendor Suggest Pull High Resistor Need To Close To TPM
PM_CLKRUN#, INT_SERIRQ Need To Pull 10Kohm To+3VS at Chipset Side

R1.1 Not support AMT +3VS

PM_CLKRUN# R2013 1 2 10KOhm


+3VSUS
SMBALERT# - Internal weak pull down 20k ohm INT_SERIRQ R2009 1 2 10KOhm
R2004 1 @ 2 20KOhm SMBALERT# R2003 1 @ 2 2.2KOhm
TLS Confidentiality
0 : Disable (default)
1 : Enable +3VSUS

SMB_CLK RN2001A 1 2 @
2.2KOhm
B SMB_DAT B
RN2001B 3 4 @
+3VSUS 2.2KOhm
CRB 0.53 reserve 150k ohm SML0ALERT# - Internal weak pull down 20 kohm
R2006 1 @ 2 20KOhm SML0ALERT# R2005 1 @ 2 4.7KOhm
0 : LPC EC (default)
1 : eSPI EC SML1_DAT RN2002B 3 4
2.2KOhm
SML1_CLK RN2002A 1 2
2.2KOhm

+3VSUS
CRB 0.53 reserve 150k ohm BBS - Internal weak pull down 20k ohm
SML1ALERT# R2012 1 2 150KOhm
R2008 1 @ 2 20KOhm R2007 1 @ 2 4.7KOhm
Boot BIOS Strap
0 : SPI destination (default)
1 : LPC destination
BBS 21
MOW WW52
To enable Direct Connect Interface (DCI),
a 150K pull up resistor will need to be added to PCHHOT#
pin. This pin must be low during the rising edge of RSMRST#.

A A

Title : PCH(1)_SPI/LPC
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 20 of 94
5 4 3 2 1
5 4 3 2 1

Microsoft* Windows* 7 System WHCK Requirement – OEM platforms are

21 required to include a supported OS debug interface, accessible by an enduser.


This allows developers to help in driver debug. The supported
Windows 7 debug interfaces are EHCI, 1394 port and COM port. PCH(2)_ISH
With skylake EHCI Removal, Potential Gap with Windows* 7 Kernel Debug
and OS Installation – Mitigation Required

D D

U0301F
LPSS ISH R1.1 remove GPU
MEM_ID0 AN8
MEM_ID1 AP7 GPP_B15/GSPI0_CS# P2
MEM_ID2 AP8 GPP_B16/GSPI0_CLK GPP_D9 P3 TP_SENSOR_OFF#
GPP_B18 GPP_B17/GSPI0_MISO GPP_D10 TP_SENSOR_OFF# 31 Touch Pad
AR7 P4
GPP_B18/GSPI0_MOSI GPP_D11 P1
AM5 GPP_D12
GPP_B19/GSPI1_CS# D 3.3V GPIO
AN7 M4
T2117 1 GPP_B21 AP5 GPP_B20/GSPI1_CLK GPP_D5/ISH_I2C0_SDA N3
BBS AN5 GPP_B21/GSPI1_MISO GPP_D6/ISH_I2C0_SCL
20 BBS GPP_B22/GSPI1_MOSI N1 CPU_ID1 R1.1 remove GPU
PCH_UATR0_DEBUG_RX AB1 GPP_D7/ISH_I2C1_SDA N2 eMMC_ID
28 PCH_UATR0_DEBUG_RX PCH_UATR0_DEBUG_TX AB2 GPP_C8/UART0_RXD GPP_D8/ISH_I2C1_SCL
NO UART MUX 28 PCH_UATR0_DEBUG_TX GPP_C10 GPP_C9/UART0_TXD
T2111 1 W4 AD11
T2144 1 GPP_C11 AB3 GPP_C10/UART0_RTS# GPP_F10/I2C5_SDA/ISH_I2C2_SDA AD12
Reserve UART GPP_C11/UART0_CTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
For Debug Port WLAN_ON_PCH AD1
53 WLAN_ON_PCH BT_ON/OFF#_PCH GPP_C20/UART2_RXD C 3.3V GPIO TP_IRQ#
AD2 U1 Touch Pad
53 BT_ON/OFF#_PCH LCD_BKLTEN_PCH GPP_C21/UART2_TXD GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA BID_GPU TP_IRQ# 30,31
To implement UART for WIN7 WHCK requirement if need 3,45 LCD_BKLTEN_PCH AD3 U2
T2112 1 GPP_C23 AD4 GPP_C22/UART2_RTS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL U3
GPP_C23/UART2_CTS# GPP_D15/ISH_UART0_RTS# U4
Please refer to Intel document #548689 - RVP5 IOAC EC CTRL (X3 PCH CTRL) GPP_D16/ISH_UART0_CTS#/SML0BALERT#
I2C_SDA_SEN_S U7 AC1 OP_SD#
65 I2C_SDA_SEN_S GPP_C16/I2C0_SDA GPP_C12/UART1_RXD/ISH_UART1_RXD OP_SD# 36
Sensor Hub I2C_SCL_SEN_S U6 AC2 PCB_ID0
65 I2C_SCL_SEN_S GPP_C17/I2C0_SCL GPP_C13/UART1_TXD/ISH_UART1_TXD PCB_ID1
AC3
PCH_I2C1_SDA U8 GPP_C14/UART1_RTS#/ISH_UART1_RTS# AB4 MEM_ID3
31 PCH_I2C1_SDA GPP_C18/I2C1_SDA GPP_C15/UART1_CTS#/ISH_UART1_CTS#
Touch Pad PCH_I2C1_SCL U9
31 PCH_I2C1_SCL GPP_C19/I2C1_SCL AY8 MEM_CHA
I2C2_SDA_PCH AH9 GPP_A18/ISH_GP0 BA8 MEM_CHB
45 I2C2_SDA_PCH GPP_F4/I2C2_SDA GPP_A19/ISH_GP1
I2C2_SCL_PCH AH10 BB7 HDCP_ID
Touch Panel 45 I2C2_SCL_PCH GPP_F5/I2C2_SCL GPP_A20/ISH_GP2 PANEL_ID
BA7
AH11 GPP_A21/ISH_GP3 AY7 TOUCH_INT_CPU_R R2103 2 /TPANEL 1 0Ohm
C
GPP_F6/I2C3_SDA F 1.8V GPIO GPP_A22/ISH_GP4 TOUCH_RST#_CPU_R R2113 2 /TPANEL 1 0Ohm TOUCH_INT_CPU 45
C
AH12 AW7
GPP_F7/I2C3_SCL GPP_A23/ISH_GP5 TOUCH_RST#_CPU 45
AP13
AF11 Sx_EXIT_HOLDOFF#/GPP_A12/BM_BUSY#/ISH_GP6
20161212 R1.1 Kai AF12 GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL 20161227 R1.1 Kai
P21 ~ P23 / P65 +3VS
Add for I2C Touch panel
Add SHB & G-sensor in MB PANEL ID
I2C_SDA_SEN_S 947859
R2110 2 @ 1 10KOhm
I2C_SCL_SEN_S R2111 2 @ 1 10KOhm 0101-03860PB +3VSUS

20161222 R1.0 Kai


Add Touch panel +1.8VS

1
R2154
I2C2_SDA_PCH R2101 2 @ 1 10KOhm 10KOhm
I2C2_SCL_PCH R2102 2 @ 1 10KOhm
R1.1 change setting R1.2 change setting /14inch

2
PANEL_ID

1
+3VSUS
+3VSUS
Memory ID MB BD ID R2155

PCB ID +3VSUS +3VSUS


+3VSUS
10KOhm
/15inch

2
1

R2104 R2106 R2108 R2115 R2119 R2117

1
10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm

1
R2136 R2133 R2152
N/A N/A @ @ @ @ DIS 100KOhm 10KOhm R2148 R2150 10KOhm R2132
R1.1 remove GPU
2

/VGA /U42 10KOhm 10KOhm 10KOhm


MEM_ID0 2 /CHB_EN /HDCP2.2 @

2
PCB_ID1 MEM_ID1 eMMC_ID
B BID_GPU MEM_CHA B
PCB_ID0 MEM_ID2 HDCP_ID
CPU_ID1 MEM_CHB
MEM_ID3 +3VS
1

1
1

1
UMA R2147 R2134 R2149 R2151 R2153 R2135
R2105 R2107 R2109 R2116 R2120 R2118 100KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm
10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm /UMA /U22 /CHB_DIS
@ /HDCP1.4 N/A PCH_I2C1_SCL R2146 1 @ 2 2.2KOhm
2

2
@ @ @ @ @ @ PCH_I2C1_SDA R2145 1 @ 2 2.2KOhm
2

2
Change To 2.2Kohm PU side
Default PU +3V For S3 Resume by TP side

MEM_ID3 MEM_ID2 MEM_ID1 MEM_ID0


PCB_ID1 PCB_ID0 (GPP_C15) (GPP_B17) (GPP_B16) (GPP_B15) BID_GPU CPU_ID1 eMMC_ID
(GPP_C14) (GPP_C13) CHA CHB
HYNIX DDR4 2400 8Gb H5AN8G6NAFR-UHC 0 0 0 0 GPP_A18(0) Disable
R10 0 0 0315-01W60PB UMA 0 U22 0 disable 0 +3VS
GPP_A18(1) Enable GPP_B18 R2112 1 @ 2 4.7KOhm
MICRON DDR4 2400 4Gb MT40A256M16GE-083E:B 0 0 0 1 GPP_A19(0) Disable
R11 0 1 0315-01W80PB +3VSUS
DIS 1 U42 1 GPP_A19(1) Enable enable 1
R2122 1 @ 2 4.7KOhm
MICRON DDR4 2400 8Gb MT40A512M16JY-083E:B 0 0 1 0
R12 1 0 0315-01W90PB
HDCP_ID
SAMSUNG DDR4 2400 4Gb K4A4G165WE-BCRC 0 0 1 1 GSPI0_MOSI / GPP_B18 - Internal weak pull down 20k ohm
R20 1 1 0315-01VV0PB 0 : Disable No Reboot mode(default)
A A
1 : Enable NO Reboot Enable mode
1.4 0
HYNIX DDR4 2400 4Gb H5AN4G6NAFR-UHC 0 1 0 0
0315-01WM0PB Default is GPO, to reserve pull high to +3VSUS_ORG

SAMSUNG DDR4 2400 8Gb K4A8G165WB-BCRC 0 1 0 1 2.2 1


0315-01C80PB

HYNIX DDR4 2133 4Gb H5AN4G6NAFR-TF 0 1 1 0 Title : PCH(2)_ISH


0315-01EK0PB PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
MICRON/MT40A1G16WBU-083E:B 0 1 1 1
0315-01YC0PB Size Project Name Rev
C SU4EA 1.0
Date: Monday, March 20, 2017 Sheet 21 of 94
5 4 3 2 1
5 4 3 2 1

22 PCH(3)_HDA_SDIO
HDA_SDO_R
HDA_SDI0_R
HDA_SDI1
HDA_RST#_R

1
C2201 C2202 C2203 C2204
2PF/25V 2PF/25V 2PF/25V 2PF/25V
D D
NPO/+/-0.25PF NPO/+/-0.25PF NPO/+/-0.25PF NPO/+/-0.25PF

2
vx_c0201 vx_c0201 vx_c0201 vx_c0201
@

EMI request for Kaby Lake


GND

Recommended Routing : Stripline < 2"


Alternative Routing : Microstrip <1" (less noise-reduction)

HDA_SDI0 R2206 @ 33Ohm HDA_SDO_R


HDA_SDO R2207 @ 33Ohm HDA_SDI0_R U0301G

AUDIO
HDA_SYNC R2219 33Ohm
36 HDA_SYNC HDA_BCLK HDA_SYNC_R BA22
R2216 33Ohm
36 HDA_BCLK HDA_BCLK_R HDA_SYNC/I2S0_SFRM
AY22
HDA_SDO R2215 N/A 33Ohm HDA_SDO_R BB22 HDA_BLK/I2S0_SCLK
SDIO/SDXC
36 HDA_SDO HDA_SDI0 HDA_SDI0_R BA21 HDA_SDO/I2S0_TXD
R2220 N/A 33Ohm
36 HDA_SDI0
T2201 1 HDA_SDI1 AY21 HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD
AB11 LID_STAT0_C
LID_STAT0_C 65 20161220 R1.0 Kai
36 HDA_RST#
HDA_RST# R2217 33Ohm HDA_RST#_R AW22
HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0
AB13 LID_STAT1_C
LID_STAT1_C 65 P21 ~ P23 / P65
T2202 1 GPP_D23 J5
AY20 GPP_D23/I2S_MCLK GPP_G2/SD_DATA1
AB12
W12
LID_STAT2_C
LID_INI#_C LID_STAT2_C 65 Add SHB & G-sensor in MB
AW20 I2S1_SFRM GPP_G3/SD_DATA2 W11 SENSOR_INT_CPU LID_INI#_C 65
I2S1_TXD GPP_G4/SD_DATA3 G_X SENSOR_INT_CPU 65
W10
AK7 GPP_G5/SD_CD# W8 G_Y G_X 65
GPP_F1/I2S2_SFRM GPP_G6/SD_CLK SHB_RST#_CPU G_Y 65
AK6 W7
GPP_F0/I2S2_SCLK GPP_G7/SD_WP SHB_RST#_CPU 65
AK9
AK10 GPP_F2/I2S2_TXD BA9 TPanel_EN_R R2211 2 /TPANEL 1 0Ohm
TPanel_EN 45
GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_A16/SD_1P8_SEL
BB9
TPanel_ON 45 20161222 R1.0 Kai
H5 AB7 SKL_SD_RCOMP R2201 1 1% 2 200Ohm
Add Touch panel (TPanel_ON)
GPP_D19/DMIC_CLK0 SD_RCOMP
D7
GPP_D20/DMIC_DATA0 20161228 R1.0 Kai
C D8 AF13 RTC_IN# Add signale TPanel_EN C
GPP_D17/DMIC_CLK1 GPP_F23 RTC_IN# 24
C8
GPP_D18/DMIC_DATA1
HDA_SPKR SP22081 2 0Ohm SPKR AW5
36 HDA_SPKR GPP_B14/SPKR

947859
0101-03860PB

RF requirement +3VS
SPKR - Internal weak pull down
R2202 1 @ 2 20KOhm SPKR R2209 1 @ 2 4.7KOhm
0 : Disable TOP Swap mode (default)
HDA_BCLK 1 : Enable Top Swap Enable
+3VSUS
GND
R2210 1 @ 2 4.7KOhm Default is GPO, to reserve pull high to +3VSUS_ORG
1

C2205
22PF/50V
2

+3VSUS
CRB 0.53 reserve 150k ohm
1

R2203
4.7KOhm

@
2

B HDA_SDO_R B
D2201 2 1 1.2V/0.1A
PCH_FLASH_DESCRIPTOR 30

HDA_SDO - Internal weak pull down


FLASH DESCRIPTOR SECURITY OVERRRIDE
0 : Enable security measure defined in the Flash Descriptor
1 : Disable Flash Descriptor Security

* The signal has a weak internal Pull-down.


Name P5HCJ_KBL Description

GPP_B14 0 0 = Disable “Top Swap” mode. (Default)


1 = Enable “Top Swap” mode.

GPP_B18 0 0 = Disable “No Reboot” mode. (Default)


1 = Enable “No Reboot” mode

GPP_B22 0 0 = SPI (Default)


1 = LPC

GPP_C5 0 0 = LPC Is selected for EC. (Default)


1 = eSPI Is selected for EC.
0 = Enable security measures defined in the Flash
HDA_SDO 0 Descriptor. (Default)
1 = Disable Flash Descriptor Security (override).
0 = Disable Intel ME Crypto Transport Layer Security
A A
(TLS) cipher suite (no confidentiality). (Default)
GPP_C2 0 1 = Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality).

0 = Port B is not detected. (Default)


GPP_E19 0 1 = Port B is detected.
Title : PCH(3)_HDA/SDIO
GPP_E21 0
0 = Port C is not detected. (Default) PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
1 = Port C is detected.
From EDS_Intel_PCH(Skylake.UY_Kabylake.UY)_Vol1_545659_Rev2p0 Page.55-57 Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 22 of 94
5 4 3 2 1
5 4 3 2 1

23 PCH(4)_USB/PCIE/SATA
R1.1 remove GPU

U0301H
D D

SSIC / USB3
PCIE/USB3/SATA
H8 USB3_RXN1
USB3_1_RXN USB3_RXP1 USB3_RXN1 52
G8
USB3_1_RXP USB3_TXN1 USB3_RXP1 52
H13 C13 USB3.0 S/C
G13 PCIE1_RXN/USB3_5_RXN USB3_1_TXN D13 USB3_TXP1 USB3_TXN1 52
PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB3_TXP1 52
B17
A17 PCIE1_TXN/USB3_5_TXN J6 USB3_RXN2
PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_RXN USB3_RXP2 USB3_RXN2 52
H6
USB3_2_RXP/SSIC_RXP USB3_TXN2 USB3_RXP2 52
G11 B13 USB3.0
F11 PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_TXN A13 USB3_TXP2 USB3_TXN2 52
PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_TXP USB3_TXP2 52
D16
C16 PCIE2_TXN/USB3_6_TXN J10 USB3_RXN3
PCIE2_TXP/USB3_6_TXP USB3_3_RXN USB3_RXP3 USB3_RXN3 41
H10
USB3_3_RXP USB3_TXN3 USB3_RXP3 41
H16 B15 USB3.0 Type C
G16 PCIE3_RXN USB3_3_TXN A15 USB3_TXP3 USB3_TXN3 41
PCIE3_RXP USB3_3_TXP USB3_TXP3 41
D17
C17 PCIE3_TXN E10 USB3_RXN4
PCIE3_TXP USB3_4_RXN USB3_RXP4 USB3_RXN4 41
F10
USB3_4_RXP USB3_TXN4 USB3_RXP4 41
G15 C15 USB3.0 Type C
F15 PCIE4_RXN USB3_4_TXN D15 USB3_TXP4 USB3_TXN4 41
PCIE4_RXP USB3_4_TXP USB3_TXP4 41
B19
A19 PCIE4_TXN AB9
PCIE4_TXP USB2N_1 USB_PN1_30 52
AB10 USB3.0 S/C
PCIE_RXN5 USB2P_1 USB_PP1_30 52
F16
51 PCIE_RXN5 PCIE_RXP5 E16 PCIE5_RXN AD6
51 PCIE_RXP5 PCIE_TXN5 PCIE5_RXP USB2N_2 USB_PN2_30 52
51 PCIE_TXN5 C19 AD7 USB3.0
PCIE_TXP5 D19 PCIE5_TXN USB2P_2 USB_PP2_30 52
51 PCIE_TXP5 PCIE5_TXP AH3 USB30
PCIE_RXN6 USB2N_3 USB_PN3_TYPEC 41
G18 AJ3 USB3.0 Type C
51 PCIE_RXN6 PCIE_RXP6 F18 PCIE6_RXN USB2P_3 USB_PP3_TYPEC 41
51 PCIE_RXP6 PCIE_TXN6 PCIE6_RXP
51 PCIE_TXN6 D20 AD9
PCIE_TXP6 C20 PCIE6_TXN USB2N_4 AD10 USB_PN4_TYPEC 41
51 PCIE_TXP6 PCIE6_TXP USB2P_4 USB_PP4_TYPEC 41 USB3.0 Type C
PCIE_RXN7 F20 AJ1
M.2 SATA/PCIE x 4 -SSD 51 PCIE_RXN7 PCIE_RXP7 PCIE7_RXN/SATA0_RXN USB2N_5 USB_PN5_20 64
E20 AJ2 USB20 (IO BD)
51 PCIE_RXP7 PCIE_TXN7 PCIE7_RXP/SATA0_RXP USB2P_5 USB_PP5_20 64
C 51 PCIE_TXN7 B21 USB2 C
PCIE_TXP7 A21 PCIE7_TXN/SATA0_TXN AF6
51 PCIE_TXP7 PCIE7_TXP/SATA0_TXP USB2N_6 USB_PN6_BT 53
AF7 Bluetooth
SATA_RXN8 USB2P_6 USB_PP6_BT 53
G21
51 SATA_RXN8 SATA_RXP8 F21 PCIE8_RXN/SATA1A_RXN AH1
51 SATA_RXP8 SATA_TXN8 PCIE8_RXP/SATA1A_RXP USB2N_7 USB_PN7_CCD 45
51 SATA_TXN8 D21 AH2 Camera (EDP CONN)
SATA_TXP8 C21 PCIE8_TXN/SATA1A_TXN USB2P_7 USB_PP7_CCD 45
51 SATA_TXP8 PCIE8_TXP/SATA1A_TXP AF8
USB2N_8 USB_PN8_CR 64
E22 AF9 Card reader (IO BD)
53 PCIE_RXN_WLAN E23 PCIE9_RXN USB2P_8 USB_PP8_CR 64
53 PCIE_RXP_WLAN PCIE_TXN_WLAN_C PCIE9_RXP
WLAN 53 PCIE_TXN_WLAN 0.1UF/16V 1 2 C2322 B23 AG1
1 2 PCIE_TXP_WLAN_C A23 PCIE9_TXN USB2N_9 AG2 USB_PN9_FP 69
53 PCIE_TXP_WLAN 0.1UF/16V C2323 FingerPrinter
USB_PP9_FP 69
PCIE9_TXP USB2P_9
20161220 R1.1 Kai
F25
PCIE10_RXN USB2N_10
AH7 USB_PN10
P21 ~ P23 / P65
E25
D23 PCIE10_RXP USB2P_10
AH8 USB_PP10
Add SHB & G-sensor in MB
C23 PCIE10_TXN AB6 USBCOMP R2302 1 1% 2 113Ohm
PCIE10_TXP USB2_COMP USB2_ID_OTG
USB2_COMP PDG 1.0 R=113 +-1%
AG3 R2319 1 2 1KOhm MOW 5.1.3 If the platform does not support Dual Role, then
R2301 1 1% 2 100Ohm PCIE_RCOMPN F5 USB2_ID AG4 USB2_VBUSSENSE_OTG R2320 1 2 1KOhm
PCIE_RCOMPN USB2_VBUSSENSE USB2_ID pin shall be connected directly to GND.
PCIE_RCOMPP E5
PCIE_RCOMP PDG 0.9 need 100 ohm 0.1% / CRB 0.53 use 100 ohm +-1% PCIE_RCOMPP A9 OC0# R2308 1 2 0Ohm USB30 with USB Chager
1 PROC_PRDY# D56 GPP_E9/USB2_OC0# C9 1 2 USB_OC0#_PCH 52
T2323 OC1# R2309 0Ohm USB30
Reserve TP for XDP T2324 1 PROV_PREQ# D61 PROC_PRDY# GPP_E10/USB2_OC1# D9 OC2# R2310 1 2 0Ohm
USB_OC1#_PCH 52
USB20(IO BD)
PROC_PREQ# GPP_E11/USB2_OC2# USB_OC2#_PCH 64
PIRQA# BB11 B9 OC3# R2311 1 2 0Ohm
GPP_A7/PIRQA# GPP_E12/USB2_OC3# USB_OC3#_PCH 41 Type C
PCIE_RXN11_M2_SSD E28 J1 1 T2326
56 PCIE_RXN11_M2_SSD PCIE_RXP11_M2_SSD E27 PCIE11_RXN/SATA1B_RXN (OD)GPP_E4/DEVSLP0 J2 SATA_DEVSLP1
56 PCIE_RXP11_M2_SSD PCIE_TXN11_M2_SSD D24 PCIE11_RXP/SATA1B_RXP (OD)GPP_E5/DEVSLP1 J3 SATA_DEVSLP2 SATA_DEVSLP1 51 SATA SSD1
56 PCIE_TXN11_M2_SSD PCIE_TXP11_M2_SSD C24 PCIE11_TXN/SATA1B_TXN (OD)GPP_E6/DEVSLP2
SATA_DEVSLP2 51 SATA SSD2
56 PCIE_TXP11_M2_SSD SATA_RXN12_M2_SSD PCIE11_TXP/SATA1B_TXP
M.2 SATA/PCIE x 2 -SSD E30 H2 1 T2325
56 SATA_RXN12_M2_SSD SATA_RXP12_M2_SSD PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0 SATA_SSD1_PEDET
F30 H3
56 SATA_RXP12_M2_SSD SATA_TXN12_M2_SSD A25 PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1 G4 SATA_SSD2_PEDET SATA_SSD1_PEDET 51
56 SATA_TXN12_M2_SSD SATA_TXP12_M2_SSD PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2 SATA_SSD2_PEDET 51
56 SATA_TXP12_M2_SSD B25
PCIE12_TXP/SATA2_TXP H1 SATA_LED#
GPP_E8/SATALED#
If SATA driver need change port,
Also must change reltaed "DEVSLP and SATAXPCIE" pin 947859
20161227 R1.0 Kai +3VSUS
Add USB Hub connec to SHB / TPanel
B 0101-03860PB B

Co-lay USB Hub / TPanel


USB_PN10 R2303 1 @ 2 0Ohm OC3# 10KOhm 3 4 RN2301B
USB_PP10 USB_PN10_HUB 63
R2324 1 @ 2 0Ohm OC2# 10KOhm 7 8 RN2301D
USB_PP10_HUB 63 1 2 RN2301A
OC1# 10KOhm
R2325 1 @ 2 0Ohm OC0# 10KOhm 5 6 RN2301C
1 2 0Ohm USB_PN10_TP 45
R2326 @
USB_PP10_TP 45

+3VS

SATA_LED# R2304 1 2 10KOhm


@
PIRQA# R2318 1 2 10KOhm

Capture from 545659_545659_SKL_PCH_LP_EDS_Rev1_0_pub


Please refer the latest Doc.

A A

Title :PCH(4)_USB/PCIE/SATA
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 23 of 94
5 4 3 2 1
5 4 3 2 1

24 PCH(5)_CLK
+1.8VSUS

U0301I
VCCRTC is sourced from Vbatt in G3 or VCCDSW_3p3 in Non-G3 state,
platform designers must ensure the effective voltage at VCCRTC does not
D D
CSI-2 exceed 3.2V.

1
A36 C37 R2412
B36 CSI2_DN0 CSI2_CLKN0 D37 100KOhm
C38 CSI2_DP0 CSI2_CLKP0 C32 1%
D38 CSI2_DN1 CSI2_CLKN1 D32

2
C36 CSI2_DP1 CSI2_CLKP1 C29
D36 CSI2_DN2 CSI2_CLKN2 D29
A38 CSI2_DP2 CSI2_CLKP2 B26 RTC_IN# 22
B38 CSI2_DN3 CSI2_CLKN3 A26 +RTCBAT
CSI2_DP3 CSI2_CLKP3 R2418
C31 E13 CSI2_COMP 1 2
CSI2_DN4 CSI2_COMP

3
D31 B7 GPP_D4 1 T2417 +3VA Q2402 3
CSI2_DP4 GPP_D4/FLASHTRIG D
C33 2N7002
D33 CSI2_DN5 100Ohm
A31 CSI2_DP5 EMMC
11
RES 100 OHM 1/16W (0402) 1%
B31 CSI2_DN6 AP2 G
CSI2_DP6 GPP_F13/EMMC_DATA0 eMMC_D0 49 2 S
A33 AP1
eMMC_D1 49

2
CSI2_DN7 GPP_F14/EMMC_DATA1

1
B33 AP3
CSI2_DP7 GPP_F15/EMMC_DATA2 eMMC_D2 49
AN3 R2425 R2423 R2409
GPP_F16/EMMC_DATA3 eMMC_D3 49
A29 AN1 @ 0Ohm 1.5KOhm 10MOhm
B29 CSI2_DN8 GPP_F17/EMMC_DATA4 AN2 eMMC_D4 49
1%
CSI2_DP8 GPP_F18/EMMC_DATA5 eMMC_D5 49
C28 AM4
eMMC_D6 49

2
D28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM1
CSI2_DP9 GPP_F20/EMMC_DATA7 eMMC_D7 49 +RTC_AC
A27
B27 CSI2_DN10 AM2
CSI2_DP10 GPP_F21/EMMC_RCLK eMMC_RCLK 49 +VCC_RTC
C27 AM3
CSI2_DN11 GPP_F22/EMMC_CLK eMMC_CLK 49
D27 AP4 R2424
CSI2_DP11 GPP_F12/EMMC_CMD eMMC_CMD 49
45.3KOhm
AT1 EMMC_RCOMP R2420 1%
EMMC_RCOMP 1KOhm

1
1 @ 2
947859
R2419
0101-03860PB 200Ohm
D2401
RES 200 OHM 1/16W (0402) 1% 2 1 RB751V-40
2 0.37V/30mA
CON2401
C C
D2402 4
2 1 RB751V-40 +RTC_BAT R2405 1 2 1KOhm 2 SIDE2
2

1
0.37V/30mA 1
C2407 3 1
1UF/6.3V SIDE1

2
WtoB_CON_2P
12V17GISM030
P/N:1217-0105000

U0301J

CLOCK SIGNALS

+VCC_RTC
CLKOUT_PCIE_P/N[5:0] (PDG v1.3 Page420) D42
Any differential clock pair not being used must be left as no connect C42 CLKOUT_PCIE_N0
AR10 CLKOUT_PCIE_P0 R2403 1 2 20KOhm
GPP_B5/SRCCLKREQ0#
CLK_PCIE_SSD1#_PCH SP2405 1 2 CLK_PCIE_SSD1#_PCH_R B42 F43
51 CLK_PCIE_SSD1#_PCH CLK_PCIE_SSD1_PCH CLK_PCIE_SSD1_PCH_R CLKOUT_PCIE_N1 CLKOUT_ITPXDP_N
SP2406 1 2 A42 E43
51 CLK_PCIE_SSD1_PCH CLKOUT_PCIE_P1 CLKOUT_ITPXDP_P

1
CLK_REQ1_SSD1# SP2407 1 2 CLK_REQ1_SSD1#_R AT7
51 CLK_REQ1_SSD1# GPP_B6/SRCCLKREQ1#

1
BA17 SUSCLK_PCH 1 T2418 JRST2402 C2405

1
CLK_PCIE_SSD2#_PCH SP2408 1 2 CLK_PCIE_SSD2#_PCH_R D41 GPD8/SUSCLK SGL_JUMP 1UF/6.3V
51 CLK_PCIE_SSD2#_PCH CLK_PCIE_SSD2_PCH CLK_PCIE_SSD2_PCH_R CLKOUT_PCIE_N2 XTAL_24M_IN

2
SP2409 1 2 C41 E37 @
51 CLK_PCIE_SSD2_PCH

2
CLK_REQ2_SSD2# SP2410 1 2 CLK_REQ2_SSD2#_R AT8 CLKOUT_PCIE_P2 XTAL24_IN E35 XTAL_24M_OUT +VCCF24NS_1P0
51 CLK_REQ2_SSD2#

2
GPP_B7/SRCCLKREQ2# XTAL24_OUT 0.5%
D40 E42 XCLK_BIASREF R2417 1 2 2.71Kohm
C40 CLKOUT_PCIE_N3 XCLK_BIASREF
R1.1 remove GPU CLKOUT_PCIE_P3
R1.2 MB_Lesson learnt template
AT10 AM18 XTAL_32K_X1
GPP_B8/SRCCLKREQ3# RTCX1 AM20 XTAL_32K_X2
CLK_PCIE_WLAN#_PCH SP2412 1 2 CLK_PCIE_WLAN#_PCH_R B40 RTCX2
53 CLK_PCIE_WLAN#_PCH CLK_PCIE_WLAN_PCH CLK_PCIE_WLAN_PCH_R CLKOUT_PCIE_N4 SRTC_RST#
SP2413 1 2 A40 AN18 N/A
B 53 CLK_PCIE_WLAN_PCH CLK_REQ4_WLAN# CLK_REQ4_WLAN#_R CLKOUT_PCIE_P4 SRTCRST# RTC_RST# B
SP2414 1 2 AU8 AM16 R2455 1 2 0Ohm R2404 1 2 20KOhm
53 CLK_REQ4_WLAN# GPP_B9/SRCCLKREQ4# RTCRST#
E40
E38 CLKOUT_PCIE_N5
CLKOUT_PCIE_P5

1
AU7 C2406
GPP_B10/SRCCLKREQ5#

3
Q2401 3 JRST2401 1UF/6.3V C2409

1
D
2N7002 SGL_JUMP 0.1UF/16V

2
2
@
SRCCLKREQ#[5:0] (PDG v1.3 Page 835) 30 SW_RTCRST R2406 1 2 0Ohm 11 @
947859
Any un-used, disabled, must be left as no connects at the PCH side on the platform.

2
G
Any used, enabled, should connect to a PCIe* connector pin or a device down ball 0101-03860PB 2 S

需需GND

2
1
with a 10K Ohm ±10% external pull-up resistor to core rail.
24MHz signal R2407
Ball E37 10KOhm
XTAL_24M_IN R2432 /U22 0Ohm

2
CLK_REQ4_WLAN#_R R2429 1 2 10KOhm
+3VSUS
R2408 1 @ 2 10KOhm
+3VS
R2411 1 2 10KOhm
@ Ball E35
XTAL_24M_OUT R2433 /U22 0Ohm

XTAL_32K_X1
XTAL_32K_X2

R1.1 remove GPU R2401 1MOhm R2402 10MOhm


2 1 2 1

/U22
2

2
CLK_REQ2_SSD2#_R R2414 1 2 10KOhm SP2401 SP2402
+3VS
0Ohm 0Ohm
R2416 1 2 10KOhm
@
A A
1

1
X2401
24MHZ X2402
3 1 1 2
XTAL_24M_OUT_R

XTAL_32K_X1_R
CLK_REQ1_SSD1#_R R2430 1 2 10KOhm
+3VS
R2431 1 2 10KOhm 32.768KHZ
@
4

07V080000075
/U22 2015.11.23
+/-20ppm/9PF
R1.1
Vendor suggestion 7PF
Title :PCH(5)_CLK
1

/U22 C2402 /U22 C2401 C2404 C2403 PEGATRON PROPRIETARY AND CONFIDENTIAL
10PF/50V 10PF/50V 7PF/50V 7PF/50V BG1-HW3 RD Engineer: James_Liao
2

Size Project Name Rev


C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 24 of 94
5 4 3 2 1
5 4 3 2 1

25 PCH(6)_POWER MANAGE
In Table 42-1 of PDG (#561280, Rev1p0)
PROCPWRGD is PCH to CPU, but KBL-U don't has this pin at CPU side. U0301K
we assume it's conted in MCP package.
So follow CRB to reserve TP only. SYSTEM POWER MANAGEMENT
D SLP_S0# D
AT11 1 T2503
GPP_B12/SLP_S0# AP15 PM_SUSB#
PLT_RST# AN10 GPD4/SLP_S3# BA16 PM_SUSC#
PM_SYS_RESET#_R B5 GPP_B13/PLTRST# GPD5/SLP_S4# AY16 GPD10 1 T2504
SP2501 1 2 PM_RSMRST_R AY17 SYS_RESET# GPD10/SLP_S5#
30 PM_RSMRST# RSMRST# SLP_SUS#
AN15 1 T2510 If Deep Sx is not implemented on the platform, this signal may be left as no connect
T2501 1 H_CPUPWRGD_TP R2503 1 @ 2 1KOhm H_CPUPWRGD A68 SLP_SUS# AW15 SLP_LAN# 1 T2505
VCCST_PWRGD_CPU B65 PROCPWRGD SLP_LAN# BB17 SLP_WLAN# 1 T2506
VCCST_PWRGD GPD9/SLP_WLAN# AN16 ME_PM_SLP_M#_PCH 1 T2507
SYS_PWROK_PCH B6 GPD6/SLP_A#
ALL_SYS_PWRGD delay 99 ms from EC 30 SYS_PWROK_PCH PCH_PWROK_PCH BA20 SYS_PWROK BA15
PM_RSMRST_R PCH_DPWROK PCH_PWROK GPD3/PWRBTN# AC_PRESENT_R PM_PWRBTN# 30
R2506 1 2 0Ohm BB20 AY15 R2532 1 2 0Ohm
DSW_PWROK GPD1/ACPRESENT ME_AC_PRESENT 30
AU13 BATLOW#
T2513 1 SUS_PWR_ACK_R AR13 GPD0/BATLOW#
SUS_PWR_ACK_R R2509 1 2 0Ohm SUSACK#_R AP11 GPP_A13/SUSWARN#/SUSPWRDNACK
DSW function / non-AMT T2512 1 SUSACK# R2510 1 @ 2 0Ohm GPP_A15/SUSACK# AU11 PME#
BB15 GPP_A11/PME# AP16 SM_INTRUDER#
53 WAKE_PCIE# LAN_WAKE# WAKE# INTRUDER#
T2511 1 AM15
T2502 1 GPD11 AW17 GPD2/LAN_WAKE# AM10 MPHY_EXT_PWR_GATEB_R 1 T2509
T2508 1 GPD7 AT15 GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE# AM11 VR_ALERT# internal pull high
GPD7/RSVD GPP_B2/VRALERT#
PCH_PWROK logic
947859
0101-03860PB SLP_S3# and SLP_S4# logic

PM_SUSB#
+3VSUS PM_SUSB# 30
R2531 1 @ 2 0Ohm R1.2 MB_Lesson learnt template
30,92 ALL_SYSTEM_PWRGD
R2502 1 2 0Ohm
U2502
SP2506 1 2 ALL_SYSTEM_PWRGD_PMOK 1 A 5
30 DELAY_ALL_SYSTEM_PWRGD VCC
30,57,91,92 SUSB_EC#
D2501 1 2 RB751V-40 VR_READY_PMOK 2 B
80,92 VRM_PWRGD
20161227 R1.1 Kai
PLT_RST# D2502 1 2 RB751V-40
3
GND
Y
4 PM_PWROK R2505 1 N/A 2 0Ohm PCH_PWROK_PCH
Correct location
C C
Vcc=2~5.5

1
PM_SUSC#
PM_SUSC# 30
R2517 1 @ 2 0Ohm R2519 @ C2516
10KOhm 0.1UF/16V

2
1
R2504 1 2 0Ohm

2
R2554
100KOhm
+3VSUS 30,57,91 SUSC_EC#
N/A GND

2
U2504 For Intel power sequence requestment
R2544 1 2 DE_ALL_SYS_PGD_EC_R 1 A 5
30 DE_ALL_SYS_PGD_EC VCC ALL_SYS_PWRGD to Delay_ALL_SYS_PGD >2ms
PM_SUSB# 2 B GND
Delay By EC(2ms+ EC processing time (3ms~33ms) +3VSUS
3 4
GND DE_ALL_SYS_PGD_HW 30
Y
1

Vcc=2~5.5 BATLOW# R2522 1 2 10KOhm


1

R2545
@ 100KOhm C2540
10V240000005 0.1UF/16V LAN_WAKE# R2523 1 2 10KOhm
For shut down Sequence
2

@
Tplt17 < 1us
2

GPD7 R2524 1 2 10KOhm

+3V R1.2 MB_Lesson learnt template WAKE_PCIE# R2525 1 2 1KOhm


SYS_PWROK logic
AC_PRESENT_R R2526 1 2 10KOhm
U2501 @
1 5
PLT_RST# 2 A VCC
3 B 4
GND Y BUF_PLT_RST# 30,32,49,51,53,62

1
SN74LVC1G08DCKR

1
+3VSUS C2502 GND +VCC_RTC
B B
U2505 100PF/50V C2541 C2503 R2516
PM_SUSB# 1 A 5 @ R2515 1 N/A 2 0Ohm 0.1UF/16V 100PF/50V 10KOhm SM_INTRUDER# R2513 1 2 1MOhm
2

2
VCC
@

2
R2546 1 2 2 B @
30 SYS_PWROK_EC
3 4 SYS_PWROK_AND R2548 1 2 SYS_PWROK_PCH GND GND GND GND
GND +3VSUS
Y
Vcc=2~5.5
1

R2547 internal pull high PME# R2527 1 @ 2 10KOhm


@ 100KOhm
10V240000005
VR_ALERT# R2528 1 @ 2 10KOhm
Set to GPI
2

+3VSUS
PM_SYS_RESET#_R R2501 1 N/A 2 10KOhm
VCCST_PWRGD logic +1.0V

R1.1 mount
1

1
C2504 R2520
U2503
0.1UF/16V 1KOhm
2

1 NC 5
VCC
2

DELAY_ALL_SYSTEM_PWRGD R2529 1 2 H_VCCST_PWRGD_L 2 A


ALL_SYSTEM_PWRGD R2530 1 @ 2 0Ohm 3 Y 4 VCCST_PWRGD_CPU_R R2553 1 2 0Ohm R2521 1 1% 2 60.4Ohm VCCST_PWRGD_CPU
GND
1

74AUP1G07GW C2505 N/A


06V030000021 0.1UF/16V
+VDDQ/+VCCST_CPU/+VCCSTG to VCCST_PWRGD must > 1ms
2

A A

Title :PCH(6)_POWER MANAGE


PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 25 of 94
5 4 3 2 1
5 4 3 2 1

26 PCH(7)_POWER
+1.0VSUS
+VCCMPHYGTAON_1P0_LS_SIP +3VSUS_ORG

4A R2640 1 2 0Ohm 2A +VCCSRAM_1P0

S1V080500001
R2637 1 2 0Ohm 0.642A
+VCCAMPHYPLL_1P0
S1V080500001
D D
R2638 1 2 0Ohm 0.088A
+VCCAPLLEBB_1P0
S1V040200001
R2639 1 2 0Ohm 0.033A
PCIe Gen3 Lane X10 vx_c0402_small

1
USB3 Port X3 C2613 1 2 1UF/6.3V
+1.0VSUS_ORG @ C2628 near Y16
All HSIO disabled (basic comsunption)
0.1UF/16V =0.154x10+0.132x3+0.064

2
=2 A
1

C2601
near AB19 1UF/6.3V
vx_c0402_small
2

R1.2 MB_Lesson learnt template vx_c0402_small


C2614 1 2 1UF/6.3V +1.8VSUS_ORG
near T16
+VCCPRIM_CORE

R1.2 MB_Lesson learnt template


1

C2602
near AF18 1UF/6.3V
vx_c0402_small U0301O +1.0VSUS_ORG
2

+3VSUS_ORG
CPU POWER 4 OF 4

0.696A AB19
VCCPRIM_1P0_1

2
AB20 AK15 0.02A R2650
VCCPRIM_1P0_2 VCCPGPPA

2
+1.0VSUS_ORG P18 AG15 0.004A C2646 +V1.8A_SIP +1.8VSUS_ORG
VCCPRIM_1P0_3 VCCPGPPB R2624
Y16 0.006A
2.574A AF18 VCCPGPPC Y15 0.008A 0Ohm 0.1UF/16V 2 1

1
AF19 VCCPRIM_CORE_1 VCCPGPPD T16
Decoupling cap for internal power 0.006A

1
VCCPRIM_CORE_2 VCCPGPPE
1

V20 AF16 0.161A @ 0Ohm +3VSUS_ORG


VCCPRIM_CORE_3 VCCPGPPF

1
near K17 C2603 +VCCDSW_1P0 C2604 1 2 1UF/6.3V V21 AD15 0.0041A S1V040200001
VCCPRIM_CORE_4 VCCPGPPG C2615
1UF/6.3V
2

vx_c0402_small AL1 V19 0.075A 1UF/6.3V

2
DCPDSW_1p0 VCCPRIM_3p3_2

1
C near AL1 C
0.022A K17 T1 0.696A near AA1 C2625 C2617 C2618
+VCCMPHYGTAON_1P0_LS_SIP L1 VCCMPHYAON_1P0_1 VCCPRIM_1P0_7
1UF/6.3V 1UF/6.3V 1UF/6.3V

2
VCCMPHYAON_1P0_2 AA1
2A VCCATS_1p8 0.006A near AK17 near AK17 near AK17
N15
N16 VCCMPHYGT_1P0_1 AK17
VCCMPHYGT_1P0_2 VCCRTCPRIM_3p3 0.001A
1

N17 C2634 1 2 1UF/6.3V


VCCMPHYGT_1P0_3 GND +VCC_RTC
C2605 C2606 P15 AK19 near AK19
47UF/6.3V +VCCAMPHYPLL_1P0 P16 VCCMPHYGT_1P0_4 VCCRTC_1 BB14
1UF/6.3V 0.001A
2

@ VCCMPHYGT_1P0_5 VCCRTC_2
near N15 near N15 0.088A K15 BB10 VCCRTCEXT C2620 1 2 1UF/6.3V C2619 1 2 1UF/6.3V +VCC19P2_1P0 +1.0VSUS_ORG
VCCAMPHYPLL_1P0_1 DCPRTC GND GND R2627
L15 near BB10 near AK19
VCCAMPHYPLL_1P0_2 A14 2 1
R1.2 MB_Lesson learnt template VCCCLK1 0.035A
1

C2607 +VCCAPLL_1P0_SOC 0.026A V15


1UF/6.3V +1.0VSUS_ORG VCCAPLL_1P0 K19 0Ohm
near K15 VCCCLK2 0.029A
vx_c0402_small R2648 1 2 0Ohm 0.696A AB17 S1V040200001 +1.0VSUS_ORG
2

@ Y18 VCCPRIM_1P0_4 L21 +VCCF100_1P0


VCCPRIM_1P0_5 VCCCLK3 0.024A R2628
+VCCPDSW_3P3 C2644 1 2 0.1UF/16V
0.118A AD17 N20 0.033A 2 1
AD18 VCCDSW_3p3_1 VCCCLK4
AJ17 VCCDSW_3p3_2 L19 0Ohm
VCCDSW_3p3_3 VCCCLK5 0.004A
S1V040200001
+VCCPAZIO_SOC 0.068A AJ19 A10 0.0039A +VCCF135_1P0 +1.0VSUS_ORG
+3VSUS_ORG VCCHDA VCCCLK6 R2629
0.011A AJ16 AN11 2 1
+VCCSRAM_1P0 VCCSPI GPP_B0/CORE_VID0 AN13
AF20 GPP_B1/CORE_VID1 0Ohm
0.642A VCCSRAM_1P0_1

1
AF21 S1V040200001
C2610 1 21UF/6.3V T19 VCCSRAM_1P0_2 R2646 R2647 +VCCF100OC_1P0 +1.0VSUS_ORG
+3VSUS_ORG T20 VCCSRAM_1P0_3 R2630
vx_c0402_small 1KOhm 1KOhm
VCCSRAM_1P0_4 2 1
R1.2 MB_Lesson learnt template near AF20
0.075A AJ21

2
+1.0VSUS_ORG VCCPRIM_3p3_1 0Ohm
1

+VCCAPLLEBB_1P0 R2649 1 2 0Ohm 0.696A AK20 S1V040200001


C2611 C2645 1 2 0.1UF/16V VCCPRIM_1P0_6 +VCCF24NS_1P0 +1.0VSUS_ORG
near V19 R2631
1UF/6.3V @ 0.033A N18
2

vx_c0402_small VCCAPLLEBB_1P0 2 1
Intel confirm pull down 1k
1

B B
C2612 0Ohm
947859
near N18 1UF/6.3V S1V040200001
2

0101-03860PB +VCC24TBT_1P0 +1.0VSUS_ORG


R2632
2 1

0Ohm

1
near A10 S1V040200001
C2624
1UF/6.3V

2
+1.0VSUS +VCCAPLL_1P0 +3VSUS +3VSUS_ORG vx_c0402_small
R2601
09V010000096
R2604 1 2 0Ohm B2601 2 1 75OHM +VCCAPLL_1P0_SOC 1 2 0.5A
1

C2608 C2636 C2640 C2641 S1V040200001


0Ohm
47uF/6.3V 0.1UF/16V 2PF/25V 2PF/25V R1.1 USB short mount
2

@ NPO/+/-0.25PF NPO/+/-0.25PF near V15 +1.0VSUS +1.0VSUS_ORG


R2603
2

vx_c0201 vx_c0201
1 2 1A
@
S1V060300001 R2636 1 2 0Ohm
0Ohm
+VCCPAZIO GND +1.8VSUS +1.8VSUS_ORG
+3VSUS R2605
Q2601
09V010000096
+VCCPAZIO_SOC
1 2 0.5A +3VSUS PJA3411 +VCCPDSW_3P3
R2602 1 2 0Ohm B2602 2 1 75OHM
S1V040200001 3 2

D 3

S
0Ohm
1

2
S1V040200001 C2642 C2643
C2609 C2637 2PF/25V 2PF/25V

G
1
1UF/10V 0.1UF/16V NPO/+/-0.25PF NPO/+/-0.25PF near AJ19
2

1
@ vx_c0201 vx_c0201

1
R2635

B1 2

C2 3
GND E1 1 100KOhm
A EMI request for Kaby Lake Q2602 N/A A
BC856BS

2
Recommended Routing : Stripline < 2" N/A
6 C1

5 B2

Alternative Routing : Microstrip <1" 4 E2


(less noise-reduction)
1

R2634 Title :PCH(7)_POWER


100KOhm PEGATRON PROPRIETARY AND CONFIDENTIAL

N/A BG1-HW3 RD Engineer: James_Liao


2

Size Project Name Rev


C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 26 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 27 of 94


5 4 3 2 1
5 4 3 2 1

28 PCH(9)_SPI_SMB

+3VM_SPI
D 55mA D

R2802 1 2 0Ohm
+3VSUS

R2830 1 2 0Ohm
+3VA
@

+3VM_SPI

1
+3VM_SPI
15WW06 MOW Pull-up Resistors on SPI_IO2 and SPI_IO3 are no longer needed

1
R2813
C2801 @ 1KOhm
0.1UF/16V

2
FAE: 2015/10/14

2
1

1
R2820 1 2 1KOhm
R2811 R2812 @
1KOhm @ @ 3.3KOhm
R2805 1 2 33Ohm
20 SPI_WP#_IO2 1 2 33Ohm 1 2 33Ohm
R2806 R2814
20 SPI_SO SPI_HOLD#_IO3 20
2

2
R2807 1 2 33Ohm R2815 1 2 33Ohm
20 SPI_CS#0 SPI_CLK 20
U2801 R2816 1 2 33Ohm
1 2 33Ohm SPI1_CS#0 1 8 SPI_SI 20
R2808
30 F_CS#_EC SPI1_SO CS# VCC SPI1_HOLD#
R2809 1 2 33Ohm 2 7
30 F_SDIO_EC SPI1_WP# 3 DO(IO1) HOLD#(IO3) 6 SPI1_CLK 1 2 33Ohm
R2818
WP#(IO2) CLK SPI1_SI F_SCK_EC 30
4 5 R2819 1 2 33Ohm
GND DI(IO0) F_SDI_EC 30
W25Q64FVSSIQ
C 05V000000025 C
R2821 1 2 3KOhm
+3VM_SPI
+3VM_SPI
WW48MOW(ES Sample)
/Debug In Skylake Platform Design Guides (PDG) under “Platform Debug & Test Hooks”
CON2810
1 chapter, HOOK[3] pin from XDP/CMC header needs to be routed to PCH SPI0_MOSI
PCH_UATR0_DEBUG_TX 2 1 13 pin. The termination resistor can be a value from 1K to 3K ohm pull up to Always rail
21 PCH_UATR0_DEBUG_TX 2 SIDE1
3 (not Core rail) with voltage value from 0.8V to 3.3V. This will ensure PCH hardware
PCH_UATR0_DEBUG_RX 4 3
21 PCH_UATR0_DEBUG_RX 4
straps are not overridden unintentionally and cause boot issues.
SPI_CS#0 R2850 2 /Debug 1 0Ohm 5
SPI_SO R2851 2 /Debug 1 0Ohm 6 5
SPI_CLK R2852 2 /Debug 1 0Ohm 7 6
SPI_SI R2853 2 /Debug 1 0Ohm 8 7 SPI ROM size
9 8
SPI_HOLD#_IO3 10 9
10 T-pad function P/N Size
11 14
12 11 SIDE2
12 NON-POA * 05V000000025 8M
FPC_CON_12P POA 05V000000031 16M
12V18GWSM055

PCH SMBus

B B

+12VSUS
2

6 1
30 SMB1_CLK SML1_CLK 20
D

A A
Q2802A
EC UM6K1NG1DTN
Rdson=13Ohm/Vgs(th)=1.5V
PCH
5

GPU N/A
G

3 4
30 SMB1_DAT SML1_DAT 20
D

Q2802B Title : PCH(9)_SPI_SMB


UM6K1NG1DTN PEGATRON PROPRIETARY AND CONFIDENTIAL
N/A BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 28 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 29 of 94


5 4 3 2 1
5 4 3 2 1

+3VS
+3VSUS
+3VS 3,4,20,21,22,23,24,31,32,36,41,44,45,48,49,50,51,53,56,57,62,64,65,91,92 For EC Power
+3VSUS 4,20,21,22,23,24,25,26,28,31,51,53,62,81,92
+3VA +3VA 24,28,31,36,53,57,67,81,88,93 +3VA +3VA_EC
+1.8VSUS +1.8VSUS 9,24,26,84

B3001 1 2 120Ohm/100Mhz

U3001

PD_VBUS_OFF_EC# 3 66
41 PD_VBUS_OFF_EC# GPH7 ADC0/GPI0 AD_IINP 88
67
ADC1/GPI1 SUS_PWRGD 81,92
+3VAPLL
127 68
VSTBY(PLL) ADC2/GPI2 ALL_SYSTEM_PWRGD 25,92
121 69
114 VSTBY5 ADC3/GPI3 70 +3VA_EC +3VA_EC +3VAPLL
92 VSTBY4 ADC4/GPI4 71
D 50 VSTBY3 ADC5/DCD1#/GPI5 72 GPI6 1 T3007 SP3012 1 2 D
26 VSTBY2 ADC6/DSR1#/GPI6 73
+3VA_EC VSTBY1 ADC7/CTS1#/GPI7

2
NB_R0402_20MIL_SMALL
C3004
C3001 C3002 C3003 C3005 For +3VPLL
10UF/6.3V
10UF/6.3V 0.1UF/16V 0.1UF/16V 0.1UF/16V
Nearby pin 127

1
24
PWM0/GPA0 PWR_BLUE_LED# 64
25
PWM1/GPA1 CHG_BLUE_LED# 64
74 28
+3VACC AVCC PWM2/GPA2 CHG_ORG_LED# 64
29 GND GND GND
EC_VCC 11 PWM3/GPA3 PWR_ORG_LED# 64
R3023 1 2 0Ohm 30
+3VS VCC PWM4/GPA4 FAN0_PWM 50 +3VS
31
PWM5/GPA5 32 +3VACC
PWM6/SSCK/GPA6 EC_SPKR 36
34
PWM7/RIG1#/GPA7 KEYBOARD_LED# 31

2
SP3011 1 2 SP3013 1 2
C3006

2
108 GPB0 1 T3009 NB_R0402_20MIL_SMALL 0.1UF/16V NB_R0402_20MIL_SMALL

1
RXD/SIN0/GPB0 109 C3007
TXD/SOUT0/GPB1 PM_RSMRST# CAP_LED# 31
112 GND EC_AGND 0.1UF/16V
PM_RSMRST# 25

1
SP3001 1 2 LAD0 10 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 GND
20,44,62 LPC_AD0 LAD0/GPM0
SP3002 1 2 LAD1 9
20,44,62 LPC_AD1 LAD1/GPM1
SP3003 1 2 LAD2 8 56 EC_AGND
20,44,62 LPC_AD2 LAD2/GPM2 KSO16/SMOSI/GPC3 AC_IN_OC_EC AC_IN_OC KSO16 31
SP3004 1 2 LAD3 7 120 SP3008 1 2
20,44,62 LPC_AD3 CLK_KBCPCI_EC13 LAD3/GPM3 TMRI0/GPC4 AC_IN_OC 88
SP3005 1 2 57
20 CLK_KBCPCI_PCH LPCCLK/GPM4 KSO17/SMISO/GPC5 BAT1_IN_OC# KSO17 31
6 124
20,44,62 LPC_FRAME# LPCRST#_EC 22 LFRAME#/GPM5 TMRI1/GPC6 BAT1_IN_OC# 93
SP3026 1 2 16
25,32,49,51,53,62 BUF_PLT_RST# LPCRST#/GPD2 PWUREQ#/BBO/SMCLK2ALT/GPC7 ME_AC_PRESENT 25
5
20,44,62 INT_SERIRQ EXT_SMI#_EC SERIRQ/GPM6
SP3006 1 2 15 R3067 1 @ 2 0Ohm
3,44 EXT_SMI# EXT_SCI#_EC ECSMI#/GPD4 PM_SUSB# SYS_PWROK_PCH 25
SP3007 1 2 23 18
3 EXT_SCI# ECSCI#/GPD3 RI1#/GPD0 PM_SUSC# PM_SUSB# 25
T3001 1 A20GATE 126 21
GA20/GPB5 RI2#/GPD1 SYS_PWROK_EC PM_SUSC# 25
RCIN# 4 33
20 RCIN# KBRST#/GPB6 GINT/CTS0#/GPD5 FAN0_TACH SYS_PWROK_EC 25
14 47
32 EC_RST# WRST# TACH0A/GPD6 48
FAN0_TACH 50
R3048 1 2 For PU / PD
TACH1A/TMA1/GPD7 DELAY_ALL_SYSTEM_PWRGD 25
R3065 1 @ 2 0Ohm R3049 1 2
DE_ALL_SYS_PGD_S CPU_VRON 80 +3VA_EC +3VA_EC
58 R3066 1 2
31 KSI0 KSI0/STB# VSUS_ON_EC DE_ALL_SYS_PGD_HW 25
59 19 SP3009 2 1 0Ohm
31 KSI1 KSI1/AFD# L80HLAT/BAO/GPE0 SUSC_EC#_EC VSUS_ON 81,82,84,93
60 82 R3063 1 @ 2 0Ohm R3001 1 N/A 2 47KOhm BAT1_IN_OC# R3014 1 2 10KOhm LID_SW#
31 KSI2 KSI2/INIT# EGAD/GPE1 SUSB_EC#_EC SUSC_EC# 25,57,91
61 83 R3064 1 @ 2 0Ohm
31 KSI3 KSI3/SLIN# EGCS#/GPE2 DE_ALL_SYS_PGD_EC SUSB_EC# 25,57,91,92
62 84 R3002 1 @ 2 10KOhm AC_IN_OC
31 KSI4 KSI4 EGCLK/GPE3 DE_ALL_SYS_PGD_EC 25
63 125 1 T3004
31 KSI5 KSI5 SSCE1#/GPG0 ILIM_SEL PWR_SW#
64 35 R3015 1 2 10KOhm
31 KSI6 KSI6 RTS1#/GPE5 LID_SW# ILIM_SEL 52
65 17
31 KSI7 KSI7 LPCPD#/GPE6 LID_SW# 31,45,65,67
36 20 RN3001A 1 2 4.7KOhm SMB0_CLK
31 KSO0 KSO0/PD0 L80LLAT/GPE7
C 37 RN3001B 3 4 4.7KOhm SMB0_DAT C
31 KSO1 KSO1/PD1
38
31 KSO2 KSO2/PD2
39 106
31 KSO3 KSO3/PD3 VSTBY_FSPI PWR_SW# +3VAPLL +3VA_EC +3VS
40 107
31 KSO4 KSO4/PD4 PWRSW/GPE4 PWR_SW# 31
41 100 GPG2
31 KSO5 KSO5/PD5 SSCE0#/GPG2
42 104 GND
31 KSO6 KSO6/PD6 VSS5
43 RN3001D 7 8 4.7KOhm SMB1_DAT RN3002A 1 @ 2 4.7KOhm TP_PS2_CLK
31 KSO7 KSO7/PD7
44 RN3001C 5 6 4.7KOhm SMB1_CLK RN3002B 3 4 4.7KOhm TP_PS2_DAT
31 KSO8 KSO8/ACK#
45 93 @
31 KSO9 KSO9/BUSY CLKRUN#/GPH0/ID0 PM_CLKRUN# 20,62
46 94
31 KSO10 KSO10/PE CRX1/SIN1/SMCLK3/GPH1/ID1 CHGCB0 52 +3VS
51 95
31 KSO11 KSO11/ERR# CTX1/SOUT1/SMDAT3/GPH2/ID2 CHGCB1 52
52 96
31 KSO12 KSO12/SLCT GPH3/ID3
53 97
31 KSO13 KSO13 GPH4/ID4 PM_SUSB#
54 98 R3003 1 2 100KOhm R3017 1 @ 2 10KOhm A20GATE
31 KSO14 KSO14 GPH5/ID5
55 99
31 KSO15
20170112 R1.0 Kai KSO15 GPH6/ID6 PM_SUSC# R3004 1 2 100KOhm R3018 1 2 10KOhm RCIN#
Connect U4100.8 to U3001.88
(CHG_HI to GPF3) 31 PTP_PWR_EN 119
123 DSR0#/GPG6
PM_RSMRST# R3006 1 2 10KOhm R3019 1 2 10KOhm FAN0_TACH
3 THRO_CPU CTX0/TMA0/GPB2 BAT1_IN_OC#
20170113 R1.0 Kai R3050 1 @ 2 100KOhm
Reserve R3005 88 BAT_LEARN
T3002 1
85
86 PS2CLK0/TMB0/CEC/GPF0
25 PM_PWRBTN# PM_PWRBTN# PS2DAT0/TMB1/GPF1
87
R3005 1 N/A 2 0Ohm CHG_HI_EC 88 PS2CLK1/DTR0#/GPF2 GND
41 CHG_HI PS2DAT1/RTS0#/GPF3
89
TP_PS2_CLK 90 PS2CLK2/GPF4
31 TP_PS2_CLK TP_PS2_DAT PS2DAT2/GPF5
CilckPAD 31 TP_PS2_DAT SMB0_CLK 110
60,88 SMB0_CLK SMB0_DAT SMCLK0/GPB3 +3VSUS
Battery / Charger 111
60,88 SMB0_DAT SMB1_CLK SMDAT0/GPB4
115
28 SMB1_CLK SMB1_DAT SMCLK1/GPC1 PM_PWRBTN#
GPU 116 R3020 1 2 10KOhm
28 SMB1_DAT SMDAT1/GPC2
117
3 H_PECI_EC SMCLK2/PECI/GPF6
118 R1.0 PCH internal pull high
45 LCD_BKLTEN_EC SMDAT2/PECIRQT#/GPF7
81 R1.1 1111 Change Option Mount
80 DAC5/RIG0#/GPJ5
52,64 USBP01_EN
79 DAC4/DCD0#/GPJ4 for weak voltage at beginning of AC plug-in
52,81 USB_CPW_EN DAC3/TACH1B/GPJ3
78 141112 Remove Pull-D 10K to F_SDI_EC
52 CHGCB2 DAC2/TACH0B/GPJ2
T3008 1 GPJ1 77
76 GPJ1 (F Version problem has be solved)
TACH2/GPJ0 Reserved for IT8587E/FX
GPG2 R3010 1 @ 2 10KOhm AD_IINP R3055 1 @ 2 0Ohm
B 128 1 SUS_PWRGD R3056 1 @ 2 0Ohm B
24 SW_RTCRST GPJ6 VSS1 GND ALL_SYSTEM_PWRGD
2 12 C3012 1 2 0.1UF/16V GND R3057 1 @ 2 0Ohm
22 PCH_FLASH_DESCRIPTOR GPJ7 VCORE 27 GPI6 R3060 1 @ 2 0Ohm
VSS2 49 +3VA_EC GND
VSS3 GND
91
F_CS#_EC 101 VSS4 113 TP_OFF#_EC R3011 1 N/A 2 10KOhm VSUS_ON
28 F_CS#_EC F_SCK_EC FSCE#/GPG3 CRX0/GPC0 TP_OFF#_EC 31
105 122 R3038 1 @ 2 0Ohm GND
28 F_SCK_EC F_SDI_EC FSCK/GPG7 DTR1#/SBUSY/GPG1/ID7 TP_IRQ# 21,31
102 R3012 1 N/A 2 10KOhm GPG2
28 F_SDI_EC F_SDIO_EC FMOSI/GPG4
103 75 HW STRAP PIN, needs PU
28 F_SDIO_EC FMISO/GPG5 AVSS EC_AGND
1

C3008 IT8987E/BX +3VSUS


10PF/50V
@ R3013 1 @ 2 100KOhm VSUS_ON
2

GND

A A

<Variant Name>

Title : EC_IT8587E/FX
PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW RD Engineer: James_Liao


Size Project Name Rev
Custom SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 30 of 94
5 4 3 2 1
5 4 3 2 1

31 KB_TP Keyboard Backlight


R1.2
N/A
CON3101
29 R3149
SIDE1 1 1 2 +5VS_KB_BL
1 PWR_SW# 30
2
2 3 33PF/50V 2 1 C3130 CON3104
KSI7 33Ohm KSI7 +3VA +12VS
3 KSI7 30
4 KSI6 10V240000018 1 5
4 KSI6 30 1 SIDE1

2
5 KSI5 KSI6 33PF/50V 2 1 C3131 2
5 KSI5 30 2

1
6 KSI4 3
6 KSI4 30 3

2
D 33PF/50V 2 KB_BL_GND D
7 KSI3 U3105 C3102 @ @ KSI5 1 C3132 R3107 4 6

1
7 8 KSI3 30 4 SIDE2
KSI2 AZ5725-01F 0.1UF/16V JRST3101 JRST3102 KEYBOARD_LED# R3114 100KOhm
KSI2 30

2
8

3
2

2
9 KSI1 07V180000049 SGL_JUMP SGL_JUMP KSI4 33PF/50V 2 1 C3133 10KOhm 3
9 KSI1 30 D FPC_CON_4P
10 KSI0 /EMI 1 KB w/o BL @
KSI0 30

2
10 11 KSO15 KSI3 33PF/50V 2 1 C3134 Q3101 12V18GWSM146
KSO15 30

1
11 12 KSO14 KB_BL_CTRL 11
12 KSO14 30 Update for EMI 20161104 0 KB w/ BL /14inch
13 KSO13 KSI2 33PF/50V 2 1 C3135 G SSM3K315T
13 KSO13 30 2 S

3
14 KSO12 3
KSO12 30 D

2
14 15 KSO11 KSI1 33PF/50V 2 1 C3136
15 KSO11 30
16 KSO10 Q3104 +5VS_KB_BL
16 KSO10 30 33PF/50V 2
17 KSO9 KSI0 1 C3137 11 2N7002
17 18 KSO9 30 30 KEYBOARD_LED# CON3105
KSO8 G Rdson=7.5Ohm/Vgs(th)=2.5V
18 KSO8 30 2 S
19 KSO7 1 5
KSO7 30

2
19 20 KSO6 2 1 SIDE1
20 KSO6 30 2
21 KSO5 3
21 KSO5 30 3
22 KSO4 +5VS 4 6
22 23 KSO4 30 33PF/50V 2 1 C3138 4 SIDE2
KSO3 @ KSO17
23 KSO3 30
24 KSO2 R3102 1 /14inch 2 0Ohm C3120 1 2 0.1UF/16V
24 25 KSO2 30 33PF/50V 2 1 C3139 FPC_CON_4P
KSO1 R3101 1 /14inch 2 340Ohm 1% KSO16
25 KSO1 30 CAP_LED# 30 12V18GISM000
26 KSO0
26 KSO0 30 33PF/50V 2
27 RN3115A 1 2 /15inch KSO17 KSO15 1 C3140 /15inch
27 28 3 0Ohm 4 /15inch KSO17 30
RN3115B KSO16
28 0Ohm KSO16 30 33PF/50V 2
30 KSO14 1 C3141
SIDE2
KSO13 33PF/50V 2 1 C3142
12V18ABSM034
FPC_CON_28P Close CON3101 KSO12 33PF/50V 2 1 C3143 KB_BL_GND

KSO11 33PF/50V 2 1 C3144


+5VS_KB_BL

VC

VC
KSO10 33PF/50V 2 1 C3145
+5VS_KB_BL trace >20mils

2
KSO9 33PF/50V 2 1 C3146
U3103 U3104
KSO8 33PF/50V 2 1 C3147 AZ5725-01F AZ5725-01F
+5VS +5VS_KB_BL
KSO7 33PF/50V 2 1 C3148 F3101 /EMI /EMI
C 1 2 C
KSO6 33PF/50V 2 1 C3149

1
0.75A/6V
KSO5 33PF/50V 2 1 C3150 C3104 C3101

1
10UF/6.3V 07V120000025

GND

GND
0.1UF/16V

2
KSO4 33PF/50V 2 1 C3151 MLCC 10UF/6.3V (0603)X5R 20%

KSO3 33PF/50V 2 1 C3152

KSO2 33PF/50V 2 1 C3153

KSO1 33PF/50V 2 1 C3154

KSO0 33PF/50V 2 1 C3155

+3V_TP +3V_TP

Click Pad
需需
1

2
RN3101A RN3101B R3115 R3116 R3126 R3127
4.7KOhm 4.7KOhm 2.2KOhm
R1.1 ME 10KOhm 100KOhm 5.1KOhm
N/A N/A
1

CON3103 30mA
2

1 +3V_TP
9 1 2 TP_PS2_CLK
SIDE1 2 TP_PS2_DAT TP_PS2_CLK 30 +3V +3V_TP
3
3 4 TP_GND_R TP_PS2_DAT 30
Touch Pad Wake Up S3 /NON-PTP
4 5 PCH_I2C1_SDA_R R3120 2 1 0Ohm R3118 2 1 0Ohm
B 5 PCH_I2C1_SCL_R PCH_I2C1_SDA 21 B
6 R3119 2 1 0Ohm
6 TP_IRQ# PCH_I2C1_SCL 21 +3VS
10 7
SIDE2 7 TP_SENSOR_OFF#_R TP_IRQ# 21,30
8
8 R3117 2 @ 1 0Ohm
D3101 1 2
FPC_CON_8P TP_SENSOR_OFF# 21
1

RB751V-40
1

R3104 C3105 C3106 C3109 C3115 C3110 C3111 C3112 C3113


0Ohm
33PF/50V 33PF/50V 0.1UF/16V 1UF/6.3V 33PF/50V 33PF/50V 33PF/50V 33PF/50V For Acer PTP Design Guide
2

@ @ @ @ @ For Acer PTP Design Guide Reserve EC TP Enable Schematic Q3106


2

+3VSUS PJA3411 +3V_TP


Lid_SW# Need To Close TP Function
D3108 1 2 TP_OFF#_EC 2 3

3 D
TP_OFF#_EC 30
RB751V-40

G
/PTP
+3VA /PTP

11
2
D3111 1 2
LID_SW# 30,45,65,67
RB751V-40 R3123
10KOhm

/PTP

1
3
3
D
Q3105
@ 2N7002
Update for EMI 20161104

1
D3102 11
TP_PS2_CLK TP_PS2_CLK 30 PTP_PWR_EN
1 10 G C3114
TP_PS2_DAT 2 CH1 n.c.4 9 TP_PS2_DAT 2 S 1UF/6.3V

2
CH2 n.c.3

1
3 8 /PTP
PCH_I2C1_SDA GND1GND2 PCH_I2C1_SDA /PTP
4 7 R3122
PCH_I2C1_SCL 5 CH3 n.c.2 6 PCH_I2C1_SCL 100KOhm
CH4 n.c.1
A PUSB3F96 /PTP A

2
07V220000032
For working voltage 5v use

@
D3103
TP_IRQ# 1 10 TP_IRQ#
TP_SENSOR_OFF#_R 2 CH1 n.c.4 9 TP_SENSOR_OFF#_R
3 CH2 n.c.3 8
4 GND1GND2 7
CH3 n.c.2
5
CH4 n.c.1
6
Title : KB_TP
PUSB3F96 BG1-HW3 RD Engineer: James_Liao
07V220000032
For working voltage 5v use Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 31 of 94
5 4 3 2 1
5 4 3 2 1

32 RST_Reset Circuit +3VA_EC

+3VS
+3VA_EC

+3VS
30

3,4,20,21,22,23,24,30,31,36,41,44,45,48,49,50,51,53,56,57,62,64,65,91,92

D +3VS D

1
R3206
10KOhm

2
R3207 1 2 0Ohm +3VA_EC
50,92 CPU_THERM#

R3204 2 1 100KOhm

1
G S Q3202A
2 UM6K1NG1DTN
25,30,49,51,53,62 BUF_PLT_RST#
C
07V040000035 C
D

JRST3201

6
2 @ 1
D3201
0Ohm 1
3
EC_RST# 30
2
92 FORCE_OFF#

1V/0.1A

1
07V030000004 C3201
1UF/6.3V

2
Q3202B

3
UM6K1NG1DTN
D
5

G S
R1.1 PIN Define

4
B B
R1.2 20160629
07V040000035

+1.0V 3
C
R3203 2 1 330Ohm 1 B Q3201
PMBS3904
E 30@100mA/Vceo=40V
2

H_THRMTRIP#
3 H_THRMTRIP#
DVR1012 : THERMTRIP# shall be a H/W trigger event to power off the system

A A

Title : RST_Reset Circuit


PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
B SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 32 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 33 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 34 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 35 of 94


5 4 3 2 1
5 4 3 2 1

36 AUD_ALC255
AC_HP_R
AC_HP_L AC_HP_R 37
LINE1_VREFO_L AC_HP_L 37
LINE1_VREFO_R LINE1_VREFO_L 37
D MIC2_VREFO LINE1_VREFO_R 37 D
MIC2_VREFO 37

C3617
C3616

1
+3VS_AUDIO

2
2

1
C3615

1
R3635 2.2UF/6.3V

2
Analog +5VS_AUDIO 100KOhm C3609

1
1
1
C3638 10UF/6.3V

2
10UF/6.3V

1UF/6.3V
1UF/6.3V

2
GND_AUDIO

2
Digital

1
C3604 C3637
0.1UF/16V 10UF/6.3V GND_AUDIO
U3601A

36
35
34
33
32
31
30
29
28
27
26
25

2
GND_AUDIO ALC255-CGT +3VS_AUDIO
+1.8VS

LINE1-VREFO-L

AVDD1
AVSS1
CPVDD
CBN

LINE1-VREFO-R
MIC2-VREFO
VREF
HPOUT-R(PORT-I-R)
HPOUT-L(PORT-I-L)
CPVEE

LDO1-CAP

1
R3640 1 2 0Ohm GND_AUDIO +3VA R3650 1 @ 2 0Ohm
Place close to Pin 26
R3652
1

Digital C3642 1 2 100PF/50V 1KOhm

需需

2
R1.1 EMI C3612 D3601
, 0 ohm 10UF/6.3V R3637 /EMI 1
21 OP_SD#
2

2
change BEAD 0Ohm 3 PDB
37 24 Analog HDA_RST# 2
CBP LINE2-L(PORT-E-L)

1
38 23

1
AVSS2 LINE2-R(PORT-E-R)

1
+5VS_PVDD_AVD GND_AUDIO 10UF/6.3V 2 1 C361139 22 LINE1_L PCB trace width of SLEEVE & 1V/0.1A
LDO2-CAP LINE1-L(PORT-C-L) LINE1_R LINE1_L 37
40 21 RING2 are required at least 40 R3651 C3639
41 AVDD2 LINE1-R(PORT-C-R) 20 LINE1_R 37
GND_AUDIO mil and its length should be as @ 10KOhm 1UF/6.3V

2
H_SPKL+ 42 PVDD1 VD33_STB 19 C3614 1 2 10UF/6.3V T3601 1 OP_SD#_EC 2 1
37 H_SPKL+ short as possible.

2
H_SPKL- 43 SPK-OUT-L+ MIC_CAP 18 SLEEVE
37 H_SPKL- H_SPKR- 44 SPK-OUT-L- MIC2-R(PORT-F-R)/SLEEVE 17 SLEEVE 37
RING2 D3604
37 H_SPKR- H_SPKR+ 45 SPK-OUT-R- MIC2-L(PORT-F-L)/RING RING2 37 +3VS_AUDIO
C 16 GND_AUDIO 1.2V/0.1A C
37 H_SPKR+ 46 SPK-OUT-R+ MONO-OUT 15
PDB 47 PVDD2 SPDIFO/FRONT_JD(JD3)/GPIO3 14 R3604 1 2 100KOhm
48 PDB MIC2/LINE2_JD(JD2) 13 R3603 1 2 200KOhm
49 SPDIF-OUT/GPIO2 HP/LINE1_JD(JD1) HP_JD# 37
GND

GPIO0/DMIC-DATA
GPIO1/DMIC-CLK
Place close audio codec R3638 1 @ 2 0Ohm

SDATA-OUT

LDO3-CAP
2016.03.31 1

SDATA-IN
HDA_SPKR 22

DVDD-IO

PCBEEP
RESETB
DC_DET
PC_BEEP C3602 1 2 0.1UF/16V PCBEEP R3605 1 2 22KOhm 3 @
V2.0 need to change DVDD

SYNC
2

BCLK
symbol EC_SPKR 30

2
D3603

1
C3626 R3618 1V/0.2A
Analog 100PF/50V 4.7KOhm
1
2
3
4
5
6
7
10UF/6.3V 8
9
10
11
12
+3VS_AUDIO @ R3639 1 2 0Ohm

1
HDA_SDI0_C Digital
HDA_BCLK_C
DMIC_DAT_C
DMIC_CLK_C

02V0J0000076 PC_BEEP
1

C3605 C3606
10UF/6.3V 0.1UF/16V U3601B
HDA_RST# 22 +3VS_AUDIO 50
C3607
2

51 GND1
HDA_SYNC 22 GND2
Place close to pin 1 52
53 GND3
R3621 54 GND4
GND5

1
1 2 22Ohm 55
HDA_SDI0 22 C3625 GND6
R3620 C3618 56
DMIC_DAT_P4 R3614 1 2 0Ohm 1 2 22Ohm 0.1UF/16V 10UF/6.3V 57 GND7
45 DMIC_DAT_P4 HDA_BCLK 22

2
C3613 58 GND8
DMIC_CLK_P4 R3615 1 2 22Ohm 1 2 22PF/50V GND9
45 DMIC_CLK_P4
ALC255-CGT
1

C3629 C3624 MLCC 22PF/50V (0402) NPO 5%


@ 33PF/50V @ 33PF/50V 02V0J0000076
@ HDA_SDO 22
2

20161227 R1.0 Kai 2016.02.02


B EMI request, change R3636 / R3637 to 0-ohm 2016.02.04
R1.2
R1.2
Change 22 pF from 0201 to 0402 B
EMC/Ricky changes 10 pF to 33 pF

+3VS 5mA +3VS_AUDIO


<<Attention>>
R3636 1 2 0Ohm For power_on/off de-pop circuit and system booting warning signal: Please System BIOS Engineer Note :
1. If you want the system make warning signal after power on , please let EC_MUTE# High. EMI 建建
2015.09.10 Edison
Audio moat 預預TVS
2. If your design want to system make warning signal, for example No CPU or Memory installation or Bad BIOS,
1

@ Add this Filter to avoid other U3602


C3641 C3640
please change to OR Gate or contact our local FAEs for more details about the control circuit 2015.12.07
components/chips be influenced R1.1
100PF/50V 10PF/50V GND 1 2 VC
2

+5VS +5VS_PVDD_AVD EMI B build confirm


L3602
600Ohm/100Mhz Grounding circuit for combo jack SLEEVE pin AZ5725-01F
1 2 07V180000029
+3VS_AUDIO +VCC_RTC +3VA @/EMI
1.05A
1

C3622 C3623 C3619 C3601 1 2


+5VS Digital Analog +5VS_AUDIO 0.1UF/16V 10UF/6.3V 10UF/6.3V 0.1UF/16V SLEEVE R3625 @ 0Ohm
2

2
1 2
R3641 1 2 0Ohm R3634 R3633 R3631 R3624 @/EMI 0Ohm

3
2 VC

100KOhm 100KOhm 100KOhm 3 D Q3601


@ @ @ 1 2
Close PIN 41 2N7002 R3623 /EMI 0Ohm

1
D3602 11 @
AZ5725-01F G C3635 1 2 100PF/50V
2 S
1

3
3 @
D

2
1

/EMI C3628 GND_AUDIO 1 2


Moat 10UF/6.3V C3620 C3603 R3619 Q3603 R3622 @/EMI 0Ohm
2

10UF/6.3V 0.1UF/16V HDA_RST# 1 0Ohm 2 11 RING2


2

G 2N7002 C3633 1 2 1000PF/50V

需需 2 S
1

R1.1 EMI @ /EMI


GND 1

3
, 0 ohm C3627 3
D
change BEAD 1UF/6.3V C3634 1 2 1000PF/50V
2

@ Q3602 @
11
A
In order to prevent the built-in LDO damaged from GND_AUDIO Close PIN 46
G 2N7002 GND GND_AUDIO A
over-voltage on +5VSYS or Standby power line, we 2 S @

2
suggested using this Voltage suppressing device.
GND_AUDIO
To solve the background noise while combojack connecting to an active speaker
and system entry into S3/S4/S5 without analog power.
2015.12.07
R1.1
EMI build confirm

Title : AUD_ALC255

BG1-HW3 RD Engineer: James_Liao


Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 36 of 94
5 4 3 2 1
5 4 3 2 1

37 AUD_HP/SPK
Universal Audio Jack
36 MIC2_VREFO

1
D D
R3702 R3701
2.2KOhm 2.2KOhm

2
CON3701
RING2 R3720 1 2 0Ohm RING2_CON SLEEVE_CON 1
36 RING2 SLEEVE_CON HP_L_CON
36 SLEEVE SLEEVE R3721 1 2 0Ohm 4
GND_AUDIO 5
HP_JD# 6
AC_HP_R R3704 1 2 62Ohm R3722 1 2 0Ohm HP_R_CON HP_R_CON 3 @/EMI
36 AC_HP_R AC_HP_L HP_L_CON RING2_CON
36 AC_HP_L R3703 1 2 62Ohm R3723 1 2 0Ohm 2 1 2
HP_JD# C3750 1500PF/50V
AUDIO_JACK_6P
C3701/C3702 Close To Codec 12V14GBSD106

1
C3703 C3704 C3706 C3707 C3705 1 2
LINE1_R C3702 1 2 4.7UF/6.3V 100PF/50V 100PF/50V 100PF/50V 100PF/50V 100PF/50V C3740 1500PF/50V
36 LINE1_R

2
LINE1_L C3701 1 2 4.7UF/6.3V
36 LINE1_L

GND GND_AUDIO
LINE1_VREFO_L R3707 1 2 4.7KOhm
36 LINE1_VREFO_L
LINE1_VREFO_R R3708 1 2 4.7KOhm
36 LINE1_VREFO_R
GND_AUDIO

Close to CON3701 20161227 R1.0 Kai


Change D3703 / D3705 to VX
C C

20160225 EMI suggest


HP_JD# HP_R_CON SLEEVE_CON HP_L_CON RING2_CON
36 HP_JD#

1
D3701 D3702 D3703 D3704 D3705
AZ5725-01F AZ5725-01F AZ5123-01F AZ5725-01F AZ5123-01F

07V180000049 07V180000049 07V180000044 07V180000049 07V180000044

2
/EMI /EMI /EMI /EMI /EMI

Update for EMI 20161227 Update for EMI 20161227

GND_AUDIO GND_AUDIO GND_AUDIO GND_AUDIO GND_AUDIO

12V14GBSD104, sch. 20161031 updated

B B

20161229 R1.1 Kai


ME request
change CON3702 from 12V17GIRM002 to 12V17ABSM000
Internal Speaker 20161230 R1.1 Kai
EMI request
change 0-ohm to bead CON3702
6
H_SPKL+ /EMI B3716 1 2 120Ohm/100Mhz H_SPKL+_R 1 GND2
36 H_SPKL+ H_SPKL- H_SPKL-_R 1
/EMI B3717 1 2 120Ohm/100Mhz 2
36 H_SPKL- H_SPKR+ H_SPKR+_R 2
36 H_SPKR+ /EMI B3718 1 2 120Ohm/100Mhz 3
H_SPKR- /EMI B3719 1 2 120Ohm/100Mhz H_SPKR-_R 4 3
36 H_SPKR- 4 5
1500PF/50V

1500PF/50V

1500PF/50V

1500PF/50V

GND1

WTOB_CON_4P

P/N:1217-01F7000
1

Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R-


2

2
C3708

C3709

C3710

C3711

Speaker 4 ohm : 40mil


A A
RC Fillter Close To Codec For EMI Solution

Title :AUD_HP/DMIC/SPK
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 37 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 38 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 39 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 40 of 94


5 4 3 2 1
5 4 3 2 1

USB3.1 Type C TPS25810 +5VSUS +3VSUS +3VSUS_TypeC_1


USB3_RXP3_CON

LD_DET#
RN4100B 4 3

AUDIO#
23 USB3_RXP3 0Ohm 1 2 0Ohm
Need sufficient bypass capacitor R4118

UFP#
POL#
R4119 1 @ 2 0Ohm
(with sufficiently low ESR) to handle voltage droop.
20170105 R1.0 Kai

4
@/EMI Reference schematic use 120uF.
CM4100 RF request
90ohm correct location / mount parts / change parts

21
20
19
18
17
09V090000019 U4100
3A

3
D D

GND2
LD_DETb
UFPb
POLb
AUDIOb
+5VSUS +5V_USB31_C
2 1 USB3_RXN3_CON JP4101
23 USB3_RXN3 0Ohm 1 16
RN4100A 2MM_OPEN_5MIL FAULT# DEBUG#
2 1 2 FAULTb DEBUGb 15
2 1 3 IN1_1 OUT2 14
IN1_2 OUT1

1
2 1 USB3_TXP3_C 4 3 USB3_TXP3_CON 4 13 SUB_01_DFP_CC2
23 USB3_TXP3 0Ohm IN2 CC2

1
0.1UF/16V C4100 RN4101B C4107 C4106 C4105 C4104 5 12
22UF/6.3V 22UF/6.3V 22UF/6.3V 0.1UF/16V U31_PWR_EN 6 AUX GND1 11 SUB_01_DFP_CC1 C4117

2
EN CC1

CHG_HI
@ @ 10UF/6.3V

2
20170118 R1.0 Kai

4
09V090000019
VIH=1.17V

GND
CHG

REF
90ohm
CM4101
chagne 0-ohm to jump
@/EMI TPS25810RVC

7
8
9
10
06V500000016
PD_VBUS_OFF_EC# R4117 1 N/A 2 0Ohm
2 1 USB3_TXN3_C 2 1 USB3_TXN3_CON 30 PD_VBUS_OFF_EC#
RN4101A
23 USB3_TXN3 0Ohm
0.1UF/16V C4101

CHG_HI

1
CHG
SUB_R07
RN4104A 2 1 USB_PP3_C 100KOhm
23 USB_PP3_TYPEC 0Ohm +5VSUS
20170112 R1.0 Kai 1%
@ Connect U4100.8 to U3001.88 vx_r0402_small

2
(CHG_HI to GPF3)
2

3
09V090000019 FAULT# 10KOhm 2 1 R4110
90ohm
CM4104 LD_DET# 10KOhm 2 1 R4111
/EMI 30 CHG_HI
1

4
UFP# 10KOhm 2 1 R4112

4 3 USB_PN3_C D4100 1 2 R4102 1 2 1KOhm FAULT# AUDIO# 10KOhm 2 1 R4113


23 USB_PN3_TYPEC 0Ohm 23 USB_OC3#_PCH
RN4104B RB751V-40

1
@ DEBUG# 10KOhm 2 1 R4114
C4109
0.1UF/16V

2
@ +3VSUS
RN4102A 2 1 USB3_RXP4_CON +3VS
23 USB3_RXP4 0Ohm
C C
FAULTb pin is an open drain output that assert (active low) when device OUT current
exceeds its programmed value and/or over temperature threshold is cressed.
2

2
@/EMI
90ohm R4123 R4122
CM4102 @ 0Ohm 0Ohm
09V090000019
1

1
4 3 USB3_RXN4_CON POL# 10KOhm 2 1 R4109
23 USB3_RXN4 0Ohm
RN4102B

D4101 D4110
2 1 USB3_TXP4_C RN4103A 2 1 USB3_TXP4_CON USB3_RXP3_CON 5 6 USB3_RXP3_CON USB_PP3_C 1 10 USB_PP3_C
23 USB3_TXP4 0Ohm USB3_RXN3_CON 4 CH4 n.c.1 7 USB3_RXN3_CON USB_PN3_C 2 CH1 n.c.4 9 USB_PN3_C
0.1UF/16V C4102
3 CH3 n.c.2 8 3 CH2 n.c.3 8
USB3_TXP3_CON 2 GND1GND2 9 USB3_TXP3_CON USB_PP4_C 4 GND1GND2 7 USB_PP4_C
USB3_TXN3_CON 1 CH2 n.c.3 10 USB3_TXN3_CON USB_PN4_C 5 CH3 n.c.2 6 USB_PN4_C
CH1 n.c.4 CH4 n.c.1
2

@/EMI
90ohm PUSB3F96 PUSB3F96
CM4103 07V220000032 07V220000032
09V090000019 For working voltage 5v use For working voltage 5v use
1

/EMI /EMI
2 1 USB3_TXN4_C 4 3 USB3_TXN4_CON
23 USB3_TXN4 0Ohm
0.1UF/16V C4103 RN4103B

SUB_01_DFP_CC1
RN4105A 2 1 USB_PP4_C D4102 SUB_01_DFP_CC2
23 USB_PP4_TYPEC 0Ohm USB3_RXP4_CON USB3_RXP4_CON
1 10
@ USB3_RXN4_CON 2 CH1 n.c.4 9 USB3_RXN4_CON D4107 2 1 AZ5725-01F +5V_USB31_C
3 CH2 n.c.3 8
GND1GND2
2

1
09V090000019 USB3_TXP4_CON 4 7 USB3_TXP4_CON 07V180000049
90ohm USB3_TXN4_CON 5 CH3 n.c.2 6 USB3_TXN4_CON
CM4105 CH4 n.c.1 D4105 D4106 /EMI
/EMI PUSB3F96 AZ5725-01F AZ5725-01F
1

07V220000032 /EMI /EMI


B B
For working voltage 5v use 07V180000049 07V180000049

2
4 3 USB_PN4_C
23 USB_PN4_TYPEC 0Ohm /EMI
RN4105B
@

+5VSUS +3VSUS +3VSUS_TypeC_2

+5V_USB31_C +5V_USB31_C R4120 1 2 0Ohm


R4121 1 @ 2 0Ohm

2
R4116
CON4100 10KOhm R4105 R4107
A12 B1 10KOhm 10KOhm
USB3_RXP3_CON A11 GND1 GND3 B2 USB3_TXP3_CON @

1
USB3_RXN3_CON A10 SSRXP2 SSTXP2 B3 USB3_TXN3_CON

1
A9 SSRXN2 SSTXN2 B4 U31_PWR_EN CHG CHG_HI
A8 VBUS1 VBUS3 B5 SUB_01_DFP_CC2
EMC Solution Placement SBU1 CC2

2
USB_PN3_C A7 B6 USB_PP4_C
USB_PP3_C A6 DN1_1 DP1_2 B7 USB_PN4_C R4104 R4106 R4108
meet 10Gbps SUB_01_DFP_CC1 DP1_1 DN1_2
A5 B8 10KOhm 10KOhm 10KOhm
A4 CC1 SBU2 B9 @ @ @
USB3_TXN4_CON A3 VBUS2 VBUS4 B10 USB3_RXN4_CON

1
USB3_TXP4_CON A2 SSTXN1 SSRXN1 B11 USB3_RXP4_CON
USB3.1 A1 SSTXP1 SSRXP1 B12
EMI ESD GND2 GND4
chip component component
connector
1
2 SIDE1 5
SIDE2 P_GND1
SMT-MS
3 6
4 SIDE3 P_GND2 7
SIDE4 P_GND3 8
11 P_GND4 9 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12
12 NP_NC1 P_GND5 10
NP_NC2 P_GND6 GND TX1+ TX1- Vbus CC1 D+ D- SBU1 Vbus RX2- RX2+ GND
+5V_USB31_C USB_CON_24P 20161107 John
A 12V136BSD017 Change J4100 from 12V136BSD015 to 1213-02DG000 A
20161116 John
Change J4100 from 1213-02DG000 to 12V136BSD017 GND RX1+ RX1- Vbus SBU2 D- D+ CC2 Vbus TX2- TX2+ GND
3A 12V136BSD017 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1

USB3 Connector(Diff. Z = 85 ohm)


1

+
CE4101 C4110 C4111 C4112 C4113 C4114 C4115 C4116
100UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 470PF/50V 0.01UF/50V 22UF/6.3V 22UF/6.3V
1

vx_c3528_sanyo_h79 @
Title :USB3.1 TPS25810
2

@
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-NB4 Engineer: James_Liao
near connector
Size Project Name Rev
Custom
SU4EA 1.0
Date: Friday, March 17, 2017 Sheet 41 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 42 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 43 of 94


5 4 3 2 1
5 4 3 2 1

44 DEBUG CONN
D D

+3VS

@
C4401 2 1 0.1UF/16V /Debug
CON4401
1
LPC_AD0 2 1 13
20,30,62 LPC_AD0 3 2 SIDE1
LPC_AD1 4 3
C 20,30,62 LPC_AD1 4 C
3,30 EXT_SMI# R4410 1 @ 2 0Ohm 5
LPC_AD2 6 5
20,30,62 LPC_AD2 6
20,30,62 INT_SERIRQ R4411 1 @ 2 0Ohm 7
LPC_AD3 8 7
20,30,62 LPC_AD3 8
9
LPC_FRAME# 10 9
20,30,62 LPC_FRAME# 10
11 14
CLK_DEBUG 12 11 SIDE2
20 CLK_DEBUG 12
FPC_CON_12P
12V18GWSM055

1
C4402
10PF/50V
@

2
B B

A A

Title : DEBUG CONN.


PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
B SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 44 of 94
5 4 3 2 1
5 4 3 2 1

+3VS +3VS 3,4,20,21,22,23,24,30,31,32,36,41,44,48,49,50,51,53,56,57,62,64,65,91,92


Controller circuit +LCD_VCC +AC_BAT_SYS +AC_BAT_SYS 80,81,82,83,88
D4502 +3V +3V 25,31,57,63,65,91
1

EC
30 LCD_BKLTEN_EC 3 LCD_VCC for eDP C4502
+5VS +5VS 31,36,48,50,57,69,80,91

2
2 2 1
30,31,65,67 LID_SW#
R4506
1V/0.1A 10KOhm +LCD_VCC
4.7UF/6.3V
+3VS

1
D4501 U4501
R4568 1 2 0Ohm eDP_BL_EN_R 2 1 BACK_EN_C R4560 1 2 0Ohm +LCD_VCC_OUT 1 5
3,21 LCD_BKLTEN_PCH OUT IN

1
RB751V-40 2
20161227 R1.0 Kai GND

1
C4500
R4507
D Change R4568 package size from 0805 to 0402 100KOhm
C4546
CPU 3 eDP_VDD_EN
R4572 1 2 0Ohm DP_VDD_EN_R 3
EN DSG
4 2 R4508 1 +LCD_VCC_OUT
D
from 10V440000001 to 10V240000001 100PF/50V 22PF/25V

2
@ /EMI G5244T11U 150Ohm

2
CPU

1
C4503
R4509
1UF/6.3V
100KOhm

2
2
B4502 1 2 1kOhm/100Mhz LCD_BL_PWM_C
3 LCD_BL_PWM_PCH

Check PCH/FCH or CPU PD

1
C4501
C4545 AC_INV
100PF/50V 22PF/25V

2
/EMI +AC_BAT_SYS
+LCD_VCC

AC_INV B4505 1 2 80Ohm/100Mhz


Irat=2A

1
1

1
B4503 1 2 80Ohm/100Mhz C4529
C4506 C4507 C4508 @ Irat=2A 47PF/50V

2
39PF/50V 0.1UF/25V 1UF/25V

2
20170105 R1.0 Kai @
RN4501B
RF request Reserve another path for factory request
Camera 3
0Ohm
4
correct location / mount parts / change parts +3V_CAM

USBP7-
23 USB_PN7_CCD +3V_CAM
B4501 2 1 120Ohm/100Mhz
+3V
@
2

@/EMI
CM4506 eDP Connector NOTE:
90Ohm/100MHz
09V090000001 +3VS B4504 2 1 120Ohm/100Mhz
Entire trace of Panel_VCC & LCD_VCC should be wider than 80-mil
1

C USBP7+ C
23 USB_PP7_CCD

1
C4509 co-lay
1 2 0.1UF/16V

32
0Ohm

2
CON4501
RN4501A DMIC_DAT_P4 1

NP_NC1
36 DMIC_DAT_P4 DMIC_CLK_P4 1
2
36 DMIC_CLK_P4 2
3
USBP7+ 4 3
Camera USBP7- 5 4
6 5
+3V_CAM 6
7 36
+3VS 8 7 SIDE1
eDP HPD 9
10
8
9
0.1UF/16V 1 2 C4521 EDP_TXN1_C 11 10
EDP_HPD 3 EDP_TXN1 EDP_TXP1_C 11
R4541 2 1 100KOhm 0.1UF/16V 1 2 C4523 12 35
LCD_BKLTEN_EC 3 EDP_TXP1 12 SIDE2
R4523 2 @ 1 100KOhm 13
0.1UF/16V 1 2 C4536 EDP_TXN0_C 14 13
EDP_AUXN_C 3 EDP_TXN0 EDP_TXP0_C 14
R4503 2 @ 1 100KOhm 0.1UF/16V 1 2 C4535 15
EDP_AUXP_C 3 EDP_TXP0 15
R4570 2 @ 1 100KOhm 16
0.1UF/16V 1 2 C4539 EDP_AUXP_C 17 16 34
3 EDP_AUXP
20161227 R1.0 Kai 0.1UF/16V 1 2 C4540 EDP_AUXN_C 18 17 SIDE4
Intel Solution Add USB Hub connec to SHB / Touch
3 EDP_AUXN
19
20
18
19
21 20
EDP_HPD 22 21 33
3 EDP_HPD BACK_EN_C 22 SIDE3
23
Touch panel 1
0Ohm
2 LCD_BL_PWM_C
+LCD_VCC
24
25
23
24
RN4502A +LCD_VCC 25
/TPANEL 26
26

1
R4501 1 2 0Ohm USBHUBP1- 27
23 USB_PN10_TP 27

NP_NC2
R4513 1 @ 2 0Ohm AC_INV 28
23 USB_PP10_TP AC_INV 28
@ R4512 29
29
1

R4514 1 2 0Ohm 09V090000001 100KOhm 30


63 USB_HUB_U20_PN2_Touch 90Ohm/100MHz 30
R4515 1 @ 2 0Ohm @
63 USB_HUB_U20_PP2_Touch

2
@ CM4501
20161227 R1.0 Kai WTOB_CON_30P

31
@/EMI
2

B B
Reserve for USB touch panel
USBHUBP1+
CON4501.8 / CON4501.9 / CON4502.18 / CON4502.19 12V37GISM007
RN4502B /TPANEL
Add for I2C touch panel

不開
3 4
0Ohm CON4502.4 / CON4502.15

20161222 R1.0 Kai

鋼版 Add Touch panel / DMIC 20161228 R1.0 Kai CON4502


1 41
21 TOUCH_RST#_CPU 1 NP_NC1
+3VS_Touch
+5VS +3VS Recover CON4501 pin-define 21 TOUCH_INT_CPU
2
2
Modify CON4502.1 ~ CON4502.10 I2C2_SDA_Touch
I2C2_SCL_Touch
3
3
Remove TP_LID_SW# circuit 4
4 GND1
43

R4505 1 @ 2 0Ohm Remove DMIC power 22 TPanel_EN


5
6 5 GND3
45
46
JP4501 Change TPanel power from +5VS to +3VS +3VS_Touch
7 6 GND4
1 2 R4502 1 /TPANEL 2 0Ohm USBHUBP1- 8 7
1 2 USBHUBP1+ 9 8
1MM_OPEN_M1M2 10 9
10
1

C4510 DMIC_DAT_P4 11
@/TPANEL 11
1UF/6.3V DMIC_CLK_P4 12
12
2

/TPANEL 13
2

R4511 +3VS +3VS USBP7+ 14 13


3 2 100KOhm USBP7- 15 14
D 3

15
2

/TPANEL 16
+3V_CAM 16
Q4502 17
G

/TPANEL
1

17
1

SI2305CDS-T1-GE3 18
1

18
1

07V040000109 @ 19
19
1

C4505 Q4501A 20
UM6K1NG1DTN R4504 R4516 EDP_TXN1_C 21 20
0.1UF/16V
2

/TPANEL 10KOhm 10KOhm EDP_TXP1_C 22 21


22
2

/TPANEL /TPANEL 23
1 2 EDP_TXN0_C 24 23
2

24
G

EDP_TXP0_C 25
R4510 6 1 I2C2_SDA_Touch 26 25
21 I2C2_SDA_PCH I2C2_SCL_Touch EDP_AUXP_C 27 26
10KOhm
Q4503B 21 I2C2_SCL_PCH EDP_AUXN_C 27
D

A /TPANEL 28 A
28
3

UM6K1NG1DTN 29
D /TPANEL 30 29
PCH TPanel 30
5

5 Q4501B 31
Q4503A TPanel_ON 22 EDP_HPD 31
UM6K1NG1DTN 32
32
6

UM6K1NG1DTN S G /TPANEL BACK_EN_C 33


D /TPANEL 3 4 LCD_BL_PWM_C 34 33
4

2 +LCD_VCC 35 34 47
+LCD_VCC 35 GND5
D

36 48
S G 37 36 GND6 44
AC_INV 38 37 GND2
AC_INV Title : LVDS Out
1

39 38
40 39 42 PEGATRON PROPRIETARY AND CONFIDENTIAL
40 NP_NC2
WTOB_CON_40P
BG1-HW3 RD Engineer: James_Liao
12V37GISM000
@ Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 45 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 46 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 47 of 94


5 4 3 2 1
5 4 3 2 1

48 HDMI +3VS
+12VS +12VS 31,57,91

+5VS +5VS 31,36,45,50,57,69,80,91


1.3mA
+3VS +3VS 3,4,20,21,22,23,24,30,31,32,36,41,44,45,49,50,51,53,56,57,62,64,65,91,92

1
HDMI_SDA_PCH
HDMI_SCL_PCH
C4817
0.01UF/50V C4814
0.1UF/16V

HDMI_SDA
HDMI_SCL

2
GND GND
OUT_D2N RN4805B 3 4 @ DP1_TXN2_CR
0Ohm
U4802A

33
32
31
30
29
28
PS8203TQFN32GTR-A3

SDA_SRC
SCL_SRC

SDA_SNK
SCL_SNK
GND2

VDDIO
D D
GND

3
+5VS_HDMI
HDMI_TXP2 C4815 1 2 0.1UF/16V CM4805
3 HDMI_TXP2 IN_D2P OUT_D2P
1 27 90ohm
HDMI_TXN2 C4812 1 2 0.1UF/16V IN_D2N 2 IN_D2p OUT_D2p 26 OUT_D2N
3 HDMI_TXN2

4
DPB_HPD 3 IN_D2n OUT_D2n 25 DP1_HPD_CON
HDMI_TXP1 C4824 1 2 0.1UF/16V IN_D1P 4 HPD_SRC HPD_SINK 24 OUT_D1P
3 HDMI_TXP1 IN_D1N IN_D1p OUT_D1p OUT_D1N
5 23
HDMI_TXN1 C4820 1 2 0.1UF/16V IN_D0P 6 IN_D1n OUT_D1n 22 OUT_D0P OUT_D2P RN4805A 1 2 @ DP1_TXP2_CR
3 HDMI_TXN1 IN_D0N IN_D0p OUT_D0p OUT_D0N 0Ohm
U4803 7 21
+5VS 4 3 HDMI_TXP0 C4811 1 2 0.1UF/16V DCIN_EN 8 IN_D0n OUT_D0n 20
EN/EN# FLAG 3 HDMI_TXP0 IN_CLKP DCIN_EN CFG OUT_CLKP
2 9 19
5 GND 1 HDMI_TXN0 C4825 1 2 0.1UF/16V IN_CLKN 10 IN_CKp OUT_CKp 18 OUT_CLKN
IN OUT 3 HDMI_TXN0 IN_CKn OUT_CKn OUT_D1P DP1_TXP1_CR
11 17 RN4806A 1 2 @
HDMI_CLKP 1 2 0.1UF/16V VDD CEXT 0Ohm
3 HDMI_CLKP C4813

GND1
G517C2T11U

REXT
PRE
PD#
06V290000061 HDMI_CLKN C4826 1 2 0.1UF/16V

EQ
3 HDMI_CLKN

1
GND

4
02V080000011 C4822

12
13
14
15
16
D4802 +3VS 0.1UF/16V Swap for layout 90ohm

2
1V/0.1A CM4806

3
12
1

PRE
R4807 R4808 GND

EQ
1

1
2.2KOhm 2.2KOhm OUT_D1N RN4806B 3 4 @ DP1_TXN1_CR
0Ohm
C4827 C4821
0.1UF/16V 0.01UF/50V
2

2
GND

1
R4811 OUT_D0P RN4807A 1 2 @ DP1_TXP0_CR
0Ohm
5.9KOHM
HDMI_SCL 20160518 Vendor sugguestion 10V220000244
+3VS GND

2
HDMI_SDA

4
1

Swap for layout 90ohm


C4810 C4809 CM4807

1
10PF/50V 10PF/50V GND
2

3
@ @ R4858 R4859
10KOhm 10KOhm
34
35 GND3 OUT_D0N RN4807B 3 4 @ DP1_TXN0_CR
0Ohm

2
GND GND 36 GND4
HDMI_SCL_PCH 37 GND5
3 HDMI_SCL_PCH GND6
38
HDMI_SDA_PCH 39 GND7
C 3 HDMI_SDA_PCH GND8 OUT_CLKP DP1_CLKP_CR C
40 RN4808A 1 2 @
41 GND9 0Ohm
DPB_HPD GND10
3 DPB_HPD
U4802B

4
GND PS8203TQFN32GTR-A3
R4870 02V080000011 Swap for layout 90ohm
100KOhm CM4808
@

3
2
+5VS_HDMI

OUT_CLKN RN4808B 3 4 @ DP1_CLKN_CR 20160225 EMI suggest


0Ohm
GND
23
21

CON4804 20160519 EMI suggest


P_GND4
P_GND2

+5VS_HDMI 18 19 DP1_HPD_CON
HDMI_SDA 16 18 19 17
14 16 17 15 HDMI_SCL
20161228 R1.1Kai
DP1_CLKN_CR
DP1_CLKP_CR
12
10
14
12
15
13
13
11
EMI request, add D4803~D4806 +3VS
8 10 11 9 DP1_TXN0_CR
DP1_TXN1_CR 6 8 9 7 DP1_TXP0_CR HDMI_SCL
DP1_TXP1_CR 4 6 7 5 HDMI_SDA DCIN_EN R4818 2 1 4.7KOhm
2 4 5 3 DP1_TXN2_CR @
2 3 1 DP1_TXP2_CR
1
1

1
P_GND3
P_GND1

D4806 D4803
AZ5725-01F AZ5725-01F
GND 07V180000049 07V180000049 PRE R4816 2 1 4.7KOhm
HDMI_CON_19P GND @/EMI @/EMI @
22
20

R4821 2 1 4.7KOhm
@
12V12GBRD005

GND GND
GND
EQ R4817 2 1 4.7KOhm
@
20170107 R1.2 R4819 2 1 4.7KOhm
B
EMI request DP1_TXN0_CR 1
D4804 @/EMI
10 DP1_TXN0_CR
@ B

DP1_TXP0_CR 2 CH1 n.c.4 9 DP1_TXP0_CR


3 CH2 n.c.3 8
GND DP1_CLKN_CR GND1GND2 DP1_CLKN_CR GND
4 7
DP1_CLKP_CR 5 CH3 n.c.2 6 DP1_CLKP_CR
+5VS_HDMI CH4 n.c.1
DP1_HPD_CON PUSB3F96
07V220000032
1

D4805 @/EMI
D4807 D4808 DP1_TXN1_CR 1 10 DP1_TXN1_CR GND
AZ5725-01F AZ5725-01F DP1_TXP1_CR 2 CH1 n.c.4 9 DP1_TXP1_CR
07V180000049 07V180000049 3 CH2 n.c.3 8
GND DP1_TXN2_CR GND1GND2 DP1_TXN2_CR GND
@/EMI @/EMI 4 7
2

DP1_TXP2_CR 5 CH3 n.c.2 6 DP1_TXP2_CR


CH4 n.c.1
PUSB3F96
07V220000032

GND GND

A A

<Variant Name>

Title : HDMI-4K2K
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
Custom SU4EA 1.0

Date: Friday, March 10, 2017 Sheet 48 of 94


5 4 3 2 1
5 4 3 2 1

U4901B
A1 H12
A10 NC_1 NC_54 H13
A11 NC_2 NC_55 H14
+1.8VS +1.8VS_eMMC A12 NC_3 NC_56 H2
A13 NC_4 NC_57 H3
0Ohm A14 NC_5 NC_58 J1
30Mil R4921 1 2
30Mil A2 NC_6 NC_59 J12
A8 NC_7 NC_60 J13
NC_8 NC_61

1
/eMMC A9 J14
C4901 C4918 C4919 C4902 C4903 C4909 B1 NC_9 NC_62 J2
D
B10 NC_10 NC_63 J3 D
4.7UF/6.3V 4.7UF/6.3V 2.2UF/6.3V 0.1UF/16V 0.1UF/16V 0.1UF/16V

2
/eMMC /eMMC /eMMC /eMMC @ /eMMC B11 NC_11 NC_64 K1
1AV200000084 1AV200000084 1AV300000020 B12 NC_12 NC_65 K12
B13 NC_13 NC_66 K13
B14 NC_14 NC_67 K14
B7 NC_15 NC_68 K2
B8 NC_16 NC_69 K3
B9 NC_17 NC_70 L1
+3VS +3VS_eMMC C1 NC_18 NC_71 L12
0Ohm C10 NC_19 NC_72 L13
R4922 1 2 C11 NC_20 NC_73 L14
C12 NC_21 NC_74 L2
NC_22 NC_75

1
/eMMC C13 L3
C4906 C4920 C4921 C4907 C4908 C4904 C4905 C14 NC_23 NC_76 M1
C3 NC_24 NC_77 M10
4.7UF/6.3V 4.7UF/6.3V 2.2UF/6.3V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V

2
/eMMC /eMMC /eMMC /eMMC @ /eMMC C7 NC_25 NC_78 M11
1AV200000084 1AV200000084 1AV300000020 @ C8 NC_27 NC_79 M12
C9 NC_28 NC_80 M13
D1 NC_29 NC_81 M14
D12 NC_30 NC_82 M2
D13 NC_31 NC_83 M3
D14 NC_32 NC_84 M7
D2 NC_33 NC_85 M8
D3 NC_34 NC_86 M9
E1 NC_35 NC_87 N1
E12 NC_36 NC_88 N10
E13 NC_37 NC_89 N11
U4901A E14 NC_38 NC_90 N12
R4902 1 /eMMC 2 0Ohm eMMC_CLK_R M6 D4 E2 NC_39 NC_91 N13
24 eMMC_CLK eMMC_CMD_R CLK NC/index NC_40 NC_92
C R4901 1 /eMMC 2 0Ohm M5 E3 N14 C
24 eMMC_CMD CMD C4 F1 NC_41 NC_93 N3
VssQ_1 NC_42 NC_94
2

R4903 1 /eMMC 2 0Ohm eMMC_D0_R A3 N2 F12 N6


24 eMMC_D0 1 2 eMMC_D1_R A4 DAT0 VssQ_2 N5 F13 NC_43 NC_95 N7
C4911 R4904 /eMMC 0Ohm
24 eMMC_D1 eMMC_D2_R DAT1 VssQ_3 NC_44 NC_96
22PF/50V R4905 1 /eMMC 2 0Ohm A5 P4 F14 N8
24 eMMC_D2 R1.1 follow
1

@ R4906 1 /eMMC 2 0Ohm eMMC_D3_R B2 DAT2 VssQ_4 P6 F2 NC_45 NC_97 N9


24 eMMC_D3 1 2 eMMC_D4_R B3 DAT3 VssQ_5 F3 NC_46 NC_98 P1
24 eMMC_D4
R4907
R4908 1
/eMMC
/eMMC 2
0Ohm
0Ohm eMMC_D5_R B4 DAT4 P5
+1.8VS_eMMC
Vender spec G1 NC_47 NC_99 P11
24 eMMC_D5 1 2 eMMC_D6_R B5 DAT5 VccQ_5 P3 G12 NC_48 NC_100 P12
R4909 /eMMC 0Ohm
24 eMMC_D6 eMMC_D7_R DAT6 VccQ_4 NC_49 NC_101
R4910 1 /eMMC 2 0Ohm B6 N4 G13 P13
24 eMMC_D7 DAT7 VccQ_3 M4 NC_50 NC_102
0.1UF/6.3V 1 2 C4915 G14 P14
A6 VccQ_2 C6 G2 NC_51 NC_103 P2
A7 Vss_1 VccQ_1 /eMMC_SAN H1 NC_52 NC_104 P8
C5 RFU_1 C2 1UF/6.3V 1 2 C4910 NC_53 NC_105 P9
E10 NC_26 VDDi NC_106
E5 VSF_1 E7 /eMMC_HY THGBMGG9T4LBAIR
E8 RFU_2 Vss_2 G5
RFU_3 Vss_3 05V000000095
E9 H10
F10 VSF_2 Vss_4 K8 /eMMC
G10 VSF_3 Vss_6
G3 RFU_4
R4920 1 /eMMC 2 0Ohm H5 RFU_5 K9
24 eMMC_RCLK DS Vcc_4 +3VS_eMMC
J5 J10
K10 Vss_5 Vcc_3 F5
K6 RFU_6 Vcc_2 E6
K7 RFU_7 Vcc_1
P10 RFU_8 K5 EMMC_RST
P7 RFU_9 RST_n
RFU_10 R1.1 49K to 20K
B
THGBMGG9T4LBAIR
05V000000095
+1.8VS_eMMC follow intel PDG B

/eMMC
R1.1 100k to 10k
eMMC_D0 R4923 1 /eMMC 2 20KOhm
eMMC_D1 R4924 1 /eMMC 2 20KOhm
eMMC_D2 R4925 1 /eMMC 2 20KOhm
+12VSUS +1.8VS_eMMC eMMC_D3 R4926 1 /eMMC 2 20KOhm
eMMC_D4 R4927 1 /eMMC 2 20KOhm
eMMC_D5 R4928 1 /eMMC 2 20KOhm
eMMC_D6 R4929 1 /eMMC 2 20KOhm
1

eMMC_D7 R4930 1 /eMMC 2 20KOhm


R4934
R4933 10KOhm eMMC_CMD R4932 1 /eMMC 2 20KOhm
100KOhm /eMMC
/eMMC
2

R4911 1 /eMMC 2 0Ohm EMMC_RST eMMC_CLK R4936 1 /eMMC 2 20KOhm

eMMC_RCLK R4937 1 /eMMC 2 20KOhm


3

Q4902B C4913
UM6K1NG1DTN 0.1UF/16V
5 /eMMC
2

@
4
6

Q4902A
UM6K1NG1DTN
2 /eMMC
25,30,32,51,53,62 BUF_PLT_RST#
1

A A

<Variant Name>

Title : eMMC
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
Custom SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 49 of 94
5 4 3 2 1
5 4 3 2 1

50 Thermal_Fan
G709 Thermal Sensor
D D

20170209 R1.0 Kai


+3VS
Thermal request temp setting : 95 degree
RSET(kΩ)= 0.0012T2 — 0.9308T + 96.147
55uA U5001
5 1 THERM_SET R5002 1 1% 2 30KOhm
VCC SET 2
GND
1

C5007 4 3 CPU_THERM#
HYST OT# CPU_THERM# 32,92
0.1UF/16V
G709T1UF
2

06V220000007

PWM FAN
C C

+5VS +5VS_FAN
1.2A
R5004 1 2 0Ohm

R5001 1 2 0Ohm
CON5001
6 1 D5001
+5VS_FAN
SIDE2 1 2 FAN0_PWM FAN0_TACH_C 2 1
2 FAN0_PWM 30 FAN0_TACH 30
3 FAN0_TACH_C
3

1
5 4 @ C5003
SIDE1 4 C5008 SS0520 100PF/50V
1

22PF/50V @

2
WTOB_CON_4P C5009
B 1AV200000009 B
12V17GBSM055 1UF/6.3V
2

A A

Title : Thermal_Fan
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
B SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 50 of 94
5 4 3 2 1
5 4 3 2 1

51 CON5101

Interface
SSD type detection

Device side PCH side


SSD1 76

1
NP_NC1 SIDE1
78
+3VS_SSD1
L5120
+3VS
PCIe Hi-z H
3 1 2 1 2
3 2 SATA L L
23 PCIE_RXN5 5 TX3- 4
5 4

1
7 TX3+ 6 C5110 C5111 C5112 300Ohm/100Mhz NO SSD Hi-z H
23 PCIE_RXP5 7 6
9 8 0.1UF/16V 0.1UF/16V 22UF/6.3V /SSD1
2 1 0.22UF/10V /SSD1 11 9 RX3- 8 10
23 PCIE_TXN5
C5161 /SSD1 /SSD1 /SSD1 PCIe_M.2_Electromechanical_Spec_Rev_0.9-3_07312013_RS_Clean

2
C5160 2 1 0.22UF/10V /SSD1 13 11 RX3+ 10 12
23 PCIE_TXP5 13 12
15 14 @/EMI
17 15 TX2- 14 16 R5120 1 2 0Ohm
23 PCIE_RXN6 17 16
23 PCIE_RXP6 19 TX2+ 18
D
21 19 18 20 RES 0 OHM 1/8W(0805)JUMP
D

C5163 2 1 0.22UF/10V /SSD1 23 21 RX2- 20 22


23 PCIE_TXN6 23 22
C5162 2 1 0.22UF/10V /SSD1 25 RX2+ 24
23 PCIE_TXP6 27 25
27
24
26
26 20161227 R1.1 Kai
23 PCIE_RXN7 29
31 29
TX1-
TX1+ 28
28
30
EMI request, L5120 co-lay R5120
23 PCIE_RXP7 31 30
33 32
C5165 2 1 0.22UF/10V /SSD1 35 33 RX1- 32 34
23 PCIE_TXN7 2 1 0.22UF/10V /SSD1 37 35 RX1+ 34 36
C5164 /SSD1
23 PCIE_TXP7 37 36 SATA_DEVSLP1_R
39 38 R5111 1 2 0Ohm
39 TX+ 38 SATA_DEVSLP1 23
41 TX0- 40
23 SATA_RXP8 41 40
43 TX0+ TX- 42
23 SATA_RXN8 43 42
45 44
C5167 2 1 0.22UF/10V /SSD1 47 45 RX0- RX- 44 46
23 SATA_TXN8 47 46
C5166 2 1 0.22UF/10V /SSD1 49 RX0+ RX+ 48 /SSD1
23 SATA_TXP8 49 48 SSD1_PERST#
51 PCIe SATA 50 R5121 1 2 0Ohm
CLK_PCIE_SSD1#_PCH 53 51 CLK- 50 52 CLK_REQ1_SSD1# BUF_PLT_RST# 25,30,32,49,53,62
24 CLK_PCIE_SSD1#_PCH CLK_PCIE_SSD1_PCH 53 52 CLK_REQ1_SSD1# 24
55 CLK+ 54
24 CLK_PCIE_SSD1_PCH 57 55 54 56
57 56 58
58

67
M.2_SSD1_PEDET 69 67 68 1 T5100
71 69 68 70 +3VS_SSD1
73 71 70 72
75 73 72 74
75 74

1
77 79 C5113 C5114 C5115
NP_NC2 SIDE2 0.1UF/16V 0.1UF/16V 22UF/6.3V
/SSD1 /SSD1 /SSD1

2
NGFF_67P +3VS_SSD1 +3VS +3VSUS
/SSD1

2
C R5112 C5109 R5101 C
10KOhm 0.1UF/6.3V 10KOhm

2
/SSD1 U5101 @ @

1
1 NC 5
M.2_SSD1_PEDET VCC
2 A
3 Y 4
GND SATA_SSD1_PEDET 23
CON5102

SN74AUP1G04DCKR
76 78 @
NP_NC1 SIDE1 +3VS_SSD2 +3VS
1 /SSD2
3 1 2 R5103 1 2 0Ohm R5113
5 3 TX3- 2 4 1 2
5 4

1
7 TX3+ 6 C5156 C5155 C5154 RES 0 OHM 1/8W(0805)JUMP
9 7 6 8 0.1UF/16V 0.1UF/16V 22UF/6.3V 0Ohm /SSD1

SSD2 11 9 RX3- 8 10 /SSD2 /SSD2 /SSD2

2
13 11 RX3+ 10 12
15 13 12 14
17 15 TX2- 14 16
19 17 TX2+ 16 18
21 19 18 20
23 21 RX2- 20 22
25 23
25
RX2+ 22
24
24 RF requirement
27 26
29 27 TX1- 26 28
56 PCIE_RXN11_M2_SSD_OUT 29 28
56 PCIE_RXP11_M2_SSD_OUT 31 TX1+ 30
33 31 30 32 +3VS_SSD1
35 33 RX1- 32 34
56 PCIE_TXN11_M2_SSD_OUT 35 34
37 RX1+ 36 /SSD2
56 PCIE_TXP11_M2_SSD_OUT 39 37 36 38 SATA_DEVSLP2_R R5102 1 2 0Ohm
39 38 SATA_DEVSLP2 23

1
41 TX0- TX+ 40
56 SATA_RXP12_M2_SSD_OUT 41 40
43 TX0+ TX- 42 C5152
56 SATA_RXN12_M2_SSD_OUT 43 42
45 44 10PF/50V

2
47 45 RX0- RX- 44 46 @
56 SATA_TXN12_M2_SSD_OUT 49 47 RX0+ RX+ 46 48 /SSD2
56 SATA_TXP12_M2_SSD_OUT 49 48 SSD2_PERST# BUF_PLT_RST#
51 PCIe SATA 50 R5122 1 2 0Ohm
B CLK_PCIE_SSD2#_PCH 53 51 CLK- 50 52 CLK_REQ2_SSD2# B
24 CLK_PCIE_SSD2#_PCH 53 52 CLK_REQ2_SSD2# 24 near Conn
CLK_PCIE_SSD2_PCH 55 CLK+ 54
24 CLK_PCIE_SSD2_PCH 55 54 +3VS_SSD2
57 56
57 56 58
58

1
67
M.2_SSD2_PEDET 69 67 68 1 T5101 C5153
71 69 68 70 +3VS_SSD2 10PF/50V

2
73 71 70 72 @
75 73 72 74
75 74
near Conn
1

1
77 79 C5159 C5158 C5157
NP_NC2 SIDE2 0.1UF/16V 0.1UF/16V 22UF/6.3V
/SSD2 /SSD2 /SSD2
2

2
NGFF_67P
/SSD2

+3VS_SSD2 +3VS +3VSUS

2
R5105 C5108 R5104
10KOhm 0.1UF/6.3V 10KOhm

2
/SSD2 U5102 @ @

1
1 NC 5
M.2_SSD2_PEDET VCC
2 A
3 Y 4
GND SATA_SSD2_PEDET 23

SN74AUP1G04DCKR
@
A A

R5106
1 2

0Ohm /SSD2

Reserve for resversal.


If BIOS can set resversal, unmount these parts.
TitleSATA
: SSD_HDD
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 51 of 94
5 4 3 2 1
A B C D E

52 USB3.0 12V13GUSD009

10

12
USB_CON_9P

P_GND1

P_GND3
USB3_RXN2_CON 5
EMI 2016/03/17 4 STDA_SSR-
USB3_RXP2_CON 6 GND
USB_PP2_30_C 3 STDA_SSR+
+5VSUS +5V_USB2 7 D+
C5209 1 2 0.1UF/16V USB3_TXP2_C RNX5208A 2 1 USB3_TXP2_CON USB_PN2_30_C 2 GND_DRAIN
1 +5VSUS +5V_USB2 23 USB3_TXP2 0Ohm USB3_TXN2_CON 8 D- 1
STDA_SST-
1

P_GND2

P_GND4
U5203 1
C5220 5 1 USB3_TXP2_CON 9 VBUS
VIN VOUT STDA_SST+

3
0.1UF/16V 2 @
2

@ 4 GND 3 LX5208
EN OCB Update for EMI 20161104
90ohm CON5204

11

13
1

APL3518ABI-TRG 09V090000019

4
C5216 06V290000064
1UF/6.3V
USB_OC1#_PCH 23
2

C5215 1 2 0.1UF/16V USB3_TXN2_C RNX5208B 4 3 USB3_TXN2_CON


23 USB3_TXN2 0Ohm
D5202
USB3_RXN2_CON 5 6 USB3_RXN2_CON
RNX5209A 2 1 USB3_RXP2_CON USB3_RXP2_CON 4 CH4 n.c.1 7 USB3_RXP2_CON
23 USB3_RXP2 0Ohm CH3 n.c.2
3 8
USBP01_EN USB3_TXN2_CON 2 GND1GND2 9 USB3_TXN2_CON
30,64 USBP01_EN USB3_TXP2_CON CH2 n.c.3 USB3_TXP2_CON
1 10
CH1 n.c.4

3
@
LX5209 Update for EMI 20161104 PUSB3F96
90ohm 07V220000032
09V090000019
PLACE ESD Diodes near USB Connector

4
RNX5209B 4 3 USB3_RXN2_CON
+5V_USB2 23 USB3_RXN2 0Ohm

@ USB_PN2_30_C
1.5A 23 USB_PN2_30
RNX5211A 2
0Ohm
1 USB_PN2_30_C USB_PP2_30_C

+5V_USB2

2 VC
2 2
1

3
+ N/A
1

1
CE5202 LX5211 Update for EMI 20161104
100UF/6.3V C5230 C5231 C5232 C5228 C5229 C5207 90ohm U5201

2
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 0.1UF/16V 09V090000019 AZ5725-01F
2

4
@ U5205 U5204
AZ5425-01F AZ5425-01F
RNX5211B 4 3 USB_PP2_30_C
23 USB_PP2_30 0Ohm
@

1
GND 1
U5201 Close To CON5204

USB 3.0 ports x 1 with Sleep & Charge Left_Down


Device Pega No. VX No. 12V13GUSD009

SLGC55544CVTR 0629-00TJ000 06V290000089 (Default)

10

12
USB_CON_9P
+5V_USB1

P_GND1

P_GND3
USB3_RXN1_CON 5
3 1.5A 4 STDA_SSR-
GND
3
2

+5VSUS USB3_RXP1_CON 6
R5227 R5229 USB_PP1_30_C 3 STDA_SSR+
22KOhm 22KOhm +5V_USB1 7 D+
High Current Limit : 2A GND_DRAIN

1
Low Current Limit : 2A USB_PN1_30_C 2
+ D-
2

1
CE5201 USB3_TXN1_CON 8
1

STDA_SST-

P_GND2

P_GND4
R5222 100UF/6.3V C5225 C5226 C5223 C5224 C5227 C5211 1
10KOhm 0.1UF/16V USB3_TXP1_CON 9 VBUS
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

2
U5207B @ @ STDA_SST+
18 +5VSUS
1

19 GND_3 CON5202

11

13
GND_4 R5217 1 2 0Ohm
USB_OC0#_PCH 23
SLGC55544CVTR 20161227 R1.1 Kai 20160831 updated
1

06V290000089 Change U5207 to SLG 1213-01TW000


1

GND C5222 C5256


0.1UF/16V 0.1UF/16V +5V_USB1
2

U5207A @
2

17
1 GND_2 16
2 VIN ILIM_H 15
23 USB_PN1_30 3 DM_OUT ILIM_L 14 PLACE ESD Diodes near USB Connector
23 USB_PP1_30 ILIM_SEL_C DP_OUT GND_1
30 ILIM_SEL 2 1 4 13
SP5204 NB_R0402_20MIL_SMALL 5 ILIM_SEL FAULT# 12 1 2 L5201
6 EN VOUT 11 USB_N1- 80Ohm/100Mhz D5205
7 CTL1 DM_IN 10 USB_P1+ USB3_RXN1_CON 5 6 USB3_RXN1_CON
8 CTL2 DP_IN 9 USB3_RXP1_CON 4 CH4 n.c.1 7 USB3_RXP1_CON
CTL3 NC C5206 1 2 0.1UF/16V USB3_TXP1_C RNX5201A 2 1 USB3_TXP1_CON 3 CH3 n.c.2 8
23 USB3_TXP1 0Ohm USB3_TXN1_CON 2 GND1GND2 9 USB3_TXN1_CON
SLGC55544CVTR
SP5201 2 1 NB_R0402_20MIL_SMALL USB3_TXP1_CON 1 CH2 n.c.3 10 USB3_TXP1_CON
30,81 USB_CPW_EN 06V290000089 CH1 n.c.4
30 CHGCB0 SP5202 2 1 NB_R0402_20MIL_SMALL

3
4 @ PUSB3F96 4
+5VSUS LX5201 Update for EMI 20161104 07V220000032
R5241 2 @ 1 90ohm
0Ohm 09V090000019

4
2

R5224
R5219 2 1 0Ohm CTL2 10KOhm C5212 1 2 0.1UF/16V USB3_TXN1_C RNX5201B 4 3 USB3_TXN1_CON USB_PN1_30_C
30 CHGCB1 23 USB3_TXN1 0Ohm USB_PP1_30_C
1

R5218 2 @ 1 0Ohm CTL3 +5V_USB1


30 CHGCB2
RNX5202A 2 1 USB3_RXP1_CON
23 USB3_RXP1 0Ohm

2 VC
2

3
@ U5202

2
LX5202 Update for EMI 20161104 AZ5725-01F
+5VSUS System Global TPS2544 90ohm U5208 U5206
Power State Charging Mode CTL1 CTL2 CTL3 ILIM_SEL Current Limit Setting 1 09V090000019 AZ5425-01F AZ5425-01F

4
S0 SDP (Standard Downstream)
ILIM_HI / ILIM_LO RNX5202B 4 3 USB3_RXN1_CON
1 1 0 1 or 0 23 USB3_RXN1 0Ohm

1
R5220 1 @ 2 10KOhm CTL2

GND 1
S0 SDP, no discharge to /
from CDP 1 1 1 0 ILIM_LO
R5221 1 @ 2 10KOhm ILIM_SEL_C
USB_N1- USB_PN1_30_C 07V180000029
CDP, if a BC1.2 primary RNX5212B 4 3@
S0 detection occurs ILIM_HI
0Ohm
1 1 1 1
R5240 2 @ 1 10KOhm
S3/S4/S5Auto mode, no mouse wake 0 0 1 0 ILIM_HI
1

5 N/A 5
Dedicated Charging Port LX5212 Update for EMI 20161104 U5202 Close To CON5202
S3 Auto mode, ILIM_HI 90ohm
keyboard/mouse wake up
0 1 1 X 09V090000019
2

S3 SDP, keyboard/ 0 1 0 1 or 0 ILIM_HI / ILIM_LO


USB_P1+ RNX5212A 2 1@ USB_PP1_30_C
mouse wake-up 0Ohm TitleUSB3.0_Charge
: IC
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C
SU4EA 1.0
Date: Monday, March 13, 2017 Sheet 52 of 94
A B C D E
5 4 3 2 1

53 PCIE_WLAN_BT
CON5301

3 4 RN5304B 76 78
23 USB_PP6_BT 0Ohm SIDE1 NP_NC1 +3VS_WLAN RF requirement
1
1

2
USB_PP6_BT_C 3 2
09V090000022 USB_PN6_BT_C 5 3 2 4
5 4

1
D 90OHM/100MHz D
7 6 C5347
7 6

1
@ L5304 9 8 10PF/50V

3
1 2 RN5304A 11 9 8 10 C5311 @
23 USB_PN6_BT 0Ohm

2
13 11 10 12 0.1UF/16V

2
15 13 12 14
17 15 14 16
19 17 16 18
21 19 18 20
21 20 near Conn
23 22
23 22
33 32
23 PCIE_TXP_WLAN
PCIE_TXP_WLAN 35 33
35
32
34
34 R1.1 Short pin to 0 ohm
+3VS_WLAN PCIE_TXN_WLAN 37 36
23 PCIE_TXN_WLAN 39 37 36 38 CL_RST#_NGFF 1 2 0Ohm
R5322 @
PCIE_RXP_WLAN 39 38 CL_DATA_NGFF CL_RST# 20
41 40 R5323 1 @ 2 0Ohm
23 PCIE_RXP_WLAN 41 40 CL_DATA 20

1
PCIE_RXN_WLAN 43 42 CL_CLK_NGFF R5324 1 @ 2 0Ohm
23 PCIE_RXN_WLAN 45 43 42 44 CL_CLK 20
R5334
CLK_PCIE_WLAN_PCH 47 45 44 46
10KOhm 24 CLK_PCIE_WLAN_PCH 47 46
@ CLK_PCIE_WLAN#_PCH 49 48
24 CLK_PCIE_WLAN#_PCH 49 48
51 50

2
CLK_REQ4_WLAN# 53 51 50 52 PERST#_WLAN
24 CLK_REQ4_WLAN# PCIE_WAKE#_C 55 53 52 54 BT_ON/OFF#_C
+3VS_WLAN 57 55 54 56 WLAN_ON_C
+3VS_WLAN 59 57 56 58
59 58

2
PCIE_WAKE# Pull High To 61 60
R5391 63 61 60 62
+VCCDSW (+3VSUS_ORG) 63 62
100KOhm 65 64
65 64

11
D5301 Q5311 @ 67 66 +3VS_WLAN
RB751V-40 2N7002 69 67 66 68

G
RF requirement

1
1 2 3 2 @ 71 69 68 70

S 2
25 WAKE_PCIE# 71 70
73 72

D
@ 75 73 72 74
75 74

1
T5304 1WLAN_WAKE# R5333 1 /IOAC 2 0Ohm 77 79 C5346
SIDE2 NP_NC2 C5332 10PF/50V
0.1UF/16V @

2
MINI_PCI_67P
C C

near Conn

WLAN/BT with NGFF socket E

+3VS_WLAN

R5348
10KOhm

WLAN_ON_C D5305 1 2 R5327 1 N/A 2 0Ohm


WLAN_ON_PCH 21
RB751V-40

R5328 1 @ 2 0Ohm WLAN_ON_EC 1 T5303


B B

+3V_WLAN_WP1 bypass capactor:


Place 0.1UF near pin 2,4
IOAC Control Schematic
Place 10UF near +3V_WLAN_WP1 source side.
+3VS_WLAN +3VS_WLAN +3VS

+3VS_WLAN
850mA
R5343
10KOhm JP5303
1 2
1 2
1

C5339 C5336 C5340 C5337 C5338


@ 10UF/6.3V 10UF/6.3V 0.1UF/16V 0.01UF/50V 0.01UF/50V BT_ON/OFF#_C D5304 1 2 R5325 1 N/A 2 0Ohm 1MM_OPEN_M1M2
BT_ON/OFF#_PCH 21
RB751V-40 /NON-IOAC
2

Q5313 +3VSUS
PJA3411
R5326 1 @ 2 0Ohm BT_ON/OFF#_EC 1 T5301
3 2 +3VA

D 3

S
2
G

1
+3VS_WLAN

1
Reserved for module that has internal PU /IOAC
EMI Solution

1
R5390
Place 0.1UF near pin 72,74. 10KOhm
2

PERST#_WLAN /IOAC
Place 10UF near +3V_WLAN_WP1 source side. R5389 R1.1

2
@ 10KOhm BT_ON/OFF#_C

+3VS_WLAN WLAN_ON_C Q5312


D5303
1

3
@ 3 2N7002
D
1 2 /IOAC
1

1
Soft 11 IOAC_EN
C5342 C5343 C5344 C5341 1 T5305
1.2V/0.1A Start
1

C5314 C5335 C5334 C5310 C5331 22PF/50V 22PF/50V 22PF/50V 1UF/6.3V G


2

2
S 2

2
@ 10UF/6.3V 10UF/6.3V 0.1UF/16V 0.01UF/50V 0.01UF/50V PERST#_WLAN R5319 1 2 0Ohm /IOAC
BUF_PLT_RST# 25,30,32,49,51,62

2
R5346
2

A 100KOhm A
/IOAC

1
R5341 1 @ 2 0Ohm WLAN_RST#_EC 1 T5302 2015.04.15 YenPin

Title :PCIE_WLAN_BT
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C
SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 53 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 54 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 55 of 94


5 4 3 2 1
5 4 3 2 1

56
+5VA +5VA 64,81

D D

+3VS

PCIE Re-driver

1
C

C C5601
0.1UF/16V
/SSD2
C5602
1UF/6.3V
/SSD2
C

2
C1_EQ2

C1_EQ1
C1_DEW1

R5660 1 2 330Ohm /SSD2


R5661 1 2 330Ohm /SSD2

21
20
19
18
17
16
U5601A

GND4
Vcc2
EQ2
GND3
EQ1
DEW1
PCIE_TXP11_M2_SSD C5650 2 1 0.22UF/10V /SSD2 PCIE_TXP11_M2_SSD_C 1 15 PCIE_TXP11_M2_SSD_OUT_C C5605 2 1 0.22UF/10V /SSD2 PCIE_TXP11_M2_SSD_OUT
23 PCIE_TXP11_M2_SSD PCIE_TXN11_M2_SSD PCIE_TXN11_M2_SSD_C RX1P TX1P PCIE_TXN11_M2_SSD_OUT_C PCIE_TXN11_M2_SSD_OUT PCIE_TXP11_M2_SSD_OUT 51
C5651 2 1 0.22UF/10V /SSD2 2 14 C5606 2 1 0.22UF/10V /SSD2
23 PCIE_TXN11_M2_SSD RX1N TX1N PCIE_TXN11_M2_SSD_OUT 51
3 13
PCIE_RXN11_M2_SSD C5603 2 1 0.22UF/10V /SSD2 PCIE_RXN11_M2_SSD_C 4 GND1 GND2 12 PCIE_RXN11_M2_SSD_OUT_C C5607 1 2 0.47UF/10V /SSD2 PCIE_RXN11_M2_SSD_OUT
23 PCIE_RXN11_M2_SSD PCIE_RXP11_M2_SSD PCIE_RXP11_M2_SSD_C TX2N RX2N PCIE_RXP11_M2_SSD_OUT_C PCIE_RXP11_M2_SSD_OUT PCIE_RXN11_M2_SSD_OUT 51
23 PCIE_RXP11_M2_SSD C5604 2 1 0.22UF/10V /SSD2 5 11 C5608 1 2 0.47UF/10V /SSD2
TX2P RX2P PCIE_RXP11_M2_SSD_OUT 51

DEW2

Vcc1
DE2
DE1
EN
R5601 1 2 330Ohm /SSD2
SN75LVPE802RTJR R5602 1 2 330Ohm /SSD2

6
7
8
9
10
+3VS /SSD2
+3VS
1

C5620 C5621
0.1UF/16V 1UF/6.3V C1_DE1
/SSD2 /SSD2 C1_DE2
2

C1_EN U5601B
D1_EQ2 C1_DEW2 22
GND5

D D1_EQ1
D1_DEW1
23
24
25
26
GND6
GND7
GND8
GND9
B B
R5670 1 2 330Ohm /SSD2 SN75LVPE802RTJR
R5671 1 2 330Ohm /SSD2 /SSD2
21
20
19
18
17
16

U5602A
GND4
Vcc2
EQ2
GND3
EQ1
DEW1

SATA_TXP12_M2_SSD C5639 2 1 0.22UF/10V /SSD2 SATA_TXP12_M2_SSD_C 1 15 SATA_TXP12_M2_SSD_OUT_C C5624 2 1 0.22UF/10V /SSD2 SATA_TXP12_M2_SSD_OUT
23 SATA_TXP12_M2_SSD SATA_TXN12_M2_SSD RX1P TX1P SATA_TXP12_M2_SSD_OUT 51
23 SATA_TXN12_M2_SSD C5640 2 1 0.22UF/10V /SSD2 SATA_TXN12_M2_SSD_C 2 14 SATA_TXN12_M2_SSD_OUT_C C5625 2 1 0.22UF/10V /SSD2 SATA_TXN12_M2_SSD_OUT
3 RX1N TX1N 13 SATA_TXN12_M2_SSD_OUT 51
SATA_RXN12_M2_SSD C5622 2 1 0.22UF/10V /SSD2 SATA_RXN12_M2_SSD_C 4 GND1 GND2 12 SATA_RXN12_M2_SSD_OUT_C C5626 1 2 0.47UF/10V /SSD2 SATA_RXN12_M2_SSD_OUT
23 SATA_RXN12_M2_SSD SATA_RXP12_M2_SSD TX2N RX2N SATA_RXN12_M2_SSD_OUT 51
C5623 2 1 0.22UF/10V /SSD2 SATA_RXP12_M2_SSD_C 5 11 SATA_RXP12_M2_SSD_OUT_C C5627 1 2 0.47UF/10V /SSD2 SATA_RXP12_M2_SSD_OUT
23 SATA_RXP12_M2_SSD TX2P RX2P SATA_RXP12_M2_SSD_OUT 51
DEW2

Vcc1
DE2
DE1
EN

R5610 1 1% 2 49.9Ohm /SSD2


SN75LVPE802RTJR R5611 1 1% 2 49.9Ohm /SSD2
6
7
8
9
10

/SSD2
+3VS

U5602B
D1_DE1 20170210
D1_DE2
D1_EN
Vendor request 22
GND5
D1_DEW2 chagne to 50-ohm 23
24 GND6
For project vendor suggest GND7
25
Equalizer control 26 GND8
EQ1 / EQ2 Channel 1 / Channel 2
!!-R5602 Using TI's new source, imported by PN substitution, GND9
NC 0 dB (Default) R12 should use right way to import when VX and symbol application is done SN75LVPE802RTJR
H 7 dB /SSD2
L 14 dB De-Emphasis setting
DE1 / DE2 Channel 1 / Channel 2
NC -4 dB (Default)
Internally biased to VCC / 2 with >200-Ωk pullup or ulldown. H 0 dB
When 3-state pins are left as NC, board leakage at the pin pad must be L -2 dB
<1 µA; otherwise, drive to VCC / 2 to assert mid-level De-Emphasis width control
DEW1 or DEW2 Channel 1 Channel 2 Device enable
Internally biased to VCC / 2 with >200-Ωk pullup or ulldown. H De-emphasis plse duration, Long (Default) EN Device
C1_EQ1 R5623 2 @ 1 4.7KOhm When 3-state pins are left as NC, board leakage at the pin pad must be L De-emphasis plse duration, Sfort H Device enabled (Default)
+3VS <1 µA; otherwise, drive to VCC / 2 to assert mid-level
A L Device in standby mode A

R5622 1 @ 2 4.7KOhm +3VS +3VS


/SSD2 R5640 2 N/A 1 4.7KOhm C1_DEW1
R5630 2 @ 1 4.7KOhm C1_DE1 R5631 2 1 4.7KOhm C1_EN R5650 2 @ 1 4.7KOhm
C1_EQ2 R5621 2 @ 1 4.7KOhm R5641 2 N/A 1 4.7KOhm C1_DEW2
+3VS
R5632 2 N/A 1 4.7KOhm C1_DE2 R5633 2 @ 1 4.7KOhm

R5620 1 @ 2 4.7KOhm
+3VS
+3VS +3VS
R5634 2 @ 1 4.7KOhm D1_DE1 R5635 2 N/A 1 4.7KOhm R5642 2 N/A 1 4.7KOhm D1_DEW1 TitleSATA
: SSD_HDD
R5624 2 N/A 1 4.7KOhm D1_EQ2 R5625 2 @ 1 4.7KOhm D1_EN R5651 2 @ 1 4.7KOhm PEGATRON PROPRIETARY AND CONFIDENTIAL
R5636 2 N/A 1 4.7KOhm D1_DE2 R5637 2 @ 1 4.7KOhm R5643 2 N/A 1 4.7KOhm D1_DEW2 BG1-HW3 RD Engineer: James_Liao
R5626 2 @ 1 4.7KOhm D1_EQ1 R5627 2 @ 1 4.7KOhm
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 56 of 94
5 4 3 2 1
5 4 3 2 1

57 DISCHARGE

D D
0402 1/16W min. resister
5V 400 OHM
3V 144 OHM
12V 2304 OHN
100ms --->100mV +5VS +3VS +VCCIO +0.6VS +1.8VS +12VS

2
R5707 R5715
Discharge Circuit +3VA @ 470Ohm
5%
@ R5702
330Ohm
@ R5722
330Ohm
@ R5709
330Ohm
R5721
330Ohm
1.5KOhm

10V320000065

1
1
R5708

6
100KOhm Q5701B Q5701A Q5703A Q5703B Q5708B Q5708A
UM6K1NG1DTN UM6K1NG1DTN UM6K1NG1DTN UM6K1NG1DTN UM6K1NG1DTN UM6K1NG1DTN

2
5 2 2 5 5 2
N/A N/A

1
3
3
D
Q5704
2N7002
25,30,91,92 SUSB_EC# 11
G
2 S 150ohm 13ms 330ohm 55ms @132 us @ 130ms @ 496us
2

@ 36ms @ 76ms

+12V +3V +2P5VPP +1.0V +1.2V


C C
2

2
2
R5701
402Ohm @ R5705 @ R5720 @ R5731
1% 330Ohm @ R5706 100Ohm 330Ohm
+3VA 330Ohm
1

1
@

1
1

R5704
100KOhm
2

3
Q5709B Q5702A Q5702B Q5710A Q5710B
5 UM6K1NG1DTN 2 UM6K1NG1DTN 5 UM6K1NG1DTN 2 UM6K1NG1DTN 5 UM6K1NG1DTN
4

4
6

Q5709A
25,30,91 SUSC_EC# 2 UM6K1NG1DTN
1

R1.1 remove GPU

B B

A A

Title : DISCHARGE
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 57 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 58 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 59 of 94


5 4 3 2 1
5 4 3 2 1

60 DC_BAT_CONN
DC Jack WTB CONN
+A/D_DOCK_IN
+V_DCJACK Current setting=6A
Depend on the current
of the adaptor.
D 1 T6020 1 T6036
D
1 T6025 1 T6035
1 T6021 L6001 80Ohm/100Mhz
1 T6022 1 2
1 T6019
CON6003
L6006 80Ohm/100Mhz
5 4 1 2
SIDE1 4 3
3

2
2
2

1
6 1 C6014 D6001 C6013 C6012 C6011
SIDE2 1 0.1UF/25V 10UF/25V 1UF/25V 0.1UF/25V
1.2V/0.1A
@ X5R/+/-10% 10%

2
WTOB_CON_4P @

1
12V17GBSM055

1 T6026
1 T6012
1 T6023
1 T6024

Battery Connector +VCC_RTC


+BAT_CON
The section 4.1.11 In PCH EDS (#545845, REV1.0)

1 T6029
C
SW6003 For Battery Reset C
1 T6027 R6003 1 2 100KOhm
add for RF
2

1
@ 1 T6028 C6028 C6027 C6026

1
Update for EMI 20161104 D6004 0.1UF/25V 0.1UF/25V 33PF/50V 2N7002 C6032

11
AZ5725-01F 1 T6030 @ Q6001 0.1UF/16V
R6001
2

GND1 5
07V180000049

2
1 T6031 BI 2 1 3 2

S 2
1

1 2

D
0Ohm 3 4

6 GND2
CON6004 R6004
1 T6032 T6034 T6033 0Ohm SW6003
1 2
2 3 BI TACT_SWITCH_4P
1

2
3 4 TS1#_C R6010 1 2 100Ohm 1%
4 SMB0_CLK_C TS1# 93
5 R6011 1 2 100Ohm 1%
5 6 SMB0_DAT_C R6012 1 2 100Ohm 1% SMB0_CLK 30,88
9 6 7 SMB0_DAT 30,88
10 SIDE1 7 8 P/N:1209-019M000
SIDE2 8 12V09SBSM028
WTOB_CON_8P
12V17GBSM093
1

C6033 C6029 C6031 C6030


33PF/50V 33PF/50V 33PF/50V 33PF/50V
2

EMI
B B

Update for EMI 20161104


@
D6002
SMB0_DAT_C 1 10 SMB0_DAT_C
SMB0_CLK_C 2 CH1 n.c.4 9 SMB0_CLK_C
3 CH2 n.c.3 8
TS1#_C 4 GND1GND2 7 TS1#_C
BI 5 CH3 n.c.2 6 BI
CH4 n.c.1
PUSB3F96
07V220000032
For working voltage 5v use

A A

Title : DC_BAT_CONN
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 60 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 61 of 94


5 4 3 2 1
5 4 3 2 1

62 TPM NPCT650

D D

LPCPD# 0Ohm 2 @ 1 R6203 PM_SUS_STAT# 20


INT_SERIRQ
INT_SERIRQ 20,30,44

33
32
31
30
29
28
27
26
25
U6201
+3VS

GND5
GND4
NC7
GPIO1/SCL

LPCPD#

NC6
NC5
GPIO0/SDA/XOR_OUT

SERIRQ
+3VS +3VSUS

1 24 LPC_AD0
VSB LAD0/MISO LPC_AD0 20,30,44
2 23 +3VSUS
3 NC1
GPX/GPIO2
GND3
VDD3
22 50mA
T6201 1 PP 4 21 LPC_AD1
PP LAD1/MOSI LPC_AD1 20,30,44
5 20 LPC_FRAME#
LPC_FRAME# 20,30,44

CLKRUN#/GPIO4/SINT#
6 TEST LFRAME#/SCS# 19 LPCCLK_TPM
GPIO3/BADD LCLK/SCLK LPCCLK_TPM 20

1
7 18 LPC_AD2 C6201 C6203
NC2 LDA2/SPI_IRQ# LPC_AD2 20,30,44
8 17 BUF_PLT_RST# 0.1UF/16V 10UF/6.3V
VDD1 SRESET#/LRESET#/SPI_RST# BUF_PLT_RST# 25,30,32,49,51,53
/TPM /TPM

2
change netname to LPCCLK_TPM

RESERVED
20161109 Vincent

GND1

GND2
VDD2
LAD3
NC3
NC4
+3VS
C
NPCT650JAAYX 7mA C

9
10
11
12
13
14
15
16
+3VS

02V3E0000006

2
LPC_AD3 C6202 C6204 C6205 C6206
LPC_AD3 20,30,44
/TPM 10UF/6.3V 0.1UF/16V 0.1UF/16V 0.1UF/16V /TPM
PM_CLKRUN# /TPM /TPM /TPM /TPM
PM_CLKRUN# 20,30

1
TPM VDD: Power the I/O buffers of the GPIO ports and the Host Interface
VSB: Standby 3.3V Power Supply. Powers the on-chip Core.
+3VS

2015.04.09 YenPin TPM Power Sequence


R6202 2 @ 1 10KOhm PM_CLKRUN# Chipset Have Pulled High 10Kohm
At PM_CLKRUN# and INT_SERIRQ 5ms < t NOTE:
1) For TPM 1.2:
R6201 2 @ 1 10KOhm INT_SERIRQ The TPM VSB pin must be connected to the
system's standby voltage (existing at S3 power state).
VBS 2) For TPM 2.0:
Note: 0 < t
When LPCPD# functionality is not required, It is recommended to connect the TPM VSB pin to the
R6204 2 @ 1 10KOhm LPCPD# system's standby voltage to improve performance.
an internal pull-up resistor allows this VDD
B pin to be left floating. 3) TPM VDD pins should be connected to the same power rail B
1ms < t that feeds the Chipset LPC interface.
4) RESET# must be asserted for at least 5 msec after
RESET# VSB power-up.
5) VSB may come up anytime before VDD power-up,
but not after VDD power-up.
6) RESET# may be asserted together with VDD power
negation, but should not at any point exceed 0.5V
NOTE: RESET# is LRESET#, above the VDD power level.
SPI_RST# or SRESET#.

A A

Title : TPM NPCT650


BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 62 of 94
5 4 3 2 1
5 4 3 2 1

+3V +3V 25,31,45,57,65,91

63 +3V_HUB

Removable device
+3V_HUB
HUB_OVCUR1# R6301 1 /HUB 2 10KOhm
D +3V +3V_HUB T6301 HUB_OVCUR2# R6304 1 /HUB 2 10KOhm D

54mA

1
R6309 1 /HUB 2 0Ohm HUB_PSELF R6303 1 /HUB 2 100KOHM
HUB_OVCUR1#
HUB_OVCUR2#
HUB_PGANG HUB_PGANG R6306 1 /HUB 2 100KOHM
GND HUB_PSELF
RN6301B @ 20161229 R1.0 Kai
3
0Ohm
4 SWAP for layout HUB_RREF R6308 1 /HUB 2 620Ohm

29
28
27
26
25
24
23
22
U6301A Close to Pin 8
+3V_HUB

GND

OVCUR1#/SMC
OVCUR2#/SMD
PWREN1#/SDA

PSELF
V33
V5

PGANG
23 USB_PN10_HUB
GND
2

3
/HUB USBP10+ 1 21
L6301 USBP10- 2 DM0 DVDD 20
PCH 90ohm T6302 1 3 DP0 OVCUR3# 19
09V090000019 T6303 1 4 DM1 OVCUR4# 18
1

4 5 DP1 TEST/SCL 17 HUB_RESET#


T6304 1 6 AVDD_1 RESET# 16 USB_HUB_U20_PP2_Touch
23 USB_PP10_HUB 1 7 DM2 DP4 15 USB_HUB_U20_PN2_Touch USB_HUB_U20_PP2_Touch 45
T6305 Touh Panel
DP2 DM4 USB_HUB_U20_PN2_Touch 45

AVDD_2

AVDD_3
RREF
1 2

DM3
C 0Ohm C

DP3
X1
X2
RN6301A @
/HUB GL850G-OHY50

8
9
10
11
12
13
14
+3V_HUB 06V400000020 +3V_HUB

HUB_RREF

USB_HUB_U20_PP1_SHB
USB_HUB_U20_PN1_SHB USB_HUB_U20_PP1_SHB 65
1 2 22PF/50V HUB_X1 USB_HUB_U20_PN1_SHB 65 Sensor Hub
C6303

1
/HUB

2
X6301
4 12MHZ

/HUB
+3V_HUB

3
C6304 1 2 22PF/50V HUB_X2

/HUB
B B
GND

1
C6305 C6309 C6302
+3V_HUB 0.1UF/16V 0.1UF/16V 10UF/6.3V
/HUB /HUB /HUB

2
2

R6305
U6301B 180KOhm
30 /HUB
GND1 GND
31
1

GND2 HUB_RESET#
32
33 GND3
2

34 GND4
1

35 GND5 C6307 R6307 C6311

1
GND6 /HUB 47KOHM 22PF/25V C6308 C6310 C6312 C6306 C6301
36
37 GND7 1UF/6.3V @ @ 0.1UF/16V 0.1UF/16V 1UF/6.3V 0.1UF/16V 1UF/6.3V
2

GND8 /HUB /HUB /HUB /HUB /HUB


38
1

2
GND9
GL850G-OHY50
GND 06V400000020
/HUB GND
Close to Pin 5 Close to Pin 9 Close to Pin 14
A A
<Variant Name>
GND

Title :USB 2.0 Hub


PEGATRON PROPRIETARY AND CONFIDENTIAL
Engineer: James_Liao
Size Project Name Rev
B SU4EA 1.0

Date: Friday, March 10, 2017 Sheet 63 of 94


5 4 3 2 1
5 4 3 2 1

64 DB CONN
+5VSUS

@
USB_OC2#_PCH C6415 1 2 10PF/50V Update for EMI 20161104
D D

1
@ @
C6411 C6410 C6409
0.1UF/16V 10PF/50V 10PF/50V CON6401 DB Connector Pin Define(MB Side)

2
+5VA 1
2 1 1 +5VSUS
3 2 2 +5VSUS
4 3 25 3 +5VSUS
5 4 SIDE1 4 +5VSUS
USBP01_EN 6 5 5 +5VA
30,52 USBP01_EN USB_OC2#_PCH 6
7 6 USB_EN
23 USB_OC2#_PCH 8 7 7 USB_OC
USB_PP5_20_C 9 8 8 GND_IO
USB_PN5_20_C 10 9 9 USB_PP1_20
11 10 10 USB_PN1_20
USB_PP8_CR_C 12 11 11 GND_IO
USB_PN8_CR_C 13 12 12 USB_PP2_20
14 13 13 USB_PN2_20
15 14 14 GND_IO
16 15 15 GND_IO
+3VS 17 16 16 GND_IO
18 17 17 GND_IO
CHG_ORG_LED# 19 18 26 18 GND_IO
30 CHG_ORG_LED# CHG_BLUE_LED# 19 SIDE2
20 19 CHG_ORG_LED#
C 30 CHG_BLUE_LED# PWR_BLUE_LED# 21 20 20 CHG_BLUE_LED#
C
30 PWR_BLUE_LED# PWR_ORG_LED# 21
22 21 PWR_BLUE_LED#
30 PWR_ORG_LED# 23 22 22 PWR_ORG_LED#
24 23 23 +3VS
24 24 +3VS
FPC_CON_24P
1

@ @ 12V18AWSM027
C6412 C6413 C6414 Update for EMI 20161104

需需
0.1UF/16V 10PF/50V 10PF/50V
2

R1.1 EMI

Update for EMI 20161104


RNX6401B4 3 USB_PN5_20_C +5VSUS
23 USB_PN5_20 0Ohm
USB_PN5_20_C

4
09V090000019 USB_PP5_20_C
B
90ohm B
LX6401
@
2

1
RNX6401A2 1 USB_PP5_20_C
23 USB_PP5_20 0Ohm
D6401 D6402 D6403
AZ5725-01F AZ5725-01F AZ5725-01F

07V180000049 07V180000049 07V180000049

2
RNX6402B4 3 USB_PN8_CR_C @/EMI @/EMI @/EMI
23 USB_PN8_CR 0Ohm
EMI Solution
Close To Connector
1

09V090000019
90ohm
LX6402 GND
@
2

RNX6402A2 1 USB_PP8_CR_C
23 USB_PP8_CR 0Ohm

A A

Title : IO Board
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
B SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 64 of 94
5 4 3 2 1
5 4 3 2 1

DB G-Sensor
Sensor HUB Power Decouple +3VS_SENSOR
+3VS +3VS 3,4,20,21,22,23,24,30,31,32,36,41,44,45,48,49,50,51,53,56,57,62,64,91,92

+3VS +3VS_SHB +3VS +3VS_SENSOR +3V +3V 25,31,45,57,63,91


L6550
120Ohm/100Mhz

1
1 2 R6550 2 1 0Ohm
R6508 R6509

2
/sensor +3V /sensor 4.7KOhm 4.7KOhm
C6584 C6501 C6502 C6503 C6504 C6505 /sensor /sensor
+3V L6552 10UF/6.3V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V R6551 2 1 0Ohm RN6503A /sensor

2
I2C_SCL_MB 1 I2C_SCL_MB_SLG
120Ohm/100Mhz /sensor /sensor /sensor /sensor /sensor /sensor 0Ohm 2
1 2 I2C_SDA_MB 3 I2C_SDA_MB_SLG
@ 0Ohm 4
/sensor
@ GND RN6503B

Ruby 20141027

D D

ITE8350 Sensor HUB


+3VS
Before Tapping 20161227 R1.0 Kai
+3VS_SENSOR Connec USB Hub to SHB / Touch
/sensor Q6501

1
T6504 1 AK_RST# SHB_GPIO_G2 +3VS_SENSOR_R R6455 2 1 0Ohm USB_HUB_U20_PP1_SHB_SHBR6502 2 /sensor 1 0Ohm
RUM003N02 USB_HUB_U20_PP1_SHB 63

1
G
2

2
07V040000117 USB_HUB_U20_PN1_SHB_SHBR6506 2 /sensor 1 0Ohm

I2C_SCL_MB_SLG
Sensor_Detect USB_HUB_U20_PN1_SHB 63
@ C6463 C6485 @
RN6502A1 2 USB_HUB_U20_PP1_SHB_SHB 0.1UF/16V 0.1UF/16V
0Ohm

1
/sensor /sensor LID_INI# 3 2 LID_INI#_C I2C_SCL_SEN_SHB R6517 2 /sensor 1 0Ohm

S 2
D3
SENSOR_INT I2C_SCL_SEN_S 21

3
GND GND I2C_SDA_SEN_SHB R6518 2 /sensor 1 0Ohm
I2C_SDA_SEN_S 21
L6505
67Ohm/100Mhz U6403.1 Slave Address: LID_INI# R6510 2 /sensor 1 0Ohm
LID_INI#_C 22
RN6501A /sensor Pull Up 0x19 (W: 0x32, R: 0x33)

2
I2C_SCL_SEN @1 +3VS LID_STAT0
0Ohm 2 R6511 2 /sensor 1 0Ohm

12

11
I2C_SDA_SEN USB_HUB_U20_PN1_SHB_SHB LID_STAT0_C 22
@3 0Ohm 4 3 0Ohm 4 U6503
RN6502B LID_STAT1 R6512 2 /sensor 1 0Ohm

SCX

PS
LID_STAT1_C 22
RN6501B @ U6403.1 Slave Address:
to CPU I2C 1 10 Pull Down 0x18 (W: 0x30, R: 0x31) LID_STAT2 R6513 2 /sensor 1 0Ohm
48
47
46
45
44
43
42
41
40
39
38
37

Q6502 LID_STAT2_C 22

1
U6501 I2C_SDA_MB_SLG 2 SDO CSB 9
SDX GND RUM003N02 G_X_SHB
3 8 R6514 2 /sensor 1 0Ohm

1
SMDAT0/GPB4
SMCLK0/GPB3
TXD/SOUT0/GPB1
RXD/SIN0/GPB0
FSCK/GPG7
GPG6
FMISO/GPG5
FMOSI/GPG4
FSCE#/GPG3
SSCE0#/GPG2

GPH5/ID5/DM
GPH6/ID6/DP

G_X 22

G
4 VDDIO GNDIO 7 07V040000117
+3VS_SHB NC VDD @ G_Y_SHB R6515 2 /sensor 1 0Ohm

INT1

INT2
G_Y 22
LID_STAT0 3 2 LID_STAT0_C SHB_RST# R6516 2 /sensor 1 0Ohm

S 2
D3
SHB_RST#_CPU 22
BMA250E

6
1 36 06V910000013
LID_SW#_S +3VS_SHB VSTBY1 VSTBY6
2 35 /Sensor
LID_INI# SMCLK2/GPF6 VSS3 GND
3 34
4 SMDAT2/GPF7 AVSS 33 +3VS

ACC_INT
+3VS_SHB VSTBY2 AVCC
5 32 R6503 2 /sensor 1 100KOhm
GND VSS1 ADC5/GPI5 GND
6 31 R6504 2 /sensor 1 100KOhm GND GND
7 PWRSW/GPE4 ADC4/SMINT3/GPI4 30 R6505 2 /sensor 1 100KOhm
+3VS_SHB SHB_RTCX1 VSTBY3 ADC3/SMINT2/GPI3 ACC_BD_INT
8 29 Q6504
2

1
SHB_RTCX2 9 CK32K/GPJ6 ADC2/SMINT1/GPI2 28 ACC_INT
CK32KE/GPJ7 ADC1/SMINT0/GPI1 SHB_RST# RUM003N02
R6577 10 27

1
PWM5/SMDAT5/GPA5

G
PWM4/SMCLK5/GPA4

0Ohm WRST# 11 VCORE ADC0/GPI0 26 07V040000117


WRST# JTMSC
1

PWM6/SSCK/GPA6

@ 12 25 @
C6509 SMDAT4/GPE7 SMISO/GPC5

12V17GISM003
1

SMCLK4/GPE0

0.1UF/16V LID_STAT1 3 2 LID_STAT1_C

S 2
SMOSI/GPC3

D3
2

PWM1/GPA1
PWM0/GPA0

GND /sensor +3VS_SHB


VSTBY4

VSTBY5

GND +3VS_SENSOR
JTCKC

+3VS_SHB
VSS2

C CON6501 C
32.768KHz Crystal Reset
2

7
NC

/sensor
R6552 R6554 2 1 0Ohm 1 SIDE1
I2C_SDA_MB C6510 +3VS_SHB +3VS I2C_SCL_MB_SLG 2 1
IT8350E-128/CX-001U 10KOhm
13
14
15
16
17
18
19
20
21
22
23
24

2
06V130000032 @ SHB_RTCX1 1 2 I2C_SDA_MB_SLG 3
GND 3
/sensor R6562 R6561 4
to device
1

I2C_SCL_MB Sensor_Detect ACC_BD_INT 5 4


100KOhm 1.5KOhm 5

2
G_X_SHB 22PF/50V 6
Q6505

1
GND /sensor R6507 D6501 @ /sensor 6 8

2
RUM003N02

1
SIDE2
2

assert low to disable keyboard while X6501 100KOhm SHB_GPIO_G2

1
RB751V-40

G
R6553 R6452 Mount Sensor IC /sensor /sensor USB_HUB_U20_PP1_SHB_SHB 07V040000117 WTOB_CON_6P
panel open excee the angle setting 32.768Khz
KXTJ2-1009 @

1
10KOhm /sensor

2
@ WRST#
G_Y_SHB /sensor C6511 LID_STAT2 3 2 LID_STAT2_C
+3VS_SHB
+3VS_SHB

S 2
D3
1

1
Sensor_IC SHB_RTCX2 1 2 R6563
LID_STAT1 GND
R6453 Mount BMA250E(222E) C6512 100KOhm
LID_STAT2 1UF/6.3V /sensor

1
LID_STAT0 GND 27PF/50V /sensor
/sensor +3VS GND
GND

Q6506

1
RUM003N02

1
G
07V040000117
@
G_X_SHB 3 2 G_X

S 2
D3
+3VS_SHB
+3VS_SHB
+3VS_SHB
Reserve for I2C SENSOR HUB +3VS
+3VS_SHB

2
LID_STAT2 R6589 2 /sensor 1 2.2KOhm
R6532
1

LID_STAT1 R6588 2 /sensor 1 2.2KOhm


10KOhm Q6507

1
R6501 /sensor RUM003N02
2

100KOhm LID_STAT0 R6586 2 /sensor 1 2.2KOhm

1
1

G
@ R6541 07V040000117
SHB_RST# LID_INI# R6585 2 /sensor 1 2.2KOhm @
10KOhm
2

/sensor
D6502 G_X_SHB 2 /sensor 1 2.2KOhm G_Y_SHB 3 2 G_Y
R6530
To EC

S 2
D3
1

1
1 2 SENSOR_INT
22 SENSOR_INT_CPU G_Y_SHB 2 /sensor 1 2.2KOhm
R6598 R6531
@ 100KOhm
RB751V-40 +3VS_SHB LID_SW#_S D6503 1 2 RB751V-40 @
LID_SW# 30,31,45,67

2
B /sensor B

+3VS
2

R6556 R6557
2.2KOhm 2.2KOhm
Q6503A @
UM6K1NG1DTN @
1

1
2

@
PU resistor in page21
G

I2C_SCL_SEN_SHB 1 6 I2C_SCL_SEN
S

D
S

I2C_SDA_SEN_SHB 4 3 I2C_SDA_SEN
G

Q6503B
UM6K1NG1DTN
5

Need to check Body diode direct.


+3VS

A A

<Variant Name>

Title :G-Sensor
PEGATRON PROPRIETARY AND CONFIDENTIAL
Engineer: James_Liao
Size Project Name Rev
D SU4EA 1.0

Date: Friday, March 10, 2017 Sheet 65 of 94


5 4 3 2 1
5 4 3 2 1

66 IO Board POWER LED

Card Reader POWER LED


+5VSUS_PWR

+5VA_I +5VSUS_PWR
@ SD_CLK_I IR04 1 2 0Ohm SD_CLK_CC_I

1
USB2_PP8_CR_I 3 4 IRN01B USB2_PP8_CR_R_I IC20
0Ohm

1
IR20 1 @ 2 0Ohm 0.1UF/16V
IC08 @
ID20

2
20170105 R1.0 Kai Close Chip 4.7UF/6.3V +5VSUS_I ILED01

2
EMI request 1 2
GND_IO
1
correct location / mount parts / change parts @ GND_IO

3
D 09V090000019 D
GND_IO IR21 1 2 0Ohm
/EMI 20170106 R1.0 Kai AZ5725-01F
90ohm
ICM01
SWAP ICM01 for layout 20mA 07V180000049 PWR_BLUE_LED#_I IR24 1 2 2.7KOhm PWR_BLUE_LED#_R 2 BLUE

@/EMI
1

4
20170111 R1.0 Kai +3V_CARD_I 20170109 R1.0 Kai
EMI request, mount ICM01 / unmount IRN01 Fix SD Conn. lock function PWR_ORG_LED#_I IR25 1 2 2.1KOhm PWR_ORG_LED#_R 3 ORANGE

@ BLUE&ORANGE

2
USB2_PN8_CR_I 1 2 IRN01A USB2_PN8_CR_R_I

Power Budget is around 400mA.


0Ohm
IR06
10KOhm
IR07
10KOhm Charger LED +5VSUS_CHG
07V130000088

@
Charger LED

1
+3VS_I +3VS_CR_I SD_WP#_I
400mA

3
IR05 1 2 0Ohm 3
D

1
IQ01 IC21
2N7002 0.1UF/16V
IT01 1 XD_D7_I SP14_I 1 IT02 SD_WP#_I_CONN 11 @
R1.1

2
V18_I SD_D2_I G ILED02
SD_D3_I 2 S +5VA_I +5VSUS_CHG 1

2
SP11_I 1 IT08 GND_IO
1

IC02 20mA
1UF/6.3V IR22 1 2 0Ohm
Close to connector ID21 CHG_BLUE_LED#_I CHG_BLUE_LED#_R
GND_IO IR26 1 2 2.7KOhm 2

25
24
23
22
21
20
19
BLUE
2

IU01A GND_IO +5VSUS_I 1 2


GND_IO

V18
XD_D7
SP14
SP13
SP12
SP11
GND IR08 1 @ 2 0Ohm CHG_ORG_LED#_I IR27 1 2 2.1KOhm CHG_ORG_LED#_R 3 ORANGE

GND_IO IR23 1 2 0Ohm AZ5725-01F


1 2 RREF_CR_I 1 18 SD_CMD_I 07V180000049 BLUE&ORANGE
USB2_PN8_CR_R_I 2 RREF SP10 17 GPIO_I IT04 1 @
DM GPIO0 @/EMI 07V130000088
IR01 USB2_PP8_CR_R_I 3 16 SP9_I IT05 1
6.2KOhm +3VS_CR_I 4 DP SP9 15 SD_CLK_I
Close to chip GND_IO 1% +3V_CARD_I 5 3V3_IN SP8 14 SP7_I IT06 1
SDREG_I 6 CARD_3V3 SP7 13 SD_CD#_I
SDREG SP6
XD_CD#
SP1
SP2
SP3
SP4
SP5
1

C IC09 C
1UF/6.3V
IU01B Close to connector RTS5170_GR +5VSUS_I
IC45
2

7
8
9
10
11
12

26
27 GND1 2 1 12V18AWSM027
GND2 XD_CD#_I SP5_I 1 GND_IO FPC_CON_24P
28 1 IT07
29 GND3 GND_IO IT09 SD_WP#_I SD_D0_I +5VA_I 1
GND4 1 SP2_I SD_D1_I 0.1UF/16V 2 1 GND_IO

P12
P13
RTS5170_GR IT03 @ 3 2
ICON01 4 3 25
GND_IO SD_WP#_I_CONN P11 5 4 SIDE1

GND1
GND2
SD_D1_I P10 W/P USB_EN_I 6 5
SD_D0_I P9 DAT1 USB_OC2# 7 6
DAT0 7

1
+3V_CARD_I P8 8
SD_CLK_CC_I P7 VSS2 IC51 USB2_PP1 9 8
+3V_CARD_I +3V_CARD_I P6 CLK USB2_PN1 10 9
0.1UF/16V

2
P5 VDD 11 10
+3VS_CR_I SD_CD#_I VSS1 @ USB2_PP8_CR_I 11
P4 12
SD_CMD_I P3 CD USB2_PN8_CR_I 13 12
SD_D3_I CMD 13

GND3
GND4
P2 14
SD_D2_I P1 DAT3 GND_IO 15 14
DAT2 15
1

IC03 IC04 16
16
1

IC10 IC01 4.7UF/6.3V 0.1UF/16V SD_SOCKET_11P 17

P15
P14
4.7UF/6.3V 0.1UF/16V GND_IO 18 17
2

Close to connector CHG_ORG_LED#_I 19 18 26


Pin 4 Pin 4
2

Close to chip CHG_BLUE_LED#_I 20 19 SIDE2


Close to connector 12V21GBSM024 PWR_BLUE_LED#_I 21 20
GND_IO +3VS_I PWR_ORG_LED#_I 22 21
23 22
20170111 R1.0 Kai 24 23
24
GND_IO
Vendor request, reserve IR29~IR34 GND_IO
ICON03
Share PinSD_WP#_I

1
IC46
SD_WP#_I IR29 1 @ 2 0Ohm SD_D1_I 0.1UF/16V

2
SD_D1_I IR30 1 @ 2 0Ohm SD_D0_I
SD_D0_I 1 2 SD_CD#_I @
IR31 @ 0Ohm
SD_CMD_I IR32 1 @ 2 0Ohm SD_CLK_I
B SD_D3_I SD_CMD_I B
IR33 1 @ 2 0Ohm
SD_D2_I IR34 1 @ 2 0Ohm SD_D3_I GND_IO
SD_D2_I

GND_IO

USB 2.0
+5V_USB_IO 20161228 R1.0 Kai
+5VSUS_I
IU02 +5V_USB_IO ICON04
Change IOH1 from s04030 to T-SH00004783
5 1 5
IN OUT 2
1A 1 P_GND1 7
GND VBUS P_GND3
1

4 3 USB2_PN1_R_I 2
EN/EN# OC# D-
1

IC49 USB2_PP1_R_I 3 IOH1 IOH5


+ D+
1

IC54 G524D1T11U GND_IO 0.1UF/16V ICE01 IC16 IC17 IC18 IC12 IC19 IC11 4 8 1 1
2

1UF/6.3V 100UF/6.3V GND P_GND4 6


22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 0.1UF/16V RT380X480CB256D98 C98D98N
2

SD_D1_I vx_c3528_sanyo_h79 P_GND2


2

@ USB_CON_1X4P
GND_IO 12V13GBSD037 IOH3
GND_IO 1
GND_IO GND_IO GND_IO IOH4 O118X98DO118X98N
1
RT413x305CB256D98
+5V_USB_IO
USB_EN_I IR12 1 2 1KOhm IR13 1 1% 2 1KOhm USB_OC2#
USB2_PN1_R_I
1

GND_IO
1

IC55 USB2_PP1_R_I
0.1UF/16V IC13
2

A N/A 0.1UF/16V A
2

ID06 ID07 ID08


GND_IO GND_IO AZ5425-01F AZ5425-01F AZ5725-01F
07V180000016 07V180000016 07V180000049
/EMI /EMI /EMI
1

USB2_PN1 1 2 IRN02A @ USB2_PN1_R_I


0Ohm
2

N/A
IL02 Update for EMI 20161104
EMI Solution
Close To Connector
Title : IO Board
90Ohm/100Mhz PEGATRON PROPRIETARY AND CONFIDENTIAL
09V090000015 Engineer: James_Liao
3

BG1-HW3 RD
USB2_PP1 3 4 IRN02B @ USB2_PP1_R_I GND_IO Size Project Name Rev
0Ohm
1213-017L000
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 66 of 94
5 4 3 2 1
5 4 3 2 1

67
D
LID Switch 14 inch D

+3VA

+3VA
9mA U6701 LID_SW#
1 R6709 2 +3VA_R 1
Vdd

2 VC

2 VC
0Ohm 3
GND
/14inch 2
2
C6709 OUTPUT
0.1UF/16V U6704 U6705
1

AH180-WG-7 AZ5725-01F AZ5725-01F


/14inch 06V340000001 @ @
/14inch

GND 1

GND 1
C 30,31,45,65 LID_SW# C

LID Switch 15 inch


+3VA

9mA U6702
1 R6710 20Ohm +3VA_R_15 1
Vdd 3
GND +3VA
/15inch
2

B 2 LID_SW# B
C6710 OUTPUT

2 VC

2 VC
0.1UF/16V
1

AH180-WG-7
/15inch 06V340000001
/15inch
U6706 U6707
AZ5725-01F AZ5725-01F
@ @

LID_SW#

GND 1

GND 1
A A

Title : Sensor Board


PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW3 RD Engineer: James_Liao


Size Project Name Rev
B SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 67 of 94
5 4 3 2 1
5 4 3 2 1

68 ME Hole
靠靠M.2 CONN R1.1
鎖IOPORT SHIELDING螺螺橢 2.5X3.0 橢橢橢 CPU NUT
H6801 H6802 H6803 H6804
20161230 R1.1 Kai
1
H6855 Connect PTH to GND H6825
2 1 H6819 H6820 1 CT217B140D110 CT217B140D110 CT217B140D110 CT217B140D110
3 2 1 1
D 3 C98D98N N/A N/A N/A N/A D
4 S256D98 S256D98
NP_NC temp_5262_gh15 1308-00LG000 1308-00LG000 1308-00LG000 1308-00LG000
SUPPORT_METAL_3P

Main shielding 定定定 2.5 橢橢


H6821
H6833 H6832 1

1
NP_NC GND8
9 1
GND NP_NC
2
O118X98DO118X98N
T-SH00000687
R1.1
2 8
3 GND1 GND7 7
4 GND2 GND6 6 D110_D98x118N
GND3 GND5 5
GND4

CRTBD98N
Main Shielding NUT
H6829 H6834

Audio Jack 下橢 斷斷橢 主主PTH定 N/A


CT217B140D110

1308-00LG000
N/A
1308-00LG000
CT217B140D110

H6857
1
C CT283SB315D118 C
H6836
H6835 1
1 P_GND
st335sb394d118 2 32
3 NP_NC2 NP_NC32 33
4 NP_NC3 NP_NC33 34
5 NP_NC4 NP_NC34 35
6 NP_NC5 NP_NC35 36
7 NP_NC6 NP_NC36 37
8 NP_NC7
NP_NC8
NP_NC37
NP_NC38
38 20161228 R1.0 Kai
9
NP_NC9 NP_NC39
39 Remove H6856
10
NP_NC10 NP_NC40
40 Connect H6857 to GND
11
12 NP_NC11 NP_NC41
41
42
Remove clip x1 (CON6825)
13 NP_NC12 NP_NC42 43
14 NP_NC13 NP_NC43 44
15 NP_NC14 NP_NC44 45
16 NP_NC15 NP_NC45 46
NP_NC16 NP_NC46
17 47
18 NP_NC17 NP_NC47 48
19 NP_NC18 NP_NC48 49
20 NP_NC19 NP_NC49 50
21 NP_NC20 NP_NC50 51
22 NP_NC21 NP_NC51 52
23 NP_NC22 NP_NC52 53
24 NP_NC23 NP_NC53 54
25 NP_NC24 NP_NC54 55
26 NP_NC25 NP_NC55 56
27 NP_NC26 NP_NC56 57
28 NP_NC27 NP_NC57 58
29 NP_NC28 NP_NC58 59
30 NP_NC29 NP_NC59 60
31 NP_NC30 NP_NC60 61
NP_NC31 NP_NC61

S394D118
B B

Clip

CON6801 CON6805 CON6809 CON6813 CON6817 CON6821


1 1 1 1 1 1
2 1 2 1 2 1 2 1 2 1 2 1
3 2 3 2 3 2 3 2 3 2 3 2
3 3 3 3 3 3
MA090-002M110P MA090-002M110P MA090-002M110P MA090-002M110P MA090-002M110P MA090-002M110P

CON6802 CON6806 CON6810 CON6814 CON6818 CON6822 CON6826


1 1 1 1 1 1 1
2 1 2 1 2 1 2 1 2 1 2 1 2 1
3 2 3 2 3 2 3 2 3 2 3 2 3 2
3 3 3 3 3 3 3
MA090-002M110P MA090-002M110P MA090-002M110P MA090-002M110P MA090-002M110P MA090-002M110P MA090-002M110P

CON6803 CON6807 CON6811 CON6815 CON6819 CON6823 CON6827


1 1 1 1 1 1 1
2 1 2 1 2 1 2 1 2 1 2 1 2 1
3 2 3 2 3 2 3 2 3 2 3 2 3 2
3 3 3 3 3 3 3
A A
MA090-002M110P MA090-002M110P MA090-002M110P MA090-002M110P MA090-002M110P MA090-002M110P MA090-002M110P

CON6808 CON6816 CON6820 CON6824 CON6828


1 1 1 1 1 CON6829
2 1 2 1 2 1 2 1 2 1 1
3 2 3 2 3 2 3 2 3 2 2 1
3 3 3 3 3 3 2
MA090-002M110P MA090-002M110P MA090-002M110P MA090-002M110P MA090-002M110P 3
MA090-002M110P

Title : ME Hole
PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW3 RD Engineer: James_Liao


Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 68 of 94
5 4 3 2 1
5 4 3 2 1

69 Finger printer Close to CON6901

USB_PP_POA_C RNX6904B4 3 N/A


0Ohm USB_PP9_FP 23

+5VS +5VS_FP

3
D D
LX6901
R6920 2 N/A 1 0Ohm 90OHM/100MHz
@ 09V090000022

2
1
C6902
0.1UF/16V 10% USB_PN_POA_C RNX6904A2 1 N/A
0Ohm USB_PN9_FP 23
vx_c0402_small

2
N/A
R1.1

+5VS_FP
CON6901 Pin Definition
FPC_CON_6P 1 +FP_VCC
8 6 2 USBP
SIDE2 6 5 USB_PP_POA_C 3 USBN
5 4 USB_PN_POA_C 4 GND
4 3 5 NC
3 2 6 NC
7 2 1
C SIDE1 1 C

2 VC

2 VC

2 VC
@ @ @
U6905 U6906 U6907

AZ5725-01F

AZ5725-01F

AZ5725-01F
GND 1

GND 1

GND 1
B B

A A

Title : Finger printer


PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
B SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 69 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

GPU--PCIE
A
Title : A

PEGATRON PROPRIETARY AND CONFIDENTIAL


BG1-HW3 RD Engineer: James_Liao
Size Project Name Rev
A SU4EA 1.0

Date: Sheet 70 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title :GPU--DISPLAY
PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW3 RD
Engineer: James_Liao
Size Project Name Rev
Custom 1.0
SU4EA
Date: Friday, March 10, 2017 Sheet 71 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

GPU--MEM_CTRL_CHA
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW3 RD
Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0

Date: Friday, March 10, 2017 Sheet 72 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title :GPU--MEM_CTRL_CHB
PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW3 RD
Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0

Date: Friday, March 10, 2017 Sheet 73 of 94


5 4 3 2 1
A B C D E

1 1

2 2

3 3

4 4

5 5

Title :GPU--STRAP/MISC
PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW3 RD
Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0

Date: Friday, March 10, 2017 Sheet 74 of 94


A B C D E
5 4 3 2 1

D D

C C

B B

A A

Title :(1)GPU--POWER/GND
PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW3 RD
Engineer: James_Liao
Size Project Name Rev
Custom SU4EA
1.0
Date: Friday, March 10, 2017 Sheet 75 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : (2)GPU--Thermal/JTAG/SEQ
PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW3 RD
Engineer: James_Liao
Size Project Name
Custom James_Liao Rev

1.0
Date: Friday, March 10, 2017 Sheet 76 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title :GPU--MEM CHA


PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW3 RD
Engineer: James_Liao
Size Project Name Rev
C
SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 77 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title :GPU--MEM CHB


PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW3 RD
Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 78 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

TitleGPU-POWER
: FLOW
PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW3 RD
Engineer: James_Liao
Size Project Name Rev
C SU4EA 1.0
Date: Friday, March 10, 2017 Sheet 79 of 94
5 4 3 2 1
5 4 3 2 1

VR_SVID_DATA

VCORE & VCCGT & VCCSA POWER SUPPLY


VR_SVID_ALERT#
Iin=2.25A U22 U42
VR_SVID_CLK SR8016 R8062 C8047 VCCGT VCCGT
+AC_BAT_SYS
VR_HOT#
1 2 2.2Ohm 0.22UF/25V VID1 : 0.9V VID1 : 0.9V
SR8017 vx_r0603_h28_small vx_c0603_small Vboot : 0V Vboot : 0V
1 2 1% 10%
92 VRM_PWRGD Iccmax = 31A Iccmax = 28A

1
SR8018 1 2VCCGT_BST_R 2 1 C8058 @ C8050 C8065 C80144
1 2 1000PF/50V 10UF/25V 10UF/25V 10UF/25V PL2 TDC =18A PL2 TDC =12A
CPU_VRON
vx_c0402_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small LL=3.1mV/A LL=3.1mV/A

2
VCCGT_BST 5% X5R/+/-20% X5R/+/-20% X5R/+/-20%
93 CPU_VRON_PWR
Output Cap. Output Cap.

32

33
22uF/6.3V*28pcs 22uF/6.3V*28pcs
+5VS 470uF/2V*1pcs 470uF/2V*1pcs

VIN2

PGND1
SR8001 8 T8004 L8001
nb_r0603_short_32mil_small 7 VIN1 16 TPC28T 0.15uH
2 1 6 PHASE SW1 17 Irat=37A
+5VS NC2 SW2

1
C80145 5 18 VCCGT_LX 1 2
RIMON +VCCGT

1
BOOT SW3

2
R8004 470PF/50V C8011 R8076 4 19
91KOhm vx_c0402_small 1Ohm 3 NC1 SW4 20
1UF/6.3V
VCC SW5 DCR=0.9mohm

1
vx_r0402_small 10% vx_c0402_small vx_r0402_small FCCM_A 2 21 063T

1
1% 1 2 X5R/+/-10% 1% PWM_A 1 FCCM SW6 22 R8056 @ + CE8002

2
D
1 2 PWM SW7 23 2.2Ohm 470uF/2V D

PGND2
SW8

2
AGND

PVCC

SW11
SW10
R8070 vx_r0805_h24_small vx_c7343d_apaq_t03
+AC_BAT_SYS

SW9
NC4
NC3
GL2

GL1
12.1KOhm 1% 5%

3
2
1

2
vx_r0402_small C8023 C8009 VCCGT_RC
2 1 0.22UF/25V 1UF/25V U8003A

35
34
31
30
29
28
27
26
25
24

1
C8027 1 2 vx_c0603_small vx_c0402_h24_small SIC634CD-T1-GE3 C8029 @ JP8006 JP8003

1
22PF/50V X7R/+/-10% X5R/+/-10% 1500PF/50V R8049 SHORT_PIN SHORT_PIN

1
vx_c0402_small C8005 R8091 @ R8090 @ vx_c0402_small 3.65K

2
5% 330PF/50V 220KOhm 1% 13KOhm 1% X7R/+/-10% vx_r0603_h24_small
1 2 vx_c0402_small vx_r0402_small vx_r0402_small 1%

1
10% 1 2 1 2 ISUMP_A 1 2 VCCGT_LX_S

1
R8012 R8024
C8024 R8072 220KOhm R8018 100KOhm ISUMN_A 1 2 VCCGT_S

1
8200PF/16V 4.3KOhm 1% 9.31KOhm vx_r0402_small C80140
vx_c0402_small vx_r0402_small 1 2 vx_r0402_small 1% 1UF/25V R8053

2
X7R/+/-10% 1% 1% Rip Cip vx_c0402_h24_small 1Ohm

2
1 2 1 2 R8029 C8036 X5R/+/-10% vx_r0402_small

41
40
39
38
37
36
35
34
33
32
31
1KOhm 2.2NF/50V 1%

1
vx_r0402_small vx_c0402_small C8041

GND
VR_ENABLE
VR_READY
VR_HOT#
SCLK
ALERT#
SDA
VCC
VIN
PROG1
PROG2
T8002
2

1% X5R/+/-10% 0.1UF/25V

2
R8021 1 2 1 2 vx_c0402_small TPC22T

2
2

1
499Ohm R8022 1 30 PWM_C X7R/+/-10% C8062 C80102 C80106 @ C8068 C80112 C8089 C80113 C80119 C80114 C8055 C8091 C8090
R8010 @ vx_r0402_small R8019 2KOhm 2 PSYS PWM_C 29 FCCM_C 1 2 ISUMN_C 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

1
100Ohm 1% 1.74KOhm vx_r0402_small 3 IMON_B FCCM_C 28 X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20%
2 1

2
vx_r0402_small vx_r0402_small 1% 4 NTC_B ISUMN_C 27 R8034 vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small

2 1
2 1 C8020 1% 5 COMP_B ISUMP_C 26 422Ohm SR8019
+VCORE Ri
1

FB_B RTN_C

1
1000PF/50V C8021 6 25 vx_r0402_small nb_r0402_short_5mil_small
vx_c0402_small 330PF/50V 7 RTN_B FB_C 24 1% R8043 RNTC
1

1 2 10% vx_c0402_small 8 ISUMP_B COMP_C 23 10KOHM


VCORE_VCCSENSE RN
1
10% 9 ISUMN_B IMON_C 22 PWM_A vx_r0402_h24_small

ISUMN_A
ISUMP_A
ISEN1_B PWM_A

1
PWM1_B
PWM2_B

COMP_A
FCCM_A

FCCM_B
SR8007 10 21 C80148 @ 5%

IMON_A
NTC_A

RTN_A

1 2
ISEN2_B FCCM_A
2

1
nb_r0402_short_5mil_small C8002 @ C8017 @ CN2 6800PF/25V The R8043 C8064 C8056 C8060 C8067 @ C80125 C80118 C80121 C80117 C8087 C8092 C80105 C8084

FB_A

1
0.01UF/16V 0.01UF/16V C8038 vx_c0402_small R8036 RP RNTCS closes to 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

2
SR8008 vx_c0402_small vx_c0402_small 4700PF/50V X7R/+/-10% CN1 11KOhm R8039 L8002 X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20%
1

2
1
nb_r0402_short_5mil_small 10% 10% U8000A vx_c0402_small C8043 vx_r0402_small 4.7KOhm for VCCSA vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small

11
12
13
14
15
16
17
18
19
20

2
VCORE_VSSSENSE
1 2 ISL95859AHRTZ X7R/+/-10% 0.068UF/25V 1% vx_r0402_small
vx_c0402_small_t01 1%

2
2

R8013 @ C8012 X5R/+/-10%


100Ohm 0.01UF/16V ISUMP_C

2
vx_r0402_small vx_c0402_small RIMON SR8010
1

1
2 1 10% R8003 C8000 1 2 VCCSA_VSSSENSE

1
95.3KOhm 330PF/50V C8086 C8085 C8083 C8066 C8073 C8074
vx_r0402_small vx_c0402_small nb_r0402_short_5mil_small 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

2
1% 10% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20%

2
ISUMP_B R8014 R8015 SR8009 vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small

2
1KOhm Rdroop 301Ohm 1 2
CN1 vx_r0402_small R8025 vx_r0402_small VCCSA_VCCSENSE
1

RNTCS C8042 R8063 /U22 1% 1.74KOhm 1% nb_r0402_short_5mil_small

1 1
2

R8040 0.027UF/25V 0Ohm vx_r0402_small C8004 @

2
4.7KOhm vx_c0402_small vx_r0402_0ohm_small 1% C8022 0.01UF/16V
2

1
2

2
vx_r0402_small X7R/+/-10% C8039 @ ISEN2_B 1 2 R8074 C8006 1000PF/50V vx_c0402_small
RP +5VS
1% R8037 0.22UF/16V 4.3KOHM 220PF/50V vx_c0402_small 10%
Iin=2.625A

2
1
11KOhm vx_c0402_small C80127 vx_r0402_small vx_c0402_small 10% 2 1
U22 U42
2 1

1
2

RNTC vx_r0402_small CN2 X7R/+/-10% 18PF/50V 1% 10% R8006 /U42 C80153 /U42
+AC_BAT_SYSVCORE VCORE

1 1
1

2
The R8042 1% C80146 R8064 /U22 vx_c0402_small 2.2Ohm 0.22UF/25V
1

2
closes to R8042 RN 0.047UF/25V 0Ohm 5% C80126 C8008 @ C8014 R8016 @ vx_r0603_h28_small vx_c0603_small VID1 : 0.9V VID1 : 0.9V
L8000 10KOHM vx_c0402_small vx_r0402_0ohm_small 6800PF/25V 220PF/50V 220PF/50V 100Ohm 1% 10% VBoot : 0V VBoot : 0V
2

1
C vx_r0402_h24_small X7R/+/-10% ISEN1_B 1 2 vx_c0402_small vx_c0402_small vx_c0402_small vx_r0402_small 1 2VCORE2_BST_R 2 1 C80151@ C80141 /U42 C80143 /U42 C
for +VCORE +5VS Iccmax = 29A Iccmax = 64A
1

1
5% SR8004 X7R/+/-10% 10% 10% 1% 1000PF/50V 10UF/25V 10UF/25V
1

1
nb_r0402_short_5mil_small Ri vx_c0402_small vx_c0603_h39_small vx_c0603_h39_small PL2 TDC=21A PL2 TDC=42A

2
2
ISUMN_B 1 2 VCORE2_BST X5R/+/-20% X5R/+/-20% LL=2.4mV/A LL=2.4mV/A
5%
1

C80133 /U42 R8023 @


1

C8044 R8033 0.022UF/16V Rip Cip 100Ohm

32

33
T8001 0.1UF/25V 442Ohm vx_c0402_small R8031 C8035 vx_r0402_small Output Cap. Output Cap.
2

TPC22T vx_c0402_small vx_r0402_small 10% 1KOhm 2200PF/50V 1% +5VS 22uF/6.3V*30pcs 22uF/6.3V*30pcs

VIN2

PGND1
2

1
X7R/+/-10% Rip 1% Cip vx_r0402_small vx_c0402_small 8 T8007 L8003 /U42 470uF/2V*2pcs
1 2 1 2 1% 10% 7 VIN1 16 TPC28T 0.15uH
1 2 2 1 6 PHASE SW1 17 Irat=37A
+VCCSA NC2 SW2

1
R8030 C8033 5 18 VCORE2_LX 1 2
+VCORE

1
2.49KOhm 2200PF/50V R8051 /U42 4 BOOT SW3 19
Ri NC1 SW4

1
vx_r0402_small vx_c0402_small R8032 C8040 1Ohm 3 20 DCR=0.9mohm
T8000 VCC SW5
1

1
1% 10% C80134 /U42 422Ohm 0.1UF/25V vx_r0402_small FCCM_B 2 21
PWM2_B FCCM SW6 063T
0.022UF/16V vx_r0402_small vx_c0402_small TPC22T 1% 1 22 R8092 @ + CE8000 /U42

2
vx_c0402_small 1% X7R/+/-10% PWM SW7 23 2.2Ohm 470uF/2V

PGND2
2

SW8

2
ISUMN_A

AGND
1 2

PVCC

SW11
SW10
10% vx_r0805_h24_small vx_c7343d_apaq_t03

SW9
1

NC4
NC3
GL2

GL1
5%

3
2
2
C80142 /U42 VCORE2_RC
SR8006 1UF/25V U8006A/U42

35
34
31
30
29
28
27
26
25
24
2

1
nb_r0402_short_5mil_small vx_c0402_h24_small SIC634CD-T1-GE3 C80154 @ JP8009 JP8008

1
1
X5R/+/-10% 1500PF/50V SHORT_PIN SHORT_PIN

1
RN R8041 RNTC vx_c0402_small

2
10KOHM X7R/+/-10% R8007 /U42
FCCM_B vx_r0402_h24_small 3.65K
CN2

1
2

1
C8037 @ C80147 5% vx_r0603_h24_small

1 2
PWM1_B 0.22UF/16V 0.047UF/25V The R8041 1%

1
vx_c0402_small vx_c0402_small ISUMP_B 1 2
CN1 RP RNTCS closes to
1

1
PWM2_B X7R/+/-10% X7R/+/-10% C8045 R8035 R8038 C80132 /U42
L8001
0.027UF/25V 11KOhm 4.7KOhm for +VCCGT 1UF/25V R8008 /U42
vx_c0402_small vx_r0402_small vx_r0402_small vx_c0402_h24_small 100KOhm

2
X7R/+/-10% 1% 1% X5R/+/-10% vx_r0402_small

2
1%
ISUMP_A ISEN2_B 1 2 VCORE2_LX_S
1
2

C8003 R8001 ISUMN_B 1 2 VCORE2_S


330PF/50V 102KOhm R8081 @
2

vx_c0402_small vx_r0402_small 13KOhm R8002 /U42


1

10% 1% vx_r0402_small R8073 1Ohm


2

R8011 1% 2.74KOhm vx_r0402_small


Iin=2.625A
1

220KOhm vx_r0402_small 1%
2

vx_r0402_small C8025 1% R8020 R8061 C8046


+AC_BAT_SYS
1
2

1% 22PF/50V R8028 301Ohm SR8012 2.2Ohm 0.22UF/25V


Rdroop
1

R8084 @ vx_c0402_small 2KOhm R8017 vx_r0402_small 1 2 vx_r0603_h28_small vx_c0603_small


1

220KOhm 5% C8026 vx_r0402_small 2.15KOhm 1% VCCGT_VCCSENSE 1% 10%


1 1

1
vx_r0402_small 6800PF/25V 1% vx_r0402_small C8001 @ 1 2VCORE1_BST_R 2 1 C8061 @ C8057 C8052 C8063
1 1

1% vx_c0402_small 1% C8013 0.01UF/16V 1000PF/50V 10UF/25V 10UF/25V 10UF/25V


1

X7R/+/-10% C8018 1200PF/50V vx_c0402_small vx_c0402_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small

2
1000PF/50V vx_c0402_small 10% SR8011 VCORE1_BST X5R/+/-20% X5R/+/-20% X5R/+/-20%
5%
2

vx_c0402_small X7R/+/-10% 2 1 1 2 VCCGT_VSSSENSE


2

10%

32

33
2

C8015
2

C8007 @ 220PF/50V R8027 @ +5VS

VIN2

PGND1
220PF/50V vx_c0402_small 100Ohm 8 T8006 L8000
1

VIN1
2

vx_c0402_small 10% vx_r0402_small 7 16 TPC28T 0.15uH


1

R8026 @ 10% 1% 6 PHASE SW1 17 Irat=37A


1

NC2 SW2

1
B VCORE1_LX B
100Ohm 5 18 1 2
+VCORE

1
vx_r0402_small R8009 4 BOOT SW3 19
1% 1Ohm 3 NC1 SW4 20 DCR=0.9mohm
1

VCC SW5

1
vx_r0402_small FCCM_B 2 21 CE8008 /U42
PWM1_B FCCM SW6 063T
1% 1 22 R8054 @ + 470uF/2V

2
PWM SW7 23 2.2Ohm vx_c7343d_apaq_t03
+VCCGT

PGND2
SW8

2
AGND
42 42 42 42

PVCC

SW11
SW10
vx_r0805_h24_small

SW9
GND1 PGND8 PGND8 PGND8

NC4
NC3
GL2

GL1
43 41 41 41 5%

3
2
GND2 PGND7 PGND7 PGND7

2
44 40 40 40 C8019 VCORE1_RC
45 GND3 39 PGND6 39 PGND6 39 PGND6 1UF/25V U8002A

35
34
31
30
29
28
27
26
25
24
GND4 PGND5 PGND5 PGND5

1
46 38 38 38 vx_c0402_h24_small SIC634CD-T1-GE3 C8030 @ JP8007 JP8002
Iin=0.73A

1
47 GND5 37 PGND4 37 PGND4 37 PGND4 X5R/+/-10% 1500PF/50V SHORT_PIN SHORT_PIN
+AC_BAT_SYS

1
VCCSA_HG 48 GND6 36 PGND3 36 PGND3 36 PGND3 vx_c0402_small R8047

2
49 GND7 PGND2 PGND2 PGND2 X7R/+/-10% 3.65K
C8048 GND8 vx_r0603_h24_small
U8002B U8003B U8006B/U42
1

0.22UF/25V C8059 @ C8053 U8000B SIC634CD-T1-GE3 SIC634CD-T1-GE3 SIC634CD-T1-GE3 1%


1
2
5
6
7

SR8000 vx_c0603_small 1000PF/50V 10UF/25V ISUMP_B 1 2


ISL95859AHRTZ
nb_r0603_short_32mil_small X7R/+/-10% vx_c0402_small vx_c0603_h39_small
D
2

1
2 1 VCCSA_BST_R 2 1 5% X5R/+/-20% C80131 R8005 /U42
1UF/25V 100KOhm
3 vx_c0402_h24_small vx_r0402_small

2
G S X5R/+/-10% 1%
ISEN1_B 1 2VCORE1_LX_S
Q8000 T8003 L8002
10

PMPB20EN TPC22T 0.47uH ISUMN_B 1 2 VCORE1_S


9 Irat=18A
GND3

1 GND2 8 VCCSA_LX R8052


+VCCSA
1

VCCSA_BST 2 UGATE PHASE 7 1Ohm


BOOT FCCM
1

PWM_C 3 6 C80139 /U42 C8051 C8031 C8032 C8049 C8034 C8010 vx_r0402_small
PWM VCC 063T
2

4 5 DCR=3.67mohm 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 1%


GND1 LGATE
1
2
5
6
7

R8057 @ X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10%


2

U8005 2.2Ohm vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small


D
2

1
ISL95808HRZ vx_r0805_h24_small C80110 C80109 C80107 C8093 C8094 C8095 C8096 C8097 C8098 C8081
5% 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
1

VCCSA_LG 3 VCCSA_RC X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20%

2
FCCM_C G S vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small
1

C8028 @ JP8000 JP8001


+5VS Q8001 1500PF/50V SHORT_PIN SHORT_PIN
4

PMPB20EN vx_c0402_small
2

X7R/+/-10%
1

C8016 R8045
4.7UF/10V 3.65KOHM

1
vx_c0402_h26_small vx_r0402_small C80116 C80123 C80128 C8099 C80100 C80101 C80124 C80103 C80104 C8080
2

X5R/+/-10% 1% 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
ISUMP_C 1 2 VCCSA_LX_S
U22 X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20%
VCCSA U42

2
vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small
ISUMN_C 1 2 VCCSA_S VID1 : 0.9V VCCSA
VBoot : 1.05V VID1 : 0.9V
R8050 VBoot : 1.05V
1Ohm Iccmax = 4.5A
vx_r0402_small PL2 TDC = 4A Iccmax = 5A
1% LL=10.3mV/A LL=10.3mV/A

1
C80111 C80108 C8079 C8078 C8082 C80149 C80150 C8071 C8072 C8069
Output Cap. Output Cap. 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
22uF/6.3V*6pcs 22uF/6.3V*7pcs X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10%

2
A vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small A

<Variant Name>

Title : POWER_VCORE
PEGATRON PROPRIETARY AND CONFIDENTIAL
Engineer: James_Liao
Size Project Name Rev
Custom
SU4EA 1.1
Date: Friday, March 10, 2017 Sheet 80 of 94
5 4 3 2 1
5 4 3 2 1

5VO & 3VO POWER SUPPLY


D D
T8125
JP8102 TPC26T
1MM_OPEN_M1M2

(2.25A)
2 1 +5VAO
+5VA
(60mA)

1 1
2 1
C8100

(3.28A)
1UF/25V
+AC_BAT_SYS

1
vx_c0402 C8106

1
X5R/+/-10% 1UF/25V C8108
+AC_BAT_SYS vx_c0402 10UF/25V

2
T8134 X5R/+/-10% T8136 vx_c0805_h57_small

2
1

1
C8119 C8122 C8104 @ TPC26T 5V_VO1 TPC26T X5R/+/-10%

7
6
5
2
1

1
2
5
6
7
10UF/25V 10UF/25V 0.1UF/25V
vx_c0805 vx_c0805 vx_c0402_small 5V_LG 3V_LG
D D

1
X5R/+/-10% X5R/+/-10% X5R/+/-10%

3 3

15
14
13
12
11
S G G S

DRVL1
VO1
VREG5

DRVL2
VIN
Q8100 T8129 T8140 Q8102

8
L8100 T8133 PMPB20EN TPC26T SR8105 SR8106 TPC26T PMPB20EN

(5.312A)
JP8107 +5VO 3.3uH TPC26T nb_r0603_short_32mil_small nb_r0603_short_32mil_small T8100 L8101

(5.196A)
3MM_OPEN_5MIL Irat=6A 5V_HG 16 10 3V_HG TPC26T 3.3uH +3VO JP8105

1
1 2 1 2 2 15V_BST_R 1 2 5V_BST 17 DRVH1 DRVH2 9 3V_BST 1 2 3V_BST_R 2 1 Irat=6A 1MM_OPEN_M1M2
+5VSUS
( )

1
1 2 5V_LX 18 VBST1 VBST2 8 3V_LX 1 2 2 1

(0.209A)
+3VSUS

1
VCLK 19 SW1 SW2 7 C8110 2 1
4.044A VCLK PGOOD

2
C8105 Enable1 20 6 Enable2 0.1UF/25V
EN1 EN2
1

7
6
5
2
1

1
C8121 @ R8102 @ 0.1UF/25V 21 vx_c0603_small C8113 @
+ GND +
0.1UF/25V CE8100 2.2Ohm vx_c0603 R8105 @ CE8101 0.1UF/25V

VREG3
D 10%

1
2
5
6
7
vx_c0402_small 100UF/6.3V vx_r0603_h28_small 10% 2.2Ohm 100UF/6.3V vx_c0402_small

VFB1

VFB2
2

2
CS1

CS2
X5R/+/-10% vx_c3528_sanyo_h79 5% D vx_r0603_h28_small vx_c3528_sanyo_h79 X5R/+/-10%
SUS_PWRGD 30,92
2

2
2
5V_RC 3 5%

1
S G U8100A 3V_RC

1
2
3
4
5
1

1
C8111 @ TPS51225CRUKR 3

1
C 1500PF/50V Q8107 G S C8116 @ JP8106 C

4
2 vx_c0402_small PMPB20EN 1500PF/50V SHORT_PIN

1
JP8100 JP8104 X7R/+/-10% Q8103 vx_c0402_small
+3VO

1
+3VAO
SHORT_PIN SHORT_PIN R8100 R8101 PMPB20EN X7R/+/-10%
+5VO 180KOhm 180KOhm
RDSON=24.5mOHM(Max) TDC :5.196A
2

TDC :5.312A vx_r0402_small vx_r0402_small


Frequency :350KHz
1% 1%
Frequency :300KHz RDSON=24.5mOHM(Max)

2
PWR Cap. :100uF
PWR Cap. :100uF 5V_FB_R 1 2 5V_FB 3V_FB 2 1 3V_FB_R Total Cap. :100uF
Total Cap. :100uF ESR :35mOHM
ESR :35mOHM R8106 R8107

2
15.8KOhm 6.65KOHM
vx_r0402_small R8104 R8103 vx_r0402_small
1% 10KOhm 10KOhm 1%
1 2 vx_r0402_small vx_r0402_small 1 2
1% 1%

1
C8118 @ C8124 @
39PF/50V 39PF/50V
vx_c0402_small vx_c0402_small 22
10% 1 2 1 2 10% 23 GND1
GND2
C8123 @ C8125 @
0.1UF/16V 0.1UF/16V U8100B
Enable1 vx_c0402_small vx_c0402_small TPS51225CRUKR
10% 10%
Enable2 T8123
JP8101 TPC26T
1MM_OPEN_M1M2
2 1
+3VA
(78mA)

1 1
2 1
2

C8101
SR8103 1UF/25V
2

R8143 /USBSLP nb_r0402_short_5mil_small vx_c0402_h24_small

2
1KOhm X5R/+/-10%
1

B vx_r0402_small D8108 /USBSLP B


1% 1.2V/0.1A
1 2 1 2 SR8102
30,52 USB_CPW_EN
1

nb_r0402_short_5mil_small T8105 T8106 T8113 T8114


TPC26T TPC26T TPC26T TPC26T
D8100 SR8104
D8105 1V/0.2A 0Ohm

1
1

1.2V/0.1A 1 1 2 +5VO +3VSUS


1 2 R8122 +5VO_1_1 3 10mil

1
560KOhm 2 C8120 @ T8131 T8109 T8110
vx_r0402_small 0.1UF/25V TPC26T TPC26T TPC26T
R8111 5% vx_c0603_small
2

2
1
1KOhm C8117 10%

1
vx_r0402_small 0.1UF/25V +5VA +5VSUS
1% T8124 vx_c0402_small T8101
2

1 2 VSUS_ON_EN TPC26T X5R/+/-10% TPC26T T8121 T8138 T8139


30,82,84,93 VSUS_ON
TPC26T TPC26T TPC26T
1

C8107 @ VCLK +10VO


1

1
0.1UF/16V R8108 10mil

1
1
vx_c0402_small 560KOhm C8114 +3VA +3VO
2

10% vx_r0402_small 0.1UF/25V


1

5% C8115 vx_c0402_small T8122 T8135


2

2
0.1UF/25V X5R/+/-10% TPC26T TPC26T
vx_c0402_small
2

X5R/+/-10% T8104 T8102

1
1 TPC26T JP8103 TPC26T +5VO
+5VO_2_2 3 1MM_OPEN_M1M2
2 +12VO 1 2

( )
+12VSUS

1 1

1
1 2
10mil 10mil
D8101 C8112
1V/0.2A 0.1UF/25V 0.1A
vx_c0603_small 11.47V-14.37V

2
10%

A A

<Variant Name>

Title : POWER_SYSTEM
PEGATRON PROPRIETARY AND CONFIDENTIAL
Engineer: James_Liao
Size Project Name Rev
Custom 1.1
SU4EA
Date: Friday, March 10, 2017 Sheet 81 of 94
5 4 3 2 1
5 4 3 2 1

D
+1.0VSUS POWER SUPPLY D

(0.77A) +AC_BAT_SYS

1
C8201 @ C8202 C8200 @

2
1500PF/50V 10UF/25V 10UF/25V
R8204 vx_c0402_small vx_c0805_h57_small vx_c0805_h57_small

2
73.2KOhm X7R/+/-10% X5R/+/-10% X5R/+/-10%
+5VO vx_r0402
1%

1
2

1.0V_TON
R8205 @ U8200
100KOhm APW8713EQBI-TRG

10
7
8
vx_r0402_small
1% 6 12

NC
VIN1

LX1
1

1.0V_FB 5 TON PGND1 13


4 FB PGND2 14
1.0V_PFM 3 AGND PGND3 15
C 1.0V_EN 2 PFM PGND4 16 JP8203 C

PGND5
EN LX2

BOOT
1 17 1MM_OPEN_M1M2

VIN2
VCC
POK LX3

LX4
2 1
SS
( )
2 1 +VCCPRIM_CORE
2

T8200 L8201
1.544A
(5.63A)
+1.0VO
23
22
21
20
19
18
SR8201 TPC28T 1UH JP8201
nb_r0402_short_5mil_small Irat=11A 2MM_OPEN_5MIL
+AC_BAT_SYS

1.0V_SS 1.0V_LX 2 1 2 1

( )
+1.0VSUS
1

1
2 1
1.0V_VCC
1

C8203 063T/DCR=9mOHM 2.1A

1
0.01UF/16V C8209 C8211 C8210

1
vx_c0402 0.1UF/25V C8206 22UF/6.3V 22UF/6.3V
2

2
10% vx_c0603 22UF/6.3V vx_c0603_h39_small vx_c0603_h39_small

2
10% vx_c0603_h39_small X5R/+/-10% X5R/+/-10%
92 1.0VSUS_PWRGD +1.0VO

2
1.0V_BST 2 1 2 1 X5R/+/-10%
JP8200 TDC :5.63A
SR8200 SHORT_PIN
nb_r0603_short_32mil_small C8208 @ Frequency :650KHz

1
+5VO 2 1 100PF/50V
vx_c0402_small
PWR Cap. :132uF
Total Cap. :132uF
1

R8206 C8207 5%

1
R8201 2.2Ohm 1UF/6.3V 2 1 C8212 C8213 C8214
47KOhm vx_r0402_small vx_c0402 22UF/6.3V 22UF/6.3V 22UF/6.3V
2

1.0V_FB_R
vx_r0402_small 5% X5R/+/-10% vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small

2
1% R8207 X5R/+/-10% X5R/+/-10% X5R/+/-10%
1 2 1.0V_EN 5.11KOhm
B 30,81,84,93 VSUS_ON B
vx_r0402_small
1

C8205 1%
0.1UF/16V 1.0V_FB 2 1
vx_c0402_small
2

2
10% Vout=0.8*(1+(R1/R2)) T8207 T8208 T8204
R8203 TPC28T TPC28T TPC28T
0.8V +- 1%

1
20KOhm C8204 @
vx_r0402_small 0.01UF/16V

1
1.008V:R1=5.10K, R2=19.6K 1% vx_c0402_small +1.0VSUS
1

2
10%
1.009V:R1=5.23K, R2=20K T8202
1.359V:R1=13.7K, R2=19.6K TPC28T
1.360V:R1=14K , R2=20K
1.512V:R1=17.8K, R2=20K

1
+1.0VO
1.510V:R1=17.4K, R2=19.6K

A A
<Variant Name>

P82_+1.0VSUS & +2.5V


Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
Engineer: James_Liao
Size Project Name Rev
Custom
SU4EA 1.1
Date: Friday, March 10, 2017 Sheet 82 of 94
5 4 3 2 1
5 4 3 2 1

DDR & VTT POWER SUPPLY


JP8303
SHORT_PIN
1 2
D +0.6VO D

JP8301
1MM_OPEN_M1M2
2 1
+0.6VS
(0.48A)
2 1

1
C8302

1
C8303 @
10UF/6.3V
0.1UF/16V
vx_c0402
vx_c0402_small

2
X5R/+/-20%

2
10%

1.2V_SM_VREF_R

(0.81A)
1

0.6V_VTTSNS
C8304 SR8304

1.2V_VDDQ
0.033UF/16V nb_r0603_short_32mil
vx_c0402_small 2 1 +AC_BAT_SYS
+1.2VO

2
10%

1
C8316 @ C8311 @ C8313

1
C8300 @ 1500PF/50V 0.1UF/25V 10UF/25V

1
2
5
6
7
10UF/6.3V vx_c0402_small vx_c0402_small vx_c0805_h57_small

2
vx_c0603_small D X7R/+/-10% X5R/+/-10% MLCC/+/-10%

2
5
4
3
2
1
20%

VDDQ

GND1
VTTREF

VTTSNS
VTTGND
C8310 3
R8306 21 0.1UF/25V G S
499KOhm 1.2V_FB 6 GND2 20 SR8306 vx_c0603_small
vx_r0402 1.2V_S3 7 FB VTT 19 0.6V_LDOIN R0603 10% Q8300 T8307 L8300

(4.96A)
+1.2VO

8
1% 1.2V_S5 8 S3 VLDOIN 18 1.2V_BST 1 2 1.2V_BST_R 1 2 PMPB20EN TPC28T 1UH JP8300
+AC_BAT_SYS 1 2 1.2V_TON 9 S5 BOOT 17 1.2V_HG Irat=11A 3MM_OPEN_5MIL
C 10 TON UGATE 16 1.2V_LX 2 1 1 2 C
+1.2V
(4.48A)

1
PGOOD PHASE 1 2
1

C8314 @

LGATE
PGND
1UF/25V VDD

1
VID

1
vx_c0402 CS C8322 C8318 @
2

1
2
5
6
7

1
X5R/+/-10% R8302 @ C8321 22UF/6.3V 22UF/6.3V
U8300A D 2.2Ohm 22UF/6.3V vx_c0603_h39_small vx_c0603_h39_small
11
12
13
14
15

2
RT8231BGQW vx_r0603_h28_small vx_c0603_h39_small X5R/+/-10% X5R/+/-10%

2
1

1
F=500KHz 5% X5R/+/-10%

2
3
1.2V_VDD
1.2V_VID

G S 1.2V_RC
1.2V_CS

92 DDR_PWRGD
JP8302 JP8305

1
SR8303 Q8301 C8307 @ SHORT_PIN SHORT_PIN

8
nb_R0402_short_20mil_small PMPB20EN 1500PF/50V

2
SR8300 1 2 vx_c0402_small

1
nb_R0402_short_20mil_small X7R/+/-10% C8320 C8317 C8319 @ C8325
1 2 1.2V_LG 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
+5VO 1.2V_VDDQ vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small

2
1

X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10%


1

C8309 R8303 RDSon=24.5mOhm Max


1UF/6.3V 499KOhm
vx_c0402_small vx_r0402_small 1.2V_FB_R
2

10% 1%
2

T8303 T8309 T8308 T8305

1
TPC28T TPC28T TPC28T TPC28T
R8300

1
25 C8306 @
GND6 24 0.01UF/16V
10KOhm +1.2VO
vx_r0402_small

1
GND5 23 +1.2V vx_c0402_small
1% R1
TDC :4.96A

2
GND4 22 10%
Frequency :500KHz

2
GND3

1
SR8302 T8302 T8301 C8305 @
nb_r0402_short_5mil_small U8300B TPC28T TPC28T 1.2V_FB 0.01UF/16V PWR Cap. :22uF*5pcs
1 2 RT8231BGQW vx_c0402_small
4 DDR_PG_CTRL Total Cap. :110uF

2
VDDQ=VREF*(1+(R1/R2)) 10%
1

1
B +0.6VS B
R8301
SR8301
12.7KOhm
nb_r0402_short_5mil_small
1 2 1 2 1.2V_S3 vx_r0402_small
84,91,93 SUSB#_PWR 1% R2

2
1

R8308 @ C8308 @
0Ohm 0.1UF/16V SKU Load current (A) Low-side MOSFET (pcs) Output 22uF/6.3V MLCC (pcs)
vx_r0402_0ohm_small vx_c0402_small
2

R8307 @ 10%
10KOhm UMA 0~5 1 5
vx_r0402_small
1%
1 2
84,91,93 2.5V_PWRGD DSC 0~8 2 6
R8304
10KOhm
vx_r0402_small
1% VID Reference Voltage (V)
1 2 1.2V_S5
85,91,93 SUSC#_PWR

High 0.675
1

C8323 @
0.1UF/16V
vx_c0402_small Low 0.75
2

10%

A A

Title : POWER_DDR & VTT


PEGATRON PROPRIETARY AND CONFIDENTIAL
Engineer: James_Liao
Size Project Name Rev
Custom SU4EA 1.1

Date: Friday, March 10, 2017 Sheet 83 of 94


5 4 3 2 1
A B C D E

1
1.8VSUS POWER SUPPLY 1

+3VO T8400
TPC26T +1.8VO SR8400
NB_R0402_20MIL_SMALL
(0.296A) (0.296A) 2 1
+1.8VSUS

1
+5VO

1
1.8VO_FB_R 2 1
(0.136A)

1
SR8401 JP8400

2
R8400 NB_R0402_20MIL_SMALL SHORT_PIN

1
4.7Ohm R8406 C8408 @ C8410

2
2 vx_r0402 127KOhm 1000PF/50V 22UF/6.3V 2

9
1% vx_r0402_small vx_c0402_small vx_c0603

2
T8411 1.8VO_VPP 4 5 1% 10% X5R/+/-10%

GND2

1
TPC28T 1.8VO_VIN 3 VPP NC 6
2 VIN VO 7 1.8VO_FB
1 VEN ADJ 8
85,92 1.8VSUS_PWRGD
1

POK GND1
1

2
C8400 C8406 U8401
1UF/6.3V 22UF/6.3V G9661-25ADJF11U R8407
vx_c0402 vx_c0603 100KOhm
+1.8VO
Vref=0.8V +- 2%
2

2
X5R/+/-10% X5R/+/-10% vx_r0402_small MAX current :0.296A
1%
PWR Cap. :4.7uF

1
R8408
30KOhm
Total Cap. :4.7uF
vx_r0402_small
1%
3 1 2 1.8VO_EN 3
83,91,93 VSUS_ON
1

C8405 T8403 T8401 T8408 T8402 T8409 T8410


0.1UF/16V TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
vx_c0402_small
2

10%

1
+1.8VO +1.8VSUS

T8404 T8406 T8407 T8405 T8412 T8413


TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T

1
4 4

<Variant Name>

5
Title : POWER_1.8VSUS 5

PEGATRON PROPRIETARY AND CONFIDENTIAL


Engineer: James_Liao
Size Project Name Rev
Custom
SU4EA 1.1
Date: Friday, March 10, 2017 Sheet 84 of 94
A B C D E
5 4 3 2 1

D D

2.5V POWER SUPPLY


+3VO
(0.4A)
) +2.5VO JP8500
1MM_OPEN_M1M2
(0.4A)
) 1 2
+3V +5VO 1 2 +2P5VPP

1
2.5V_FB_R 1 2
(0.4A)

1

SR8500 JP8501

1
R8504 @ R8500 NB_R0402_20MIL_SMALL SHORT_PIN

1
100KOhm 4.7Ohm C8504 @ C8502

2
C vx_r0402_small vx_r0402 R8503 1000PF/50V 22UF/6.3V C

9
1% 1% 100KOhm vx_c0402_small vx_c0603
2

2
2.5V_VPP 4 5 vx_r0402_small 10% X5R/+/-10%

GND2

2
2.5V_VIN 3 VPP NC 6 1%
2 VIN VO 7 2.5V_FB
1 VEN ADJ 8
92 2.5V_PWRGD POK GND1
1

1
C8503 C8500 U8500
1UF/6.3V 22UF/6.3V G9661-25ADJF11U R8502
+2.5VO
vx_c0402 vx_c0603 Vref=0.8V +- 2% 47KOhm MAX current :0.4A
2

X5R/+/-10% X5R/+/-10% vx_r0402_small


1% PWR Cap. :22uF

2
Total Cap. :22uF
R8501
280KOhm
vx_r0402_small
1%
1 2 2.5V_EN
B 83,91,93 SUSC#_PWR B
1

C8501
1UF/6.3V
vx_c0402_small
2

X5R/+/-10%

<Variant Name>

A A

Title : POWER_+2.5V
PEGATRON PROPRIETARY AND CONFIDENTIAL
Engineer: James_Liao
Size Project Name Rev
Custom
SU4EA 1.1
Date: Friday, March 10, 2017 Sheet 85 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 86 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 87 of 94


5 4 3 2 1
5 4 3 2 1

BATTERY CHARGER
D D

Q8802
R8808 DMN2027UPS-13
T8818 T8814 T8815 T8816 T8817 D S 1 +A/D_DOCK_IN_Q 1 8 10mOhm 8 1 +BAT_CON

(6.4A)
TPC28T TPC28T TPC28T TPC28T TPC28T 2 2 7 vx_r1206_h31 7 2 +BAT_CON

2
3 3 S 6 1% 6 S 3 C8827 @
5 4 4 D 5 5 +A/D_DOCK_IN_Q_Q 1 2 +AC_BAT_SYS 5 5 D 4 BATG 1500PF/50V
60 +A/D_DOCK_IN G
2 1

2
C8803 G G vx_c0402_small

1
1

2
C8802 @ Q8800 0.01UF/50V Q8801 C8828 C8813 @ MLCC/+/-10%
+A/D_DOCK_IN

2
R8801 47PF/50V AP6680BGMT vx_c0402_small DMN2027UPS-13 10UF/25V 1500PF/50V C8816 R8818 @

1
2.2ohm vx_c0402_small 10% vx_c0805_h57_small vx_c0402_small 470PF/50V 560KOhm EMI Request,Close Q8802

1
vx_r1206_h26 5% X5R/+/-10% MLCC/+/-10% vx_c0402_small vx_r0402_small

1
5% ACG 10% 5%
1 1

1
JP8804 JP8805 EMI Request,Close Q8802
C8801 SHORT_PIN SHORT_PIN
2.2UF/25V

2
vx_c1206_h49
2

2
MLCC/+/-10%
R8802 R8806
4.02KOhm 4.02KOhm CHG_ACP 1 2 CHG_ACN
vx_r0402_small vx_r0402_small

2
1% 1% C8814 C8806 C8805

1
0.1UF/25V 0.1UF/25V 0.1UF/25V T8800 T8801 T8802 T8803 T8813
vx_c0402_small vx_c0402_small vx_c0402_small TPC28T TPC28T TPC28T TPC28T TPC28T

1
X7R/+/-10% X7R/+/-10% X7R/+/-10%
CHG_LDO

1
CMSRC +BAT_CON
30,74 AC_IN_OC
ACDRV
2

2
C8800 @
0.1UF/16V R8811 R8813 T8822 T8821 T8820 T8824 T8823
2

C vx_c0402_small 1KOhm 10KOhm TPC28T TPC28T TPC28T TPC28T TPC28T C


1

R8803 10% vx_r0402_small vx_r0402_small +AC_BAT_SYS


432KOhm 1% 1%
+AC_BAT_SYS
1

1
1

1
vx_r0402_small 1 2 C8822 @ C8817 C8823 @ +AC_BAT_SYS
1% 1500PF/50V 10UF/25V 0.1UF/25V
1

1
2
5
6
7
SR8800 vx_c0402_small vx_c0805_h57_small vx_c0402_small T8808 T8809 T8810 T8811 T8819

2
nb_r0402_short_5mil_small D MLCC/+/-10% X5R/+/-10% X7R/+/-10% TPC28T TPC28T TPC28T TPC28T TPC28T
2

R8814 1 2
30 AD_IINP
2

R8804 C8825 12.4KOHM U8800A T8825

1
2
68KOhm 0.1UF/16V vx_r0402_small C8820 BQ24735RGRR TPC28T 3

5
4
3
2
1
vx_r0402_small vx_c0402_small 1% 100PF/50V G S
1

1% 10% vx_c0402_small

ACOK
ACDRV

ACP
CMSRC

ACN
1

1
1
5% C8819 Q8804 R8810

8
0.47UF/25V PMPB20EN L8800 10mOhm

(3A)
21 vx_c0603_small 4.7UH vx_r1206_h31

2
SR8802 6 GND2 20 10% CHG_VCC Irat=5.5A 1%
vx_r0402_small_short 7 ACDET VCC 19 CHG_LX 1 2 +BAT_R 1 2 +BAT_CON
30,60 SMB0_DAT
1 2 8 IOUT PHASE 18 CHG_HG +BAT_CON
SDA HIDRV

1
+3VA 9 17 CHG_BST 1 2CHG_BST_R 2 1
SCL BTST

1
SR8803 10 16 CHG_LDO R8819 @ C8811 @ C8812
ILIM REGN

1
2
5
6
7

1
vx_r0402_small_short SR8801 C8810 2.2Ohm 10UF/25V 10UF/25V

BATDRV
2

3
R8815 1 2 C8824 R0603 0.047UF/25V vx_r0603_h28_small vx_c0805_h57_small vx_c0805_h57_small

LODRV
30,60 SMB0_CLK D

2
1
GND1
R8817 560KOhm 1UF/25V vx_c0603_small 5% X5R/+/-10% X5R/+/-10%

SRN
SRP

2
22Ohm vx_r0402_small vx_c0402_h24_small X7R/+/-10% CHG_RC JP8802 JP8803
vx_r0805_h24_small 5% X5R/+/-10% 3 SHORT_PIN SHORT_PIN

1
1 5% T8826 G S C8826 @
1

11
12
13
14
15

2
3 CHG_VCC_R 1 2 CHG_VCC TPC28T D8800 1500PF/50V C8807

2
+BAT_CON 2 0.8V/0.2mA Q8805 vx_c0402_small 0.1UF/25V

2
2

CHG_LG PMPB20EN X7R/+/-10% vx_c0402_small

1
1

D8801 R8816 @ C8821 @ BATG 2 1 X7R/+/-10%


0.8V/0.2mA 150KOhm 0.01UF/16V CHG_SRP_R 1 2 CHG_SRN_R
vx_r0402_small vx_c0402_small R8809
2

2
1% 10% 4.02KOhm C8808 C8809
1

1
vx_r0402_small 0.1UF/25V 0.1UF/25V
AC_IN_OC 1% vx_c0402_small vx_c0402_small

1
X7R/+/-10% SR8806 SR8807 X7R/+/-10%
B R0603 R0603 B
1

2
R8820 CGH_SRP
100KOhm CGH_SRN
vx_r0402_small SR8808
1% vx_r0402_small_short
2

1 2
BAT_LEARN 30
1

R8807 C8829 22
GND3
3

2MOHM 3 0.022UF/16V 23
D GND4
vx_r0402_small vx_c0402_small 24
2

5% 10% GND5 25
ACDRV 2 1 11 GND6
G U8800B
2 S Q8803
2

BQ24735RGRR
2

R8805 2N7002
1MOhm AD_IINP
vx_r0402_small
5%
1

C8831
100PF/50V TPC26T
+5VO vx_c0402_small T8812 SR8805
2

5% +5VO nb_r0402_short_5mil_small
1 2
PROCHOT SET PROCHOT# 3

1
2

R8824
2016.2.25 +5VO, +-5%

3
100KOhm U8801 3
D
5

vx_r0402_small LMV321IDCKR D8802 @


1% 1 V+ 1.2V/0.1A
1

+
4 2 1 11
45W adaptor (110%): Iout=20*0.01*2.6=0.52V 3
SC70-5
G Q8806
-
R8823=11.8K; Typ=0.528V, Max=0.553V,Min=0.503V GND 2 S 2N7002

2
1

C8830
2
2

0.1UF/25V 1 2 C8834 @
1

R8823 /UMA C8832 vx_c0402_small 10UF/6.3V


2

A A
1

11.8KOHM 0.1UF/25V X7R/+/-10% R8825 C8833 @ vx_c0805_h57_small


2

vx_r0402_small vx_c0402_small 100KOhm 0.1UF/25V 10%


2

1% X7R/+/-10% vx_r0402_small vx_c0402_small


1

1% X7R/+/-10%

45W adaptor 要要要 <Variant Name>

Title : POWER_CHARGER
PEGATRON PROPRIETARY AND CONFIDENTIAL
Engineer: James_Liao
Size Project Name Rev
Custom 1.1
SU4EA
Date: Friday, March 10, 2017 Sheet 88 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 89 of 94


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A SU4EA <RevCode>

Date: Friday, March 10, 2017 Sheet 90 of 94


5 4 3 2 1
5 4 3 2 1

SUSB#_PWR POWER
SUSC#_PWR POWER
VGS= 10V , Rdson = 28mOhm
Q9106 T9110
AP2334GN-HF TPC26T

(0.114A) 3 2

+1.0V 0.114A )

2 S
D D

D
+1.0VO

1
3

G
1

1
C9122 @ C9124

11
1UF/6.3V 1 2 0.1UF/16V
vx_c0402_small vx_c0402_small

2
1
X5R/+/-10% C9123 @ R9120 10%
0.033UF/16V 47KOhm
vx_c0402_small vx_r0402_small T9109

2
10% 1% TPC26T
10mil 10mil
+12VSUS +12V (0.005A)

1
4
3

1
47K
R9106

B
SUSC#_PWR 560KOhm
vx_r0402_small

B
47K

10K
47K
5%

2
1

6
Q9105
R9110

(4.291A)
22KOhm
vx_r0402_small
1% +5VO +3VO
SUSC#_PWR 1 2 Rdson = 18m OHM T9106

(0.24A)
TPC26T
1

C9107 @ 15
R9101 0.033UF/16V 1 GND2 14
+3V

1
22KOhm vx_c0402_small 2 VIN1_1 VOUT1_2 13
2

VIN1_2 VOUT1_1

1
vx_r0402_small 10% 3 12 C9116
1% 4 ON1 CT1 11 T9103 0.1UF/16V
VBIAS GND1

(4.051A)
SUSB#_PWR 1 2 5 10 TPC26T vx_c0402_small

2
C
6 ON2 CT2 9 10%
C
VIN2_1 VOUT2_2
1

C9106 C9111 7 8
+3VS

1
0.1UF/16V 0.01UF/16V VIN2_2 VOUT2_1

1
vx_c0402_small vx_c0402_small U9101 C9104 C9102 C9109
2

10% 10% SN10548 220PF/50V 220PF/50V 0.1UF/16V


1

C9132 @ C9112 vx_c0402_small vx_c0402_small vx_c0402_small

2
1UF/6.3V 1UF/6.3V 10% 10% 10%
vx_c0402_small vx_c0402_small
2

X5R/+/-10% X5R/+/-10%

SUSB#_PWR POWER Control


VGS= 10V , Rdson = 28mOhm
Q9111 T9114 SR9100
AP2334GN-HF TPC26T vx_r0402_small_short
1 2
3 2 30,57,92 SUSB_EC#
2 S
D

(0.16A) +1.8VO +1.8VS (0.16A)


1

T9101
3

R9121 TPC26T
G
1

C9151 @ 100KOhm c9147


11

1UF/6.3V vx_r0402_small 0.1UF/16V


83,93 SUSB#_PWR

1
vx_c0402_small 1% vx_c0402_small
2

X5R/+/-10% +1.8VS_SW_R 1 2 10%


1

C9148
0.1UF/16V
vx_c0402_small SUSC#_PWR POWER Control
2

VGS = 10V , Rdson = 5.1mOHM 10% T9111


Q9104 TPC26T SR9101

(1.872A)
SISA14DN-T1-GE3 vx_r0402_small_short
8 1 1 2
+VCCIO 30,57 SUSC_EC#
1

B 7 2 B

(1.872A)
6 S 3 T9100
1

5 5 D 4 1 2 C9135 TPC26T
+1.0VO
G 0.1UF/16V
R9107 vx_c0402_small
83,93 SUSC#_PWR
2

1
1

C9120 @ C9134 @ 22KOhm 10%


1UF/6.3V 0.033UF/16V vx_r0402_small
vx_c0402_small vx_c0402_small 1%
2

X5R/+/-10% 10%

VGS= 10V , Rdson = 28mOhm


Q9150 T9150
AP2334GN-HF TPC26T

(1.134A) 3 2
(1.134A)
2 S
D

+5VO +5VS
1
3

R9150
G
1

C9150 @ 4.7KOhm C9152


11

1UF/6.3V vx_r0402_small 0.1UF/16V


vx_c0402_small 1% vx_c0402_small
2

X5R/+/-10% +5VS_SW_R 1 2 10%


1

C9161
0.1UF/16V
vx_c0402_small
2

10%

T9105
TPC26T
10mil 10mil
+12VSUS +12VS (0.005A)
E

1
4
3

A A
47K

R9103
B

SUSB#_PWR 560KOhm
vx_r0402_small
2

B
47K

10K
47K

5%
<Variant Name>
2
1

Q9100
Title : POWER_LOAD SWITCH
PEGATRON PROPRIETARY AND CONFIDENTIAL
Engineer: James_Liao
Size Project Name Rev
Custom
SU4EA 1.1
Date: Friday, March 10, 2017 Sheet 91 of 94
5 4 3 2 1
5 4 3 2 1

POWER GOOD DETECTER


+3VS

D D

1
R9205
100KOhm
T9202 vx_r0402_small
TPC28T SR9200 1%

2
0Ohm
1 2
83 DDR_PWRGD

1
R9202
0Ohm
vx_r0402_0ohm_small
1 2
85 2.5V_PWRGD
T9200
TPC28T
SR9202
0Ohm
1 2

1
ALL_SYSTEM_PWRGD 25,30

+3VSUS
C C

T9210
TPC28T SR9203

1
0Ohm
1 2 R9206
82 1.0VSUS_PWRGD

1
100KOhm
T9206 vx_r0402_small
TPC28T SR9204 1%

2
0Ohm
1 2 2 1
30,81 SUS_PWRGD

1
T9207 D9201
TPC28T SR9206 RB751V-40
0Ohm
1 2
82 1.8VSUS_PWRGD

B SUSB_EC# B
30,57,68,91 SUSB_EC#

1
R9200 @ R9201
0Ohm 560KOhm
vx_r0402_0ohm_small vx_r0402_small
+3VS 1 2 5%
32,50 CPU_THERM#

2
1

R9204 ME2N7002F1KW-G
1.91KOhm U9200
vx_r0402_small
T9208 1% S21 6D2
2

TPC26T SR9205

1
0Ohm C9200
1 2 G22 5G1 2.2UF/6.3V
25,80 VRM_PWRGD
1

vx_c0603_small

2
X5R/+/-10%
1 2 ALL_SYSTEM_PWRGD D1 3 4S1

D9202
RB751V-40
A T9201 A
TPC26T
<Variant Name>

FORCE_OFF# 32
1

Title : POWER_PROTECT
PEGATRON PROPRIETARY AND CONFIDENTIAL
Engineer: James_Liao
Size Project Name Rev
Custom 1.1
SU4EA
Date: Friday, March 10, 2017 Sheet 92 of 94
5 4 3 2 1
5 4 3 2 1

+A/D_DOCK_IN +A/D_DOCK_IN 60,88

+BAT_CON +BAT_CON 60,88

+AC_BAT_SYS +AC_BAT_SYS 45,80,81,82,83,86,88,97

+5VA +5VA 56,81


D D
+3VA +3VA 24,30,31,36,53,56,57,81,88
FOR POWER TEST
+5VO +5VO 26,81,82,83,84,85,86,88,91

+3VO T9300
+3VO 81,84,85,91,96
JP9300 TPC28T
+2.5VO SGL_JUMP
+2.5VO 84
1 2
+3VA CPU_VRON_PWR 80

1
1 2
+1.8VO +1.8VO 84,91
T9301
JP9301 TPC28T
SGL_JUMP
1 2
SUSB#_PWR 83,84,91

1
1 2
+1.2VO +1.2VO 83 T9302
JP9302 TPC28T
+1.0VO SGL_JUMP
+1.0VO 82,91
1 2
SUSC#_PWR 83,85,91

1
1 2
+0.6VO +0.6VO 83
T9303
JP9303 TPC28T
+12VSUS SGL_JUMP
+12VSUS 81,91
1 2
VSUS_ON 30,81,82,84

1
C 1 2 C
+5VSUS +5VSUS 52,56,81

+3VSUS +3VSUS 4,25,26,28,30,31,33,51,52,53,68,81,92

+1.8VSUS +1.8VSUS 9,26,84

+1.0VSUS +1.0VSUS 26,82

+12V +12V 91
BATTERY IN DETECT
+3V +3V 25,31,44,45,57,91,92

+2P5VPP +2P5VPP 36,57,84


R9300
+1.2V 1KOhm
+1.2V 4,7,15,16,17,18,57,83
vx_r0402_small
+1.0V +1.0V 7,57,91 1%
2 1
60 TS1# BAT1_IN_OC# 30

2
+12VS C9300 @
+12VS 28,57,91
0.1UF/16V
+5VS vx_c0402_small
+5VS 36,48,50,51,57,61,80,91,97

1
B 10% B
+3VS +3VS 3,4,17,20,21,22,23,24,30,31,32,33,36,37,40,45,48,50,51,52,53,57,61,91,92

+1.8VS +1.8VS 36,48,50,51,57,61,80,91,97

+0.6VS +0.6VS 15,17,57,83

+VCCPRIM_CORE +VCCPRIM_CORE 26,82

+VCCIO +VCCIO 3,7,57,91

+VCCSA +VCCSA 7,57,80

+VCCGT +VCCGT 6,57,80

+VCORE +VCORE 5,57,80

A A
<Variant Name>

POWER_SIGNAL
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
Engineer: James_Liao
Size Project Name Rev
Custom 1.1
SU4EA
Date: Friday, March 10, 2017 Sheet 93 of 94
5 4 3 2 1
5 4 3 2 1

Design rating
UMC4N +12V (5mA)
SUSC#_PWR (SWITCH)

charge
+12VSUS
+5VO pump(triple
UMC4N +12VS (5mA)
VSUS_ON SUSB#_PWR (SWITCH)
volatger)

D D

TDC 5.196A
+3VO
+3VSUS (0.209A)
SN10548 +3V
SUSC#_PWR (0.24A)

SN10548 +3VS (4.051A)


SUSB#_PWR

(0.01A)

+3VA
+3VA (0.078A)
+AC_BAT_SYS
+A/D_DOCK_IN TPS51225CRUKR TDC 5.312A
BQ24735 +5VO
+5VSUS (4.044A)
VSUS_ON
AP2334GN-HF
+5VS (1.134A)
BAT +5VAO SUSB#_PWR

FORCE_OFF_PWR +5VA (0.06A)


SUS_PWRGD

C C
TDC 5.63A
+1.0VSUS (2.1A)
+VCCPRIM_CORE (1.544A)
+1.0VO
APW8713EQBI-TRG SISA14DN-T1-GE3 +VCCIO (1.872A)
SUSB#_PWR
VSUS_ON 1.0VSUS_PWRGD

AP2334GN-HF +1.0V (0.114A)


SUSC#_PWR

TDC 4.96A
+1.2VO
+1.2V (4.48A)
+5VO RT8231BGQW

SUSC#_PWR +0.6VO
+0.6VS (0.48A)
DDR_PG_CTRL DDR_PWRGD

TDC 0.296A
+3VO +1.8VO
G9661-25ADJF11U +1.8VSUS (0.136A)
VSUS_ON 1.8VSUS_PWRGD

B B

TDC 0.4A AP2334GN-HF +1.8VS (0.16A)


SUSB#_PWR
+3VO +2.5VO
G9661-25ADJF11U +2P5VPP (0.4A)
SUSC#_PWR +2.5V_PWRGD

U22(15W) U23e(28W)
TDC 21A TDC 23A
+5VS
+5VS SIC634CD-T1-GE3 +VCORE (U22) (21A)
CSX, CSX,
CSY1, TEMP,
ALLSYS_PG_AND,CPU_VRON_PWR CSZ SYNC,
TEMP, PWMX U23e(28W)+VCCGT
VR_SVID_CLK, SYNC, TDC 35A
VR_SVID_ALERT#, PWMX, U22(15W) TDC 5A -->+VCCGTX
VR_SVID_DATA PWMY1,
PWMZ TDC 18A
+5VS
ISL95859AHRTZ SIC634CD-T1-GE3 +VCCGT (U22) (18A)
VCORE_VCCSENSE, CSY1,
VCORE_VSSSENSE TEMP,
SYNC,
PWMY1
VCCGT_VCCSENSE,
VCCGT_VSSSENSE U22(15W) U23e(28W)
TDC 4A TDC 5A
+5VS
VCCSA_VCCSENSE, +VCCSA (U22) (4A)
VCCSA_VSSSENSE ISL95808HRZ
CSZ,
A VRM_PWRGD, TEMP, A
VR_HOT# SYNC,
PWMZ

<Variant Name>

Title :POWER_FLOWCHART
PEGATRON PROPRIETARY AND CONFIDENTIAL
Engineer: James_Liao
Size Project Name Rev
Custom 1.1
SU4EA
Date: Friday, March 10, 2017 Sheet 94 of 94
5 4 3 2 1

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