RAYMING PCB & ASSEMBLY

Xilinx XC7A35T-2CSG325i FPGA

The Xilinx XC7A35T-2CSG325i device belongs to the Xilinx-7 series family

of FPGAs that is addressing the wide range of requirements of the system.

The requirements range from higher volume applications, logical capacity,

smaller form factor, low cost up to ultra-higher bandwidth for abundant

higher-performance applications. This family of FPGAs is comprising

of Kintex-7, Virtex-7, Spartan-7, and Artix-7devices.

Spartan-7 devices are designed for low-cost optimization,

lower power consumption, and higher input/output performance. These

devices are available in lower-cost, minor form-factor packaging bearing a

minor PCB footprint. The Artix-7 devices are designed for applications

that consume less power, require the use of serial transceivers along with

higher logical throughput and higher DSP. These devices are offering

lower costs for the bill of material for cost-sensitive applications.

The Kintex-7 devices are designed for achieving the best

price-performance along with double improvements when compared to

its competitor devices developing a novel FPGAs class. The Virtex-7

devices are designed for achieving the higher performance of the system

along with double capacity improvement for the performance of its

system. The device’s higher capability is enabled with the technology of

stacked silicon interconnect.

PCB Manufacturing & Assembly Services https://www.raypcb.com/

 RAYMING PCB & ASSEMBLY

Request Xilinx XC7A35T-2CSG325i Quote Now

Table of Contents

Summary of Xilinx XC7A35T-2CSG325i

The Xilinx XC7A35T-2CSG325i device is capable of innovative FPGA

logic that bears high performance and is grounded on the 6-inputs lookup

table which can be configured in the form of distributed memory. There is

a block RAM of size 36KB with integrated FIFO logic for buffering the data

on the chip. The device is having its higher performance SELECTIO

technology supporting the DDR3 interface with a size of around 1866MB/s.

The serial connectivity of the device is a high speed and has an integrated

transceiver of multi-gigabit that ranges from 600Mb/s to 6.6Gb/s and

offers a dedicated optimized low-power mode for its all interfaces on the

PCB Manufacturing & Assembly Services https://www.raypcb.com/

 RAYMING PCB & ASSEMBLY

chip. There is an analog interface that is user-configurable incorporating a

12-bit dual MSPS converter (analog to digital) along with an integrated

thermal sensor. Xilinx XC7A35T-2CSG325i has clock management tiles or

CMT that are powerful and integrating both mixed-mode clock manager

and phase-lock loop for achieving lower jitter and higher precision. The

device is having an embedded MicroBlaze processor.

SSI (Stacked Silicon Interconnect) Technology of Xilinx

XC7A35T-2CSG325i

Several challenges are related to the creation of FPGAs with higher

capacity that Xinlix is currently addressing through its SSI technology. This

technology is enabling the multiple logic regions to be integrated along

with a layer that is passive interposer through the use of proven assembly

and manufacturing facilities from the leaders of industry for creating an

FGPA having over 10 thousand SLR connection to provide connectivity of

higher bandwidth along maintaining lower latency and consume less

power. Two different types of SLRs are utilized in the Virtex-7 series of

FPGAs. One of the SLRs is logic intensive that is utilized in the T-devices

and SLR that is block RAM, DSP, or transceiver-rich is utilized in the HT and

XT-devices. The SSI technology is enabling the production of FPGAs that

have the highest capacity when compared to conventional methods of

PCB Manufacturing & Assembly Services https://www.raypcb.com/

 RAYMING PCB & ASSEMBLY

manufacturing that enable the higher performance and capacity FPGAs

created for reaching to production phase rapidly with lower risks.

Distribution of Clock

The Xilinx XC7A35T-2CSG325i devices are offering a total of 6 dissimilar

kinds of clock lines. The clock lines are names BUFMR, BUFG, BUFH,

high-performance, BUFIO, and BUFR. All of these clock lines are for

addressing the requirements of clocking for getting minor propagation

delay, highest fanout, and low skew.

Xilinx XC7A35T-2CSG325i’s Global Clock Lines

The Xilinx XC7A35T-2CSG325i devices is having a total of 32 global clock

lines that are having the higher fanout that is reaching the flipflop clock,

logic inputs, reset/set pins, and clock enable too. A total of twelve global

clock lines are there residing within the clock region that drives through

the clock buffers lying horizontally designated as BUFH. Every BUFH is

capable to be disabled or enabled independently which allows turning OFF

of the clocks through a specific region offering fine-grain control through

which the regions of the clock are consuming power. The global clock lines

are capable to be driven through global clock buffers that are allowing a

glitch-free performance of the multiplexing of the clock along with other

functions of the clock enable. Global clock lines can also be configured and

PCB Manufacturing & Assembly Services https://www.raypcb.com/

 RAYMING PCB & ASSEMBLY

driven from the configuration management tiles that is eliminating the

delay of clock distribution.

Regional Clocks of Xilinx XC7A35T-2CSG325i

The regional clocks are capable of driving all of the clock destinations

within their regions. The region is elaborated as the area having 50 of the

input/output and 50 of CLBs. The Xilinx XC7A35T-2CSG325i devices are

having about 2 to 24 regions in total. A total of 4 tracks of regional clock

are in each region. Every buffer of regional clock could be driven through

any of its 4 pins for clock-capable function at the input and their frequency

could also be optionally divided with an integer that ranges from 1 to 8.

Correction and Detection of Errors

Every of the 64-bits block RAM of Xilinx XC7A35T-2CSG325i is capable of

generation, storage, and utilization of 8 hamming code bits. The block

RAM is also capable of performing error correction of single-bit and error

detection of double-bit while the process of reading is in progress. The

error correction and detection logic are also utilized whenever reading

from or writing to the memories that are 64 to 72 bits wide.

Request Xilinx XC7A35T-2CSG325i Quote Now

Out-of-Band Signaling

PCB Manufacturing & Assembly Services https://www.raypcb.com/

 RAYMING PCB & ASSEMBLY

The transceivers of the device Xilinx XC7A35T-2CSG325i are offering the

out-of-band signaling that is utilized whenever sending lower speed

signals from transmitter to that of receiver when the rapid transmission of

serial data is not active. This is conventionally done whenever the link is at

the power-down condition and is not adjusted.

Partial Reconfiguration, Readback, Encryption

The entire Xilinx-7 FPGA series with an exception of XC7S15 and XC7S6,

bitstreams of FPGAs are containing sensitive consumer IP. This consumer

IP is protected with AES encryption having 256-bit along with

SHA-256/HMAC verification for prevention of illegal duplication of design.

These FPGAs are performing decryption while the configuration is in

progress with the help of a 256-bit key that is stored internally. Abundant

of the configuration data could be read-back without having an impact on

the operation of the system. Conventionally, the configuration is

considered as the all-or-nothing operation; however, in the Xilinx-7 series

family, the FPGAs are supporting partial reconfiguration. This feature is

flexible and powerful too allowing the users to alter a certain portion of

the device, keeping other portions in static condition.

Related Posts:

1. What Is Xilinx XC7A35T-2FGG484i?

PCB Manufacturing & Assembly Services https://www.raypcb.com/

 RAYMING PCB & ASSEMBLY

2. What is the difference between Xilinx FPGA and Altera FPGA?

3. What Is Xilinx Artix-7 FPGA ?

4. Where to buy Xilinx XC18V01PC20C FPGA

https://www.raypcb.com/xilinx-xc7a35t-2csg325i/

PCB Manufacturing & Assembly Services https://www.raypcb.com/