2023 IEEE 3rd INTERNATIONAL CONFERENCE ON SUSTAINABLE ENERGY AND FUTURE ELECTRIC TRANSPORTATION (IEEE SEFET 2023)
Analyzing the Effect of Choke Placement on
Differential-Mode Supra-Harmonics in Variable
Frequency Drives: New Standardization
Amir Ganjavi, Member, IEEE, Dinesh Kumar, Senior Member, IEEE, Firuz Zare, Fellow, IEEE,
and Pooya Davari, Senior Member, IEEE
Abstract—Three-phase variable speed drives are essential com-
ponents of energy conversion systems. Magnetic chokes are
typically installed on the DC or AC sides of drive systems to meet
electromagnetic compatibility criteria for the 0–2 kHz frequency
range. Recently, worldwide standards committees adopted new
emission limits for the frequency range of 2–9 kHz to minimise
power quality problems caused by the high penetration of power
electronics equipment. This paper analyzes the effect of choke
placement on differential-mode supra-harmonics at the 0–9kHz
frequency range. The mathematical calculations are used to
perform a comparison analysis on selecting either two DC-link
choke inductors or three AC line inductors to attenuate the
differential-mode noises at the grid. To that end, single-phase
equivalent circuits are used to calculate differential-mode noise
components. Following that, supra-harmonic contents of currents
are estimated based on the commutation of the front-end rectifier.
In consequence, through the derived mathematical equations,
conducted noise emissions entering to the grid are analytically
modeled. Laboratory test results are used to prove the validity
of the presented theoretical subjects.
Index Terms—AC Choke, DC Choke, DC-link capacitor,
differential-mode current, electromagnetic compatibility (EMC),
harmonics, motor drive system, variable frequency drive (VFD).
I. I NTRODUCTION
With the fast pace of worldwide industry, Variable Fre-
quency Drives (VFDs) have been playing a key role in
energy conversion systems. VFDs can control the speed of the
machinery with improved efficiency, making them as the main
components in industrial applications [1]. Fig. 1 shows the
typical configuration of a VFD excluding the Electromagnetic
Interference (EMI) filter. According to Fig. 1, in a conventional
application of VFD, the grid's AC voltage is converted to the
DC voltage (vrec ) by the front-end rectifier. Afterwards the
smoothed DC voltage is converted to the controlled AC output
voltage by the rear-end inverter.
To maintain the power quality of the grid, manufactures
should comply with the Electromagnetic Compatibility (EMC)
A. Ganjavi is with the School of Information Technology and Electrical
Engineering, The University of Queensland, Brisbane, QLD 4072, Australia,
e-mail: (a.ganjavi@uq.net.au).
D. Kumar is with the Global Research and Development Center, Danfoss
Drives A/S, 6300 Gråsten, Denmark, e-mail: (dineshr30@ieee.org).
F. Zare is with the School of Electrical Engineering and Robotics,
Queensland University of Technology, Brisbane, QLD 4000, e-mail:
(f.zare@qut.edu.au).
P. Davari is with the AAU Energy Department, Aalborg University, Aalborg
9220, Denmark, e-mail: (pda@energy.aau.dk).
1
standards at the frequency ranges of 0–2 kHz and 150 kHz–30
MHz [2], while so far, there has not been a clear regulation for
the frequency range of 2–150 kHz [3]. Recently however, due
to the significant advances in power electronics technology and
semiconductor materials, the switching frequency of devices
are increased. Although penetration of high switching power
converters offers advantages of reduced size and improved
performance, it poses serious problems for the power quality
of the network [4]. To prevent from this issue, the international
standardization committees including NASI, IEC SC 77A, and
CISPR have recently recommended new EMC limits for the
frequency range of 2–150 kHz. Consequently, the distortions
at the frequency range of 2-150 kHz are known as supra-
harmonics. The 2–150 kHz frequency range is divided into the
frequency ranges of 2–9 kHz and 9–150 kHz in accordance
with the International Electrotechnical Commission (IEC) SC
77A [5].
As shown in Fig. 1, in order to suppress the low order har-
monics of 0–2 kHz at the grid, typically either two inductors
at the DC link (Ldc ) or three inductors at the AC line (Lac )
are placed. Accordingly, the DC-link and AC line inductors
are known as DC and AC chokes, respectively. Until now,
considering that the standardization activity for the 2–9 kHz
frequency range is still at its ongoing stage, there is a scarcity
of research to analyze the impact on distribution network due
to the growing emission in this frequency range [6]. With this
regard, although the DC and AC chokes are conventionally
utilized to attenuate the low order harmonics of 0–2 kHz,
their effect on the high frequency harmonics of 2–9 kHz can
significantly affect the quality of the network, which is needed
to be studied.
Research studies for harmonics in 0–9 kHz have been
carried out in a number of articles, which can be categorized
into two main sections:
• Measurement methods [7], [8]
• Prediction and analysis [9], [10]
While a large number of research studies are focused on
the measurement methods and some on the analysis of the
conducted emissions at 2–150 kHz, lack of research can be
clearly noticed in detection, finding the origins and offering
solutions for harmonic emission at 0–9 kHz.
In this paper, a mathematical method is presented to model
the harmonic contents of the grid at 0–9 kHz frequency range.
The proposed strategy accurately detects the origin of the
grid harmonics and their dominant effect at specific ranges of
2023 IEEE 3rd INTERNATIONAL CONFERENCE ON SUSTAINABLE ENERGY AND FUTURE ELECTRIC TRANSPORTATION (IEEE SEFET 2023) 2

(a)

Fig. 1. Three-phase VFD excluding the EMI filter.

frequencies. To this end, the EMI noise sources are modeled

with their equivalent Differential Mode (DM) circuits. By
modeling the harmonic current contents at the grid, the effect
of the choke placement on low and high frequency harmonic
contents can be assessed. (b)
Fig. 2. (a) Single-phase DM equivalent circuit of the drive system (see Fig. 1)
II. S INGLE -P HASE E QUIVALENT C IRCUITS FOR for harmonic components, (b) the equivalent circuit considering the effect of
H ARMONIC C OMPONENTS rectified grid voltage.
To assess the power quality of the grid in VFDs, EMI
noise sources should be modeled. According to Fig. 1, there
line inductors are added. As shown in the figures, AC chokes
are two main noise sources in the system that can affect the
can cause an overlap (γ) during the switching of the diode
power quality at the grid: 1- The DC voltage (vrec ) generated
rectifier. This phenomenon is known as the commutation of
by the grid through the front-end rectifier, 2- The Pulse
the diode rectifier, leading to the simultaneous conduction of
Width Modulated (PWM) output voltage through the rear-end
three diodes. As a result, when AC chokes are placed in the
inverter. In this paper, only the effect of the rear-end rectifier
system, two diodes from the upper side of the rectifier and
is investigated as it has the major impact on the harmonic
one diode from the lower side (or vice versa) will conduct
contents at 0-9 kHz [11]. To estimate the harmonic contents
simultaneously. To mathematically analyze this phenomenon,
at the grid, the single-phase DM equivalent circuit of the
the switching functions of the three-phase six pulse rectifier
drive has been obtained, as shown in Fig. 2 (a). Subsequently,
is obtained as follows [12]:
in Fig. 2 (b), the effect of the harmonic source due to the
rectified grid voltage has been considered (vrec−i ). It is to be +∞ √
X 3
noted that in Fig. 2, L′ac is the hypothetical AC line inductor sa =
kπ
transferred to the DC link side due to commutation of rectifier. l=0,1,2,3...
k=6l+1
Therefore, by calculating the mathematical equations of the
current harmonic contents, the effect of magnetic chokes on × {sin(kγ) sin(kωg t) + [1 + cos(kγ)] cos(kωg t)}
+∞ √
the 0–9 kHz harmonics can be analyzed. X 3
−
kπ
l=1,2,3...
III. H ARMONICS G ENERATED BY THE R ECTIFIED G RID k=6l−1
VOLTAGE × {sin(kγ) sin(kωg t) + [1 + cos(kγ)] cos(kωg t)}
Harmonic currents generated by the switching of the rec- (1)
tifier can affect both the 0–2 kHz and 2–9 kHz contents at
the grid. In this section, the harmonic contents caused by the 2π
rectified grid voltage are calculated in accordance with Fig. 2 sb (t) = sa (t − ) (2)
3
(b). According to Fig. 2 (b), first the DC-link rectifier side
harmonic current (i′rec−i ) is estimated and then the harmonics 2π
sc (t) = sa (t + ) (3)
transferred to the grid through the rectifier are obtained. 3
where ωg =2πfg is the grid fundamental angular frequency.
A. Estimating the DC-Link Rectifier Side Current Harmonics Moreover, γ is defined as the overlap angle, which can be
Due to Rectifier Switching calculated as [13]:
The placement of the chokes significantly affects the switch- 2Lac ωg Irec
ing function of the rectifier. In Fig. 3, the drive's voltage γ = cos−1 (1 − √ ) (4)
3Vm
and current waveforms are shown. Accordingly, Fig. 3 (a)
shows the waveforms when DC chokes are placed in the 4π
system, whereas Fig. 3 (b) depicts the waveforms when AC Lac = L′ (5)
4π − 3γ ac
2023 IEEE 3rd INTERNATIONAL CONFERENCE ON SUSTAINABLE ENERGY AND FUTURE ELECTRIC TRANSPORTATION (IEEE SEFET 2023) 3

By substituting the switching functions calculated from (1)–

(3) into (7), it can be concluded that vrec is composed of DC
and harmonic AC components, as:
X
vrec = Vrec + vrec−i
|{z}
(8)
DC component
| {z }
Harmonic component
(i = 6, 12, and 18)
From (8) and in accordance with Fig. 2 (b), the parameter
vrec−i is the main harmonic source defining the behavior of
the grid voltage through the rectifier. In other words, vrec−i is
the ith harmonic content of the rectified voltage. Considering
the fact that according to (8), vrec is composed of DC and
(a) harmonic components, the DC-link rectifier side current irec
(see Fig. 1) can be expressed as:
X
irec = Irec + i′rec−i
|{z}
(9)
DC component
| {z }
Harmonic component
(i = 6, 12, and 18)
where i′rec−i is the ith harmonic content of the DC-link rectifier
side current due to the rectifier switching, which can be
calculated in according to Fig. 2 (b), as:
vrec−i
i′rec−i =
j2L′ac iωg + j2Ldc ωg + Cdc2jωg (10)
(i = 6, 12, and 18)
It is worth mentioning that our investigations revealed that in
(b) (8)–(10), the accuracy of the equations is sufficient up to 18th
Fig. 3. Rectifier's output voltage (vr ), DC-link rectifier side current (irec ), harmonic order and deviations in the phase of the contents
rectifier's switching function (sa ), and grid current (ia ). (a) DC chokes in the could be seen at higher orders. This could be attributed to
system, (b) AC chokes in the system. the fact the calculated switching functions in (1)–(3) are
normalized estimated terms of the voltages across the diodes
rather than the real values.
where Lac , Vm , and Irec are the AC choke inductance,
maximum of the grid phase voltage, and the average of DC-
link rectifier side current. Also, L′ac is the hypothetical AC line B. Estimating the Current Harmonics Generated at the Grid
inductor transferred to the DC link side due to commutation. Side Due to Rectifier Switching
From (1), it can be clarified that AC side inductors (Lac ) The current harmonics generated at the grid side due to
are the main factors contributing to the overlap angle and the switching of the rectifier stem from two main sources:
commutation of the rectifier. According to Fig. 1, by placing 1) Harmonic contents generated by the smoothedP DC current
AC chokes in the system, the current flowing to the diodes Irec , and 2) Harmonic contents generated by i′rec−i (see
cannot instantly go to zero or instantly reach to the current (9)). Consequently, the grid side current harmonic contents
load. Consequently, the transient performance of the system in for phase a can be defined as follows:
terms of harmonic generation at the grid is improved, which
will be analyzed in detailed in this study. i′a−n = iζ−n + iη−ya
The voltage across the rectifier's output vrec (see Fig. 1)
|{z} | {z }P
Generated by Irec Generated by i′rec−i
can be obtained by the product of the rectifier’s switching (11)
n = 5, 7, 9, 11, ...
functions and the grid phase voltages, as [14]:
y = 5 and 7
vrec = sa va + sb vb + sc vc (6) where i′a−n is the nth harmonic content of the grid current for
phase a due to switching of rectifier, iζ−n is the nth harmonic
where va vb , and vc , are the instantaneous values of the grid content of the grid current generated by Irec , and iη−ya is
phase voltages, which are expressed as: thePyth harmonic content of the grid current for phase a due
to i′rec−i . In this study, the analysis is conducted only for
va = Vm cos ωg t phase a and for other phases, the same procedure can be
vb = Vm cos ωg t − 2π/3 (7) adopted. In the followings, the broken down terms in (11)
vb = Vm cos ωg t + 2π/3 are separately calculated.
2023 IEEE 3rd INTERNATIONAL CONFERENCE ON SUSTAINABLE ENERGY AND FUTURE ELECTRIC TRANSPORTATION (IEEE SEFET 2023) 4

1) Grid current iζ−n generated by Irec : The grid current According to Fig. 5, when DC chokes are placed in the system,
iζ−n generated by the smoothed DC current Irec , can be the grid current (ia ) includes sharp transients in contrary with
expressed as (12) (provided at the top of the following page) when the chokes are placed at the AC line. This could be
in half of a cycle [15]. attributed to the fact that the AC chokes create an overlap angle
By extending (12), the Fourier series of iζ−n can be in the switching function of the diode rectifier, preventing from
calculated as: the instant changes of the current.
In Figs. 6 (a) and (b), the FFT of ia is shown for the
+∞
X frequency ranges of 0–2 and 2–9 kHz, respectively. According
iζ−n = (Aζ−n sin nωg t + Bζ−n cos nωg t) (13) to Fig. 6 (a), the placement of the chokes at DC or AC sides
n=5,7,9... has negligible effect on the contents below 2 kHz. However,
where Aζ−n and Bζ−n can be obtained as (14) and (15) as can be seen in Fig. 6 (b), when AC chokes are placed in
(provided at the top of the following age). the system, high order harmonic contents of the grid current
2) Grid current iη−ya generated by
P ′
irec−i : The grid are more effectively attenuated.
current iη−ya is
P ′ calculated by the product of the harmonic
contents of irec−i and the rectifier's switching function for V. C ONCLUSION
phase a, as:
To comply with the power quality standards at the 0–
X 2 kHz frequency range, magnetic chokes are conventionally
iη−ya = sa i′rec−i , y = 5, and 7 (16) placed at the DC or AC sides of the motor drive systems.
Recently, new power quality standards have been defined for
From (11) and (12)–(16), harmonic spectrum of the grid
the frequency range of 2–9 kHz to reduce the noise emissions
current caused by the switching of the rectifier can be scien-
caused by the fast switching power converters. In this paper,
tifically assessed. Through these equations, the origin of the
a mathematical approach has been adopted to analyze the
harmonics generated at the grid together with the effect of
effect of choke placement on the differential-mode supra-
choke placement can be analyzed.
harmonics at the 0–9 kHz frequency range. To this end, the
single-phase differential-mode equivalent circuit of the drive
IV. E XPERIMENTAL V ERIFICATION
system is extracted. Subsequently, harmonic contents of the
Experiments have been conducted for both DC and AC currents are calculated according to commutation of the front-
choke configurations in the drive system. To conduct the end rectifier. Through the derived mathematical equations,
measurements, the current probes from Keysight N2783B conducted noise emissions entering to the grid are analytically
and the differential voltage probes from Sapphire Instruments modeled. Laboratory test results are used to prove the validity
(SI-9110) both with the bandwidth of 100 MHz have been of the presented theoretical subjects. In the full version of
used. The experiments are carried out with the specifications the paper, practical guidelines to choose the right position
depicted in Table I. of the magnetic chokes for differential-mode supra-harmonics
attenuation at the grid will be provided.
TABLE I
D RIVE S YSTEM PARAMETERS ( SEE F IG . 1)
R EFERENCES
Symbol Parameter Value
va,b,c Grid phase rms voltage 240 V
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data with the results obtained from the analytical model for and S. K. Rönnberg, “Measurements of high-frequency (2–150 khz) dis-
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ia . Likewise, Figs. 5 (a) and (b) show the waveforms when networks,” IEEE Transactions on Instrumentation and Measurement,
DC and AC chokes are placed in the system, respectively. vol. 70, pp. 1–10, 2021.
2023 IEEE 3rd INTERNATIONAL CONFERENCE ON SUSTAINABLE ENERGY AND FUTURE ELECTRIC TRANSPORTATION (IEEE SEFET 2023) 5


0,


0 < ωg t < π/6




 1 − sin (ωg t + π/6)




 1 − cos γ Irec , π/6 < ωg t < π/6 + γ






iζ−n = Irec , π/6 + γ < ωg t < 5π/6 (12)



  

 sin (ωg t + 5π/6)
−




 1 1 − cos γ Irec , 5π/6 < ωg t < 5π/6 + γ







0, 5π/6 + γ < ωg t < π


√
3Irec (−1)([2z+n+1]/2) 2 sin nγ
  
1 −2 sin nγ sin (n + 1)γ sin (n − 1)γ
Aζ−n = + × + + (14)
π n 1 − cos γ x n+1 n−1

√
3Irec (−1)([2z+n−1/2]) 2 cos nγ
  
1 2(1 − cos nγ) 1 − cos (n + 1)γ 1 − cos (n − 1)γ
Bζ−n = + × + + (15)
π n 1 − cos γ n n+1 n−1

n = 6z ± 1 (z = 1, 2, 3, ...)

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[15] R. L. Witzke, J. V. Kresser, and J. K. Dillard, “Influence of a-c reactance
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vol. 72, no. 3, pp. 244–253, 1953.

Fig. 4. Comparison between the experimental and the analytical data for the
harmonic contents of the input current ia (DC chokes are placed in the drive)

[7] E. O. A. Larsson, M. H. J. Bollen, M. G. Wahlberg, C. M. Lundmark,

and S. K. Rönnberg, “Measurements of high-frequency (2–150 khz) dis-
tortion in low-voltage networks,” IEEE Transactions on Power Delivery,
vol. 25, no. 3, pp. 1749–1757, 2010.
[8] V. Khokhlov, J. Meyer, A. Grevener, T. Busatto, and S. Rönnberg,
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and A. Abbosh, “Common-mode current prediction and analysis in
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2020.
2023 IEEE 3rd INTERNATIONAL CONFERENCE ON SUSTAINABLE ENERGY AND FUTURE ELECTRIC TRANSPORTATION (IEEE SEFET 2023) 6

(a)
(a)

(b)
Fig. 5. Experimental waveforms of the load phase current iu , the leg phase
voltage vuo , and the grid phase current ia (Po = 3.8kw). (a) DC chokes
placed in the system, (b) AC chokes placed in the system. (b)
Fig. 6. Experimental harmonic contents of ia . (a) 0–2 kHz, (b) 2–9 kHz.