1 2 3 4 5 6 7 8

EDITED BY MINGOO EDITED BY MINGOO

SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONIS CO'S PROPRIETARY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
Comply with the threshold of substances
A which are specified in 0QA-2049 A
BLOCK NAME BLK PAGE NO.
sa750_2ndfloor_v14 1 OF 6

B
SA750 BOARD SCHEMATIC B

TABLE OF CONTENTS

01.COVER PAGE
02.POWER BLOCK
SJP3D11/M180(ASIC)
03.CONNECTOR BLOCK
C C
04.M180 POWER
PAENL : 27 - LTM270HU01 05.M180 LVDS/DDR
23 - LTM230HU03 06.M180 DDR1 MEMORY

D D

MODEL : SA750_2NDFLOOR

PCB CODE : BN41-01631A

REVISION : MP

DATA : 2011.05.20
E E

PCB LAYOUT STACKUP(1.2T)

PROJECT NAME DRAWN BY
LAYER 1 ----- TOP (SIGNAL1) A3
F Song Woong Jae F
sa750_2ndfloor_v14
LAYER 2 ----- INNER 1 (GND) CHECKED BY
Unknown
LAYER 3 ----- INNER 2 (POWER)
DEV.STEP REV. APPROVED BY
LAYER 4 ----- BOTTOM (SIGNAL2) SAMSUNG
SAMSUNG
Unknown 1.0 Unknown
LAST EDITED TIME TOTAL PAGE NO.
Fri May 20 10:25:13 2011 1 OF 6
1 2 3 4 5 6 7 8
EDITED BY MINGOO

D:/atdm/PROJECTS/sa750_2ndfloor_v14\sa750_2ndfloor_v14.cpm
 1 2 3 4 5 6 7 8
EDITED BY MINGOO EDITED BY MINGOO

SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONIS CO'S PROPRIETARY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
02.POWER BLOCK
Comply with the threshold of substances
A which are specified in 0QA-2049 A
BLOCK NAME BLK PAGE NO.
sa750_2ndfloor_v14 2 OF 6

+5V_PANEL
R507
100OHM 5%

PANEL_EN
+14V_IN TPS54620RGY +5V

0467005.NR
F601
IC506 C552
75KOHM
R509 1 14 100NF 50V
RT/CLK PWRGD L504
2 13 4.7UH *
GND BOOT
1% 3 12 BD505
GND PH
4 MGND1 11 *
PVIN PH
5 10 C556
0.012OHM
PVIN EN
6 9 50V R512
VIN SS/TR
5.6KOHM
7 8 1NF
VSENSE COMP
C508 C509
C507
10UF 10UF
B 10UF R513
B
16V 16V R510
16V 47KOHM
1.2KOHM C555
C553 C554 C561
1% 10UF
10UF 10UF 10UF
C510 C512 16V
C506 16V 16V 16V
10UF 10UF
10UF R514
16V 16V
16V 15NF
10KOHM
50V
1%
C567

R521
100OHM 5%

DPMS_ON
FGND +14V_IN

+1.2V
+1.2V_M180
IC502
AOZ1033AI L502
4.7UH *
1 8 BD507
PGND LX
2 7
VIN LX * 0.012OHM
3 6
C AGND EN C
4 5
FB COMP
C562 C564 R525 100UF
10UF 10UF 5.1KOHM 6.3V
16V 16V R523 C523 C524 C525 C573 C571 C575
15KOHM 1NF 10UF 10UF 10UF 1NF
1% 50V 6.3V 6.3V 6.3V 50V
C563 C565
+3.3V_M180 10UF 10UF

R520
16V 16V
C522 R526
100OHM 5%

046701.5NRHF
3.3NF 10KOHM
DPMS_ON 50V 1%

F506
+3.3V
IC501
AOZ1033AI L501 FGND
4.7UH *
1 8 BD506 FGND
PGND LX
2 7
VIN LX * 0.012OHM
3 6 R517
AGND EN
4 5 30KOHM
D FB COMP D
C557 C559 1%
10UF 10UF D506 100UF
16V 16V R516 6.3V
C535 R518

SDZ6V2G
39KOHM 1.2KOHM C515 C516 C517 C577 C576
100NF
1% 1% 10UF 10UF 10UF 50V
50V C578 6.2
C558 C560 6.3V 6.3V 6.3V 10NF
100NF
10UF 10UF
R519 16V
16V 16V C513
1NF 10KOHM
50V 1%
+2.5V_M180_DDR
+2.5V_DDR
G950T45R
+3.3V_M180 Q505 IC505 *
6 1 1 3 BD509
D D IN OUT
FGND 5 2
D D
4 3 GND
0.012OHM
S G R545 R546 R547
C544 1OHM
SI3443CDV-T1-GE3 1OHM 1OHM

2
10UF
R543 C543
E 6.3V E
100KOHM 1UF
16V C545 C546 C547
10UF 10UF 10UF
FGND FGND 6.3V 6.3V 6.3V

R542 FGND FGND FGND

10KOHM

R548
47KOHM 2SC2412K-Q
C
B Q504
ENABLE_3D
E
5%

FGND
PROJECT NAME DRAWN BY
A3
F Song Woong Jae F
sa750_2ndfloor_v14
CHECKED BY
Unknown
DEV.STEP REV. APPROVED BY
SAMSUNG
SAMSUNG
Unknown 1.0 Unknown
LAST EDITED TIME TOTAL PAGE NO.
Fri May 27 19:47:31 2011 2 OF 6
1 2 3 4 5 6 7 8
EDITED BY MINGOO

D:/atdm/PROJECTS/sa750_2ndfloor_v14\sa750_2ndfloor_v14.cpm
 1 2 3 4 5 6 7 8 9 10 11 12
EDITED BY MINGOO EDITED BY MINGOO

SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONIS CO'S PROPRIETARY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

A
Comply with the threshold of substances
which are specified in 0QA-2049
03.CONNECTOR BLOCK A
BLOCK NAME BLK PAGE NO.
sa750_2ndfloor_v14 3 OF 6

DC JACK +14V_IN LVDS OUTPUT

LVDS INPUT
CN504 0.01OHM CN401

GCD01-0091
*
+14V_IN2
CN400 MGND1 1 BD504
+14V_IN
3

MGND2
51

FF05001-82
1
2 F_TXO0N
60

10UF

10UF

10UF

10UF
GND_ADP 2
B AU_MCLK 4 F_TXO0P B

16V

16V

16V

16V
MGND2
59 MGND2 GND_ADP2 3 50
AU_SCLK F_TXO1N
58
EZ14-060-G213
4
AU_LRCLK F_TXO1P

C901

C903

C905

C907
57 49
AU_SDOUT
56
55 48

10UF

10UF

10UF

10UF
LVDS_TX4_DP

16V

16V

16V

16V
54 FGND
LVDS_TX4_DN
53 47
LVDS_TX4_CP

C902

C904

C906

C908
52 5
LVDS_TX4_CN F_TXO2N
51 6 46
LVDS_TX4_BP F_TXO2P
50 7
LVDS_TX4_BN F_TXOCN
49 8 45
LVDS_TX4_AP

1/16W
48 FGND R101
LVDS_TX4_AN 220OHM
47 44

LVDS_TX4_CLKP
46
45
AUDIO DAC F_TXOCP
43
LVDS_TX4_CLKN
44
+3.3V_M180
43 42
LVDS_TX3_DP
42 L6 52
LVDS_TX3_DN LED6
41 41

C613 1uF

1nF

C651 1uF

1nF
LVDS_TX3_CP
40 L5 53
C LVDS_TX3_CN BD609 LED5 C
39 IC601 40

C626

C652
LVDS_TX3_BP 9
38 F_TXO3N L4 54
LVDS_TX3_BN ALC5626-GR 10 LED4
37 F_TXO3P 39
LVDS_TX3_AP 11

8
7
6
5
4
3
2
1
36 F_TXE0N V2 55
LVDS_TX3_AN 12 VLED2
35 F_TXE0P 38
34 FGND FGND FGND FGND 56

DCVDD

LINE_IN_R

LINE3_R

AUXIN_R

AUXIN_L

LINE3_L

LINE_IN_L

NC
V1
LVDS_TX3_CLKP VLED1
33 37

FGND
LVDS_TX3_CLKN
32 9 32 C615 L3 57
DGND AVDD
1uF LED3
31 10 31 C653 10UF 10V 36
LVDS_TX2_DP DBVDD HP_OUT_L HP_L_OUT
30 R620 22OHM 11 30 L2 58
LVDS_TX2_DN AU_MCLK MCLK CDEPOP LED2

FGND
29 R621 22OHM 12 29 C654 10UF 10V 13 35
LVDS_TX2_CP AU_SCLK BCLK MGND1 HP_OUT_R HP_R_OUT F_TXE1N
28 R641 22OHM 13 28 C631 14 L1 59
LVDS_TX2_CN AU_LRCLK LRCK AGND F_TXE1P LED1
27 14 27 15 34
LVDS_TX2_BP AU_SDOUT SDAC VREF F_TXE2N
26 R619 10KOHM 15 26 16 60

SPK_OUT_RN

SPK_OUT_LN
LVDS_TX2_BN GPIO SPKVDD2 47uF F_TXE2P

SPK_OUT_R
25 R636 10KOHM 16 25 33

SPKGND1

SPKVDD1
SPK_OUT_LN

SPKGND2
LVDS_TX2_AP A1
24 C627 33PF 61
LVDS_TX2_AN
23 C628 C632 32

SCL

SDA
22pF F_TXECN
100NF
22 C629 22pF FGND 62
LVDS_TX2_CLKP +3.3V_M180

1/16W
16V R102 31
21
LVDS_TX2_CLKN 220OHM

17
18
19
20
21
22
23
24
20 17 63
D FGND 30
D
19 BD610 18
LVDS_TX1_DP F_TXECP
18 19 64
LVDS_TX1_DN R639 100OHM F_TXE3N
17 SUB_SCL 20 29
LVDS_TX1_CP R640 100OHM
+5V_PANEL F_TXE3P
C624 65
16 SUB_SDA C610
LVDS_TX1_CN FGND 10UF
15 100NF 28
LVDS_TX1_BP 10V
14 16V 66
LVDS_TX1_BN
13 27

10V

10UF

10V

10UF

10V

10UF

10V

10UF
C548

C541

C542

C581
LVDS_TX1_AP
12 5VPAN 67
LVDS_TX1_AN
11 FGND 26
10 68
LVDS_TX1_CLKP
9 FGND 25
LVDS_TX1_CLKN
8 69

10KOHM

10V

10UF

10V

10UF

10V

10UF

10V

10UF

10V

10UF
C549

C550

C551

C568

C569
R558
7 21 24
3D_SYNC_LR B_TXO0N
6 22 70
O_BLU_LED_T B_TXO0P
5 23 23
ENABLE_3D B_TXO1N
4 24 71
EMITTER_3D_SYNC B_TXO1P
3 FGND FGND FGND FGND FGND FGND 22
+3.3V_M180
2 72
NRESET
1 21
EXT1_PLL +14V_IN
MGND1 73
E 20
E

10KOHM
R648
74
25 19
R644 B_TXO2N
680Kohm 1KOHM IC640 26 75
R647 200OHM B_TXO2P
R645 3 /RESET,RESET 1 27 18
FGND VDD B_TXOCN
28 76
GND
17

1/16W
1KOHM S-6415A42-M3T1U C617 R103
C 220OHM 77
R643 B 16V
2

HP_MUTE R646 16
Q609 E 680Kohm 1UF DELETE C617 78
2SC2412K-Q B_TXOCP
15
79
FGND 14
FGND FGND FGND
29
GCC02-0170 B_TXO3N 80
B_TXO3P 30 13
Q611 CN202
G

31
STK7002 B_TXE0N 3D_EN 81
10OHM R617 5 32 ENABLE_3D_OUT
S
D

HP_R_OUT HP_R B_TXE0P 12

4
82
G

STK7002 HP_L 11
10OHM R618 2
S
D

HP_L_OUT
F 3 F
AK2S020WA1 10
Q612 1

16V

16V
CN100

ADUC30S03010
+14V_IN

ADUC30S03010
33 9
+5V_PANEL MGND4 B_TXE1N
47NF C614

47NF C616

VT601

VT602
R614 R615 34
B_TXE1P
1KOHM 1KOHM 35 8
B_TXE2N
36
20 10 B_TXE2P
MGND3

7
19 9
PANEL_EN HP_MUTE
18 8
DPMS_ON 6
17 7
SUB_SCL
16 6
SUB_SDA 5
15 5 B_TXECN
14 4

1/16W
VLED2 LED1 R104 4
13 3 220OHM
LED4 LED2 37
12 2
LED5 LED3 38 3
11 1 B_TXECP
LED6
MGND2

MGND1
VLED1
HEADPHONE B_TXE3N
B_TXE3P
39
40 2

G MGND1
G

FGND FGND

B TO B CON FGND

PROJECT NAME DRAWN BY

A2
H Song Woong Jae H
sa750_2ndfloor_v14
CHECKED BY
Unknown
DEV.STEP REV. APPROVED BY
SAMSUNG
SAMSUNG Unknown 1.0 Unknown
LAST EDITED TIME TOTAL PAGE NO.
Fri May 27 19:47:29 2011 3 OF 6
1 2 3 4 5 6 7 8 9 10 11 12
EDITED BY MINGOO EDITED BY MINGOO

D:/atdm/PROJECTS/sa750_2ndfloor_v14\sa750_2ndfloor_v14.cpm
 1 2 3 4 5 6 7 8
EDITED BY MINGOO EDITED BY MINGOO

SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONIS CO'S PROPRIETARY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
Comply with the threshold of substances
+1.2V_M180 +2.5V_M180_DDR
04.M180 POWER
A which are specified in 0QA-2049 A
BLOCK NAME BLK PAGE NO.
sa750_2ndfloor_v14 4 OF 6
+3.3V_M180
IC201
F15 J5
VDDI12 VDDE25
IC201 G5 J6
VDDI12 VDDE25
A1 R10 G6 J21
GND GND VDDI12 VDDE25
A2 R11 G21 J22
GND GND VDDI12 VDDE25
A26 R12 G22 M5
GND GND VDDI12 VDDE25
B1 R13 K5 M6
GND GND VDDI12 VDDE25
D1 R14 K6 M21 IC201
GND GND VDDI12 VDDE25
E2 R15 K21 M22 A3 C6
GND GND VDDI12 VDDE25 LVDS_VSN LVDS_VDP
F7 R16 K22 R5 A14 C7
GND GND VDDI12 VDDE25 LVDS_VSN LVDS_VDP
F8 R17 N5 R6 A25 C10
GND GND VDDI12 VDDE25 LVDS_VSN LVDS_VDP
F20 R26 N6 R21 +3.3V_M180 B3 C11
GND GND VDDI12 VDDE25 LVDS_VSN LVDS_VDP
F22 T10 N21 R22 B14 C16
GND GND VDDI12 VDDE25 LVDS_VSN LVDS_VDP
F23 T11 N22 V5 B25 C17
GND GND VDDI12 VDDE25 LVDS_VSN LVDS_VDP
F24 T12 T5 V6 C4 C19
GND GND VDDI12 VDDE25 LVDS_VSN LVDS_VDP
F25 T13 T6 V21 C5 C20
B F26
GND GND
T14 T21
VDDI12 VDDE25
V22 C8
LVDS_VSN LVDS_VDP
D6
B
GND GND VDDI12 VDDE25 LVDS_VSN LVDS_VDP
G4 T15 T22 E15 C9 D7
GND GND VDDI12 VDDE33 LVDS_VSN LVDS_VDP
H4 T16 W5 F6 C12 D10
GND GND VDDI12 VDDE33 LVDS_VSN LVDS_VDP
H5 T17 W6 F21 C15 D11
GND GND VDDI12 VDDE33 LVDS_VSN LVDS_VDP
H6 T25 W21 AA6 C18 D16
GND GND VDDI12 VDDE33 LVDS_VSN LVDS_VDP
H21 U5 W22 AA12 C21 D17
GND GND VDDI12 VDDE33 LVDS_VSN LVDS_VDP
H22 U6 AA15 C22 AC6
GND GND VDDE33 LVDS_VSN LVDS_VDP
K13 U10 AA21 C23 AC7
GND GND VDDE33 LVDS_VSN LVDS_VDP
K14 U11 +1.2V_M180 C24 AC10
GND GND LVDS_VSN LVDS_VDP
K15 U12 C25 AC11
GND GND LVDS_VSN LVDS_VDP
K16 U13 D5 AC17
GND GND LVDS_VSN LVDS_VDP
K17 U14 K12 D8 AC18
GND GND PLLVDD0 LVDS_VSN LVDS_VDP +1.2V_M180
L1 U15 K11 D9 AC20
GND GND PLLVDD1 LVDS_VSN LVDS_VDP
L5 U16 K10 D12 AC21
GND GND PLLVDD2 LVDS_VSN LVDS_VDP
L6 U17 D15 AD6
GND GND LVDS_VSN LVDS_VDP
L13 U21 D18 AD7
GND GND LVDS_VSN LVDS_VDP
L14 U22 E9 AD10
GND GND LVDS_VSN LVDS_VDP
L15 V26 +3.3V_M180 E12 AD11
GND GND LVDS_VSN LVDS_VDP
L16 Y5 F9 AD17
GND GND LVDS_VSN LVDS_VDP
L17 Y6 F12 AD18
C GND GND LVDS_VSN LVDS_VDP C
L21 Y21 F18 AD20
GND GND LVDS_VSN LVDS_VDP
L22 Y22 C203 C204 C205 C206 C207 C208 C209 C210 F19 AD21
GND GND LVDS_VSN LVDS_VDP
M2 AA5 C201 C202 C211 AA8 C13 +1.2V_M180
GND GND
100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF LVDS_VSN LVDS_VDU
10UF 10UF 10UF
M10 AA22 16V 16V 16V 16V 16V 16V 16V 16V AA9 D13
GND GND LVDS_VSN LVDS_VDU
10V 10V 10V
M11 AB23 AA16 E13
GND GND LVDS_VSN LVDS_VDU
M12 AB24 AA19 F13
GND GND LVDS_VSN LVDS_VDU
M13 AD1 AB5 AA14
GND GND LVDS_VSN LVDS_VDU
M14 AD2 AB6 AB14
GND GND LVDS_VSN LVDS_VDU
M15 AD25 AB8 AC14
GND GND LVDS_VSN LVDS_VDU
M16 AE1 +2.5V_M180_DDR AB9 AD14
GND GND LVDS_VSN LVDS_VDU
M17 AE25 AB12 E10
GND GND LVDS_VSN LVDS_VDN
N10 AE26 AB15 E11
GND GND LVDS_VSN LVDS_VDN
N11 AF1 AB16 E16
GND GND LVDS_VSN LVDS_VDN
N12 AF25 AB19 E17
GND GND LVDS_VSN LVDS_VDN
N13 AF26 C214 C215 C216 C217 C218 C219 C220 C221 AB21 F10
GND GND
C212 C213 C222 LVDS_VSN LVDS_VDN
100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF
N14 10UF 10UF 10UF AB22 F11
GND LVDS_VSN LVDS_VDN
16V 16V 16V 16V 16V 16V 16V 16V
N15 L10 10V 10V 10V AC5 F16
GND PLLGND2 LVDS_VSN LVDS_VDN
N16 L11 AC8 F17
GND PLLGND1 LVDS_VSN LVDS_VDN
N17 L12 AC9 AA7
GND PLLGND0 LVDS_VSN LVDS_VDN
P1 AC12 AA10
D P5
GND
AC15
LVDS_VSN LVDS_VDN
AA11
D
GND LVDS_VSN LVDS_VDN
P6 AC16 AA17
GND +1.2V_M180 LVDS_VSN LVDS_VDN
P10 AC19 AA18
GND LVDS_VSN LVDS_VDN
P11 AC22 AA20
GND LVDS_VSN LVDS_VDN
P12 AC23 AB7
GND LVDS_VSN LVDS_VDN
P13 AC24 AB10
GND LVDS_VSN LVDS_VDN
P14 C225 C226 C227 C228 C229 C230 C231 C232 AD3 AB11
GND
C223 C224 C233 LVDS_VSN LVDS_VDN
100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF
P15 10UF 10UF 10UF AD4 AB17
GND LVDS_VSN LVDS_VDN
16V 16V 16V 16V 16V 16V 16V 16V
P16 10V 10V 10V AD5 AB18
GND LVDS_VSN LVDS_VDN
P17 AD8 AB20
GND LVDS_VSN LVDS_VDN
P21 AD9 C14
GND LVDS_VSN LVDS_VSU
P22 AD12 D14
GND +1.2V_M180 LVDS_VSN LVDS_VSU
AD15 E14
LVDS_VSN LVDS_VSU
AD16 F14
LVDS_VSN LVDS_VSU

FGND AD19 AA13

LVDS_VSN LVDS_VSU

FGND AD22 AB13

LVDS_VSN LVDS_VSU
C255 C256 C234 C235 C236 C237 C238 C239 C240 C241 C242 C243 AD23 AC13
LVDS_VSN LVDS_VSU
100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF
AD24 AD13
LVDS_VSN LVDS_VSU
16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
AE2
LVDS_VSN
AE13
E AE24
LVDS_VSN
E
LVDS_VSN
AF2
+3.3V_M180 LVDS_VSN
AF13
LVDS_VSN
AF24
LVDS_VSN

C244 C245 C246 C247 C248 C249 C250 C251 C252 C253 C254
100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF

16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V FGND FGND

PROJECT NAME DRAWN BY

A3
F Song Woong Jae F
sa750_2ndfloor_v14
CHECKED BY
Unknown
DEV.STEP REV. APPROVED BY
SAMSUNG
SAMSUNG
Unknown 1.0 Unknown
LAST EDITED TIME TOTAL PAGE NO.
Fri May 27 19:47:33 2011 4 OF 6
1 2 3 4 5 6 7 8
EDITED BY MINGOO

D:/atdm/PROJECTS/sa750_2ndfloor_v14\sa750_2ndfloor_v14.cpm
 1 2 3 4 5 6 7 8
EDITED BY MINGOO EDITED BY MINGOO

SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONIS CO'S PROPRIETARY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. 05.M180 LVDS / DDR
Comply with the threshold of substances
A which are specified in 0QA-2049 A
BLOCK NAME BLK PAGE NO.
sa750_2ndfloor_v14 5 OF 6
+1.25V_M180

10B2>
FPGA_SDA_JIG IC201
10B2> IC201
FPGA_SCL_JIG
12E6< K4 N2 0
13A3< R301 10OHM B2 A4 14B3< DDR_F_DQS0 DDRM_F_DQS[0] DDRM_F_ADDR[0]
DDR_F_ADDR<0..11>
O_BLU_LED_T O_BLU_LED_T O_FO_TCK_P F_TXOCP 12E7< G3 P2 1
15D2< 6E7< R302 200OHM B26 A5 14A3< DDR_F_DQS1 DDRM_F_DQS[1] DDRM_F_ADDR[1]
12B5<
+3.3V_M180 EMITTER_3D_SYNC O_SYNC_3D O_FO_TA_P F_TXO0P Y3 N3 2
A6 12E7<
R303 200OHM D2 14A3< DDR_F_DQS2 DDRM_F_DQS[2] DDRM_F_ADDR[2]
3D_SYNC_LR I_LR O_FO_TB_P F_TXO1P 12E7< AB3 P3 3
R304 10OHM F4 A7 14A3< DDR_F_DQS3 DDRM_F_DQS[3] DDRM_F_ADDR[3]

N.C 7E6<
BLU_2D_PWM
4F2> SUB_SCL
R305 10OHM D3
E4
I_BLU_2D

I_SCL
O_FO_TC_P

O_FO_TD_P
A8
A9
F_TXO2P
F_TXO3P 14B3<
12C5<> DDR_F_DQ<0..31>
0
1
M4
M3
DDRM_F_DQ[0] DDRM_F_ADDR[4]
R1
R2
4
5
OPTION

R306 DDRM_F_DQ[1] DDRM_F_ADDR[5]

10KOHM

7E6< 4F2> SUB_SDA 10OHM 14C3<

R346

IO_SDA O_FE_TCK_P F_TXECP 2 L4 R3 6

7E5< 10C4> 4F2> R307 200OHM E3 A10 14B3<
DDRM_F_DQ[2] DDRM_F_ADDR[6]
NRESET I_nRESET O_FE_TA_P F_TXE0P 3 L3 P4 7
R308 0OHM C2 A11 14C3<
DDRM_F_DQ[3] DDRM_F_ADDR[7]
ENABLE_3D I_ENA_3D_IN O_FE_TB_P F_TXE1P 4 L2 T1 8
14E4< R309 200OHM D4 A12 14C3<
DDRM_F_DQ[4] DDRM_F_ADDR[8]
ENABLE_3D_OUT O_ENA_3D_OUT O_FE_TC_P F_TXE2P 5 K1 T2 9
14C8< R310 10OHM E5 A13 14C3<
DDRM_F_DQ[5] DDRM_F_ADDR[9]
B TCON_OFF O_TCON_OFF O_FE_TD_P F_TXE3P 6 K2 T3 10 B
R311 200OHM F1 A15 14D3<
DDRM_F_DQ[6] DDRM_F_ADDR[10]
I_VPD O_BO_TCK_P B_TXOCP 7 K3 U1 11
R312 200OHM F3 A16 14D3<
DDRM_F_DQ[7] DDRM_F_ADDR[11]
2

O_BLU_LED_B O_BLU_LED_B O_BO_TA_P B_TXO0P 8 J3 H1

10KOHM

E26 A17 14D3<

DDRM_F_DQ[8] I_DDRM_REF_F0
I_TEST[0] O_BO_TB_P B_TXO1P 9 J2 W4
R347

E25 A18 14D3<

DDRM_F_DQ[9] I_DDRM_REF_F1
I_TEST[1] O_BO_TC_P B_TXO2P 10 G1 R4 12E7<
E24 A19 14E3<
DDRM_F_DQ[10] DDRM_F_BA[0] DDR_F_BA0
I_TEST[2] O_BO_TD_P B_TXO3P 11 H3 U2 12E7<
D25 A20 14F3<
DDRM_F_DQ[11] DDRM_F_BA[1] DDR_F_BA1
1

I_TEST[3] O_BE_TCK_P B_TXECP 12 J4 M1 12E7<

D24 A21 14E3<
DDRM_F_DQ[12] DDRM_F_CK DDR_F_CK
I_TEST[4] O_BE_TA_P B_TXE0P 13 J1 N4 12E7<
E23 A22 14E3<
DDRM_F_DQ[13] DDRM_F_CKE DDR_F_CKE
I_TEST[5] O_BE_TB_P B_TXE1P 14 H2 N1 12E7<
D23 A23 14E3<
DDRM_F_DQ[14] DDRM_F_CKB DDR_F_CKB
FGND
I_TEST[6] O_BE_TC_P B_TXE2P 15 G2 V1 12E7<
E22 A24 14F3<
DDRM_F_DQ[15] DDRM_F_CSB DDR_F_CSB
I_TEST[7] O_BE_TD_P B_TXE3P 16 U4 U3 12E7<
E21 AE3 DDRM_F_DQ[16] DDRM_F_CASB DDR_F_CASB
I_TEST[8] I_RX_1CLK_P LVDS_TX1_CLKP 17 W1 T4 12E7<
D22 AE4 DDRM_F_DQ[17] DDRM_F_WEB DDR_F_WEB
I_TEST[9] I_RX_1A_P LVDS_TX1_AP 18 V3 V2 12E7<
D21 AE5 DDRM_F_DQ[18] DDRM_F_RASB DDR_F_RASB
I_TEST[10] I_RX_1B_P LVDS_TX1_BP 19 W2 N24 0 DDR_B_ADDR<0..11>
E20 AE6 DDRM_F_DQ[19] DDRM_B_ADDR[0]
I_TEST[11] I_RX_1C_P LVDS_TX1_CP 20 W3 N23 1 12B1<
D20 AE7 DDRM_F_DQ[20] DDRM_B_ADDR[1]
I_TEST[12] I_RX_1D_P LVDS_TX1_DP 21 V4 N25 2
AD26 AE8 DDRM_F_DQ[21] DDRM_B_ADDR[2]
I_TEST[13] I_RX_2CLK_P LVDS_TX2_CLKP 22 Y1 P23 3
AC25 AE9 DDRM_F_DQ[22] DDRM_B_ADDR[3]
I_TEST[14] I_RX_2A_P LVDS_TX2_AP 23 Y2 N26 4
AC26 AE10 DDRM_F_DQ[23] DDRM_B_ADDR[4]
I_TEST[15] I_RX_2B_P LVDS_TX2_BP 24 AA1 P25 5
E19 AE11 DDRM_F_DQ[24] DDRM_B_ADDR[5]
I_TEST[16] I_RX_2C_P LVDS_TX2_CP 25 AB1 P26 6
E18 AE12 DDRM_F_DQ[25] DDRM_B_ADDR[6]
C I_TEST[17] I_RX_2D_P LVDS_TX2_DP 26 AA2 P24 7 C
D19 AE14 DDRM_F_DQ[26] DDRM_B_ADDR[7]
I_TEST[18] I_RX_3CLK_P LVDS_TX3_CLKP 27 Y4 R23 8
AC1 AE15 DDRM_F_DQ[27] DDRM_B_ADDR[8]
O_TEST[0] I_RX_3A_P LVDS_TX3_AP 28 AA3 R24 9
AC2 AE16 DDRM_F_DQ[28] DDRM_B_ADDR[9]
O_TEST[1] I_RX_3B_P LVDS_TX3_BP 29 AA4 R25 10
AC3 AE17 DDRM_F_DQ[29] DDRM_B_ADDR[10]
O_TEST[2] I_RX_3C_P LVDS_TX3_CP 30 AB2 T23 11
AC4 AE18 DDRM_F_DQ[30] DDRM_B_ADDR[11]
O_TEST[3] I_RX_3D_P LVDS_TX3_DP 31 AB4 K24
E7 AE19 DDRM_F_DQ[31] I_DDRM_REF_B0
O_TEST[4] I_RX_4CLK_P LVDS_TX4_CLKP 12E3< H25 W25
R337 10OHM C3 AE20 DDR_B_DQS0 DDRM_B_DQS[0] I_DDRM_REF_B1
I_TEST_MODE[0] I_RX_4A_P LVDS_TX4_AP 12E3< K26 U23 12E3<
R338 10OHM E8 AE21 DDR_B_DQS1 DDRM_B_DQS[1] DDRM_B_BA[0] DDR_B_BA0
I_TEST_MODE[1] I_RX_4B_P LVDS_TX4_BP 12E3< V24 T24 12E3<
R339 10OHM E6 AE22 DDR_B_DQS2 DDRM_B_DQS[2] DDRM_B_BA[1] DDR_B_BA1
I_TEST_MODE[2] I_RX_4C_P LVDS_TX4_CP 12E3< Y24 U26 12E3<
R340 10OHM D26 AE23 DDR_B_DQS3 DDRM_B_DQS[3] DDRM_B_CK DDR_B_CK
O_PARAM_3D_OUT0 O_PARAM_3D_OUT0 I_RX_4D_P LVDS_TX4_DP 0 K25 L26 12E3<
R341 10OHM C26 B4 DDR_B_DQ<0..31> DDRM_B_DQ[0] DDRM_B_CKE DDR_B_CKE
C301 O_PARAM_3D_OUT1 O_PARAM_3D_OUT1 O_FO_TCK_N F_TXOCN 1 L24 T26 12E3<
C1 B5 14A3< 12C1<>
DDRM_B_DQ[1] DDRM_B_CKB DDR_B_CKB
I_Xtal O_FO_TA_N F_TXO0N 2 L25 M23 12E3<
E1 B6 14A3<
DDRM_B_DQ[2] DDRM_B_CSB DDR_B_CSB
15PF O_Xtal O_FO_TB_N F_TXO1N 3 L23 M24 12E3<
X301 R348 R344 0OHM F5 B7 14A3<
DDRM_B_DQ[3] DDRM_B_CASB DDR_B_CASB
EXT1_PLL EXT1_PLL O_FO_TC_N F_TXO2N 4 J24 M25 12E3<
34.65MHZ 1MOHM R345 200OHM F2 B8 14B3<
DDRM_B_DQ[4] DDRM_B_WEB DDR_B_WEB
EXT2_PLL EXT2_PLL O_FO_TD_N F_TXO3N 5 J25 M26 12E3<
C302 B9 14C3<
DDRM_B_DQ[5] DDRM_B_RASB DDR_B_RASB
O_FE_TCK_N F_TXECN 6 J26
B10 14B3<
DDRM_B_DQ[6]
O_FE_TA_N F_TXE0N 7 K23
15PF B11 14B3<
DDRM_B_DQ[7]
O_FE_TB_N F_TXE1N 8 H26
B12 14C3<
DDRM_B_DQ[8]

FGND
O_FE_TC_N F_TXE2N 9 J23
B13 14C3<
DDRM_B_DQ[9]
D O_FE_TD_N F_TXE3N 10 H23 D
B15 14D3<
DDRM_B_DQ[10]
O_BO_TCK_N B_TXOCN 11 G26
B16 14D3<
DDRM_B_DQ[11]
R249 100OHM O_BO_TA_N B_TXO0N 12 H24
LVDS_TX4_AP B17 14D3<
DDRM_B_DQ[12]
O_BO_TB_N B_TXO1N 13 G25
LVDS_TX4_AN B18 14D3<
DDRM_B_DQ[13]
R250 100OHM O_BO_TC_N B_TXO2N 14 G24
LVDS_TX4_BP B19 14E3<
DDRM_B_DQ[14]
O_BO_TD_N B_TXO3N 15 G23
LVDS_TX4_BN B20 14F3<
DDRM_B_DQ[15]
R251 100OHM O_BE_TCK_N B_TXECN 16 U24
LVDS_TX4_CP B21 14E3<
DDRM_B_DQ[16]
O_BE_TA_N B_TXE0N 17 U25
LVDS_TX4_CN B22 14E3<
DDRM_B_DQ[17]
R252 100OHM O_BE_TB_N B_TXE1N 18 V23
LVDS_TX4_CLKP B23 14E3<
DDRM_B_DQ[18]
O_BE_TC_N B_TXE2N 19 W23
LVDS_TX4_CLKN B24 14F3<
DDRM_B_DQ[19]
R253 100OHM O_BE_TD_N B_TXE3N 20 V25
LVDS_TX4_DP AF3 DDRM_B_DQ[20]
I_RX_1CLK_N LVDS_TX1_CLKN 21 Y23
LVDS_TX4_DN AF4 DDRM_B_DQ[21]
I_RX_1A_N LVDS_TX1_AN 22 W26
AF5 DDRM_B_DQ[22]
I_RX_1B_N LVDS_TX1_BN 23 W24
AF6 DDRM_B_DQ[23]
R254 100OHM I_RX_1C_N LVDS_TX1_CN 24 Y25
LVDS_TX3_AP AF7 DDRM_B_DQ[24]
I_RX_1D_N LVDS_TX1_DN 25 Y26
LVDS_TX3_AN AF8 DDRM_B_DQ[25]
R255 100OHM I_RX_2CLK_N LVDS_TX2_CLKN 26 AA23
LVDS_TX3_BP AF9 DDRM_B_DQ[26]
I_RX_2A_N LVDS_TX2_AN 27 AA25
LVDS_TX3_BN AF10 DDRM_B_DQ[27]
R256 100OHM I_RX_2B_N LVDS_TX2_BN 28 AA26
LVDS_TX3_CP AF11 DDRM_B_DQ[28]
I_RX_2C_N LVDS_TX2_CN 29 AA24
LVDS_TX3_CN AF12 DDRM_B_DQ[29]
E R257 100OHM I_RX_2D_N LVDS_TX2_DN 30 AB25 E
LVDS_TX3_CLKP AF14 DDRM_B_DQ[30]
I_RX_3CLK_N LVDS_TX3_CLKN 31 AB26
LVDS_TX3_CLKN AF15 DDRM_B_DQ[31]
R258 100OHM I_RX_3A_N LVDS_TX3_AN
LVDS_TX3_DP AF16
I_RX_3B_N LVDS_TX3_BN
LVDS_TX3_DN AF17
I_RX_3C_N LVDS_TX3_CN
AF18
I_RX_3D_N LVDS_TX3_DN
AF19
R259 100OHM I_RX_4CLK_N LVDS_TX4_CLKN
LVDS_TX2_AP AF20
I_RX_4A_N LVDS_TX4_AN
LVDS_TX2_AN AF21
R260 100OHM I_RX_4B_N LVDS_TX4_BN
LVDS_TX2_BP AF22
I_RX_4C_N LVDS_TX4_CN
LVDS_TX2_BN AF23
R261 100OHM I_RX_4D_N LVDS_TX4_DN
LVDS_TX2_CP
LVDS_TX2_CN
R262 100OHM
LVDS_TX2_CLKP +3.3V_M180 +2.5V_M180_DDR
LVDS_TX2_CLKN
R263 100OHM
LVDS_TX2_DP
10KOHM

LVDS_TX2_DN
10KOHM
R351

R352

+1.25V_M180
R361
10KOHM
R264 100OHM
LVDS_TX1_AP CN350 1% PROJECT NAME DRAWN BY
LVDS_TX1_AN YFW254-203
A3
F R265 100OHM Song Woong Jae F
LVDS_TX1_BP sa750_2ndfloor_v14
22OHM C361 C362
LVDS_TX1_BN
R266 1 R353 R362
CHECKED BY
100OHM FPGA_SDA_JIG 10UF 100NF
LVDS_TX1_CP 10KOHM
2 10V 16V Unknown
LVDS_TX1_CN 1%
R267 100OHM 3 R354 FPGA_SCL_JIG
LVDS_TX1_CLKP DEV.STEP REV. APPROVED BY
LVDS_TX1_CLKN 22OHM SAMSUNG
SAMSUNG
LVDS_TX1_DP
R268 100OHM Unknown 1.0 Unknown
LVDS_TX1_DN LAST EDITED TIME
FGND TOTAL PAGE NO.
Fri May 27 19:47:30 2011 5 OF 6
1 2 3 4 5 6 7 8
EDITED BY MINGOO

D:/atdm/PROJECTS/sa750_2ndfloor_v14\sa750_2ndfloor_v14.cpm
 1 2 3 4 5 6 7 8 9 10 11 12
EDITED BY MINGOO EDITED BY MINGOO

SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONIS CO'S PROPRIETARY. +2.5V_M180_DDR
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
06.M180 DDR1 MEMORY
Comply with the threshold of substances
A which are specified in 0QA-2049
DDR1 MEMORY A

L12

K12
K11

G10

B10

C10

A10
M2

L9
L3
L2

K8

G3

B3
J9
J4
H9
H4
G9
G4
F9
F4
E9
E4
D8
D5

C9
C8
C5
C4
C3

A3
K9
K4
J8
J7
BLOCK NAME BLK PAGE NO.
sa750_2ndfloor_v14 6 OF 6

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

VSS

VSS

VSS

VSS
VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ
DDR_F_ADDR<0..11> 0 M4 J6
A0 VSS
1 M5 J5
A1 VSS
2 L5 H8
A2 VSS
3 M6 H7
A3 VSS
4 M7 H6
A4 VSS
5 L8 H5
A5 VSS
6 M8 G8
A6 VSS
7 M9 G7
A7 VSS
8 M10 G6
A8/AP VSS
9 L7 G5
A9 VSS
10 K5 F8
A10 VSS
DDR_F_DQ<0..31> 11 L6 F7
A11 VSS
0 A6 F6
DQ0 VSS
1 B5 F5
DQ1 VSS
B +2.5V_M180_DDR 2 A5 E8 B
DQ2 VSS
3 A4 E7
DQ3 VSS
4 B1 E6
DQ4 VSS
5 C2 IC401 E5
DQ5 VSS
6 C1 D9
DQ6 VSS
C403 C404 C406 C407 C408 C409 C410 C411 D1 D7
C401 C402 C412 7
DQ7 VSS
100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF
J12 EM6A9320BIA-4H D6
10UF 10UF 10UF 8
DQ8 VSS
16V 16V 16V 16V 16V 16V 16V 16V
10V 10V 10V 9 J11 D4
DQ9 VSS
10 H12 J10
DQ10 VDDQ
11 H11 J3
DQ11 VDDQ
12 F12 H10 +2.5V_M180_DDR
DQ12 VDDQ
13 F11 H3
DQ13 VDDQ
14 E12 F10
DQ14 VDDQ
15 E11 F3
DQ15 VDDQ F_VREF1.25V_DDR
16 E2 E10
DQ16 VDDQ R401
17 E1 E3 10KOHM
DQ17 VDDQ
18 F2 D11 1%
DQ18 VDDQ
C413 C414 C415 C416
C417 19 F1 D2
DQ19 VDDQ
100NF 100NF 100NF 100NF
10UF 20 H2 B11
DQ20 VDDQ
16V 16V 16V 16V C418 C419
10V 21 H1 B9
DQ21 VDDQ R402
C 22 J1 B7 10KOHM
10UF 100NF C
DQ22 VDDQ
10V 16V
23 J2 B6 1%
DQ23 VDDQ

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

DQS0

DQS1

DQS2

DQS3

RAS#

CAS#

VREF

VDDQ

VDDQ
DM0

DM1

DM2

DM3

BA0

BA1

CK#

CKE

CS#

WE#

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD
CK
A9
A8
B8
A7
A1

G1

A2

G2

M3
L4

M1
L1
K1
K2

C6
C7
D3

K3
K6
K7

B2
B4
D12
C12
C11
B12

G12

A12

G11

A11

L10
L11
M11

M12

D10

K10
24
25
26
27
28
29
30
31
F_VREF1.25V_DDR

DDR_F_DQS0
DDR_F_DQS1
DDR_F_DQS2
DDR_F_DQS3

DDR_F_RASB
DDR_F_CASB
DDR_F_BA0
DDR_F_BA1

DDR_F_CKB
DDR_F_CKE
DDR_F_CSB

DDR_F_WEB
DDR_F_CK
D D

+2.5V_M180_DDR

L12

K12
K11

G10

B10

C10

A10
M2

L9
L3
L2

K8

G3

B3
J9
J4
H9
H4
G9
G4
F9
F4
E9
E4
D8
D5

C9
C8
C5
C4
C3

A3
K9
K4
J8
J7
NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

VSS

VSS

VSS

VSS
VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ
E DDR_B_ADDR<0..11> M4 J6
E
0
A0 VSS
1 M5 J5
A1 VSS
2 L5 H8
A2 VSS
3 M6 H7
A3 VSS
4 M7 H6
A4 VSS
5 L8 H5
A5 VSS
6 M8 G8
A6 VSS
+2.5V_M180_DDR 7 M9 G7
A7 VSS
8 M10 G6
A8/AP VSS
9 L7 G5
A9 VSS
10 K5 F8
A10 VSS
DDR_B_DQ<0..31> 11 L6 F7
A11 VSS
C423 C424 C425 C426 C427 C428 C429 C430 A6
C420 C421 C431 0 F6
DQ0 VSS
100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF
10UF 10UF 10UF 1 B5 F5
DQ1 VSS
16V 16V 16V 16V 16V 16V 16V 16V
10V 10V 10V 2 A5 E8
DQ2 VSS
3 A4 E7
DQ3 VSS
4 B1 E6
DQ4 VSS
5 C2 E5
DQ5 VSS
6 C1 D9
DQ6 IC402 VSS
7 D1 D7
F J12
DQ7 VSS F
8 EM6A9320BIA-4H D6
DQ8 VSS
9 J11 D4
DQ9 VSS
10 H12 J10
DQ10 VDDQ
11 H11 J3
DQ11 VDDQ
C432 C433 C434 C435 F12 +2.5V_M180_DDR
C436 12 H10
DQ12 VDDQ
100NF 100NF 100NF 100NF
10UF 13 F11 H3
DQ13 VDDQ
16V 16V 16V 16V
10V 14 E12 F10
DQ14 VDDQ
15 E11 F3
DQ15 VDDQ B_VREF1.25V_DDR
16 E2 E10
DQ16 VDDQ R405
17 E1 E3 10KOHM
DQ17 VDDQ
18 F2 D11 1%
DQ18 VDDQ
19 F1 D2
DQ19 VDDQ
20 H2 B11
DQ20 VDDQ
C437 C438
21 H1 B9
DQ21 VDDQ R406 10UF 100NF
22 J1 B7 10KOHM
DQ22 VDDQ
10V 16V
23 J2 B6 1%
DQ23 VDDQ
DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

DQS0

DQS1

DQS2

DQS3

RAS#

CAS#

VREF

VDDQ

VDDQ
DM0

DM1

DM2

DM3

BA0

BA1

CK#

CKE

CS#

WE#

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD
CK
G G
A9
A8
B8
A7
A1

G1

A2

G2

M3
L4

M1
L1
K1
K2

C6
C7
D3

K3
K6
K7

B2
B4
D12
C12
C11
B12

G12

A12

G11

A11

L10
L11
M11

M12

D10

K10
24
25
26
27
28
29
30
31

B_VREF1.25V_DDR
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3

DDR_B_RASB
DDR_B_CASB
DDR_B_BA0
DDR_B_BA1

DDR_B_CKB
DDR_B_CKE
DDR_B_CSB

DDR_B_WEB
DDR_B_CK

PROJECT NAME DRAWN BY

A2
H Song Woong Jae H
sa750_2ndfloor_v14
CHECKED BY
Unknown
DEV.STEP REV. APPROVED BY
SAMSUNG
SAMSUNG Unknown 1.0 Unknown
LAST EDITED TIME TOTAL PAGE NO.
Fri May 27 19:47:32 2011 6 OF 6
1 2 3 4 5 6 7 8 9 10 11 12
EDITED BY MINGOO EDITED BY MINGOO

D:/atdm/PROJECTS/sa750_2ndfloor_v14\sa750_2ndfloor_v14.cpm