IET Generation, Transmission & Distribution

Special Issue: Challenges and New Solutions for Enhancing Ancillary

Services and Grid Resiliency in Low Inertia Power Systems

Coordinated virtual resistance and ISSN 1751-8687

Received on 28th March 2020
Revised 2nd July 2020
capacitance control scheme for accurate Accepted on 30th July 2020
E-First on 4th September 2020
reactive power sharing and selective doi: 10.1049/iet-gtd.2020.0581
www.ietdl.org

harmonic compensation in islanded microgrid

Minh-Duc Pham1, Hong-Hee Lee1
1Electrical Department, University of Ulsan, 93, Daehak-ro, Nam-gu, Ulsan, Republic of Korea
E-mail: hhlee@mail.ulsan.ac.kr

Abstract: Line impedance mismatch and unregulated harmonic currents cause serious problems for an islanded microgrid,
such as inaccurate reactive power sharing and voltage distortion at the point of common coupling (PCC). To overcome these
issues, a coordinated virtual resistance and capacitance are introduced together with its control scheme for parallel distributed
generation (DG) in an islanded microgrid. The proposed coordinated virtual impedance control scheme directly modifies the DG
output impedance at the fundamental frequency to realise accurate current sharing among DG units. In addition, a variable
harmonic impedance control loop is proposed for each DG to absorb the non-linear load harmonic current. Thanks to the
proposed control scheme, the PCC harmonic voltage distortion is successfully compensated and power-sharing among DG
units is accurately achieved. The stability of the microgrid system was analysed in detail to verify the feasibility of the
coordinated virtual impedance control scheme. Experiments on a laboratory prototype microgrid are performed to validate the
performance of the proposed control scheme.

1 Introduction control algorithm, it is very hard to share the reactive power

Renewable energy resources (RESs) are rapidly increasing because
of increasing carbon emission and decreasing fossil fuel sources.
Normally, RESs have been integrated into the distribution system
in the form of distributed generation (DG) units, and these DG
units are connected to the grid through interfacing inverters [1].
Power-electronic interfaces make the RESs more flexible in their
operation and control compared to a conventional power plant. To
coordinate the stand-alone DG inverters, the microgrid concept has
been introduced [2]. When the microgrid is isolated from the main
grid, it operates in an islanded mode, and all DG units employ the
droop control algorithm to support the load power and maintain a
constant microgrid voltage [3]. Fig. 1 shows a typical islanded
microgrid configuration, where each DG unit has to work
independently and share the load power autonomously. Although
accurate active power-sharing is realised with a conventional droop
Fig. 1 Typical islanded microgrid configuration
accurately because of the mismatched line impedance among DG
units [3]. Furthermore, when a non-linear load is connected to the
grid, it generates the load harmonic currents, which reduce the
microgrid stability and deteriorate the voltage quality at the point
of common coupling (PCC). Therefore, the conventional droop
control algorithm is not effective for DG operation in the microgrid
when accurate reactive power-sharing or high-quality PCC voltage
is required.
To improve the reactive power sharing performance, many DG
control algorithms are introduced. In [4, 5], a P-Q power
decoupling method was proposed by reducing the effect of the
mismatched line impedance. However, because the power-sharing
performance is dependent on the line impedance estimation
accuracy, it is difficult to apply in practical applications. To remove
the dependence on the line impedance, modified Q-V droop control
methods were presented, but the reactive power-sharing error is not
mitigated effectively [6, 7]. For more accurate reactive power-
sharing, the DG output impedance is modified by inserting the
adjustable virtual impedance at the DG output [8–10].
Nevertheless, the reactive power is not sufficiently shared because
these control methods depend on the line impedance ratio.
Meanwhile, some research studies have focused on the PCC
voltage quality. The authors in [11] tried to mitigate the PCC
voltage distortion by using active power filters (APFs). To remove
the APFs and increase the system reliability, harmonic
compensation capability is integrated into a DG inverter by
modifying the control scheme [12–18]. The authors in [12]
presented a harmonic filter control scheme to attenuate the PCC
voltage harmonics by feeding back the non-linear load current.
However, it is difficult to apply this method in a practical system
because the non-linear loads are scattered over long distances along
with the additional load current sensor. Without load current
sensors, the harmonic currents autonomously shared among DG
units [13, 14]. Nevertheless, the harmonic compensating
performance becomes worse under light load conditions because of
the fixed droop coefficient. To overcome this shortcoming,
harmonic virtual conductance control schemes were proposed [15–
17]. However, the harmonic suppression capability of these control
schemes was limited due to the grid impedance mismatch. To

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Fig. 2 P − ω and Q - V droop control characteristics
further improve the PCC voltage quality, a harmonic virtual
inductance was introduced to absorb the non-linear load current by
regulating the DG output impedance at the harmonic frequency
[18]. However, the harmonic compensating performance is not
good in the complex line impedance because the effect of line
resistance is neglected.
To operate DG more effectively, some authors have tried to
solve both the inaccurate reactive power-sharing and the PCC
voltage distortion simultaneously [19–22]. The authors in [19]
adjusted DG output impedance by injecting real power disturbance
to the grid. However, the injected power disturbance reduces the
dynamic performance and stability of the microgrid. To overcome
this issue, resistive–capacitive virtual impedances were presented
in [20, 21]. Unfortunately, these control schemes have also an
disadvantage to identify the line impedance and its phase angle
priorly, which are generally hard to detect in practical application.
In addition, the coordinated PCC harmonic compensation among
DG units has not been considered in these studies. To overcome
these problems, the authors in [22] presented a decentralised
impedance control scheme. In spite of their extended control
approach, they cannot sufficiently improve the PCC voltage quality
to comply with IEEE 519 standards (total harmonic distortion
(THD) <5%) [23].
In this paper, we achieve zero reactive power-sharing error and
high-PCC voltage quality based on a coordinated virtual
impedance control scheme without any prior knowledge of line
impedances. Especially, the DG line impedance mismatches are
directly compensated by adjusting the fundamental virtual
resistance and capacitance, and the PCC harmonic voltage
distortions are also significantly reduced by simultaneously tuning
the harmonic virtual resistance and capacitance. In addition,
accurate power-sharing and PCC voltage quality are always
guaranteed even if the load power changes and the microgrid
stability with the proposed control scheme is analysed in detail
using the eigenvalue analysis and Middlebrook criterion.
Experiments with a laboratory prototype microgrid were performed
to evaluate the effectiveness and reliability of the proposed control
scheme.
This paper is organised as follows: Section 2 describes and
formulates the problem of a conventional control scheme in
islanded microgrids. Section 3 proposes a coordinated virtual
impedance control scheme as well as its stability analysis.
Experimental results are given in Section 4 to validate the
effectiveness of the proposed control scheme. Finally, the
conclusions are drawn in Section 5.
2 Conventional control scheme
2.1 Principle of a droop control algorithm
To realise proportional power-sharing in the islanded microgrid,
the traditional P − ω and Q - V droop controllers are employed for
each local ith DG, and their mathematical formulas are given in (1)
and (2), respectively [24]
ωi = ω0 − GPi Pi,
V i = V 0 − GQi Qi,
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Fig. 3 Equivalent schematic of two parallel DG units in an islanded
microgrid
where the index i represents each DG unit, Pi and Qi are the output
active and reactive powers, GPi and GQi are the P − ω and Q - V
droop coefficients, ωi and V i are the DG output frequency and
voltage, and ω0 and V 0 are the nominal values of the DG frequency
and voltage, respectively. Fig. 2 illustrates the characteristics of the
P − ω and Q - V droop controllers to explore the influence of the
output powers on the output voltage and frequency. From Fig. 2,
the output frequency and voltage magnitude of DG1 and DG2 are
regulated according to their output active and reactive powers.
Hence, both DG1 and DG2 with the droop controller can share the
total load power autonomously in the islanded microgrid. From the
droop control concept, the DG droop voltage can be defined by
considering the droop output voltage magnitude and frequency in
(1) and (2) [3]
∫ ω dt .
V dr i = V i sin i (3)
From (3), because the droop voltage is determined by considering
only the fundamental voltage component, the droop control
algorithm cannot regulate the harmonic voltage if a non-linear load
is connected to the microgrid. Therefore, it is hard to keep the PCC
voltage quality and system stability with the conventional droop
control scheme.
2.2 Reactive power-sharing issue
For simple analysis, we consider two parallel-DG units in an
islanded microgrid with equivalent schematics in Fig. 3, where V i
represents the voltage of the ith DG unit i = 1, 2 , δi is the phase
difference between V i and V PCC, and Llni and Rlni are the inductance
and resistance of line impedance, respectively. The output reactive
power of the ith DG unit i = 1, 2 in Fig. 3 is calculated as follows
[25]:
2
Xln i V i V PCCcos δi − V PCC − Rln iV i V PCCsin δi
Qi = , (4)
Xln i + Rln i 2
2
where Xlni = ωiLlni. In the islanded microgrid, the line impedance is
mainly inductive because of the output filter inductance, and the
power angle δi is small due to the droop controller. Hence, (4) can
be simplified as
2
Xln i V iV PCC − V PCC
Qi ≃ θ . (5)
Xln i + Rln i 2
2
In practical applications, the line impedance among DG units is not
the same Xln 1 ≠ Xln2; Rln 1 ≠ Rln2 due to different DG locations, so
the reactive power in (5) is not shared accurately. Therefore, it is
necessary to compensate both the mismatched line resistance and
reactance to achieve accurate reactive power-sharing.
2.3 Conventional harmonic virtual conductance control
scheme
(1) Fig. 4 shows a block diagram of the conventional harmonic virtual
conductance control scheme for the ith DG unit. The basic idea
(2) behind this method is to make the DG inverter operate as a resistor
at the harmonic frequencies, so that harmonic resonances and
voltage distortions can be damped. The harmonic current reference
5105

Fig. 4 Block diagram of the conventional harmonic virtual conductance
control scheme
Fig. 5 DG equivalent circuit at harmonic frequency
Fig. 6 Equivalent circuit of two DG units with the coordinated virtual
impedance control scheme at fundamental frequency
Fig. 7 Phasor diagram of two DG units at the fundamental frequency
is realised by multiplying the harmonic voltages at the PCC bus
with a conductance Gh [17]
Ih ref = V PCC GExt s Gh = V PCC h Gh, (6)
where GExt s is a bandpass filter to extract the hth PCC harmonic
voltage V PCC h
GExt s = ωCs / s2 + ωCs + ωh2 , (7)
where ωC is a bandpass filter's cut-off frequency. Fig. 5 shows the
DG equivalent circuit at harmonic frequency. We assume that the
DG output current perfectly tracks the current reference in (6) by
using the high-bandwidth current controller IOh ≃ Ih ref , so the
equivalent harmonic impedance Zeq h
at the installation point can
be derived from Fig. 5
5106
h
Zeq = − V PCC h /IOh = 1/Gh . (8)
From (8), it is obvious that the DG equivalent harmonic impedance
can be controlled with a positive value of the conductance Gh. By
increasing Gh, the harmonic impedance on the DG side is reduced
to absorb non-linear load current, so the PCC voltage quality is
improved. However, this conventional control scheme requires the
exact magnitude and phase of the PCC voltage, which is hard to
obtain when the DG unit is located far from the PCC bus. In
addition, because the harmonic current reference is proportional to
V PCC h, disturbance in the PCC bus is amplified, which reduces
microgrid stability.
3 Proposed coordinated virtual impedance
control scheme
To address the inaccurate power-sharing and PCC voltage
distortion issues, this paper proposes the coordinated virtual
impedance control scheme that inserts the fundamental virtual
resistance and capacitance at the inverter output to balance the
equivalent impedance among DG units. In addition, the virtual
resistance and capacitance are considered at the harmonic
frequency to compensate for the PCC voltage harmonics.
3.1 Fundamental power-sharing enhancement
Fig. 6 shows an equivalent circuit of two DG units with the
proposed coordinated virtual impedance control scheme at the
fundamental frequency. From Fig. 6, the fundamental virtual
capacitance is presented to counteract the effect of the physical line
inductance. In addition, the fundamental virtual resistance is
proposed to compensate for the mismatched line resistance among
DG units. Based on the equivalent circuit in Fig. 6, the DG phasor
diagram is obtained in Fig. 7, and their DG output voltages
V Of 1, V Of 2 are derived as follows:
V Of 1 = V PCC_f + ΔV ln1 + ΔV Vf 1
Rln1 + RVf 1 P1 + Xln1 − XVf 1 Q1 (9)
= V PCC_f + ,
Vo
Rln2 + RVf 2 P2 + Xln2 − XVf 2 Q2
V Of 2 = V PCC_f + , (10)
Vo
where V PCC_f is the PCC fundamental voltage, and RVfi and XVfi
i = 1, 2 are the virtual resistance and capacitive reactance at the
fundamental frequency, respectively. For simple analysis, we
assume that DG1 and DG2 have the same rated power
GP1 = GP2, GQ1 = GQ2 . Since the line impedance is highly
inductive due to the large grid side output inductance, the P − ω
droop controller can properly share the active power shared
between two DG units P1 ≃ P2 [26]. From (2), the reactive power
is shared accurately among DG units only if the DG1 and DG2
output voltages are the same (V Of 1 = V Of 2), which is given as
follows:
Rln2 − Rln1 + RVf 2 − RVf 1 P1
V Of 2 − V Of 1 =
Vo
(11)
Xln2 − Xln1 + XVf 1 − XVf 2 Q2
+ = 0.
Vo
To satisfy (11), the virtual resistance and capacitive reactance
(RVfi, XVfi| i = 1,2) have to be coordinated controlled to compensate
for the mismatched line impedance among DG units. The proposed
virtual resistance RVfi and capacitive reactance XVfi of the ith
DG unit are simultaneously tuned by using the following external
control loops:
RVf i = KiP /s δPi , (12)
XVfi = 1/ ωf CVf i , (13)
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 CVf i = KpQ + KiQ /s δQi , (14)

where KpQ is the proportional gain, KiP and KiQ are the integral
gains, and δPi and δQi are the active and reactive power mismatch,
respectively, which are calculated among the ith DG unit and its
neighbours. The active and reactive power mismatches of the ith
DG unit are calculated based on the consensus algorithm [22]

δPi = CP ∑ ai j P j − Pi , (15) Fig. 8 Equivalent circuit of two DG units with the proposed coordinated
j ∈ Ni virtual impedance control scheme at harmonic frequency

δQi = CQ ∑ ai j Q j − Qi , (16)
j ∈ Ni

where ai j represents the connection status between the ith and jth
DG units, and CP and CQ are consensus coupling gains.
To reject the harmonic disturbance in the fundamental complex
virtual impedance, a second-order generalised integrator (SOGI) is
adopted to decompose the fundamental output current and generate
the voltage drop on the fundamental virtual impedance V Vf i [27]

V Vf i = ZVf iIOf i = RVf i IOf i_α + 1/ ωf CVf i IOf i_β, (17)

where IOf i_α and IOf i_β are the SOGI fundamental current and its
quadrature fundamental current, respectively.

3.2 PCC harmonic voltage enhancement

In addition to the fundamental power-sharing improvement, the
proposed coordinated virtual impedance control scheme is
extended for the harmonic frequency to compensate PCC voltage
harmonics. Fig. 8 shows an equivalent circuit of two DG units with
the proposed control scheme at the harmonic frequency. From
Fig. 8, the PCC harmonic voltage becomes
1 1 1 as 0.2 Ω to obtain a minimal voltage drop, and the virtual
h
V PCC = − ILoad_h / h
= − ILoad_h / h + h ,
Zeq total Zeq1 Zeq2
h h h
where V PCC is the PCC harmonic voltage, and Zeq 1 and Zeq2 are the
equivalent impedance of DG1 and DG2 at the harmonic frequency,
respectively
h 2 2
Zeq 1 = RVh1 + Rln1 + Xln h1 − XVh1 ,
h
Zeq 2 = RVh2 + Rln2 2 + Xln h2 − XVh2 2,
XVhi = 1/ ωhCVh i ; Xln hi = ωhL ln h i .
h harmonic frequencies is set to be 1.0%.
To improve the PCC voltage quality, V PCC in (18) has to be
h h
mitigated by reducing Zeq1 and Zeq2. Since the line impedance
values Rlni, Xln hi, i = 1, 2 are constant, the proposed harmonic
virtual resistance and virtual capacitance RVhi, XVhi are added to
h h
Zeq 1 and Zeq2 for emulating a low impedance at the specific
harmonic frequency. Thus, harmonic current flows through the
virtual impedance and the PCC voltage quality is improved.
The harmonic virtual resistance RVh i and virtual capacitance
XVhi are defined as follows:
RVh i = RVf i + RVd i,
XVhi = 1/ h ωf CVh i ,
CVh i = CVf i + CVcom i,
where RVf i and CVf i are the virtual impedance values from the
fundamental frequency, RVd i is the virtual damping resistance, and
CVcom i is the virtual compensating capacitance.
Fig. 9 PCC harmonic distortion is shared among DG units using
distributed communication link
The value of RVd i is selected to be large enough to enhance the
system stability by damping any microgrid disturbance, and it is
commonly chosen as 0.1 to 2 Ω [28, 29]. In this paper, RVd i is set
(18) compensating capacitance CVcom i is adaptively regulated by an
external controller
CVcom i = Kph + Kih /s HDref h − HDh , (25)
HDh = VhPCC /VfPCC 100%, (26)
(19) where Kph and Kih are the proportional and integral gains, HDref h
and HDh are the desired and present values of the harmonic
(20) f
distortion at the hth harmonic frequency, and V PCC is the PCC
fundamental voltage, respectively. To meet the requirements of
(21)
IEEE 519 standards [23], HDref at the third, fifth, and seventh
To integrate the harmonic compensation in each DG unit, HDh
is extracted by a single DG unit by using multiple synchronous
harmonic dq transformations [30], and the HDh value is sent to
other DG units in the microgrid using a distributed communication
link, as shown in Fig. 9. Considering the harmonic virtual
resistance and virtual capacitance in (22) and (24), the voltage drop
on the harmonic virtual impedance is defined as follows:
V Vh i = ∑ ZVh i IOh i
h = 3, 5, 7
(27)
(22) = ∑ RVh i IOh i_α + 1/ hωh CVh i IOh i_β,
h = 3, 5, 7
(23)
where IOh i_α and IOh i_β are the SOGI harmonic currents,
(24) respectively. By using the voltage drops on the fundamental and
harmonic virtual impedance in (17) and (27), the voltage reference
finally becomes

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 V ref i = V dr i − V Vf i − V Vh i From (36), the modified output impedance is obtained as follows:
= V dr i − RVf i IOf i_α + 1/ ωf CVf i IOf i_β
(28)
− ∑ RVh i IOh i_α + 1/ ωh CVh i IOh i_β . ZO′ s = ZO s + GS s Gf s ZVf + ∑ Gh s ZVh . (39)
h = 3, 5, 7
h = 3, 5, 7

Fig. 10 shows a block diagram of the proposed control scheme. In To verify the voltage tracking performance of the inner controller, a
Fig. 10, a modified control loop is applied to decouple the Bode diagram of the voltage control gain transfer function GS s is
fundamental and harmonic frequencies plotted in Fig. 11. From Fig. 11, the voltage control gain is 0 dB at
both fundamental and harmonic frequencies, which shows that the
2KIVf ωCs controller properly tracks the voltage reference. In addition, the
I ∗ = KPV + V dr − V Vf − V C effectiveness of the coordinated virtual impedance control scheme
s2 + 2ωCs + ωf2
(29) is explored by analysing the DG output impedance. Fig. 12 shows
2KIVh ωCs the Bode diagram of ZO s and ZO′ s with the parameters in
+ ∑ s + 2ωCs + ωh2
2 0 − V Vh − V C ,
Table 1. From Fig. 12, the magnitude and phase of the modified
h = 3, 5, 7
output impedance ZO′ s have both resistance and capacitance
where KPV is the proportional gain, and KIVf and KIVh are the characteristics at the fundamental frequency. Hence, the modified
resonant gains, respectively. output impedance has suitable gain to compensate for the line
impedance mismatch among DG units. Furthermore, it is clear that
ZO′ s has a small impedance value at the third, fifth, and seventh
3.3 Output impedance characteristics
harmonic frequencies with the proposed coordinated virtual
The DG output impedance is evaluated to investigate the influence impedance control scheme. Therefore, the load harmonic current
of the proposed coordinated virtual impedance control scheme on can be absorbed by DG units and the PCC voltage harmonics are
the DG inverter. From Fig. 10, the DG closed-loop transfer compensated.
function without virtual impedance is derived as follows:

V C = GS s V ref − ZO s IO = GS s V dr − ZO s IO, (30)

where GS s and ZO s are the voltage control gain and output

impedance transfer functions

GV GI
GS s = , (31)
s2Lf Cf + s Rf Cf + GI Cf + GV GI + 1

sLf + Rf + GI
ZO s = , (32)
s2Lf Cf + s Rf Cf + GICf + GVGI + 1

where GV s and GI s are the voltage and current controllers

2KIVf ωcs
GV s = KPV + , (33)
s2 + 2ωcs + ωf2

GI s = KPI, (34)

By using the proposed coordinated virtual impedance control

scheme at fundamental and harmonic frequencies, the voltage
controller and DG voltage transfer function are modified as

2KIVf ωcs 2KIVh ωcs Fig. 10 Block diagram of the proposed coordinated virtual impedance
GV s = KPV +
s + 2ωcs + ωf2
2 + ∑ s 2
+ 2ωcs + ωh2
, (35) control scheme
h = 3, 5, 7

V C = GS s V dr − V Vf i − V Vh i − ZO s IO

= GS s V dr − GS s IOf ZVf + ∑ IOhZVh − ZO s IO

h = 3, 5, 7

= GS s V dr − ZO s + GS s Gf s ZVf + ∑ Gh s ZVh IO,

h = 3, 5, 7
(36)

where ZVf = RVf + 1/sCVf and ZVh = RVh + 1/sCVh. The resonant
voltage controller in (35) is also adopted to attenuate the low-order
harmonics caused by dead time [31].
In (36), Gf s and Gh s are bandpass filters to extract the
fundamental and harmonic currents:

Gf s = ωC s / s2 + ωC s + ωf2 , (37)

Gh s = ωC s / s2 + ωC s + ωh2 . (38)
Fig. 11 Bode diagram of the voltage control gain GS s

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 ripple-free at the PCC, the harmonic distortion in (26) is filtered
using a low-pass filter

100ωLPF h
HDh % = f
V PCC , (40)
s + ωLPF V PCC

where ωLPF is the cut-off angular frequency of the filter. By

linearising (40), the small-signal variation of the harmonic
distortion is derived as follows:

100ωLPF h
ΔHDh = f
ΔV PCC , (41)
s + ωLPF V PCC

where the operator Δ represents a small-signal disturbance around

the microgrid equivalent operating point. The small-signal
variation of the harmonic virtual impedance in (23) is obtained as

−ΔCVh i
ΔXVhi = = ψ i ΔCVh i, (42)
h ωf CVh i 2

where ψ i = − 1/ h ωf CVh i 2 .
By substituting the small-signal variation of the virtual
capacitance ΔCVh i into (42), ΔXVhi becomes

Fig. 12 Bode diagram of the output impedance without and with the ΔXVhi = ψ i Kph + Kih /s ΔHDh . (43)
coordinated virtual impedance control scheme
Similarly, the small-signal variation of the equivalent line
Table 1 System parameters impedance is obtained from (19)
Parameters Value Parameters Value
h XVhi − Xln hi ΔXVh i
GPi i = 1, 2, 3 0.005 Lf 1.2 mH ΔZeqi = , (44)
GQi 0.002 Rf 0.01 Ω R2 + Xln hi − XVhi 2
i = 1, 2, 3
HDref 3, 5, 7 1% Cf 20 µF
where R = RVhi + Rlni.
KPV 1.0 ωC 1 Hz In the case of n DG units, the harmonic voltage in (18) becomes
KIVf 180 VO 110 V
KIVh 20 f0 60 Hz h ILoad_h
V PCC = h h h
. (45)
KPI 1.5 CP 0.4 1/Zeq 1 + 1/Zeq2 + ⋯ + 1/Zeqn

KiP 0.45 CQ 0.4

h
KiQ 0.45 fSwitching 10 kHz The small-signal variation of V PCC is obtained by linearising (45)
KpQ 2.10−4 Kph 2.10−4 n
Kih 0.98 ωLPF 2π100 h
V PCC = ∑ αiΔZeqi
h h
= α1ΔZeq h h
1 + α2ΔZeq2 + ⋯ + αnΔZeqn, (46)
i=1

h h
where αi = ∂V PCC /∂Zeqi with i = 1, 2, …, n.
By manipulating (40)–(46), the small-signal state-space model
of the proposed control scheme is derived as

Ẋ MG = AMG XMG, (47)

where XMG = ΔXVh1ΔXVh2⋯ΔXVhnΔHDh and AMG is given in

Fig. 13 The trajectories of all eigenvalues when increasing the gain K13
from 10−5 to 20
3.4 Small signal stability analysis
To evaluate the stability of the proposed control scheme, the
microgrid is analysed based on the small-signal state-space model
[32]. When we assume that the fundamental power is shared
proportionally at the steady-state, the system stability mainly
depends on the harmonic compensation scheme [33]. To ensure the
the Appendix.
The eigenvalues of the small-signal state-space model in (47)
are solved by using ‘eigenvalues function’ in MATLAB to evaluate
the system stability. In this paper, we consider the microgrid
system with three DG units using the parameters in Table 1. The
impact of the control gain on the system dynamics is examined
using root locus diagrams with different Kih h = 3, 5, 7 .
Fig. 13 shows the trajectories of all eigenvalues when
increasing the gain Kih(h = 3). The system becomes more stable as
Ki3 increases because the dominant eigenvalues move from the
right to the left half-plane, as shown in Fig. 13. Figs. 14 and 15
show the root locus diagrams for different values of Ki5 and Ki7.
When Kih > 10 (i = 5, 7), the system damping is reduced because
the eigenvalues λ1 and λ2 move towards the image axis. From the
eigenvalue analysis, the desired system damping and system
dynamics are obtained by selecting the value of 0.98 for each
harmonic control gain Kih.

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Fig. 14 Root locus diagram according to control gain Kih(h = 5) with
10−5 < Ki5 < 20
Fig. 15 Root locus diagram for different values of Ki7(10−5 < Ki7 < 20)
with 10−5 < Ki7 < 20
Fig. 16 Root locus diagram according to communication delay τDL:
0 < τDL < 50ms
Fig. 17 Small signal representation of a voltage source with load
3.5 Stability with the communication time delay
To investigate the influence of the communication time delay, the
small-signal variation of DG equivalent impedance in (44) is
rewritten as follows:
5110
ΔXVhi DL = ψ i Kph + Kih /s ΔHDh_DL, (48)
where ΔHDh_DL = ΔHDh t − τDL and τDL is the delay time among
DG units.
With the modified DG equivalent impedance, the proposed
control system in (47) becomes
Ẋ MG = BMG XMG + BMG_DL XMG_DL, (49)
where XMG_DL = ΔXVh1 DLΔXVh2 DL . . . ΔXVhn DL ΔHDh DL .
By considering the communication delay, the characteristic
equation of the system in (49) is obtained [34]
det ( − sI + BMG + BMG_DLe− τDL s) = 0. (50)
It is difficult to find all the eigenvalues of the system in (49)
because the characteristic (50) has infinite solutions. To find the
eigenvalues for a specific communication time delay, we solve the
characteristic equation using the numerical approach in [34].
Fig. 16 shows the trajectories of all eigenvalues when increasing
the communication delay τDL from 0 to 50 ms. In Fig. 16, all
eigenvalues move to the right half-plane when τDL increases, and
the system becomes unstable when τDL > 35 ms. Therefore, the
microgrid stability is ensured with the communication delay
τDL = 20 ms, which is considered in this study.
3.6 System stability under constant power load
To verify the load stability of the proposed control scheme, the
microgrid model was verified under a constant power load using
the Middlebrook criterion [35]. Fig. 17 shows the small-signal
representation of a voltage source with load based on the
Middlebrook criterion. In Fig. 17, the DG subsystem is modelled
by a Thevenin equivalent circuit with an ideal voltage source
V S s in series with DG output impedance ZOut s . Meanwhile,
the load subsystem is modelled by an input impedance Zin s .
From Fig. 17, the output current from the source to the load is
obtained as follows:
VS s VS s 1
IO s = = . (51)
Zin s + ZOut s ZLoad s 1 + ZOut s /ZLoad s
We assume that the source voltage is constant around the
equilibrium point, so the stability of the system is only dependent
on the second term of (51)
1
Hs = . (52)
1 + ZOut s /ZLoad s
According to linear control theory, H s is stable if ZOut s /Zin s
satisfies the Nyquist stability criterion [35]. A constant power load
ZLoad s is simplified as resistance and inductance, which are in
parallel with a constant voltage source
Zin s = ZLoad s = RLoad + sLLoad = ZLoad∠θLoad . (53)
In the islanded microgrid with n DG units shown in Fig. 18, the
output impedance ZOut s is calculated as
ZOut s = Z′O 1 s + Zln1 ... Z′O n s + Zlnn . (54)
To verify the stability of the microgrid, the Nyquist diagram of
ZOut s /Zin s is plotted in Fig. 19 with the parameters in Table 1.
When the load increases, the distribution area of ZOut s /Zin s
expands to the left-hand side, as shown in Fig. 19. When the load is
smaller than 2 Ω, ZOut s /Zin s exceeds the unit circle, so the
Nyquist stability condition is not satisfied, and the microgrid
becomes unstable. Based on the Nyquist stability criterion, the
stability of the microgrid with the designed parameters is
guaranteed if the load is >2 Ω.
IET Gener. Transm. Distrib., 2020, Vol. 14 Iss. 22, pp. 5104-5113
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Fig. 18 Output and input impedance model of the microgrid system

Fig. 19 Nyquist diagram of ZOut s /ZLoad s

Fig. 21 The power sharing performance of conventional and proposed
control schemes
Table 2 Hardware configuration (a) Active power sharing, (b) Reactive power sharing
Parameters Value
Rln1, Xln1 0.1 Ω, 0.52 Ω 4 Experiment results
Rln2, Xln2 0.2 Ω, 0.805 Ω
4.1 Laboratory test results
Rln3, Xln3 0.3 Ω, 1.13 Ω
The proposed coordinated virtual impedance control scheme was
fSampling 10 kHz
applied to an islanded microgrid in Fig. 1, which is composed of
microcontroller TMS320F28379D three DG units, linear and non-linear loads. The microgrid system
hall current sensor LA25-NP was built with the parameters in Table 2, and the test bed is shown
hall voltage sensor LV25-P in Fig. 20. Digital signal processor microcontroller
PTotal 1050W TMS320F28379D was used to implement the control algorithm,
and both switching frequency and sampling frequency were
QTotal 525Var
selected as 10 kHz.
load 2 80 Ω; 150 μF; 560 μH From Figs. 21–24, the performance of the proposed coordinated
load 3 10 Ω; 45 mH virtual impedance control scheme is experimentally compared with
communication delay 20 ms that of a conventional control scheme in [22], and experimental
dead time 1.5 µs conditions are defined as follows. At t < t1, the conventional droop
DC storage capacitor 1000 µF/600 V control scheme is originally adopted. Then, the proposed control
scheme is started at t = t1 by inserting the fundamental virtual
resistance and capacitance in the DG output impedance for
accurate reactive power sharing. At t = t2, the PCC voltage
harmonics is compensated by adding the harmonic virtual
resistance and capacitance. The compensating performance with
the proposed control scheme is then evaluated by connecting load 3
to the microgrid at t = t3.
Figs. 21a and b show the active and reactive power sharing. At
t < t1, in spite of accurate active power sharing in Fig. 21a, the
reactive power is not shared correctly with the conventional control
scheme as shown in Fig. 21b. However, when the proposed control
scheme is applied at t = t1, the unequal line impedance is
compensated by actively controlling the virtual resistance and
capacitance at the inverter output, so the reactive power sharing is
accurately achieved. Owing to the virtual capacitance regulation,
the active power has a small oscillation, but it decays to almost
Fig. 20 Laboratory microgrid system zero after 0.8 s thanks to the adjustable virtual resistance. In
addition, the harmonic virtual impedance does not affect the

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© The Institution of Engineering and Technology 2020
Fig. 22 PCC harmonic distortion with the proposed control schemes

fundamental power-sharing in the parallel DG system, which

shows that the fundamental and harmonic voltage components are
fully decoupled by means of the modified voltage control loop.
Furthermore, the fundamental virtual resistance and virtual
capacitance are continuously regulated to guarantee accurate
power-sharing even if the load changes at t = t3.
Fig. 22 shows the PCC harmonic distortion. During the
conventional period t < t1 , HD3, HD5, and HD7 are relatively high
at 5.5, 3.2, and 2.3%. When the proposed control scheme is applied
at t = t2, HD3, HD5, and HD7 are all attenuated to 1% without
oscillation and undershoot by means of the harmonic virtual
resistance and capacitance. In spite of the load change at t = t3,
harmonics are kept without variation. To investigate the PCC
voltage waveforms according to the coordinated virtual impedance
control, the PCC voltages and each sectional zoomed-in waveform
are shown in Fig. 23 along with the fast Fourier transform (FFT).
From Fig. 23, when the proposed control scheme is activated, the
PCC voltage becomes more sinusoidal because the voltage
harmonics are effectively compensated. In addition, the PCC
voltage quality is guaranteed even if the load changes, which
shows the reliability of the proposed control scheme. Fig. 24 shows
the THD of the PCC voltage. From Fig. 24, it is obvious that the
third, fifth, and seventh harmonics are significantly reduced with
the proposed control scheme, and THD is reduced from 8.806 to
3.644% after compensation.

4.2 Discussion of experimental results and main Fig. 23 PCC voltage and its FFT along with zoomed waveforms
achievements
From the power-sharing performance in Figs. 21a and b, the active
and reactive powers are accurately shared among three DG units
with the proposed control scheme. By adaptively modifying the
DG output impedance at the fundamental frequency, the accurate
power-sharing is ensured despite the load changes and harmonic
compensation. In addition, the PCC harmonic distortions in Fig. 22
are all reduced to 1% without any overshoot or oscillation thanks to
the proposed harmonic virtual impedance compensation. As we can
see in Fig. 24, THD after compensation is attenuated to 3.64%,
which complies with the IEEE 519 standards (THD<5%). From the
experimental results, it is clear that the proposed coordinated
virtual impedance control scheme achieves the accurate power-
sharing among DG units with a high PCC voltage quality
regardless of load condition.

5 Conclusion Fig. 24 Comparison of PCC voltage THD

In this paper, a coordinated virtual impedance control scheme was
proposed to address the inaccurate power-sharing and PCC voltage
distortion issues. The proposed control scheme flexibly controls the
fundamental virtual resistance and capacitance to compensate for
the line impedance mismatch, so the power-sharing error is
eliminated. In addition, the output impedance at harmonic
frequencies is modified by means of the adjustable harmonic
virtual impedance to enhance PCC voltage quality. By controlling
the harmonic voltage components independently, the harmonic
virtual impedances are decoupled in the frequency domain, and the
PCC voltage harmonics are properly compensated to comply with
IEEE 519 standards. Furthermore, the values of virtual resistance
and capacitance are continuously adjusted to ensure accurate
power-sharing and desired PCC voltage quality in spite of the load
power change. The output impedance characteristics were analysed
by means of a Bode diagram to verify the feasibility of the
proposed coordinated virtual impedance control scheme. The
experimental results showed the effectiveness and reliability of the
proposed control scheme.
6 Acknowledgments
This work was supported in part by the National Research
Foundation of Korea Grant funded by the Korean Government
under Grant NRF-2018R1D1A1A09081779 and in part by the

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100ωLPF α1 XVh1 − Xln h1 α2 XVh2 − Xln h2 αn XVhn − Xln hn

AHDX = ⋯ .
f 2 2 2 2
V PCC R + Xln h1 − XVh1 R + Xln h2 − XVh2 R2 + Xln hn − XVhn 2

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