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FDS4935

June 2001

FDS4935
Dual 30V P-Channel PowerTrench MOSFET
General Description Features
This P-Channel MOSFET is a rugged gate version of • –7 A, –30 V RDS(ON) = 23 mΩ @ VGS = –10 V
Fairchild Semiconductor’s advanced PowerTrench
process. It has been optimized for power management RDS(ON) = 35 mΩ @ VGS = –4.5 V
applications requiring a wide range of gave drive
voltage ratings (4.5V – 25V). • Low gate charge (15nC typical)

Applications • Fast switching speed

• Power management • High performance trench technology for extremely


• Load switch low RDS(ON)
• Battery protection
• High power and current handling capability

DD1 5 4
DD1
DD2 6 Q1 3
D2
D
7 2
SO-8 G1 Q2
S1 G 8 1
G2 S
S2 S
Pin 1 SO-8 S

Absolute Maximum Ratings TA=25oC unless otherwise noted

Symbol Parameter Ratings Units


VDSS Drain-Source Voltage –30 V
VGSS Gate-Source Voltage ±25 V
ID Drain Current – Continuous (Note 1a) –7 A
– Pulsed –30
PD Power Dissipation for Dual Operation 2
PD Power Dissipation for Single Operation (Note 1a) 1.6 W
(Note 1b) 1
(Note 1c) 0.9
TJ, TSTG Operating and Storage Junction Temperature Range –55 to +175 °C

Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W

Package Marking and Ordering Information


Device Marking Device Reel Size Tape width Quantity
FDS4935 FDS4935 13’’ 12mm 2500 units

2003 Fairchild Semiconductor Corporation FDS4935 Rev B(W)


FDS4935
Electrical Characteristics TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics
BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = –250 µA –30 V
∆BVDSS Breakdown Voltage Temperature
ID = –250 µA, Referenced to 25°C –24 mV/°C
∆TJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = –24 V, VGS = 0 V –1 µA
IGSSF Gate–Body Leakage, Forward VGS = –25 V, VDS = 0 V –100 nA
IGSSR Gate–Body Leakage, Reverse VGS = 25 V, VDS = 0 V 100 nA
On Characteristics (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = –250 µA –1 –1.6 –3 V
∆VGS(th) Gate Threshold Voltage ID = –250 µA, Referenced to 25°C
4.4 mV/°C
∆TJ Temperature Coefficient
RDS(on) Static Drain–Source VGS = –10 V, ID = –7 A 19 23 mΩ
On–Resistance VGS = –4.5 V, ID = –5.5 A 28 35
VGS= –10 V, ID = –7 A, TJ=125°C 26 34
ID(on) On–State Drain Current VGS = –10 V, VDS = –5 V –30 A
gFS Forward Transconductance VDS = –5 V, ID = –7 A 19 S

Dynamic Characteristics
Ciss Input Capacitance VDS = –15 V, V GS = 0 V, 1233 pF
Coss Output Capacitance f = 1.0 MHz 311 pF
Crss Reverse Transfer Capacitance 152 pF

Switching Characteristics (Note 2)


td(on) Turn–On Delay Time VDD = –15 V, ID = –1 A, 13 23 ns
tr Turn–On Rise Time VGS = –10 V, RGEN = 6 Ω 10 20 ns
td(off) Turn–Off Delay Time 48 77 ns
tf Turn–Off Fall Time 25 40 ns
Qg Total Gate Charge VDS = –15 V, ID = –7 A, 15 21 nC
Qgs Gate–Source Charge VGS = –5 V 4.4 nC
Qgd Gate–Drain Charge 4.5 nC

Drain–Source Diode Characteristics and Maximum Ratings


IS Maximum Continuous Drain–Source Diode Forward Current –2.1 A
Drain–Source Diode Forward
VSD VGS = 0 V, IS = –2.1 A (Note 2) –0.75 –1.2 V
Voltage
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.

a) 78°C/W when b) 125°C/W when c) 135°C/W when mounted on a


mounted on a 0.5in2 mounted on a 0.02 minimum pad.
pad of 2 oz copper in2 pad of 2 oz
copper

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

FDS4935 Rev B(W)


FDS4935
Typical Characteristics

50
VGS = -10V -5.0V 2.4
-6.0V -4.5V

DRAIN-SOURCE ON-RESISTANCE
2.2
40 VGS = -3.5V
-ID, DRAIN CURRENT (A)

-4.0V 2

RDS(ON), NORMALIZED
30 1.8
-4.0V
-3.5V
1.6
-4.5V
20
1.4 -5.0V

-3.0V -6.0V
1.2
10
-10V
1
0 0.8
0 1 2 3 4 5 0 10 20 30 40 50
-VDS, DRAIN TO SOURCE VOLTAGE (V) -ID, DRAIN CURRENT (A)

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with


Drain Current and Gate Voltage.

1.6 0.08
ID = -7A
DRAIN-SOURCE ON-RESISTANCE

VGS = -10V ID = -3.5A


RDS(ON), ON-RESISTANCE (OHM)

1.4
0.06
RDS(ON), NORMALIZED

1.2

0.04
TA = 125oC
1

0.02
0.8 TA = 25oC

0.6 0
-50 -25 0 25 50 75 100 125 150 2 4 6 8 10
TJ, JUNCTION TEMPERATURE (oC) -VGS, GATE TO SOURCE VOLTAGE (V)

Figure 3. On-Resistance Variation with Figure 4. On-Resistance Variation with


Temperature. Gate-to-Source Voltage.

50 100
VDS = -5.0V VGS = 0V
-IS, REVERSE DRAIN CURRENT (A)

TA = -55oC 25oC
10
40
-ID, DRAIN CURRENT (A)

125oC TA = 125oC
1
30
25oC
0.1
20 -55oC
0.01

10
0.001

0 0.0001
1 2 3 4 5 0 0.2 0.4 0.6 0.8 1 1.2 1.4
-VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation


with Source Current and Temperature.

FDS4935 Rev B(W)


FDS4935
Typical Characteristics

10 2000
VDS = -5V f = 1 MHz
ID = -8.8A
-VGS, GATE-SOURCE VOLTAGE (V)

1800
-10V VGS = 0 V
8 1600

CAPACITANCE (pF)
-15V 1400
CISS
6 1200
1000
4 800
600
2 400
COSS
200 CRSS
0 0
0 4 8 12 16 20 24 0 5 10 15 20 25 30
Qg, GATE CHARGE (nC) -VDS, DRAIN TO SOURCE VOLTAGE (V)

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

100 50
P(pk), PEAK TRANSIENT POWER (W)
RDS(ON) LIMIT 100µs SINGLE PULSE
1ms RθJA = 135°C/W
40 TA = 25°C
-ID, DRAIN CURRENT (A)

10 10ms

100ms
1s 30
10s
1
DC
20
VGS = -10V
SINGLE PULSE
0.1
RθJA = 135oC/W 10
TA = 25oC

0.01 0
0.1 1 10 100 0.001 0.01 0.1 1 10 100
-VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.

1
TRANSIENT THERMAL RESISTANCE

D = 0.5
r(t), NORMALIZED EFFECTIVE

RθJA(t) = r(t) + RθJA


0.2
RθJA = 135 °C/W
0.1 0.1
0.05
P(pk)
0.02
t1
0.01
0.01 t2

TJ - TA = P * RθJA(t)
SINGLE PULSE Duty Cycle, D = t1 / t2

0.001
0.0001 0.001 0.01 0.1 1 10 100 1000

Figure 11. Transient Thermal Response Curve.


Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.

FDS4935 Rev B(W)


TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™ FACT™ ImpliedDisconnect™ PACMAN™ SPM™
ActiveArray™ FACT Quiet Series™ ISOPLANAR™ POP™ Stealth™
Bottomless™ FASTâ LittleFET™ Power247™ SuperSOT™-3
CoolFET™ FASTr™ MicroFET™ PowerTrenchâ SuperSOT™-6
CROSSVOLT™ FRFET™ MicroPak™ QFET™ SuperSOT™-8
DOME™ GlobalOptoisolator™ MICROWIRE™ QS™ SyncFET™
EcoSPARK™ GTO™ MSX™ QT Optoelectronics™ TinyLogicâ
E2CMOSTM HiSeC™ MSXPro™ Quiet Series™ TruTranslation™
EnSignaTM I2C™ OCX™ RapidConfigure™ UHC™
Across the board. Around the world.™ OCXPro™ RapidConnect™ UltraFETâ
The Power Franchise™ OPTOLOGICâ SILENT SWITCHERâ VCX™
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DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER


NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and


supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product


that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. I2

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