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VCC1R8B
USB 2.0
SPI EC LPC Debug TCPA BD9139 89
Camera Thinker
Card Edge CONN CH13 MEC1619 Board Conn ST19NP18-TPM-A
(LCD Conn) 73 Engine VCC5M_OUT VCC1R8B
60,61,62
SPI-FLASH 71,72 58 68 VCC1R05AMT
CH11
G-Sensor
Bluetooth 42 58 VT356FCX 85
67
VCC5M_OUT VCC1R05LAN
CH8
Int. KB FAN
Smart Card IF Touch Pad VCC1R05B_VTT
56 Track point IV
CH2,7 64 VT356 84
64 66
VCC5M_OUT VCC1R05B_VTT
Title
Block Diagram
USB x 4 Docking DC-IN Size
Custom
Document Number
SHINAI-4 UMA
Rev
-1
Date: Tuesday, March 06, 2012 Sheet 1 of 100
HTTPS://REALSCHEMATIC.COM
A B C D E
RESISTOR
Symbol name Value Tolerance Rating Size
0402=> 1/16W, 25V 2=>0402, 3=>0603, 5=>0805,
EC HISTORY
(J: 5%, F: 1%, D: 0.5%, B: 0.1 %) 0603 => 1/16W, 75V 6=>1206, 0=>1210
0805 => 1/10W, 100V
Stage Date EC No. Page Note
4 4
CAPACITOR
3 Symbol name Value Tolerance Rating Size 3
PLANAR_ID[3..0]
IBEXPEAK-M 39 38 48 49
Planar ID Version Planar PCB Version
PLANAR_IDn 3 2 1 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
1 0 1 1 0 <Core Design> 1
0 1 1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1 0 0 0 Taipei Hsien 221, Taiwan, R.O.C.
Title
1 0 0 1
HTTPS://REALSCHEMATIC.COM Reference
Size Document Number Rev
1 0 1 0 A3 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 2 of 100
A B C D E
A B C D E
VCC1R05B_VTT
U58A 1 OF 9
G3 PEG_COMP_CPU R57 1 2 24D9R2F-L-GP
PEG_ICOMPI
26 DMI_TXN[3..0] PEG_ICOMPO G1
4 DMI_TXN0 M2 G4 4
DMI_TXN1 DMI_RX#0 PEG_RCOMPO
P6 DMI_RX#1
DMI_TXN2 P1
DMI_TXN3 DMI_RX#2
P10 DMI_RX#3 PEG_RX#0 H22
26 DMI_TXP[3..0] PEG_RX#1 J21
DMI_TXP0 N3 B22
DMI_TXP1 DMI_RX0 PEG_RX#2
P7 DMI_RX1 PEG_RX#3 D21
DMI
DMI_TXP2 P3 A19
DMI_TXP3 DMI_RX2 PEG_RX#4
P11 DMI_RX3 PEG_RX#5 D17
26 DMI_RXN[3..0] PEG_RX#6 B14
DMI_RXN0 K1 D13
DMI_RXN1 DMI_TX#0 PEG_RX#7
M8 DMI_TX#1 PEG_RX#8 A11
DMI_RXN2 N4 B10
DMI_RXN3 DMI_TX#2 PEG_RX#9
R2 DMI_TX#3 PEG_RX#10 G8
26 DMI_RXP[3..0] PEG_RX#11 A8
DMI_RXP0 K3 B6
DMI_RXP1 DMI_TX0 PEG_RX#12
M7 DMI_TX1 PEG_RX#13 H8
DMI_RXP2 P4 E5
DMI_RXP3 DMI_TX2 PEG_RX#14
T3 DMI_TX3 PEG_RX#15 K7
PEG_RX0 K22
26 FDI_TXN[7..0] PEG_RX1 K19
PEG_RX2 C21
FDI_TXN0 U7 D19
FDI_TXN1 FDI0_TX#0 PEG_RX3
W11 FDI0_TX#1 PEG_RX4 C19
FDI_TXN2 W1 D16
FDI_TXN3 FDI0_TX#2 PEG_RX5
AA6 FDI0_TX#3 PEG_RX6 C13
FDI_TXN4 W6 D12
FDI_TXN5 FDI1_TX#0 PEG_RX7
V4 FDI1_TX#1 PEG_RX8 C11
3 FDI_TXN6 3
Intel(R) FDI
26 FDI_TXP[7..0] PEG_RX11 C8
PEG_RX12 C5
FDI_TXP0 U6 H6
FDI_TXP1 FDI0_TX0 PEG_RX13
W10 FDI0_TX1 PEG_RX14 F6
FDI_TXP2 W3 K6
FDI_TXP3 FDI0_TX2 PEG_RX15
AA7 FDI0_TX3
FDI_TXP4 W7 G22
FDI_TXP5 FDI1_TX0 PEG_TX#0
T4 FDI1_TX1 PEG_TX#1 C23
FDI_TXP6 AA3 D23
FDI_TXP7 FDI1_TX2 PEG_TX#2
AC8 FDI1_TX3 PEG_TX#3 F21
PEG_TX#4 H19
26 FDI_FSYNC0 AA11 FDI0_FSYNC PEG_TX#5 C17
VCC1R05B_VTT AC12 K15
26 FDI_FSYNC1 FDI1_FSYNC PEG_TX#6
PEG_TX#7 F17
26 FDI_INT U11 FDI_INT PEG_TX#8 F14
PEG_TX#9 A15
26 FDI_LSYNC0 AA10 FDI0_LSYNC PEG_TX#10 J14
26 FDI_LSYNC1 AG8 FDI1_LSYNC PEG_TX#11 H13
1
M10
DY PEG_TX#12
F10
R920 R63 PEG_TX#13
PEG_TX#14 D9
10KR2J-3-GP 24D9R2F-L-GP J4
PEG_TX#15
AF3
2
eDP_COMP_CPU EDP_COMPIO
AD2 EDP_ICOMPO PEG_TX0 F22
eDP_HPD_CPU AG11 A23
EDP_HPD# PEG_TX1
PEG_TX2 D24
PEG_TX3 E21
2 2
AG4 EDP_AUX# PEG_TX4 G19
AF4 EDP_AUX PEG_TX5 B18
eDP PEG_TX6 K17
PEG_TX7 G17
AC3 EDP_TX#0 PEG_TX8 E14
AC4 EDP_TX#1 PEG_TX9 C15
AE11 EDP_TX#2 PEG_TX10 K13
AE7 EDP_TX#3 PEG_TX11 G13
PEG_TX12 K10
AC1 EDP_TX0 PEG_TX13 G10
AA4 EDP_TX1 PEG_TX14 D8
AE10 EDP_TX2 PEG_TX15 K4
AE6 EDP_TX3
IVY-BRIDGE-GP-NF
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(1/8):DMI/EDP/PEG/FDI
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A3
SHINAI-4 UMA -1
Date: Monday, March 12, 2012 Sheet 3 of 100
A B C D E
A B C D E
Table -PROC_SELECT(-PROC_IVY)
VCC1R05B_VTT
Sandy Bridge High U58B 2 OF 9
Ivy Bridge Low J3
BCLK CPU_CLK_100M 25
BCLK# H2 -CPU_CLK_100M 25
MISC
CLOCKS
29 -PROC_IVY F49 PROC_SELECT#
AG3 DPLL_REF_CLK R179 1 2 1KR2J-1-GP
DPLL_REF_CLK -DPLL_REF_CLL R168 1
DPLL_REF_CLK# AG1 2 1KR2J-1-GP
VCC1R05B_VTT C57 PROC_DETECT#
4 4
VCC1R05B_VTT
C49 CATERR#
THERMAL
R64
62R2J-GP
62 PECI A48 PECI SM_DRAMRST# AT30
1
SM_RCOMP0 BF44 SM_RCOMP0_CPU R7 1 2 140R2F-GP R480 R473
DDR3
MISC
R65 1 2 56R2J-4-GP PROCHOT_CPU C45 BE43 SM_RCOMP1_CPU R84 1 2 25D5R2F-GP 51R2J-2-GP 51R2J-2-GP
62,80 -PROCHOT PROCHOT# SM_RCOMP1
SM_RCOMP2 BG43 SM_RCOMP2_CPU R85 1 2 200R2F-L-GP
2
VCC1R5_VDDQ
PWR MANAGEMENT
J58 -XDP_TRST 11
2
TRST#
1
2 1 SM_DRAMPW ROK BE45 G58
26,32,87 DRAMPW RG SM_DRAMPWROK BPM#0
E55 R472
BPM#1 51R2J-2-GP
130R2J-GP BPM#2 E59
BPM#3 G55
G59
2
-CPURST D44 BPM#4
RESET# BPM#5 H60
J59 1 TP947
BPM#6 TPAD40-GP
BPM#7 J61 1
1
TP948
R193 TPAD40-GP
10KR2J-3-GP
VCC1R5A
SM_DRAMRST_CPU
2
IVY-BRIDGE-GP-NF
S
VCC1R05B_VTT
1
G
DY
12,28 DRAMRST_GATE
1
SCD047U25V2KX-GP
2 75R2J-1-GP LSK3541G1ET2L-GP 2
2
D
DY
1
-CPURST_R 2
2
1
R1013
-DRAMRST_R 1 2 1KR2J-1-GP
R992 -DRAMRST 12,13
1KR2J-1-GP
D
LSK3541G1ET2L-GP
2
LSK3541G1ET2L-GP
G Q73
11,28,56,60,68,71 -PLTRST_FAR
S
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(2/8):CLK/MISC/JTAG
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A3
SHINAI-4 UMA -1
Date: Monday, March 12, 2012 Sheet 4 of 100
A B C D E
A B C D E
U58C 3 OF 9
12 M_A_DQ[63..0]
M_A_DQ0 AG6
M_A_DQ1 SA_DQ0 M_A_DDRCLK0_800M
AJ6 SA_DQ1 SA_CK0 AU36 M_A_DDRCLK0_800M 12
M_A_DQ2 AP11 AV36 -M_A_DDRCLK0_800M
M_A_DQ3 SA_DQ2 SA_CK#0 M_A_CKE0 -M_A_DDRCLK0_800M 12
4 AL6 SA_DQ3 SA_CKE0 AY26 M_A_CKE0 12 4
M_A_DQ4 AJ10
M_A_DQ5 SA_DQ4
AJ8 SA_DQ5
M_A_DQ6 AL8
M_A_DQ7 SA_DQ6
AL7 SA_DQ7
M_A_DQ8 AR11
M_A_DQ9 SA_DQ8 M_A_DDRCLK1_800M
AP6 SA_DQ9 SA_CK1 AT40 M_A_DDRCLK1_800M 12
M_A_DQ10 AU6 AU40 -M_A_DDRCLK1_800M
M_A_DQ11 SA_DQ10 SA_CK#1 M_A_CKE1 -M_A_DDRCLK1_800M 12
AV9 SA_DQ11 SA_CKE1 BB26 M_A_CKE1 12
M_A_DQ12 AR6
M_A_DQ13 SA_DQ12
AP8 SA_DQ13
M_A_DQ14 AT13
M_A_DQ15 SA_DQ14
AU13 SA_DQ15
M_A_DQ16 BC7
M_A_DQ17 SA_DQ16
BB7 SA_DQ17 SA_CS#0 BB40 -M_A_CS0 12
M_A_DQ18 BA13 BC41
M_A_DQ19 SA_DQ18 SA_CS#1 -M_A_CS1 12
BB11 SA_DQ19
M_A_DQ20 BA7
M_A_DQ21 SA_DQ20
BA9 SA_DQ21
M_A_DQ22 BB9
M_A_DQ23 SA_DQ22
AY13 SA_DQ23
M_A_DQ24 AV14 AY40
M_A_DQ25 SA_DQ24 SA_ODT0 M_A_ODT0 12
AR14 SA_DQ25 SA_ODT1 BA41 M_A_ODT1 12
M_A_DQ26 AY17
M_A_DQ27 SA_DQ26
AR19 SA_DQ27
M_A_DQ28 BA14
M_A_DQ29 SA_DQ28
AU14 SA_DQ29 -M_A_DQS[7..0] 12
M_A_DQ30 BB14
M_A_DQ31 SA_DQ30 -M_A_DQS0
BB17 SA_DQ31 SA_DQS#0 AL11
3 M_A_DQ32 BA45 AR8 -M_A_DQS1 3
M_A_DQ33 SA_DQ32 SA_DQS#1 -M_A_DQS2
AR43 SA_DQ33 SA_DQS#2 AV11
M_A_DQ34 AW48 AT17 -M_A_DQS3
M_A_DQ35 SA_DQ34 SA_DQS#3 -M_A_DQS4
BC48 SA_DQ35 SA_DQS#4 AV45
M_A_DQ36 BC45 AY51 -M_A_DQS5
M_A_DQ37 SA_DQ36 SA_DQS#5 -M_A_DQS6
AR45 SA_DQ37 SA_DQS#6 AT55
IVY-BRIDGE-GP-NF
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(3/8):DDR3 Channel-A
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 5 of 100
A B C D E
A B C D E
U58D 4 OF 9
13 M_B_DQ[63..0]
M_B_DQ0 AL4
M_B_DQ1 SB_DQ0 M_B_DDRCLK0_800M
AL1 SB_DQ1 SB_CK0 BA34 M_B_DDRCLK0_800M 13
M_B_DQ2 AN3 AY34 -M_B_DDRCLK0_800M
M_B_DQ3 SB_DQ2 SB_CK#0 M_B_CKE0 -M_B_DDRCLK0_800M 13
4 AR4 SB_DQ3 SB_CKE0 AR22 M_B_CKE0 13 4
M_B_DQ4 AK4
M_B_DQ5 SB_DQ4
AK3 SB_DQ5
M_B_DQ6 AN4
M_B_DQ7 SB_DQ6
AR1 SB_DQ7
M_B_DQ8 AU4
M_B_DQ9 SB_DQ8 M_B_DDRCLK1_800M
AT2 SB_DQ9 SB_CK1 BA36 M_B_DDRCLK1_800M 13
M_B_DQ10 AV4 BB36 -M_B_DDRCLK1_800M
M_B_DQ11 SB_DQ10 SB_CK#1 M_B_CKE1 -M_B_DDRCLK1_800M 13
BA4 SB_DQ11 SB_CKE1 BF27 M_B_CKE1 13
M_B_DQ12 AU3
M_B_DQ13 SB_DQ12
AR3 SB_DQ13
M_B_DQ14 AY2
M_B_DQ15 SB_DQ14
BA3 SB_DQ15
M_B_DQ16 BE9
M_B_DQ17 SB_DQ16
BD9 SB_DQ17 SB_CS#0 BE41 -M_B_CS0 13
M_B_DQ18 BD13 BE47
M_B_DQ19 SB_DQ18 SB_CS#1 -M_B_CS1 13
BF12 SB_DQ19
M_B_DQ20 BF8
M_B_DQ21 SB_DQ20
BD10 SB_DQ21
M_B_DQ22 BD14
M_B_DQ23 SB_DQ22
BE13 SB_DQ23
M_B_DQ24 BF16 AT43
M_B_DQ25 SB_DQ24 SB_ODT0 M_B_ODT0 13
BE17 SB_DQ25 SB_ODT1 BG47 M_B_ODT1 13
M_B_DQ26 BE18
M_B_DQ27 SB_DQ26
BE21 SB_DQ27
M_B_DQ28 BE14
M_B_DQ29 SB_DQ28
BG14 SB_DQ29 -M_B_DQS[7..0] 13
M_B_DQ30 BG18
M_B_DQ31 SB_DQ30 -M_B_DQS0
BF19 SB_DQ31 SB_DQS#0 AL3
3 M_B_DQ32 BD50 AV3 -M_B_DQS1 3
M_B_DQ33 SB_DQ32 SB_DQS#1 -M_B_DQS2
BF48 SB_DQ33 SB_DQS#2 BG11
M_B_DQ34 BD53 BD17 -M_B_DQS3
M_B_DQ35 SB_DQ34 SB_DQS#3 -M_B_DQS4
BF52 SB_DQ35 SB_DQS#4 BG51
M_B_DQ36 BD49 BA59 -M_B_DQS5
M_B_DQ37 SB_DQ36 SB_DQS#5 -M_B_DQS6
BE49 SB_DQ37 SB_DQS#6 AT60
IVY-BRIDGE-GP-NF
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(4/8):DDR3 Channel-B
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 6 of 100
A B C D E
A B C D E
U58F POWER 6 OF 9
VCC1R05B_VTT
VCCCPUCORE
AF46
VCCIO1
AG48
VCCIO3
AG50
VCCIO4
A26 AG51
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
VCC1 VCCIO5
A29 AJ17
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
VCC2 VCCIO6
4 A31 AJ21 4
1
VCC3 VCCIO7 C1886 C51 C68 C70 C71 C1887 C1888 C76 C77 C78
A34 AJ25
VCC4 VCCIO8
A35 AJ43
VCC5 VCCIO9
A38 AJ47
2
VCC6 VCCIO10
A39 AK50
VCC7 VCCIO11
A42 AK51
VCC8 VCCIO12
C26 AL14
VCC9 VCCIO13
C27 AL15
VCC10 VCCIO14
C32 AL16
VCC11 VCCIO15
C34 AL20
VCC12 VCCIO16
C37 AL22
VCC13 VCCIO17
C39 AL26
VCC14 VCCIO18
C42 AL45
VCC15 VCCIO19
D27 AL48
VCC16 VCCIO20
D32 AM16
VCC17 VCCIO21
D34 AM17
VCC18 VCCIO22 VCC1R05B_VTT
D37 AM21
VCC19 VCCIO23
D39 AM43
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCC27
CORE SUPPLY
F25
1
VCC28
F26
VCC29
F28
VCC30
F32
2
VCC31
F34
VCC32
F37 AA14
VCC33 VCCIO30
F38 AA15
VCC34 VCCIO31
F42 AB17
VCC35 VCCIO32
G42 AB20
VCC36 VCCIO33
H25 AC13
VCC37 VCCIO34
H26 AD16
VCC38 VCCIO35
H28 AD18
VCC39 VCCIO36
H29 AD21
VCC40 VCCIO37
H32 AE14
VCC41 VCCIO38
H34 AE15
VCC42 VCCIO39
H35 AF16
VCC43 VCCIO40
3 H37 AF18 3
VCC44 VCCIO41
H38 AF20
VCC45 VCCIO42
H40 AG15
VCC46 VCCIO43
J25 AG16
VCC47 VCCIO44
J26 AG17
VCC48 VCCIO45
J28 AG20
VCC49 VCCIO46
J29 AG21
VCC50 VCCIO47
J32 AJ14
VCC51 VCCIO48
J34 AJ15
VCC52 VCCIO49
J35
VCC53
J37
VCC54
J38
J40
VCC55 need a Via to measure VCCIO_SEL voltage level.
VCC56
J42
VCC57
K26 W16
K27
VCC58 VCCIO50
W17
Connect with only Top layer
VCC59 VCCIO51
K29
VCC60 VCC1R05B_VTT
K32
VCC61 TP908 TPAD14-OP-GP
K34 1
VCC62
K35
VCC63
K37
VCC64
K39
VCC66
K42 BC22
VCC67 VCCIO_SEL
L25
VCC68
L28
SC1U10V2KX-1GP
VCC69
L33
1
VCC70 C317
L36
1
VCC71
L40
VCC72 R72 R1191
N26
2
VCC73 75R2J-1-GP 130R2J-GP
QUIET
RAILS
N30 AM25
VCC74 VCCPQE1
N34 AN22
VCC75 VCCPQE2
N38
2
VCC76
VCC1R05B_VTT VCCCPUCORE
Z0 = 27.4 OHM
1
A44 VIDALERT_CPU R76 1 2 43R2J-GP -SVID_ALERT 80
VIDALERT#
B43 R306 R303 PU/PD < 1inch
VIDSCLK SVID_CLK 80
SVID
2
F43 VCC_SENSE_CPU R563 1 2 0R2J-2-GP
SENSE LINES
VCC_SENSE VCCSENSE 80
G43 VSS_SENSE_CPU R565 1 2 0R2J-2-GP
VSS_SENSE VSSSENSE 80
AN16
VCCIO_SENSE VCC_SENSE_VTT 84
AN17
VSS_SENSE_VCCIO VSS_SENSE_VTT 84
1
1
IVY-BRIDGE-GP-NF R304
R307 100R2F-L1-GP-U
10R2F-L-GP
2
2
1 1
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(5/8):Processor Power
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A2 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 7 of 100
A B C D E
A B C D E
VCCGFXCORE_I
U58G POWER 7 OF 9 VCC1R5_VDDQ
VCCGFXCORE_I
1
AY43 R1708
SM_VREF 1KR2F-3-GP
AA46
SC22U6D3V3MX-L-GP
SC22U6D3V3MX-L-GP
VREF
VAXG1
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
AB47 VAXG2
C1889 C1890 C1891 C1892 C1893 C1894 AB50 BE7
2
VAXG3 SA_DIMM_VREFDQ DDR3_VREF_SA_M3 12
1
AB51 BG7
SC2D2U6D3V2MX-GP
VAXG4 SB_DIMM_VREFDQ DDR3_VREF_SB_M3 12
AB52
DY DY
SCD1U10V2KX-4GP
VAXG5
1
AB53
2
VAXG6
1
AB55 C357 C69
VAXG7 R1709 R1710 R1711
AB56
2
VAXG8 1KR2F-3-GP 1KR2F-3-GP 1KR2F-3-GP
AB58
4
AB59
VAXG9 DY DY 4
VAXG10
AC61
2
VAXG11 VCC1R5_VDDQ
AD47 VAXG12
AD48 VAXG13
VCCGFXCORE_I AD50 VAXG14
AD51 VAXG15 VDDQ1 AJ28 NEED SC2D2U4V2MX-1GP Place near CPU
- 1.5V RAILS
AD52 VAXG16 VDDQ2 AJ33
AD53 VAXG17 VDDQ3 AJ36
AD55 AJ40
SC2D2U6D3V2KX-GP
SC2D2U6D3V2KX-GP
SC4D7U6D3V2MX-GP-U
SC4D7U6D3V2MX-GP-U
SC4D7U6D3V2MX-GP-U
SC4D7U6D3V2MX-GP-U
C141 C144 C156 C158 C161 C163 C165 C181 C167 C1895 C1896 VAXG18 VDDQ4
AD56 AL30
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VAXG19 VDDQ5
AD58 VAXG20 VDDQ6 AL34
1
1
AD59 AL38 VCC1R5_VDDQ
VAXG21 VDDQ7
AE46 VAXG22 VDDQ8 AL42
N45 AM33
2
2
VAXG23 VDDQ9
P47 VAXG24 VDDQ10 AM36
P48 VAXG25 VDDQ11 AM40 Place under CPU
P50 VAXG26 VDDQ12 AN30
P51 VAXG27 VDDQ13 AN34
P52 VAXG28 VDDQ14 AN38
P53 AR26
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DDR3
VAXG29 VDDQ15
P55 AR28
GRAPHICS
VAXG30 VDDQ16
1
P56 VAXG31 VDDQ17 AR30
C269 C268 C267 C266 C265 C235 C236 C239 C247 C257
Keep same decoupling capacitors as DB2 P61
T48
VAXG32 VDDQ18 AR32
AR34
2
VAXG33 VDDQ19
T58 VAXG34 VDDQ20 AR36
T59 VAXG35 VDDQ21 AR40
T61 VAXG36 VDDQ22 AV41
U46 VAXG37 VDDQ23 AW26
3 V47 BA40 3
VCCGFXCORE_I VAXG38 VDDQ24
V48 VAXG39 VDDQ25 BB28
V50 VAXG40 VDDQ26 BG33
V51 VAXG41 As for placement, please follow
V52 VAXG42 "Huron River Platform Power Delivery Design Guide Rev1.0"
1
V53 VAXG43
R311 V55 VAXG44
(Intel DocNo.439028)
100R2F-L1-GP-U V56 VAXG45
V58 VAXG46
V59
2
VAXG47
W50 VAXG48
R566 W51 VAXG49 VCC1R5_VDDQ
80 VCCGFX_SENSE_I 1 2 0R2J-2-GP W52 VAXG50
W53 VAXG51
80 VSSGFX_SENSE_I 1 2 W55 VAXG52
W56 VAXG53
R567 0R2J-2-GP W61 VAXG54
1
1
Y48 VAXG55
R312 Y61
100R2F-L1-GP-U VAXG56 R51
D001R3D-L-GP
2
2
QUIET RAILS
AM28 VCCDQ
SENSE
LINES
VAXG_SENSE_CPU VCCDQ1
VSSAXG_SENSE_CPU
F45
G45
VAXG_SENSE VCCDQ2 AN26
VCCSA_SEL0 VCCSA_SEL1 VCCSA
SC1U10V2KX-1GP
VSSAXG_SENSE
1
C113
2 VCC1R8B 2
0 0.90V
Sandy Bridge LOW
2
1 0.80V
1.8V RAIL
BB3 VCCPLL1
BC1 VCCPLL2 0 0.725V
BC4
Ivy Bridge High
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCCPLL3
1 0.675V
1
C33 C204
BC43 PN6 PW RNC
2
L17 VCCSA1
L21 VCC1R05B_VTT
VCCSA2
N16 VCCSA3
N20 VCCSA4
N22
SA RAIL
VCCSA5
1
P17
P20
VCCSA6
U10
DY DY
VCCSA7 VCCSA_SENSE VCCSA_SENSE 90 R1713 R98
R16 VCCSA8
R18 10KR2J-3-GP 10KR2J-3-GP
VCCSA9
R21
2
VCCSA10
U15
VCCSA VID
VCCSA VCCSA11
V16 VCCSA12
V17 D48 VCCSA_VID0_CPU R1714 1 2 0R2J-2-GP
VCCSA13 VCCSA_VID0 VCCSA_SEL0 90
lines
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1
1
R1715 R101
C264 C262 C261 C258 C248 10KR2J-3-GP 10KR2J-3-GP Wistron Corporation
IVY-BRIDGE-GP-NF 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2
2
Title
CPU(6/8):Graphics Power
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 8 of 100
A B C D E
A B C D E
U58H 8 OF 9 U58I 9 OF 9
BG57,C3,E1,E61
VSS56 VSS146 VSS237 VSS_NCTF_1#A5
AH4 VSS57 VSS147 AY4 L16 VSS238 VSS_NCTF_2#A57 A57
AH58 VSS58 VSS148 AY41 L20 VSS239 VSS_NCTF_3#BC61 BC61
AJ13 VSS59 VSS149 AY45 L22 VSS240 VSS_NCTF_8#BG5 BG5
AJ16 VSS60 VSS150 AY49 L26 VSS241 VSS_NCTF_9#BG57 BG57
AJ20 VSS61 VSS151 AY55 L30 VSS242 VSS_NCTF_10#C3 C3
AJ22 VSS62 VSS152 AY58 L34 VSS243 VSS_NCTF_13#E1 E1
AJ26 VSS63 VSS153 AY9 L38 VSS244 VSS_NCTF_14#E61 E61
NCTF
2 AJ30 VSS64 VSS154 BA1 L43 VSS245 2
AJ34 VSS65 VSS155 BA11 L48 VSS246
AJ38 VSS66 VSS156 BA17 L61 VSS247 VSS_NCTF_4 BD3
AJ42 VSS67 VSS157 BA21 M11 VSS248 VSS_NCTF_5 BD59
AJ45 VSS68 VSS158 BA26 M15 VSS249 VSS_NCTF_6 BE4
AJ48 VSS69 VSS159 BA32 VSS_NCTF_7 BE58
AJ7 VSS70 VSS160 BA48 VSS_NCTF_11 C58
AK1 VSS71 VSS161 BA51 VSS_NCTF_12 D59
AK52 VSS72 VSS162 BB53
AL10 VSS73 VSS163 BC13
AL13 VSS74 VSS164 BC5
AL17 BC57 IVY-BRIDGE-GP-NF
VSS75 VSS165
AL21 VSS76 VSS166 BD12
AL25 VSS77 VSS167 BD16
AL28 VSS78 VSS168 BD19
AL33 VSS79 VSS169 BD23
AL36 VSS80 VSS170 BD27
AL40 VSS81 VSS171 BD32
AL43 VSS82 VSS172 BD36
AL47 VSS83 VSS173 BD40
AL61 VSS84 VSS174 BD44
AM13 VSS85 VSS175 BD48
AM20 VSS86 VSS176 BD52
AM22 VSS87 VSS177 BD56
AM26 VSS88 VSS178 BD8
AM30 VSS89 VSS179 BE5
AM34 VSS90 VSS180 BG13
1 1
IVY-BRIDGE-GP-NF <Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(7/8):GND
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
Custom -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 9 of 100
A B C D E
A B C D E
U58E 5 OF 9
4 4
H43
RESERVED
VCC_VAL_SENSE
K43 VSS_VAL_SENSE RSVD41 AH2
RSVD42 AG13
RSVD43 AM14
H45 VAXG_VAL_SENSE RSVD44 AM15
K45 VSSAXG_VAL_SENSE
3 N50 3
RSVD45
F48 VCC_DIE_SENSE
G48 RSVD47
H48 RSVD6
K48 RSVD7
A4 DC_TEST_A4 1 TPAD40-GP TP155
DC_TEST_A4 DC_TEST_C4
DC_TEST_C4 C4
BA19 RSVD8 DC_TEST_D3 D3
AV19 D1 DC_TEST_D1 1 TPAD40-GP TP156
RSVD9 DC_TEST_D1 DC_TEST_A58 TPAD40-GP TP157
AT21 RSVD10 DC_TEST_A58 A58 1
BB21 A59 DC_TEST_A59
RSVD11 DC_TEST_A59
BB19 RSVD12 DC_TEST_C59 C59
AY21 A61 DC_TEST_A61
RSVD13 DC_TEST_A61
BA22 RSVD14 DC_TEST_C61 C61
AY22 D61 DC_TEST_D61 1 TPAD40-GP TP158
RSVD15 DC_TEST_D61 DC_TEST_BD61 TPAD40-GP TP159
AU19 RSVD16 DC_TEST_BD61 BD61 1
AU21 BE61 DC_TEST_BE61
RSVD17 DC_TEST_BE61
BD21 RSVD18 DC_TEST_BE59 BE59
BD22 BG61 DC_TEST_BG61
RSVD19 DC_TEST_BG61
BD25 RSVD20 DC_TEST_BG59 BG59
BD26 BG58 DC_TEST_BG58 1 TPAD40-GP TP160
RSVD21 DC_TEST_BG58 DC_TEST_BG4 TPAD40-GP TP161
BG22 RSVD22 DC_TEST_BG4 BG4 1
BE22 BG3 DC_TEST_BG3
RSVD23 DC_TEST_BG3
BG26 RSVD24 DC_TEST_BE3 BE3
BE26 BG1 DC_TEST_BG1
RSVD25 DC_TEST_BG1
BF23 RSVD26 DC_TEST_BE1 BE1
BE24 BD1 DC_TEST_BD1 1 TPAD40-GP TP162
RSVD27 DC_TEST_BD1
2 2
IVY-BRIDGE-GP-NF
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(8/8):CFG/Reserved
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 10 of 100
A B C D E
5 4 3 2 1
1
1KR2J-1-GP
51R2J-2-GP
220R2J-L2-GP
220R2J-L2-GP
220R2J-L2-GP
1
1
R491 R475
R509 R515 R530
DY DY DY
2
D J8 J9 D
28 28
4 XDP_TCK 26 24 PCH_TCK 26
25 25
24 24
4 XDP_TMS 23 24 PCH_TMS 23
4 XDP_TDI 22 24 PCH_TDI 22
4 -XDP_TRST 21 21
4 XDP_TDO 20 24 PCH_TDO 20
19 19
4,26 -XDP_DBR 18 4,26 -XDP_DBR 18
4,28,56,60,68,71 -PLTRST_FAR R588 1 2 1KR2J-1-GP -PLTRST_FAR_XDP 17 17
16 16
25 -XDP_CLK_100M 15 15
14 R511 1 2 1KR2J-1-GP BPW RG_XDP_PCH 14
25 XDP_CLK_100M
26,32,61,62,70,72 BPW RG R954 1 2 0R2J-2-GP BPW RG_XDP 13
DY 13
10 CPU_CFG0 R477 1 2 1KR2J-1-GP CPU_CFG0_XDP 12 12
11 11
R594 1 2 1KR2J-1-GP CPUPW RGD_XDP 10 R514 1 2 1KR2J-1-GP -PLTRST_XDP_PCH 10
4,29 CPUPW RGD
9
26,32,72 MPW RG DY 9
8 8
7 7
6 6
5 5
4 4
3 3
1
2
51R2J-2-GP
2
100R2J-2-GP
100R2J-2-GP
100R2J-2-GP
4 -XDP_PRDY
DY DY
C 4 -XDP_PREQ 1
27
DYR943 DYR945 DYR946 R541 1
27 C
2
1
MLX-CON26-8-GP MLX-CON26-8-GP
R471
51R2J-2-GP MLX-52435-2671 MLX-52435-2671
2
XDP1 XDP2
ENABLE DISABLE ENABLE DISABLE
Logic
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
5 M_A_A[15..0] J21
4 M_A_A0 98 110 4
A0 RAS# -M_A_RAS 5
M_A_A1 97 113
A1 WE# -M_A_WE 5
M_A_A2 96 115
A2 CAS# -M_A_CAS 5
M_A_A3 95
M_A_A4 A3
92 114 -M_A_CS0 5
M_A_A5 A4 S0# VCC1R5A
91 121 -M_A_CS1 5
M_A_A6 A5 S1# DDR3_VREF_DQ_SA
90
M_A_A7 A6
86 73 M_A_CKE0 5
1
DDR3_VREF_CA M_A_A8 A7 CKE0
89 74 M_A_CKE1 5
M_A_A9 A8 CKE1 R1716
85
M_A_A10 A9 1KR2F-3-GP
107 101 M_A_DDRCLK0_800M 5
M_A_A11 A10/AP CK0
84 103 -M_A_DDRCLK0_800M 5
M_A_A12 A11 CK0#
83
2
M_A_A13 A12/BC# R1717 1
119 102 M_A_DDRCLK1_800M 5 2 0R2J-2-GP
M_A_A14 A13 CK1
80 104 -M_A_DDRCLK1_800M 5
1
M_A_A15 A14 CK1#
78
SC2D2U6D3V3MX-1-GP
A15 R1718
79 11
SCD1U10V2KX-4GP
DM1
5 M_A_BS0 109 46
C342 C345 BA0 DM2
5 M_A_BS1 108 63
2
BA1 DM3
136
2
M_A_DQ0 DM4
5 153
5 M_A_DQ[63..0] M_A_DQ1 7
DQ0 DM5
170
DY
M_A_DQ2 DQ1 DM6 R1719 1
15 187 8 DDR3_VREF_SA_M3 2 0R2J-2-GP
M_A_DQ3 DQ2 DM7 VCC3B
17
M_A_DQ4 DQ3
4
M_A_DQ5 DQ4
6 200 SMB_DATA_3B 13,64,70
M_A_DQ6 DQ5 SDA
16 202 SMB_CLK_3B 13,64,70
M_A_DQ7 DQ6 SCL
18
M_A_DQ8 DQ7
21 199
S
M_A_DQ9 DQ8 VDDSPD
Place caps near Slot-A (J21) pin 126 23
1
M_A_DQ10 DQ9
33 197
M_A_DQ11 DQ10 SA0 C1671 C908
35 201
M_A_DQ12 DQ11 SA1 SC2D2U10V3KX-1GP SCD1U10V2KX-4GP Q152
22 G
2
DQ12 4,28 DRAMRST_GATE
M_A_DQ13 24 198
M_A_DQ14 DQ13 EVENT#
34 30 -DRAMRST 4,13
M_A_DQ15 DQ14 RESET# VCC1R5A LSK3541G1ET2L-GP
36 125
D
M_A_DQ16 DQ15 TEST
39
M_A_DQ17 DQ16
41
M_A_DQ18 DQ17
51
M_A_DQ19 DQ18
53 75
M_A_DQ20 DQ19 VDD
3 40 76 3
M_A_DQ21 DQ20 VDD VCC1R5A
42 81
M_A_DQ22 DQ21 VDD
50 82
M_A_DQ23 DQ22 VDD
52 87
1
M_A_DQ24 DQ23 VDD DDR3_VREF_DQ_SB
57 88
M_A_DQ25 DQ24 VDD VCC1R5A R1720
59 93
M_A_DQ26 DQ25 VDD 1KR2F-3-GP
67 94
DQ26 VDD
REVERSE TYPE
M_A_DQ27 69 99
M_A_DQ28 DQ27 VDD
56 100
2
M_A_DQ29 DQ28 VDD R1721 1
58 105 2 0R2J-2-GP
M_A_DQ30 DQ29 VDD
68 106
1
M_A_DQ31 DQ30 VDD
70 111
M_A_DQ32 DQ31 VDD R1722
129 112
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
M_A_DQ33 DQ32 VDD 1KR2F-3-GP
131 117
1
M_A_DQ34 DQ33 VDD C349 C350 C64 C74 C86 C1672 C1673 C1674 C1675 C1676 C1677
141 118
M_A_DQ35 DQ34 VDD
143 123
2
M_A_DQ36 DQ35 VDD
130 124
2
M_A_DQ37 DQ36 VDD
132
M_A_DQ38 DQ37
140 3
M_A_DQ39 142
DQ38 VSS
8
DY
M_A_DQ40 DQ39 VSS R1723 1
147 9 8 DDR3_VREF_SB_M3 2 0R2J-2-GP
M_A_DQ41 DQ40 VSS
149 13
M_A_DQ42 DQ41 VSS
157 14
M_A_DQ43 DQ42 VSS
159 19 Place one cap to each power pin and as close as possible
M_A_DQ44 DQ43 VSS
146 20
M_A_DQ45 DQ44 VSS
148 25
S
M_A_DQ46 DQ45 VSS
158 26
M_A_DQ47 DQ46 VSS
160 31
M_A_DQ48 DQ47 VSS
163 32
M_A_DQ49 DQ48 VSS Q153
165 37 G
M_A_DQ50 DQ49 VSS
175 38
M_A_DQ51 DQ50 VSS VCC1R5A
177 43
M_A_DQ52 DQ51 VSS LSK3541G1ET2L-GP
164 44
D
M_A_DQ53 DQ52 VSS
166 48
M_A_DQ54 DQ53 VSS
174 49
M_A_DQ55 DQ54 VSS
176 54
M_A_DQ56 DQ55 VSS
181 55
M_A_DQ57 DQ56 VSS
183 60
M_A_DQ58 DQ57 VSS
191 61
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
M_A_DQ59 DQ58 VSS
193 65
1
1
M_A_DQ60 DQ59 VSS C47 C462 C1687 C1688 C1689 C486 C482 C1690 C1691
180 66
2 M_A_DQ61 DQ60 VSS 2
182 71
M_A_DQ62 DQ61 VSS
192 72
2
2
M_A_DQ63 DQ62 VSS
194 127
DQ63 VSS
128
-M_A_DQS0 VSS
5 -M_A_DQS[7..0] 10 133
-M_A_DQS1 DQS0# VSS
27 134
-M_A_DQS2 DQS1# VSS
45 138
-M_A_DQS3 DQS2# VSS
62 139
-M_A_DQS4 DQS3# VSS
135 144
-M_A_DQS5 DQS4# VSS
152 145
-M_A_DQS6 DQS5# VSS
169 150
-M_A_DQS7 DQS6# VSS
186 151
DDR3_VREF_DQ_SA DQS7# VSS
155
M_A_DQS0 VSS
5 M_A_DQS[7..0] 12 156
M_A_DQS1 DQS0 VSS
29 161
M_A_DQS2 DQS1 VSS VCC0R75B
47 162
M_A_DQS3 DQS2 VSS
64 167
M_A_DQS4 DQS3 VSS
137 168
M_A_DQS5 DQS4 VSS
154 172
M_A_DQS6 DQS5 VSS
171 173
SC2D2U6D3V3MX-1-GP
VSS
116 184
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1
VSS C18 C31 C38 C1678 C455 C463 C457
1 190
VREFDQ VSS
126 195
VREFCA VSS
2 196
2
2
VSS VSS
77 203
DDR3_VREF_CA NC VTT
122 204
NC VTT
206 205
GND GND
207 208
NP1 NP2
1 1
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HTTPS://REALSCHEMATIC.COM Size
DDR3 SODIMM-A
Document Number Rev
A2 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 12 of 100
A B C D E
A B C D E
6 M_B_A[15..0]
J30
M_B_A0 98 110 -M_B_RAS 6
M_B_A1 A0 RAS#
97 A1 WE# 113 -M_B_WE 6
M_B_A2 96 115
A2 CAS# -M_B_CAS 6
M_B_A3 95
M_B_A4 A3
92 A4 S0# 114 -M_B_CS0 6
M_B_A5 91 121 -M_B_CS1 6
M_B_A6 A5 S1#
90 A6
M_B_A7 86 73
A7 CKE0 M_B_CKE0 6
M_B_A8 89 74
A8 CKE1 M_B_CKE1 6
M_B_A9 85
M_B_A10 A9
107 101 M_B_DDRCLK0_800M 6
4 M_B_A11 A10/AP CK0 4
84 103 -M_B_DDRCLK0_800M 6
M_B_A12 A11 CK0#
83
M_B_A13 A12/BC#
119 102 M_B_DDRCLK1_800M 6
M_B_A14 A13 CK1
80 104 -M_B_DDRCLK1_800M 6
M_B_A15 A14 CK1#
78
A15
6 M_B_BS2 79 11
BA2 DM0
28
DM1
6 M_B_BS0 109 46
BA0 DM2
6 M_B_BS1 108 63
BA1 DM3
6 M_B_DQ[63..0] 136
M_B_DQ0 DM4
5 153
M_B_DQ1 DQ0 DM5
7 DQ1 DM6 170
M_B_DQ2 15 187
M_B_DQ3 DQ2 DM7
17 DQ3
M_B_DQ4 4 VCC3B
M_B_DQ5 DQ4
6 DQ5 SDA 200 SMB_DATA_3B 12,64,70
M_B_DQ6 16 202
DQ6 SCL SMB_CLK_3B 12,64,70
M_B_DQ7 18
M_B_DQ8 DQ7
21 DQ8 VDDSPD 199
M_B_DQ9 23 DQ9
1
DDR3_VREF_DQ_SB M_B_DQ10 33 197 R187 1 2 10KR2J-3-GP
M_B_DQ11 DQ10 SA0 C910 C1679
35 DQ11 SA1 201
M_B_DQ12 22 SC2D2U10V3KX-1GP SCD1U10V2KX-4GP
2
M_B_DQ13 DQ12
24 DQ13 EVENT# 198
M_B_DQ14 34 30 VCC1R5A
M_B_DQ15 DQ14 RESET# -DRAMRST 4,12
36 DQ15 TEST 125
M_B_DQ16 39 DQ16
SC2D2U6D3V3MX-1-GP
M_B_DQ17 41
M_B_DQ18 DQ17
51 DQ18
1
REVERSE TYPE
3 SC2D2U6D3V3MX-1-GP M_B_DQ22 DQ21 VDD VCC1R5A 3
50 DQ22 VDD 82
M_B_DQ23 52 87
M_B_DQ24 DQ23 VDD
57 DQ24 VDD 88
M_B_DQ25 59 93
M_B_DQ26 DQ25 VDD
67 DQ26 VDD 94
M_B_DQ27 69 99
M_B_DQ28 DQ27 VDD
56 DQ28 VDD 100
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
Place caps near Slot-B (J30) pin 1 M_B_DQ29 58 105
M_B_DQ30 DQ29 VDD
68 106
DQ30 VDD
1
M_B_DQ31 70 111 C353 C352 C145 C147 C151 C1680 C109 C115 C1681 C1682 C1683
M_B_DQ32 DQ31 VDD
129 112
M_B_DQ33 DQ32 VDD
131 117
2
M_B_DQ34 DQ33 VDD
141 118
M_B_DQ35 DQ34 VDD
143 123
M_B_DQ36 DQ35 VDD
130 124
M_B_DQ37 DQ36 VDD
132
M_B_DQ38 DQ37
140 3
M_B_DQ39 DQ38 VSS
142 8
M_B_DQ40 DQ39 VSS
M_B_DQ41
147
DQ40 VSS
9 Place one cap to each power pin and as close as possible
149 13
M_B_DQ42 DQ41 VSS
157 14
M_B_DQ43 DQ42 VSS
159 19
M_B_DQ44 DQ43 VSS
146 20
M_B_DQ45 DQ44 VSS VCC1R5A
148 25
M_B_DQ46 DQ45 VSS
158 26
M_B_DQ47 DQ46 VSS
160 31
M_B_DQ48 DQ47 VSS
163 32
M_B_DQ49 DQ48 VSS
165 37
M_B_DQ50 DQ49 VSS
175 38
M_B_DQ51 DQ50 VSS
177 43
DQ51 VSS
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
M_B_DQ52 164 44
M_B_DQ53 DQ52 VSS
166 48
DQ53 VSS
1
2 M_B_DQ54 C1692 C481 C1693 C1694 C497 C503 C1695 C1696 C1697 2
174 49
M_B_DQ55 DQ54 VSS
176 54
M_B_DQ56 DQ55 VSS
181 55
2
M_B_DQ57 DQ56 VSS
183 60
M_B_DQ58 DQ57 VSS
191 61
M_B_DQ59 DQ58 VSS
193 65
M_B_DQ60 DQ59 VSS
180 66
M_B_DQ61 DQ60 VSS
182 71
M_B_DQ62 DQ61 VSS
192 72
M_B_DQ63 DQ62 VSS
6 -M_B_DQS[7..0] 194 127
DQ63 VSS VCC0R75B
128
-M_B_DQS0 VSS
10 133
-M_B_DQS1 DQS0# VSS
27 134
-M_B_DQS2 DQS1# VSS
45 138
-M_B_DQS3 DQS2# VSS
62 139
-M_B_DQS4 DQS3# VSS
135 144
-M_B_DQS5 DQS4# VSS
152 145
DQS5# VSS
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
-M_B_DQS6 169 150
-M_B_DQS7 DQS6# VSS
186 151
6 M_B_DQS[7..0] DQS7# VSS
155
DY
VSS
1
1
M_B_DQS0 12 156 C1685 C37 C39 C1686 C456 C1684 C465
M_B_DQS1 DQS0 VSS
29 161
M_B_DQS2 DQS1 VSS
47 162
2
2
M_B_DQS3 DQS2 VSS
64 167
M_B_DQS4 DQS3 VSS
137 168
M_B_DQS5 DQS4 VSS
154 172
DDR3_VREF_CA DDR3_VREF_DQ_SB M_B_DQS6 DQS5 VSS
171 173
M_B_DQS7 DQS6 VSS
188 178
DQS7 VSS
179
VSS
6 M_B_ODT0 116 184
ODT0 VSS
6 M_B_ODT1 120 185
ODT1 VSS
VSS 189
1 1
1 VREFDQ VSS 190
SC2D2U6D3V3MX-1-GP
SCD1U10V2KX-4GP
DDR3-204P-94-GP-U2 Title
HTTPS://REALSCHEMATIC.COM
SKT DDR3 204P 2-1932300-1
DDR3 SODIMM-B
Size Document Number Rev
Custom -1
Place caps near Slot-B (J30) pin 126 SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 13 of 100
A B C D E
5 4 3 2 1
D D
C C
BLANK
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HTTPS://REALSCHEMATIC.COM BLANK
Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 14 of 100
5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HTTPS://REALSCHEMATIC.COM BLANK
Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 15 of 100
5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HTTPS://REALSCHEMATIC.COM BLANK
Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 16 of 100
5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HTTPS://REALSCHEMATIC.COM BLANK
Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Monday, September 17, 2012 Sheet 17 of 100
5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HTTPS://REALSCHEMATIC.COM BLANK
Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 18 of 100
5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HTTPS://REALSCHEMATIC.COM BLANK
Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 19 of 100
5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HTTPS://REALSCHEMATIC.COM BLANK
Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 20 of 100
5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HTTPS://REALSCHEMATIC.COM BLANK
Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 21 of 100
5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HTTPS://REALSCHEMATIC.COM BLANK
Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 22 of 100
5 4 3 2 1
A B C D E
4 4
3 3
BLANK
2 2
<Core Design>
1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BLANK
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 23 of 100
A B C D E
A B C D E
4 4
TABLE
AMT YES NO NO
J12 RTCVCC VCC3B RPAT YES YES NO
3
1
TABLE U5 QM77 HM77 HM75
2 1 TPAD14-OP-GPTP911
4 C205 SPKR TCO TIMER SYSTEM REBOOT
RTCVCC_RTCCONN
1 2 PCH_32.768K_RTCX1 VCC3SW
HIGH DISABLED(NO REBOOT)
ACES-CON2-14-GP SC10P50V2JN-4GP DY
LOGIC
330KR2J-L1-GP
1
1
RTCVCC
LOW ENABLED
XTAL-32D768KHZ-15-GP
VCC3SW
1KR2J-1-GP
1
Y6 R408 R478 R646
1
DST310S 1MR2J-1-GP
10MR2J-L-GP
9P
2
R351
RB520SM-30T2R-GP
20PPM
PCH_-INTRUDER
D6
1
LPC_AD[3..0] 58,60,68
2
R4 U5A 1 OF 10
1KR2J-1-GP C326
1 2 A20 C38 LPC_AD0_PCH R840 1 2 22R2J-2-GP LPC_AD0
K
RTCX1 FWH0/LAD0 LPC_AD1_PCH R841 22R2J-2-GP LPC_AD1
A38 1 2
2
FWH1/LAD1 VCC3B
LPC
SC10P50V2JN-4GP PCH_32.768K_RTCX2 C20 B37 LPC_AD2_PCH R842 1 2 22R2J-2-GP LPC_AD2
D3 RTCX2 FWH2/LAD2 LPC_AD3_PCH R843 22R2J-2-GP LPC_AD3
C37 1 2
RTCVCC_RTCCONN_R R87 -RTC_RST FWH3/LAD3
A K 1 2 20KR2J-L2-GP D20
1
RTCRST# R146 1
D36 2 22R2J-2-GP -LPC_FRAME 58,60,68
R89 -SRTCRST FWH4/LFRAME#
1 2 20KR2J-L2-GP G22
RB520SM-30T2R-GP SRTCRST# R61
E36 -LPC_DREQ0 58
1
LDRQ0#
RTC
C287 C328 C285 K22 K36 8K2R2J-3-GP
1
2
PCH_INVRMEN
DYR8566 DO NOT CHANGE C17 V5
2
IRQSER 58,60,68
1
20MR2J-GP SC33P50V2JN-3GP INTVRMEN SERIRQ
THESE PARTS RFC1
DY AM3
2
2
SATA0RXN SATA0_RXN 40
R60 1 2 33R2J-2-GP HDA_BCLK_R N34 AM1
G
SATA 6G
AP7
R133 1 HDA_SYNC_R SATA0TXN SATA0_TXN 40
2 33R2J-2-GP L34 AP5
43 HDA_SYNC HDA_SYNC SATA0TXP SATA0_TXP 40
S D T10 AM10 SATA1_RXN_C C1670 1 2 SCD01U16V2KX-3GP
-RTC_DETECT 28 48 PCH_SPKR SPKR SATA1RXN SATA1_RXN 41
SATA1_RXP_C C246 1 SCD01U16V2KX-3GP
DY Q176 R83 1 2 33R2J-2-GP -HDA_RST_R K34
SATA1RXP
AM8
AP11 SATA1_TXN_C C572 1
2
2 SCD01U16V2KX-3GP
SATA1_RXP 41
43 -HDA_RST HDA_RST# SATA1TXN SATA1_TXP_C C245 1 SCD01U16V2KX-3GP SATA1_TXN 41
2N7002BK-GP AP10 2
SATA1TXP SATA1_TXP 41
E34 AD7 SATA2_RXN_C C732 1 2 SCD01U16V2KX-3GP
43 HDA_SDIN0 HDA_SDIN0 SATA2RXN SATA2_RXN 53
AD5 SATA2_RXP_C C743 1 2 SCD01U16V2KX-3GP
SATA2RXP SATA2_TXN_C SATA2_RXP 53
VCC3M G34 AH5 C744 1 2 SCD01U16V2KX-3GP
HDA_SDIN1 SATA2TXN SATA2_TXP_C C747 SCD01U16V2KX-3GP SATA2_TXN 53
R247 AH4 1 2
SATA2TXP SATA2_TXP 53
C34
HDA_SDIN2
IHDA
1 2 AB8
SATA3RXN
A34 AB10
1KR2J-1-GP HDA_SDIN3 SATA3RXP
AF3
R74 SATA3TXN
AF1
HDA_SDO_R SATA3TXP
1 2 A36
43 HDA_SDO HDA_SDO
SATA
Y7 SATA4_RXN 59
33R2J-2-GP SATA4RXN
Y5 SATA4_RXP 59
SATA4RXP SATA4_TXN_C C893 1
C36 AD3 2 SCD01U25V2KX-3GP
29 SATA_DOCK_DTCT HDA_DOCK_EN#/GPIO33 SATA4TXN SATA4_TXP_C C892 1 SATA4_TXN 59
AD1 2 SCD01U25V2KX-3GP
SATA4TXP SATA4_TXP 59
60 -EC_WAKE N32
VCC3M HDA_DOCK_RST#/GPIO13
Place on Top side SATA5RXN
Y3
SATA5RXP
Y1 SATA0: To HDD Bay
AB3
R479 R81 J3
SATA5TXN
AB1 SATA1: To ODD Bay
11 PCH_TCK JTAG_TCK SATA5TXP
1 2 1
DY 2
VCC1R05B
SATA2: Reserved(mSATA)
H7 Y11 R116
11 PCH_TMS JTAG_TMS SATAICOMPO SATA3: Reserved
JTAG
1KR2J-1-GP 0R2J-2-GP 37D4R2F-GP
K5 Y10 SATA_ICOMP 1 2 SATA4: To Docking Connector
11 PCH_TDI JTAG_TDI SATAICOMPI VCC3B
H1 SATA5: Reserved
11 PCH_TDO JTAG_TDO R58
AB12
SATA3RCOMPO 49D9R2F-GP
2 1 1 AB13 SATA_3COMP 1 2 2
1
SATA3COMPI
TP907 TP900 R71 VCC3B
TPAD14-OP-GP TPAD14-OP-GP T3 AH1 SATA3RBIAS_PCH 1 2 R99
58 SPI_CLK SPI_CLK SATA3RBIAS 100KR2J-1-GP
1
Place on TOP side Y14 750R2F-GP
2
58 -SPI_CS0 SPI_CS0#
Do NOT move after fix T1 R106
SPI_CS1#
SPI
P3 -DASPHDD 71 10KR2J-3-GP
SATALED#
2
V4 V14 -DISCRETE_PRESENCE
58 SPI_MOSI SPI_MOSI SATA0GP/GPIO21
58 SPI_MISO U3 P1 SATA_BAY_DTCT 29
SPI_MISO SATA1GP/GPIO19
PANTHER-GP-NF
1 1
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH(1/9):HDA/JTAG/SPI/SATA
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A2 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 24 of 100
A B C D E
A B C D E
VCC3M
1
10KR2J-3-GP
10KR2J-3-GP
2K2R2J-2-GP
2K2R2J-2-GP
10KR2J-3-GP
4K7R2J-2-GP
4K7R2J-2-GP
10KR2J-3-GP
4 R68 R359 R502 R23 R389 R394 R27 DYR272 R209 4
10KR2J-3-GP
U5B 2 OF 10
2
BG34 PERN1
BJ34 E12 -SMBALERT
PERP1 SMBALERT#/GPIO11
AV32 PETN1
AU32 PETP1 SMBCLK H14 SMB_CLK 70
SMBUS
A12 -SML0ALERT
SML0ALERT#/GPIO60
56 PCIE_EXC_RXN BG36 PERN3
Express Card Slot 56 PCIE_EXC_RXP
C61 1 2 SCD1U10V2KX-4GP PCIE_EXC_TXN_C
BJ36
AV34
PERP3 SML0CLK C8 SML0_CLK 49
56 PCIE_EXC_TXN C828 1 PETN3
56 PCIE_EXC_TXP 2 SCD1U10V2KX-4GP PCIE_EXC_TXP_C AU34 PETP3 SML0DATA G12 SML0_DATA 49
PCI-E*
BG37 PERN5
BH37 PERP5 SML1DATA/GPIO75 M16 EC_SDA2 62
AY36 PETN5
BB36 PETP5
BJ38 PERN6
BG38 PERP6
Controller
AU36 PETN6 CL_CLK1 M7 CL_CLK_WLAN 53
3 3
Thunderbolt AV36 PETP6
Link
Cactus Ridge BG40
BJ40
PERN7 CL_DATA1 T11 CL_DATA_WLAN 53
PERP7
AY40 PETN7
BB40 PETP7 CL_RST1# P10 -CL_RST_WLAN 53
BE38 PERN8
BC38 PERP8
AW38 PETN8
AY38 PETP8
CLOCKS
1 J2 PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P AB38
AB49 AV22
Wireless LAN 53 -PCIE_CLK_WLAN
AB47
CLKOUT_PCIE1N CLKOUT_DMI_N
AU22
-CPU_CLK_100M 4
53 PCIE_CLK_WLAN CLKOUT_PCIE1P CLKOUT_DMI_P CPU_CLK_100M 4
MiniCard Slot M1
53 -CLKREQ_WLAN PCIECLKRQ1#/GPIO18
CLKOUT_DP_N AM12
CLKOUT_DP_P AM13
56 -PCIE_CLK_EXC AA48 CLKOUT_PCIE2N
Express Card Slot 56 PCIE_CLK_EXC AA47 CLKOUT_PCIE2P
BF18 CLKIN_DMI_N_PCH R103 1 2 10KR2J-3-GP
CLKIN_DMI_N CLKIN_DMI_P_PCH R8553
56 -CLKREQ_EXC V10 PCIECLKRQ2#/GPIO20 CLKIN_DMI_P BE18 1 2 10KR2J-3-GP
3
Y47 R118 1 2 90D9R2F-1-GP H.ELE 25M
XCLK_RCOMP R156
V40 CLKOUT_PCIE6N 12P 20PPM
V42 VCC3B 1MR2J-1-GP
CLKOUT_PCIE6P HSX321G
R91 1 2 10KR2J-3-GP GPIO45_PCH T13
2
PCIECLKRQ6#/GPIO45
2
V38 K43 R1725 1 2 4K7R2F-GP Y5
FLEX CLOCKS
HTTPS://REALSCHEMATIC.COM
A B C D E
U5C 3 OF 10
3 DMI_RXN[3..0] FDI_TXN[7..0] 3
DMI_RXN0 BC24 BJ14 FDI_TXN0
DMI_RXN1 DMI0RXN FDI_RXN0 FDI_TXN1
BE20 DMI1RXN FDI_RXN1 AY14
DMI_RXN2 BG18 BE14 FDI_TXN2
DMI_RXN3 DMI2RXN FDI_RXN2 FDI_TXN3
3 DMI_RXP[3..0] BG20 DMI3RXN FDI_RXN3 BH13
BC12 FDI_TXN4
DMI_RXP0 FDI_RXN4 FDI_TXN5
BE24 DMI0RXP FDI_RXN5 BJ12
DMI_RXP1 BC20 BG10 FDI_TXN6
DMI_RXP2 DMI1RXP FDI_RXN6 FDI_TXN7
4 BJ18 DMI2RXP FDI_RXN7 BG9 FDI_TXP[7..0] 3 4
DMI_RXP3 BJ20
3 DMI_TXN[3..0] DMI3RXP FDI_TXP0
FDI_RXP0 BG14
DMI_TXN0 AW24 BB14 FDI_TXP1
DMI_TXN1 DMI0TXN FDI_RXP1 FDI_TXP2
AW20 DMI1TXN FDI_RXP2 BF14
DMI_TXN2 BB18 BG13 FDI_TXP3
DMI_TXN3 DMI2TXN FDI_RXP3 FDI_TXP4
3 DMI_TXP[3..0] AV18 DMI3TXN FDI_RXP4 BE12
DMI
FDI
BG12 FDI_TXP5
DMI_TXP0 FDI_RXP5 FDI_TXP6
AY24 DMI0TXP FDI_RXP6 BJ10
DMI_TXP1 AY20 BH9 FDI_TXP7
VCC1R05B DMI_TXP2 DMI1TXP FDI_RXP7
AY18 DMI2TXP
DMI_TXP3 AU18 RTCVCC VCC3M VCC3B
DMI3TXP
FDI_INT AW16 FDI_INT 3
R52
1 2 49D9R2F-GP PCH_DMI_COMP BJ24 DMI_ZCOMP FDI_FSYNC0 AV12 FDI_FSYNC0 3
VCC3M
BG25 BC10
330KR2J-L1-GP
R109 DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 3
1
1KR2J-1-GP
DY
10KR2J-3-GP
8K2R2J-3-GP
1 2DMI2RBIAS_PCH BH21 DMI2RBIAS FDI_LSYNC0 AV14 FDI_LSYNC0 3 R409 R481 R164 R28
750R2F-GP BB10
FDI_LSYNC1 FDI_LSYNC1 3
1
1
8K2R2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
2
R110 R115 R486
DSWVRMEN A18 DSW VRMEN_PCH
2
PANTHER-GP-NF
1
DY
R413
330KR2J-L1-GP
2
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH(3/9):DMI/FDI/PM
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 26 of 100
A B C D E
A B C D E
VCC3B
1
2K2R2J-2-GP
2K2R2J-2-GP
R536 R687
U5D 4 OF 10
2
71 VGA_BLON J47 L_BKLTEN SDVO_TVCLKINN AP43
72 PANEL_POW ER_ON M45 L_VDD_EN SDVO_TVCLKINP AP45
4
34 PANEL_BKLT_CTRL P45 L_BKLTCTL SDVO_STALLN AM42 4
SDVO_STALLP AM40
34 SPW G_EDID_CLK T40 L_DDC_CLK
34 SPW G_EDID_DATA K47 L_DDC_DATA SDVO_INTN AP39
SDVO_INTP AP40
1
T45
100KR2J-1-GP
100KR2J-1-GP
L_CTRL_CLK
R119 P39 L_CTRL_DATA
R138 R433
1 2 LIBG AF37 P38
LVD_IBG SDVO_CTRLCLK SYSTEM_DP_DDC_CTRLCLK 37
AF36 M39 SYSTEM_DP_DDC_DATA 37
2
2K37R2F-GP LVD_VBG SDVO_CTRLDATA
AE48 LVD_VREFH
AE47 LVD_VREFL DDPB_AUXN AT49 DPB_AUXN 38
DDPB_AUXP AT47 DPB_AUXP 38
DDPB_HPD AT40 DDPB_HPD_PCH R1729 1 2 0R2-PT5-LILY-GP
DPB_HPD 37
34 TXCLK_LN AK39 LVDSA_CLK#
LVDS
34 TXCLK_LP AK40 LVDSA_CLK DDPB_0N AV42 DPB_0N 38
DDPB_0P AV40 DPB_0P 38
34 TXOUT_L0N AN48 LVDSA_DATA#0 DDPB_1N AV45 DPB_1N 38
34 TXOUT_L1N AM47 LVDSA_DATA#1 DDPB_1P AV46 DPB_1P 38
CRT
T39 AT43 DOCKB_DDPD_AUXP C1806 1 2 SCD1U10V2KX-5-GP
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
2
1
4K7R2J-2-GP
R35 R34
100KR2J-1-GP
100KR2J-1-GP
2
1
2
35 DDCCLK
35 DDCDATA
35 HSYNC
1 35 VSYNC <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH(4/9):LVDS/CRT/DDI
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 27 of 100
A B C D E
A B C D E
U5E 5 OF 10
RSVD1 AY7
AV7
BG26
RSVD2
AU3
USB Port Figure(Top View)
TP1 RSVD3
BJ26 TP2 RSVD4 BG4
BH25 TP3
BJ16 AT10
BG16
TP4 RSVD5
BC8
FAN
TP5 RSVD6
VCC3B
AH38 TP6 USB Port9 USB Port0
AH37 TP7 RSVD7 AU2
AK43 TP8 RSVD8 AT4
4 AK45 TP9 RSVD9 AT3 4
C18 TP10 RSVD10 AT1 USB Port1
N30 TP11 RSVD11 AY3
H3 AT5
AH12
TP12 RSVD12
AV3
Left Right
R419 R427 R432 R438 R465 R550 R545 TP13 RSVD13
AM4 TP14 RSVD14 AV1
1
1
AM5 BB1
8K2R2J-3-GP
8K2R2J-3-GP
8K2R2J-3-GP
8K2R2J-3-GP
8K2R2J-3-GP
8K2R2J-3-GP
8K2R2J-3-GP
TP15 RSVD15
Y13 TP16 RSVD16 BA3
K24 BB5
DY DY L24
TP17 RSVD17
BB3
TP18 RSVD18
AB46 BB7
2
2
TP19 RSVD19
AB45 BE8
TP20 RSVD20 Front
RSVD
RSVD21 BD4
R425 R430 R435 R464 R476 R546 R542 BF6
RSVD22
1
1
8K2R2J-3-GP
8K2R2J-3-GP
8K2R2J-3-GP
8K2R2J-3-GP
8K2R2J-3-GP
8K2R2J-3-GP
8K2R2J-3-GP
B21 TP21 RSVD23 AV5
M20 AV10
DY AY16
TP22 RSVD24
BG46
TP23
AT8
SN4
2
2
TP24 RSVD25
AY5
USB0 : USB 3.0 SYSTEM PORT 0 (Back side)
RSVD26
BE28
RSVD27 BA2 USB1 : USB 3.0 SYSTEM PORT 1 (Left side)
42 USB3P0_RXN USB3RN1
42 USB3P1_RXN BC30
BE32
USB3RN2 RSVD28 AT12
BF3
USB2 : USB 3.0 Docking
59 USB3P2_RXN USB3RN3 RSVD29
BJ32 USB3RN4 USB3 : FULL MINICARD (WWAN)
42 USB3P0_RXP BC28 USB3RP1
42 USB3P1_RXP BE30 USB3RP2 USB4 : USB 2.0 DOCKING
59 USB3P2_RXP BF32 USB3RP3
3 BG32 USB3RP4 USBP0N C24 USBP0- 42 USB5 : EXPRESS CARD SLOT 3
AV26 A24
42 USB3P0_TXN
42 USB3P1_TXN BB26
USB3TN1
USB3TN2
USBP0P
USBP1N C25
USBP0+
USBP1-
42
42
USB6 : RESERVED
AU28 B25
59 USB3P2_TXN
AY30
USB3TN3
USB3TN4
USBP1P
USBP2N C26
USBP1+
USBP2-
42
59
USB7 : RESERVED
AU26 A26
42 USB3P0_TXP
42 USB3P1_TXP AY26
USB3TP1
USB3TP2
USBP2P
USBP3N K28
USBP2+
USBP3-
59
53
USB8 : SMART CARD SLOT
AV28 H28
59 USB3P2_TXP
AW30
USB3TP3 USBP3P
E28
USBP3+
USBP4-
53
59
USB9 : USB 2.0 SYSTEM PORT (AOU)
USB3TP4 USBP4N
USBP4P D28 USBP4+ 59 USB10: FPR (TOUCH PAD)
PIRQD_PCH
PIRQC_PCH
PIRQB_PCH
PCI
H38 PIRQC# USBP8N L30 USBP8- 56
G38 PIRQD# USBP8P K30 USBP8+ 56
USBP9N G30 USBP9- 42
56 -SC_DTCT C46 REQ1#/GPIO50 USBP9P E30 USBP9+ 42 VCC3M
USB
C44 REQ2#/GPIO52 USBP10N C30 USBP10- 64
42 -BDC_PRESENCE E40 REQ3#/GPIO54 USBP10P A30 USBP10+ 64
USBP11N L32 USBP11- 42
GNT1_PCH D47 K32
GNT1#/GPIO51 USBP11P USBP11+ 42
GNT2_PCH E42 G32
GNT2#/GPIO53 USBP12N USBP12- 53
GNT3_PCH F46 E32
GNT3#/GPIO55 USBP12P USBP12+ 53
1
C32 R88 R121 R254 R260 R96 R266 R262 R261
USBP13N USBP13- 73
USBP13P A32 USBP13+ 73
34 -LCD_PRESENCE G42 PIRQE#/GPIO2
2 PIRQF_PCH R564 2
G40 PIRQF#/GPIO3
PIRQG_PCH C42 C33 USBRBIAS 1 2
2
PIRQG#/GPIO4 USBRBIAS#
D44
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
24 -RTC_DETECT PIRQH#/GPIO5 22D6R2F-L1-GP
USBRBIAS B33
K10 PME#
PME# is INTEGRATED PULL UP
C6 PLTRST# OC0#/GPIO59 A14 -USB_PORT0_OC0 42
OC1#/GPIO40 K20 -USB_PORT1_OC1 42
OC2#/GPIO41 B17
R114 1 2 22R2J-2-GP LPCCLK_CRYPT_33M_R H49 C16
68 LPCCLK_CRYPT_33M CLKOUT_PCI0 OC3#/GPIO42 -USB_PORT2_OC3 59
R220 1 2 0R2J-2-GP LPCCLK_DEBUG_33M_R H43 L16
58 LPCCLK_DEBUG_33M R122 1
DY 2 22R2J-2-GP LPCCLK_EC_33M_R J48
CLKOUT_PCI1 OC4#/GPIO43
A16
SMB_3B_EN 70
60 LPCCLK_EC_33M CLKOUT_PCI2 OC5#/GPIO9 -USB_PORT9_OC5 42
R124 1 2 22R2J-2-GP PCICLK_FB_33M_R K42 D14
25 PCICLK_FB_33M CLKOUT_PCI3 OC6#/GPIO10 DRAMRST_GATE 4,12
H40 CLKOUT_PCI4 OC7#/GPIO14 C14
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1
-PLTRST_PCH
R991
1 2 VCC3M
32,49,53,58,70 -PLTRST_NEAR
1 33R2J-2-GP U73 <Core Design> 1
5 VCC NC#1 1
R993
4,11,56,60,68,71 -PLTRST_FAR 1 2 4 OUT_Y
IN_A
GND
2
3 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
33R2J-2-GP Taipei Hsien 221, Taiwan, R.O.C.
SC100P50V2JN-3GP
TC7SG17FE-GP
Title
PCH(5/8) :PCI/USB/NVM
1
C525 C460
HTTPS://REALSCHEMATIC.COM SC100P50V2JN-3GP
Size Document Number Rev
2
A3 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 28 of 100
A B C D E
A B C D E
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
GPIO15 ME CRYPTO STRAP
1
10KR2J-3-GP
4 4
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
1
1
1KR2J-1-GP
DYR54
2
R56 R40 R38
LOW NO CONFIDENTIALITY
2
U5F 6 OF 10
-TBT_CABLE_DTCT T7 C40
BMBUSY#/GPIO0 TACH4/GPIO68 -INT_MIC_DTCT 73
A42 B41 -MIC_HW _EN R661 1 2 10KR2J-3-GP
60 -EC_SCI TACH1/GPIO1 TACH5/GPIO69
GPIO7 TBT ID TACH2 H36 C41 -W W AN_DTCT 53
TACH2/GPIO6 TACH6/GPIO70
TBT_ID E38 A40
HIGH WITH TBT TACH3/GPIO7 TACH7/GPIO71
GPIO8_PCH C10 GPIO8
LOW WITHOUT TBT C4
49 LANPHYPC LAN_PHY_PWR_CTRL/GPIO12
GPIO15_PCH
G2 P4
GPIO15 A20GATE KBGA20 60
AU16 VCC1R8B
PECI
24 SATA_DOCK_DTCT U2 SATA4GP/GPIO16
RCIN# P5 -KBRC 60
1
GPIO
3 TACH0_PCH D40 AY11 3
TACH0/GPIO17 PROCPWRGD R357 CPUPW RGD 4,11 R1730
CPU/MISC
T5 AY10 THRMTRIP_PCH 1 2 2K2R3J-1-GP
24 SATA_BAY_DTCT SCLOCK/GPIO22 THRMTRIP# -THERMTRIP 4
390R2J-1-GP
GPIO24_PCH E8 T14
2
GPIO24 INIT3_3V# R1731
E16 AY1 -PROC_IVY_DF_TVS 1 2 1KR2J-1-GP
53 -MSATA_DTCT GPIO27 DF_TVS -PROC_IVY 4
GPIO28_PCH P8 GPIO28 R225
TS_VSS1 AH8 1 2 0R0402-PAD-1-GP
Comet_ID K1
VCC3M STP_PCI#/GPIO34 R233
TS_VSS2 AK11 1 2 0R0402-PAD-1-GP
GPIO35_PCH K4 GPIO35 R236 2 0R0402-PAD-1-GP
1KR2J-1-GP
AH10 1
10KR2J-3-GP
10KR2J-3-GP
TS_VSS3
1
GPIO36_PCH V8
DY SATA2GP/GPIO36
AK10 R239 1 2 0R0402-PAD-1-GP
R933 R196 R1732 GPIO37_PCH TS_VSS4
M5 SATA3GP/GPIO37
1
N2 P37
2
SLOAD/GPIO38 NC_1
R1733 M3
10KR2J-3-GP SDATAOUT0/GPIO39
V13 BG2 1 TP122 TPAD14-OP-GP
2
SDATAOUT1/GPIO48 VSS_NCTF_15#BG2
V3 BG48 1 TP123 TPAD14-OP-GP
SATA5GP/GPIO49/TEMP_ALERT# VSS_NCTF_16#BG48
D6 BH3 1 TP124 TPAD14-OP-GP
GPIO57 VSS_NCTF_17#BH3
VCC3B BH47 1 TP125 TPAD14-OP-GP
2 R658 VSS_NCTF_18#BH47 2
TPAD14-OP-GP
TP108
T P108 1 A4 BJ4 1 TP126 TPAD14-OP-GP
VSS_NCTF_1#A4 VSS_NCTF_19#BJ4
NCTF
1
TPAD14-OP-GP
TP109
T P109 TP127 TPAD14-OP-GP
1KR2J-1-GP
1 A44 BJ44 1
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
VSS_NCTF_2#A44 VSS_NCTF_20#BJ44
1
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
TPAD14-OP-GP
TP111
T P111 1 A46 BJ46 1 TP129 TPAD14-OP-GP
DY DY
2
VSS_NCTF_4#A46 VSS_NCTF_22#BJ46
TPAD14-OP-GP
TP112
T P112 1 A5 BJ5 1 TP130 TPAD14-OP-GP
2
VSS_NCTF_5#A5 VSS_NCTF_23#BJ5
PLANARID0 TPAD14-OP-GP
TP113
T P113 1 A6 BJ6 1 TP131 TPAD14-OP-GP
VSS_NCTF_6#A6 VSS_NCTF_24#BJ6
A4,A44,A45,A46,A5,A6,B3,B47,
BJ45,BJ46,BJ5,BJ6,C2,C48,D1,
BD1,BD49,BE1,BE49,BF1,BF49,
BG2,BG48,BH3,BH47,BJ4,BJ44,
PLANARID1 TPAD14-OP-GP
TP114
T P114 1 B3 C2 1 TP132 TPAD14-OP-GP
VSS_NCTF_7#B3 VSS_NCTF_25#C2
PLANARID2 TPAD14-OP-GP
TP115
T P115 1 B47 C48 1 TP133 TPAD14-OP-GP
VSS_NCTF_8#B47 VSS_NCTF_26#C48
D49,E1,E49,F1,F49
PLANARID3 TPAD14-OP-GP
TP116
T P116 1 BD1 D1 1 TP134 TPAD14-OP-GP
VSS_NCTF_9#BD1 VSS_NCTF_27#D1
TPAD14-OP-GP
TP120
T P120 1 BF1 F1 1 TP138 TPAD14-OP-GP
VSS_NCTF_13#BF1 VSS_NCTF_31#F1
TPAD14-OP-GP
TP121
T P121 1 BF49 F49 1 TP139 TPAD14-OP-GP
VSS_NCTF_14#BF49 VSS_NCTF_32#F49
1 <Core Design> 1
PANTHER-GP-NF
PLANAR ID: 0000 UMA w/o TBT SDV Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
0001 TBT & SWG SDV Taipei Hsien 221, Taiwan, R.O.C.
0010 UMA & SWG FVT Title
0011 UMA & SWG SIT PCH(6/9):GPIO/NCTF/RSVD
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
0100 UMA & SWG SIT-R A3
SHINAI-4 UMA -1
0101 UMA & SWG SVT Date: Monday, March 12, 2012 Sheet 29 of 100
A B C D E
A B C D E
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC10U6D3V3MX-GP
SCD1U10V2KX-4GP
SCD01U25V2KX-3GP
SC10U6D3V5KX-2GP
4 4
CRT
VCCCORE3
AD23 VCCCORE4 VSSADAC U47
1
AF21 C108
VCC CORE
C359 C500 C504 VCCCORE5 VCC3B C508 C557
AF23 VCCCORE6
AG21
2
VCCCORE7
AG23 VCCCORE8
AG24 VCCCORE9 VCCALVDS AK36
AG26 VCCCORE10
AG27 AK37 VCC1R8B
VCCCORE11 VSSALVDS
AG29 VCCCORE12 L22
AJ23 VCCCORE13
LVDS
AJ26 AM37 VCCTX_LVDS_PCH 1 2
VCCCORE14 VCCTX_LVDS1
AJ27
SC22U6D3V5MX-2GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
VCCCORE15
AJ29 VCCCORE16 VCCTX_LVDS2 AM38 IND-D1UH-19-GP
AJ31 VCCCORE17
1
VCC1R05B
VCCTX_LVDS3 AP36 42A0149AA
C510 C563 C567
AP37
2
VCC1R05B VCCTX_LVDS4
AN19
L17 DY VCCIO28
VCC3B
1 2 VCCAPLLEXP_PCH BJ22 VCCAPLLEXP
IND-1UH-100-GP V33
DY VCC3_3_6
HVCMOS
AN16 VCCIO15
C501
1
SC10U6D3V3MX-GP AN17
2
VCCIO16 C515
VCC3_3_7 V34
VCC1R05B SCD1U10V2KX-4GP
2
3 AN21 3
VCCIO17 VCC1R5B
AN26 VCCIO18
SC10U6D3V3MX-GP
AN27 AT16
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCCIO19 VCCVRM3 VCC1R05B_VTT
1
1
AP21 VCCIO20
C11 C12 C17 C111 C505
AP23 AT20
2
2
VCCIO21 VCCDMI1 VCC1R05B
DMI
AP24 VCCIO22
VCCIO
AP26 VCCIO23 VCCCLKDMI AB36
AT24
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCCIO24
1
AN33 C137 C164
VCCIO25
2
VCC3B AN34 AG16 VCC1R8B
VCCIO26 VCCDFTERM1
DFT / SPI
1
VCC1R5B
1
C398 AJ16
SCD1U10V2KX-4GP VCCDFTERM3 C543
2
2
VCCVRM2
VCCDFTERM4 AJ17
2 2
L63 1 2 IND-1UH-100-GP VCCAFDIPLL_PCH BG6 VCCAFDIPLL VCC3LAN
FDI
VCCSPI
AU20 VCCDMI2
1
C553
PANTHER-GP-NF SCD1U10V2KX-4GP
2
C1897 DY
1
SC10U6D3V3MX-GP
2
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH(7/9):Power
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 30 of 100
A B C D E
A B C D E
VCC1R05B
VCC1R05B DY U5J POWER 10 OF 10
R217
VCC3M 1 2 VCCACLK_PCH AD49 N26
VCCACLK VCCIO29
R219 0R2J-2-GP P26
VCCIO30
1
1 2 VCCDSW 3_3_PCH T16 VCCDSW3_3 C848
VCCIO31 P28
0R2J-2-GP SC1U10V2KX-1GP
DY
2
1
VCC1R05B VCC3B 1 2 DCPSUSBYP_PCH V12 T27 VCC3M
C762 C759 DCPSUSBYP VCCIO32
SCD1U10V2KX-5GP SCD1U10V2KX-5GP T29 VCC3M
2
VCCIO33
T38
4
DY VCC3_3_5 4
2
T23 D17
VCCAPLLDMI2_PCH VCCSUS3_3_7
1 2 BH23 VCCAPLLDMI2 RB461FGT106-GP
T24
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
L26 VCC1R05B VCCSUS3_3_8 VCC5M
AL29
SC10U6D3V3MX-GP
SCD1U10V2KX-5GP
VCCIO14
1
IND-1UH-100-GP V23
DY
3
VCCSUS3_3_9
1
USB
C857 C850
C729 C765 1 2
DY
DCPSUS_PCH AL24 V24 VCC3B
2
VCC1R05AMT C758 DCPSUS3 VCCSUS3_3_10
2
1
SC1U10V3KX-3GP P24
VCCSUS3_3_6 R21
2
AA19 100R2J-2-GP
VCCASW1 D46
T26
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
VCCIO34
AA21 RB461FGT106-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
VCCASW2
1
1
AA24 M26 V5REF_SUS_PCH VCC5B
C749 C757 C785 C818 C819 VCCASW3 V5REF_SUS
3
AA26 C858
DY
2
VCCASW4
1
DCPSUS4 AN23 1 2
1
AA27 C855
VCCASW5 SC1U10V2KX-1GP SC1U10V2KX-1GP
AN24
2
VCCSUS3_3_1 R656
AA29 VCCASW6 100R2J-2-GP
AA31
2
VCCASW7
AC26 P34 V5REF_PCH
VCCASW8 V5REF
AC27 VCCASW9
1
3 N20 3
VCCSUS3_3_2 C860
PCI/GPIO/LPC
AC29 VCCASW10
N22 SC1U10V2KX-1GP
2
VCCSUS3_3_3
AC31 VCCASW11
VCCSUS3_3_4 P20
AD29 VCCASW12
P22 VCC3B
VCCSUS3_3_5
AD31 VCCASW13
W21 VCCASW14 VCC3_3_1 AA16
W23 W16
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
VCCASW15 VCC3_3_8
1
W24 VCCASW16 VCC3_3_4 T34
C851 C852
W26
2
VCCASW17
W29 VCCASW18 VCC1R05B
W31 VCCASW19 VCC3_3_2 AJ2
VCC1R05B W33 VCCASW20
VCCIO5 AF13
VCC1R5B 1 2 DCPRTC_PCH N16 DCPRTC
2
1
C795 AH13
R1748 SCD1U10V2KX-5GP VCCIO12 C854 C853
D01RL0816F-L-GP Y49 AH14 SC1U10V3KX-3GP SC1U10V3KX-3GP VCC1R05B
2
VCCVRM4 VCCIO13
2 VCC1R05B 2
DY
1
VCCIO6 AF14
L27 1 2 IND-10UH-193-GP VCCADPLLA_PCH BD47 VCCADPLLA
SATA
AK1 VCCAPLLSATA_PCH 1 2
L29 VCCAPLLSATA
1 2 IND-10UH-193-GP VCCADPLLB_PCH BF47 VCCADPLLB VCC1R5B L33
SC10U6D3V3MX-GP
AF11 IND-1UH-100-GP
VCCVRM1 DY
1
AF17
ST220U2D5VBM-4GP
ST220U2D5VBM-4GP
VCCIO7 C856
AF33
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCCDIFFCLKN1
AF34 AC16
2
VCCDIFFCLKN2 VCCIO2
1
DY V21
SC1U10V2KX-1GP VCCASW23
CPU
BJ8 V_PROC_IO
SC4D7U6D3V3KX-GP
T19
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCCASW21 VCC3M
RTCVCC
1
1 <Core Design> 1
HDA
VCCRTC VCCSUSHDA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
SC1U10V2KX-1GP
Wistron Corporation
1
PANTHER-GP-NF
1
Title
1
VSS4 VSS83 VSS163 VSS263 TP915 TP916 TP917 TP918 TP919
AA34 AK8 B15 K7
1
VSS5 VSS84 VSS164 VSS264 VCC3M TPAD14-OP-GP TPAD14-OP-GP TPAD14-OP-GP
TPAD14-OP-GP TPAD14-OP-GP
AB11 AL16 B19 L18
1
VSS6 VSS85 VSS165 VSS265
AB14 VSS7 VSS86 AL17 B23 VSS166 VSS266 L2
4 AB39 VSS8 VSS87 AL19 B27 VSS167 VSS267 L20 4
AB4 AL2 B31 L26
1
VSS9 VSS88 VSS168 VSS268
AB43 VSS10 VSS89 AL21 B35 VSS169 VSS269 L28
AB5 VSS11 VSS90 AL23 B39 VSS170 VSS270 L36 26,71 -PCH_SLP_M
AB7 VSS12 VSS91 AL26 B7 VSS171 VSS271 L48
AC19 VSS13 VSS92 AL27 F45 VSS172 VSS272 M12
AC2 VSS14 VSS93 AL31 BB12 VSS173 VSS273 P16
AC21 VSS15 VSS94 AL33 BB16 VSS174 VSS274 M18
AC24 VSS16 VSS95 AL34 BB20 VSS175 VSS275 M22
AC33 VSS17 VSS96 AL48 BB22 VSS176 VSS276 M24
AC34 VSS18 VSS97 AM11 BB24 VSS177 VSS277 M30 26,61,71 -PCH_SLP_S5
AC48 VSS19 VSS98 AM14 BB28 VSS178 VSS278 M32
AD10 VSS20 VSS99 AM36 BB30 VSS179 VSS279 M34
AD11 VSS21 VSS100 AM39 BB38 VSS180 VSS280 M38
AD12 VSS22 VSS101 AM43 BB4 VSS181 VSS281 M4 26,61,64,71,79 -PCH_SLP_S3
AD13 VSS23 VSS102 AM45 BB46 VSS182 VSS282 M42
AD19 VSS24 VSS103 AM46 BC14 VSS183 VSS283 M46
AD24 VSS25 VSS104 AM7 BC18 VSS184 VSS284 M8
AD26 VSS26 VSS105 AN2 BC2 VSS185 VSS285 N18 26,71 -PCH_SLP_S4
AD27 VSS27 VSS106 AN29 BC22 VSS186 VSS286 P30
AD33 VSS28 VSS107 AN3 BC26 VSS187 VSS287 N47
AD34 VSS29 VSS108 AN31 BC32 VSS188 VSS288 P11
AD36 VSS30 VSS109 AP12 BC34 VSS189 VSS289 P18 58,59,63,71 -PW RSW ITCH
AD37 VSS31 VSS110 AP19 BC36 VSS190 VSS290 T33
AD38 VSS32 VSS111 AP28 BC40 VSS191 VSS291 P40
AD39 VSS33 VSS112 AP30 BC42 VSS192 VSS292 P43
AD4 VSS34 VSS113 AP32 BC48 VSS193 VSS293 P47
AD40 VSS35 VSS114 AP38 BD46 VSS194 VSS294 P7 TP920 TP921 TP922 TP923
AD42 VSS36 VSS115 AP4 BD5 VSS195 VSS295 R2
3 AD43 AP42 BE22 R48 TPAD14-OP-GP TPAD14-OP-GP TPAD14-OP-GP TPAD14-OP-GP 3
VSS37 VSS116 VSS196 VSS296
AD45 VSS38 VSS117 AP46 BE26 VSS197 VSS297 T12
AD46 VSS39 VSS118 AP8 BE40 VSS198 VSS298 T31
AD8 AR2 BF10 T37
1
VSS40 VSS119 VSS199 VSS299 TP924 TP925 TP926 TP927 TP928
AE2 VSS41 VSS120 AR48 BF12 VSS200 VSS300 T4
AE3 AT11 BF16 W34 TPAD14-OP-GP TPAD14-OP-GP TPAD14-OP-GP TPAD14-OP-GP TPAD14-OP-GP
VSS42 VSS121 VSS201 VSS301
AF10 VSS43 VSS122 AT13 BF20 VSS202 VSS302 T46
AF12 VSS44 VSS123 AT18 BF22 VSS203 VSS303 T47
AD14 AT22 BF24 T8
1
VSS45 VSS124 VSS204 VSS304
AD16 VSS46 VSS125 AT26 BF26 VSS205 VSS305 V11
AF16 VSS47 VSS126 AT28 BF28 VSS206 VSS306 V17 26,71 -PCH_SLP_LAN
AF19 VSS48 VSS127 AT30 BD3 VSS207 VSS307 V26
AF24 VSS49 VSS128 AT32 BF30 VSS208 VSS308 V27 26,71 AC_PRESENT
AF26 VSS50 VSS129 AT34 BF38 VSS209 VSS309 V29
AF27 VSS51 VSS130 AT39 BF40 VSS210 VSS310 V31 28,49,53,58,70 -PLTRST_NEAR
AF29 VSS52 VSS131 AT42 BF8 VSS211 VSS311 V36
AF31 VSS53 VSS132 AT46 BG17 VSS212 VSS312 V39 26,71 SUSPW RDNACK
AF38 VSS54 VSS133 AT7 BG21 VSS213 VSS313 V43
AF4 VSS55 VSS134 AU24 BG33 VSS214 VSS314 V7 11,26,72 MPW RG
AF42 VSS56 VSS135 AU30 BG44 VSS215 VSS315 W17
AF46 VSS57 VSS136 AV16 BG8 VSS216 VSS316 W19 11,26,61,62,70,72 BPW RG
AF5 VSS58 VSS137 AV20 BH11 VSS217 VSS317 W2
AF7 VSS59 VSS138 AV24 BH15 VSS218 VSS318 W27 26,71 PCHPW RG
AF8 VSS60 VSS139 AV30 BH17 VSS219 VSS319 W48
AG19 VSS61 VSS140 AV38 BH19 VSS220 VSS320 Y12 26,85 MEPW RG
AG2 VSS62 VSS141 AV4 H10 VSS221 VSS321 Y38
AG31 VSS63 VSS142 AV43 BH27 VSS222 VSS322 Y4 4,26,87 DRAMPW RG
AG48 VSS64 VSS143 AV8 BH31 VSS223 VSS323 Y42
AH11 VSS65 VSS144 AW14 BH33 VSS224 VSS324 Y46
2 2
AH3 VSS66 VSS145 AW18 BH35 VSS225 VSS325 Y8
AH36 VSS67 VSS146 AW2 BH39 VSS226 VSS328 BG29
AH39 VSS68 VSS147 AW22 BH43 VSS227 VSS329 N24
AH40 VSS69 VSS148 AW26 BH7 VSS228 VSS330 AJ3 TP929 TP930
AH42 VSS70 VSS149 AW28 D3 VSS229 VSS331 AD47
AH46 AW32 D12 B43 TPAD14-OP-GP TPAD14-OP-GP
VSS71 VSS150 VSS230 VSS333 VCC3LAN VCC1R05AMT
AH7 VSS72 VSS151 AW34 D16 VSS231 VSS334 BE10 TP931 TP932
AJ19 VSS73 VSS152 AW36 D18 VSS232 VSS335 BG41
AJ21 AW40 D22 G14 TPAD14-OP-GP TPAD14-OP-GP
1
VSS74 VSS153 VSS233 VSS337 VCC3B VCC1R05B
AJ24 VSS75 VSS154 AW48 D24 VSS234 VSS338 H16
AJ33 VSS76 VSS155 AV11 D26 VSS235 VSS340 T36
AJ34 AY12 D30 BG22
1
VSS77 VSS156 VSS236 VSS342
AK12 VSS78 VSS157 AY22 D32 VSS237 VSS343 BG24
AK3 VSS79 VSS158 AY28 D34 VSS238 VSS344 C22
D38 VSS239 VSS345 AP13
PANTHER-GP-NF D42 M14
VSS240 VSS346
D8 VSS241 VSS347 AP3
E18 VSS242 VSS348 AP1
E26 VSS243 VSS349 BE16
G18 VSS244 VSS350 BC16
G20 VSS245 VSS351 BG28
G26 VSS246 VSS352 BJ28
G28 VSS247
G36 VSS248
G48 VSS249
H12 VSS250
H18 VSS251
H22 VSS252 <Core Design>
1 H24 VSS253 1
H26 VSS254
H30
H32
VSS255
VSS256
Wistron Corporation
H34 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
VSS257 Taipei Hsien 221, Taiwan, R.O.C.
F3 VSS258
Title
A B C D E
5 4 3 2 1
D D
C C
BLANK
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SC1U25V3KX-1-GP
0.15A
SCD1U25V3KX-GP
SCD01U25V2KX-3GP
VCC3P VCC3B
VINT20 VBL20
2
C307 C310 C313
F7
1
1 2
FUSE-D5A24V-1-GP
2
2
DY FUSE-3A24V-2-GP
1
R120 F19
47KR2J-2-GP C724
SCD01U25V2KX-3GP
2
J5
41
1
2
3
4
5
71 BACKLIGHT_ON
27 PANEL_BKLT_CTRL 6 0.5A
28 -LCD_PRESENCE 7
8 VCC3M VCC3P
9
10
11 Q22
27 TXCLK_UP
27 TXCLK_UN 12
13 1 8
27 TXOUT_U2P 14
27 TXOUT_U2N 15 2 7
16
27 TXOUT_U1P 17 3 6
Even 18
27 TXOUT_U1N
19 4 5
27 TXOUT_U0P 20
1
27 TXOUT_U0N 21
22 TPCF8002-1-GP R361
23 47R2J-2-GP
27 TXCLK_LP
27 TXCLK_LN 24
25
A 2
27 TXOUT_L2P 26
27 TXOUT_L2N 27
28 D63
Odd 29 RB521SM-30T2R-GP
27 TXOUT_L1P
27 TXOUT_L1N 30
31
K
27 TXOUT_L0P 32 72 VCC3P_DRV
27 TXOUT_L0N 33
27 SPWG_EDID_DATA 34
1
27 SPWG_EDID_CLK 35
1
36 R714
SC1KP50V2KX-1GP
37 C603 47KR2J-2-GP
38 SCD068U25V3KX-GP
2
2
39
2
C177 40
42
DY
1
VCC3P JAE-CON40-4-GP
F3 LCD CONN
1 2 VCC3P_LCD
SCD01U25V2KX-3GP
<Core Design>
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
FUSE-3A24V-2-GP
2
Title
LCD CONNECTOR
Size Document Number Rev
Custom SHINAI-4 UMA -1
HTTPS://REALSCHEMATIC.COM Date: Monday, March 12, 2012 Sheet 34 of 100
VCC3B
SCD1U10V2KX-5GP
-DOCK_ATTACHED_3B 59
1
1
C656 R923 1st TI TS3V713EL 73.03713.003
10KR2J-3-GP
2 2nd Pericom PI3V713 73.3V713.00I
33
32
31
30
29
28
2
U138
SEL
GND
VDD
GND
VDD
GND
3rd NXP NX5DV715HF 73.05715.003
1 27 SW ITCH_RED
27 RED R0 R1
27 GREEN 2 G0 R2 26 CRT_RED 36
3 25 SW ITCH_GREEN
GND G1
4 VDD G2 24 CRT_GREEN 36
27 BLUE 5 B0 VDD 23
6 GND 22 SW ITCH_BLUE
27 HSYNC H0 B1
27 VSYNC 7 V0 B2 21 CRT_BLUE 36
8 20 CRT_HSYNC_DOCK_R R8567 1 2 33R2J-2-GP
NC#8 H1 CRT_HSYNC_DOCK 59
27 DDCDATA 9 SDA0 H2 19 VGA_HSYNC 36
27 DDCCLK 10 18 CRT_VSYNC_DOCK_R R8568 1 2 33R2J-2-GP
SCL0 V1 CRT_VSYNC_DOCK 59
11 GND V2 17 VGA_VSYNC 36
VCCCRT
VDD_5
SDA1
SDA2
SCL1
SCL2
TS3V713ELRTGR-GP
12
13
14
15
16
1
SCD1U10V2KX-5GP C664 R323
1
R331
2
4K7R2J-2-GP 4K7R2J-2-GP
2
DDCCLK_CONN 36
DDCCLK_DOCK 59
DDCDATA_CONN 36
DDCDATA_DOCK 59
DY DY DY DY DY DY
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
SC8P50V2DN-1GP
SC8P50V2DN-1GP
SC8P50V2DN-1GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1
1
R434 R500 R807 C648 C651 C653 C473 C472 C471
2
2
2
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CRT SELECTOR
HTTPS://REALSCHEMATIC.COM Size
A3
Document Number Rev
-1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 35 of 100
GND GUARDING
EACH SIGNAL WIDTH DEPENDS ON ZO(TRACE IMPEDANCE)
SPACING=20MIL
Near CRT Connector
L60
1 2 CRT_R
35 CRT_RED
BLM15BB470SN1D-2GP
1
R227 DY
C542 C475
150R2F-1-GP SC33P50V2JN-3GP SC8P50V2CN-3GP
2
2
L61
1 2 CRT_G
35 CRT_GREEN
BLM15BB470SN1D-2GP
1
1
R440 C476
150R2F-1-GP DY
C433 SC8P50V2CN-3GP
2
SC33P50V2JN-3GP
2
L62
1 2 CRT_B
35 CRT_BLUE
BLM15BB470SN1D-2GP
1
R441 DY
C469 C1741
150R2F-1-GP SC33P50V2JN-3GP SC8P50V2CN-3GP
2
2
ZO=50 OHM ZO=75 OHM
D35 VCCCRT
2
1
3
FUSE-1D5A6V-10GP
1
4K7R2J-2-GP
4K7R2J-2-GP
SC1U10V2KX-1GP
1
F20
1
2
SCD01U16V2KX-3GP C474 AFTE14P-GP R370 R372
2
VCC5B_CRTCONN
2
J33
1
C1749
SCD1U16V2KX-3GP
4 9
2
NC#4 VCC_CRT
11 NC#11
DDCDATA_ID1 12 DDCDATA_CONN 35
DDCCLK_ID3 15 DDCCLK_CONN 35
AFTE14P-GP AFTP28 1 5 GND CRT_R
6 GND CRT_RED 1
7 2 CRT_G
GND CRT_GREEN CRT_B
8 3
SC100P50V2JN-3GP
SC100P50V2JN-3GP
GND CRT_BLUE
10 GND
16 14
GND VSYNC DY DY
1
17 GND HSYNC 13
C527 C528
2
D-SUB-15-96-GP
CRT CONN
R2001
L42
1 2 VGA_HSYNC_R 1 2 CRT_HSYNC_CONN
35 VGA_HSYNC
BLM15BB470SN1D-2GP
33R2J-2-GP
DY
1
C516
SC100P50V2JN-3GP <Core Design>
2
R2002
L41 Wistron Corporation
1 2 VGA_VSYNC_R 1 2 CRT_VSYNC_CONN 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
35 VGA_VSYNC Taipei Hsien 221, Taiwan, R.O.C.
BLM15BB470SN1D-2GP
33R2J-2-GP
Title
DY
1
C512
SC100P50V2JN-3GP Ext CRT Interface
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
2
A3 -1
SHINAI-4 UMA
Date: Tuesday, March 13, 2012 Sheet 36 of 100
5 4 3 2 1
VCC3B VCC5B
1
C1744
SCD1U10V2KX-4GP
2
1
1
U111
R282 R184
2K2R2J-2-GP DY 2K2R2J-2-GP
16 VCC 1A 4
7
2A
9
2
3A
38 SYSTEM_DP_AUXP 2 1B1 4A 12
D 38 SYSTEM_DP_AUXN 5 2B1 D
11 3B1 OE# 15
14 4B1
1 DVI_DONGLE_DTCT
S
27 SYSTEM_DP_DDC_CTRLCLK 3 1B2
27 SYSTEM_DP_DDC_DATA 6 2B2
10 3B2 GND 8
13 4B2 GND 17
CBT3257ABQ-GP
VCC3B VCC5B
VCC3B
1
1
DYR6391
1MR2J-1-GP R237
G
100KR2J-1-GP
2
2
S D DP_HPD_CONN
27 DPB_HPD
DP_AUXP_CONN
Q131 DP_AUXN_CONN
1
LSK3541G1ET2L-GP
100KR2J-1-GP
1
R234
100KR2J-1-GP
R186
2
C C
VCC3B VCC3VIDEO_DP
POLYSW 6V 1.5A NANOSMDC150F VCC3VIDEO_DP
Typ. 500mA
F18
1 2 Max. 3A U9
1 AFTP4 AFTE14P-GP
FUSE-1D5A6V-10GP 1 6
SC100U6D3V6MX-GP
SC4D7U6D3V3KX-GP
2 5
3
DY
1
4
C1133 C1589
RCLAMP0522P-TCT-GP-U
2
2
5
Q147
AFTP3
1
TPCF8002-1-GP
RCLAMP0522P-GP AFTE14P-GP
J34
place near DP connector 21 22
4
NP1
1 2 DP_HPD_CONN
3 4 DVI_DONGLE_DTCT
38 SYSTEM_DP0P
38 SYSTEM_DP0N 5 6
7 8
38 SYSTEM_DP1P 9 10
72,94 VCC3B_DRV 38 SYSTEM_DP1N 11 12
B To prevent leakage current from DP monitor 13 14 B
38 SYSTEM_DP2P 15 16
17 18
470KR2J-2-GP
SCD1U25V3KX-GP
38 SYSTEM_DP2N
1
DY 19 20
1
38 SYSTEM_DP3P NP2
R421 C1113 23 24
38 SYSTEM_DP3N
2
DP_AUXP_CONN SKT-DISPLAY20P-17-GP-U1
2
DP_AUXN_CONN
5M1R2J-GP
1MR2J-L2-GP
SCD1U10V2KX-4GP
VARISTOR-27V-2-GP
VARISTOR-27V-2-GP
1
2
U11 U10
1
R102
C178
2
R93
1
D86 D230
RCLAMP0524PATCT-GP RCLAMP0524PATCT-GP
place near DP connector
place near DP connector
U10, U11 TDK:AVR-M1005C120MTAAB
Taiyo-Yuden:VR1005AAA120
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
HTTPS://REALSCHEMATIC.COM
Title
4 4
System DP Connector
2 2
<Core Design>
Wistron Corporation
1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, 1
Taipei Hsien 221, Taiwan, R.O.C.
Title
Display Port AC Coupling
Size Document Number Rev
HTTPS://REALSCHEMATIC.COM A4
SHINAI-4 UMA -1
Date: Monday, March 12, 2012 Sheet 38 of 100
A B C D E
5 4 3 2 1
D D
C C
BLANK
B B
<Core Design>
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.
Title
BLANK
Size Document Number Rev
HTTPS://REALSCHEMATIC.COM A4
SHINAI-4 UMA -1
Date: Tuesday, March 06, 2012 Sheet 39 of 100
5 4 3 2 1
5 4 3 2 1
D D
CN2
18 VCC5B
NP1
1
2
C C
24 SATA0_TXP 3
4
24 SATA0_TXN 5
6
7
8
9 VCC3B
24 SATA0_RXN
10
24 SATA0_RXP 11
12
13
14
71 -HDD_DTCT 15
16
17
NP2
19
HRS-CONN17D-GP
B B
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SATA HDD Connector
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 40 of 100
5 4 3 2 1
5 4 3 2 1
D D
VCC3M VCC5MUBAY
2
J2
R936 11
10KR2J-3-GP 8
S1
1
24 SATA1_TXP S2
24 SATA1_TXN S3
S4
C 24 SATA1_RXN S5 C
24 SATA1_RXP S6
S7
61 -BAY_ATTACH P1
P2
P3
61,71 -BAY_MEDIA_EJECT P4
P5
P6
9
10
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SC10U10V5KX-2GP
SKT-SATA7P-6P-98-GP
2
2
C1714 C55 C59
1
1
B B
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ST150U6D3VBM-1-GP
IN#3 OUT#7 U135
2 8 10 2 3
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
IN#2 OUT#8 GND
1 9 11
SCD1U10V2KX-5GP
1
GND GND C112 GND USB3P0_TXP_CONN USB3P0_TXP_CONN
12 4 1 4 1 8
C1752 C1753 GND PGND USB3P0_TXN_CONN L1#1L1#8 USB3P0_TXN_CONN
13 7 2 7
1
2
C4 USB3P0_RXP_R GNDGND USB3P0_RXP_R
3 6
SKT-USB13-44-GP USB3P0_RXN_R L3#3L3#6 USB3P0_RXN_R
4 5
2
L4#4L4#5
Should use non-discharge part.
WIDE PATTERN (MIN 500MA)
PLACE NEAR USB CONNECTOR RCLAMP0524PATCT-GP
USB3.0 port1
USB_PWR1 U140 VCC5M
3 4
ESD I/O2 ESD I/O3
2 5
J704 USBP1+_TVS GND VP USBP1-_TVS
1 6
ESD I/O1 ESD I/O4
USB_PWR1 1 5 USB3P1_RXN_R R210 1 2 0R2J-2-GP
VBUS SSRX- USB3P1_RXN 28
6 USB3P1_RXP_R R211 1 2 0R2J-2-GP IP4223CZ6-GP
VCC5M SSRX+ USB3P1_RXP 28
R202 1 2 0R2J-2-GP
28 USBP1-
U52 USBP1-_TVS 2 8 USB3P1_TXN_CONN USB3P1_TXN_C C8 1 2 SCD1U10V2KX-4GP
D- SSTX- USB3P1_TXN 28
R204 1 2 0R2J-2-GP USBP1+_TVS 3 9 USB3P1_TXP_CONN USB3P1_TXP_C C9 1 2 SCD1U10V2KX-4GP
28 USBP1+ D+ SSTX+ USB3P1_TXP 28
5 10
ST150U6D3VBM-1-GP
OC# -USB_PORT1_OC1 28 CHASSIS#10
4 6 11 7 L79
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
71 USB_ON1 EN OUT#6 CHASSIS#11 GND
3 7 12 2 3 D5
1
IN#3 OUT#7 C1716 CHASSIS#12
2 8 13 4
IN#2 OUT#8 C351 C364 CHASSIS#13 PGND USB3P1_TXP_CONN USB3P1_TXP_CONN
1 9 1 4 1 8
SCD1U10V2KX-5GP
2
SKT-USB13-42-GP TCM1210S-500-2P-T200-GP L2#2L2#7
G1 G2
1
Dual Layout
USB port9(Always On USB)
DY
USBP9- R1752 1 2 0R2J-2-GP USBP9-_MUX R197 1 2 0R2J-2-GP
C1248, C1716,C112
1st NEC Tokin TEPSLB20J157M 77.C1571.09L
DY USB_PWR9 2nd SANYO 6TPE150MAZB 77.21571.111
USBP9+ R1753 1 2 0R2J-2-GP USBP9+_MUX Always on port
VCC5M
J10
5 7
1
DY USBP9-_TVS 2
C3 1 2 SC4D7U10V5KX-1GP R192 1 2 0R2J-2-GP USBP9+_TVS 3
USB_PWR9 4 U141 VCC5M
C1717 1 2 SCD1U10V2KX-4GP 6 8
3 4
U53 SKT-USB8-58-GP ESD I/O2 ESD I/O3
WIDE PATTERN (MIN 500MA) 2
GND VP
5
USBP9+_TVS 1 6 USBP9-_TVS
SC470P50V2KX-3GP
SCD1U10V2KX-4GP
ST150U6D3VBM-1-GP
IN OUT
Always On USB Part List (U53)
1
DP_IN
2
4 2
ILIM_SEL DM_OUT
3
USBP9- 28 ~SDV FVT~
DP_OUT USBP9+ 28
9
NC#9
ILIM0
16 TPS2541RTER TPS2541RTER
5 15
71 USB_ON2
6
DSC ILIM1 TI (74.02541.073) (74.02541.073)
71 AO_USB_SEL
1
CTL1
7 14
CTL2 GND R243
8 17
CTL3 GND 33KR2J-3-GP TPS2541A(74.02541. A73)
TPS2541RTER-GP
2
Pericom PI5USB2541(74.52541.073)
Should use discharge part.
VCC3M VCC3M
1
F23
2 FUSE-D5A24V-1-GP R869
3 100KR2J-1-GP
4
1
5
6 VCC3BT_C
7 USBP11+_CONN R190 1 2 0R2-PT5-LILY-GP USBP11+ 28
8
9 USBP11-_CONN R191 1 2 0R2-PT5-LILY-GP USBP11- 28
10
11 Q177
12 3 -LED_WIRELESS 53,73
13 BDC_LED_IN 1 R1
14 2
15 R2
BDC_ON 53,61,73
16 LTC015EEB-FS8-GP
WIFI_BUSY 53 <Core Design>
17 -BDC_PRESENCE 28
18 BT_BUSY 53
19
20
GLOBAL_WL_DISABLE# 61
Wistron Corporation
22 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC220P50V2JN-3GP
ACES-CON20-26-GP Title
C1727 DY C1728
SCD1U10V2KX-5GP USB Connector
HTTPS://REALSCHEMATIC.COM
1
CLOSE TO CODEC
VCC5BA
4 4
VCC3M
VCC5B VCC5BA
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R1766
1
1 2 R1754 VCC3B VCC5B
0R0603-PAD-1-GP C1922 C1923 C1924 C1925
SC10U6D3V3MX-GP
SCD1U10V2KX-5GP
D01R3J-L-GP
SC10U6D3V3MX-GP
SCD1U10V2KX-5GP
2
DY
2
1
1
C1961 C1962 C1963 C1964 R1755 R1756
VCC3M_AUDIO
0R0603-PAD-1-GP 0R0603-PAD-1-GP
2
DY
2
C1965
1 2 AGND
VCC5B_AUDIO
SCD01U25V2KX-3GP
LDO_CAP
AGND
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
CPVEE
1
VCC3B_AUDIO
1
1
C1928 C1930 C1929 C1931
C1926 C1927
SC10U6D3V3MX-GP
SC2D2U10V3KX-1GP
SCD1U10V2KX-5GP
2
SCD1U10V2KX-5GP
2
1
1
C1933 C1934 C1935
C1932 CLOSE TO PVDD1
2
2
PLACE NEAR U8
CLOSE TO PVDD2
44 MIC_GPI
AGND
25
38
39
46
47
28
48
34
9
1
3 U8 3
AVDD1
AVDD2
PVDD1
PVDD2
DVDD_IO
EAPD/COMB_JACK
LDO_CAP
CPVEE
DVDD
SPDIF_OUT
Place close to Docking
45 SENSE_A 13 23
SENSE_A LINE1_L/PORT_C_L
45 SENSE_B 18 24
SENSE_B LINE1_R/PORT_C_R PORTE_L_AUDIO C1936 1
14 2 SC2D2U10V3KX-1GP R1757 1 2 1KR2J-1-GP DOCK_HPOUT_L DOCK_HPOUT_L 59
LINE2_L/PORT_E_L PORTE_R_AUDIO C1937 1
24 HDA_BCLK 6 15 2 SC2D2U10V3KX-1GP R1758 1 2 1KR2J-1-GP DOCK_HPOUT_R DOCK_HPOUT_R 59
BCLK LINE2_R/PORT_E_R
24 HDA_SYNC 10
C1938 1 BEEP_MIX_ATT_AUDIO SYNC PORTB_L_AUDIO
48 BEEP_MIX_ATT 2 SCD1U10V2KX-5GP 12 21 C1939 1 2 SC2D2U10V3KX-1GP EXT_MIC_IN 46
PCBEEP MIC1_L/PORT_B_L PORTB_R_AUDIO C1940
22 1 2 SC2D2U10V3KX-1GP
MIC1_R/PORT_B_R
61 -SPK_MUTE 4 16 DOCK_MIC_L 46
PD# MIC2_L/PORT_F_L
24 -HDA_RST 11 17 DOCK_MIC_R 46
RESET# MIC2_R/PORT_F_R
33R2J-2-GP 30
R1759 1 HDA_SDIN0_CS MIC1_VREFO_R
2 8 31
24 HDA_SDIN0 SDATA_IN MIC1_VREFO_L
24 HDA_SDO 5 29
SDATA_OUT MIC2_VREFO
2 41 SPK_OUT_L- MPZ1608S331A-GP 1 2 L64 SPKR_OUTL- 47
73 MIC_DATA R1760 GPIO0/DMIC_DATA SPK_OUT_L- SPK_OUT_L+ L65
73 MIC_CLK 1 2 0R2J-2-GP 3 40 MPZ1608S331A-GP 1 2 SPKR_OUTL+ 47
GPIO1/DMIC_CLK SPK_OUT_L+ SPK_OUT_R- MPZ1608S331A-GP L66
44 1 2
33R2J-2-GP SPK_OUT_R- SPK_OUT_R+ MPZ1608S331A-GP L67 SPKR_OUTR- 47
45 1 2
R1761 1 PORTA_L_AUDIO 32 SPK_OUT_R+ SPKR_OUTR+ 47
44 HP_L_JACK 2
R1762 1 PORTA_R_AUDIO 33 HPOUT_L/PORT_A_L
44 HP_R_JACK 2 20
HPOUT_R/PORT_A_R MONO_OUT/PORT_H
AVDD_3R3
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
33R2J-2-GP
JDREF
PVSS2
PVSS1
AVSS2
AVSS1
DVSS
VREF
GND
CBN
CBP
1
C1941 C1942 C1943 C1944
ALC3202-GR-GP
19
27
35
36
49
43
42
37
26
2
1 C1953
SC10U6D3V3MX-GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC2D2U10V3KX-1GP
SCD1U10V2KX-5GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC22P50V2JN-4GP
DY DY DY DY
SC47P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1
1
47KR2J-2-GP
10KR2J-3-GP
1
AUDIO_VREF
2
2 2
2
JDREF
AGND
2
AGND
AGND
Place under ALC3202 Place on bottom side near J29
1
SC2D2U10V3KX-1GP
SCD1U10V2KX-5GP
R1765 C1960
R1770
20KR2F-L-GP
DY
1
1
1 2 1 2
C1958 C1959
2
SCD01U25V2KX-3GP 0R3J-0-U-GP
2
2
AGND AGND
R1769
R1767
1 2 1 2
0R2J-2-GP 0R3J-0-U-GP
CLOSE TO CODEC
1 1
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
WIDE PATTERN
AFTP5
AFTE14P-GP
4 4
FL3 1 2 MMZ1005Y152CT-GP
43 HP_L_JACK
1
AFTP6
SC1KP50V2KX-1GP
AFTE14P-GP
1
C120
FL5 1 2 MMZ1005Y152CT-GP
43 HP_R_JACK
2
R1768 1 2 22KR2J-GP MIC_GPI 43
1
1
C13 C197
R742 R743 SC1KP50V2KX-1GP SC1KP50V2KX-1GP
DY220R2J-L2-GP DY220R2J-L2-GP
SC10U6D3V3MX-GP
2
2
AGND
2
1
C1966
2
AGND AGND
AGND
3 3
VCC3B
D85
2
10KR2J-3-GP
1
3 HP_JACK_IN 61
R621 AFTP7
45 HP_JACK_DOCK 1
AFTE14P-GP
1
DAN222GTL-GP
2
R420
AFTP8 470KR2J-2-GP
1
AFTE14P-GP
2
J713
1 AGND
1
HP_L_JACK_JK1 AFTP9
2
6 AFTE14P-GP AGND
2 HP_R_JACK_JK1 2
3
4
5 HP_JACK_SYS
1 1
MIC_JACK_2 HP_JACK_SYS 45
7 MIC_JACK_2 46
GROUND 8
GROUND 9
AFTP10
NP1
1
NP2 AFTE14P-GP
RSB5D6SMT2R-GP
RSB5D6SMT2R-GP
RSB5D6SMT2R-GP
2
R628
2
100KR2J-1-GP
1
AGND
AGND
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Audio Connector
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A3
SHINAI-4 UMA -1
Date: Monday, March 12, 2012 Sheet 44 of 100
A B C D E
A B C D E
D
4 R257 1 2 22KR2J-GP G Q141 4
44 HP_JACK_SYS
LSK3541G1ET2L-GP
S
AGND
CLOSE TO CODEC PIN13
VCC3B VCC3B
R290 1 2 20KR2F-L-GP SENSE_B 43
1
1
R174 R50
3 10KR2J-3-GP 100KR2J-1-GP 3
D
2
2
Q3 Q143
3 DOCK_MIC_EN R183 1 2 22KR2J-GP G LSK3541G1ET2L-GP
1 R1
59 -DOCK_MICIN_DTCT
2
R2
LTC015EEB-FS8-GP
DY
S
1
C593
SC1KP50V2KX-1GP
2
AGND
AGND
R305 R321
10KR2J-3-GP 100KR2J-1-GP
D
2
Q86
3 R553 1 2 22KR2J-GP G Q87
1 R1 LSK3541G1ET2L-GP
59 -DOCK_HPOUT_DTCT
2
R2
LTC015EEB-FS8-GP
S
HP_JACK_DOCK 44
DY
<Core Design>
1
C571
SC1KP50V2KX-1GP
CLOSE TO CODEC PIN18 AGND
Wistron Corporation
2
Title
4 4
AVDD_3R3
3 3
SC1U10V2KX-1GP
1
1
R460
2K2R2J-2-GP
DYC73
2
AGND
FL14
2 1
BK1608HS102-T-GP FL9
1 2 R151 1 2 1KR2J-1-GP
44 MIC_JACK_2 EXT_MIC_IN 43
MMZ1005Y152CT-GP
1
1
C142
SC100P50V2JN-3GP R170
2 22KR2J-GP 2
2
2
C27 1 2 SCD01U25V2KX-3GP
C91 1 2 SCD01U25V2KX-3GP
NEAR EXT MIC CONN
AGND
R6 1 2 0R2J-2-GP
AGND
R461 1 2 2K2R2J-2-GP DOCK_MIC_IN C57 1 2 SC2D2U10V3KX-1GP
59 DOCK_MIC_IN_L DOCK_MIC_L 43
R462
270R2J-L-GP
1 <Core Design> 1
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Audio Ext MIC I/F
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A3
SHINAI-4 UMA -1
Date: Monday, March 12, 2012 Sheet 46 of 100
A B C D E
5 4 3 2 1
D D
MLX-CON4-32-GP-U
43 SPKR_OUTR- 4
43 SPKR_OUTR+ 3
43 SPKR_OUTL+ 2
43 SPKR_OUTL- 1
5
C C
J4
SC470P50V2KX-3GP
SC470P50V2KX-3GP
SC470P50V2KX-3GP
SC470P50V2KX-3GP
1
1
C175 C169 C168 C166
2
Place near SPK Conn.
B B
<Core Design>
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.
Title
AUDIO SPEAKER
Size Document Number Rev
HTTPS://REALSCHEMATIC.COM A4
SHINAI-4 UMA -1
Date: Monday, March 12, 2012 Sheet 47 of 100
5 4 3 2 1
D51
61 EC_SPKR A K
RB521SM-30T2R-GP
D68
24 PCH_SPKR A K
RB521SM-30T2R-GP
1
R66
33KR2J-3-GP
2
BEEP_MIX_ATT 43
1
R67
10KR2J-3-GP C1967
SC100P50V2JN-3GP
2
2
VCC3M
D
1
LSK3541G1ET2L-GP
R914 D210
10KR2J-3-GP A K G
61 -BEEP_ENABLE Q144
2
RB521SM-30T2R-GP
D211
S
MUTE A K
1
RB521SM-30T2R-GP
R1615
100KR2J-1-GP
D
R134
2
Q82
1 2 G LSK3541G1ET2L-GP
61 -MUTE
27KR2J-L1-GP
S
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Audio BEEP
Size Document Number Rev
HTTPS://REALSCHEMATIC.COM A4
SHINAI-4 UMA -1
Date: Monday, March 12, 2012 Sheet 48 of 100
A B C D E F G H I J K L M N O
VCC3M
TABLE
2
AMT YES NO VCC3LAN VCC3GBE
10 R29 10
10KR2J-3-GP
R540
U13 82579LM 82579V
1
1 2
25 -CLKREQ_GBE D001R3D-L-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
VCC3GBE VCC3GBE
2
Q108 LOGIC C172 C63 C65 C87
C
B R1
DY
1
2
9 E 9
LTC015TEBFS8TL-GP R166
DY 10KR2J-3-GP LEWISVILLE
1
U13
PCIE
8 PE_CLKN MDI_MINUS1 8
MDI
C1618 1 2 SCD1U10V2KX-4GP PCIE_GBE_RXP_C 38 20 MDI_2+ 50
25 PCIE_GBE_RXP C1617 1 PETP MDI_PLUS2
25 PCIE_GBE_RXN 2 SCD1U10V2KX-4GP PCIE_GBE_RXN_C 39 PETN MDI_MINUS2 21 MDI_2- 50
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
25 PCIE_GBE_TXP 41 PERP MDI_PLUS3 23 MDI_3+ 50
42 24 MDI_3- 50 VCC3GBE
25 PCIE_GBE_TXN PERN MDI_MINUS3
2
C173 C180
SMBUS DEVICE ADDRESSES 0XC8
25 SML0_CLK 28 6
1
SMB_CLK RSVD_NC#6
SMBUS
25 SML0_DATA 31 SMB_DATA
1 R178 1 2 4K7R2J-2-GP
RSVD_VCC3P3 R185 1
7
RSVD_VCC3P3 2 2 4K7R2J-2-GP 7
VDD3P3_IN 5
29 LANPHYPC 3 LAN_DISABLE#
R173 1 2 10KR2J-3-GP 4 C1619 1 2 SC1U10V2KX-1GP
VDD3P3_OUT
DY 15
VDD3P3
50,61 -RJ45_LINKUP 26 LED0 VDD3P3 19
27 29
50 -RJ45_ACTIVITY LED1 VDD3P3 KEEP SHORT AND WIDE PATTERN
LED
25 LED2
VDD1P0 47
VCC3GBE 46
6 VDD1P0 6
32 JTAG_TDI VDD1P0 37
34 JTAG_TDO
JTAG
R171 1 2 10KR2J-3-GP 33 43
R167 1 JTAG_TMS VDD1P0
2 10KR2J-3-GP 35 JTAG_TCK
VDD1P0 11
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
SCD01U25V2KX-3GP
R94 1 2 0R2J-2-GP XTAL25_OUT_GBE 9 40
R69 XTAL_OUT VDD1P0
1 2 0R2J-2-GP XTAL25_IN_GBE 10 XTAL_IN VDD1P0 22
2
VDD1P0 16
8 C92 C89 C325 C1410 C88
VDD1P0
30
DY
1
TEST_EN L18
SC33P50V2JN-3GP
5 5
Y2 12 RBIAS CTRL_1P0 7 1 2
2
SC33P50V2JN-3GP
C1620 49 IND-4D7UH-215-GP
VSS_EPAD
2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 4 FLF3215T-4R7M
SC22U6D3V5MX-2GP
1
C107 82579LM-GP
2
2
1
1
1KR2J-1-GP 3K01R2F-3-GP
1
4 4
XTAL-25MHZ-129-GP
KDS 25MHz
18P 30PPM
DSX321G NOTE: VCC1R05LAN WILL WORK AT 0.95V TO 1.15V
3
Supplier Vendor P/N WISTRON P/N L18 R918 3
1 KDS DSX321G 25M 18P 30PPM 82.30020.B11 SHARED WITH PCH VCC1R05LAN SVR NO ASM ASM
2 TXC 7V25020001 25M 18PF 30PPM 41U6141AA
ISVR ASM NO ASM
3 HELE 25MHZ 18P30PPM HSX321G 82.30020.B21
2 2
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
1 GBE LEWISVILLE 1
VCC3GBE VCC3GBE
1
4 4
1
R300
C637 4K7R2J-2-GP
SCD1U10V2KX-5GP
2
-DOCK_ATTACHED_AUX 59
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1
C667 C657 C655 C639
27
10
18
38
56
50
17
U12
5
2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
SEL
NC#5
3 2 48 3
49 MDI_0+ A0 0B1 DOCK_MDI_0+ 59
49 MDI_0- 3 A1 0B2 46 SYS_MDI_0+ 51
49 MDI_1+ 7 A2 1B1 47 DOCK_MDI_0- 59
49 MDI_1- 8 A3 1B2 45 SYS_MDI_0- 51
49 MDI_2+ 11 A4 2B1 43 DOCK_MDI_1+ 59
49 MDI_2- 12 A5 2B2 41 SYS_MDI_1+ 51
49 MDI_3+ 14 A6 3B1 42 DOCK_MDI_1- 59
49 MDI_3- 15 A7 3B2 40 SYS_MDI_1- 51
4B1 37 DOCK_MDI_2+ 59
49 -RJ45_ACTIVITY 19 LED0 4B2 35 SYS_MDI_2+ 51
49,61 -RJ45_LINKUP 20 LED1 5B1 36 DOCK_MDI_2- 59
54 LED2 5B2 34 SYS_MDI_2- 51
6B1 32 DOCK_MDI_3+ 59
59 -RJ45_ACTIVITY_DOCK 22 0LED1 6B2 30 SYS_MDI_3+ 51
52 -RJ45_ACTIVITY_SYS 25 0LED2 7B1 31 DOCK_MDI_3- 59
59 -RJ45_LINKUP_DOCK 23 1LED1 7B2 29 SYS_MDI_3- 51
52 -RJ45_LINKUP_SYS 26 1LED2
52 2LED1
THERMAL_PAD
51 2LED2
2 2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
21
24
28
1
6
9
13
16
44
39
33
55
53
49
57
PI3L500-AZFEX-GP
1
2nd TI TS3L500AERHUR 73.3L500.A0V Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
3rd ST STMUX1800LQTR 73.01800.003
Title
T1
50 SYS_MDI_0- 1 24 RJ45_TXD0N 52
D D
50 SYS_MDI_0+ 2 23 RJ45_TXD0P 52
3 22
4 21
50 SYS_MDI_2- 5 20 RJ45_TXD2N 52
50 SYS_MDI_2+ 6 19 RJ45_TXD2P 52
50 SYS_MDI_3- 7 18 RJ45_TXD3N 52
C C
50 SYS_MDI_3+ 8 17 RJ45_TXD3P 52
9 16
10 15
50 SYS_MDI_1- 11 14 RJ45_TXD1N 52
50 SYS_MDI_1+ 12 13 RJ45_TXD1P 52
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
XFORM-24P-72-GP
DY DY
1
1
75R5J-GP
75R5J-GP
75R5J-GP
75R5J-GP
C7 C19 C21 C1722 C1723 C66
C102
2
2
SC1U10V2KX-1GP R82 R181 R105 R182
B PATTERN MUST BE B
C102 SHOULD BE PLACED SHORT AND WIDE
2
AS CLOSE TO MAGENTICS
AS POSSIBLE
1
R19 C146
ESD REASON 1MR5J-1-GP SC1500P2KV8KX-3GP
2
HIGH VOLTAGE 1500PF
2
CAP IS OPTIONAL
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GBE MAGNETICS
Size Document Number Rev
Custom -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 51 of 100
HTTPS://REALSCHEMATIC.COM
5 4 3 2 1
VCC3GBE
SC1U10V2KX-1GP
1
1
R861 R862
330R2J-3-GP 330R2J-3-GP C628
2
2
2
6
4
D103
SRV05-4ATCT-GP
ESD REASON
3
DY
P/N: 45N4167AA
J715
11
9
A1
GREEN
50 -RJ45_LINKUP_SYS A2
51 RJ45_TXD0P 1
51 RJ45_TXD0N 2
51 RJ45_TXD1P 3
51 RJ45_TXD2P 4
51 RJ45_TXD2N 5
51 RJ45_TXD1N 6
51 RJ45_TXD3P 7
51 RJ45_TXD3N 8
B1
YELLOW
50 -RJ45_ACTIVITY_SYS B2
10
12
RJ45-205-GP-U1
SKT RJ45 8P+2P+2P JM36113-R3A2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1
1
C452 C263
2
2
6
D104
SRV05-4ATCT-GP
1
DY
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
RJ45 CONNECTOR
Size Document Number Rev
HTTPS://REALSCHEMATIC.COM A3
SHINAI-4 UMA -1
Date: Monday, March 12, 2012 Sheet 52 of 100
A B C D E
SC33P50V2JN-3GP
Place
1
SIM Card slot
DY RFC5 VCC1R5B
2
J25 VCC3W AN VCC1R5B
8
4 1 UIM_CLK D52 4
1
nearby
UIM_DATA 4 RCLAMP0502B-GP
SC2200P50V2KX-2GP
J22 C1616 C718
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2 UIM_RESET 2 SC1U10V2KX-1GP SC1U10V2KX-1GP
2
UIM_VPP 5 6 13
1.5V REFCLK+
1
3 UIM_PW R 11 3
RFC6 C1118 C1119 C1156 REFCLK-
6 2
7
DY 3.3V
23 SATA2_RXP 24 1
2
PERN0
28 +1.5V PERP0 25 SATA2_RXN 24
CARDBUS6P-1-GP-U 48
CONN SIM CARD 6P 4250619-SINR06 +1.5V
PETN0 31 SATA2_TXN 24
J22
52 +3.3V PETP0 33 SATA2_TXP 24
1
24 36 USB_W W AN- R631 1 2 0R2-PT5-LILY-GP USBP3- 28
C623 +3.3VAUX USB_D- USB_W W AN+ R629
USB_D+ 38 1 2 0R2-PT5-LILY-GP USBP3+ 28
SC4D7U10V5KX-1GP
2
3 RESERVED#3 SMB_CLK 30 SMB_CLK_W AN 70
5 RESERVED#5 SMB_DATA 32 SMB_DATA_W AN 70
UIM_PW R 8
UIM_DATA RESERVED#8
Near SKT5 10 RESERVED#10
UIM_CLK R1066 1 2 200R2F-L-GP UIM_CLK_R 12 1
UIM_PW R AFTP11 AFTE14P-GP UIM_RESET RESERVED#12 WAKE#
1 14 RESERVED#14 CLKREQ# 7
UIM_DATA 1 AFTP12 AFTE14P-GP UIM_VPP 16 22
RESERVED#16 PERST# -PLTRST_NEAR 28,32,49,58,70
UIM_CLK 1 AFTP13 AFTE14P-GP 17
UIM_RESET AFTP14 AFTE14P-GP RESERVED#17
1 19 RESERVED#19
UIM_VPP 1 AFTP15 AFTE14P-GP 20 4
61 -W W AN_DISABLE RESERVED#20 GND
37 RESERVED#37 GND 9
39 RESERVED#39 GND 15
5
3
41 RESERVED#41 GND 18
3 1 2 43 21 3
29 -W W AN_DTCT R342 RESERVED#43 GND
45 RESERVED#45 GND 26
0R2-PT5-LILY-GP 47 27
RESERVED#47 GND
49 RESERVED#49 GND 29
51 RESERVED#51 GND 34
GND 35
D21 40
1
FTZ6D8EGT148-GP GND
42 LED_WWAN# GND 50
44 LED_WLAN# GND 53
46 54
NP1
NP2
LED_WPAN# GND
VCC3W AN 10KR2J-3-GP
71 MSATA_DTCT_EN
R158 1 2 SKT-MINI52P-68-GP WWAN/mSATA CONTROL TABLE
NP1
NP2
62.10043.B11 WWAN
Place
29 -MSATA_DTCT mSATA YES NO
Q90
C -LED_W IRELESS 42,73 VCC1R5B
R1
B CN11 ASM DY
E LED_W W AN_CONN
J22 and J32 SKT5 ASM DY
SC33P50V2JN-3GP
LTC015TEBFS8TL-GP C433 ASM DY
1st: 62.10043.831 C434 ASM DY
1
1
nearby
C723
C1176 SC1U10V2KX-1GP C435 ASM DY
DY
2 RFC7 SC1U10V2KX-1GP
2
C437 ASM DY
VCC3W LAN VCC1R5B
D35 ASM DY
2 J32 C431 ASM DY 2
C436 ASM DY
SC2200P50V2KX-2GP
6 13
SC1U10V2KX-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC68P50V2JN-1GP
J32
2 3.3V R405 ASM DY
1
23 PCIE_W LAN_RXN 25
C1155 C1117 C1116 28
PERN0
25 PCIE_W LAN_RXP 25 R464 ASM DY
+1.5V PERP0 VCC3B
DY DY 48 Q24 ASM DY
2
+1.5V
31 PCIE_W LAN_TXN 25
52
PETN0
33 PCIE_W LAN_TXP 25
RFC21 ASM DY
RFC9 RFC8 +3.3V PETP0
R457 ASM DY
1
24 +3.3VAUX USB_D- 36 USBP12- 28
38 USBP12+ 28 R591
USB_D+ 10KR2J-3-GP
42 BT_BUSY 3 RESERVED#3 SMB_CLK 30
42 W IFI_BUSY 5 32
2
RESERVED#5 SMB_DATA
8 RESERVED#8
10 RESERVED#10
12 RESERVED#12 WAKE# 1 -PCIE_W AKE 26,56,71
14 RESERVED#14 CLKREQ# 7 -CLKREQ_W LAN 25
16 RESERVED#16 PERST# 22 -PLTRST_NEAR 28,32,49,58,70
17 RESERVED#17
19 RESERVED#19
61 -W LAN_RF_KILL 20 RESERVED#20 GND 4
37 RESERVED#37 GND 9
1
2
39 RESERVED#39 GND 15
41 RESERVED#41 GND 18
VCC3W LAN 43 21
RESERVED#43 GND D53
1 25 CL_CLK_W LAN 45 RESERVED#45 GND 26 <Core Design> 1
25 CL_DATA_W LAN 47 RESERVED#47 GND 27
25 -CL_RST_W LAN 49 29
3
LED_WPAN# GND
62.10043.B11 A3 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 53 of 100
A B C D E
5 4 3 2 1
D D
C C
BLANK
B B
<Core Design>
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.
Title
BLANK
Size Document Number Rev
HTTPS://REALSCHEMATIC.COM A4
SHINAI-4 UMA -1
Date: Tuesday, March 06, 2012 Sheet 54 of 100
5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK
B B
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BLANK
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 55 of 100
5 4 3 2 1
A B C D E
D224
RCLAMP0502B-GP
2
100KR2J-1-GP
100KR2J-1-GP
3
1
10KR2J-3-GP
10KR2J-3-GP
4 4
1
DY DY R198
R194 R195 R20 R17
J28 10KR2J-3-GP
27
2
1
2 USB_EXC- R8 1 2 0R2-PT5-LILY-GP
USB_EXC+ USBP5- 28
3 R9 1 2 0R2-PT5-LILY-GP USBP5+ 28
4 -CPUSB
5
6
7
8
9
10
11 -PCIE_WAKE 26,53,71
J29 12
2 13 -PERST
14
1 15
16 S D -CLKREQ_EXC 25
EXPRESSCARD-2P-18-GP-U 17 -CPPE
18 Q136
DY 19
-PCIE_CLK_EXC 25
PCIE_CLK_EXC 25
20 LSK3541G1ET2L-GP
21 PCIE_EXC_RXN 25
G
22 PCIE_EXC_RXP 25
23
24 EXC_PWRG
PCIE_EXC_TXN 25
25 PCIE_EXC_TXP 25
26
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3 28 3
1
1
1
C2267
C1123 C1122 C1121 SC220P50V2JN-3GP
2
EXPRESSCARD-26P-19-GP
2
2
SKT EXP CARD PUSH 26P 130833-2 SMD
U48
2 12 11 2
1R5VIN 1R5VOUT
14 13
1R5VIN 1R5VOUT
1
2 3 J18 C1124
3VIN 3VOUT SCD1U10V2KX-4GP
4 5 10
2
3VIN 3VOUT
17
AUXIN
15 1
-CPPE 3VAUXOUT
10
-CPUSB CPPE# -PERST USBP8+_CONN R10
9 8 2 1 2 0R2-PT5-LILY-GP USBP8+ 28
CPPUSB# PERST# USBP8-_CONN R12
3 1 2 0R2-PT5-LILY-GP USBP8- 28
1 18 EXC_PWRG 4
58,72,78,84,94 B_ON STBY# RCLKEN
61 -EXC_PWR_SHDN 20 5
SHDN#
4,11,28,60,68,71 -PLTRST_FAR 6 19 6 -SC_DTCT 28
SYSRST# OC#
7
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC2D2U10V3KX-1GP
16 7 8
NC GND
21
GND
1
1
SCD01U16V2KX-3GP
9
SC1U10V2KX-1GP
2
1
C733 C1724
2
1 1
Title
HTTPS://REALSCHEMATIC.COM EXPRESS CARD/SMART CARD I/F
Size Document Number Rev
Custom -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 56 of 100
A B C D E
5 4 3 2 1
D D
C C
BLANK
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
BLANK
Size Document Number Rev
HTTPS://REALSCHEMATIC.COM A -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 57 of 100
5 4 3 2 1
A B C D E
4 4
J11 DY
21
28 LPCCLK_DEBUG_33M 1 2 -PLTRST_NEAR 28,32,49,53,70
LPC_AD[3..0] 24,60,68
3 4 LPC_AD0
24,60,68 -LPC_FRAME 5 6 LPC_AD1
24 -LPC_DREQ0 7 8 LPC_AD2
9 10 LPC_AD3
26,60,68 -CLKRUN
26,60 -SUS_STAT 11 12
24,60,68 IRQSER 13 14
56,72,78,84,94 B_ON 15 16
32,59,63,71 -PW RSW ITCH 17 18
19 20
22 Debug Enable Disable
16MB
VCC3LAN
Marcronix MX25L12835EZNI-10G 72.25128.X01
WSON
A
K
1
SPI_MOSI_R
SCD1U10V2KX-4GP
SC68P50V2JN-1GP
-SPI_CS0_R
SPI_CLK_R
1
SPI1
5 MISO R324.2 5 MOSI R325.1
R322 1 2 15R2J-GP -SPI_CS0_R 1 9
7 (KEY) N/A 7 (RESET) N/A
24 -SPI_CS0 S# GND
24 SPI_MISO R324 1 2 15R2J-GP SPI_MISO_R 2 8
R706 1 DQ1 VCC
2 3K3R2J-3-GP -SPI_W P0 3 W#/VPP HOLD# 7 -SPI_HOLD
4 6 SPI_CLK_R R326 1 2 33R2J-2-GP SPI_CLK 24
VSS C SPI_MOSI_R R325 1
DQ0 5 2 33R2J-2-GP SPI_MOSI 24
1
TP58 1
TPAD32-GP LILY-BIOS-COLAY-GP-U RFC13
SC6P850V2DN
1 DY <Core Design> 1
2
Wistron Corporation
Dual foot print for WSON and SO8 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VCC3B
VCC3GBE DOCK_DCIN20
2
DOCK_PWR20_IN
TABLE
2
J23 WD3M148UQ-1 R302 R117
LOCAL WISTRON NET 10KR2J-3-GP 47KR2J-2-GP
5.5H CONNECTOR Q40
1
3
1
CN1 R1 -DOCK_ATTACHED_3B 35
149 1A DOCK_PWR20_IN 149
1
2
150 2A DOCK_PWR20_IN 2 -DOCKED R2
NP1
151 3A GND LTC015EEB-FS8-GP
152 4A GND 50 DOCK_MDI_0+ 3 4 -PWRON_DOCK 71
50 DOCK_MDI_0- 5 6
EXTPWRG 71
153 5A S_BAT_IN 8
4 50 DOCK_MDI_1+ 9 10 4
154 6A S_BAT_IN 50 DOCK_MDI_1- 11 158
12
155 7A NA 14
156 8A NA 50 DOCK_MDI_2+ 15
17
16
18
50 DOCK_MDI_2-
157 149 GND 20
21 22
158 150 GND 50 DOCK_MDI_3+
50 DOCK_MDI_3- 23 24
159 151 GND 26
28
160 152 GND 157
30
161 153 GND 32
162 154 GND 34
36
163 NP1 NA 37 38 -RJ45_LINKUP_DOCK 50
39 40 -RJ45_ACTIVITY_DOCK 50
164 NP2 NA 45 -DOCK_HPOUT_DTCT
45 -DOCK_MICIN_DTCT
41 42
43 44
45 46
161 160
47 156
48 CRT_RED_DOCK 35
49 50
51 52 CRT_GREEN_DOCK 35
53 54
55 56 CRT_BLUE_DOCK 35
57 58
59 60 CRT_HSYNC_DOCK 35
46 DOCK_MIC_IN_L
61 62 CRT_VSYNC_DOCK 35
43 DOCK_HPOUT_R 63 64 DDCCLK_DOCK 35
43 DOCK_HPOUT_L 65 155
66 DDCDATA_DOCK 35 DOCKID[2..0] 25
67 68
DOCKID0 ACDC_ID 61,73
27 DOCKB_AUXN 69 70
71 72 DOCKID1
27 DOCKB_AUXP
73 74 DOCKID2
27 DOCKB_DP3N 75 76
27 DOCKB_DP3P 77 78
79 80
3
27 DOCKB_DP2N 81 82 3
27 DOCKB_DP2P 83 154
85 86
27 DOCKB_DP1N 87
VCC3B 89 90
27 DOCKB_DP1P -PWRSHUTDOWN 72,73,75,79
91
27 DOCKB_DP0N 93 94
-DOCK_PWRDCT 74
27 DOCKB_DP0P 95 96
97
99 100
-PWRSWITCH 32,58,63,71
162 159
101 153
27 DOCKB_HPD
102 DISCHARGE 60,72
27 DOCKB_DP_DATA 103 104
2K2R2J-2-GP
2K2R2J-2-GP
2K2R2J-2-GP
2K2R2J-2-GP
2
27 DOCKA_DP_CLK -USB_PORT2_OC3 28
27 DOCKA_DP_CLK 115 116
27 DOCKA_AUXN 117 118 USB3P2_RXN 28
27 DOCKA_DP_DATA 27 DOCKA_AUXP 119 152
120 USB3P2_RXP 28
27 DOCKB_DP_CLK 121 122
27 DOCKA_DP3N 123 124 USB3P2_TXN 28
27 DOCKB_DP_DATA 27 DOCKA_DP3P 125 126 USB3P2_TXP 28
127 128
129 130 USBP4-_CONN R188 1 2 0R2-PT5-LILY-GP
27 DOCKA_DP2N USBP4- 28
131 132 USBP4+_CONN R189 1 2 0R2-PT5-LILY-GP
27 DOCKA_DP2P USBP4+ 28
133 134
27 DOCKA_DP1N 135 136
SATA4_RXN 24
27 DOCKA_DP1P 137 151
138
SATA4_RXP 24
139 140
27 DOCKA_DP0N 141 142
SATA4_TXN 24
27 DOCKA_DP0P 143 144
-DOCKED SATA4_TXP 24
145 146
147 NP2
148
DOCK_CONSUMP 75
150
2 2
FOX-CONN148-6R-2-GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
2
VCC3SW
2
SC4D7U6D3V3KX-GP
1KR2J-1-GP
1KR2J-1-GP
SCD1U25V3KX-GP
C666 R1137 C1087 R1138 C764
100KR2J-1-GP
1
2
2
1
1
DCIN_PWR20_F C550 C566
R228
DY DY
1
DCIN_PWR20_F C633
1
2
1 2
1MR2J-1-GP
1
R123
1
1MR2J-1-GP R608
0R2J-2-GP VCC3M
1
AGND
D
2
Q148
1MR2J-1-GP
2
LSK3541G1ET2L-GP
Q149 R165 G
DCIN_PWR20_F
D
2
LSK3541G1ET2L-GP AGND
100KR2J-1-GP
1
-DOCK_ATTACHED_BAT_OP G R603
S
2
0R2J-2-GP
1MR2J-1-GP
R175
1MR2J-1-GP R229 D61 DOCK_PWR20 DOCK_PWR20_IN
D
1
R230 DAN222GTL-GP
DY
1
Q43 Q85
S
G LSK3541G1ET2L-GP D26 1 1 S D 8
1
-DOCK_ATTACHED_3M 61 S D 7
2
A K 3 3 S D 6
73,75 -DOCK_ATTACHED_BAT_OP G D 5
4
RB520SM-30T2R-GP 2
S
2
-DOCK_ATTACHED_AUX 50
200KR2J-L1-GP
D
2
1MR2J-1-GP
1
60,72 DISCHARGE
1
1 D2 R657 1
1
K A -DOCK_ATTACHED_20 1 2
S
100KR2J-1-GP
1SS400GGT2R-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DOCKING CONNECTOR
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
-1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 59 of 100
A B C D E
A B C D E
VCC3M
RN6 RN7
1
2
1
2
SRN4K7J-8-GP
SRN4K7J-8-GP
4 4
VCC3B VCC3M
4
3
4
3
I2C_CLK_BT0
I2C_DATA_BT0
100KR2J-1-GP
100KR2J-1-GP
1
1
10KR2J-3-GP
8K2R2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
I2C_CLK_BT1
10KR2J-3-GP
1
I2C_DATA_BT1
R246 DY DY DY R241 R240 R235 R231
R248
U23A 1 OF 3
2
2
8K2R2J-3-GP
KSI3
20KR2J-L2-GP
SENSE4
1
L6 D9
10KR2J-3-GP
24,58,68 -LPC_FRAME LFRAME# KSI4
1
C10 SENSE5
KSI5 SENSE6
28 LPCCLK_EC_33M N6 PCI_CLK KSI6 D6
B7 SENSE7 R258 R259 R263
LPC_AD0 KSI7
M6 LAD0
LPC_AD1
2
M7
2
LPC_AD2 LAD1
L7 LAD2
LPC_AD3 K7 E2
LAD3 GPIO164 -HOTKEY 63
24,58,68 LPC_AD[3..0]
KBRST F1 -KBRC 29
77 M_BATVOLT K3 ADC0 Battery A20M C7 KBGA20 29
74 M_TEMP R250 1 2 1KR2J-1-GP M_TEMP_EC K1
ADC1
77 S_BATVOLT L2 VCC3M
R252 1 ADC2
2 1KR2J-1-GP S_TEMP_EC M1
74 S_TEMP ADC3
VIDEO_ID
74 I2C_DATA_BT0 K13 SMB0_DATA High:Discrete
1
74 I2C_CLK_BT0 H13 SMB0_CLK
2 2
74 I2C_DATA_BT1 K11
J12
SMB1_DATA
R1830
100KR2J-1-GP DY Low:UMA
74 I2C_CLK_BT1 SMB1_CLK
0R2-PT5-LILY-GP
2
75 I2C_DAT_CHARGE 1 R253 2 I2C_DAT_CHARGE_R F12 SMB2_DATA/PS2_CLK1B
75 I2C_CLK_CHARGE 1 R255 2 I2C_CLK_CHARGE_R E12 SMB2_CLK/PS2_DAT1B VCI_IN2# C2 -LPMODI_ON 75
0R2-PT5-LILY-GP G1 VIDEO_ID
VCI_IN1#
SMBUS port for charger VCI_IN0# D2 -KBD_BL_DTCT 63
74 BAT_FET_HOT L3 ADC11
26 -BATLOW M2 R267
GPIO214/ADC12 IPDCLK_EC
PS2_CLK0A M13 1 2 33R2J-2-GP IPDCLK 64
77 BATMON_EN M12 J13 IPDDATA_EC 1 2 33R2J-2-GP
GPIO1/PWM4 PS2_DAT0A IPDDATA 64
R268
L9
SC220P50V2JN-3GP
59,72 DISCHARGE
SC220P50V2JN-3GP
GPIO16/FAN_TACH3
1
100KR2J-1-GP
75 ISYS R249 1 2 0R2-PT5-LILY-GP ISYS_EC J2 ADC8
1
1
R547 C1970 C1971
75 -BOOST_MODE N13 GPIO53/PWM0
2
2
1
R8565
1
2K2R2J-2-GP MEC1619L-AJZP-GP
DY
1
C1972 R256
<Variant Name>
2
1 SCD1U10V2MX-3GP 100KR2J-1-GP 1
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Place Near EC
Title
Embedded Controller (1/3)
HTTPS://REALSCHEMATIC.COM Size
A3
Document Number Rev
SHINAI-4 UMA -1
Date: Monday, March 12, 2012 Sheet 60 of 100
A B C D E
A B C D E
VCC3M
VCC3SW
VCC3M
4 4
100KR2J-1-GP
100KR2J-1-GP
1
1
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
10KR2J-3-GP
100KR2J-1-GP
100KR2J-1-GP
1
1
R287
DYR555
10KR2F-2-GP
R6389 R269 R270 R274 R275 R277 R281 R289 100KR2J-1-GP
2
U23B 2 OF 3
2
2
71 -PW RSW E1 VCI_IN3#/GPIO0 GPIO34 F5 -GSENSE_ON 67
1
RB521SM-30T2R-GP GPIO36
59,73 ACDC_ID N3 ADC7/GPIO207
E4 560R2J-3-GP -W LAN_RF_KILL 53
GPIO24
75 -90W _AC H12 GPIO130/SMB10_DATA
GPIO23 C5 -W W AN_DISABLE 53
75 -LPMODE C3 GPIO234
GPIO22 D5 BDC_ON 42,53,73
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
2 2
1MR2J-1-GP
41 -BAY_ATTACH L1 GPIO212/ADC10 SPI_CLK J9 ECSPI_CLK 71
SPI_MOSI K9 ECSPI_MOSI 71
BAY_MEDIA_EJECT_EC# 1 2 -BAY_MEDIA_EJECT_EC L12 K8
GPIO14/PWM6 SPI_MISO ECSPI_MISO 71
SPI_CS# L10 -ECSPI_SS 71
1
R279 BAY
1KR2J-1-GP
R556 R543 R283 R285 R286
from/To ThinkEngine
2
1
MEC1619L-AJZP-GP
1
R278
10KR2J-3-GP
2
Q154
C
R1 B
E
41,71 -BAY_MEDIA_EJECT
LTC015TEBFS8TL-GP
<Core Design>
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Embedded Controller (2/3)
HTTPS://REALSCHEMATIC.COM Size
A3
Document Number Rev
SHINAI-4 UMA -1
Date: Monday, March 12, 2012 Sheet 61 of 100
A B C D E
A B C D E
VCC3M
-PROCHOT 4,80
4 R410 4
10R2J-2-GP
place near Q155 2 1
VCC3M
1
SC10U6D3V3MX-GP
SC4D7U6D3V3KX-GP
1
PROCHOT_EC G C1975
1
C1974
Q155 SC47P50V2JN-3GP
1
1
1
C1976 C1978 C1979
2
1
C1977
2
R293
2
S
2
100KR2J-1-GP LSK3541G1ET2L-GP
0R0402-PAD-1-GP
1
1
DY
0R2J-2-GP
2
2
47KR2J-2-GP
47KR2J-2-GP
47KR2J-2-GP
10KR2J-3-GP
1 100KR2J-1-GP
1 100KR2J-1-GP
1 100KR2J-1-GP
1 100KR2J-1-GP
VCC3M
VBAT_EC
VCC3M VCC1R05B_VTT VCC3B
Q156
1 3
1
R1 -SHUTDOWN 72
11,26,32,61,70,72 BPWRG 1
G4
G3
C4
H9
H4
P70_PDTC115EE_E
K6
J8
J5
J1
J3
2
1
U23C 3 OF 3 R2
DY
1
R450 R452 R453 LTC015EEB-FS8-GP
VTR0
VTR1
VTR2
VTR3
VTR_REG
VR_CAP
VBAT
VTR_FLASH
AVTR_ADC
VREF_ADC
1
10KR2J-3-GP 0R0603-PAD-1-GP 4K7R2J-2-GP C1980
2
2
R454 SCD1U10V2KX-4GP
R294
R391
R395
R396
R397
R398
R400
R403
1KR2J-1-GP
2
2
H1 A1 VCC1R05B_VTT_VREF -THRM
GPIO33 VREF_VTT
A2 MISC Thermal A3 PECI_EC 2 1
R411 GPIO43 PECI_DAT PECI 4
TP933 R1777 43R2J-GP
TPAD14-OP-GP 1 -MEC_DBG_TF_RST 1 2 -MEC_DBG_TF_RST_EC D3
GPIO175
3 0R3-PT5-LILY-GP G13 DXP1 3
DP1_DN4
C11 F13 DXN1
1
GPIO104/UART_TX DN1_DP4
A10 E13 DP2_DN5 C1981
GPIO105/UART_RX DP2_DN5 SC2200P50V2KX-2GP
2
B10 D13 DN2_DP5
GPIO25/UART_CLK DN2_DP5
DP3_DN6
VCC3M DP3_DN6
C13 Placed near MEC1619
PROCHOT_EC F2 B13 DN3_DP6
GPIO106 DN3_DP6
E
K12 A13 2SC4617GZTL-GP Q160
C
1
1
GPIO15/PWM7 VSET
B
N8 F9 -THRM_EC R446 1 2 0R2J-2-GP -THRM C1984 C1985 Q159 C1986 B
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
2
C
1
63 KBD_BL_PWM B4 E9 2SC4617GZTL-GP
E
GPIO153/LED2 V_IN VCC3B
N2
GPIO215/ADC13 Placed near MEC1619 Placed near Diode 5 Remote Diode 5 Placed near Diode 2 Remote Diode 2
VCC1R05B_VTT DC/DC CPUCORE DC/DC
1
M4
2
GPIO216/ADC14
J10
E
SMB5_DATA/GPIO141 EC_SDA2 25
R415
R416
R417
R424
R428
C
EC_SCL2 25
1
GPIO62 SMB5_CLK/GPIO142 100KR2J-1-GP B
C1987 C1989 Q162 C1988 B
2
SC2200P50V2KX-2GP SC22P50V2JN-4GP SC22P50V2JN-4GP
2
C
TP934 FAN K2 2SC4617GZTL-GP
E
ADC9/GPIO211 FAN_ID 66
TPAD14-OP-GP 1 JTAG_TDI C12
TP935 GPIO145/SMB9_DATA
PWM1/GPIO54
M10 FAN_ON 66,71 Placed near MEC1619 Placed near Diode 6 Remote Diode 6 Placed near Diode 3 Remote Diode 3
TPAD14-OP-GP 1 JTAG_TDO B12
TP936 GPIO146/SMB9_CLK
N9 WLAN Memory
FAN_TACH1/GPIO51 FAN_FRQ_ASIC 71
TPAD14-OP-GP 1 JTAG_CLK B11
TP937 GPIO147/SMB8_DATA
TPAD14-OP-GP 1 JTAG_TMS A12
GPIO150/SMB8_CLK
JTAG_RST A11
JTAG_RST#
VSET_R
MEC_DBG_DATA R412 1 2 22R2J-2-GP MEC_DBG_DATA_EC D7
MSDATA/GPIO171
MEC_DBG_CLK R414 1 2 22R2J-2-GP MEC_DBG_CLK_EC D8
2 MSCLK/GPIO170 2
D1
VCI_OUT
Debug
SCD1U10V2KX-5GP
DY
10KR2J-3-GP
1
VSS_ADC
C1990
VSS_RO
R422
BGND
VSS0
VSS1
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
1 100KR2J-1-GP
1 100KR2J-1-GP
2
TP938 TP939
1 1KR2J-1-GP
1 1KR2J-1-GP
2
1
TPAD14-OP-GP
TPAD14-OP-GP
MEC1619L-AJZP-GP R443
J4
J6
H5
K4
E3
4K53R2F-1-GP
2
1
R63902
R429
R399
R431
R439
R442
R8562
1 1
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Embedded Controller (3/3)
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A2 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 62 of 100
A B C D E
Keyboard Connector
VCC5B
VCC3M
SCD01U16V2KX-3GP
FUSE-1A24V-2-GP
1
2
VCC5B VCC3M
C296 F13 F21
FUSE-1A24V-2-GP
1
RN1 RN2 RN3 RN4 RN5
VCC3M_TP_FUSE
VCC5B_TP_FUSE
4
3
4
3
4
3
4
3
4
3
SRN4K7J-8-GP
SRN15KJ-3-GP
SRN15KJ-3-GP
SRN15KJ-3-GP
SRN15KJ-3-GP
J7
VCC3M
1
2
1
2
1
2
1
2
1
2
60 DRV[15..0] 42 41
DRV4 2 1 -HOTKEY 60 VCC5B
100KR2J-1-GP
DRV8 6 5 SENSE0
1
DRV6 8 7 SENSE3
DRV3 10 9 SENSE2
2
DRV7 12 11 SENSE4 R140
DRV2 14 13 SENSE1 F28
VCC5B DRV10 16 15 SENSE6 FUSE-1A24V-2-GP
2
DRV1 18 17 SENSE7
DRV9 20 19
1
-PWRSWITCH 32,58,59,71
1
DRV0 22 21
DRV11 -LEDPWR_CONN R13 -KBD_BL_DTCT 60
24 23 1 2 220R2J-L2-GP -LEDPWR 61
R132 DRV14 26 25 KBD_BL_PWM 62
10KR2J-3-GP DRV12 28 27
DRV15 30 29 VCC5B_BACKLIT
2
R548 DRV13 32 31
3K9R2J-1-GP 34 33 -LED_MUTE_D R41 1 2 3K9R2J-1-GP -LED_MUTE 71
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC220P50V2KX-3GP
100KR2J-1-GP
1 2 -LEDMICMUTE_R 36 35
71 -LEDMICMUTE
1
38 37 TP4DATA 64
2
71 TP4_RESET 40 39 TP4CLK 64
44 43 R155 C2083 C2084
C2082
1
near by J7
2
JAE-CONN40A-1-U1GP
HOTKEY# IPDCLK
DRV4 to R521
Keyboard Connector Top View
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
KEYBOARD CONNECTOR
Size Document Number Rev
Custom -1
SHINAI-4 UMA
HTTPS://REALSCHEMATIC.COM Date: Monday, March 12, 2012 Sheet 63 of 100
5 4 3 2 1
VCC5B
SCD01U16V2KX-3GP
FUSE-D5A24V-1-GP
1
100KR2J-1-GP
100KR2J-1-GP
1
1
4K7R2J-2-GP
4K7R2J-2-GP
D C5 F15 D
R24 R25 R18 R15
2
J714
VCC5B_TP
29
1 SMB_CLK_3B 12,13,70
2
3
4 -PAD_DETECT 71
5 TP4DATAPAD
6 TP4CLKPAD VCC3FP
7 SMB_DATA_3B 12,13,70
8
9 -PAD_RESET 71
10 PADCLK
11 PADDATA R1702 1 2 47KR2J-2-GP 3FP_ON 72
12
13
14
15 This trace(VCC3FP)should
16 R1701 D214
17 be routed by wide pattern 1 2 K A
71,78 M1_ON
1
18 for power.
19 1KR2J-1-GP 1SS400GGT2R-GP C1713
20 SCD1U10V2KX-4GP
2
1
21 -POA_WAKE 71
22 -PCH_SLP_S3 26,32,61,71,79
23 F6
POA_PWRREQ 71 POLYSW-D5A6V-1-GP
24 POA_ACTIVE 61
25
2
USBP10+ 28
26 USBP10- 28 F6 is polyswitch
27
28 VDD_FPC
C 30 C
ACES-CON28-5-GP-U
DY
1
1
CONN FPC 28P SMD 51519-02841-001 C1991 VCC3M VCC3FP
SC1KP50V2KX-1GP C643 C208
SC4P50V2CN-GP SC2D2U6D3V3MX-1-GP
2
6
Q103
RW1E014SNT2R-GP
VCC5B
VCC5B
1
SCD01U25V2KX-3GP
72 3FP_DRV
2
2
2
1
C678
C6 R26 R32 SC1KP50V2KX-1GP
100KR2J-1-GP 100KR2J-1-GP VCC3SW
1
2
U131
1
16 4 IPDCLK 60
VCC 1A TP4CLKPAD
7
2A
9 IPDDATA 60
PADCLK 3A TP4DATAPAD
B 2 12 B
1B1 4A
63 TP4CLK 5
PADDATA 2B1 Q121
11 15
3B1 OE# RTM002P02GT2L-GP
14 D215
4B1
1 BYPASS_PAD_QSW 71
DY
S
3 S D A K
1B2
6
2B2
63 TP4DATA 10 8
3B2 GND
13 17 RB521SM-30T2R-GP
4B2 GND
DY
1
D90
G
CBT3257ABQ-GP C1314
SCD1U10V2KX-4GP A K
2
RB521SM-30T2R-GP
71 -POA_ENABLE D216
A K
DY
1
Near J714 C1313 RB521SM-30T2R-GP
PADDATA 1 AFTE14P-GP AFTP16 SC1U10V2KX-1GP
2
PADCLK 1 AFTE14P-GP AFTP17
-PAD_RESET 1 AFTE14P-GP AFTP18
VCC5B_TP 1 AFTE14P-GP AFTP19
TP4CLKPAD 1 AFTE14P-GP AFTP20
TP4DATAPAD 1 AFTE14P-GP AFTP21
-PAD_DETECT 1 AFTE14P-GP AFTP22
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
HTTPS://REALSCHEMATIC.COM
Title
4 4
3
BLANK 3
2 2
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 Taipei Hsien 221, Taiwan, R.O.C. 1
Title
BLANK
Size Document Number Rev
HTTPS://REALSCHEMATIC.COM A -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 65 of 100
A B C D E
A B C D E
4 4
VCC5B
AFTP2
6
FAN CURRENT AFTE14P-GP
F4
IS 0.5A MAX FUSE-2A24V-1-GP VCC5B_FAN 4
1
3
2
FUSE 2.0A Q1 2
6 1 1
1
ACES-CON4-14-GP
5 2 C301 J15
5
VCC5B_FANFUSE 4 3 SCD1U16V2KX-3GP
3 3
SCD01U16V2KX-3GP
SSM6J402TU-GP FAN_ID 62
1
1
DY
1
AFTP29 AFTP36
2
AFTE14P-GP AFTE14P-GP
1
R212
1
1KR2J-1-GP
2
R218 Q81
100R2J-2-GP 3
FAN_FRQ_Q53 R1 FAN_FRQ 71
1
2
1
2
R2
3
2 Q77 LTC015EEB-FS8-GP 2
AFTP35
1 R1 AFTE14P-GP
62,71 FAN_ON
R2 FAN_ID Thermal module
LTC014EEB-FS8-GP
2
<Core Design>
1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
FAN Control
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 66 of 100
A B C D E
A B C D E
VCC3M
VCC3_ACCEL
R885
4 VCC3M_Q105 1 2 4
Place close to EC
SCD1U10V2KX-4GP
10R3J-3-GP
SC10U10V5KX-2GP
1
1
Q105
C969 C829 VCC3B
R2
LTA014EEB-FS8-GP
R1
2
1
1
R125
100KR2J-1-GP
61 -GSENSE_ON
DY
1
GND_ACCEL
DY R344
2
R401 GSENSE_Z_R 1 2 GSENSE_Z 61
100KR2J-1-GP
DY
2
56KR2J-L1-GP
1
C704 C703
14
15
3 3
U65 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
2
DY
VDD
RES
61 GSENSE_TST 2 ST
3 8 GND_ACCEL
GND VOUTZ R970
5 10 GSENSE_Y_R 1 2 GSENSE_Y 61
GND VOUTY
1
6 GND
R957 7 12
GND VOUTX 56KR2J-L1-GP
1
100KR2J-1-GP
1 C830 C956
NC#1 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
11
2
2
NC#11
4 NC#4
NC#13 13
GND_ACCEL
9 NC#9 NC#16 16 R969
GSENSE_X_R 1 2 GSENSE_X 61
1
LIS34ALTR-1-GP
56KR2J-L1-GP
1
2 RJ44 2
0R0402-PAD-1-GP C847 C938
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
2
2
GND_ACCEL
GND_ACCEL
U38
Width = 6 mil & Spacing = 10 mil
Primary STMicro LIS34AL 41R0828AA for three Output traces
Second Kionix KXTC8-2850 74.KXTC8.0BZ
<Core Design>
Third
Wistron Corporation
1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, 1
Layout Comment : Taipei Hsien 221, Taiwan, R.O.C.
G-SENSOR
Size Document Number Rev
HTTPS://REALSCHEMATIC.COM A4
SHINAI-4 UMA -1
Date: Monday, March 12, 2012 Sheet 67 of 100
A B C D E
5 4 3 2 1
D VCC3B VCC3B D
1
R149
10KR2J-3-GP
1
C379 U39
2
SCD1U10V2KX-4GP
2
10 VPS LRESET# 16 -PLTRST_FAR 4,11,28,56,60,71
24 VPS
LFRAME# 22 -LPC_FRAME 24,58,60
1 NC#1 LPCPD# 28
2 NC#2
6 NC#6 SERIRQ 27 IRQSER 24,58,60
9 VNC#9
26,58,60 -CLKRUN 15 NC#15 LCLK 21 LPCCLK_CRYPT_33M 28
C 3 C
NC#3
7 26 LPC_AD0
PP LAD0 LPC_AD[3..0] 24,58,60
23 LPC_AD1
LAD1 LPC_AD2
5 NC#5 LAD2 20
8 17 LPC_AD3
VNC#8 LAD3
12 NC#12
13 NC#13
14 NC#14 GND 4
19 NC#19 GND 11
25 NC#25 GND 18
ST33ZP24AR28PVSC-GP
B B
<Core Design>
4 4
3 3
BLANK
2 2
<Variant Name>
1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BLANK
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 69 of 100
A B C D E
A B C D E
EEPROM
VCC3B VCC3M
4 4
1
R577 VCC3M
4K7R2J-2-GP
U22
Vendor U22 Part Number
2
1 NC#1 VCC 8 1st ROHM BUL08-1FVJ-W 72.BUL08.A0Q
Q97 2 7
PROT_EEPROM NC#2 WP SMB_CLK
C 3 PROT# SCL 6
R1 SMB_DATA
B 4 5 2nd NXP PCA24S08ADP 72.24S08.A0Q
SCD01U16V2KX-3GP
GND SDA
E
1
LTC015TEBFS8TL-GP BUL08-1FVJ-W GE2-GP C1992 3rd Sanyo LE26CAP08TT 72.26C08.00R
2
-PLTRST_NEAR 28,32,49,53,58
1
R55 ASM ASM NO ASM NO ASM NO ASM NO ASM NO ASM NO ASM
R30 R45 R177 R150
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP R291
47KR2J-2-GP Logic
2
R207 U132
2
33R2J-2-GP
12,13,64 SMB_CLK_3B 1 2 1 A VCC 5
25 SMB_CLK 2 Q84
B
3 GND OE 4 C
R1 B BPW RG 11,26,32,61,62,72
E
TC7SB385FU-GP-U
2 LTC015TEBFS8TL-GP 2
R208 U31
33R2J-2-GP SMB_3B_EN 28
12,13,64 SMB_DATA_3B 1 2 1 A VCC 5
25 SMB_DATA 2 B
3 GND OE 4
VCC3W AN
VCC3W AN
1
TC7SB385FU-GP-U
C25
DY DY
1
1
SCD01U16V2KX-3GP
2
1
2
R214 U137
2
33R2J-2-GP
53 SMB_CLK_W AN 1 2 1 A VCC 5
25 SMB_CLK 2 Q88
B
3 4 C
GND OE DY R1 B BPW RG 11,26,32,61,62,72
E
TC7SB385FU-GP-U
LTC015TEBFS8TL-GP
R215DY U33 DY
33R2J-2-GP SMB_3B_EN 28
53 SMB_DATA_W AN 1 2 1 A VCC 5
25 SMB_DATA 2 B <Core Design>
1 3 GND OE 4 1
C1993 Title
SCD01U16V2KX-3GP
EEPROM/SMBUS SW
2
HTTPS://REALSCHEMATIC.COM Size
A3
Document Number Rev
SHINAI-4 UMA -1
Date: Monday, March 12, 2012 Sheet 70 of 100
A B C D E
A B C D E
1
47KR2J-2-GP
47KR2J-2-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
1
1
DY DY DY
10KR2J-3-GP
R492
R490 R871 R488 R489 R874
2
U35A 2 OF 2
-EXTPWR_ASIC R858 R494 R495 R497 R501 R503 R506 R508 R510 R507 40 32 AC_PRESENT 26,32
EXTPWR# AC_PRESENT R470 1 2 0R2-PT5-LILY-GP
26,32,61,64,79 -PCH_SLP_S3 37 95
SLP_S3# EON R482 1
36 94 2 0R2J-2-GP
4
26,32 -PCH_SLP_S4
35
SLP_S4# MON
93 DY M1_ON 64,78
4
26,32,61 -PCH_SLP_S5 SLP_S5# LANON VCCLAN_ON 72
26,32 -PCH_SLP_LAN 34 92
SLP_LAN# MEON AMT_ON 85
26,32 -PCH_SLP_M 33
SLP_M# AON
91
A1_ON 78 MON is NC on KN4.
26,32 SUSPWRDNACK 31 90
SUS_PWR_ACK BON B1_ON 78
82 89
EPWRG CPUON IMVP_ON 78
88
IGFXON
4,11,28,56,60,68 -PLTRST_FAR 127 87
PLTRST# DGFXON
-PWRSW_ASIC 39 86
PWRSW# FPSON1
26,53,56 -PCIE_WAKE 38 85
PME# FPSON2
84
FPSON3
113 83
61 -MISCSMI EXTSMI# FPSON4 VCC3WLAN_ON 72
59 EXTPWRG 114
EXTPWRG_DOCK
115 128
59 -PWRON_DOCK PWRON_DOCK# EC_RST# -EC_RESET 60
3
GPU_RST#
2 4
63 TP4_RESET TP4RST# MISC_RST#
1
64 -PAD_RESET PADRST#
64 -PAD_DETECT 126 6
PADDETECT LEDSUS# -LEDSUS 73
125 7
64 BYPASS_PAD_QSW BYP_PAD_QSW LEDFUEL0# -LEDFUEL0 73
8
LEDFUEL1# -LEDFUEL1 73
24 -DASPHDD 117 10
DACT# LEDDRIVE# -LEDDRIVE 73
118 9
ULTRAOK LEDMUTE# -LED_MUTE 63
116 5 -LEDMICMUTE 63
64 -POA_ENABLE HDD_DTCT# LEDMICMUTE#
18 124 VGA_BLON 27
LGPIO0 BLON_IN
19 123
42 USB_ON1 LGPIO1 BLON_OUT BACKLIGHT_ON 34
20
78 WWAN_ON LGPIO2
21 16
DUPLICITY_ENABLE_TK LGPIO3 MGPIO4/USB_ON1
22 17
LGPIO4 MGPIO5/USB_ON2 MSATA_DTCT_EN 53
23
42 USB_ON2 LGPIO5
24 12
42 AO_USB_SEL LGPIO6 MGPIO0/PCHPWRG PCHPWRG 26,32
25
LGPIO7
40 -HDD_DTCT 26 81
PGPIO0 MTRCL M_TRCL 76
61,73 LID_SWITCH 27
PGPIO1 STRCL
80
S_TRCL 76 S_TRCL is added as SN3 design.
28 79
64 POA_PWRREQ
29
PGPIO2 BATCRG BAT_CRG 76 DB2 did not have this signal.
41,61 -BAY_MEDIA_EJECT PGPIO3
13 FAN_FRQ 66
MGPIO1/FANFRQ_IN
14
MGPIO2/FANFRQ_OUT FAN_FRQ_ASIC 62
121 15 FAN_ON 62,66
SW_RST MGPIO3/FAN_ON
3 112 ECSPI_CLK_R R921 1 2 33R2J-2-GP 3
SPICLK ECSPI_CLK 61
120 111 ECSPI_MOSI_R R928 1 2 33R2J-2-GP
26,60 SUSCLK_32K CLK32K SPIMOSI ECSPI_MOSI 61
110 -ECSPI_SS_R R931 1 2 33R2J-2-GP
SPISS# -ECSPI_SS 61
122 109 ECSPI_MISO_R R463 1 2 0R2J-2-GP
SCD047U16V2KX-1-GP
TEST1
TEST2
TEST3
NC#122 SPIMISO ECSPI_MISO 61
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
1
1
150KR2J-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
1
1
1KR2J-1-GP
R493 C1994 R455 R457 R458 R468 R469 TB62D515FG-GP
106
107
108
R467 R875 R890 R907
2
2
2
R459 R487 R466 R7003
VCC3SW
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
VCC3M
VCC3SW
1
1
VL5 R865 C254 C273 C283
1
10KR2J-3-GP
2
R53 D1
2
1
47KR2J-2-GP A K
61 -PWRSW
2
R579
DY
D
K
64 -POA_WAKE 1 2
D77
Q65 G 0R2J-2-GP D76 RB521SM-30T2R-GP
LSK3541G1ET2L-GP 1SS400GGT2R-GP
1
VCC3SW
A
A
C529
SC1KP50V2KX-1GP
S
1
2 R868 R870 2
61,75 -EXTPWR
0R2J-2-GP 4K7R2J-2-GP
2
2
-PWRSW_ASIC
1
C316
SCD22U10V2KX-1GP
2
1 1
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Think Engine 1/2
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
Custom -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 71 of 100
A B C D E
A B C D E
VREGIN20 VINT20
VREGIN20
VCC5M
1
VCC3SW VDD15 VCC5M
R538
10R3J-3-GP
1
R531
R535
2
20R5J-GP
20R5J-GP
R537
100KR2J-1-GP 100KR2J-1-GP 1D78MR2F-GP R533 R534 D8 D56 D62
K A R_VDD15 K A R_VDD15_D K A
1
C1995
4 4
RIKAN_VINT20
SCD1U25V3KX-GP
VCC3SW
RB521SM-30T2R-GP RB521SM-30T2R-GP RB521SM-30T2R-GP
TP941 1 1 TP942
1
TPAD14-OP-GP TPAD14-OP-GP C1996
SC1U10V3KX-3GP
1
RINKAN_VRGEIN20_D C1997 C238 C610
2
RINKAN_VRGEIN20 SC1U25V3KX-1-GP SC1U25V3KX-1-GP SC1U25V3KX-1-GP
2
1
SC2D2U25V5KX-1GP
C1998
1
R528 R529 VCC3M VCC5M VDD15
103
1D24MR2F-GP 0R2J-2-GP
99
65
64
54
U35B 2 OF 1
SCD1U25V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
2
C1999
VREGIN20
VINT20
VCC3SW
VDD15
VCC5M
1 2
1
SC470P50V2KX-3GP C2000 C2001 C2002
2
RINKAN_BATVOLT 100 BAT_VOLT RINKAN_CP12OUT2
CP15OUT2 63
59 62 RINKAN_CP12OUT1
SW_CTRL_EN# CP15OUT1
These pins are used for VCC3SW force off. 102 SW_OFF#
44 69
100R2J-2-GP
100R2J-2-GP
RD7_ON RD7_DRV
1
RB521SM-30T2R-GP A K SC1U25V3KX-1-GP 66 75
VCPIN25 S1_DRV S1_DRV 74
1
S2_DRV 77 S2_DRV 74
C679 RB521SM-30T2R-GP R518 R517
SCD01U25V2KX-3GP 30 73 2KR2J-1-GP 10KR2J-3-GP
59,60 DISCHARGE BAT_DRV 74
2
DISCHARGE BAT_DRV
74 DCIN_DRV 73
2
DCIN_DRV
1
98 96
TH_DTCT PWRSHUTDWN# DY
1
VCC3SW C2004
2 SC470P50V2KX-3GP R516 1 2
2 0R2J-2-GP
DGND1
DGND2
DGND3
PGND1
PGND2
3M_PW RG 79
2
AGND
VCC3SW
1
DY R512 1 2 0R2J-2-GP 5M_PW RG 79
-PW RSHUTDOW N R539 1 2 0R2J-2-GP TB62D515FG-GP
119
11
41
70
52
101
1
R520
33KR2J-3-GP
33KR2J-3-GP
R522
2
-PW RSHUTDOW N 59,73,75,79
2
62 -SHUTDOW N
PTC Position
SCD1U10V2KX-4GP
1
NTC-540-GP
NTC-540-GP
NTC-540-GP
NTC-540-GP
NTC-540-GP
NTC-540-GP
RT1 Q34(MAIN BATTERY INPUT)
1
TH_RT8_3
TH_RT9_4
1TH_RT1_7 2
1TH_RT3_9 2
1TH_RT4_102
1TH_RT5_112
2
TH_RT10_5
TH_RT11_6
TH_RT7_2
RT4
RT5 Q85(DOCKING)
1
NTC-540-GP
NTC-540-GP
NTC-540-GP
NTC-540-GP
NTC-540-GP
1
RT6 U20(VCCCPUCORE PHASE 2) <Variant Name> 1
RT2 RT4 RT6 RT8 RT10
RT7 U21(VCCCPUCORE PHASE 1)
RT8 CPU DIE(U58) Wistron Corporation
2
FUSE-D5A24V-1-GP
FUSE-D5A24V-1-GP
2
2
GF-52P-5-GP
WIDE
51 52 F8 F24 (10MIL)
51 52
43 MIC_CLK 49 50 PATTERN for each VCC3B
49 50
47 48
1
D 47 48 D
43 MIC_DATA 45 46
45 46
43 44
43 44
41 42 ACDC_ID 59,61
41 42
39 40 -DOCK_ATTACHED_BAT_OP 59,75
39 40
71 -LEDSUS 37 38 -INT_MIC_DTCT 29
37 38 VCC3MLEDBD
71 -LEDFUEL0 35 36
35 36
33 34
02 Do not mirror
71 -LEDFUEL1 33 34
42,53 -LED_WIRELESS 31 32
31 32 DCIN_PWR20_CONN
71 -LEDDRIVE 29 30
K
29 30 VCC3_MIC
42,53,61 BDC_ON 27 28
27 28
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
25 26 D7002
25 26
1
1
EMC7 EMC8 EMC9 EMC10 EMC11 23 24 VCC3SW_HALL UCLAMP3301H-GP
61 -BAY_UNLOCK 23 24
21 22
61,71 LID_SWITCH 19
21 22
20 DY
2
2
19 20
61 KBD_LIGHT_ON 17 17 18 18
15 16
A
15 16
13 13 14 14
11 11 12 12
9 9 10 10
7 7 8 8
5 6
Near CN3 For Camera 28
28
USBP13+
USBP13- 3
5
3
6
4 4
1 1 2 2
Top Bottom
CN3
C C
4.5A
DCIN_PWR20_CONN DCIN_PWR20_F
PLACE NEAR CONNECTOR
Little Fuse DOCK_PWR20 VINT20
429007L, 7A/24V
R380
F2 Q9 Q36
1 2 1 S D 8 CV20 1 S D 8 1 2
2 S D 7 2 S D 7
FUSE-7A24V-7-GP 3 S D 6 3 S D 6 D01RL1632F-L-GP-U1
1
4 G D 5 D13 K A 1SS400GGT2R-GP 4 G D 5
1
1
R369 R143 C93
1
1
C2006
2
1
SCD01U25V2KX-3GP Q33
2
C101
2
R2
2 SCD01U25V2KX-3GP
2
1 RJ64 RJ65
R1
3 0R0201-PAD-GP 0R0201-PAD-GP
1
R340 LTC015EEB-FS8-GP
1
1
270R2J-L-GP
R145
Q107 100KR2J-1-GP
2
R2
2 R238 R224
1 72 DCIN_DRV 1 2 1 2
2
B R1 B
3
0R2J-2-GP 100KR2J-1-GP
LTA014EEB-FS8-GP
DY
Q51 Q12
R2
3 2 75 DCIN_CURRENT_P
1 R1 1 R1
2 3 75 DCIN_CURRENT_N
R2
1
LSK3541G1ET2L-GP 1MR2J-1-GP
R662
G 0R2J-2-GP
2
2
S
D
D
Q79 R504
Q78 ASM NO-ASM
D
LSK3541G1ET2L-GP 0R2J-2-GP
59,72,75,79 -PWRSHUTDOWN G
Q51 ASM NO-ASM
2
A Logic A
<Core Design>
S
SHINAI-4 UMA -1
Date: Monday, March 12, 2012 Sheet 73 of 100
5 4 3 2 1
A B C D E
VCC3M
2
P/N: 45N4219 M-BAT-PWR BAT-PWR12 VINT20
J13 R328
Little Fuse
TYCO-CON7-22-GP-U1 6K19R2F-GP
0501010.WR, 10A/24V
1
4 9 F12 Q8 Q34 Q13 4
7 M_BAT_IN WIDE PATTERN 1 2 FUSE-10A24V-GP 1 S D 8 M_BAT_PWR_A 1 S D 8 1 S D 8
6 2 S D 7 2 S D 7 2 S D 7
3 S D 6 3 S D 6 3 S D 6
2
5 BT0_CLK_C R273 1 2 100R2J-2-GP 4 G D 5 4 G D 5 4 G D 5
I2C_CLK_BT0 60
2
4 BT0_DATA_C R271 1 2 100R2J-2-GP I2C_DATA_BT0 60 C722
3 M_TEMP 60 SIS406DN-T1-GE3-GP SI7129DN-T1-GE3-GP SIS406DN-T1-GE3-GP SCD01U25V2KX-3GP
1
2 R483
510KR2J-2-GP
1
1
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC390P50V2KX-GP
SC390P50V2KX-GP
8
R1824
R634 D244
2
72 M1_DRV 1 2 1 2 A K
C207 C199 C203 C407
100KR2J-1-GP R638 27KR2J-L1-GP 1SS400GGT2R-GP
DY DY
1
150KR2J-GP
1
72 M2_DRV
72 BAT_DRV
1
DY
R131
0R2J-2-GP
R639
2
1 2
VCC3M
750KR2J-GP
1
WIDE PATTERN C2080
2
S_BAT_IN S-BAT-PWR SC1500P50V2KX-2GP
2
3
P/N: 45N4213 R292
Little Fuse 3
0501010.WR, 10A/24V
2
J17 6K19R2F-GP
9 F11 Q39 Q48
1
R2
2 3 S D 6 2 S D 7
R1
4 G D 5 3 S D 6
3 BT1_CLK_C R265 1 2 100R2J-2-GP 4 G D 5
1
I2C_CLK_BT1 60
2
4 BT1_DATA_C R332 1 2 100R2J-2-GP SIS406DN-T1-GE3-GP
I2C_DATA_BT1 60
5 S_TEMP 60 SI7129DN-T1-GE3-GP
6 R284
7 510KR2J-2-GP
8
1
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC390P50V2KX-GP
SC390P50V2KX-GP
DY DY
1
2
VREGIN20
DOCK_DCIN20 DOCK_DCIN20_F VCC3B
BAT-PWR12 R130
F25 D60 1MR2J-1-GP
1 2 2
1
2
2
2 3 2
FUSE-D5A24V-1-GP
SCD1U10V2KX-4GP
1 R445 R126
4K7R2J-2-GP 1MR2J-1-GP
D
2
DCIN_PWR20_F DAN222GTL-GP Q47
1
C683 LSK3541G1ET2L-GP
BAT_FET_HOT 60
F5 D10 59 -DOCK_PWRDCT G
1
1 2 F5-DOCK_PWR20_F 2
2
3 RT16
FUSE-D5A24V-1-GP NTC-540-GP
S
M_BAT_IN 1 AFTP30 AFTE14P-GP 1 R127
2
BT0_CLK_C 1 AFTP31 AFTE14P-GP 1MR2J-1-GP
BT0_DATA_C 1 AFTP32 AFTE14P-GP DAN222GTL-GP
NEAR TO Q13
1
M_TEMP 1 AFTP33 AFTE14P-GP
1 AFTP34 AFTE14P-GP
F9 D19
1 2 2
3
FUSE-D5A24V-1-GP
1
1
S-BAT-PWR S-BAT-TRCL DAN222GTL-GP 1
<Core Design>
F10 D23
1 2 2
3 Wistron Corporation
FUSE-D5A24V-1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 Taipei Hsien 221, Taiwan, R.O.C.
DAN222GTL-GP Title
DOCK_DCIN20_F
R11 1 2 0R2J-2-GP DCIN_CURRENT_P 73
DCIN_PWR20_F R363 Keep these two signals as a pair routing !!
20R3J-4-GP R264 1 2 10R2F-L-GP DCIN_CURRENT_N 73
D78 A K 1 2 Output cap
1SS400GGT2R-GP R180 1 2 1KR2F-3-GP 10uF, 10%, 25V, X5R, 4pcs
SCD1U25V3KX-GP
DOCK_CONSUMP 59
There MLCCs must be placed symmetrically CHARGER_OUT12
1 2 R264 and R180 shoud be put nearby R-sense (R380) on Top and Bottom side.
1
D87 A K
R688 C450 Input Cap
1SS400GGT2R-GP 20R3J-4-GP
2
10uF, 10%, 25V, X5R, 6pcs
VINT20
DCIN_PWR20_F
There MLCCs must be placed symmetrically
SC1U25V3KX-1-GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
CHARGER_AGND on Top and Bottom side.
DY
SCD1U25V2KX-GP
4 4
Low Noise Cap
1
0R2J-2-GP C447 C2007 C2008 C2009 C2010 C2011
R144 1 2
2
SCD1U25V2KX-GP
SC10U25V6KX-L3-GP
SC10U25V6KX-L3-GP
SC10U25V6KX-L3-GP
SC10U25V6KX-L3-GP
SC10U25V6KX-L3-GP
SC10U25V6KX-L3-GP
Q49
1
RSM002P03GT2L-GP C2012 C2013 C2014 C2015 C2016 C2021 C2020
D84
S D A K
2
RB520SM-30T2R-GP L5
TDK SPM6530T-3R3M
1
BQ24760_ACDET_R
R147 or
SCD01U50V3KX-4GP
SCD01U50V3KX-4GP
G
1MR2J-1-GP BD24760_REGN
TOKO FDVE0630-H-3R3M
1
DOCK_DCIN20_F
C444 C138
SC1U10V2KX-1GP
RB521SM-30T2R-GP
A
2
2
R728
1
C99 D39 L5
D82 1 2 1 2
1
30
31
32
33
34
42
15
A K
2
R148 U7 IND-3D3UH-188-GP D01RL1632F-L-GP-U1
K
1MR2J-1-GP RB520SM-30T2R-GP
PVCC1
PVCC2
PVCC3
PVCC4
PVCC5
PVCC6
REGN
1
CHARGER_AGND CHARGER_AGND C436
1
SC470P50V2KX-3GP
2
R213
2
R584 36 14 1 2
432KR2F-GP AVCC BTST
3D3R3J-L-GP
1
Q53 17
0R2J-2-GP
0R2J-2-GP
SCD047U25V3KX-3-GP
D
2
LSK3541G1ET2L-GP SW1
21
1
SW2 R1781 R1782
22
1
59,73 -DOCK_ATTACHED_BAT_OP G BQ24760RSBR-1-GP SW3
SW4
23
37 PG 1.1 24 C192 R959
2
ACN SW5 2D2R5J-1-GP
25
2
SW6
38 26
2
1
ACP SW7
27
S
R1783 SW8
28
64K9R2F-1-GP SW9
29
BQ24760_ACDET SW10
4 43
ACDET SW11
2
3 CHARGER_AGND 12 BQ24760_CSP 3
CSP BQ24760_CSN
60 I2C_DAT_CHARGE 6 11
VCC3M SDA CSN
7 C390
CHARGER_AGND 60 I2C_CLK_CHARGE SCL
3 LPMODV# SCD1U10V2KX-4GP
LPMODV#
R1784 1 2
2
LPREF EXTPWR#
1 2 40
1
LPREF C806 C16
9
73K2R2F-GP BM# -BOOST_MODE 60 SCD1U25V3KX-GP SCD1U25V3KX-GP
8
1
ILIM
39
2
R1785 R1786 VCC3M LPMODI#
49K9R2F-L-GP 31K6R2F-GP 5
IOUT ISYS 60
AGND1
AGND2
AGND3
AGND4
AGND5
AGND6
PGND1
PGND2
PGND3
2
1
CHARGER_AGND
178KR2F-GP
1
R1787 C155
316KR2F-L-GP R1788 SC100P50V2JN-3GP
Q163
D
1
10
13
16
35
41
18
19
20
2
LSK3541G1ET2L-GP VCC3SW
2
61 -90W_AC G 2
CHARGER_AGND
1
RJ48
EXTPWR#
R1789
1MR2J-1-GP 1 2
S
0R0402-PAD-1-GP
2
Q164
G LSK3541G1ET2L-GP
CHARGER_AGND
Q165
CHARGER_AGND LSK3541G1ET2L-GP
D
R6388
59,72,73,79 -PWRSHUTDOWN G
1
DY 2
162KR2F-L-GP
S
2 2
LPMODI#
CHARGER_AGND
VCC3M
1
1
R552
0R2J-2-GP R693
10KR2J-3-GP Put R694 and C323 nearby EC.
2
VCC3SW
2
R1833 R694
1 2 1 2
1
-LPMODE 61
806R2F-GP
R1828 3K24R2F-GP
1
100KR2J-1-GP C323
SC1U10V2KX-1GP
2
2
-EXTPWR 61,71
DY
R549
1 2 LPMODE#_R
0R2J-2-GP
VCC3M
1 1
1
S D
R1832
D
Q172 100KR2J-1-GP
<Core Design>
LSK3541G1ET2L-GP
2
60 -LPMODI_ON G
G
Q173
Wistron Corporation
1
1MR2J-1-GP
Title
2
A B C D E
A B C D E
CHARGER_OUT12
BAT-PW R12
Q35
8 D S 1
7 D S 2
4 6 D S 3 4
2
5 D G 4
R16 SI7129DN-T1-GE3-GP
2
220KR2J-L2-GP
2
1
R223 C223
470KR2J-2-GP SCD1U25V3KX-GP
1
1
Q35_GATE
1
R129
100KR2J-1-GP
2
D
Q41
R42 1 2 200KR2J-L1-GP G LSK3541G1ET2L-GP
1
3 C96 3
S
D43 R128 SCD033U25V2KX-GP
71 BAT_CRG K A 1 2
2
1SS400GGT2R-GP 1KR2J-1-GP
Q54
M-BAT-TRCL
6 1
D47
5 2 M_BAT_TRCL_A 1
4 3 3
1
SSM6J402TU-GP
1
C1 R1 DAN222GTL-GP
SCD01U25V2KX-3GP 470KR2J-2-GP
D70
2
R616 1
2
1 2 3
4K7R2J-2-GP 2
Q62 DAN222GTL-GP
LTC015EEB-FS8-GP
3
2 2
71 M_TRCL 1 R1
2
R2
Q56
S-BAT-TRCL
6 1
D49
5 2 S_BAT_TRCL_A 1
4 3 3
2
2
SSM6J402TU-GP
2
DAN222GTL-GP
C2 R3
SCD01U25V2KX-3GP 470KR2J-2-GP D231
1
R580 1
1
1 2 3
4K7R2J-2-GP 2
Q63 DAN222GTL-GP
LTC015EEB-FS8-GP
3
1 71 S_TRCL 1 R1 <Core Design> 1
2
R2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D M-BAT-PWR D
D225
PDZ5D1B-1-GP
K A
1
R444
6K04R2F-GP
2
Q166 M_BATVOLT 60
1
R2
R1
LTA014EEB-FS8-GP R447
2KR2F-3-GP
2
C C
D48
2 Q29
LTC015EEB-FS8-GP
3 3
R1 1 BATMON_EN 60
1 2
R2
DAN222GTL-GP
1
R1
Q27
R2
LTA014EEB-FS8-GP
S-BAT-PWR
2
B B
D54
K A 1
PDZ5D1B-1-GP
R449
6K04R2F-GP
2
S_BATVOLT 60
1
<Core Design>
R451
2KR2F-3-GP
A
Wistron Corporation A
2
Title
BATTERY MONITOR
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 77 of 100
5 4 3 2 1
5 4 3 2 1
D D
VCC3B
1
C C
R1790
D59 47KR2J-2-GP
DAP222GTL-GP
71 B1_ON 2
2
R59
3 1 2 VCCSA_ON 90
1
C590
SC1KP50V2KX-1GP
2
R1102 1 2 22KR2J-GP 0R75B_ON 87
B B
D27
71 B1_ON R1103 1 2 1KR2J-1-GP K A D246
71 WWAN_ON 2
1SS400GGT2R-GP
1
3 VCC3WAN_ON 72
C1041
SCD1U10V2KX-4GP B_ON 1
2
1
DY DAN222GTL-GP R75
100KR2J-1-GP
2
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
POWER SEQUENCE
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 78 of 100
5 4 3 2 1
5 4 3 2 1
Layout R49 inside of L68
VCC5M_OUT VCC5M
R49
1 2
Input cap:10uF 10% 25V X5R 8pcs. Input cap:10uF 10% 25V X5R 4pcs. Need common pad with
D001R3D-L-GP
These MLCCs must be placed These MLCCs must be placed Toshiba, Infineon, Vishay, etc
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
symmetrically on Top and Bottom. symmetrically on Top and Bottom.
1
Q18
C2017 C2018 C2019 Low Noise Cap TPCC8064-H-GP
D D
2
84.08064.037
Q17
TPCC8062-H-GP
VINT20 VL5
VINT20 84.08062.A37
L4
10UF 10% 25V X5R 10UF 10% 25V X5R
8pcs 4pcs MPLCH0740L2R2 (NEC TOKIN) 68.2R21C.10T
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SPM6540T-2R2M (TDK) 68.2R21E.10E
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC68P50V2JN-1GP
SC33P50V2JN-3GP
1
SCD1U25V2KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SC10U25V6KX-L3-GP
SC10U25V6KX-L3-GP
SC10U25V6KX-L3-GP
SC10U25V6KX-L3-GP
SC10U25V6KX-L3-GP
SC10U25V6KX-L3-GP
SC10U25V6KX-L3-GP
SC10U25V6KX-L3-GP
C225 C985
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SCD1U25V3KX-GP
1
1
RFC14 RFC15 C1622 C392 C393 C395 C1623 C397 C1624 RFC16
1
C502 RFC20
DY DY DY
SA
C234 C217 C232 C240
DY
2
2
DY
4NT
E
C399 RFC17 RFC18
Y
5
6
7
8
VINT20
PS
D
D
D
D
C406 RFC19
OF
8
7
6
5
8
7
6
5
2 SC1U6D3V2KX-GP
R47
1
SCD1U25V3KX-GP
1
D
D
D
D
D
D
D
D
Q18 C314
SC2200P50V2KX-2GP
1
TPCC8064-H-GP
R725
SC68P50V2JN-1GP
1
R320 C227
G
4
SC1U10V2KX-1GP 10
SC10U10V5KX-2GP
SC10U10V5KX-2GP
9A
SC68P50V2JN-1GP
2
S
S
S
Q31 Q16 0R2J-2-GP
1 2 SC1U25V3KX-1-GP
DY
SC1U10V2KX-1GP
SCD1U25V2KX-GP
1
0M
TPCC8064-H-GP TPCC8064-H-GP
3
2
1
1
S
S
S
mL
18A
2
C1305 C1304 R499
DY DY
1
2
3
4
1
2
3
4
2
ohm
1 2
DY
2
S_AGND
C C
1
VCC5M_OUT 10KR2J-3-GP RFC23 RFC24
C670 DY
C1626 R392 SCD1U10V2KX-4GP
2
2VBST1_R 1
14
22
29
23
1 2
3
U41
SCD22U25V3KX-GP 1R3J-L1-GP S_AGND
RF
TRIP
VIN
VREG3
VREG5
VCC5M_DH 1 24 VCC3M_DH
DRVH1 DRVH2 L4
L3 VCC5M_VBST1 31 26 VCC3M_VBST2 1 R112 2 VBST2_R C229 1 2 SCD1U25V3KX-GP
VCC5M_SW VBST1 VBST2 1R3J-L1-GP VCC3M_SW
1 2 32 SW1 SW2 25 1 2
VCC5M_DL 30 27 VCC3M_DL
SC470P50V2KX-3GP
SC470P50V2KX-3GP
IND-1D5UH-90-GP DRVL1 DRVL2 IND-2D2UH-166-GP
ST330U6D3VDM-14GP
ST330U6D3VDM-14GP
1
VCC5M_CSP1 7 18 VCC3M_CSP C216
CSP1 CSP2
1
1
C769 8 17 R386 ST470U4VDM-6-GP
CSN1 CSN2
1
2 C768 6K8R2F-2-GP
2
V5SW
1
5
6
7
8
C1627 C511 VCC5M_SKIPSEL1 6 19 VCC3M_SKIPSEL
2
2
SKIPSEL1 SKIPSEL2
D
D
D
D
1
R221 4 21
0R0201-PAD-GP
78 VCC5M_ON VCC3M_ON 78
2
2
EN1 EN2
1
8
7
6
5
8
7
6
5
9K1R2F-1-GP 12 Q17
0R0201-PAD-GP
PGOOD1
PGOOD2
EN
D
D
D
D
D
D
D
D
COMP1
COMP2
TPCC8062-H-GP
TPCC8062-H-GP
VREF2
1
FUNC
RJ30
VFB1
VFB2
GND
GND
2
1
G
4
2D2R3J-2-GP
2D2R3J-2-GP
S
S
S
R1604
2
1
G
2
3
2
1
5
9
11
10
13
15
16
20
33
28
R1603
S
S
S
S
S
S
SANYO R402
2
0R2J-2-GP
2
1
2
3
4
1
2
3
4
2
1 2
6TPE330MIL R525
2
72 5M_PWRG 1K8R2F-GP
18m-ohm x 2pcs 1 2 S_AGND
1
C279 1 2
0R0201-PAD-GP
1
RJ29 51220_FUNC SCD1U25V2KX-GP
0R0201-PAD-GP
C694 51220_COMP1 VCC3M_FB RJ32
1
DY
10KR2J-3-GP
2
1 2 VREF2
B R310
B
2
SCD1U10V2KX-5GP
1
SCD1U10V2KX-4GP
2
1
Q31, Q16 R299 C394
R315 R330
TPCC8064-H-GP VREF2 VL5 R343
2
1
VCC3SW 42K2R2F-L-GP
84.08064.037 DY 1 2 1 2
2
2
Q50, Q46 R611 R297 6K8R2J-GP 6K2R2J-1-GP
1
1
100KR2J-1-GP 100KR2J-1-GP
DY
100KR2J-1-GP
1
TPCC8062-H-GP C402
33KR2J-3-GP
2
R903 100KR2J-1-GP
L3 S_AGND
2
S_AGND
DY
2
1
1
2
C228 R384
SCD01U25V2KX-3GP 196KR2F-GP
2
DY
2
S_AGND
D
Q28
2
D
2
1 2 Q37
R573
A DY A
1
DY
S_AGND
1
DY <Core Design>
LSK3541G1ET2L-GP
S
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
S_AGND Taipei Hsien 221, Taiwan, R.O.C.
HTTPS://REALSCHEMATIC.COM Title
S_AGND
DC-DC VCC3M/VCC5M
Size Document Number Rev
Custom -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 79 of 100
5 4 3 2 1
R1184 1 2 10KR2J-3-GP
RJ78
1 2 R1183 1 2 10KR2J-3-GP L6
26 CPUCORE_PWRGD DY 1 2
0R0402-PAD-1-GP MPZ1608S300AT-GP
VCC1R8B
GND_1318 4,62 -PROCHOT
1
2 C490
2 C491
2 C478
2 C489
2 C488
2 C487
L7 C35
7 -SVID_ALERT 1 2 SC2200P50V2KX-2GP
D U20 MPZ1608S300AT-GP D
2
7 SVID_DATA R1182 1 2 130R2J-GP
SCD22U10V2KX-1GP
-TS_FAULT1 A1
VCCCPUCORE VCC1R8B VCC3B R1181 1 TS_FAULT#
2 54D9R2F-L1-GP B4
SC10U6D3V3MX-L-GP 1
SC10U6D3V3MX-L-GP 1
SC10U6D3V3MX-L-GP 1
SC10U6D3V3MX-L-GP 1
7 SVID_CLK BST
1
PWM1_1 B3
R1180 1 PWM
2 200R2F-L-GP R313 C32
R327 78 VCORE_ON DY
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
10R2F-L-GP IPH1_1 B2 C4
2
ISENSE VDDH
1
Mramp1 1 2 R_SEL6 R1172 1 2 21D5R2F-1-GP C3
R317 R_SEL4 R1173 825R2D-GP VDDH
1 2 A4 C2 There MLCCs must be placed symmetrically
2
60K4R2F-GP 10R2J-2-GP ROSC R1167 75KR2F-GP VCC VDDH
1 2 C1
R_SEL0 R1178 715R2D-GP VCC1R8B_VDD_P1 VDDH on Top and Bottom side.
1 2 B1
VDD
SC1U6D3V3KX-2GP
SC4D7U6D3V3KX-GP
R_SEL1 R1177 1 2 887R2D-GP
2
SCD1U10V2KX-L-GP
SCD1U10V2KX-L-GP
GND_1318 E1 D1
VSS VX#D1 VCCCPUCORE
E2 D2
VSS VX#D2
1
49
48
47
46
45
44
43
42
41
40
39
38
37
E3 D3
VSS VX#D3
1
1
VCCGFXCORE_I U16 GND_1318 C26 C28 E4 D4
C43 C54 VSS VX#D4
G1
R_SEL6
VR_READY2
VR_READY1
VR_TT#
R_SEL4
ALERT#
VDIO
VCLK
VR_ENABLE
R_SEL0
R_SEL1
GND
R_OSC
2
R329 VSS
G2 F1
2
2
56K2R2F-2-GP VSS VX#F1
G3 F2
Mramp2 VSS VX#F2
1 2 G4 F3
VDD3_CPU R_SEL2 R1176 1 VSS VX#F3
1 36 2 0R2J-2-GP J1 F4 L8
GND_1318 GND_1318 VDD3 R_SEL2 R_SEL3 R1175 1 VSS VX#F4
2 35 2 196R2D-GP J2
VDD R_SEL3 R_REF R809 1 VSS Vx1
3 34 2 20KR2D-1-GP GND_1324S_1 J3 H1 4 1
VIN_UVLO VDD R_REF GND_1318 VSS VX#H1
4 33 J4 H2
VIN_UVLO IPH2_2 R_SEL5 R1174 1 VSS VX#H2
5 32 2 475R2F-L1-GP H3
PWM1_2 PWM1_3 R_SEL5 VX#H3
6 31 2 1 A2 H4
PWM1_1 PWM1_2 PWM2_2 GND VX#H4
7 30 PWM2_1 81 3 2
PWM1_1 PWM2_1
1
-TS_FAULT1 8 29 0R2J-2-GP
TS_FAULT#1 TS_FAULT#2 -TS_FAULT2 81 RJ47
9 28 R1794 1 2 1K96R2F-1-GP IPH2_1 81 VT1324SFCX-GP-U IND-240NH-GP
C IPH1_2 R333 IPH1_2_R IPH1_3 IPH2_1 Mramp2 C
1 2 1K96R2F-1-GP 10 27 R308
IPH1_1 R334 IPH1_1_R IPH1_2 MRAMP2 100R2F-L1-GP-U
1 2 1K96R2F-1-GP 11 26 VCCGFX_SENSE_I 8
GND_1324S_1
Mramp1 IPH1_1 SENSE2+
12 25
SENSE1+
A2_OUT1
A3_OUT1
A3_OUT2
A2_OUT2
SENSE1-
2
MRAMP1 SENSE2- VSSGFX_SENSE_I 8
A_ERR1
A_ERR2
A2_IN1
A3_IN1
A3_IN2
A2_IN2
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
1
DY
1
1
0R2J-2-GP
15K8R2F-GP
1
13
14
15
16
17
18
19
20
21
22
23
24
C56 C62 R336 15K4R2F-GP
2
R335
2
2
2
2
L9
GND_1318 GND_1318 1 2
MPZ1608S300AT-GP
VCC1R8B
1
2 C1630
2 C1631
2 C479
2 C496
2 C1629
2 C495
C36
GND_1318
L10 SC2200P50V2KX-2GP
VO2_1
VO3_1
VO3_2
VO2_2
VERR1
VERR2
VI2_1
VI3_1
VI3_2
VI2_2
VCC5M_OUT U21 1 2
2
MPZ1608S300AT-GP
7 VCCSENSE
SCD22U10V2KX-1GP
-TS_FAULT1 A1
TS_FAULT#
B4
SC10U6D3V3MX-L-GP 1
SC10U6D3V3MX-L-GP 1
SC10U6D3V3MX-L-GP 1
SC10U6D3V3MX-L-GP 1
7 VSSSENSE BST
1
PWM1_2 B3
R383 R309 PWM C34
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
866KR2F-GP 10R2F-L-GP IPH1_2 B2 C4
2
ISENSE VDDH
C3
VDDH
A4 C2
2
VCC VDDH
C1
C67 VIN_UVLO VCC1R8B_VDD_P2 VDDH
R346 B1
B
C104 SC22P50V2JN-4GP R345 C82 VDD B
SCD1U10V2KX-L-GP
SC4D7U6D3V3KX-GP
1 2 1 2 1 2 1 2 1 2 VO3_1 E1 D1
VSS VX#D1
1
1K3R2F-1-GP E2 D2
VSS VX#D2
1
SC56P50V2JN-2GP 845R2D-GP SC4700P50V2KX-1GP VI3_1 C95 R385 E3 D3
R347 C81 C29 C30 VSS VX#D3
R350 SCD1U25V3KX-GP 100KR2F-L1-GP E4 D4
C75 1K02R2F-1-GP SC1KP50V2KX-1GP R337 1 IPH1_2 VSS VX#D4
2 499R2F-2-GP G1
2
VSS
1 2 1 2
DY1 2 1 2
DY G2 F1
2
R338 1 IPH1_1 VSS VX#F1
2 499R2F-2-GP G3 F2
30K1R2F-L-GP SC220P50V2KX-3GP VSS VX#F2
G4 F3
R352 VSS VX#F3
R349 R348 J1 F4
10KR2D-GP VSS VX#F4
J2
VERR1 GND_1324S_2 VSS Vx2
1 2 1 2 1 2 GND_1318 J3 H1
VSS VX#H1
J4 H2
VI2_1 19K6R2F-GP 1K54R2F-GP VSS VX#H2
VX#H3
H3 There MLCCs must be placed symmetrically
2 1 A2 H4
VO2_1 GND VX#H4 on Top and Bottom side.
0R2J-2-GP
Waiting for new PN of 19.6K 0.5% RJ76 VT1324SFCX-GP-U
GND_1324S_2
R377
C83 C84 R367 3K24R2F-GP C90
SC22P50V2JN-4GP SC22P50V2JN-4GP 665R2D-GP SCD01U50V2KX-1GP
1 2 1 2 1 2 1 2 1 2 VO3_2
VI3_2
R353 C105 R358 C100
30KR2F-GP SC1KP50V2KX-1GP 1K02R2F-1-GP SC1KP50V2KX-1GP R378 1 2 1KR2F-3-GP IPH2_1
1 2 1 2 1 2 1 2
A
DY DY <Variant Name> A
R364
/
10KR2D-GP
R365 R366 Wistron Corporation
VERR2 1 2 1 2 1 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
VI2_2 7K5R2D-GP 40D2R2F-GP
Title
VO2_2 DC-DC VCCCPUCORE
Size Document Number Rev
Custom -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 80 of 100
5 4 3 2 1
HTTPS://REALSCHEMATIC.COM
5 4 3 2 1
VCC5M_OUT
D D
L70
1
VCC1R8B
2 C1634
2 C1635
2 C477
2 C480
2 C484
2 C1633
1 2 C2023
MPZ1608S300AT-GP SC2200P50V2KX-2GP
U19
2
SCD22U10V2KX-1GP
80 -TS_FAULT2 A1 TS_FAULT#
1
B4
SC10U6D3V3MX-L-GP 1
SC10U6D3V3MX-L-GP 1
SC10U6D3V3MX-L-GP 1
SC10U6D3V3MX-L-GP 1
BST
1
R948 B3
80 PWM2_1 PWM
10R2J-2-GP C2022
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
80 IPH2_1 B2 C4
2
ISENSE VDDH
C3
2
VDDH
A4 VCC VDDH C2
VDDH C1
C VCC1R8B_VDD_GFX B1 C
VDD
SC4D7U6D3V3KX-GP
SCD1U10V2KX-L-GP
E1 VSS VX#D1 D1
E2 VSS VX#D2 D2
1
C2024 E3 D3
C600 VSS VX#D3
E4 VSS VX#D4 D4
G1
2
VSS VCCGFXCORE_I
G2 VSS VX#F1 F1
G3 VSS VX#F2 F2
G4 VSS VX#F3 F3
J1 VSS VX#F4 F4
J2 L58
GND_1324S_3 VSS Vx2_1
J3 VSS VX#H1 H1 1 2
J4 VSS VX#H2 H2
H3 IND-120NH-12-GP
VX#H3
1
2 RJ46 1 A2 GND VX#H4 H4 CHIP IND 120NH M MPCH0730LR12
R949
0R0402-PAD-1-GP 100R2F-L1-GP-U
VT1324SFCX-GP-U
2
B GND_1324S_3 B
<Variant Name>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VCCGFXCORE
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 81 of 100
5 4 3 2 1
A
D
VCCCPUCORE
VCCGFXCORE_I
VCCCPUCORE
VCCCPUCORE
C2030
SC2D2U6D3V2MX-GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
2 1 2 1 2 1 2 1
C41
C1652
C125
C2031
SC22U6D3V5MX-2GP
SC2D2U6D3V2MX-GP 2 1
2 1 SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
C42
2 1 2 1
C2032
SC22U6D3V5MX-2GP
C1653
C441
5
5
2 1
SC2D2U6D3V2MX-GP
2 1
C44
C2033
SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
2 1 2 1 2 1
C1655
SC2D2U6D3V2MX-GP
C446
C2034
2 1 SC22U6D3V5MX-2GP
C45
2 1
SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
2 1 2 1
C2035
SC2D2U6D3V2MX-GP SC22U6D3V5MX-2GP
C1654
2 1 2 1
C536
C46
C2036
SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
SC2D2U6D3V2MX-GP 2 1 2 1 2 1
2 1
C48
C1662
C454
C2037
SC22U6D3V5MX-2GP
2 1
SC2D2U6D3V2MX-GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
2 1 2 1 2 1
C49
C2038
SC22U6D3V5MX-2GP
C1737
2 1
C464
SC2D2U6D3V2MX-GP
20 x 2.2uF MLCC for VCCCPUCORE
C2039
2 1 SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
C50
2 1 2 1 2 1
C1738
C468
C2040
SC2D2U6D3V2MX-GP SC22U6D3V5MX-2GP
2 1 2 1
4
4
C52
SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
2 1 2 1
C2041
SC22U6D3V5MX-2GP
C1736
C1650
SC2D2U6D3V2MX-GP 2 1
2 1
C53
C2042
SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
2 1 2 1 2 1
SC2D2U6D3V2MX-GP
C1715
2 1
C185
C79
C2043
SC22U6D3V5MX-2GP
2 1
SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
SC2D2U6D3V2MX-GP C2044 2 1 2 1
2 1 SC22U6D3V5MX-2GP
C80
C1712
C1651
2 1
C2045 C2046
C1739
C541
SC22U4V3MX-GP
SC2D2U6D3V2MX-GP 2 1
2 1 SC22U4V3MX-GP SC22U6D3V5MX-2GP
C97
C2047
2 1 2 1
SC22U4V3MX-GP
C1702
2 1
C545
SC2D2U6D3V2MX-GP
C2048
2 1
C118
3
C2049
C1750
SC2D2U6D3V2MX-GP
C549
2 1 SC22U4V3MX-GP
C98
2 1
SC22U4V3MX-GP SC22U6D3V5MX-2GP
C2050
2 1 2 1
SC2D2U6D3V2MX-GP SC22U4V3MX-GP
C1747
2 1 2 1
C556
C121
C2051
C2052
C1751
C564
SC22U4V3MX-GP
2 1
SC2D2U6D3V2MX-GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
C2053
2 1 2 1 2 1
C124
SC22U4V3MX-GP
C2025
2 1
C565
SC2D2U6D3V2MX-GP
2 1 SC22U4V3MX-GP
C135
2 1
DY
C2026
SC22U4V3MX-GP
2 1
DY
C2027
2
2
SC22U4V3MX-GP
2 1
DY
C2028
SC22U4V3MX-GP
2 1
DY
C2029
Date:
Size
Title
<Core Design>
A3
Tuesday, March 06, 2012
Document Number
DC-DC VCCCPUCORE
SHINAI-4 UMA
1
82
of
HTTPS://REALSCHEMATIC.COM
100
Rev
-1
D
5 4 3 2 1
IPHF12_C pin 10 C1075 10pF 10pF C683 22uF 2125 22uF 2125 C666 22uF 2125 22uF 2125
R_MRAMP1 pin 12 R1584 16.2K 1.0% 16K C684 22uF 2125 22uF 2125 C667 22uF 2125 22uF 2125
R_MRAMP1_PU pin 12 R1587 no stuff no stuff 1.0% C685 22uF 2125 22uF 2125 C1114 22uF 1608 22uF 1608
R_PWM2 Pin 6 R4 no stuff no stuff C686 22uF 2125 22uF 2125 C1115 22uF 1608 22uF 1608
C687 22uF 2125 22uF 2125 C1116 22uF 1608 22uF 1608
C688 22uF 2125 22uF 2125 C1117 22uF 1608 22uF 1608
LL_R1_GPU pin 24 - pin 23 R1069 10K 0.5% 10K 0.5% C689 22uF 2125 22uF 2125 C1118 22uF 1608 22uF 1608
LL_R2_GPU pin 23 - pin 22 R1610 8.25K 0.5% 8.25K 0.5% C690 22uF 2125 22uF 2125 C1119 22uF 1608 22uF 1608
pin 23 - pin 22 R1611 0 5.0% 0 5.0% C691 22uF 2125 N/A 2125 C1120 22uF 1608 22uF 1608
LL_C1_GPU pin 24 - pin 23 C1094 22pF 22pF C692 22uF 2125 N/A 2125 C1121 22uF 1608 22uF 1608
LL_C2_GPU pin 23 - pin 22 C1095 22pF 22pF C693 22uF 2125 N/A 2125
LL_RLEAD_GPU pin 24 - pin 23 R1606 30K 1.0% 30K 1.0% C694 22uF 2125 N/A 2125
LL_CLEAD_GPU pin 24 - pin 23 C1097 1000pF 1000pF C695 22uF 1608 N/A 1608
LL_RLAG_GPU pin 23 - pin 22 R1607 no stuff no stuff C696 22uF 1608 N/A 1608
LL_CLAG_GPU pin 23 - pin 22 C1098 no stuff no stuff C697 22uF 1608 N/A 1608
RDES_GPU pin 22 - pin 21 R1604 665 0.5% 665 0.5% C698 22uF 1608 N/A 1608
RINT_GPU pin 21 - pin 20 R1605 3.24K 1.0% 3.24K 1.0% <Core Design>
A A
CINT_GPU pin 21 - pin 20 C1096 10nF 10nF
RPH21 IPH2_1 - pin 21 R1608 1K 1.0% 1K 1.0% Wistron Corporation
IPHF21_R pin 28 R1580 1.96K 1.0% 1.96K 1.0% C750 22uF 2125 N/A 2125
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
IPHF21_C pin 28 C1077 no stuff no stuff C1109 22uF 2125 N/A 2125 Taipei Hsien 221, Taiwan, R.O.C.
R_MRAMP2 pin 27 R1586 15.4K 1.0% 15.4K 1.0% C1110 N/A 1608 N/A 1608
Title
R_MRAMP2_PU pin 27 R1590 56.2K 1.0% 56.2K 1.0% C1111 N/A 1608 N/A 1608 VT1318M TABLE
C1112 N/A 1608 N/A 1608
HTTPS://REALSCHEMATIC.COM C1113 N/A 1608 N/A 1608 Size
A3
Document Number Rev
SHINAI-4 UMA -1
Date: Tuesday, March 06, 2012 Sheet 83 of 100
5 4 3 2 1
5 4 3 2 1
D VCC5M_OUT
D
L71
VCC5M_OUT_1R05B_VTT 1 2
MPZ1608S300AT-GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SCD1U16V2KX-3GP
SCD01U16V2KX-3GP
1
1
C2054
1
SC2200P50V2KX-2GP
2
R791 C595 C1659 C625 C644
10R3J-3-GP
2
2
VCC1R05B_VTT_AVDD
1
VCC5M_OUT_1R05B_VTT C588
SCD22U10V2KX-1GP
9A
2
VCC1R05B_VTT
SPM5030T-R20M
C C
1
SC6800P25V2KX-1GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SCD1U16V2KX-3GP
VX#D3
B3 AVDD VX#D4 D4
D5 C1660 C1661
VX#D5 DY
1
C730 C786 C787 C788
VCC1R05B_VTT_BIAS A1 C1663 C916 C914
VCC1R05B_VTT_RSEL BIAS
A2 C1
2
R808 R_SEL/ILOAD GND
A4 VSENSE+ GND C2
0R2J-2-GP A3 C3
VCC1R05B_VTT_OE VDES GND
56,58,72,78,94 B_ON 1 2 A5 OE
VCC1R05B_VTT_IRIP B2 B1 1 RJ33 2
IRIPL AGND
B4 TEMP
1 2 B5 0R0402-PAD-1-GP
78 VTT_PW RG STAT
0R2J-2-GP
R811 VT356FCX-ADJ-007-GP
SCD01U16V2KX-3GP
VCC_SENSE_VTT 7
R804 R802 R805
VCC1R05B_VTT_VDES
DY
1
C587
2
1
B VENSE- trace routed differntially parallel to VSENSE+ B
1
R827 R691 C597
2
2
44K2R2D-GP
6K49R2D-GP
25K5R2F-GP
2
VSS_SENSE_VTT 7
R829:NO_ASM
AGND_1R05B_VTT 1.10V R828 = 40.2K
1.05V R828 = 38.3K
1.00V R828 = 36.5K
VOUT = 1.212*R832/44.2K
A <Core Design>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HTTPS://REALSCHEMATIC.COM DC-DC VCC1R05B_VTT
Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 84 of 100
5 4 3 2 1
D VCC5M_OUT_1R05LAN VCC5M_OUT
D
L72
VCC5M_OUT_1R05LAN 1 2
MPZ1608S300AT-GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SCD1U16V2KX-3GP
SCD01U16V2KX-3GP
1
C2055
1
SC2200P50V2KX-2GP
2
R814 C943 C945 C947 C950
10R3J-3-GP
2
2
VCC1R05LAN_AVDD
1
C935
VCC3LAN SCD22U10V2KX-1GP
9A
2
VCC1R05AMT
SPM5030T-R20M
C C
AGND_1R05LAN U28
L28
1
R474 C4 D1 VCC1R05LAN_VX 1 2
4K7R2J-2-GP VDD VX#D1
C5 VDD VX#D2 D2
D3
SC6800P25V2KX-1GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SCD1U16V2KX-3GP
VX#D3 IND-D2UH-11-GP
B3 D4
2
AVDD VX#D4
D5
VX#D5 DY
1
VCC1R05LAN_BIAS A1 C946 C948 C952 C953 C967 C448 C968 C970 C971
VCC1R05LAN_RSEL BIAS
A2 C1
2
R_SEL/ILOAD GND
A4 VSENSE+ GND C2
A3 VDES GND C3
71 AMT_ON A5 OE
VCC1R05LAN_IRIP B2 B1
IRIPL AGND
B4 TEMP
26,32 MEPW RG B5 STAT
VT356FCX-ADJ-007-GP
VCC1R05LAN_VDES
VENSE- trace routed differntially parallel to VSENSE+
1
1
44K2R2D-GP
6K49R2D-GP
25K5R2F-GP
SC33P50V2JN-3GP
1
1
B DY B
2
1
R820 R818 C942
2
2
2
2
SENSE_VCC1R05LAN_GND RJ60 1 2 0R3J-0-U-GP
AGND_1R05LAN
RJ34 1 2 0R2J-2-GP
A <Core Design>
A
Wistron Corporation
AGND_1R05LAN 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HTTPS://REALSCHEMATIC.COM DC-DC VCC1R05AMT
Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Monday, March 19, 2012 Sheet 85 of 100
5 4 3 2 1
VCC5M_OUT_1R5A VCC5M_OUT
D D
L73
VCC5M_OUT_1R5A 1 2
1
MPZ1608S300AT-GP
10R3J-3-GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SCD1U16V2KX-3GP
SCD01U16V2KX-3GP
1
L74
R823 C2202
1
1 2 SC2200P50V2KX-2GP
2
C988 C977 C978 C981 C984
2
MPZ1608S300AT-GP
2
VCC1R5A_AVDD
SCD22U10V2KX-1GP
1
C975
VCC3M
2
C4
C5
U32
B3
E4
E5
VT357FCX-ADJ-007-GP
1
DY
AVDD
VDD
VDD
VDD
VDD
R822
AGND_1R5A
18A
100KR2J-1-GP
VCC1R5A_IRIPB2 D1 VCC1R5A
MPC0730LR20C
2
IRIPL VX#D1
B4 TEMP VX#D2 D2
C VCC1R5A_BIAS A1 D3 C
BIAS VX#D3 L35
VCC1R5A_RSEL A2 D4
R_SEL/ILOAD VX#D4 VCC1R5A_VX 1
VX#D5 D5 2
A5 A4 IND-D2UH-6-GP
SC6800P25V2KX-1GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SCD1U16V2KX-3GP
78 VCC1R5A_ON OE VSENSE+
VCC1R5A_STAT B5 A3
STAT VDES
DY DY
1
C1004 C989 C1006
AGND
C979 C983 C986 C998 C999 C990 C1007 C991 C992
GND
GND
GND
GND
GND
GND
SCD01U16V2KX-3GP
2
1
1
1
C1
C2
C3
E1
E2
E3
B1
C2057 44K2R2D-GP 6K49R2D-GP 28KR2F-GP
2
VCC1R5A_VDES
VENSE- trace routed differntially parallel to VSENSE+
1
R833 C976
B 56K2R2D-GP SC2200P50V2KX-2GP B
2
signals before droping to GND
2
SENSE_VCC1R5A_GND RJ62 1 2 0R3J-0-U-GP
AGND_1R5A
RJ45 1 2 0R2J-2-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CONNECT TO
DIMM CONNECTOR
D
VCC1R5A VCC0R75B
1A D
NEAR DIMM CONNECTOR DDR3_VREF_CA
VCC0R75B
1
1
R355 RJ40
VCC3M 10KR2F-2-GP 0R0201-PAD-GP
2
VCC1R5A U70
10 VIN VO 3
REFOUT 6
PGOOD 9 1 2 DRAMPWRG 4,26,32
2 R877
VLDOIN
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
5 4 0R2J-2-GP
VOSNS PGND
SCD1U10V2KX-4GP
78 0R75B_ON 7 EN GND 8
VCC1R5A_SENSE 1 11
REFIN PwrPad
1
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SCD01U16V2KX-3GP
SCD1U10V2KX-4GP
C424 C423
1
SC1U6D3V3KX-2GP
C401 R362
C TPS51200DRCR-1-GP 22R2J-2-GP C
2
1
2
C937 C418 C987 C915 C918
2
2
2
R354 1 210KR2F-2-GP
DY
0R75B_ON_R1
C917 1 2 SC1KP50V2KX-1GP VCC3M
1
R36
10KR2J-3-GP
2
D
Q111
Q112
G 0R75B_ON_R 3
B R1 1 0R75B_ON 78
B
2
R2
LSK3541G1ET2L-GP LTC015EEB-FS8-GP
S
<Core Design>
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.
Title
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BLANK
Size Document Number Rev
HTTPS://REALSCHEMATIC.COM A4
SHINAI-4 UMA -1
Date: Tuesday, March 06, 2012 Sheet 88 of 100
A B C D E
VCC5M_OUT
4 4
VCC5M_OUT
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SCD01U25V2KX-3GP
L56
supplier Vendor P/N Wistron P/N
1
R1807 C2058 C2059 C2060
10R2J-2-GP TDK VLC5020T-2R2N 68.2R25A.10Z
2
2
Taiyo-Yuden NRS5024T-2R2NMGJ wait to apply P/N
1
C2061
SC1KP50V2KX-1GP
2
3A
5
6
7
AGND_1R8B U90
VCC1R8B
VCC
PVCC
PVCC
PVCC
R1808 C2062
3 0R2J-2-GP SCD1U10V2KX-L-GP 3
10 8 1 2 1 2 L56 CHIP IND 2.2UH N VLC5020T-2R2N
78 1R8B_ON EN BST
SW#1 1 1 2
2 IND-2D2UH-213-GP
SW#2
SW#3 3
4 R1810
SW#4 R1809
1R8B_ITH 12 0R2J-2-GP
ITH 1R8B_ADJ SENSE+_1R5V
ADJ 11 1 2 1 2
BD9139MUV-GE2-GP
GND 17
1
PGND
PGND
PGND
SC470P50V2KX-3GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12K7R2F-GP
13 GND
SCD01U25V2KX-3GP
SCD1U16V3KX-3GP
R1811
1
8K2R2J-3-GP
R1812
DY DY
16
15
14
1
10KR2F-L1-GP
2
1 2
2
1
C2064
SC6800P25V2KX-1GP DY
2 R1813 2
2
2D2R3J-2-GP
2
1 2
AGND_1R8B
0R2J-2-GP
R1814
AGND_1R8B
<Core Design>
1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC-DC VCC1R8B
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 89 of 100
A B C D E
A B C D E
VCC5M_OUT
VCCSA_SEL
MPZ1608S300AT-GP
SC2K2P50V3KX-GP
1
Vout Vout
VID0 VID1
C2069
1
L75 VT370(SV) VT371(LV/ULV)
2
4 L L 0.9V 0.9V 4
2
L H 0.8V 0.85V
VCC5M_OUT_SA
H L 0.725V 0.725V
SC22U6D3V5MX-L3-GP
SC4D7U6D3V3KX-L-GP
H H 0.675V 0.675V
SC2200P50V2KX-2GP
SCD1U10V2KX-L-GP
SC1U6D3V3KX-2GP
1
1
c2121
C2071
DY
C2070
C2072
C2073
2
2
DY DY
R1816 C2074
37K4R2F-1-GP SCD01U16V2KX-3GP
6A
C5
1 2 1 2
U29 VCCSA
VDD
B2 C2 VCCSA_L 1 2
PGM VX#C2 L57 IND-D35UH-GP
VX#C3 C3
B3 C4 CHIP IND 0.35UH SPM5030T-R35M
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC1U6D3V3KX-2GP
SCD1U10V2KX-4GP
SCD01U16V2KX-3GP
78 VCCSA_ON OE VX#C4
100R2F-L1-GP-U
1
A4 VCCSA_SENSE+
C974
C2076
SENSE+
1
C949
C951
C957
C959
C973
C972
C2075
R1817
A2 A5 12K1R2F-L1-GP C128DY R314
8 VCCSA_SEL1 VID1 SENSE-
2
3 A1 B1 3
8 VCCSA_SEL0
2
VID0 STAT
AGND
C2077
1 2SC4700P25V2KX-3-GP
GND
1
VT370FCX-ADJ-1-GP C2078
A3
C1
SC3300P50V2KX-1GP
2 R1818
1 2 VCCSA_SENSE 8
10KR2F-L1-GP
1
VCCSA_SENCE- trace routed
R316
RJ38 100R2F-L1-GP-U
differntially parallel to GND
0R2J-2-GP
1 2 RJ66
2
0R2J-2-GP
VCCSA_SENSE- 1 2
Route to CPU GND pin
AGND_SA
SAPW RG 61 close to VCCSA_SENCE.
2 2
1 <Variant Name> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC/DC VCCSA
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 90 of 100
A B C D E
5 4 3 2 1
D D
0.5A
VCC3M VCC3LAN
Q69
1
C C
TPCF8002-1-GP
R1053
33R2J-2-GP
2
1
VCC3LAN_R1
A
B D66 B
RB521SM-30T2R-GP
K
72 VCC3LAN_DRV
SCD1U25V2KX-GP
1
1
C1183 R680
470KR2J-2-GP
2
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LOAD SW LAN
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 91 of 100
5 4 3 2 1
A B C D E
4 4
3 3
BLANK
2 2
<Variant Name>
1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BLANK
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 92 of 100
A B C D E
5 4 3 2 1
D D
C C
BLANK
B B
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BLANK
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 93 of 100
5 4 3 2 1
5 4 3 2 1
7.2A VCC5M
4AVCC5B
VCC3M VCC3B
VCC3M VCC1R5_VDDQ
Q24
1
8 D S 1
1
D 7 D S 2 D
1
6 D S 3 Q23 R356 R744
5
5 D G 4 R532 R830 10KR2J-3-GP 39R2J-L-GP
270R2J-L-GP 100R2J-2-GP
TPCF8002-1-GP
2
2
SIS402DN-T1-GE3-GP
VCC5B_R1
VDDQ_R
A VCC3B_R1
B_ON_VDDQ_R
1
A
D223 D72
D
RB521SM-30T2R-GP RB521SM-30T2R-GP
Q126 Q60
3 G LSK3541G1ET2L-GP
K
1 R1
56,58,72,78,84 B_ON
37,72 VCC3B_DRV 2
R2
72 VCC5B_DRV
LTC015EEB-FS8-GP
SCD1U25V3KX-GP
S
1
SCD047U25V2KX-GP
1
1
R856 C604
470KR2J-2-GP R46 C706
2
470KR2J-2-GP
2
2
2
C C
5A 5A
VCC1R5A VCC1R5B VCC1R5_VDDQ VCC1R5A
VCC1R05AMT
6A VCC1R5_VDDQ VCC1R5A
VCC1R05B C837
R387 R390 1 2
Q151
8 D S 1 1 2 1 2 SCD1U10V2KX-4GP
B 7 D S 2
DY B
6 D S 3 D001R3D-L-GP D001R3D-L-GP C838
5 D Q120 1 2
1
G 8 D S 1
7 D S 2 SCD1U10V2KX-4GP
4
TPCA8056-H-GP R900 6 D S 3
1
47R2J-2-GP 5 D C839
G 1 2
2
R899
Rds_on = 2.2m ohm Max@10V
4
TPCA8059-H-GP 47R2J-2-GP SCD1U10V2KX-4GP
2
C841
Rds_on = 4.5m ohm Max@10V 1 2
VCC1R05B_R1
SCD1U10V2KX-4GP
A VCC1R5B_R1
B_DRV_VDDQ
A
1
D40 D44
R341 RB521SM-30T2R-GP RB521SM-30T2R-GP
0R2-PT5-LILY-GP
K
K
2
72 B_DRV
A 72 B_DRV <Core Design>
A
1
1
Title
HTTPS://REALSCHEMATIC.COM LOAD SW B
Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 94 of 100
5 4 3 2 1
D D
C C
B B
<Core Design>
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.
Title
HTTPS://REALSCHEMATIC.COM BLANK
Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 95 of 100
5 4 3 2 1
D VCC5M D
D001R3D-L-GP
8
1
Q94 R1826 Q100 R1821 Q92 R44
5
TPCF8002-1-GP 33R2J-2-GP TPCF8002-1-GP 33R2J-2-GP 47R2J-2-GP
TPCF8002-1-GP
2
2
A VCC3WLAN_R1
C C
A VCC3WAN_R1
1
A
D33
RB521SM-30T2R-GP
K
D245 D243
RB521SM-30T2R-GP RB521SM-30T2R-GP
K
K
72 VCC3WAN_DRV 72 VCC3WLAN_DRV 72 VCC5MUBAY_DRV
SCD47U25V3KX-1GP
SCD47U25V3KX-1GP
1
1
1
C10
1
1
R1825 R1822 R986 SCD1U25V3KX-GP
C2081 470KR2J-2-GP C2079 470KR2J-2-GP 470KR2J-2-GP
2
B B
2
2
2
2
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C.
A
Title
HTTPS://REALSCHEMATIC.COM
LOAD SW WWAN/WLAN/VCC5MBAY
Size Document Number Rev
A4 -1
SHINAI-4 UMA
Date: Monday, March 12, 2012 Sheet 96 of 100
A B C D E
1
TP7 TP10
TP8 TP9
HOLET315B236R95-GP HOLE315R95-GP HOLE237R95-GP HT85X105B85R26-S-GP
1
3 3
TP11 TP12
HOLE335R103-GP HOLE325X325R123X103-S-GP
PTH FOR SCREW HOLE
1
TP18 TP19
TP16
HOLE354R150-GP HOLE237R95-GP
STF237R113H115-GP
1
1
2 2
<Core Design>
1
Wistron Corporation 1
Title
HOLES/GND/PADS
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
Custom -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 97 of 100
A B C D E
5 4 3 2 1
D D
C C
BLANK
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LPM SELECT TABLE
HTTPS://REALSCHEMATIC.COM Size Document Number Rev
A3 -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 98 of 100
5 4 3 2 1
5 4 3 2 1
requested in
requested in "10223 RF layout modify list 1029.xls"
"SN3 UMA modify 20101028.xls"
D VINT20 DOCK_PWR20 BAT-PWR12 D
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
DY
1
1
C1850 C1851 C1852 EMC1 EMC2 EMC3 EMC4 EMC12 EMC5 EMC6
C1868 C1853 C1854 C1855 C1856 C1862
SCD1U10V2KX-4GP SCD1U25V2KX-GP SCD1U25V2KX-GP SC33P50V2JN-3GP SCD1U25V2KX-GP SC33P50V2JN-3GP
2
2
SCD1U25V2KX-GP
requested in
requested in "10223 RF layout modify list 1029.xls"
VCC5M "SN3 UMA modify 20101028.xls" VCC1R5A VCC3M VCC5B VCC3SW
C C
DY DY DY DY DY
1
1
C1857 C1864 C1865 C1866 C1858 C1859 C1860 C1863 C1861 C1867
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SC33P50V2JN-3GP SCD1U10V2KX-4GP SC33P50V2JN-3GP
2
2
requested in
"10223 RF layout modify list
1103.xls"
VCC5M_OUT
B B
DY DY DY DY DY DY DY DY DY DY DY
1
1
C1869 C1870 C1871 C1872 C1873 C1876 C1877 C1874 C1875 C1878 C1879
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP
2
2
VCC5M_OUT requested in
"SN3 UMA modify 20101028.xls"
<Core Design>
DY DY DY DY DY
1
A A
C1883 C1884 C1881 C1882 C1885 Wistron Corporation
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
Title
EMI DECOUPLING
Size Document Number Rev
B -1
SHINAI-4 UMA
Date: Tuesday, March 06, 2012 Sheet 99 of 100
5 4 3 2 1
HTTPS://REALSCHEMATIC.COM
5 4 3 2 1
IPHF12_C pin 10 C1075 10pF no stuff C683 22uF 2125 22uF 2125 C666 22uF 2125 22uF 2125
R_MRAMP1 pin 12 R1584 16.2K 1.0% 20K C684 22uF 2125 22uF 2125 C667 22uF 2125 22uF 2125
R_MRAMP1_PU pin 12 R1587 no stuff no stuff 1.0% C685 22uF 2125 22uF 2125 C1114 22uF 1608 22uF 1608
R_PWM2 Pin 6 R4 no stuff 0 5.0% C686 22uF 2125 22uF 2125 C1115 22uF 1608 22uF 1608
C687 22uF 2125 22uF 2125 C1116 22uF 1608 22uF 1608
C688 22uF 2125 22uF 2125 C1117 22uF 1608 22uF 1608
LL_R1_GPU pin 24 - pin 23 R1069 10K 0.5% 10K 0.5% C689 22uF 2125 22uF 2125 C1118 22uF 1608 22uF 1608
LL_R2_GPU pin 23 - pin 22 R1610 8.25K 0.5% 8.25K 0.5% C690 22uF 2125 22uF 2125 C1119 22uF 1608 22uF 1608
pin 23 - pin 22 R1611 0 5.0% 0 5.0% C691 22uF 2125 22uF 2125 C1120 22uF 1608 22uF 1608
LL_C1_GPU pin 24 - pin 23 C1094 22pF 22pF C692 22uF 2125 22uF 2125 C1121 22uF 1608 22uF 1608
LL_C2_GPU pin 23 - pin 22 C1095 22pF 22pF C693 22uF 2125 22uF 2125
LL_RLEAD_GPU pin 24 - pin 23 R1606 30K 1.0% 30K 1.0% C694 22uF 2125 22uF 2125
LL_CLEAD_GPU pin 24 - pin 23 C1097 1000pF 1000pF C695 22uF 1608 22uF 1608
LL_RLAG_GPU pin 23 - pin 22 R1607 no stuff no stuff C696 22uF 1608 22uF 1608
LL_CLAG_GPU pin 23 - pin 22 C1098 no stuff no stuff C697 22uF 1608 N/A 1608
RDES_GPU pin 22 - pin 21 R1604 665 0.5% 665 0.5% C698 22uF 1608 N/A 1608
RINT_GPU pin 21 - pin 20 R1605 3.24K 1.0% 3.24K 1.0% <Core Design>
A A
CINT_GPU pin 21 - pin 20 C1096 10nF 10nF
RPH21 IPH2_1 - pin 21 R1608 1K 1.0% 1K 1.0% Wistron Corporation
IPHF21_R pin 28 R1580 1.96K 1.0% 1.96K 1.0% C750 22uF 2125 N/A 2125
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
IPHF21_C pin 28 C1077 no stuff no stuff C1109 22uF 2125 N/A 2125 Taipei Hsien 221, Taiwan, R.O.C.
R_MRAMP2 pin 27 R1586 15.4K 1.0% 15.4K 1.0% C1110 N/A 1608 N/A 1608
Title
R_MRAMP2_PU pin 27 R1590 56.2K 1.0% 56.2K 1.0% C1111 N/A 1608 N/A 1608 VT1318M TABLE
C1112 N/A 1608 N/A 1608
HTTPS://REALSCHEMATIC.COM C1113 N/A 1608 N/A 1608 Size
A3
Document Number Rev
SHINAI-4 UMA -1
Date: Tuesday, March 06, 2012 Sheet 100 of 100
5 4 3 2 1