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PUDUCHERRY TECHNOLOGICAL UNIVERSITY

DEPARTMENT OF ELECTRONICS AND COMMUNICATION


ENGINEERING

B. TECH (ECE) – SEVENTH SEMESTER


ABSTRACT FOR

EC228 – MINI PROJECT WORK

A FPGA based implementation of Sobel


edge detection

Under the Guidance of: Submitted by:

Dr.Gnanou Florence Sudha SAKTHIDARSHAN M (20EC1086)

Professor • ECE SARIGHA PV (20EC1090)

THIRUMURUGAN N R P (20EC1117)

UMASHANKAR S (20EC1118)

1
A FPGA based implementation of Sobel
edge detection

Abstract
1. Edge detection is a fundamental image processing technique used in computer
vision, robotics, and various applications. This project presents an FPGA-based
solution for real-time Sobel edge detection, a popular method for detecting
edges in digital images. The FPGA (Field-Programmable Gate Array) provides
parallel processing capabilities, making it well-suited for image processing
tasks.
2. The project leverages the Sobel operator to calculate gradients in the X and Y
directions, which are then combined to determine the magnitude of the gradient
at each pixel. The result is a binary image, where white pixels represent edges,
and black pixels represent non-edges.
3. The FPGA design includes an input module to capture pixel data from an
external source, a Sobel edge detection module, and an output module to display
or transmit the processed image data. The Sobel operator coefficients are
implemented in hardware for efficient and real-time processing.
4. The system is designed to be highly configurable, allowing users to adjust the
sensitivity of edge detection by modifying the threshold value. Additionally, the
project provides the flexibility to interface with various image sources, such as
cameras or memory, and can be adapted to different FPGA platforms.
5. The FPGA-based Sobel edge detection system offers a low-latency and efficient
solution for real-time image processing, making it suitable for applications
requiring rapid edge detection, such as object tracking, gesture recognition, and
robotics. The project serves as a practical example of FPGA-accelerated image
processing, showcasing the capabilities of hardware acceleration in computer
vision tasks.

Calculations:

1.Gradient Calculation in X Direction (gx):


gx = (P2 + 2*P3 + P4) - (P0 + 2*P7 + P6)

2.Gradient calculation in Y Direction (gy):


gy = (P0 + 2*P1 + P2) - (P6 + 2*P5 + P4)

2
3.Gradient Magnitude (edge detection):
• If SX < 0 :
Then SX = −SX

• If SY < 0 :
Then SY = −SY

• S=Sx+Sy

Sample Image: Edge detected image:

REFERENCES:

1. G. Ravivarma K. Gavaskar D. Malathi K. G. Asha B. Ashok S. Aarthi, “Implementation of


Sobel operator based image edge detection on FPGA”, Science Direct, Materials Today:
Proceedings, Volume 45, Part 2, 2021, Pages 2401-2407

2. Nazma Nausheen, Ayan Seal, Pritee Khanna, Santanu Halder, “A FPGA based
implementation of Sobel edge detection,” Science Direct, Microprocessors and
Microsystems, Volume 56, February 2018, Pages 84-91,
https://doi.org/10.1016/j.micpro.2017.10.011

3. Amiri, M., Siddiqui, F.M., Kelly, C. et al. “FPGA-Based Soft-Core Processors for Image
Processing Applications” J Sign Process Syst 87, 139–156 (2017).
https://doi.org/10.1007/s11265-016-1185-7

4. Ronnie O. Serfa Juan, Chan Su Park, Hi Seok Kim, Hyeong Woo Cha, “Fpga Implementation
For Real Time Sobel Edge Detector Block Using 3-line Buffers”, Proceedings of 25th The
IIER International Conference, Kuala Lumpur, Malaysia, 2nd May 2015, ISBN: 978-93-
85465-05-5

5. Kun Zhang, Yuming Zhang, Pu Wang, Ye Tian, JunYang, “An Improved Sobel Edge
Algorithm and FPGA Implementation”, Science Direct, Procedia Computer Science Volume
131, 2018, Pages 243-248

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