Final Implementation Style 1:

Final Implementation Style 2:

This Second implementation was difficult to understand and edit
The first implementation is my final implementation after numerous failed attempts of
implementing my logic as explained to Hammad Bhai on the Lab day.

Below are all circuits I made to help me implement the lab

Below are few Important ones:

Loop 1 of lab:

Loop 2 of Lab:
Loop Conditions:

Others are below:

Full Adder 8 bits:
Full Adder/Subtractor 16 Bits:
Left/Right Shift Register:

Increment 1 to increase Count:

MUX 4 to 1: input 8 bits

MUX 2 to 1: Input 16 bits
To compare if multiplier is 0 or Multipier is not 0
Notes
2 comparators: check if count==no of bits of multiplier
Check if multiplier==0
MUX: which output to give: P=P+Multiplicand or 0

Question Answers:
a) I made 8 bit multiplier not using the addition tree structure because that was much hard
coded and needed much of clock cycles. My implementationwas according to my flowchart i
have made in my working.
b) If 4-bit data is given as input to a 8-bit multiplier, what will be the output, how it will be
affected. Implement a correct mechanism to tackle this problem.You have to design the
circuit for this as well.
I designed bit extender to tackle this problem. That means add 0 to fill in empty spaces from 4th

🙂
bit uptill the 8th bit. By this way our intput would finally be a 8 bit input that can easily be
calculated with circuit made already.
c) Now that you have implemented the 8-bit multiplier successfully, discuss the output of
this multiplier. Will it be different in the number of bits with respect to input?Justify your
answer in any case.
Yes, The size of output be (2n) considering (n) as the input size. However this 8 bit
 🙂
multiplier can easily be used to multiply 1 till 8 bit number but will not be able to multiply
input > 8bit input size .
d) Now, if we want to increase the number of bits of multiplier(basically the input i-e any
n-bit multiplier, where n > 8-bits multiplier),how can we do that and what will be the
effect of this increase in number of bits for the output of multiplier
For such cases I was thinking to solve it in the same logic i used to make full adder 16
bit using 2 8 bit full adders. It was simply to add the least significant half with the least
significant half. The carry of tht goes as input to Cin of the 2nd half i.e. the adder to add
the remaining most significant half. Then finally join both the answers to get a final 16 bit
answer with carry.
e) similarly for multiplier for n>8 bits i will divide. Multiply one half, add its carry to the
other half and alas!