150 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO.
1, JANUARY 2004
A Novel Single-Stage Full-Bridge Buck-Boost
Inverter
Chien-Ming Wang
Abstract—A novel single-stage full-bridge series-resonant
buck-boost inverter (FB-SRBBI) is proposed in this paper. The
proposed inverter only includes a full-bridge topology and a LC
resonant tank without auxiliary switches. The output voltage of
the proposed inverter can be larger or lower than the dc input
voltage, depending on the instantaneous duty-cycle. This property
is not found in the classical voltage source inverter, which produces
an ac output instantaneous voltage always lower than the dc input
voltage. The proposed inverter circuit topology provides the main
switch for turn-on at ZCS by a resonant tank. The nonlinear
control strategy is designed against the input dc perturbation
and achieves well dynamic regulation. An average approach is
employed to analyze the system. A design example of 500 W dc/ac
inverter is examined to assess the inverter performance and it
provides high power efficiency above 90% under the rated power.
Index Terms—Buck-boost, inverter, nonlinear control, ZCS.
I. INTRODUCTION
V OLTAGE-SOURCE PWM inverters have been widely
used in industrial application such as uninterruptible
power supplies, static frequency changes and variable speed
drives. This is due to their capability in allowing continuous
and linear control of the frequency and fundamental component
of the output voltage. However, the conventional voltage source
inverter (VSI) shown in Fig. 1(a), referred to as buck inverter in
this paper [1]–[6], is probably the most popular and important
power converter topology. One of the characteristics of the
buck inverter is that the instantaneous average output voltage
is always lower than the input dc voltage. As a consequence,
when an output voltage larger than the input one is needed,
a boost converter must be used between the dc source and
the inverter, shown in Fig. 1(b). Depending on the power and
voltage levels involved, this solution can result in high volume,
weight, cost and reduced efficiency.
Recent years have seen development of numerous PWM
pattern generation techniques for improving the performance
of a voltage source inverter. They can be divided into forward
PWM techniques and real time wave form feedback control
techniques. But, these PWM techniques are based on the
assumption of an ideal input dc voltage which is achieved by
using a dc link filter with bulky inductor/capacitor components.
This, however increases the cost and size, and reduces the
overall efficiency. Besides, due to a large step change in input
dc voltage for instance, a transient overshoot may be observed
Manuscript received November 11, 2002; revised July 8, 2003. This paper
was published in the Proceedings of the IEEE, APEC’03, 2003. Recommended
by Associate Editor C. K. Tse.
The author is with the Department of Electronic Engineering, Lunghwa Uni-
versity of Science and Technology, Taoyuan, Taiwan 333, R.O.C. (e-mail: jimi-
wang@ms6.hinet.net).
Digital Object Identifier 10.1109/TPEL.2003.820583
0885-8993/04$20.00 © 2004 IEEE
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at the output end. Thus, lots of elapsed control cycles are
required to settle the system operation.
In this paper, a novel single-stage full-bridge series-resonant
buck-boost inverter (FB-SRBBI) is proposed, which naturally
generates an output ac voltage lower or larger than the input dc
voltage depending on the duty-cycle. The inverter only includes a
conventional full-bridge topology and a LC resonant tank without
auxiliary switches. Thus, its configuration is inherently simple
and compact. The nonlinear control strategy is designed against
the input dc perturbation and achieves well dynamic regulation
and properly gates the power switches and building resonance
in the LC tank is proposed. System analysis for predicting and
evaluating the inverter performance are conducted.
II. ANALYSIS OF THE NOVEL SINGLE STAGE FULL-BRIDGE
BUCK-BOOST INVERTER
Fig. 1(c) shows the circuit topology of the presented
FB-SRBBI, which is configured by a series-resonant power
stage and an output filter. The power stage is built by a full-bridge
topology composed of four power switches , , and
with two diodes and , two resonant inductors and
, and a resonant capacitor parallel-loaded with an output
filter formed by and . The four power switches are uni-di-
rectional device. The waveform of the synthesized sinusoidal
waveform (SSW) is realized alternately each half period of the
desired output. In other words, in synthesizing the positive-half
(negative-half) waveform of the SSW is synthesized with the
power switches and and the diode . The
operation sequence begins when one switch remains on
and two switches and remains off in the positive
(negative) half-period of the desired output voltage ,
while proceeds through the inversion at high frequency
switching. The SSW as shown in Fig. 2(b) consists of lots of qua-
sisinusoidal pulse robes (QSP), which are formed by the power
switch and the diode as shown in Fig. 2(a). For
convenience in analysis, only the positive-half period of the SSW
is interpreted. In Fig. 2(a), during one resonant period, there are
three dynamic states including linear-charging, resonant, and
linear-discharging states. The power switch is prescribed
to operate with discontinuous-conduction mode (DCM) in the
series-resonant dynamics. The resonant profiles of and
are simulated in Fig. 2(b), referred to as the QSP, and are
the elements of the SSW. The desired SSW consists of a series
of QSPs, which are equally spread in each switching period
over the positive half-period of , where is the desired
output period. Referring to Fig. 2(a), the three dynamic states for
forming the th QSP in the th switching period from to
are respectively described as follows, where .
 WANG: NOVEL SINGLE-STAGE FULL-BRIDGE BUCK-BOOST INVERTER 151

Fig. 1. (a) Conventional voltage source inverter, (b) conventional circuit used
to generate an output voltage larger than the input dc voltage, and (c) circuit
topology of the full-bridge series-resonant buck-boost inverter.

In order to simplify the mathematical analysis of the FB-SRBBI,

the following assumptions are made including that all the devices
are ideal, the filter inductor is large enough to present nearly
constant dc current during the th switching period, and
the stray losses of , , , and are neglected. The three
dynamic states are respectively described as follows.
1) Charging state, in :
This state begins as the power switch turns on with
ZCS at , the resonant inductor charges linearly
energy from input dc voltage source and the resonant ca-
pacitor discharges its energy to the load until .
The portraits and with the initial conditions Fig. 2. (a) Equivalent circuits of the dynamic states in FB-SRBBI and (b)
two quasisinusoidal pulses (QSPs) in the k th switching period from t to
(due to DCM) and are, respec- t , including i (t) and v (t) and SSW.
tively, represented by

2) Resonant state, in :
(1)
This state begins when the power switch turns off
at , the diode promptly turns on, the series-
(2) resonant loop is then formed by , , , , and .
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 152 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 1, JANUARY 2004

The energy stored in is then transferred to until null where you get (10), shown at bottom of the page. Thus, the
at . The resonant portraits and with average value and in (7) and (9), can be represented
initial states and from (1) and (2) can as (11) and (12), respectively.
then be given by
(11)

(3)

(4)

where is resonant angular frequency,

is characteristic impedance.
3) Linear-discharging state, t in :
This state begins when the energy stored in dis-
charges to null at ,and the diode promptly ceases
conduction, the resonant capacitor then discharges
its energy to the load until the subsequent driving pulse
(12)
arrives at . The resonant portraits of
and form (4) can be given by
where
(5)
(13)
(6)
(14)
The composite profiles of the th and in the
th switching period and the SSW before and after the output
filter are simulated and shown in Fig. 2(b).

III. SYNTHESIZED SINUSOIDAL WAVEFORMS AND AVERAGE

MODEL OF FB-SRBBI
The average value of the resonant voltage robe
during one switching period by the state-space average model
[7] can be obtained as (15)

(7) In the th switching cycle, suppose the FB-SRBBI operates

around the steady-state point , and , with small-
signal perturbation , and . We can define
where you get (8), shown at bottom of the page, and

(9) (16)

(8)

(10)

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 WANG: NOVEL SINGLE-STAGE FULL-BRIDGE BUCK-BOOST INVERTER 153

The desired steady-state and small-signal models are respec-

tively obtained as follows.

A. Steady-State Analysis

(17)

(18)

where

(19)
k
Fig. 3. (a) The th output voltage V versus duty D with different loads
and (b) the definition ofD.

whose output is then compared with the modulating signal .

As the output voltage reaches the reference, switch or
is turned off and the integrator output is reset. The solpe of inte-
gration is proportional to the instantaneous input voltage. When
the input voltage is higher, the rate of integration is faster to
generate a narrow pulse width; Otherwise, a wider pulse is gen-
(20) erated. The PWM pattern generated by this on-line real time
integration is function of the nonideal dc bus. Thus, the feedfor-
ward circuit can promptly compensate for the perturbation in
The th output voltage versus with different loads
the dc bus. This improves the performance of the conventional
is shown in Fig. 3(a). With MATLAB program, we can find a
voltage source inverter (VSI) without resorting to complex con-
polynomial to approximate (18). The approximate equation can
trol circuitry. The conduction duty of the power switch in
then be given by
the th switching period can be described as shown in Fig. 3(b)
and obtained by
(21)

where is load-dependent. (22)

The controller of the FB-SRBBI is constructed in Fig. 4 and
the generated PWM for FB-SRBBI is shown in Fig. 5. A sinu- where is time constant of the integrator. Thus, substi-
soidal PWM (SPWM) technique is used to regulate the system tuting (22) into (21) yields
dynamics. The feedback circuit includes sinusoidal generator,
error amplifier and compensator network. The nonlinear-con-
trol circuit is implemented with a resettable integrator [8]. A
sensing voltage signal is applied to a resettable integrator, (23)
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 154 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 1, JANUARY 2004

(25)

where is frequency modulation ratio, and .A

typical frequency spectrum of the presented FB-SRBBI is sim-
ulated in Fig. 6, whose data are given with reference to design
example described later. In this paper, the second order filter is
used to decrease the total harmonic distortion (THD). Thus, the
th harmonic of can then given by

Fig. 4. Block diagram of the voltage waveform control system and signal in (26)
the control strategy.

where and . and can

Since , in practice, the above equation can then be
then be determined from (26) according to an acceptable min-
approximated by
imum th harmonic component.

(24) B. Small-Signal Analysis

For simplicity in analysis, the reference is also for the following

Fourier series analysis [9]. The th harmonic of de-
(27)
scribed from (10) can then given by

where

(28)

(29)

(30)

(31)
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 WANG: NOVEL SINGLE-STAGE FULL-BRIDGE BUCK-BOOST INVERTER 155

Fig. 5. Signal in the control strategy: (a) reference signal v , (b) feedbacked signal k v , (c) rectify signal v and carrier signal v , (d) gate-source voltage of
switch S , and (d) gate-source voltage of switch S .

The transfer function of versus from (27) is given by

(36)

Fig. 7 is the system block diagram of the presented FB-SRBBI.

The gain of power stage is defined as ,
given from (36), the gain of output filter is defined as
(32) , the sensitivity of the nonlinear controller
is , the transfer function of the compensator is
, and the gain of the feedback transfer function is
a constant value of . The duty cycle of the controller is given
by

(37)
(33) Suppose the nonlinear-control integrator operates around the
steady-state points, , , and with small-signal pertur-
bation, , , and , and hence we define

(38)
(34)
The linearized small-signal of the nonlinear-control integrator
from (37) can be described as

(39)

and

(35) (40)
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 156 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 1, JANUARY 2004

Fig. 6. Harmonic spectra of the output voltage: (a) v (t), before filtering and
v t
(b) ( ), after filtering (where f = 60 Hz).

Fig. 8. Bode diagram of the open loop system G (s)G (s)G (s)H (s): (a)
light load and (b) heavy load.

IV. DESIGN CONSIDERATIONS AND REALIZATION

The design procedure and example of the new FB-SRBBI is
Fig. 7. Closed-loop control system of the FB-SRBBI. described as follows.
Step 1) Input and output data specification.
The output filter is a second orders LC filter. Thus, the gain (input voltage);
of the output filter can be described as (output voltage);
(maximum output power);
(switching frequency), and (resonant
(41) frequency).
Step 2) Decision of the maximum steady-state duty cycle
.
Thus, the open loop transfer function of the presented With the parameters shown in Step 1, the max-
FB-SRBBI can then be described by imum steady-state duty cycle can be obtained
from Fig. 3(a) under the condition of
, , ,
and . We have
. Substituting into (19)
yield .
Step 3) Calculation of the resonant parameters.
(42) The filter current can be obtained as
. Thus, the resonant in-
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 WANG: NOVEL SINGLE-STAGE FULL-BRIDGE BUCK-BOOST INVERTER 157

Fig. 9. Closed-loop frequency response: (a) light load and (b) heavy load. Fig. 10. (a) Sinusoidal control reference v and the integrator output v and
(b) commutation in detail of the switch S .

ductor and the resonant capacitor can be calculated

as H form (17) and F
according to the resonant frequency.
Step 4) Calculation of the filter parameters.
With the previous parameters, the frequency spec-
trums of the output voltage before filtering are sim-
ulated in Fig. 6(a). The dominant frequency is in the
vicinity of the switching frequency. With the speci-
fied , the cut-off frequency of the output
LC filter is given at 2.3 kHz. If we let mH,
then F.
The frequency spectrums of the output voltage after
filtering are simulated in Fig. 6(b).
Step 5) Decision of the compensator.
The open-loop frequency response of is
explored in Fig. 8 by Bode plot technique. By the
K-factor method [10], we preset the desired gain-
crossover frequency at one-eighth of the switching Fig. 11. Waveforms measured at P = 500 W : resonant profiles of i (t)
frequency, i.e., kHz, and set the and v (t).
required phase margin to be greater than 60 , for
system stability. The type III compensator is then ters are given as , ,
employed as shown in Fig. 4; the required parame- , pF, pF and nF.
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 158 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 1, JANUARY 2004

Fig. 12. Waveforms measured at P = 500 W , and f = 40 kHz : (a) v (t) and its spectra, before output filter and (b) v (t) and its spectra, after output filter.
then achieves the system stabilities. With the derived
parameters, the closed-loop frequency response is
shown in Fig. 9.
In hardward realization, we use IGBTs IXSH 35N120A and
S30L60 as the active and passive power switches, respectively.
The communication phenomenon in the switch is measured
in Fig. 10(b). The waveform demonstrates that zero-cur-
rent-switching turn-on is achieved at constant frequency. The
waveform of resonant inductor current and resonant capacitor
voltage is shown in Fig. 11. The output voltage waveforms
and its spectra before and after output filter are measured in
Fig. 12(a) and (b), respectively. Efficiencies comparison of the
presented FB-SBBRI and the conventional inverter in Fig. 1(b)
is shown in Fig. 13. The total harmonics without EMI filter is
Fig. 13. Efficiencies comparison of the presented FB-SBBRI (- -) and the within 5–8%.
conventional inverter in Fig. 1(b) (-o-).
V. CONCLUSION
After compensation, the gain-crossover frequency is A novel single-stage FB-SRBBI is presented with simple and
moved to 5 kHz and the phase margin is 60 , which compact configuration. The proposed inverter is applicable in
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 WANG: NOVEL SINGLE-STAGE FULL-BRIDGE BUCK-BOOST INVERTER
UPS design, whenever an ac output voltage larger than the dc
link voltage in needed, with no need of a second power con-
version stage. The active switches are operated at a fixed fre-
quency with the pulsewidth modulation technique. A resonant
cell is built in the power stage to build ZCS for turning on the
power switches. The state-space averaging approach is used to
estimate the system performance. The circuit operation has been
described and discussed. The design procedure and example of
the new FB-SRBBI is described. Some experiment results prove
the truth of the theoretical prediction.
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Chien-Ming Wang was born in Miao-Li, Taiwan,
R.O.C., in 1966. He received the M.S. degree in
electrical engineering from National Taiwan Ocean
University, Keelung, in 1995, and the Ph.D. degree
from National Taiwan University of Science and
Technology, Taipei, in 2000.
He is an Assistant Professor in the Department
of Electronic Engineering, Lunghwa University of
Science and Technology, Taoyuan, Taiwan, where
he joined the faculty in 2001. He has been engaged
in research and teaching in the areas of power
electronics, electronic circuit design, and control system.