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Multiple Choice Questions for Lecture 1

CCM 4320 Network Systems and Services

1) Which of the following is not done by the Operating System?

a) Exploiting the hardware resources of one or more processors
b) Allowing access to the World Wide Web *
c) Providing a set of servers to system users
d) Managing secondary memory and I/O devices

2) What does the Program Counter (PC) register do?

a) counts the number of bytes in a program
b) counts the number of running programs
c) contains the address of the next instruction of the program *
d) counts how many times a program has been swapped out

3) In computer hardware, where is the next command of the program decoded?

a) In the Instruction Register (IR) *
b) In the Memory Address Register (MAR)
c) In the Memory Buffer Register (MBR)
d) In the Accumulator (AC)
e) In the Program Status Word Register (PSW)

4) A program needs to subtract two numbers, which hardware element should be

used?
a) The AC *
b) The MAR
c) The MBR
d) The IR

5) A program needs to store a value X at memory address Y. It should

a) put X in the MAR and Y in the MBR
b) put Y in the PC and X in the MBR
c) put X in the MBR and Y in the MAR *
d) put X in the IR and Y in the MBR

6) A program needs to load a value X from memory address Y. It should

a) put Y in the PC
b) put Y in the MAR *
c) put Y in the PSW
d) put Y in the MBR

7) What is the first thing that is done when an interrupts occurs

a) The system jumps to the address of the Interrupt Handler
b) The system turns off the interrupt
c) The system saves the state of the PC and the other registers *
d) The system reloads the instruction register

8) Which register is used to indicate whether interrupts are enabled

a) The PC
b) The IR
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c) The PSW*
d) The MAR

9) Which of the following events will NOT cause an interrupt?

a) Division by zero
b) Execution of an illegal instruction
c) Hardware failure
d) A process switch *

10) In an Operating System which interrupt is normal run at highest priority

a) The Ethernet Interrupt
b) The Disk Interrupt
c) The Timer Interrupt *
d) The Display Interrupt

11) My computer runs a multiple interrupt priority system. Let us suppose that
Interrupt X has a higher priority than Interrupt W and Interrupt Y runs at the
higher priority than W but at a lower priority than Interrupt X. Finally
Interrupt Z is of higher priority compared with Interrupt Y but is at a lower
priority compared to Interrupt X. Let us suppose all 4 Interrupts happen almost
simultaneously. In what order will they be served?
a) XZYW *
b) WXYZ
c) ZYXW
d) XYWZ

12) How is Direct Memory Access (DMA) used?

a) It is used to allow the processor to access the memory
b) It is used to move data between main memory and I/O devices *
c) It is used to support external memory devices
d) It is used to allow the processor to communicate with remote memory
devices

13) As we go down the memory hierarchy which statement below is NOT true
a) The cost per bit decreases
b) The capacity increases
c) The speed of access decreases
d) The bandwidth/transfer rates increases *

14) A hardware cache such as the L2 cache on the Pentium is located

a) Between the processor and main memory *
b) Between main memory and the disk
c) Between the processor and the Video Card
d) Between the processor and the Network Interface Card (NIC)

15) When data is not in the L2 cache, the system

a) Only loads the missing word into the cache
b) Moves data from the disk to main memory
c) Performs a cache-line fill *
d) Does a page-table lookup