‘i212, 903 PM Why wolations do you try to fx when you have limited time: setup or hold? | Forum for Elecronios have to ask some question to the manager. 1)wether the design is already P&R or it is before P&R. pre P&R:- 1) u have to fix the setup than the hold bez if u fix setup the clock skew after P&R the hold will be fixed and there may be a chance of the some setup will be fixed and some more will come newly. The hold will be fixed by using the delay cells or the buffers cells. at the P&R stage. post PB 1) have to fix the Hold than the setup if hold is there the chip will not work. if setup is there the chip will work with the redused frequency.so u have to fix the HOLD first. 2) the hold violation will be fixed by inserting the delay cells or the basic buffers in the violating path. 13)After fixing the HOLD u have to goto find the which path is going to cause more violation in the setup. ‘ADD some buffer or ad just some drivestrength of the more delay cell and finally do the STA for the vilating report. i think this will remove all the above problems if itis not removing all. do the step 3 for the violating path till the all possible violations are removed ups iw. edaboard.comihreadswhy-violations-do-you-ty-tofacwnen-you-have-limited-time-selup-or-nold. 720221 a"