32LE3300 Diagram

Internal Use Only
North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
LED LCD TV
SERVICE MANUAL
CHASSIS : LD01D
MODEL : 32LE3300 32LE3300-ZA

MODEL : 32LE3308 32LE3308-ZA
MODEL : 32LE330N 32LE330N-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
/I
P OK MENU INPUT
P/NO : MFL62863042 (1010-REV01) Printed in Korea

CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION ................................................................ 8
BLOCK DIAGRAM...................................................................................14
EXPLODED VIEW .................................................................................. 16
SCHEMATIC CIRUIT DIAGRAM ................................................................
Copyright © 2010 LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer, AC Volt-meter
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical Good Earth Ground
shock. such as WATER PIPE,
To Instrument's CONDUIT etc.
0.15 uF
Leakage Current Cold Check(Antenna Cold Check) exposed
With the instrument AC plug removed from AC source, connect an METALLIC PARTS
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC 1.5 Kohm/10W
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc. When 25A is impressed between Earth and 2nd Ground
If the exposed metallic part has a return path to the chassis, the for 1 second, Resistance must be less than 0.1 Ω
measured resistance should be between 1 MΩ and 5.2 MΩ.
*Base on Adjustment standard
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or
NOTE: If unforeseen circumstances create conflict between the exposure of the assembly.
following servicing precautions and any of the safety precautions on 3. Use only a grounded-tip soldering iron to solder or unsolder ES
page 3 of this publication, always follow the safety precautions. devices.
Remember: Safety First. 4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board 6. Do not remove a replacement ES device from its protective
module or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug or (Most replacement ES devices are packaged with leads
other electrical connection. electrically shorted together by conductive foam, aluminum foil
c. Connecting a test substitute in parallel with an electrolytic or comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective material
installation of electrolytic capacitors may result in an to the chassis or circuit assembly into which the device will be
explosion hazard. installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
2. Test high voltage only by measuring it with an appropriate high and observe all other safety precautions.
voltage meter or other voltage measuring device (DVM, 8. Minimize bodily motions when handling unpackaged
FETVOM, etc) equipped with a suitable high voltage probe. replacement ES devices. (Otherwise harmless motion such as
Do not test high voltage by "drawing an arc". the brushing together of your clothes fabric or the lifting of your
3. Do not spray chemicals on or near this receiver or any of its foot from a carpeted floor can generate static electricity
assemblies. sufficient to damage an ES device.)
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the General Soldering Guidelines
contacts with a pipe cleaner, cotton-tipped stick or comparable 1. Use a grounded-tip, low-wattage soldering iron and appropriate
non-abrasive applicator; 10 % (by volume) Acetone and 90 % tip size and shape that will maintain tip temperature within the
(by volume) isopropyl alcohol (90 % - 99 % strength) range or 500 °F to 600 °F.
CAUTION: This is a flammable mixture. 2. Use an appropriate gauge of RMA resin-core solder composed
Unless specified otherwise in this service manual, lubrication of of 60 parts tin/40 parts lead.
contacts in not required. 3. Keep the soldering iron tip clean and well tinned.
5. Do not defeat any plug/socket B+ voltage interlocks with which 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
receivers covered by this service manual might be equipped. bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
6. Do not apply AC power to this instrument and/or any of its Do not use freon-propelled spray-on cleaners.
electrical assemblies unless all solid-state device heat sinks are 5. Use the following unsoldering technique
correctly installed. a. Allow the soldering iron tip to reach normal temperature.
7. Always connect the test receiver ground lead to the receiver (500 °F to 600 °F)
chassis ground before connecting the test receiver positive b. Heat the component lead until the solder melts.
lead. c. Quickly draw the melted solder with an anti-static, suction-
Always remove the test receiver ground lead last. type solder removal device or with solder braid.
8. Use with this receiver only the test fixtures specified in this CAUTION: Work quickly to avoid overheating the circuit
service manual. board printed foil.
CAUTION: Do not connect the test fixture ground strap to any 6. Use the following soldering technique.
heat sink in this receiver. a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
Electrostatically Sensitive (ES) Devices b. First, hold the soldering iron tip and solder the strand against
Some semiconductor (solid-state) devices can be damaged easily the component lead until the solder melts.
by static electricity. Such components commonly are called c. Quickly move the soldering iron tip to the junction of the
Electrostatically Sensitive (ES) Devices. Examples of typical ES component lead and the printed circuit foil, and hold it there
devices are integrated circuits and some field-effect transistors and only until the solder flows onto and around both the
semiconductor "chip" components. The following techniques component lead and the foil.
should be used to help reduce the incidence of component CAUTION: Work quickly to avoid overheating the circuit
damage caused by static by static electricity. board printed foil.
1. Immediately before handling any semiconductor component or d. Closely inspect the solder area and remove any excess or
semiconductor-equipped assembly, drain off any electrostatic splashed solder with a small wire-bristle brush.
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
unit under test.
IC Remove/Replacement Circuit Board Foil Repair
Some chassis circuit boards have slotted holes (oblong) through Excessive heat applied to the copper foil of any printed circuit
which the IC leads are inserted and then bent flat against the board will weaken the adhesive that bonds the foil to the circuit
circuit foil. When holes are the slotted type, the following technique board causing the foil to separate from or "lift-off" the board. The
should be used to remove and replace the IC. When working with following guidelines and procedures should be followed whenever
boards using the familiar round hole, use the standard technique this condition is encountered.
as outlined in paragraphs 5 and 6 above.
At IC Connections
Removal To repair a defective copper pattern at IC connections use the
1. Desolder and straighten each IC lead in one operation by gently following procedure to install a jumper wire on the copper pattern
prying up on the lead with the soldering iron tip as the solder side of the circuit board. (Use this technique only on IC
melts. connections).
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the 1. Carefully remove the damaged copper pattern with a sharp
IC. knife. (Remove only as much copper as absolutely necessary).
Replacement 2. carefully scratch away the solder resist and acrylic coating (if
1. Carefully insert the replacement IC in the circuit board. used) from the end of the remaining copper pattern.
2. Carefully bend each IC lead against the circuit foil pad and 3. Bend a small "U" in one end of a small gauge jumper wire and
solder it. carefully crimp it around the IC pin. Solder the IC connection.
3. Clean the soldered areas with a small wire-bristle brush. 4. Route the jumper wire along the path of the out-away copper
(It is not necessary to reapply acrylic coating to the areas). pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
"Small-Signal" Discrete Transistor excess jumper wire.
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as At Other Connections
possible to the component body. Use the following technique to repair the defective copper pattern
2. Bend into a "U" shape the end of each of three leads remaining at connections other than IC Pins. This technique involves the
on the circuit board. installation of a jumper wire on the component side of the circuit
3. Bend into a "U" shape the replacement transistor leads. board.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with 1. Remove the defective copper pattern with a sharp knife.
long nose pliers to insure metal to metal contact then solder Remove at least 1/4 inch of copper, to ensure that a hazardous
each connection. condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
Power Output, Transistor Device break and locate the nearest component that is directly
Removal/Replacement connected to the affected copper pattern.
1. Heat and remove all solder from around the transistor leads. 3. Connect insulated 20-gauge jumper wire from the lead of the
2. Remove the heat sink mounting screw (if so equipped). nearest component on one side of the pattern break to the lead
3. Carefully remove the transistor from the heat sink of the circuit of the nearest component on the other side.
board. Carefully crimp and solder the connections.
4. Insert new transistor in the circuit board. CAUTION: Be sure the insulated jumper wire is dressed so the
5. Solder each transistor lead, and clip off excess lead. it does not touch components or sharp edges.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range 3. Test method

This specification is applied to the LED LCD TV used LD01D 1) Performance: LGE TV test method followed
chassis. 2) Demanded other specification
- Safety: CE, IEC specification
2. Requirement for Test - EMC:CE, IEC
Each part is tested as below without special appointment.
1) Temperature
: 25 ºC ± 5 ºC (77 ºF ± 9 ºF), CST : 40 ºC ± 5 ºC
2) Relative Humidity : 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~ 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
4. Component Video Input (Y, CB/PB, CR/PR)

Specification
No. Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.5 60 HDTV 1080p
5. RGB (PC)
Specification
No. Proposed Remark
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA Input 848*480 60 Hz, 852*480 60 Hz
-> 640*480 60 Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1280*768 47.78 59.87 79.5 WXGA
6. 1360*768 47.72 59.8 84.75 WXGA FHD Model
7. 1366*768 47.56 59.6 84.75 WXGA WXGA Model
8. 1280*1024 63.595 60.0 108.875 SXGA FHD model
9. 1280*720 45 60 74.25 720p DTV Standard
10. 1920*1080 66.587 59.93 138.625 WUXGA FHD model
6. HDMI Input
(1) DTV Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 /45 59.94 /60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P
(2) PC Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP
5. 1280*768 47.78 59.87 79.5 WXGA HDCP
6. 1360*768 47.72 59.8 84.75 WXGA HDCP
7. 1440*1050 55.5 59.90 88.750 WSXGA Not used(Moniter Panel)
10. 1280*1024 63.595 60.0 108.875 SXGA HDCP/FHD model
11. 1920*1080 67.5 60.00 138.625 WUXGA HDCP/FHD model
ADJUSTMENT INSTRUCTION
1. Application Range (2) (3)
This specification sheet is applied to all of the LED LCD TV
with LD01D chassis.
2. Designation
1) The adjustment is according to the order which is designated
and which must be followed, according to the plan which can Please Check the Speed :
To use speed between
be changed only on agreeing. from 200KHz to 400KHz
2) Power Adjustment: Free Voltage
3) Magnetic Field Condition: Nil.
5) Click “Auto” tab and set as below
4) Input signal Unit: Product Specification Standard
6) Click “Run”.
5) Reserve after operation: Above 5 Minutes (Heat Run)
7) After downloading, check “OK” message.
Temperature : at 25 ºC ± 5 ºC
Relative humidity : 65 % ± 10 % (4)
Input voltage : 220 V, 60 Hz
filexxx.bin
6) Adjustment equipments: Color Analyzer(CA-210 or CA-110), (5)
DDC Adjustment Jig equipment, SVC remote control.
(7) ……….OK
7) Push The “IN STOP” KEY - For memory initialization.
Case1 : Software version up (6)
1. After downloading S/W by USB, TV set will reboot

automatically
2. Push “In-stop” key
3. Push “Power on” key * USB DOWNLOAD
4. Function inspection 1) Put the USB Stick to the USB socket
5. After function inspection, Push “In-stop” key. 2) Automatically detecting update file in USB Stick
Case2 : Function check at the assembly line - If your downloaded program version in USB Stick is Low,
1. When TV set is entering on the assembly line, Push it didn’t work. But your downloaded version is High, USB
“In-stop” key at first. data is automatically detecting
2. Push “Power on” key for turning it on. 3) Show the message “Copying files from memory”
-> If you push “Power on” key, TV set will recover
channel information by itself.
3. After function inspection, Push “In-stop” key.
3. Main PCB check process

* APC - After Manual-Insult, executing APC
* Boot file Download

1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
(1)
fi lexxx.bin
2) Set as below, and then click “Auto Detect” and check “OK”
message
If “Error” is displayed, Check connection between
computer, jig, and set.
3) Click “Read” tab, and then load download file (XXXX.bin)
by clicking “Read”
4) Click “Connect” tab. If “Can’t” is displayed, check
connection between computer, jig, and set.
4) Updating is staring. 3.1. ADC Process
(1) ADC
- Enter Service Mode by pushing “ADJ” key,
- Enter Internal ADC mode by pushing “G” key at “5. ADC
Calibration”
<Caution> Using ‘power on’ button of the Adjustment R/C,

power on TV.
* ADC Calibration Protocol (RS232)

Item CMD1 CMD2 Data0
Adjust ‘Mode In’ A A 0 0 When transfer the ‘Mode In’,
Carry the command.
ADC Adjust A D 1 0 Automatically adjustment
(The use of a internal pattern)
Adjust Sequence
• aa 00 00 [Enter Adjust Mode]
• xb 00 40 [Component1 Input (480i)]
5) Uploading completed, The TV will restart automatically.
• ad 00 10 [Adjust 480i Comp1]
6) If your TV is turned on, check your updated version and
• xb 00 60 [RGB Input (1024*768)]
Tool option.(explain the Tool option, next stage)
• ad 00 10 [Adjust 1024*768 RGB]
* If downloading version is more high than your TV have,
• aa 00 90 End Adjust mode
TV can lost all channel data. In this case, you have to
* Required equipment : Adjustment R/C.
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
3.2. Function Check
* After downloading, have to adjust Tool Option again. * Check display and sound
1) Push "IN-START" key in service remote controller - Check Input and Signal items. (cf. work instructions)
2) Select “Tool Option 1” and Push “OK” button. 1) TV
3) Punch in the number. (Each model hax their number) 2) AV (SCART1/SCART2/ CVBS)
4) Completed selecting Tool option. 3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60hz)
5) HDMI
6) PC Audio In
* Display and Sound check is executed by Remote control.
4. Total Assembly line process ** Caution **
Color Temperature : COOL, Medium, Warm.
4.1. Adjustment Preparation One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
· W/B Equipment condition adjust other two lower than C0.
CA210 : CH 9, Test signal : Inner pattern (85IRE) (when R/G/B Gain are all C0, it is the FULL Dynamic Range
· Above 5 minutes H/run in the inner pattern. (“power on” key of Module)
of adjust remote control)
Cool 13,000k K X=0.269(±0.002)
* Manual W/B process using adjusts Remote control.
• After enter Service Mode by pushing “ADJ” key,
Y=0.273(±0.002) <Test Signal> • Enter White Balance by pushing “ G ” key at “6. White
Medium 9,300k K X=0.285(±0.002) Inner pattern Balance”.
Y=0.293(±0.002) (216gray,85IRE)
Warm 6,500k K X=0.313(±0.002)
Y=0.329(±0.002)
* Connecting picture of the measuring instrument

(On Automatic control)
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment R/C POWER ON ->
Enter the mode of White-Balance, the pattern will come out.
* After done all adjustments, Press “In-start” button and

Full White Pattern CA-210
compare Tool option and Area option value with its BOM, if
COLOR it is correctly same then unplug the AC cable. If it is not
ANALYZER
TYPE: CA-210 same, then correct it same with BOM and unplug AC cable.
For correct it to the model’s module from factory JIG model.
* Push the “IN STOP” key after completing the function
RS-232C Communication
inspection. And Mechanical Power Switch must be set
“ON”.
* Auto-control interface and directions

1) Adjust in the place where the influx of light like floodlight
4.2. DDC EDID Write (RGB 128Byte )
around is blocked. (illumination is less than 10 lux). • Connect D-sub Signal Cable to D-sub Jack.
2) Adhere closely the Color Analyzer (CA210) to the module • Write EDID Data to EEPROM(24C02) by using DDC2B
less than 10 cm distance, keep it with the surface of the protocol.
Module and Color Analyzer’s prove vertically.(80° ~ 100°). • Check whether written EDID data is correct or not.
3) Aging time * For SVC main Assembly, EDID have to be downloaded to
- After aging start, keep the power on (no suspension of Insert Process in advance.
power supply) and heat-run over 5 minutes.
- Using ‘no signal’ or ‘full white pattern’ or the others, 4.3. DDC EDID Write (HDMI 256Byte)
check the back light on. • Connect HDMI Signal Cable to HDMI Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B
• Auto adjustment Map(RS-232C) protocol.
RS-232C COMMAND • Check whether written EDID data is correct or not.
[CMD ID DATA] * For SVC main Assembly, EDID have to be downloaded to
Wb 00 00 White Balance Start Insert Process in advance.
Wb 00 ff White Balance End
RS-232C COMMAND MIN CENTER MAX 4.4. EDID DATA
1) All Data : HEXA Value
[CMD ID DATA] (DEFAULT)
2) Changeable Data :
Cool Mid Warm Cool Mid Warm *: Serial No : Controlled / Data:01
R Gain jg Ja jd 00 172 192 192 192 **: Month : Controlled / Data:00
***:Year : Controlled
G Gain jh Jb je 00 172 192 192 192 ****:Check sum
B Gain ji Jc jf 00 192 192 172 192
R Cut 64 64 64 128
G Cut 64 64 64 128
B Cut 64 64 64 128
Copyright © 2010 LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
- Auto Download 1) FHD RGB EDID data
• After enter Service Mode by pushing “ADJ” key, 0 1 2 3 4 5 6 7 8 9 A B C D E F
• Enter EDID D/L mode. 00 00 FF FF FF FF FF FF 00 1E 6D ⓐ ⓑ
• Enter “START” by pushing “OK” key. 10 ⓒ 01 03 68 73 41 78 0A CF 74 A3 57 4C B0 23
20 09 48 4C A1 08 00 81 80 61 40 45 40 31 40 01 01
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 7E 8A 42 00 00 1E 01 1D 00 72 51 D0 1E 20
50 6E 28 55 00 7E 8A 42 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
70 ⓓ 00 ⓔ
80 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
90 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
A0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
B0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
C0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
D0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
F0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
2) FHD HDMI EDID data

0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D ⓐ ⓑ
* Edid data and Model option download (RS232) 10 ⓒ 01 03 80 73 41 78 0A CF 74 A3 57 4C B0 23

20 09 48 4C A1 08 00 81 80 61 40 45 40 31 40 01 01
Item CMD1 CMD2 Data0 30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
Download A A 0 0 When transfer the ‘Mode In’, 40 45 00 7E 8A 42 00 00 1E 01 1D 00 72 51 D0 1E 20

50 6E 28 55 00 7E 8A 42 00 00 1E 00 00 00 FD 00 3A
‘Mode In’ Carry the command. 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
Download A E 00 10 Automatically Download 70 ⓓ 01 ⓔ
80 02 03 26 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
(The use of a internal pattern)
90 22 15 01 26 15 07 50 09 57 07 ⓕ
A0 ⓕ E3 05 03 01 01 1D 80 18 71 1C 16 20 58 2C
B0 25 00 7E 8A 42 00 00 9E 01 1D 00 80 51 D0 0C 20
- Manual Download C0 40 80 35 00 7E 8A 42 00 00 1E 02 3A 80 18 71 38
* Caution D0 2D 40 58 2C 45 00 7E 8A 42 00 00 1E 66 21 50 B0
1) Use the proper signal cable for EDID Download E0 51 00 1B 30 40 70 36 00 7E 8A 42 00 00 1E 00 00
- Analog EDID : Pin3 exists F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F9
- Digital EDID : Pin3 exists
2) Never connect HDMI & D-sub Cable at the same time. * Detail EDID Options are below
3) Use the proper cables below for EDID Writing ⓐ Product ID
4) Download HDMI1, HDMI2, separately because HDMI1 is
different from HDMI2 Model Name HEX EDID Table DDC Function
For Analog EDID For HDMI EDID FHD Model 0001 01 00 Analog/Digital
D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘02’ -> ‘02’
Year : ‘2009’ -> ‘13’
ⓓ Model Name(Hex):
MODEL MODEL NAME(HEX)
all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
Item Condition Data(Hex)
Manufacturer ID GSM 1E6D
ⓔ Checksum: Changeable by total EDID data.
Version Digital : 1 01 ⓕ Vendor Specific(HDMI)
Revision Digital : 3 03
INPUT MODEL NAME(HEX)
HDMI1 67030C001000B82D
HDMI2 67030C002000B82D
HDMI3 67030C003000B82D
HDMI4 67030C004000B82D
4.5. V-COM Adjust(Only LGD(M+S) Module) 5. Model name & Serial number D/L
- Why need Vcom adjustment? • Press “Power on” key of service remocon.
A The Vcom (Common Voltage) is a Reference Voltage of (Baud rate : 115200 bps)
Liquid Crystal Driving. • Connect RS232 Signal Cable to RS-232 Jack.
-> Liquid Crystal need for Polarity Change with every frame. • Write Serial number by use RS-232.
Circuit Block • Must check the serial number at the Diagnostics of SET UP
Data (R ,G,B ) & Ga mma menu. (Refer to below).
Cont rol si gnal Re f e r e nce V o ltage
Data (R ,G,B ) & C ont ro l s ignal
Ti m i n g
S Co nt r o ll e r
Gamm a Reference
In t e r f a ce
Cont rol si gnal Volta ge

Y Da t a I n p u t
So urce D r i v e I C
S
T Column Line
Pane l
Gat e Driv e IC
E Power
Po w e rInput
I nput Po w e r V COM
Blo ck
M CLC CST
Liquid
Crys tal
V COM Row Li ne TFT
V COM
5.1. Signal TABLE
CMD LENGTH ADH ADL DATA_1 ... Data_n CS DELAY
- Adjust sequence CMD : A0h

· Press the PIP key of th ADJ remote control.(This PIP key is LENGTH : 85~94h (1~16 bytes)
hot key to enter the VCOM adjuting mode) ADH : EEPROM Sub Address high (00~1F)
(Or After enter Service Mode by pushing “ADJ” key, then ADL : EEPROM Sub Address low (00~FF)
Data : Write data
Enter V-Com Adjust mode by pushing “G” key at “10. V-
CS : CMD + LENGTH + ADH + ADL + Data_1 +…+ Data_n
Com”
Delay : 20ms
· As pushing the right or the left key on the remote control,
and find the V-COM value which is no or minimized the
Flicker. (If there is no flicker at default value, Press the exit 5.2. Command Set
key and finish the VCOM adjustment.) No. Adjust mode CMD(hex) LENGTH(hex) Description
· Push the “OK” key to store value. Then the message “Saing 1 n-bytes Write (n = 1~16)
EEPROM WRITE A0h 84h+n
OK” is pop.
· Press the exit key to finish VCOM adjustment.
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write : Model Name and Serial Number write in
EEPROM,.
(Visual Adjust and control the Voltage level) 5.3. Method & notice
A. Serial number D/L is using of scan equipment.
4.6. Outgoing condition Configuration B. Setting of scan equipment operated by Manufacturing
- When pressing IN-STOP key by SVC remocon, Red LED are Technology Group.
blinked alternatively. And then Automatically turn off. C. Serial number D/L must be conformed when it is produced
(Must not AC power OFF during blinking) in production line, because serial number D/L is mandatory
by D-book 4.0.
4.7. Internal pressure
Confirm whether is normal or not when between power
board’s ac block and GND is impacted on 1.5 kV(dc) or 2.2
kV(dc) for one second.
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or Service man, Sometimes
model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It need
Manual download.
1) Press the ‘instart’ key of ADJ remote controller.
2) Go to the menu ‘5.Model Number D/L’ like below photo.
3) Input the Factory model name(ex 42LD450-ZA) or Serial
number like photo.
4) Check the model name Instart menu -> Factory name

displayed (ex 42LD450-ZA)
5) Check the Diagnostics (DTV country only) -> Buyer model
displayed (ex 42LD450)
BLOCK DIAGRAM
P701, P702 MINI LVDS
16V
3.3V
VGL -5V
VDD_LCM
VCC_LCM
P-GAMMA Block
VST
GIP Model
CLK[1:6]
POWER Block
VDD_EVEN/ODD
HVDD 8V

VCOM
VCOM_FB IC600 LEVEL Shift Block
GMA(1~8) TPS62110
IC601
MAX9668ETP HI GH=VGH
VDD_LCM 16V VDD_LCM 16V Low = VGL
VCC_LCM 3.3V
Copyright © 2010 LG Electronics. Inc. All rights reserved.

VCC_LCM 3.3V IC602
12V
VGH 27V TPS65192
3.3V
16V
PANEL_VCC
VGL -5V
VDD_LCM
VCC_LCM
- 15 -
IC603 VGH 27V
PANEL_VCC
MAX17113 VGL -5V
12V SOE
Mini LVDS Data L(6 bit)

Mini LVDS Data R(6 bit)
POL
AMP_SDA / SCL
IC101 GVST
SATURN7M GCLK[1:6]
GVDD_EVEN/ODD
IC301
H5TQ1G63BFR C-MA[0:12], C-MDQL[0:7], C-MDQU[0:7]
DDR3 SDRAM
LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
710
920
400
880
810
521
800
540
910
830
900
530
LV1
A10
A9
200
A5
120
A21
A2
500
511
300
510
Copyright LG Electronics. Inc. All rights reserved. - 16 - LGE Internal Use Only
IC102
HY27UF082G2B-TPCB
NAND FLASH MEMORY +3.3V_Normal +3.3V_Normal
NC_1 NC_29 LGE107D (S7M Divx_Non RM)

1 48
/PF_CE0 2GBIT
H : Serial Flash NC_2 NC_28
2 47 <T3 CHIP Config(AUD_LRCH)>
L : NAND Flash
NC_3 NC_27
PCM_A[0-7] IC101
/PF_CE1 3 46 Boot from SPI flash : 1’b0
H : 16 bit PCM_D[0-7]
NC_4 NC_26 Boot from NOR flash : 1’b1
3.9K
1K
L : 8 bit 4 45 AR101 S7M_DIVX

NC_5 I/O7 PCM_A[7]
5 44 PCM_D[0] U22 N21
PCM_D0 GPIO143/TCON0 5V_DET_HDMI_1
NC_6 I/O6 PCM_A[6] PCM_D[1] T21 M21
R109
6 43
R107

R/B I/O5 PCM_A[5]
<T3 CHIP Config> PCM_D[2] T22 L22
/F_RB 7 42 (AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0) PCM_D[3] AB18 L21
5V_DET_HDMI_3
RE I/O4 PCM_A[4] PCM_D3 GPIO149/TCON6
PCM_D[4] AC18 P21
/PF_OE 8 41 MIPS_no_EJ_NOR8 : 4’h3 (MIPS as host. No EJ PAD. Byte mode NAND flash.) PCM_D4 GPIO151/TCON8 SIDEAV_DET
22 MIPS_EJ1_NOR8 : 4’h4 (MIPS as host. EJ use PAD1. Byte mode NAND flash.) PCM_D[5] AC19
CE NC_25 PCM_D5
/PF_CE0 9 40 MIPS_EJ2_NOR8 : 4’h5 (MIPS as host. EJ use PAD2. Byte mode NAND flash.) PCM_D[6] AC20
NC_7 NC_24 B51_Secure_no scramble : 4’hb (8051 as host. Internal SPI flash secure boot, no scramble) PCM_D6
PCM_A[0-14] PCM_D[7] AC21 K21
R108 1K
10 39 B51_Sesure_scramble : 4’hc (8051 as host. Internal SPI flash secure boot with scarmble) PCM_D7 GPIO36/UART3_RX WIRELESS_DL_RX
C102
NC_8 NC_23 10uF
L23 for WIRELESS READY
OPT
PCM_A[0] GPIO37/UART3_TX WIRELESS_DL_TX

C101 11 38 +3.3V_Normal U21 K20
PCM_A0 GPIO38 ET_RXER
0.1uF VCC_1
12 37
VCC_2 PCM_A[1] V21 L20 for ETHERNET PHY
PCM_A[2] PCM_A1 GPIO39 FRC_RESET
+3.3V_Normal C103 Y22 M20
VSS_1 VSS_2 PCM_A2 GPIO40 SC1/COMP1_DET
0.1uF PCM_A[3]
R125
13 36
R123
AA22 G20
R117
R120
R115
PCM_A[4] PCM_A3 GPIO41 ERROR_OUT
OPT 1K
R105 NC_9 NC_22
OPT1K
R22 G19
1K
OPT1K
1K
1K 14 35 PCM_A4 GPIO42 MODEL_OPT_0
PCM_A[5] R21
NC_10 NC_21 AUD_LRCH PCM_A5 M_REMOTE
OPT 15 34 PCM_A[6] T23 F20 22 R148
PCM_A[7] PCM_A6 GPIO50/UART1_RX M_REMOTE_RX
CLE NC_20 AUD_SCK T24 F19 22 R149
16 33 M_REMOTE_TX
/PF_CE1 AR102 PCM_A[8] PCM_A7 GPIO51/UART1_TX
R104
AA23 M_REMOTE
10K
OPT
ALE I/O3 PCM_A[3] AUD_MASTER_CLK

17 32 PCM_A[9] PCM_A8
PF_ALE Y20 E7
PWM1 PCM_A[10] PCM_A9 GPIO6/PM0/INT0 USB1_OCD
+3.5V_ST WE I/O2 PCM_A[2] AB17 D7
R103 /PF_WE 18 31 PCM_A10 GPIO7/PM1/PM_UART_TX USB1_CTL
PCM_A[11] AA21 E11
0 WP I/O1 PCM_A[1] PWM0
PCM_A[12] PCM_A11 GPIO8/PM2 HP_DET
19 30 U23 G9 0 R150
R101
3.3K
1K OPT
R118
R121
R124
R126
CONTROL_ATTEN
OPT
1K OPT
R116
C NC_11 I/O0 PCM_A[0] PCM_A[13] PCM_A12 GPIO9/PM3
R106
Y23 F9 0 R110
20 29 PCM_A13 GPIO10/PM4 MODEL_OPT_6
PCM_A[14]
1K
W23 C5
1K
B Q101
1K
1K
/PF_WP NC_12 NC_19 22 PCM_A14 GPIO11/PM5/PM_UART_RX/INT1 MODEL_OPT_1
KRC103S 21 28 E8 33 R146
OPT NC_13 NC_18 PM_SPI_CS1/GPIO12/PM6
3.3K
W22 E9
R102
E 22 27 /PCM_REG PCM_REG_N PM_SPI_WP1/GPIO13/PM7 /FLASH_WP

F7
NC_14 NC_17 PM_SPI_WP2/GPIO14/PM8/INT2 MODEL_OPT_2
23 26 AA17 F6
/PCM_OE PCM_OE_N GPIO15/PM9 TUNER_RESET
NC_15 NC_16 V22 D8
24 25 /PCM_WE PCM_WE_N PM_SPI_CS2/GPIO16/PM10 DEMOD_RESET
+5V_Normal W21 G12
/PCM_IORD PCM_IORD_N GPIO17/PM11/INT3 AV_CVBS_DET
Y21 F10
/PCM_IOWR PCM_IOWR_N GPIO18/PM12/INT4
R132 AA20 D9 33 R147
10K /PCM_CE PCM_CE_N PM_SPI_CK/GPIO1 SPI_SCK
V23 D11
/PCM_IRQA PCM_IRQA_N GPIO0/PM_SPI_CZ /SPI_CS
R133 P23 E10
10K /PCM_CD PCM_CD_N PM_SPI_DI/GPIO2 SPI_SDI for SERIAL FLASH
R23 D10 33 R151
/PCM_WAIT PCM_WAIT_N PM_SPI_DO/GPIO3 SPI_SDO
P22
PCM_RST C109 PCM_RESET
C108 CI_TS_CLK
AR104 0.1uF 0.1uF
IC102-*1 IC102-*2 AA9 CI_TS_VAL
HY27US08121B-TPCB NAND01GW3B2CN6E
OPT
TS0_CLK from CI SLOT
AC17 AA5 CI_TS_SYNC
/PF_CE0
PCM_PF_CE0Z TS0_VLD
/PF_CE1 AB20 AA10 CI_TS_DATA[0-7]
PCM_PF_CE1Z TS0_SYNC
/PF_OE AA18
NC_1 NC_28 NC_1 NC_29 PCM_PF_OEZ
1 512MBIT 48 1 48 22 AB21 AB5 CI_TS_DATA[0]
1GBIT /PF_WE AR103
NC_2 NC_27 NC_2 NC_28 PCM_PF_WEZ TS0_D0 CI_TS_DATA[1]
PF_ALE AB19 AC4
2 47 2 47 PCM_PF_ALE TS0_D1
AD17 Y6 CI_TS_DATA[2]
NC_3 NC_26 NC_3 NC_27 /PF_WP
3 46 3 46 PCM_PF_AD[15] TS0_D2 CI_TS_DATA[3]
/F_RB AA19 AA6
NC_4 NC_25 NC_4 NC_26 22 PCM_PF_RBZ TS0_D3 CI_TS_DATA[4]
W6
4 45 4 45 TS0_D4
AA7 CI_TS_DATA[5]
NC_5 I/O7 NC_5 I/O7 TS0_D5
5 44 5 44 R134 22 M23 Y9 CI_TS_DATA[6]
S7_TXD UART_TX2/GPIO65 TS0_D6 CI_TS_DATA[7]
NC_6 I/O6 NC_6 I/O6 R135 22 N23 AA8
6 43 6 43 S7_RXD UART_RX2/GPIO64 TS0_D7
FE_TS_CLK
R/B
7 42
I/O5 RB
7 42
I/O5
FE_TS_VAL_ERR Internal demod out
for SYSTEM/HDCP R136 22 M22 AC5
RE I/O4 R I/O4
I2C_SDA
R137 22 N22
DDCR_DA/GPIO71 TS1_CLK
AC6
FE_TS_SYNC /External demod in
8 41 8 41 EEPROM&URSA3 I2C_SCL DDCR_CK/GPIO72 TS1_VLD FE_TS_DATA[0-7]
AB6
CE NC_24 E NC_25 TS1_SYNC
9 40 9 40 R138 22 A5
RGB_DDC_SDA DDCA_DA/UART0_TX FE_TS_DATA[0]
NC_7 NC_23 NC_7 NC_24 R139 22 B5 AC10
10 39 10 39 RGB_DDC_SCL DDCA_CK/UART0_RX TS1_D0
AB10 FE_TS_DATA[1]
NC_8 PRE NC_8 NC_23 TS1_D1
11 38 11 38 AC9 FE_TS_DATA[2]
VCC_1 VCC_2 VDD_1 VDD_2 TS1_D2 FE_TS_DATA[3]
PWM0 K23 AB9
12 37 12 37 PWM0/GPIO66 TS1_D3
K22 AC8 FE_TS_DATA[4]
VSS_1 VSS_2 VSS_1 VSS_2 PWM1
13 36 13 36 PWM1/GPIO67 TS1_D4 FE_TS_DATA[5]
PWM2 G23 AB8
NC_9 NC_22 NC_9 NC_22 PWM2/GPIO68 TS1_D5 FE_TS_DATA[6]
G22 AC7
14 35 14 35 SC_RE2 PWM3/GPIO69 TS1_D6
G21 AB7 FE_TS_DATA[7]
NC_10 NC_21 NC_10 NC_21 TO SCART1 SC_RE1 PWM4/GPIO70 TS1_D7
15 34 15 34
CLE NC_20 CL NC_20
16 33 16 33
C6 D12
ALE I/O3 AL I/O3 DSUB_DET SAR0/GPIO31 MPIF_CLK
17 32 17 32 B6 D14
MODEL_OPT_3 SAR1/GPIO32 MPIF_CS_N /PIF_SPI_CS
WE I/O2 W I/O2 C8
18 31 18 31 PCM_5V_CTL R160
SAR2/GPIO33 1K
C7 E14
WP I/O1 WP I/O1 /RST_PHY SAR3/GPIO34 MPIF_BUSY
19 30 19 30 A6
/RST_HUB SAR4/GPIO35
NC_11 I/O0 NC_11 I/O0 E12
20 29 20 29 MPIF_D0
F12
NC_12 NC_19 NC_12 NC_19 MPIF_D1
21 28 21 28 D13
NC_13 NC_18 NC_13 NC_18 MPIF_D2
E13
22 27 22 27 MPIF_D3
NC_14 NC_17 NC_14 NC_17
23 26 23 26
NC_15 NC_16 NC_15 NC_16
24 25 24 25
S7T_DIVX
S7_DIVX
IC101-*4 IC101-*2
LGE101D (S7 Non_Tcon/RM) LGE105D(S7-Tcon Divx_ Non_RM)
AE1 W26
AE1 W26 NC_43 RLV3P
NC_48 LVACLKP/LLV6P/BLUE[3] AF16 W25
AF16 W25 NC_73 RLV3N
NC_78 LVACLKN/LLV6N/BLUE[2] AF1 U26
AF1 U26 NC_59 RLV0P
NC_64 LVA0P/LLV3P/BLUE[9] AE3 U25
AE3 U25 NC_45 RLV0N
NC_50 LVA0N/LLV3N/BLUE[8] AD14 U24
AD14 U24 NC_40 RLV1P
NC_45 LVA1P/LLV4P/BLUE[7] AD3 V26
AD3 V26 NC_29 RLV1N
NC_34 LVA1N/LLV4N/BLUE[6] AF15 V25
AF15 V25 NC_72 RLV2P
NC_77 LVA2P/LLV5P/BLUE[5] AF2 V24
AF2 V24 NC_60 RLV2N
NC_65 LVA2N/LLV5N/BLUE[4] AE15 W24
AE15 W24 NC_57 RLVCKP
NC_62 LVA3P/LLV7P/BLUE[1] AD2 Y26
AD2 Y26 NC_28 RLVCKN
NC_33 LVA3N/LLV7N/BLUE[0] AD16 Y25
AD16 Y25 NC_42 RLV4P
NC_47 LVA4P/LLV8P AD15 Y24
AD15 Y24 NC_41 RLV4N
NC_46 LVA4N/LLV8N AE16
AE16 NC_58
NC_63
AC26
AC26 WPWM
LVBCLKP/LLV0P/GREEN[5] AC25
AC25 OPTP/FLK2
AF3
AF14
NC_66
NC_76
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
AA26
AA25
AA24
AB26
AF3
AF14
AD1
NC_61
NC_71
RLV5P
RLV5N
RLV6P
AA26
AA25
AA24
AB26
URSA degug port URSA_DEBUG
AD1
NC_32 LVB1N/RLV7N/GREEN[8]
AB25
NC_27 RLV6N
AB25 URSA_DEBUG
AD13
AB24
AD13
RLV7P
AB24
P3903 P3904
NC_39 RLV7N
NC_44 LVB2N/RLV8N/GREEN[6] AE14 AC24
AE14
AE13
NC_61 LVB3P/LLV1P/GREEN[3]
AC24
AD26
AE13
NC_56 OPTN/FLK3
AD26
12505WS-03A00 12505WS-03A00
NC_55 FLK
NC_60 LVB3N/LLV1N/GREEN[2] AD25
AD25 GCLK6
LVB4P/LLV0P/GREEN[1] AD24
AD24 GCLK5
LVB4N/LLV0N/GREEN[0] AE4
AE4 NC_46
NC_51 AD5
AD5 NC_31
NC_36 AF4 AD23
AF4 AD23 NC_62 LLV3P
AD4
NC_67 RLV3P/RED[7]
AE23
AD4
NC_30 LLV3N
AE23
1 1
NC_35 RLV3N/RED[6] AE26
AE26
AE2
NC_49
RLV0P/LVSYNC
RLV0N/LHSYNC
AE25
AF26
AE2
NC_44
LLV0P
LLV0N
LLV1P
AE25
AF26
AF25
UART_FRC_RX
RLV1N/LCK
AF25
AF8
AD9
NC_71
RLV2P/RED[9]
RLV1P/LDE
AE24
AF24
AF8
AD9
NC_66
NC_35
LLV1N
LLV2P
LLV2N
AE24
AF24
AF23
2 FRC_SCL 2
NC_40 RLV2N/RED[8]
AF23 LLVCKP
RLV4P/RED[5] AE9 AD22
AE9 AD22 NC_51 LLVCKN
NC_56 RLV4N/RED[4] AF9 AE22
AF9 AE22 NC_67 LLV4P
AF22 3
AE11
AF6
NC_72
NC_58
RLV5P/RED[3]
RLV5N/RED[2]
AF22
AE11
AF6
NC_53
LLV4N 3 FRC_SDA
NC_64
NC_69 AD19
AD19 GOE/GCLK1
AE6
TCON3/OE/GOE/GCLK2
AE19
AE6
NC_48 GSC/GCLK3
AE19
4 4
NC_53 TCON15/SCAN_BLK1 AF11 AD21
AF11 AD21
AD6
AD12
NC_74
NC_37
TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
AE21
AF21
AD6
AD12
AE5
NC_69
NC_32
NC_38
LLV5P
LLV5N
LLV6P
AE21
AF21
AD20
UART_FRC_TX
NC_43 TCON11/CS5/HCON
AE5 AD20 NC_47 LLV6N
NC_52 TCON10/CS4/OPT_N AF12 AE20
AF12 AE20 NC_70 LLV7P
NC_75 TCON9/CS3/OPT_P AF5 AF20
AF5 AF20 NC_63 LLV7N
NC_68 TCON16/WPWM AE12 AF19
AE12 AF19 NC_54 GSPR
NC_59 TCON12/DPM AD18
AD18 GSP/VST
TCON1/STV/GSP/VST AE10 AE18
AE10 AE18 NC_52 SOE
NC_57 TCON5/TP/SOE AF7 AF18
AF7 AF18 NC_65 POL
NC_70 TCON14/SACN_BLK AD11
AD11 NC_37
NC_42 AD7
AD7 NC_33
NC_38 AD10 AB22
AD10 AB22 NC_36 VDD_ODD
NC_41 TCON21/CS10/VGH_ODD AE7 AB23
AE7 AB23 NC_49 VDD_EVEN
NC_54 TCON20/CS9/VGH_EVEN AF10 AC23
AF10 AC23 NC_68 GCLK4
NC_73 TCON13/LEDON AD8 AC22
AD8 AC22 NC_34 GCLK2
NC_39 TCON17/CS6/GCLK4
AB16
AB16 NC_23
NC_26 AA14
AA14 DPM
NC_19 AC15
AC15 HCON
NC_30
AE8
NC_55
NC_15
NC_31
NC_29
Y16
AC16
AC14
AE8
NC_50
NC_15
NC_26
LEDON
Y16
AC16
AC14 I2C +3.3V_Normal
Y11 AA16
Y11 AA16 NC_12 NC_20
NC_12 NC_21 Y19 AA15
Y19 AA15 GND_105 NC_19
GND_105 NC_20
EEPROM
NC_11
NC_17
Y10
AA11
AB15
NC_11
NC_17
SCAN_BLK
Y10
AA11
AB15
DIMMING
AB14
+3.3V_Normal NC_25
NC_24
AB14 SCAN_BLK1
HDCP EEPROM +3.3V_Normal

Addr:10101--
R140
R141
R142
3.3K
R143
3.3K
R144
2.2K
R145
2.2K
S7_NON_DIVX
1K
1K
S7T_NON_DIVX S7M_NON_DIVX
R156 10K
C105 IC101-*5 IC101-*3 IC101-*1 A_DIM PWM0
LGE101 (S7 NON_TON/DiX/RM) LGE105 (S7-Tcon Non_Divx/RM) LGE107 (S7M Non Divx/RM)
0.1uF
IC103 IC104 AE1
AF16
NC_48 LVACLKP/LLV6P/BLUE[3]
W26
W25
AE1
AF16
NC_43 RLV3P
W26
W25
AE1
AF16
FRC_DDR3_A0/DDR2_NC ACKP/RLV3P/RED[3]
W26
W25
R157 100
CAT24WC08W-T
AF1
NC_78
NC_64
LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9]
U26 AF1
NC_73
NC_59
RLV3N
RLV0P
U26 AF1
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
U26
PWM_DIM PWM2
C107 M24M01-HRMN6TP AE3
AD14
AD3
NC_50
NC_45
LVA0N/LLV3N/BLUE[8]
LVA1P/LLV4P/BLUE[7]
U25
U24
V26
AE3
AD14
AD3
NC_45
NC_40
RLV0N
RLV1P
U25
U24
V26
AE3
AD14
AD3
FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A4/DDR2_CASZ
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
U25
U24
V26
R113 AF15
NC_34 LVA1N/LLV4N/BLUE[6]
V25 AF15
NC_29 RLV1N
V25 AF15
FRC_DDR3_A5/DDR2_A10 A1M/RLV1N/RED[6]
V25
4.7K 0.1uF AF2

AE15
NC_77
NC_65
LVA2P/LLV5P/BLUE[5]
LVA2N/LLV5N/BLUE[4]
V24
W24
AF2
AE15
NC_72
NC_60
RLV2P
RLV2N
V24
W24
AF2
AE15
FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
V24
W24 AMP_SDA
A0 1 VCC AD2
NC_62
NC_33
LVA3P/LLV7P/BLUE[1]
LVA3N/LLV7N/BLUE[0]
Y26 AD2
NC_57
NC_28
RLVCKP
RLVCKN
Y26 AD2
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
Y26 R155
8 AD16
AD15
NC_47 LVA4P/LLV8P
Y25
Y24
AD16
AD15
NC_42 RLV4P
Y25
Y24
AD16
AD15
FRC_DDR3_A10/DDR2_A11 A4P/RLV5P/GREEN[9]
Y25
Y24 AMP_SCL 0
NC VCC AE16
NC_46 LVA4N/LLV8N
AE16
NC_41 RLV4N
AE16
FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8]
NC_63 NC_58 FRC_DDR3_A12/DDR2_A8
C111
A1 $0.199
1 8 AC26 AC26 AC26
7 WP
LVBCLKP/LLV0P/GREEN[5] WPWM BCKP/TCON13/GREEN[1]
2 R127 4.7K AF3

LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
AC25
AA26
AA25 AF3
OPTP/FLK2
RLV5P
AC25
AA26
AA25 AF3
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
AC25
AA26
AA25 I2C_SDA 2.2uF OPT
NC_66 LVB0N/RLV6N/RED[0] NC_61 RLV5N FRC_DDR3_BA0/DDR2_BA2 B0M/RLV6N/GREEN[6]
AF14 AA24 AF14 AA24 AF14 AA24
NC_76 LVB1P/RLV7P/GREEN[9] NC_71 RLV6P FRC_DDR3_BA1/DDR2_ODT B1P/RLV7P/GREEN[5]
I2C_SCL E1 WP
AD1
NC_32 LVB1N/RLV7N/GREEN[8]
AB26
AB25
AD1
NC_27 RLV6N
AB26
AB25
AD1
FRC_DDR3_BA2/DDR2_A12 B1M/RLV7N/GREEN[4]
AB26
AB25 I2C_SCL
A2 3 SCL R128 22 2 7 AD13
AB24 AD13
RLV7P
AB24 AD13
B2P/RLV8P/GREEN[3]
AB24
6 AE14
AE13
NC_44
NC_61
NC_60
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
AC24
AD26
AD25
AD24
AE14
AE13
NC_39
NC_56
NC_55
RLV7N
OPTN/FLK3
FLK
GCLK6
AC24
AD26
AD25
AD24
AE14
AE13
FRC_DDR3_MCLK/DDR2_MCLK
FRC_DDR3_CKE/DDR2_RASZ
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
AC24
AD26
AD25
AD24
LD650 Scan
LVB4N/LLV0N/GREEN[0] GCLK5 B4M/TCON8/BLUE[6]
AE4 AE4 AE4
VSS 4 SDA NC_51 NC_46 FRC_DDR3_ODT/DDR2_BA1

NEC_SDA
5 E2
3 A0’h 6
SCL
R111 22 I2C_SCL
AD5
AF4
AD4
NC_36
NC_67
NC_35
RLV3P/RED[7]
RLV3N/RED[6]
RLV0P/LVSYNC
AD23
AE23
AE26
AD5
AF4
AD4
NC_31
NC_62
NC_30
LLV3P
LLV3N
LLV0P
AD23
AE23
AE26
AD5
AF4
AD4
FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AD23
AE23
AE26
NEC_SCL
SCAN_BLK2 R158 100 FRC_PWM1
AE2 AE25 AE2 AE25 AE2 AE25
R129 22 I2C_SDA NC_49 RLV0N/LHSYNC

RLV1N/LCK
RLV2P/RED[9]
AF26
AF25
NC_44 LLV0N
LLV1P
LLV1N
AF26
AF25
FRC_DDR3_RESETB/DDR2_A3 C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
AF26
AF25 OPT
AF8 AE24 AF8 AE24 AF8 AE24
NC_71 RLV1P/LDE NC_66 LLV2P FRC_DDR3_DQSL/DDR2_DQS0 C2P/LLV2P/BLUE[1]
AD9 AF24 AD9 AF24 AD9 AF24
VSS
4 5
SDA
R112 22 AE9
NC_40 RLV2N/RED[8]
RLV4P/RED[5]
AF23
AD22 AE9
NC_35 LLV2N
LLVCKP
AF23
AD22 AE9
FRC_DDR3_DQSLB/DDR2_DQSB0 C2M/LLV2N/BLUE[0]
C3P/LLV4P
AF23
AD22
R159 100 FRC_PWM0
I2C_SDA AF9
AE11
NC_56
NC_72
RLV4N/RED[4]
RLV5P/RED[3]
RLV5N/RED[2]
AE22
AF22
AF9
AE11
NC_51
NC_67
LLVCKN
LLV4P
LLV4N
AE22
AF22
AF9
AE11
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
AE22
AF22
AF6
NC_58
AF6
NC_53
AF6
FRC_DDR3_DML/DDR2_DQ7
SCAN_BLK1/OPC_OUT OPT
C104 C106 AE6
AF11
NC_69
NC_53
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
AD19
AE19
AD21
AE6
AF11
NC_64
NC_48
GOE/GCLK1
GSC/GCLK3
AD19
AE19
AD21
AE6
AF11
FRC_DDR3_DMU/DDR2_DQ11
FRC_DDR3_DQL0/DDR2_DQ6
DCKP/TCON5
DCKM/TCON4
AD19
AE19
AD21
8pF 8pF AD6

AD12
AE5
NC_74
NC_37
NC_43
TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
AE21
AF21
AD20
AD6
AD12
AE5
NC_69
NC_32
NC_38
LLV5P
LLV5N
LLV6P
AE21
AF21
AD20
AD6
AD12
AE5
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
AE21
AF21
AD20
NC_52 TCON10/CS4/OPT_N NC_47 LLV6N FRC_DDR3_DQL4/DDR2_DQ4 D1M/LLV7N
OPT OPT AF12

AF5
AE12
NC_75
NC_68
TCON9/CS3/OPT_P
TCON16/WPWM
AE20
AF20
AF19
AF12
AF5
AE12
NC_70
NC_63
LLV7P
LLV7N
AE20
AF20
AF19
AF12
AF5
AE12
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
D2M/LLV8N
AE20
AF20
AF19
NC_59 TCON12/DPM NC_54 GSPR FRC_DDR3_DQL7/DDR2_DQ5 D3P/TCON3
AD18 AD18 AD18
TCON1/STV/GSP/VST GSP/VST D3M/TCON2
AE10 AE18 AE10 AE18 AE10 AE18
NC_57 TCON5/TP/SOE NC_52 SOE FRC_DDR3_DQU0/DDR2_DQ8 D4P/TCON1
AF7 AF18 AF7 AF18 AF7 AF18
NC_70 TCON14/SACN_BLK NC_65 POL FRC_DDR3_DQU1/DDR2_DQ14 D4M/TCON0
AD11 AD11 AD11
NC_42 NC_37 FRC_DDR3_DQU2/DDR2_DQ13
AD7 AD7 AD7
NC_38 NC_33 FRC_DDR3_DQU3/DDR2_DQ12
AD10 AB22 AD10 AB22 AD10 AB22
NC_41 TCON21/CS10/VGH_ODD NC_36 VDD_ODD FRC_DDR3_DQU4/DDR2_DQ15 GPIO0/TCON15/HSYNC/VDD_ODD
AE7 AB23 AE7 AB23 AE7 AB23
NC_54 TCON20/CS9/VGH_EVEN NC_49 VDD_EVEN FRC_DDR3_DQU5/DDR2_DQ9 GPIO1/TCON14/VSYNC/VDD_EVEN
AF10 AC23 AF10 AC23 AF10 AC23
NC_73 TCON13/LEDON NC_68 GCLK4 FRC_DDR3_DQU6/DDR2_DQ10 GPIO2/TCON7/LDE/GCLK4
AD8 AC22 AD8 AC22 AD8 AC22
NC_39 TCON17/CS6/GCLK4 NC_34 GCLK2 FRC_DDR3_DQU7/DDR2_DQM1 GPIO3/TCON6/LCK/GCLK2
AB16 AB16 AB16

NC_26 NC_23 FRC_GPIO0/UART_RX
AA14 AA14 AA14
NC_19 DPM FRC_GPIO1
AC15 AC15 AC15
NC_30 HCON FRC_GPIO3
Y16 Y16 Y16

NC_15 NC_15 FRC_GPIO8
AC16 AC16 AC16
NC_31 NC_26 FRC_GPIO9/UART_TX
AE8 AC14 AE8 AC14 AE8 AC14
NC_55 NC_29 NC_50 LEDON FRC_DDR3_NC/DDR2_DQM0 FRC_GPIO10
Y11 AA16 Y11 AA16 Y11 AA16

NC_12 NC_21 NC_12 NC_20 FRC_REXT FRC_I2CM_DA
Y19 AA15 Y19 AA15 Y19 AA15
GND_105 NC_20 GND_105 NC_19 FRC_TESTPIN FRC_I2CM_CK
Y10 Y10 Y10

NC_11 NC_11 FRC_I2CS_DA
AA11 AA11 AA11
NC_17 NC_17 FRC_I2CS_CK
AB15 AB15 AB15

NC_25 SCAN_BLK FRC_PWM0
AB14 AB14 AB14
NC_24 SCAN_BLK1 FRC_PWM1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP2_Saturn7M Ver. 1.3
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FLASH/EEPROM/GPIO 1

Only for training and service purposes LGE Internal Use Only
+3.3V_Normal RSDS Power OPT +1.26V_VDDC +1.26V_VDDC
MODEL OPTION VDD_RSDS:88mA
VDDC 1.26V VDDC : 2026mA
MODEL OPTION
VDD_RSDS
100/120Hz LVDS
OPT
PIN NAME
1K
1K
1K
1K
PIN NO. HIGH LOW

1K
1K
1K
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
DDR_512MB
MINI_LVDS
L213
10uF
10uF
10uF
+2.5V_Normal BLM18PG121SN1D
MODEL_OPT_0 G19 FRC NO FRC
FHD
FRC
OLED
GIP
R206
R208
R211
R226
R295
R294
R214
L214
C275
C276
C228
C4013
C4006
C4011
C4019
C4024
MODEL_OPT_1 C5 MINI LVDS LVDS VDD33 BLM18PG121SN1D
C277
C280
C283
C292
C299
R201 100 MODEL_OPT_2 F7 DDR_512MB DDR_256MB S7M C4005
IF_AGC_SEL MODEL_OPT_0 0.1uF
R202 100
LNA2_CTL MODEL_OPT_1 MODEL_OPT_3 B6 FHD HD
R203 100
RF_SWITCH_CTL MODEL_OPT_2
R204 100 MODEL_OPT_4
BT_ON/OFF MODEL_OPT_3 E18 100/120Hz LVDS 50/60Hz LVDS
R210 100
3D_POWER_EN MODEL_OPT_4
MODEL_OPT_5 IC101
R213 3D 100 D18 GIP NON_GIP
/3D_FPGA_RESET MODEL_OPT_5
3D +1.26V_VDDCLGE107D (S7M Divx_Non RM)
MODEL_OPT_6 MODEL_OPT_6 F9 OLED LCD
Normal Power 3.3V S7M_DIVX
50/60Hz LVDS
1K
1K
1K
1K
1K
1K
1K
+3.3V_Normal VDD33
DDR_256MB
H11 G18
NON_GIP
VDDC_1 GND_1
NO_FRC
H12 H9
LVDS
HD
LCD
VDD33_T/VDDP/U3_VD33_2:47mA VDDC_2 GND_2

L204 H13 H10
R207
R209
R212
R227
R293
R297
VDDC_3 GND_3
R215
BLM18PG121SN1D H14 H18

VDDC_4 GND_4
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
H15 H19
0.1uF
0.1uF
0.1uF
Close to MSTAR DTV_IF VDDC_5 GND_5
C293 10uF
C4001 10uF
C284 10uF
J12 J10
R288 100 C257 0.1uF VDDC_6 GND_6
IF_P_MSTAR J13 J17
R289 100 C258 0.1uF VDDC_7 GND_7
IC101 IF_N_MSTAR
C4007
C4012
C4014
C4020
C4031
J14 J18
C4025
C4043
C4044
LGE107D (S7M Divx_Non RM) VDDC_8 GND_8
J15 J19
C250 0.1uF R4002 47 TU_SIF VDDC_9 GND_9
J16 K9
C251 0.1uF R4003 47
1000pF
VDDC_10 GND_10
OPT
L18 K10
C264
F1 W2 VDDC_11 GND_11
K11
CK+_HDMI1 A_RXCP S7M_DIVX VIFP TP201 ANALOG SIF GND_12
F2 W1 AVDD_MEMPLL:24mA AU33:31mA FRC_AVDD:60mA H16 K12
CK-_HDMI1 A_RXCN VIFM TP202 Close to MSTAR MIU0VDDC A_DVDD GND_13
G2 K19 K13
D0+_HDMI1 A_RX0P VDD33 AU33 VDD33 FRC_AVDD MIU1VDDC
G3 V2 B_DVDD GND_14
K14
D0-_HDMI1 A_RX0N IP GND_15
H3 V1 L215 L221 L19 K15
D1+_HDMI1 A_RX1P IM FRC_VDDC_0 GND_16
G1 +3.3V_Normal BLM18PG121SN1D BLM18PG121SN1D
0.1uF
0.1uF
D1-_HDMI1 M18 K16
A_RX1N L227 FRC_VDDC_1 GND_17
H1 Y2 M19 K17
D2+_HDMI1 A_RX2P SSIF/SIFP BLM18PG121SN1D C4015 FRC_VDDC_2 GND_18
H2 Y1 N18 K18
D2-_HDMI1 A_RX2N SSIF/SIFM 0.1uF
F5 FRC_VDDC_3 GND_19
C4023
C4040
N19 L9
DDC_SDA_1 DDCDA_DA/GPIO24 C4064 Close to MSTAR FRC_VDDC_4 GND_20
F4 U3 R4019 N20 L10
DDC_SCL_1 DDCDA_CK/GPIO23 QP TP203 0.1uF FRC_VDDC_5 GND_21
E6 V3 1K P18 L11
HPD1 HOTPLUGA/GPIO19 QM TP204 R4020 FRC_VDDC_6 GND_22
FRC_VDD33_DDR:50mA P19 L12
10K FRC_LPLL:13mA FRC_MPLL:4mA FRC_VDDC_7 GND_23
D3 Y5 P20 L13
CK+_HDMI2 B_RXCP IFAGC IF_AGC_MAIN VDD33 FRC_LPLL FRC_AVDD FRC_VDD33_DDR
C1 Y4 FRC_VDDC_8 GND_24
R4032 0 L14
CK-_HDMI2 B_RXCN RF_TAGC TP205 AMP_SCL C4065 GND_25
D1 R4033 0 0.022uF L206 L222 Y12 L15
D0+_HDMI2 B_RX0P AMP_SDA TU/DEMOD_I2C BLM18PG121SN1D BLM18PG121SN1D FRCVDDC U3_DVDD_DDR GND_26
D2 U1 CHINA_OPT R291 16V
0.1uF
0.1uF
0.1uF
22 L16
D0-_HDMI2 B_RX0N TGPIO0/UPGAIN DEMOD_SCL GND_27
E2 U2 CHINA_OPT R292 22 L17
D1+_HDMI2 B_RX1P TGPIO1/DNGAIN DEMOD_SDA GND_28
E3 R3 J11 M9
D1-_HDMI2 B_RX1N TGPIO2/I2C_CLK TU_SCL AVDD1P2 GND_29
F3 T3
C4016
C4041
C4045 1uF L7 M10
D2+_HDMI2 TU_SDA
C286
B_RX2P TGPIO3/I2C_SDA DVDD_NODIE GND_30
E1 M11
D2-_HDMI2 B_RX2N GND_31
D4 T2 C261 27pF M12
DDC_SDA_2 DDCDB_DA/GPIO26 XTALIN GND_32
E4 T1 ADC2P5 H7 M13
R287
DDC_SCL_2 X201 VDD33_DVI:163mA

DDCDB_CK/GPIO25 XTALOUT AVDD2P5_ADC_1 GND_33
1M
D5 24MHz +3.3V_Normal VDD33_DVI AVDD_DMPLL J7 M14

HPD2 HOTPLUGB/GPIO20 C262 27pF AVDD2P5_ADC_2 GND_34
HDMI
J8 M15
AA2 G14 R4028 L207 L217 AVDD25_REF GND_35
0 OPT AMP_SDA BLM18PG121SN1D BLM18PG121SN1D M16
CK+_HDMI4 C_RXCP SPDIF_IN/GPIO177 GND_36
AA1 G13 R296 100 M17
CK-_HDMI4 C_RXCN SPDIF_OUT/GPIO178 SPDIF_OUT GND_37
AB1 AU25
C4008
0.1uF
C4017
0.1uF
0.1uF
C4002
0.1uF
C287 C288 L8 N10
D0+_HDMI4
C294
C_RX0P 10uF AVDD_AU25 GND_38
AA3 0.1uF N11
D0-_HDMI4 C_RX0N B/T USB GND_39
AB3 B7 N12
D1+_HDMI4 C_RX1P DM_P0 BT_DM GND_40
AB2 A7 AVDD2P5 W15 N13
D1-_HDMI4 C_RX1N DP_P0 BT_DP PVDD_1 GND_41
AC2 AVDD2P5 Y15 N14
D2+_HDMI4 C_RX2P AVDD_DMPLL/AVDD_NODIE:7.362mA PVDD_2 GND_42
AC1 AF17 N15
D2-_HDMI4 C_RX2N DM_P1 SIDE_USB_DM GND_43
AB4 AE17 AVDD25_PGA U8 N16
DDC_SDA_4 DDCDC_DA/GPIO28 DP_P1 SIDE_USB_DP AVDD25_PGA GND_44
AA4 N17
DDC_SCL_4 DDCDC_CK/GPIO27 SIDE USB GND_45
AC3 P10
HPD4 HOTPLUGC/GPIO21 GND_46
F14 AVDD_DMPLL M8 P11
I2S_IN_BCK/GPIO175 NEC_SDA AVDD_NODIE GND_47
A2 F13 P12
CK+_HDMI3 D_RXCP I2S_IN_SD/GPIO176 COMP2_DET GND_48
A3 F15 P13
CK-_HDMI3 D_RXCN I2S_IN_WS/GPIO174 NEC_SCL GND_49
B3 VDD33_DVI N9 P14
D0+_HDMI3 D_RX0P
D0-_HDMI3
A1
D_RX0N I2S_OUT_BCK/GPIO181
D20
AUD_SCK
Normal 2.5V P9
AVDD_DVI_1
AVDD_DVI_2
GND_50
GND_51
P15
B1 E20 AVDD2P5/ADC2P5:162mA N8 P16
I2S_I/F
D1+_HDMI3 D_RX1P I2S_OUT_MCK/GPIO179 AUD_MASTER_CLK AVDD3P3_CVBS GND_52
B2 D19 AVDD_DMPLL P8 P17
D1-_HDMI3 D_RX1N I2S_OUT_SD/GPIO182 AUD_LRCH +2.5V_Normal AVDD2P5 AVDD2P5 ADC2P5
C2 F18 R4029 AVDD_DMPLL GND_53
0 OPT R10
D2+_HDMI3 D_RX2P I2S_OUT_SD1/GPIO183 AMP_SCL GND_54
C3 E18 L211 R11
D2-_HDMI3 D_RX2N I2S_OUT_SD2/GPIO184 MODEL_OPT_4 R4022
B4 D18 BLM18PG121SN1D 0 AU33 GND_55
T7 R12
DDC_SDA_3 DDCDD_DA/GPIO30 I2S_OUT_SD3/GPIO185 MODEL_OPT_5
0.1uF
0.1uF
C4 E19 AVDD_AU33 GND_56
U7 R13
C289 10uF
DDC_SCL_3 DDCDD_CK/GPIO29 I2S_OUT_WS/GPIO180 AUD_LRCK 1/10W
E5 AVDD_EAR33 GND_57
5% R14
HPD3 HOTPLUGD/GPIO22 GND_58
D6 R15
CEC_REMOTE_S7 CEC/GPIO5
C4026
N1 C236 2.2uF VDD33 GND_59
C295
T9 R16
LINE_IN_0L SC1/COMP1_L_IN AVDD33_T GND_60
P3 C237 2.2uF R17
R4024 22 LINE_IN_0R SC1/COMP1_R_IN GND_61
G5 P1 C238 2.2uF R8 R18
AUDIO IN
DSUB_HSYNC R4025 22 HSYNC0 LINE_IN_1L AV_L_IN VDDP_1 GND_62

G6 P2 C239 2.2uF R9 T10
DSUB_VSYNC VSYNC0 LINE_IN_1R AV_R_IN +2.5V_Normal AU25 +2.5V_Normal AVDD25_PGA
R228 33 C204 0.047uF K1 P4 C4059 2.2uF VDDP_2 GND_63
T8 T11
DSUB_R+ RIN0P LINE_IN_2L SIDEAV_L_IN VDDP_3 GND_64
DSUB
R229 68 C205 0.047uF L3 P5 C4060 2.2uF L212 L219 T12

DSUB_R- RIN0M LINE_IN_2R SIDEAV_R_IN GND_65
R230 33 C206 0.047uF K3 R6 C242 2.2uF BLM18PG121SN1D BLM18PG121SN1D T13
DSUB_G+ GIN0P COMP2_L_IN
0.1uF
LINE_IN_3L
0.1uF
R231 68 C207 0.047uF K2 T6 GND_66
C243 2.2uF V20 T14
DSUB_G- GIN0M LINE_IN_3R COMP2_R_IN FRC_VD33_2_1 GND_67
R232 33 C208 0.047uF J3 U5 C244 2.2uF W20 T15
DSUB_B+ BIN0P LINE_IN_4L PC_L_IN AU25:10mA AVDD25_PGA:13mA FRC_VD33_2_2 GND_68
R233 68 C209 0.047uF J2 V5 C245 2.2uF T16
DSUB_B- BIN0M LINE_IN_4R PC_R_IN
C4027
R234 0 C210 1000pF J1 U6 C246 VDD_RSDS GND_69
C296
2.2uF OPT U19 T17
10K
10K
R4026
R4023
SOGIN0 LINE_IN_5L FRC_AVDD_RSDS_1 GND_70

V6 C247 2.2uF OPT U20 T18
SCART1_RGB/COMP1 LINE_IN_5R
V19
FRC_AVDD_RSDS_2 GND_71
T19
G4 FRC_AVDD_RSDS_3 GND_72
U10
SC1_ID HSYNC1 GND_73
H6 U4 W19 U11
AUDIO OUT
SC1_FB VSYNC1 LINE_OUT_0L BT_LOUT FRC_AVDD FRC_AVDD GND_74

R253 33 C211 0.047uF K5 W3 U18 U12
SC1_R+/COMP1_Pr+ RIN1P LINE_OUT_2L SCART1_Lout FRC_LPLL FRC_AVDD_LPLL GND_75
R254 68 C212 0.047uF K4 W4 T20 U13
SC1_R-/COMP1_Pr- RIN1M LINE_OUT_3L TP207
R255 C213 J4 V4 FRC_AVDD_MPLL GND_76
SC1_G+/COMP1_Y+
R256
33
68 C214
0.047uF
0.047uF K6
GIN1P LINE_OUT_0R
Y3
TP208 DDR3 1.5V FRC_VDD33_DDR Y14
GND_77
U14
U15
SC1_G-/COMP1_Y- GIN1M LINE_OUT_2R SCART1_Rout
BLM18PG121SN1D
R257 33 0.047uF H4 W5 FRC_VDD33_DDR GND_78
C215 TP209 U16
SC1_B+/COMP1_Pb+ BIN1P LINE_OUT_3R GND_79
R258 68 C216 0.047uF J6 AVDD_DDR0 U17
SC1_B-/COMP1_Pb- BIN1M +1.5V_DDR AVDD_DDR0:55mA AVDD_DDR1:55mA
J5 R4 GND_80
C217 1000pF VDD33 V7
SC1_SOG_IN SOGIN1 MIC_DET_IN GND_81
R236 0 T5 C234 OPT 2.2uF R19 V8
0.1uF
AVDD_DDR0 AVDD_DDR1
5%
1/10W
0
R4027
MICCM
C4046
0.1uF
AVDD_MEMPLL GND_82
L209
NON_EU R5 C235 2.2uF W14 V9

MICIN FRC_AVDD_MEMPLL GND_83
H5 OPT V10
HSYNC2 GND_84
R237 33 C218 0.047uF N3 T4 V11
COMP2
COMP2_Pr+ RIN2P AUCOM L202 GND_85
C285
R238 68 C219 0.047uF N2 AVDD_DDR0 D15 V12
C4018
C4022
C278
C281
COMP2_Pr- RIN2M BLM18SG121TN1D

0.1uF
C4003
0.1uF
C4028
0.1uF
C4032
0.1uF
C4036
0.1uF
C4038
0.1uF
0.1uF
C4009
0.1uF
AVDD_DDR0_D_1 GND_86
C4042
0.1uF
R239 M2 P7
C290
C297
33 C220 0.047uF D16 V13
10uF
10uF
10uF
10uF
COMP2_Y+ GIN2P VRM AVDD_DDR0_D_2 GND_87

R240 68 C221 0.047uF M1 C249 C253 C256 C263 E15 V14
COMP2_Y- GIN2M 4.7uF 1uF 0.1uF 10uF AVDD_DDR0_D_3 GND_88
R241 33 C222 0.047uF L2 R7 E16 V15
COMP2_Pb+ BIN2P VAG AVDD_DDR0_D_4 GND_89
R242 68 C223 0.047uF L1 P6 E17 V16
COMP2_Pb- BIN2M VRP AVDD_DDR0_C GND_90
R243 0 C224 1000pF M3 V17
BLM18PG121SN1D
CM2012F5R6KT
SOGIN2
R1 L203 5.6uH H/P OUT AVDD_DDR1 F16
GND_91
V18
HP_OUT_1L HP_LOUT +1.5V_FRC_DDR AVDD_DDR0
R2 L205 5.6uH AVDD_DDR1_D_1 GND_92
AVDD_DDR_FRC:55mA F17 W7
HP_OUT_1R HP_ROUT AVDD_DDR1_D_2 GND_93
R244 33 C225 0.047uF N4 CM2012F5R6KT G16 W8
4.7uF
4.7uF
TU_CVBS CVBS0P AVDD_DDR1_D_3

R4014
1/16W
GND_94
C268
C272
R245 33 C226 0.047uF N6 AVDD_DDR_FRC MVREF G17 W9

L210
SC1_CVBS_IN CVBS1P
FRC
AVDD_DDR1_D_4 GND_95
RMII For Ethernet
R246 33 C227 0.047uF L4 E21 1K
1%
H17 W10
CVBS In/OUT
AV_CVBS_IN CVBS2P ET_RXD0 EPHY_RXD0 AVDD_DDR1_C GND_96

R4016 33 C4057 0.047uF L5 E22 R278 ETHERNET 33 W11
SIDEAV_CVBS_IN CVBS3P ET_TXD0 EPHY_TXD0 GND_97
R248 33 C229 0.047uF L6 W12
FRC
C4004 FRC
C4010 FRC
FRC
FRC
FRC
CHB_CVBS_IN
C240 FRC
CVBS4P
R4015
1/16W
R249 33 C230 0.047uF M4 D21 AVDD_DDR_FRC GND_98

0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
AB11 W13
0.1uF
AV_CVBS_IN2 CVBS5P ET_RXD1 EPHY_RXD1 C241 FRC_AVDD_DDR_D_1 GND_99

10uF
10uF
R250 33 C231 0.047uF M5 F21 R280 ETHERNET 33

1K
1%
AB12 W16
EPHY_TXD1
C291
C298
C279
C282
C203 CVBS6P ET_TXD1 FRC_AVDD_DDR_D_2 GND_100

R251 33 C232 0.047uF K7 AC11 W17
1000pF CVBS7P FRC_AVDD_DDR_D_3 GND_101
OPT E23 AC12 W18
ET_REFCLK EPHY_REFCLK FRC_AVDD_DDR_D_4 GND_102
TP210 M6 D22 R282 ETHERNET 33 AA12 Y13
CVBS_OUT1 ET_TX_EN EPHY_EN FRC_AVDD_DDR_C GND_103
DTV/MNT_VOUT M7 F22 R283 ETHERNET 33 Y18
CVBS_OUT2 ET_MDC EPHY_MDC GND_104
D23 R284 ETHERNET 33 AA13
ET_MDIO EPHY_MDIO GND_105
R252 68 C233 0.047uF N5 F23 R285 ETHERNET 33 RSDS Power OPT AB13
VCOM0 ET_CRS EPHY_CRS_DV GND_106
+1.26V_VDDC AC13
MIU0VDDC MVREF GND_107
Close to MSTAR +1.26V_VDDC FRCVDDC G15
F8 MVREF
AVLINK TP206 OPT L228
G8 R298 100 BLM18SG700TN1D L225 J9
IRINT IR BLM18SG700TN1D GND_FU
K8 Y7 L223
0.1uF
TESTPIN NC_1
0.1uF
A4 MIU1VDDC U9 BLM18SG121TN1D
C4066 10uF
Y8
SOC_RESET
C4061 10uF
AV_CVBS_IN2 RESET NC_2 PGA_VCOM

Y17 OPT L226
TP211 U3_RESET +3.3V_Normal
R205 BLM18SG700TN1D
0.1uF
C4062
R4006
C4063 10uF
C4058
10K
FRC
22 10K
FRC_RESET
R4018
C4056
R4017
10K
FRC
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN_2 2

IC301-*1
H5TQ1G63BFR-H9C
VCC1.5V_U3_DDR
DDR3 1.5V By CAP - Place these Caps near Memory VCC1.5V_U3_DDR
FRC_DDR_1333
+1.5V_FRC_DDR
N3 M8
A0 VREFCA
P7
L301 A1
P3
A2
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C301
10uF
C315
N2 H1
C310
C303
C305
C306
C307
C308
C309
C311
C313
C316
C317
C318
C319
C320
C321
C322
C323
C324 A3 VREFDQ
C325 P8
10uF 0.1uF A4
P2
10V 16V A5
R8 L8
A6 ZQ
Close to DDR Power Pin R2
A7
T8
A8
R3 B2
A9 VDD_1
L7 D9
A10/AP VDD_2
R7 G7
A11 VDD_3
N7 K2
A12/BC VDD_4
T3 K8
A13 VDD_5
VCC1.5V_U3_DDR N1
VCC1.5V_U3_DDR VDD_6
M7 N9
A15 VDD_7
R1
VDD_8
M2 R9
R301
1K 1%
R304
1K 1%
BA0 VDD_9
S7M_DIVX N8
BA1
M3
C-MVREFDQ IC101 BA2
A1
0.1uF
C-MVREFCA
1000pF
0.1uF
1000pF
1%
LGE107D (S7M Divx_Non RM) VDDQ_1

1%
J7 A8
R302
CK VDDQ_2
R305
K7 C1
CK VDDQ_3
C304
1K
K9 C9
C302
C314
1K
AR301
C312
AE1 W26 CKE VDDQ_4

D2
C-MA9 C-TMA9 C-TMA0 FRC_DDR3_A0/DDR2_NC ACKP/RLV3P/RED[3] RXBCK+ VDDQ_5
AF16 W25 L2 E9
C-MA2 C-TMA2 C-TMA1 FRC_DDR3_A1/DDR2_A6 ACKM/RLV3N/RED[2] RXBCK- CS VDDQ_6
AF1 U26 K1 F1
C-MA0 C-TMA0 C-TMA2 FRC_DDR3_A2/DDR2_A7 A0P/RLV0P/RED[9] RXB0+ ODT VDDQ_7
AE3 U25 J3 H2
C-MBA2 C-TMBA2 C-TMA3 FRC_DDR3_A3/DDR2_A1 A0M/RLV0N/RED[8] RXB0- RAS VDDQ_8
AD14 U24 K3 H9
CLose to DDR3 CLose to Saturn7M IC 10 C-TMA4 FRC_DDR3_A4/DDR2_CASZ A1P/RLV1P/RED[7] RXB1+ CAS
AD3 V26 VDDQ_9
AR302 L3
C-TMA5 FRC_DDR3_A5/DDR2_A10 A1M/RLV1N/RED[6] RXB1- WE
C-MA8 C-TMA8 AF15 V25 J1
C-TMA6 FRC_DDR3_A6/DDR2_A0 A2P/RLV2P/RED[5] RXB2+ NC_1
C-MA6 C-TMA6 AF2 V24 T2 J9
C-TMA7 FRC_DDR3_A7/DDR2_A5 A2M/RLV2N/RED[4] RXB2- RESET NC_2
C-MA4 C-TMA4 AE15 W24 L1
C-TMA8 FRC_DDR3_A8/DDR2_A2 A3P/RLV4P/RED[1] RXB3+ NC_3
C-MBA1 C-TMBA1 AD2 Y26 L9
C-TMA9 FRC_DDR3_A9/DDR2_A9 A3M/RLV4N/RED[0] RXB3- NC_4
IC301 10 AD16 Y25 F3 T7
C-TMA10 FRC_DDR3_A10/DDR2_A11 A4P/RLV5P/GREEN[9] RXB4+ DQSL NC_6
H5TQ1G63BFR-12C AR303 AD15 Y24 G3
C-TMA11 FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8] RXB4- DQSL
C-MA10 C-TMA10 AE16
C-TMA12 FRC_DDR3_A12/DDR2_A8
FRC_DDR_1600 C-MA12 C-TMA12 C7 A9
AC26 DQSU VSS_1
M8 N3 C-MA1 C-TMA1 B7 B3
C-MVREFCA C-MA0 BCKP/TCON13/GREEN[1] RXACK+ DQSU VSS_2
VREFCA A0 AC25 E1
P7 C-MA11 C-TMA11 RXACK-
A1 C-MA1 BCKM/TCON12/GREEN[0] VSS_3
P3 10 AA26 E7 G8
C-MA2 B0P/RLV6P/GREEN[7] RXA0+ DML VSS_4
A2 AF3 AA25 D3 J2
H1 N2 AR304 C-TMBA0 FRC_DDR3_BA0/DDR2_BA2 RXA0-
C-MVREFDQ VREFDQ A3 C-MA3 B0M/RLV6N/GREEN[6] DMU VSS_5
P8 C-MA3 C-TMA3 AF14 AA24 J8
C-MA4 C-TMBA1 FRC_DDR3_BA1/DDR2_ODT B1P/RLV7P/GREEN[5] RXA1+ VSS_6
A4 AD1 AB26 E3 M1
P2 C-MA5 C-TMA5 C-TMBA2 RXA1-
R303 A5 C-MA5 FRC_DDR3_BA2/DDR2_A12 B1M/RLV7N/GREEN[4] DQL0 VSS_7
L8 R8 C-MA7 C-TMA7 AB25 F7 M9
C-MA6 B2P/RLV8P/GREEN[3] RXA2+ DQL1 VSS_8
ZQ A6 AD13 AB24 F2 P1
240 R2 C-MRESETB C-TMRESETB C-TMCK RXA2-
A7 C-MA7 FRC_DDR3_MCLK/DDR2_MCLK B2M/RLV8N/GREEN[2] DQL2 VSS_9
1% T8 10 AE14 AC24 F8 P9
C-MA8 C-TMCKE FRC_DDR3_CKE/DDR2_RASZ B3P/TCON11/BLUE[9] RXA3+ DQL3 VSS_10
A8 AE13 AD26 H3 T1
B2 R3 R307 C-TMCKB RXA3-
VDD_1 A9 C-MA9 FRC_DDR3_MCLKZ/DDR2_MCLKZ B3M/TCON10/BLUE[8] DQL4 VSS_11
D9 L7 C-MCK C-TMCK AD25 H8 T9
C-MA10 10 B4P/TCON9/BLUE[7] RXA4+ DQL5 VSS_12
VDD_2 A10/AP AD24 G2
G7 R7 R308 RXA4-
VDD_3 A11 C-MA11 B4M/TCON8/BLUE[6] DQL6
K2 N7 AE4 H7
C-MCKB C-TMCKB C-TMODT FRC_DDR3_ODT/DDR2_BA1
VDD_4 A12/BC C-MA12 10 AD5 DQL7
K8 T3 B1
C-TMRASB FRC_DDR3_RASZ/DDR2_WEZ VSSQ_1
VDD_5 A13 R309 AF4 AD23 D7 B9
N1 C-TMCASB RXCCK+
VDD_6 FRC_DDR3_CASZ/DDR2_CKE CCKP/LLV3P DQU0 VSSQ_2
N9 M7 C-MCKE C-TMCKE AD4 AE23 C3 D1
10 C-TMWEB FRC_DDR3_WEZ/DDR2_BA0 CCKM/LLV3N RXCCK- DQU1 VSSQ_3
VDD_7 A15 AE26 C8 D8
R1 RXC0+
VDD_8 R310 C0P/LLV0P/BLUE[5] DQU2 VSSQ_4
R9 M2 AE2 AE25 C2 E2
VCC1.5V_U3_DDR C-MBA0 C-MRASB C-TMRASB C-TMRESETB FRC_DDR3_RESETB/DDR2_A3 C0M/LLV0N/BLUE[4] RXC0- DQU3 VSSQ_5
VDD_9 BA0 10 AF26 A7 E8
N8 RXC1+
BA1 C-MBA1 C1P/LLV1P/BLUE[3] DQU4 VSSQ_6
M3 AR305 AF25 A2 F9
C-MBA2 C1M/LLV1N/BLUE[2] RXC1- DQU5 VSSQ_7
BA2 AF8 AE24 B8 G1
A1 C-MCASB C-TMCASB C-TMDQSL RXC2+
VDDQ_1 C-MCK FRC_DDR3_DQSL/DDR2_DQS0 C2P/LLV2P/BLUE[1] DQU6 VSSQ_8
A8 J7 C-MODT C-TMODT AD9 AF24 A3 G9
R306
150
C-TMDQSLB FRC_DDR3_DQSLB/DDR2_DQSB0 C2M/LLV2N/BLUE[0] RXC2-

OPT
VDDQ_2 CK AF23 DQU7 VSSQ_9

C1 K7 C-MWEB C-TMWEB RXC3+
VDDQ_3 CK C3P/LLV4P
C9 K9 C-MBA0 C-TMBA0 AE9 AD22
C-MCKB C-TMDQSU FRC_DDR3_DQSU/DDR2_DQS1 C3M/LLV4N RXC3-
VDDQ_4 CKE 10 AF9 AE22
D2 C-TMDQSUB FRC_DDR3_DQSUB/DDR2_DQSB1 RXC4+
VDDQ_5 C-MCKE C4P/LLV5P
E9 L2 R311 AF22
C4M/LLV5N RXC4-
VDDQ_6 CS C-MDQSL C-TMDQSL AE11
F1 K1 C-TMDML
VDDQ_7 ODT C-MODT 10 FRC_DDR3_DML/DDR2_DQ7
H2 J3 AF6
R312 C-TMDMU FRC_DDR3_DMU/DDR2_DQ11
VDDQ_8 RAS C-MRASB AD19
H9 K3 C-MDQSLB C-TMDQSLB RXDCK+
VDDQ_9 CAS C-MCASB 10 DCKP/TCON5
L3 VCC1.5V_U3_DDR AE6 AE19
WE C-MWEB R313 C-TMDQL0 FRC_DDR3_DQL0/DDR2_DQ6 DCKM/TCON4 RXDCK-
R333 AF11 AD21
J1 10K C-TMDQL1 FRC_DDR3_DQL1/DDR2_DQ0 RXD0+
NC_1 C-MDQSU C-TMDQSU D0P/LLV6P
J9 T2 10 AD6 AE21
C-MRESETB C-TMDQL2 FRC_DDR3_DQL2/DDR2_DQ1 D0M/LLV6N RXD0-
NC_2 RESET R314 AD12 AF21 <U3 CHIP Config>
L1 C-TMDQL3 FRC_DDR3_DQL3/DDR2_DQ2 RXD1+
NC_3 C-MDQSUB C-TMDQSUB D1P/LLV7P
L9 AE5 AD20
10 C-TMDQL4 FRC_DDR3_DQL4/DDR2_DQ4 D1M/LLV7N RXD1- (FRC_CONF0)
NC_4 AF12 AE20
T7 F3 R315 C-TMDQL5 RXD2+
NC_6 DQSL C-MDQSL FRC_DDR3_DQL5/DDR2_NC D2P/LLV8P HIGH : I2C ADR = B8
G3 C-MDMU C-TMDMU AF5 AF20
DQSL C-MDQSLB C-TMDQL6 FRC_DDR3_DQL6/DDR2_DQ3 D2M/LLV8N RXD2- LOW : I2C ADR = B4
10 AE12 AF19
C-TMDQL7 FRC_DDR3_DQL7/DDR2_DQ5 D3P/TCON3 RXD3+
A9 C7 AR306 AD18 (FRC_CONF1,FRC_PWM1, FRC_PWM0)
C-MDQSU D3M/TCON2 RXD3-
VSS_1 DQSU C-MDQL7 C-TMDQL7 AE10 AE18
B3 B7 C-TMDQU0 RXD4+ 3’d5 : boot from internal SRAM
VSS_2 DQSU C-MDQSUB FRC_DDR3_DQU0/DDR2_DQ8 D4P/TCON1
E1 C-MDQL3 C-TMDQL3 AF7 AF18 3’d6 : boot from EEPROM
C-TMDQU1 FRC_DDR3_DQU1/DDR2_DQ14 D4M/TCON0 RXD4-
VSS_3 C-MDQL1 C-TMDQL1 AD11 3’d7 : boot form SPI flash
G8 E7 C-TMDQU2
VSS_4 DML C-MDML FRC_DDR3_DQU2/DDR2_DQ13
J2 D3 C-MDML C-TMDML AD7
DMU C-MDMU C-TMDQU3 FRC_DDR3_DQU3/DDR2_DQ12
VSS_5 10 AD10 AB22
J8 C-TMDQU4 FRC_DDR3_DQU4/DDR2_DQ15 GVDD_ODD +3.3V_Normal
VSS_6 AR307 GPIO0/TCON15/HSYNC/VDD_ODD
M1 E3 AE7 AB23
DQL0 C-MDQL0 C-TMDQU5 FRC_DDR3_DQU5/DDR2_DQ9 GPIO1/TCON14/VSYNC/VDD_EVEN GVDD_EVEN
VSS_7 C-MDQL0 C-TMDQL0 AF10 AC23
M9 F7 C-TMDQU6 GCLK4
VSS_8 DQL1 C-MDQL1 C-MDQL2 C-TMDQL2 FRC_DDR3_DQU6/DDR2_DQ10 GPIO2/TCON7/LDE/GCLK4
P1 F2 AD8 AC22
C-TMDQU7 GCLK2
R322
FRC_DDR3_DQU7/DDR2_DQM1 GPIO3/TCON6/LCK/GCLK2
R321
R323
VSS_9 DQL2 C-MDQL2 C-MDQL6 C-TMDQL6
R320
P9 F8
OPT1K
OPT 1K
1K
VSS_10 DQL3 C-MDQL3 C-MDQL4 C-TMDQL4
1K
T1 H3
VSS_11 DQL4 C-MDQL4 10 AB16
T9 H8 UART_FRC_RX
VSS_12 DQL5 C-MDQL5 R316 FRC_GPIO0/UART_RX R336 0
G2 AA14 DPM_A
C-MDQL6 C-MDQL5 C-TMDQL5 FRC_GPIO1 FRC_CONF0 MINI_LVDS FRC_CONF0
DQL6 AC15
H7 10 R300 0
DQL7 C-MDQL7 FRC_GPIO3 FRC_CONF1
B1 AR308 OPT
VSSQ_1 Y16
B9 D7 C-MDQU2 C-TMDQU2 FRC_CONF1 FRC_PWM1
VSSQ_2 DQU0 C-MDQU0 FRC_GPIO8
D1 C3 AC16 UART_FRC_TX
C-MDQU6 C-TMDQU6 FRC_GPIO9/UART_TX
VSSQ_3 DQU1 C-MDQU1 AE8 AC14 FRC_PWM0
D8 C8 C-MDQU0 C-TMDQU0
VSSQ_4 DQU2 C-MDQU2 FRC_DDR3_NC/DDR2_DQM0 FRC_GPIO10
R325
R324
R318
OPT
R319
E2 C2 C-MDQU4 C-TMDQU4 R317 TP301
VSSQ_5 DQU3 C-MDQU3 820 0 R327 R334 22
E8 A7 10 Y11 AA16 FRC_SDA
FRC_REXT FRC_I2CM_DA R335
1K
OPT 1K
C-MDQU4 22
1K
VSSQ_6 DQU4
OPT1K
F9 A2 AR309 Y19 AA15 R328 FRC_SCL
VSSQ_7 DQU5 C-MDQU5 FRC_TESTPIN FRC_I2CM_CK OPT
G1 B8 C-MDQU7 C-TMDQU7 0
VSSQ_8 DQU6 C-MDQU6 Y10 TP302 R326 22
G9 A3 C-MDQU1 C-TMDQU1 FRC
C-MDQU7 FRC_I2CS_DA I2C_SDA
VSSQ_9 DQU7 AA11 R331 22
C-MDQU5 C-TMDQU5 FRC I2C_SCL
FRC_I2CS_CK
C-MDQU3 C-TMDQU3
10 AB15
FRC_PWM0 FRC_PWM0
AB14
FRC_PWM1 FRC_PWM1
V_SYNC
R332 0

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR3(FRC) 3

15V-->3.6V
+12V/+15V
20V-->3.5V
+24V +12V/+15V +3.5V_ST +3.5V_ST -> 3.375V
FROM LIPS & POWER B/D PANEL_POWER 24V-->3.48V

12V-->3.58V
+3.5V_ST
L412
R488
ST_3.5V-->3.5V -> 3.375V 100K
PD_+3.5V
PD_+12V
R463
10K
OPT
R450
R446
R448
OPT
IC408
30K
12K
1K
1%
1%
1%
NCP803SN293
C438 C442
C436 0.1uF 10uF New item R402 POWER_DET
0.01uF 16V 16V VCC RESET 100
25V 3 2
OPT Q409
PD_+12V
+3.5V_ST
R447-*1
1/16W
PD_+3.5V
RT1P141C-T112 AO3407A 1
R447
5.1K
Q402 C474
5%
GND
27K
0.1uF
1%
PANEL_VCC
R439
33K
C443
R406 1 3
4.7K 4.7uF
NORMAL_EXPEPT_32 NORMAL_32 G
R401 C P403 16V
2 P404
RL_ON 10K FW20020-24S FM20020-24 +24V R404
B Q401 R431 C451 +24V PD_+12V
R440
5.6K
2SC3052 1uF
R482-*1
22K 100K
25V
E L407 IC409
PWR ON 1 24V
R482
2 MLB-201209-0120P-N2
24K
1%
OPT
24K
POWER_+20V
1%
24V 24V OPT C POWER_+24V NCP803SN293 PD_+12V
3 4
R430
+3.5V_ST GND 5 6 GND 10K R480
L404 C418 C426 B Q407 R407 100
GND GND R405 VCC 3 2 RESET
MLB-201209-0120P-N2 7 8 0.1uF 68uF 2SC3052 C455 2.2K 2.2K
R403-*1
3.5V 3.5V 50V 35V 0.1uF
R403
4.3K
9 10 C 1
E
1%
R429 16V POWER_+24V
5.1K
3.5V 3.5V R435
11 12 47K GND
5%
C401 POWER_16_V_SYNC PANEL_CTL B Q406 22K POWER_+20V PD_+12V
C406 C408 GND GND
100uF 13 14 R477 2SC3052
0.1uF 0.1uF PANEL_DISCHARGE_RES
16V GND GND/V-sync 0 1:AK10
16V 16V 15 16 V_SYNC E PANEL_DISCHARGE_RES
+12V/+15V
12V
12V
12V
17
19
18
20
INV ON
A.DIM
P.DIM1 +3.3V_Normal
Power_DET
21 22
L402 GND/P.DIM2 Err OUT
MLB-201209-0120P-N2 23 24
+3.5V_ST
POWER_16_GND
R419
1K +3.5V_ST
S7M DDR 1.5V
0
C402
100uF
16V
C404
0.1uF
16V
C407
0.1uF
16V
25
POWER_18_INV_CTL
R415
100 R426
10K OPT 1074 mA
+3.3V_Normal +3.3V_Normal
R412
0.1uF
POWER_23_GND
SLIM_32~52
POWER_23_SCAN_BLK2
R425
C412
P401
OPT
16V
100 +12V/+15V
C
100pF
SMAW200-H24S2
IC405
POWER_24_GND
R418 R421
R476
C463
POWER_24_INV_CTL 1934 mA
50V
B 10K INV_CTL
6.8K AOZ1073AIL
0
R475
CIC21J501NE
R478
Vout=0.8*(1+R1/R2)
L416
OPT Q405 L424
L421
2SC3052 L420
0
E R427
0
3.6uH CIC21J501NE
10K PGND LX_2
POWER_18_A_DIM OPT +1.5V_DDR 1 8
0 Replaced Part
C484
R451 NR8040T3R6N
1uF
25V
OPT
POWER_22_A_DIM VIN LX_1
R460
R485 0 2 7
1%
R1
27K
SCAN_BLK2
R457
POWER_20_A_DIM A_DIM
POWER_20_PWM_DIM R453 0 IC407

10K 1% AGND
3 3A 6
EN POWER_ON/OFF2_2
R1
C469 C473 C485
4.7K
22uF 0.1uF 0.1uF
1%
R461
MP2212DN R456
<OS MODULE PIN MAP> POWER_24_PWM_DIM R484 PWM_DIM Close to IC C457 C459 10K 10V 16V 16V
R479 0 10uF 10uF FB COMP
R472 0 0 10K 25V 25V 4 5
OPT
PIN No LGD CMO(09) AUO SHARP R471 0 FB EN/SYNC R464 9.1K C423
L_DIM POWER_22_PWM_DIM 1 8 POWER_ON/OFF1 R454
2200pF
100pF
OPT R449
OPT C416 SCAN_BLK1/OPC_OUT 11K L423 C464 50V
C419 R422 0 R2
0.1uF 1/10W 3.6uH
18 INV_ON A-DIM INV_ON INV_ON 16V
1uF OPT GND SW_2
25V 5% 2 7
3A
R462
OPT
1%
NR8040T3R6N
10K
0 OPC_OUT IN SW_1 R2
20 VBR-A Err_out Err_out R470
NC SCLK +3.3V_Normal Placed on SMD-TOP 3 6 C472 C476
POWER_20_ERROR_OUT 22uF 0.1uF
10V
NC BS VCC
22 PWM_DIM PWM_DIM PWM_DIM
R486
4.7K
R437 0 C467
Vout=(1+R1/R2)*0.8
OPT
C461 4 5
C IN 22uF 0.1uF
POWER_24_ERROR_OUT ERROR_OUT 50V Placed on SMD-TOP
Err_out INV_ON PWM_DIM 10V
24 GND R420 0
R455 0
23 MOSIN R452
10 C465
1/10W 1uF
1% 10V
+5V_Normal
+12V/+15V MAX 1A +5V_Normal
IC406
AOZ1072AI
+2.5V/+1.8V L422
L417
PGND LX_2 3.6uH
1 8
+3.3V_Normal
NR8040T3R6N
IC402 VIN LX_1
+2.5V_Normal
R465
2 7
5%
AZ2940D-2.5TRE1
51K
VIN 1 Vd=550mV3 VOUT AGND
3
2A 6
EN POWER_ON/OFF2_2
C471 C477
300 mA R1
1.5K
22uF 0.1uF
1%
R466
C458 C460 R459
2 10K 10V 16V
10uF 10uF
R473
GND FB COMP
OLP C432 25V 25V 4 5
1
OPT
0.1uF 12K C427
16V 2200pF
R458 100pF
C466 50V
C403 C440
10uF 0.1uF
10V 16V
R467
1%
10K
R2
Vout=0.8*(1+R1/R2)
+1.5V_DDR
+1.5V_FRC_DDR
Q408
AO3438
FRC
4.7uF
R443
OPT
C445
FRC 10K
G
OPT C435
4.7uF
10V
S7M core 1.26V volt
R438
FRC
+3.5V_ST
0
POWER_ON/OFF2_1
2026 mA
100pF
R434
120K
OPT
C439
50V
+5V_USB L413
+12V/+15V
+5V_USB
Replaced Part
R1
Vout=0.8*(1+R1/R2) +1.5V_DDR_FRC
MAX 2000mA +1.26V_VDDC
IC401
MP8706EN-C247-LF-Z
L401
R442 R444
22K 1% 24K 1%
IN GND IC403
1 8 MP2212DN Close to IC
OPT
C414
R416
C482
1%
33K
SW_1 VCC 1uF 100pF OPT 10K

2 7 50V 50V C429 FB EN/SYNC R445
C405 100pF C420 C424 C428 1 8 POWER_ON/OFF2_1
R432
10uF
SW_2 3A FB
R410 R1 50V
22uF 0.1uF 0.1uF 75K L415
25V 10K 10V 16V 16V R2
3 6 1/8W GND SW_2 3.6uH
C410 1% 2 7
0.1uF
BST EN/SYNC POWER_ON/OFF2_1 3A NR8040T3R6N
R417
6.2K
1%
4 5 IN SW_1
R487 R411 Placed on SMD-TOP 3 6 C453 C456 C486
22 10K 22uF 0.1uF 0.1uF
R2 10V
BS VCC
4 5 C448
C430
C IN 22uF 0.1uF
L406 Placed on SMD-TOP
3.6uH 10V 50V
+5V_USB
NR8040T3R6N R441 0
R436
Vout=(1+R1/R2)*0.8 10
1/10W
C444
1uF
1% 10V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER 4

FLMD0
22pF
27pF
+3.5V_ST
WIRELESS_DETECT
WIRELESS_PWR_EN
10K
C1007
C1008
MICOM_RESET
+3.5V_ST
R1030
X1002
47K
32.768KHz
R1034
OPT
4.7M
R1086
47K
22
+3.5V_ST R1091 10K
R1046
R1043
P122/X2/EXCLK/OCD0B
for Debugger GND SW1001
JTP-1127WEM
2 1
22
+3.5V_ST
P120/INTP0/EXLVI
P1001
12505WS-12A00 C1003
P124/XT2/EXCLKS
0.1uF C1010
4 3
0.1uF
1
0.1uF
R1039
P121/X1/OCD0A
+3.5V_ST
2
MICOM_RESET
R1076 22
C1006
3
NEC_ISP_Tx
4
R1078 22
P123/XT1
5 NEC_ISP_Rx
6
R1047 20K
7 R1010 22 1/16W
FLMD0
RESET
OCD1A 1%
REGC
8
R1089
1/16W
VDD
VSS
P40
P41
R1081 22 EDID_WP
20K
9
OCD1B
1%
C
10
B Q1001
11 R1013 22 2SC3052
FLMD0
12
E
48
47
46
45
44
43
42
41
40
39
38
37
13
R1002 10K
NEC_SCL R1018 22
P60/SCL0 1 36 P140/PCL/INTP6 R1048 22
RL_ON
R1019 22
P61/SDA0 2 35 P00/TI000 R1049 22
NEC_SDA OPC_EN
OPT
+3.5V_ST +3.5V_ST
NEC_EEPROM_SCL
P62/EXSCL0 3 34 P01/TI010/TO00 R1050 10K
R1006 10K
NEC_ISP_Tx
P63 4 33 P130 R1090 22
R1072 10K
NEC_ISP_Rx
OPT
R1084
NEC_EEPROM_SDA
P33/TI51/TO51/INTP4 IC1002 P20/ANI0
WIRELESS_SW_CTRL
10K CEC_REMOTE_NEC
R1020 0
5 32 R1055 10K
SCART1_MUTE
R1073 10K
OCD1A R1065 22 P75 6 UPD78F0513AGA-GAM-AX 31 ANI1/P21 R1056 22
POWER_ON/OFF2_1 MODEL1_OPT_3
R1005 10K R1067 22 P74 7 30 ANI2/P22 R1057 22

OCD1B AMP_MUTE MODEL1_OPT_2
R1066 22 P73/KR3 NEC_MICOM ANI3/P23
MODEL1_OPT_0 8 29 R1051 22
POWER_ON/OFF1
R1023 22 P72/KR2 9 28 ANI4/P24 R1054 22 19~22_LAMP
SOC_RESET OLP
R1064 22 P71/KR1 10 27 ANI5/P25 R1052 10K
INV_CTL SIDE_HP_MUTE
EEPROM for Micom R1063 22 P70/KR0 11 26 ANI6/P26
+3.5V_ST MODEL1_OPT_1 KEY2
R1059 22 P32/INTP3/OCD1B 12 25 ANI7/P27
OCD1B KEY1
IC1001 NON_M_REMOTE
13
14
15
16
17
18
19
20
21
22
23
24
M24C16-WMN6T R1060 22
RF_RESET
M_REMOTE
1 8
1 8
P31/INTP2/OCD1A
P30/INTP1
P17/TI50/TO50
P16/TOH1/INTP5
P15/TOH0
P14/RXD6
P13/TXD6
P12/SO10
P11/SL10/RXD0
P10/SCK10/TXD0
AVREF
AVSS
R1014 4.7K
R1015 4.7K
R1001
47K
C1002
0.1uF
2 7
2 7
TP1001
+3.5V_ST
TP1002
3 6 R1080
3 6 NEC_EEPROM_SCL
22
TP1003
4 5 R1008
4 5 NEC_EEPROM_SDA
22
C1009 1uF
22
22
+3.5V_ST
22 NON_M_REMOTE
R1041
R1037
R1044 10K
22 M_REMOTE
+3.5V_ST OPT
MICOM MODEL OPTION
PWM_BUZZ/GPIO_LED
R1045 10K
OPT
10K
10K
10K
10K
TOUCH_KEY
22
22
22
OLED/3D
MODEL OPTION
PDP/3D
R1079
R1075
R1009
R1071
R1061
R1062
R1069
R1068
R1036
PIN NAME PIN NO. HIGH LOW
R1007 100 MODEL_OPT_0 8 OLED/3D LCD/PDP

AMP_RESET_N MODEL1_OPT_0 R1083 10K
R1070 100
PANEL_CTL MODEL1_OPT_1 OPT
MODEL_OPT_1 11 PWM_BUZZ/GPIO_LED PWM_LED
R1003 0 MODEL1_OPT_2
CEC_ON/OFF MODEL1_OPT_3
MODEL_OPT_2 30 TOUCH_KEY TACT_KEY
LED_R/BUZZ
LED_B/LG_LOGO
10K
10K
10K
10K
RF_ENABLE
POWER_DET
IR
NEC_ISP_Rx
NEC_ISP_Tx
POWER_ON/OFF2_2
NEC_RXD
NEC_TXD
OCD1A
LCD/OLED
TACT_KEY
PWM_LED
LCD/PDP
MODEL_OPT_3 31 PDP/3D LCD/OLED

R1074
R1011
R1004
R1012

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MICOM 5

CONTROL
IR & LED
+3.5V_ST
EYEQ/TOUCH_KEY
R2411
100
NEC_EEPROM_SCL P2401
R2404 R2405 12507WR-12L
10K 10K C2408 5.6B
1% 1% 1000pF D2403
50V
L2401 OPT
R2401 BLM18PG121SN1D 1
100
KEY1 EYEQ/TOUCH_KEY
L2402 100
R2402 D2402 NEC_EEPROM_SDA 2
100 BLM18PG121SN1D
5.6V R2412 5.6B
KEY2 C2409 D2404
AMOTECH
C2401 C2402 1000pF
50V 3
0.1uF 0.1uF
D2401 OPT
5.6V
AMOTECH JP2407
4
+3.5V_ST
+3.5V_ST JP2408
5
L2403
BLM18PG121SN1D
+3.5V_ST 6
R2425
47K
R2428
22 +3.5V_ST R2413 1.5K
IR R2429 C2403 C2404 7
0.1uF 1000pF LED_B/LG_LOGO
47K 16V 50V OPT
R2430 C2410
Q2406 C 10K 0.1uF JP2409
B R2426 16V 8
2SC3052
E 3.3K
R2431 OPT R2410
C 47K 100 JP2410
B 9
Q2405 E
2SC3052 C2407
100pF D2405
+3.5V_ST +3.3V_Normal 50V 5.6B 10
COMMERCIAL L2404
BLM18PG121SN1D
JP2411
R2427 +3.5V_ST 11
0 R2406
47K
OPT R2403 Commercial_EU R2414
22 LED_R/BUZZ 12
IR_OUT R2408 C2406
C2405 1.5K
Commercial 47K 1000pF OPT
0.1uF
R2407 Commercial 16V 50V R2416 13
Q2401 C 10K 10K
2SC3052 B
Commercial_EU E R2409
Commercial_EU C 47K
B
Q2402 E Commercial
2SC3052
Commercial
R2422
0
Commercial_US
Zener Diode is
+3.5V_ST
close to wafer
WIRELESS
+3.5V_ST
R2420
47K
R2417 WIRELESS
22
IR_PASS R2419
WIRELESS 47K
R2418 WIRELESS
Q2404 C 10K
2SC3052 B
WIRELESS E WIRELESS R2421
C 47K
B
Q2403 E WIRELESS
2SC3052
WIRELESS

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR & LED 6

[LEVEL Shift Block] [POWER Block] D607
MMSD4148T1G VDD_LCM
EN2 (+16V)
100V
VCC_LCM CHECK Value!!
(+3.3V)
R635 R640 C628 C635

910K 470K OPT
1% 1% OPT
R625 42_FHD_60_LAMP42_FHD_60_LAMP 0.1uF C642 C653 R650
100 50V 1uF 22uF
50V 25V 9.1K
GIP C636
R642-*1 C638 C640 1/8W
R636 R641 C629 47uF
C600 R600 510K 27K OPT 1uF 50V 1uF
33K 1% 1% 25V 50V
OPT 3K OPT
FLK
OPT GIP DISCHG NON_GIP 42_FHD_60_LAMP42_FHD_60_LAMP
VDD_LCM C626-*1 L602

(+16V) C625 D605 MBRA340T3G 40V 22UH
470pF
50V
27pF 50V D608 MBRA340T3G 40V 2.8A C654
NON_GIP
NON_GIP 22uF
R632 25V
EP[VGOFF]
10K R688
GIP 33K C626 R642 C645-*1
NON_GIP R647 2.2 C645
VSENSE
YDCHG
1000pF 10K 560pF

FLK1
FLK2
FLK3
50V 1000pF 50V

GND
GIP 50V
RE
OPT R689-*1 R689 VGH GIP NON_GIP
PGOOD
D606 0 2.7K GIP
AGND
CRST
COMP
PGND
VGH MMSD4148T1G NON_GIP (+25V)
FB1
SW0
SW1
LX1
LX1
GIP
28
27
26
25
24
23
22
(+25V) EN2 VGH_M

GVDD_ODD_I A9 1 21 Y9 100V R692 0 PANEL_VCC
VDD_ODD (+25V) C643
THERMAL NON_GIP (+12V)
40
39
38
37
36
35
34
33
32
31
A8 Y8 4.7uF/50V(3216) D602 0.1uF
GVDD_EVEN_I 2 29 20 VDD_EVEN R627 KDS226 THR PGND
R693 0 1 30 50V
NCP18WB473F10RB
A7 Y7 C C621 NON_GIP DRVP EN2
GSP/GVST_I 3 19 VST C615 0 2 29 EN2
1uF C617 AC R656
47k-ohm
IC602 A GND2 VL
MINI_LVDS
A6 Y6 1uF 0.47uF 3 28
GCLK6_I 4 18 R668 R619 R620 50V 50V 25V 360
TH700
MAX17119DS CLK6 C633 56K R690 0 GIP SRC 4 27 DEL2
A5 GIP Y5 18K 18K 1%
50V TCON_42_FHD_LAMP GON EN1
GCLK5_I 5 17 CLK5 R691 0 GIP 5 IC603 26
4.7uF R694 R695 DRN FSEL PANEL_VCC
A4 Y4 6 MAX17113ETL+ 25
6 16 510 NON_GIP 510 NON_GIP MODE R634 (+12V)
GCLK4_I CLK4 R629 R631 VDD_LCM 7 MINI_LVDS 24 VIN
A3 Y3 10 10 C676 1uF NON_GIP
GSC/GCLK3_I 7 15 (+16V) DLP 8 23 IN2 0
CLK3 R621 GIP GIP C677 0.047uF NON_GIP
220K FBP 9 22 IN2
10
11
12
13
14
5% VGH_FB
8
GPGND 10 21 OUT C606

TCON_42_FHD_LAMP R648 C651
1uF C657 C663
A2
A1
GON1
GOFF
GON2
Y1
Y2
C644
11
12
13
14
15
16
17
18
19
20
VGH_FB 50V 1K 1uF 22uF 22uF
0.1uF 10V
50V 25V 25V
CTL
DRVN
AGND
FBN
REF
DEL1
FB2
BST
LX2
LX2
R622 R694-*1
11K R629-*1 R631-*1 R649
CLK2 5% 200 200 0 OPT
GCLK2_I TCON_42_FHD_LAMP NON_GIP NON_GIP GIP R686 R687 OPT
CLK1 R695-*1 0 0
GOE/GCLK1_I
GIP NON_GIP
0
GIP VCC_LCM
(+3.3V)
L601
C612 VGH 22UH
FLK
C637
REF
VGL_FB
0.22uF R623 R624
(+25V) 300 300
50V 0.1uF 2.8A
GIP GIP GIP C622 VCC_LCM 50V
C611 1uF C634 C641 C648 C646
R626 R603 R630 R633 10V (+3.3V) D604 C655 R651
1uF 10 C618 OPT 10 10 0.1uF MBRA340T3G 150pF 22uF 0.1uF OPT
50V GIP 1uF REF 50V 40V 50V 10V 50V 5.1K
OPT GIP GIP OPT
GIP 50V GIP
VGL GIP R644 C630
3.6K 10uF R637 OPT
(-5V) 16V C627 R639 R638
VGH 27K 1uF 0 0
(+25V) VGL 42_FHD_60_LAMP 50V C634-*1
(-5V) VGL_FB D603 2200pF
KDS226 50V
R643
C632 NON_GIP R612
150K C DPM_A EN2
42_FHD_60_LAMP A AC 1uF 10
50V
Change 100ohm -> 10ohm R613
1K
[P-GAMMA Block]
Slave Address : 0xE8h
AMP_SCL
(AO Pin - GND)

GMA16
GMA15
VDD_LCM
(+16V)
[HVDD Block] VCC_LCM
(+3.3V)
1uF/50V(2012) R618
R670
33
10
1/8W R628
EP[GND]
AVDD_2
C604 3.3K
1uF
GMA8
GMA7
NC_2
50V GIP R659 R667

SCL
R604 0 0
RXA3- FLK RXD3- GSP/GVST_I GCLK2 GCLK2_I
10 NON_GIP GIP
20
19
18
17
16
VCC_LCM
(+3.3V) R669 SDA GMA6 C667 C670
AMP_SDA 1 15 GMA13 HVDD C605 15pF
15pF 15pF
33 THERMAL 6.8uH/1.8A 50V 50V
A0 2 21 14 GMA5 50V R685
GMA12 (6x6x2mm) NON_GIP NON_GIP OPT
0
DVDD IC601 GMA4 L600 RXD3+
3 13 GMA7 6.8uH
NON_GIP
C601 MAX9668ETP+ MINI_LVDS R663
AGND_AMP 4 12 GMA3 GSP_R
0.1uF MINI_LVDS GMA6 0
50V GCLK4 GCLK4_I
VCOM 5 11 GMA2 VGH GIP
VCOM GMA4 C673
PANEL_VCC (+25V) 15pF
10
6
(+12V) 50V
OPT
VCOM_FB
AVDD_AMP
AVDD_1
NC_1
GMA1
R696 R698
0 1M R614 0 VGI_P
GIP NON_GIP GIP
R665 R664
PGND_2
R1 0 0
SW_2
SW_1
R609 C652 C659 C661 R658 R657 RXDCK+ GOE/GCLK1_I RXA4- GCLK5_I
VCOM_FB0 GMA3 10uF/25V(3216) 150K 22pF 22uF 10uF 6.2K 6.2K VGL GIP
PG
C674
1%
1K
1K
50V 16V 16V OPT OPT (-5V)

NON_GIP
NON_GIP
42_FHD_60_LAMP C675 15pF

VDD_LCM C610 C619 R671 50V
15pF
16
15
14
13
(+16V) 10uF 10uF 4.7K OPT

PGND_1 GND_2 50V
1 12
R601
R602
NON_GIP
C602 C603 VIN_1 GND_1 R615 0 VGI_N
0.1uF 0.1uF R672 2 11
0 EN2 IC600 GIP
50V 50V VIN_2 FB R662 R666
3 TPS62110RSAR 10 0 0
MINI_LVDS MINI_LVDS RXDCK- GSC/GCLK3_I RXA4+ GCLK6_I
R605 EN AGND R2 VGL
4 9 C672 C671
(-5V) GIP
47K R617 15pF 15pF
R610 R611
5
OPT C639 33K 100K 50V 50V

VCOMRFB
VCOMLFB
R616 1% 1%
10K 2.2uF 0 NON_GIP OPT
SYNC
LBO
LBI
VINA
OPT 16V 42_FHD_60_LAMP 42_FHD_60_LAMP

R645
DISCHG VGL_I
Vo = 1.153*(1+R1/R2) 0
R653 VCC_LCM
For P-Gamma Data Download OPT 0 (+3.3V)
R608 GVDD_ODD GVDD_ODD_I
P700 10 GIP
12505WS-03A00 PANEL_VCC
C669
VCOM_FB0
R5266
15pF
OPT
3.3K
C649
1uF 50V
50V
R606 R660 OPT
1 AMP_SCL 20K RXD4- POL H_CONV
R5267
0
MINI_LVDS
R646
C665 0
2
0
R652-*1 AMP_SDA 15pF GVDD_EVEN GVDD_EVEN_I
50V GIP
1K R607
R652 NON_GIP 7.5K C668
3 15pF
0
GIP 50V
4 R661 OPT
R654 RXD4+ SOE
VCOMR 0
0
R655 C666
VCOM VCOML 15pF
0 50V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. T-CON 7

HDMI EEPROM
5V_HDMI_1 +5V_Normal
A2
A1
ENKMC2838-T112
D821
C
HDMI_1
5V_HDMI_1 5V_DET_HDMI_1 HDMI_3 HDMI_1
IC801
EDID_WP
5V_HDMI_3 5V_DET_HDMI_3 AT24C02BN-10SU-1.8
R874
10K
C C
SHIELD A0 VCC
SHIELD R864 1 8
Q802 B R830 Q804 B
R896 HPD1 R894 2SC3052 HPD3
20
2SC3052 20 10K $0.055
10K A1 WP
1K $0.253 1K E 2 7 C806 R884 R888
$0.253 E
C802 C804 0.1uF 4.7K 4.7K
19 19
R804 0.1uF R838 0.1uF
A2 SCL JP809
3.3K
16V 16V
3.3K
18 18 3 6
1.8K 1.8K DDC_SCL_1
R836
R876 22
R802
JP803 JP807
17 17 R859 22
R825 22 GND SDA
DDC_SDA_1 DDC_SDA_3 4 5
16 16 DDC_SDA_1
R851 R875 22
R826 22 22
DDC_SCL_1 DDC_SCL_3
15 15
JP804 14 JP808
14 R860 5V_HDMI_2 +5V_Normal
R824 100 100 HDMI_CEC
HDMI_CEC
EAG59023302
13 13
EAG59023302
R847 0 R852 0
CK-_HDMI1 CK-_HDMI3
A2
A1
12
HDMI_3
12
HDMI_1
ENKMC2838-T112
11 11 D822
CK+ R846 CK+ R816 0
10 0 CK+_HDMI1 10 CK+_HDMI3
C
D0- R845 D0- R821 0 HDMI_2
9 0 D0-_HDMI1 9 D0-_HDMI3 IC802
D0_GND D0_GND AT24C02BN-10SU-1.8 EDID_WP
8 8
10K
R873
D0+ R844 D0+ R814 0
7 0 D0+_HDMI1 7 D0+_HDMI3
A0 VCC
D1- R843 D1- R819 0 1 8
6 0 D1-_HDMI1 6 D1-_HDMI3
D1_GND D1_GND C807 R885 R889
5 5 A1 $0.055 WP
2 7
D1+ R842 D1+ R818 0 0.1uF 4.7K 4.7K
D2- R850 D2- R820 0 A2 SCL JP810
3 0 D2-_HDMI1 3 D2-_HDMI3 3 6 DDC_SCL_2
D2_GND D2_GND R878 22
2 2
GND SDA
D2+ R848 D2+ R812 0 4 5 DDC_SDA_2
R877 22
D802
D812
JK802 JK804
5V_HDMI_3 +5V_Normal
A2
A1
ENKMC2838-T112
D823
C
HDMI_3
IC803
AT24C02BN-10SU-1.8
EDID_WP
10K
R872
A0 VCC
1 8
$0.055
A1 WP C808 R886 R890
2 7
0.1uF 4.7K 4.7K
A2 SCL JP811
3 6 DDC_SCL_3
R879 22
GND SDA
4 5 DDC_SDA_3
R880 22
HDMI_2 SIDE_HDMI 5V_HDMI_4 +5V_Normal

5V_HDMI_2 5V_DET_HDMI_2
5V_HDMI_4 5V_DET_HDMI_4
A2
A1
C C ENKMC2838-T112
SHIELD R828 JACK_GND D824
10K R862
Q801 B Q803 B
C
R895 HPD2 HPD4 HDMI_SIDE
2SC3052 R897 2SC3052
20 20 10K IC804
1K
$0.253 E $0.253 1K E AT24C02BN-10SU-1.8
EDID_WP
C801 C803
19 19
10K
0.1uF R837 0.1uF
R871
R803
16V 16V
18 1.8K 18 A0 VCC
R835
3.3K
R801
3.3K
JP802 1.8K JP805 1 8

17 R805 22 17 $0.055
R839 22
DDC_SDA_2 DDC_SDA_4 A1 WP
16 22 16 2 7 C809 R887 R891
R806 R840 22
DDC_SCL_2 DDC_SCL_4 0.1uF 4.7K 4.7K
15 15 JP806 JP812
A2 SCL
JP801 3 6 DDC_SCL_4
14 R815 100 14
R841 100 R881 22
HDMI_CEC
HDMI_CEC
13 13 GND SDA
EAG59023302
EAG42463001
R831 0 R810 0 4 5 DDC_SDA_4

CK-_HDMI2
12 12 CK-_HDMI4 R882 22
HDMI_2
HDMI_SIDE
11 11
CK+ R834 0 CK+ R807 0
10 CK+_HDMI2 10
CK+_HDMI4
D0- R822 0 D0- R817 0
9 D0-_HDMI2 9 D0-_HDMI4
D0_GND D0_GND
8 8
D0+ R832 0 D0+ R809 0
7 D0+_HDMI2 7 D0+_HDMI4 +3.3V_Normal
D1- R827 0 D1- R813 0
6 D1-_HDMI2 6 D1-_HDMI4
68K
D1_GND D1_GND
5 5
R854
4
D1+ R829 0 D1+_HDMI2 4
D1+ R811 0
D1+_HDMI4
For CEC
D804
R855
D2- R823 0 D2- R849 0
3 D2-_HDMI2 3 0 R856
D2-_HDMI4 R857
10K 68K
D2_GND D2_GND OPT
2 2 OPT
D2+ R833 0 D2+ R808 0 R858
1 D2+_HDMI2 1 D2+_HDMI4 0
S
B
D
CEC_REMOTE_S7
D801
D811
AVRL161A1R1NT
JK801
JK803 Q806
G
BSS83
D803
OPT
C805
0.1uF
16V
GND GND
CEC_ON/OFF
68K
+3.5V_ST
R892
D825
R883
0 R893
R853
10K 68K
OPT
HDMI_CEC
S
B
D
CEC_REMOTE_NEC
AVRL161A1R1NT
Q805
G
BSS83
D826
OPT
C810
0.1uF
16V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES GND GND
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 8

COMMON AREA
New Item Development
EARPHONE BLOCK
HP_LOUT EXCEPT_CHINA_HOTEL_OPT
C1118
2:X19 10uF
16V C1115
1000pF
50V R1125 C
OPT 1K E
JK3301
Q1101 B +3.3V_Normal KJA-PH-0-0177
MMBT3904-(F)
MMBT3904-(F)
B Q1104
GND 5
R1130
E C
10K
L 4 +3.5V_ST
ISA1530AC1
R1155
1K DETECT 3
Q1105
HP_ROUT HP_DET
EXCEPT_CHINA_HOTEL_OPT
R 1
C1119
E
2:X19 10uF
16V
C1116
1000pF C E
B
50V Q1102 B
OPT R1128 MMBT3904-(F) C
1K MMBT3904-(F) SPK_R+_HOTEL R1129
B Q1103
3.3K B
E 2:X19 SIDE_HP_MUTE
C Q1106
2SC3052
E
SPK_R-_HOTEL
2:X19
PC AUDIO
+3.3V_Normal
RGB PC D1115
+5V_Normal
JK1102
SPDIF OPTIC JACK ENKMC2838-T112
A1
PEJ027-01 5.15 Mstar Circuit Application C
A2
3 E_SPRING OPT IC1104
R1152 NL17SZ00DFT2G
T_TERMINAL1 4.7K
6A
A OPT VCC GND
1 5
1
B_TERMINAL1 SPDIF_OUT
Fiber Optic
JST1223-001
7A C1117 R1140
PC_R_IN IC1105 R1139 C1129
2:S16 4.7K R1142
JK1103
R1107 R1112 0.1uF AT24C02BN-10SU-1.8 4.7K 0.1uF
D1101 2:X18 B VCC 10K 16V
4 R_SPRING C1107 15K 0 2 16V
2
AMOTECH 100pF R1102
5.6V 50V 470K R1110 OPT A0
1 8
VCC
OPT 10K R1126

5 T_SPRING GND Y 22 A1 WP
3 4 VINPUT 2 7
3
EDID_WP
R1108 OPT C1131
4
A2 SCL
7B B_TERMINAL2 15K C1121 3 6
0.1uF RGB_DDC_SCL
PC_L_IN 2:S16 100pF
FIX_POLE
R1113 16V GND
4 5
SDA
T_TERMINAL2 D1102 C1108 R1103 0 50V RGB_DDC_SDA

6B AMOTECH 100pF 470K
5.6V 50V R1111 C1127 C1128 R1141
OPT 10K 18pF 18pF 22 R1143
50V 50V 22
R1127
0
DSUB_VSYNC R1150
0
DSUB_HSYNC R1148
C1122 0 C1126 D1113 D1116
D1109 68pF D1114
68pF 30V 50V 5.6V
50V 5.6V OPT
OPT 30V OPT
OPT
DSUB_B+
OPT
R1133 C1123 D1110
75 OPT 30V
DSUB_B-
0
R1134
DSUB_G+
R1135 OPT D1111

75 C1124 30V
OPT
DSUB_G- +3.3V_Normal
0
R1136
R1146
10K
DSUB_DET
R1147
1K
DSUB_R+
OPT
C1125 D1112 D1117
R1137 30V
OPT 5.6V
75
DSUB_R-
0
R1138
GREEN_GND
DDC_CLOCK
DDC_DATA
BLUE_GND
SYNC_GND
RED_GND
DDC_GND
H_SYNC
V_SYNC
GND_2
GREEN
GND_1
BLUE
RED
NC
SPG09-DB-010
SHILED
11
12
13
14
15
JK1104
16
10
6
9
1
5
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. COMMON AREA 9

RS232C
10
5
9
OPT
IR_OUT 4
R1122
0
R1123 8
100 JP1121
3
7
R1124
+3.5V_ST 100 JP1122
D1107 D1108 6
CDS3C30GTH CDS3C30GTH
30V 30V 1
C1101 0.33uF SPG09-DB-009

IC1101 JK1101
C1106
MAX3232CDR 0.1uF
C1+ VCC
1 16
C1102
0.1uF V+ GND
2 15
+3.5V_ST
C1103
0.1uF C1- DOUT1
3 14
R1109 R1114
C2+ RIN1 4.7K 4.7K
4 13 OPT OPT
C1104
0.1uF C2- ROUT1
5 12 R1157 0
S7_RXD1
V- DIN1 R1156 0
6 11 NEC_RXD
C1105
0.1uF DOUT2 DIN2
7 10
R1154 0
S7_TXD1
RIN2 ROUT2
8 9 R1153 0
NEC_TXD
EAN41348201

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. RS232C 9PIN 10

(New Item Developmen H:9.2mm)
SIDE_AV_OPT
SIDE_AV L3303
BLM18PG121SN1D
SIDEAV_CVBS_IN
SIDE_AV_OPT
SIDE_AV_OPT R3301 +3.3V_Normal C3304
5A D3301 75 100pF
[YL]E-LUG
30V OPT
SIDE_AV_OPT
10K SIDE_AV_OPT
4A [YL]O-SPRING R3305
R3302 1K
SIDEAV_DET
3A [YL]CONTACT C3301
SIDE_AV_OPT 100pF
D3302 SIDE_AV_OPT
4B [WH]O-SPRING 5.6V
3C [RD]CONTACT SIDE_AV_OPT SIDE_AV_OPT

L3301
BLM18PG121SN1D R3306
4C [RD]O-SPRING SIDEAV_L_IN
SIDE_AV_OPT
SIDE_AV_OPT R3303 SIDE_AV_OPT 10K SIDE_AV_OPT
5C [RD]E-LUG D3303 C3302 R3308
5.6V 470K
SIDE_AV_OPT 100pF 12K
PPJ235-01 50V
L3302 SIDE_AV_OPT
JK3302 BLM18PG121SN1D R3307
SIDE_AV_OPT SIDEAV_R_IN
SIDE_AV_OPT SIDE_AV_OPT 10K SIDE_AV_OPT
D3304 SIDE_AV_OPT C3303 R3309
5.6V R3304 100pF 12K
470K
50V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SIDE AV 11

WIRELESS READY MODEL
JK2601
KJA-PH-3-0168
Wireless power VCC[24V/20V/17V]_1

From wireless_I2C to micom I2C
1
OPT
VCC[24V/20V/17V]_2 +3.3V_Normal
2 R2602
10K
VCC[24V/20V/17V]_3 WIRELESS_PWR_EN
3
10K
R2614
VCC[24V/20V/17V]_4
4 OPT
VCC[24V/20V/17V]_5
B
+24V 5
VCC[24V/20V/17V]_6 OPT
6
DETECT
E
+3.3V_Normal
7
Q2603
ISA1530AC1
C2601 R2604
22K C2602 INTERRUPT
0.1uF 8
2.2uF TP2601
50V GND_1
S R2612
9
10K
G RESET
10
R2605 TP2602
Q2602 R2617 1K GND_2
27K WIRELESS
G
AO3407A D WIRELESS_DETECT 11
R2607 OPT
WIRELESS 0 I2C_SCL
R2603 C WIRELESS_SCL 12
10K AMP_SDA WIRELESS_SDA
S
WIRELESS_PWR_EN 1/4W I2C_SDA
B WIRELESS_SDA 13 Q2604
3216
Q2601 GND_3 FDV301N
WIRELESS
WIRELESS C2603 14
E 0.01uF UART_RX
G
50V WIRELESS_RX 15 OPT
UART_TX
WIRELESS_TX 16
AMP_SCL WIRELESS_SCL
S
GND_4
17 Q2605
IR FDV301N
IR_PASS 18
GND_5
19
WIRELESS
GND_6
20 R2611 0
21 R2613 0
SHIELD WIRELESS
+3.5V_ST +3.3V_Normal
OPT
0 OPT R2608
R2618 R2606
0 0
WIRELESS IC2601
R2601 0 MC14053BDR2G
WIRELESS_DL_RX
Y1 VDD
1 16
WIRELESS_TX
OPT
C2604
OPT
RS232C & Wireless
Y0 Y S7_TXD1 0.1uF
S7_TXD 2 15
Z1 X S7_RXD1
3 14
R2615 0
WIRELESS_DL_TX WIRELESS_SW_CTRL SELECT PIN STATUS
Z X1 WIRELESS
4 13
WIRELESS_RX
R2619 HIGH X1/Y1/Z1 WIRELESS Dongle connect --> WIRELESS RS232
0 +3.5V_ST
Z0 X0
5 12
S7_RXD
LOW X0/Y0/Z0 WIRELESS Dongle Dis_con --> S7 RS232
4.7K
INH A
OPT
R2609
6 11
R2620 0 VEE B
7 10
WIRELESS
47K
VSS C
OPT
WIRELESS_SW_CTRL
R2610
8 9
Ver. 1.2 --> 1.3: wireless opt change, 090818, hongsu

Wireless ready 12
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

VCC_1.5V_DDR VCC_1.5V_DDR VCC_1.5V_DDR
VCC_1.5V_DDR
VCC_1.5V_DDR
R1201
DDR3 1.5V By CAP - Place these Caps near Memory VCC_1.5V_DDR

R1204
R1227
DDR3 1.5V By CAP - Place these Caps near Memory
1K 1%
R1224
1K 1%
1K 1%
1K 1%
A-MVREFDQ A-MVREFCA B-MVREFDQ
0.1uF
1000pF
B-MVREFCA
0.1uF
0.1uF
1000pF
1000pF
1%
0.1uF
1000pF
1%
1%
R1202
1%
R1205
R1228
C1205
C1216
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
R1225
C1206
C1207
C1208
C1210
C1211
C1212
C1213
C1214
C1215
C1217
C1218
C1219
C1220
C1221
C1222
C1223
C1224
C1235
C1246
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
C1227
C1228
C1229
C1230
C1231
C1232
C1233
C1234
C1236
C1237
C1238
C1239
C1241
C1242
C1243
C1244
C1245
10uF
C1202
C1201
C1204
C1249
C1203
C1247
C1250
1K
C1248
1K
1K
1K
Close to DDR Power Pin Close to DDR Power Pin
CLose to DDR3 CLose to Saturn7M IC CLose to Saturn7M IC CLose to DDR3
VCC_1.5V_DDR
+1.5V_DDR
L1201
R1215
B-TMA0 B-MA0
10
C1225 C1226
10uF R1216
R1213 0.1uF
10V B-TMA2 B-MA2
A-MA0 A-TMA0 16V 10
10
AR1211
R1214
B-TMA11
IC1202
A-MA2 A-TMA2 B-MA11
10 B-TMA1 B-MA1
H5TQ1G63BFR-H9C
AR1208
IC1201 B-TMA8 B-MA8
A-MA11 A-TMA11
H5TQ1G63BFR-H9C B-TMA6 B-MA6
A-MA1 A-TMA1 N3 M8
10 B-MA0 A0 VREFCA B-MVREFCA
A-MA8 A-TMA8 AR1214 P7
B-MA1 A1
A-MA6 A-TMA6 B-TMBA0 B-MBA0 P3
M8 N3 B-MA2 A2
A-MVREFCA VREFCA A0 A-MA0 10 B-TMA3 B-MA3 N2 H1
P7 AR1203 B-MA3 A3 VREFDQ B-MVREFDQ
A1 A-MA1 IC101 B-TMA5 B-MA5 P8
P3 B-MA4 A4
A-MA2 A-MBA0 A-TMBA0 P2
H1
A2
N2 LGE107D (S7M Divx_Non RM) B-TMA7 B-MA7 B-MA5 A5 R1226
A-MVREFDQ VREFDQ A3 A-MA3 A-MA3 A-TMA3 10 R8 L8
P8 B-MA6 A6 ZQ
A4 A-MA4 A-MA5 A-TMA5 AR1215 R2
P2 S7M_DIVX B-MA7 240
A-MA7 A-TMA7 A7
R1203 A5 A-MA5 B8 A25 B-TMA4 B-MA4 T8 1%
L8 R8 10 A-TMA0 A_DDR3_A0/DDR2_A13 B-TMA0 B-MA8 A8
ZQ A6 A-MA6 B_DDR3_A0/DDR2_A13 B-TMA12 B-MA12 R3 B2
R2 AR1204 B9 B24 B-MA9
240 A-TMA1 A_DDR3_A1/DDR2_A8 B_DDR3_A1/DDR2_A8 B-TMA1 A9 VDD_1
A7 A-MA7 A8 A24 B-TMBA1 B-MBA1 L7 D9
1% T8 A-MA4 A-TMA4 A-TMA2 A_DDR3_A2/DDR2_A9 B-TMA2 B-MA10 A10/AP VDD_2
A8 A-MA8 B_DDR3_A2/DDR2_A9 B-TMA10 B-MA10 R7 G7
B2 R3 C21 P25 B-MA11
A-MA12 A-TMA12 A-TMA3 A_DDR3_A3/DDR2_A1 B_DDR3_A3/DDR2_A1 B-TMA3 10 A11 VDD_3
VDD_1 A9 A-MA9 B10 C24 N7 K2
D9 L7 A-MBA1 A-TMBA1 A-TMA4 A_DDR3_A4/DDR2_A2 B-TMA4 B-MA12 A12/BC VDD_4
VDD_2 A10/AP A-MA10 B_DDR3_A4/DDR2_A2 AR1219 T3 K8
G7 R7 A22 P26 B-MA13 A13
A-MA10 A-TMA10 A-TMA5 A_DDR3_A5/DDR2_A10 B_DDR3_A5/DDR2_A10 B-TMA5 VDD_5
VDD_3 A11 A-MA11 A10 B26 B-TMRESETB B-MRESETB N1
K2 N7 10 A-TMA6 A_DDR3_A6/DDR2_A4 B-TMA6 VDD_6
VDD_4 A12/BC A-MA12 B_DDR3_A6/DDR2_A4 B-TMBA2 B-MBA2 M7 N9
K8 T3 B22 R24 A15
AR1201 A-TMA7 A_DDR3_A7/DDR2_A3 B_DDR3_A7/DDR2_A3 B-TMA7 VDD_7
VDD_5 A13 A-MA13 C9 B25 B-TMA13 B-MA13 R1
N1 A-MRESETB A-TMRESETB A-TMA8 A_DDR3_A8/DDR2_A6 B-TMA8 VDD_8
VDD_6 B_DDR3_A8/DDR2_A6 B-TMA9 B-MA9 M2 R9
N9 M7 C23 T26 B-MBA0 BA0
VCC_1.5V_DDR
A-MBA2 A-TMBA2 A-TMA9 A_DDR3_A9/DDR2_A12 B_DDR3_A9/DDR2_A12 B-TMA9 B-MCK VDD_9
VDD_7 A15 B11 D24 10 N8
R1 A-MA13 A-TMA13 A-TMA10 B-TMA10 B-MBA1 BA1
56
R1237
VDD_8 A_DDR3_A10/DDR2_RASZ B_DDR3_A10/DDR2_RASZ R1222 M3
A9 A26
1%
VCC_1.5V_DDR R9 M2 A-MA9 A-TMA9 A-TMA11 B-TMA11 B-MBA2 BA2
VDD_9 BA0 A-MBA0 A_DDR3_A11/DDR2_A11 B_DDR3_A11/DDR2_A11 B-TMCK B-MCK C1240 A1
N8 A-MCK C10 C25 10 VDDQ_1
R1235
10 A-TMA12 A_DDR3_A12/DDR2_A0 B_DDR3_A12/DDR2_A0 B-TMA12

BA1 A-MBA1 B23 T25 J7 A8
1%
M3 R1223 0.01uF CK VDDQ_2

R1206 A-TMA13 B-TMA13
56
R1238
A_DDR3_A13/DDR2_A7 B_DDR3_A13/DDR2_A7
56
BA2 A-MBA2 B-TMCKB B-MCKB 25V K7 C1
1%
A1 C1209 A-MCK A-TMCK 10 CK VDDQ_3
VDDQ_1 10 K9 C9
A8 J7 B-MCKE CKE VDDQ_4
R1236
AR1220
VDDQ_2 CK 0.01uF R1207 B-MCKB D2
1%
C1 K7 25V A-MCKB A-TMCKB B-TMRASB B-MRASB VDDQ_5

56
VDDQ_3 CK B21 P24 L2 E9

C9 K9 10 CS VDDQ_6
A-MCKE A-TMBA0 A_DDR3_BA0/DDR2_BA2 B_DDR3_BA0/DDR2_BA2 B-TMBA0 B-TMCASB B-MCASB K1 F1
VDDQ_4 CKE AR1202 A11 C26
D2 A-TMBA1 B-TMBA1 B-TMODT B-MODT B-MODT ODT VDDQ_7
VDDQ_5 A_DDR3_BA1/DDR2_CASZ B_DDR3_BA1/DDR2_CASZ J3 H2
L2 A-MCKB A-MRASB A-TMRASB A23 R26
E9 A-TMBA2 A_DDR3_BA2/DDR2_A5 B_DDR3_BA2/DDR2_A5 B-TMBA2 B-TMWEB B-MWEB VCC_1.5V_DDR B-MRASB
K3
RAS VDDQ_8
H9
VDDQ_6 CS A-MCASB A-TMCASB
F1 K1 10 B-MCASB CAS VDDQ_9
VDDQ_7 ODT A-MODT A12 D26 R1232 L3
H2 J3 A-MODT A-TMODT B-MWEB WE
A-MRASB A-TMCK A_DDR3_MCLK/DDR2_MCLK B_DDR3_MCLK/DDR2_MCLK B-TMCK R1219 10K J1
VDDQ_8 RAS VCC_1.5V_DDR A-MWEB A-TMWEB C11 D25
H9 K3 A-TMCKB B-TMCKB B-TMDQSL B-MDQSL NC_1
VDDQ_9 CAS A-MCASB A_DDR3_MCLKZ/DDR2_MCLKZ B_DDR3_MCLKZ/DDR2_MCLKZ 10 T2 J9
L3 10 B12 E24 B-MRESETB RESET
R1231 A-TMCKE A_DDR3_CKE/DDR2_DQ5 B_DDR3_CKE/DDR2_DQ5 B-TMCKE R1220 NC_2
WE A-MWEB L1
J1 10K R1208 B-TMDQSLB B-MDQSLB NC_3
NC_1 A-MDQSL A-TMDQSL 10 L9
J9 T2 10 NC_4
NC_2 RESET A-MRESETB C20 N25 R1217 F3 T7
L1 R1209 A-TMODT B-TMODT B-MDQSL DQSL NC_6
NC_3 A_DDR3_ODT/DDR2_ODT B_DDR3_ODT/DDR2_ODT B-TMDQSU B-MDQSU G3
L9 A-MDQSLB A-TMDQSLB A20 M26 B-MDQSLB
10 A-TMRASB A_DDR3_RASZ/DDR2_WEZ B_DDR3_RASZ/DDR2_WEZ B-TMRASB 10 DQSL
NC_4 B20 N24 R1218
T7 F3 A-TMCASB B-TMCASB
NC_6 DQSL A-MDQSL R1211 A_DDR3_CASZ/DDR2_BA1 B_DDR3_CASZ/DDR2_BA1 B-TMDQSUB B-MDQSUB C7 A9
G3 A21 N26 B-MDQSU DQSU
A-MDQSU A-TMDQSU A-TMWEB A_DDR3_WEZ/DDR2_BA0 B_DDR3_WEZ/DDR2_BA0 B-TMWEB 10 VSS_1
DQSL A-MDQSLB 10 B7 B3
B-MDQSUB DQSU VSS_2
R1212 AR1212 E1
A9 C7 C22 R25
A-MDQSUB A-TMDQSUB A-TMRESETB A_DDR3_RESETB B_DDR3_RESETB B-TMRESETB VSS_3
VSS_1 DQSU A-MDQSU B-TMDQL1 B-MDQL1 E7 G8
B3 B7 10 B-MDML DML VSS_4
VSS_2 DQSU A-MDQSUB B-TMDQL3 B-MDQL3 D3 J2
E1 AR1209 B-MDMU DMU VSS_5
VSS_3 C16 J25 B-TMDML B-MDML J8
G8 E7 A-MDQL1 A-TMDQL1 A-TMDQSL B-TMDQSL VSS_6
VSS_4 DML A-MDML A_DDR3_DQSL/DDR2_DQS0 B_DDR3_DQSL/DDR2_DQS0 B-TMDQU2 B-MDQU2 E3 M1
J2 D3 B16 J24 B-MDQL0 DQL0
A-MDQL3 A-TMDQL3 A-TMDQSLB A_DDR3_DQSLB/DDR2_DQSB0 B_DDR3_DQSLB/DDR2_DQSB0 B-TMDQSLB VSS_7
VSS_5 DMU A-MDMU 10 F7 M9
J8 A-MDML A-TMDML B-MDQL1 DQL1 VSS_8
VSS_6 A16 H26 AR1213 F2 P1
M1 E3 A-MDQU2 A-TMDQU2 A-TMDQSU B-TMDQSU B-MDQL2 DQL2 VSS_9
VSS_7 DQL0 A-MDQL0 A_DDR3_DQSU/DDR2_DQSB1 B_DDR3_DQSU/DDR2_DQSB1 B-TMCKE B-MCKE F8 P9
M9 F7 C15 H25 B-MDQL3 DQL3
10 A-TMDQSUB A_DDR3_DQSUB/DDR2_DQS1 B_DDR3_DQSUB/DDR2_DQS1 B-TMDQSUB VSS_10
VSS_8 DQL1 A-MDQL1 B-TMDQL7 B-MDQL7 H3 T1
P1 F2 AR1210 B-MDQL4 DQL4 VSS_11
VSS_9 DQL2 A-MDQL2 A14 F26 B-TMDQL5 B-MDQL5 H8 T9
P9 F8 A-MCKE A-TMCKE A-TMDML B-TMDML B-MDQL5 DQL5 VSS_12
VSS_10 DQL3 A-MDQL3 A_DDR3_DML//DDR2_DQ13 B_DDR3_DML/DDR2_DQ13 G2
T1 H3 B18 L24 B-MDQL6 DQL6
A-MDQL7 A-TMDQL7 A-TMDMU A_DDR3_DMU/DDR2_DQ6 B_DDR3_DMU/DDR2_DQ6 B-TMDMU 10
VSS_11 DQL4 A-MDQL4 H7
T9 H8 A-MDQL5 A-TMDQL5 B-MDQL7 DQL7
VSS_12 DQL5 A-MDQL5 AR1216 B1
G2 C18 L25
A-TMDQL0 A_DDR3_DQL0/DDR2_DQ3 B_DDR3_DQL0/DDR2_DQ3 B-TMDQL0 VSSQ_1
DQL6 A-MDQL6 B13 F24 B-TMDQL0 B-MDQL0 D7 B9
H7 10 A-TMDQL1 B-TMDQL1 B-MDQU0 DQU0 VSSQ_2
DQL7 A-MDQL7 A_DDR3_DQL1/DDR2_DQ7 B_DDR3_DQL1/DDR2_DQ7 B-TMDQL2 B-MDQL2 C3 D1
B1 AR1205 A19 L26 B-MDQU1 DQU1
A-TMDQL2 A_DDR3_DQL2/DDR2_DQ1 B_DDR3_DQL2/DDR2_DQ1 B-TMDQL2 VSSQ_3
VSSQ_1 C13 F25 B-TMDQL6 B-MDQL6 C8 D8
B9 D7 A-MDQL0 A-TMDQL0 A-TMDQL3 B-TMDQL3 B-MDQU2 DQU2 VSSQ_4
VSSQ_2 DQU0 A-MDQU0 A_DDR3_DQL3/DDR2_DQ10 B_DDR3_DQL3/DDR2_DQ10 B-TMDQL4 B-MDQL4 C2 E2
D1 C3 C19 M25 B-MDQU3 DQU3
A-MDQL2 A-TMDQL2 A-TMDQL4 A_DDR3_DQL4/DDR2_DQ4 B_DDR3_DQL4/DDR2_DQ4 B-TMDQL4 VSSQ_5
VSSQ_3 DQU1 A-MDQU1 A13 E26 10 A7 E8
D8 C8 A-MDQL6 A-TMDQL6 A-TMDQL5 B-TMDQL5 B-MDQU4 DQU4 VSSQ_6
VSSQ_4 DQU2 A-MDQU2 A_DDR3_DQL5/DDR2_DQ0 B_DDR3_DQL5/DDR2_DQ0 AR1217 A2 F9
E2 C2 B19 M24 B-MDQU5 DQU5
A-MDQL4 A-TMDQL4 A-TMDQL6 A_DDR3_DQL6/DDR2_CKE B_DDR3_DQL6/DDR2_CKE B-TMDQL6 VSSQ_7
VSSQ_5 DQU3 A-MDQU3 C12 E25 B-TMDQU7 B-MDQU7 B8 G1
E8 A7 10 A-TMDQL7 B-TMDQL7 B-MDQU6 DQU6 VSSQ_8
VSSQ_6 DQU4 A-MDQU4 A_DDR3_DQL7/DDR2_DQ2 B_DDR3_DQL7/DDR2_DQ2 B-TMDQU3 B-MDQU3 A3 G9
F9 A2 AR1206 B-MDQU7 DQU7 VSSQ_9
VSSQ_7 DQU5 A-MDQU5 A15 G26 B-TMDQU5 B-MDQU5
G1 B8 A-MDQU7 A-TMDQU7 A-TMDQU0 B-TMDQU0
VSSQ_8 DQU6 A-MDQU6 A_DDR3_DQU0/DDR2_DQ15 B_DDR3_DQU0/DDR2_DQ15 B-TMDMU B-MDMU
G9 A3 A17 J26
A-MDQU3 A-TMDQU3 A-TMDQU1 A_DDR3_DQU1/DDR2_DQ9 B_DDR3_DQU1/DDR2_DQ9 B-TMDQU1 10
VSSQ_9 DQU7 A-MDQU7 B14 G24
A-MDQU5 A-TMDQU5 A-TMDQU2 A_DDR3_DQU2/DDR2_DQ8 B_DDR3_DQU2/DDR2_DQ8 B-TMDQU2 AR1218
C17 K25
A-MDMU A-TMDMU A-TMDQU3 A_DDR3_DQU3/DDR2_DQ11 B_DDR3_DQU3/DDR2_DQ11 B-TMDQU3 B-TMDQU6 B-MDQU6
10 B15 H24
A-TMDQU4 A_DDR3_DQU4/DDR2_DQM1 B_DDR3_DQU4/DDR2_DQM1 B-TMDQU4 B-TMDQU0 B-MDQU0
AR1207 A18 K26
A-TMDQU5 A_DDR3_DQU5/DDR2_DQ12 B_DDR3_DQU5/DDR2_DQ12 B-TMDQU5 B-TMDQU4 B-MDQU4
A-MDQU6 A-TMDQU6 C14 G25
A-TMDQU6 A_DDR3_DQU6/DDR2_DQM0 B_DDR3_DQU6/DDR2_DQM0 B-TMDQU6
A-MDQU0 A-TMDQU0 B17 K24
A-TMDQU7 A_DDR3_DQU7/DDR2_DQ14 B_DDR3_DQU7/DDR2_DQ14 B-TMDQU7 10
A-MDQU4 A-TMDQU4
R1221
B-TMDQU1 B-MDQU1
10 10
R1210
A-MDQU1 A-TMDQU1
10 10K R1234
B-MCKE
R1233 10K
A-MCKE

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR3(256MB) 21

+3.3V_Normal
+3.3V_Normal
S_FLASH
R1404
IC1401
4.7K
+3.3V_Normal MX25L8005M2I-15G
CS# VCC C1401

1 8
R1403
/SPI_CS
10K
0.1uF
SO HOLD#
SPI_SDO 2 7
R1402
0 WP# SCLK
/FLASH_WP 3 6 SPI_SCK
R1405
C GND SI 33
4 5 SPI_SDI
R1401 B Q1401
KRC103S
OPT 0
E

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. S-Flash(1MB) 23

LGIT CAN NIM_H/N TUNER for EU & CHINA
+5V_TU BOOSTER : CHINA OPT
RF_SWITCH_CTL
Pull-up can’t be applied L3701 CHINA_OPT
because of MODEL_OPT_2 BLM18PG121SN1D
R3734 CHINA_OPT
R3743
0
close to TUNER 10K
Q3701
CHINA_OPT
OPT E ISA1530AC1
R3737
R3762 0 2.2K
CONTROL_ATTEN
B CHINA_OPT
C
C R3745
CHINA_OPT 10K
Q3702 B FE_BOOSTER_CTL
TU3702 TU3701 2SC3052 LNA2_CTL

The pull-up/down of LNA2_CTL
C3709 E CHINA_OPT
TDTJ-S001D TDFR-C035D 0.01uF
25V
is depended on MODLE_OPT_1.
GPIO must be added for FE_BOOSTER_CTL
CHINA_OPT
EU_TUNER TDFR-C035D close to TUNER +5V_TU
ANT_PWR[OPT] RF_S/W_CNTL OPTION : RF AGC
1 1 R3705 0
C3701 C3731
CHINA_OPT C3728 10uF
BST_CNTL BST_CNTL 0.1uF C3704 0.1uF
2 2 16V C3703 10V
0.1uF 16V OPT
100pF
16V OPT GPIO must be added.
+5V_TU
+B +B1[+5V] 50V C
3 3 R3754
10K R3755
Q3704 B FE_AGC_SPEED_CTL
2SC3052
+3.3V_TU 470 R3758
NC[RF_AGC] NC[RF_AGC] OPT
IF_AGC_SEL 82
4 4 R3707 0 OPT TU_SIF
E E
OPT
AS NC_1
5 5 R3740
B ISA1530AC1
1.2K R3741
33 R3735 R3753 Q3705
SCL SCLT 1.2K +5V_TU 4.7K
C
6 6 TU_SCL
SDA SDAT 33 R3736
7 7 TU_SDA R3751 R3752
C3711 C3713 220 220
NC[IF_TP] NC_2 18pF 18pF
8 8 50V 50V
SIF SIF C3702 close to TUNER TU_CVBS

9 9
E
0.1uF 16V R3749 0
NC NC_3
10 10 B
R3750 Q3703
VIDEO VIDEO 1K ISA1530AC1
C
11 11 +3.3V_TU OPT
+1.2V/+1.8V_TU +3.3V_TU
GND GND
12 12
1.2V +B2[1.2V] CHINA_OPT R3733 IF_AGC_MAIN
R3732 100K
13 13 C3737 C3738 C3705 C3707
C3708
100
100pF 0.1uF 100uF 100pF 0.1uF TUNER_RESET should be guarded by ground
3.3V +B3[3.3V] 50V 16V 16V
50V 16V C3710
14 14 0.1uF +3.3V_TU
16V
RESET RESET
15 15
IF_AGC_CNTL NC_4 0
R3742 R3744
16 16 R3704 EU_OPT 4.7K
CHINA_OPT
4.7K
CHINA_OPT
DIF_1 SCL
17 17 R3702 0 CHINA_OPT R3738 100
DEMOD_SCL
CHINA_OPT
DIF_2 SDA
18 18 R3701 0 CHINA_OPT R3739 100
DEMOD_SDA
close to IF line CHINA_OPT
C3715 C3716
ERR C3714 22pF
19 C3712 22pF
22pF 22pF 50V 50V
19 50V OPT
SYNC 50V OPT
CHINA_OPT CHINA_OPT
20 EU_OPT
SHIELD R3760 0
VALID IF_N_MSTAR
21
MCL
22 IF_P_MSTAR
R3761 0
D0 EU_OPT 1. should be guarded by ground
23 2. No via on both of them
TU3701-*1 3. Signal Width >= 12mils
TDFR-C155D D1 Signal to Signal Width = 12mils
EU_OPT
24 Ground Width >= 24mils +3.3V_TU
IC3703
TDFR-C155D R2
D2 Close to the tuner AZ1117H-ADJTRE1(EH11A) EU_OPT
1
RF_S/W_CNTL 25 R3767 +1.2V/+1.8V_TU
10
BST_CNTL D3 INPUT 3 1 ADJ/GND
2
26 2
+B1[+5V]
3
D4 OUTPUT EU_OPT
4
NC[RF_AGC] 27 R3768
1.2K
5
NC_1 D5 R1
28
SCLT
6 R3703
D6 150
7
SDAT 29 OPT
8
NC_2 D7
30
9
SIF 31
IC3701 EU_OPT
NC_3
10 SC4215ISTRT R3766
1
VIDEO 1/10W +1.2V/+1.8V_TU
11
SHIELD 380mA
GND NC_1 GND
12 1 8
CHINA_OPT CHINA_OPT
+B2[1.2V]
13 R3764
EN ADJ R3748 0
+B3[3.3V] R3724 2 7
14 CHINA_OPT 0 1/10W
FE_TS_SYNC FE_TS_DATA[0-7] 4.7K
RESET CHINA_OPT
VIN VO R1
15 1608
CHINA_OPT R3730 0 3 6
NC_4 FE_TS_VAL_ERR
16 C3717
0.1uF
CHINA_OPT
SCL R3731 16V NC_2 NC_3
17 CHINA_OPT 0 4 5 C3729
FE_TS_CLK C3730 DEMOD_RESET
R3747 0.1uF
SDA 16V 10uF
18 9.1K 10V This was being applied to the only china demod,
CHINA_OPT R3725 0
ERR FE_TS_DATA[0] so this has to be deleted in both main and ISDB sheet.
19 1608
R2
SYNC CHINA_OPT R3727
20 0 FE_TS_DATA[1]
VALID
21
CHINA_OPT R3728 0
MCL FE_TS_DATA[2] Vo=0.8*(1+R1/R2)
22
D0 CHINA_OPT R3729
23 0 FE_TS_DATA[3]
D1
24
CHINA_OPT R3726 0 FE_TS_DATA[4]
D2
25
D3 CHINA_OPT R3721 +5V_Normal
26 0 FE_TS_DATA[5] +3.3V_Normal
D4
+5V_TU
27
R3722
+3.3V_TU
CHINA_OPT 0 FE_TS_DATA[6]
D5 200mA L3702 L3703
28
BLM18PG121SN1D 60mA BLM18PG121SN1D
D6 CHINA_OPT R3723
29 0 FE_TS_DATA[7]
D7 C3719 C3722 C3724 C3726 C3727
30 C3723 C3725
31 22uF 22uF 0.1uF 0.1uF 0.1uF
16V 22uF 0.1uF
Close to the CI Slot 10V 10V 16V 16V 16V
OPT 10V
SHIELD

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP2_Saturn7M VER 1.0
EU/CHINA CAN TUNER
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 27

[51Pin LVDS Connector]
(For FHD 60/120Hz)
PANEL_VCC
[Right FFC Connector]
[LEFT FFC Connector] (60Pin Mini-LVDS) [41Pin LVDS Connector] [30Pin LVDS Connector]
0 NON_GIP
0 NON_GIP
0 NON_GIP
0 NON_GIP
0 NON_GIP
0 NON_GIP
(60Pin Mini-LVDS) L702 (For FHD 120Hz) (For HD 60Hz_Normal)
120-ohm
WAFER_FHD
P701 P702 P703 P704 P705
104060-6017 104060-6017 TF05-51S TF05-41S FF10001-30
MINI_LVDS MINI_LVDS WAFER_FHD WAFER_FHD_120HZ WAFER_HD
C700 C709 C710
10uF 1000pF 0.1uF
R748
R749
R750
R751
R752
R753
16V 50V 16V
1 GND 1 GND 1 WAFER_FHD
OPT WAFER_FHD 1 1
2 GMA1 GMA1 2 Z_OUT R754 0 MINI_LVDS Z_OUT VGH_M
2 2 2 R716 0
3 GMA3 3 CLK1 (+25V)
GMA3 CLK1 WAFER_HD
4 GMA4 GMA4 4 CLK2 CLK2 3 3 RXD4- 3 R717 0 PWM_DIM
5 GMA6 5 CLK3 OPT
GMA6 CLK3 R767 0 NON_GIP 4 4 4 R714 0
6 GMA7 6 CLK4 GSC/GCLK3_I RXD4+ OPC_OUT
GMA7 CLK4 R768 0 NON_GIP OPT
7 GMA9 7 CLK5 GOE/GCLK1_I 5 5 5
GMA9 CLK5 RXD3-
8 GMA10 GMA10 8 CLK6 CLK6
VCC_LCM R769 0 NON_GIP 6 6 RXD3+ 6 RXA3-
9 GMA12 GMA12 9 VGI_N VGI_N VGL
R770 0 NON_GIP (-5V)
10 GMA13 GMA13 10 VGI_P VGI_P 7 7 7 RXA3+
11 GMA15 11 VGH_ODD VGL_I
GMA15 VDD_ODD 8 8 8
12 GMA16 12 VGH_EVEN RXDCK-
GMA16 VDD_EVEN R771 0 NON_GIP
13 GMA18 GMA18 R700 13 VSS R765 0 GIP 9 9 RXDCK+ 9 RXACK-
R772 0 NON_GIP
14 GND 3.3K 14 VST VST 10 10 10 RXACK+
15 OPT_N MINI_LVDS 15 GND
16 H_CONV H_CONV 16 VCOM_FB VCOMRFB 11 RXA4- 11 RXD2- 11
17 VST_IN GSP/GVST_I 17 VCOM_IN VCOMR 12 RXA4+ 12 RXD2+ 12 RXA2-
18 POL POL VCC_LCM 18 GND
19 SOE SOE 19 VDD 13 RXA3- 13 RXD1- 13 RXA2+
20 GND 20 VDD
14 RXA3+ 14 RXD1+ 14
21 LV0+ RXD1- 21 HALF_VDD
22 LV0- RXD1+ 22 HALF_VDD 15 15 RXD0- 15 RXA1-
C701 C703 LVDS_SEL
23 LV1+ RXD0- 23 GND
0.1uF 0.01uF VDD_LCM 16 RXACK- 16 RXD0+ 16 RXA1+
24 LV1- RXD0+ 16V 50V 24 VCC +3.3V_Normal
25 LV2+ MINI_LVDS MINI_LVDS 25 VCC 17 17 17
RXC4- RXACK+
26 LV2- 26 GND 10uF/25V(3216)
RXC4+ 18 18 18
27 LVCLK+ 27 RV0+ HVDD C707 RXA0- R712
RXC3- RXA1- C705 0.1uF
28 LVCLK- VDD_LCM 28 RV0- 19 19 19 3.3K
RXC3+ RXA1+ 10uF 50V RXA2- RXC4- RXA0+
29 LV3+ HVDD 29 RV1+ MINI_LVDS LVDS_SEL_HIGH
RXC2- RXA0- 20 20 20
30 LV3- 30 RV1- C712 MINI_LVDS RXA2+ RXC4+
RXC2+ RXA0+ 10uF
10uF/25V(3216) R711
31 LV4+ RXC1- 31 RV2+ RXB4- 16V 21 RXA1- 21 RXC3- 21 R724 0 OPC_EN
C711 C704 MINI_LVDS OPT 10K
32 LV4- RXC1+ 32 RV2- RXB4+
10uF C702 0.1uF 22 22 22 LVDS_SEL_LOW
33 LV5+ 10uF 33 RVCLK+ VCC_LCM RXA1+ RXC3+
RXC0- 16V 50V RXB3-
34 LV5- MINI_LVDS MINI_LVDS 34 RVCLK- 23 23 23
RXC0+ RXB3+ RXA0-
35 GND MINI_LVDS 35 RV3+ PANEL_VCC
RXB2- 24 BIT_SEL 24 24
36 VCC 36 RV3- C706 C708 RXA0+ RXCCK-
RXB2+ 0.1uF 0.01uF
37 VCC 37 RV4+ 25 25 25 L701
RXB1- 16V 50V RXCCK+
38 GND 38 RV4- MINI_LVDS MINI_LVDS 120-ohm
RXB1+ 26 26 26
39 HALF_VDD 39 RV5+ R709 WAFER_HD
RXB0- 10K
40 HALF_VDD 40 RV5- RXB0+ 27 RXB4- 27 RXC2- 27
BIT_SEL_LOW
41 VDD 41 GND VCC_LCM
28 RXB4+ 28 RXC2+ 28
42 VDD VGL 42 SOE SOE
43 GND (-5V) 43 POL 29 29 29
VGL_I POL RXB3- RXC1-
44 VCOM_IN VCOML 44 VST_IN GSP/GVST_I R703
30 RXB3+ 30 RXC1+ 30
45 VCOM_FB VCOMLFB 45 H_CONV H_CONV 3.3K
46 GND 46 OPT_N MINI_LVDS 31 31 RXC0- 31
47 VST VST 47 GND
R745 0 NON_GIP 32 RXBCK- 32 RXC0+
48 VSS R729 0 GIP 48 GMA18 GMA18
49 VGH_EVEN VDD_EVEN 49 GMA16 GMA16 33 RXBCK+ 33
50 VGH_ODD VDD_ODD 50 GMA15 GMA15 34 34
51 VGI_P VGI_P 51 GMA13 GMA13
52 VGI_N VGI_N 52 GMA12 GMA12 35 RXB2- 35
53 CLK6 CLK6 53 GMA10 GMA10
VCC_LCM 36 RXB2+ 36
54 CLK5 CLK5 54 GMA9 GMA9
55 CLK4 CLK4 55 GMA7 GMA7 37 RXB1- 37
56 CLK3 CLK3 56 GMA6 GMA6 38 RXB1+ 38 PANEL_VCC
57 CLK2 R701 0 GIP CLK2 57 GMA4 GMA4
R773
58 CLK1 CLK1 3.3K 58 GMA3 GMA3 39 RXB0- 39
L703
59 Z_OUT NON_GIP 59 GMA1 120-ohm
Z_OUT GMA1 40 40
60 GND 60 GND RXB0+
LVDS_SEL
41 R720 0 41 3D
R713 0 SCAN_BLK2 C713 C714 C715
61 61 SCAN 10uF 1000pF 0.1uF
42 NON_SCANR721 0 +3.3V_Normal
OPC_EN 42 16V 50V 16V
OPT OPT 3D 3D
. . 43 R728 0 SCAN_BLK1/OPC_OUT
SCAN R705
44 R723 0 PWM_DIM 3.3K
OPT
45 LVDS_SEL_HIGH
R702 33 /3D_FPGA_RESET
46 R706 3D 33 FRC_RESET R710
240Hz 10K
47 R707 33 I2C_SCL LVDS_SEL_LOW
240Hz/3D
48 R708 33 I2C_SDA
240Hz/3D
49 R704 33 3D_POWER_EN
3D
50
51
52

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS 36

+1.8V_AMP
+3.3V_Normal
IC404
AP1117E18G-13
R474
IN 3 Vd=1.4V 1 ADJ/GND
120 mA
1
2
C434 OUT C446
C421
0.1uF 10uF 0.1uF
16V 10V 16V
+24V
SPK_L+
D501 C540 OPT
1N4148W R519 R526 L507 0.01uF
50V
OPT 100V 12 12 AD-9060 R527
R535 C536 R531 OPT
OPT 2S 2F 0.1uF 4.7K
3.3 C529 50V
390pF 3.3
OPT 50V C534
0.47uF
SPEAKER_L
C521 C547 1S 1F 50V
C515 C519 0.01uF R532 OPT
0.1uF 0.1uF 10uF C530
50V 35V 50V 390pF C537 3.3
+3.3V_Normal 50V D502 50V 0.1uF R528
15uH 50V C541 OPT
1N4148W R520 R524 4.7K 0.01uF
BLM18PG121SN1D
100V 50V
12 12
C514 OPT
22000pF SPK_L-
50V C518
L504 22000pF
50V
PGND1A_2
PGND1A_1
PVDD1A_2
PVDD1A_1
PVDD1B_2
PVDD1B_1
PGND1B_2
PGND1B_1 C520
OUT1A_2
OUT1A_1
OUT1B_2
OUT1B_1
1uF
EP_PAD
BST1B 25V
VDR1B
AMP_RESET_N
TP502
C506
56
55
54
53
52
51
50
49
48
47
46
45
44
43
1000pF
50V
BST1A 1 42 NC C522 SPK_R+
AUD_MASTER_CLK C512 25V1uF
VDR1A 2 THERMAL 41 VDR2A C525
1uF 25V /RESET 57 BST2A 22000pF
3 40 D503 R525
+1.8V_AMP 50V R521 C542 OPT
C509 AD 4 39 PGND2A_2 1N4148W 12 12 L506
+1.8V_AMP 0.1uF 100V AD-9060 C538 R529 0.01uF
DGND_1 5 38 PGND2A_1
OPT 2S 2F 50V
BLM18PG121SN1D
GND_IO 37 OUT2A_2 C531 0.1uF 4.7K R533 OPT

6 IC501
CLK_I 7 36 OUT2A_1
390pF
50V
C535
0.47uF
50V 3.3 SPEAKER_R
BLM18PG121SN1D
L502 50V
C508 VDD_IO 8 35 PVDD2A_2 1S 1F
C504 1000pF R534 OPT
L501 50V DGND_PLL EAN60969601 PVDD2A_1 C532
9 34 390pF 3.3
100pF 50V
R508 AGND_PLL 33 PVDD2B_2 D504 15uH C539 R530
50V 10 C543 OPT
3.3K LF PVDD2B_1 1N4148W R522 R523 0.1uF 4.7K 0.01uF
11 NTP-7000 32 100V 50V
12 12 50V
AVDD_PLL 12 31 OUT2B_2 OPT SPK_R-
DVDD_PLL 13 30 OUT2B_1 +24V
GND 14 29 PGND2B_2
OPT
C501 C502 OPT
10uF 0.1uF C503 C505
15
16
17
18
19
20
21
22
23
24
25
26
27
28
10V 16V 10uF 0.1uF

10V 16V
DGND_2
DVDD
SDATA
WCK
BCK
SDA
SCL
MONITOR0
MONITOR1
MONITOR2
/FAULT
VDR2B
BST2B
PGND2B_1
+1.8V_AMP C528
C526 C527 10uF
0.1uF 0.1uF 35V
50V 50V
OPT
C511 C517
10uF C513 1uF
0.1uF 25V C524
10V
16V
22000pF
50V
R503 100
AUD_LRCH
R504 100 R513
AUD_LRCK 0
R505 100 POWER_DET
AUD_SCK
R506 33 C516 OPT
AMP_SDA 1000pF
R507 33 50V
AMP_SCL +3.5V_ST
AMP_MUTE_HOTEL
C507 C510 C546 C544 C545

18pF 18pF 22pF 22pF 22pF
50V 50V 50V 50V 50V
R515 WAFER-ANGLE
OPT OPT OPT R514 100 10K
C R536
0
B R517 SPK_L+
Q501 AMP_MUTE 4 4
2SC3052 10K R537
0
E SPK_L-
3 3
R538
0
SPK_R+
2 2
R539
0
SPK_R-
1 1
P501
SPK_SLIM SMAW250-04
P502
SPK_NORMAL

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AUDIO[NTP] 38

USB1 OPTION
USB_MICREL
+3.3V_Normal
IC2301
+5V_USB
L2301 MIC2009YM6-TR R2303
4.7K
MLB-201209-0120P-N2
VOUT VIN
OPT
6 1
120-ohm ILIMIT
5 $0.125 2 GND
C2303
R2306 0 C2304
R2301
FAULT/
4 3
ENABLE 10uF
C2302 0.1uF
180
10V
10uF USB1_CTL
10V
@optioKJA-UB-4-0004
R2307
10K
JK2301
R2302 47 USB1_OCD
USB DOWN STREAM
R2305 0
2
SIDE_USB_DM
R2304 0
3
SIDE_USB_DP
4
D2301 D2302
CDS3C05HDMI1 CDS3C05HDMI1
5
5.6V 5.6V
OPT
OPT
TP2301 /RST_HUB

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB 39

Composite
For EU & CHINA
+3.3V_Normal
Full Scart/ Comp1 AV_CVBS_IN
R1659
R1613 0
10K
C1643 C1648
D1619 47pF 220pF
R1654
30V 50V 50V
SC1/COMP1_DET 75 +3.3V_Normal
R1614 OPT
1K IN CASE OF SMALL= 15V
D1611 C1607
R4223
5.6V 0.1uF +12V/+15V

EU_OPT
OPT 16V L1606 R1660
EU_OPT JK1604
0
10K
R4210
0 PPJ233-01
SC1_SOG_IN EU_OPT EU_OPT AV_CVBS_DET
EU_OPT E EU_OPT C1625 R1666
ISA1530AC1 R1640 C1623 5C [RD]E-LUG
EU_OPT 470 0.1uF 0.1uF 1K
R1611 Q1601 50V 50V D1624 C1646
0 5.6V
SC1_CVBS_IN B 4C [RD]O-SPRING 0.1uF
EU_OPT EU_OPT 16V
EU_OPT EU_OPT C1608 C
EU_OPT Q1602 R1641
R1609 C1604 220pF 3C [RD]CONTACT
EU_OPT 47pF C 2SC3052 47K EU_OPT
75 50V R4211 C1621
R4220 AV_DET 50V
0 OPT 390 B 47uF R1685
FIX-TER 22 4B [WH]C-LUG
D1602 16V 10K
[GN]GND COM_GND
11 30V AV_R_IN
21 E DTV/MNT_VOUT L1609
OPT [YL]CONTACT
R1689
10 SYNC_IN EU_OPT EU_OPT 3A C1659 120-ohm C1663
[GN]G R1635 R1645 R1671
12K
20 0 D1625 330pF
SYNC_OUT 390 470K OPT
9 4A [YL]O-SPRING 5.6V OPT 50V
EU_OPT
[GN]C_DET 19 Rf EU_OPT
SYNC_GND2 EU_OPT EU_OPT Rg R1642
D1610 R1628 R1639 15K
8 18 C1620 180 [YL]E-LUG
D1603 30V 75 Gain=1+Rf/Rg 5A
[BL]B SYNC_GND1 100uF
30V OPT 16V L1610
17 120-ohm R1684
7 RGB_IO OPT 10K
[RD]R EU_OPT SC1_FB
16 AV_L_IN
R_OUT
R1688
6 EU_OPT R1627
15 SC1_R+/COMP1_Pr+ R1616 22 C1662
12K
[WH]L_IN D1604 OPT R1672
RGB_GND R1608 75 D1626 C1658 330pF
30V C1602
5 14 75 5.6V 470K OPT 50V
10pF
[RD]R_IN R_GND OPT
13 SC1_R-/COMP1_Pr-
4 R4221
D2B_OUT 0
[RD]MONO EU_OPT R1601
12 0
G_OUT EU_OPT
13 SC1_G+/COMP1_Y+
11 D1605 OPT 30V
PPJ-230-01 D2B_IN EU_OPT C1603 REC_8
30V R1604
10 R4224 R1602 10pF EU_OPT D1716
JK1601 G_GND 0 0 75 R1669
9 SC1_G-/COMP1_Y- 0
ID
8 SC1_ID
OPT EU_OPT
B_OUT D1618 R1623 EU_OPT
7 SC1_B+/COMP1_Pb+ 30V
OPT 15K R1629
AUDIO_L_IN D1606 3.9K
R1605 C1601
6 30V 10pF
B_GND 75
5 SC1_B-/COMP1_Pb-
AUDIO_GND
4
AUDIO_L_OUT R1603 R1617
3 0 10K
AUDIO_R_IN SC1/COMP1_L_IN
2 L1604
AUDIO_R_OUT D1607 R1606 OPT 120-ohm C1611 R1630
5.6V 470K C1606 330pF 12K
1
OPT 50V
PSC008-01
JK1602 R1618
10K
SC1/COMP1_R_IN
D1609 L1603
120-ohm C1612
5.6V OPT R1631
OPT R1607 330pF 12K
470K
C1605
50V
IC1601
LM324D EU_OPT/CHINA_HOTEL_OPT
EU_OPT
CLOSE TO MSTAR R1656
2.2K 1 14
DTV/MNT_L_OUT 1 14
EU_OPT
DTV/MNT_L_OUT EU_OPT R1664
C1644 2 13
10uF OPT 33K
D1608 EU_OPT EU_OPT EU_OPT EU_OPT R1662 2 13
5.6V L1601 C1609 R1622 C1618 C1664 16V 470K
BLM18PG121SN1D 0 R4218 EU_OPT
OPT 1000pF 4700pF +12V/+15V 0.01uF R1667
22K 3 12
50V EU_OPT EU_OPT 10K 3 12
R1657 C1654
5.6K 33pF
SCART1_Lout R4219 100
4 11
4 11
DTV/MNT_R_OUT C1642 EU_OPT/CHINA_HOTEL_OPT
EU_OPT EU_OPT R1658
D1601 EU_OPT EU_OPT 0.1uF 5.6K 5 10
L1602 R1624 C1619 R4216 100 5 10
5.6V 0 R4212 0 50V SCART1_Rout
BLM18PG121SN1D C1610 4700pF
OPT EU_OPT/CHINA_HOTEL_OPT
1000pF AUDIO_R R1665
50V C1665 R4217 33K 6 9
HOTEL_OPT 0.01uF 6 9
22K
EU_OPT/CHINA_HOTEL_OPT
R1668
EU_OPT/CHINA_HOTEL_OPT 10K 7 8
R1655 C1655 7 8
2.2K 33pF
DTV/MNT_R_OUT
EU_OPT/CHINA_HOTEL_OPT
OPT EU_OPT/CHINA_HOTEL_OPT
C1645 R1661
10uF 470K
16V
OPTION TABLE EU_OPT/CHINA_HOTEL_OPT
NAME STATUS COMPONENT2 +3.3V_Normal
R1612
10K R1615
1K
AV_OPT EU : Not Using COMP2_DET
D1613
5.6V
China : Using
FOR ESD & EMI
R4215 0 COMP2_Y-
[GN]E-LUG OPT
CHINA_OPT EU : Not Using 6A
R1619
75
C1613 +12V/+15V
10pF
[GN]O-SPRING 50V
COMP2_Y+
[SCART PIN 8] IN CASE OF SMALL= 15V
China : Using 5A
[GN]CONTACT
D1612
30V [SCART AUDIO MUTE] 26~52 19~22 R1694
R4205 10K
FOR ESD & EMI R4205-*1 2.2K 19~22
4A 0
[BL]E-LUG-S 50V COMP2_Pb-
EU_OPT EU :Using 7B
D1614 30V
R4214 0 75
10pF
C1614 EU_OPT
[BL]O-SPRING R1620 OPT
COMP2_Pb+ R1687 EU_OPT EU_OPT
5B FOR ESD & EMI 10K R1690 R4202 C
China:NotUsing [RD]E-LUG-S 50V
COMP2_Pr- OPT
0 0
B EU_OPT
10pF R1675 EU_OPT Q1615
7C 2K R1677
[RD]O-SPRING_1 R4213 0 75
R1621
C1615
OPT EU_OPT 2SC3052
+3.5V_ST 10K R1695 E
D1615 COMP2_Pr+ R4207
5C 12K 51K
30V
[WH]O-SPRING OPT
DTV/MNT_L_OUT EU_OPT C
R1633 R1637 R1680 REC_8
5D 10K 0 OPT
EU_OPT R1652 1K B
[RD]CONTACT COMP2_L_IN SC_RE1
Q1607 10K EU_OPT
4E D1616 C1616 R1636 EU_OPT Q1613
R1625 2SC3052 EU_OPT
[RD]O-SPRING_2 5.6V 470K 1000pF 12K RT1P141C-T112 OPT E 2SC3052
50V R1648 Q1610 R1676
2K 560
5E
[RD]E-LUG SCART1_MUTE C
R1632 R1638 EU_OPT
3 1 B Q1611
6E 10K 0 DTV/MNT_R_OUT EU_OPT SC_RE2
COMP2_R_IN 2SC3052
EU_OPT C1636 EU_OPT
PPJ234-01 Q1608 2
D1617 C1617 0.1uF R1681 E
JK1603 R1634 2SC3052 EU_OPT OPT
5.6V R1626 1000pF 12K
470K R1650 R1678 1K
50V 2K 680

SCART/RCA 41
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

NOT USING B/T
BT_ON/OFF
BT_DM
BT_DP
BT_LOUT

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. NON B/T 44

CI Region
CI SLOT
+5V_CI_ON
CI_DATA[0-7] CI TS INPUT
AR1905 FE_TS_DATA[7]
CI_DATA[0-7]
33
+5V_Normal CI_MDI[7] FE_TS_DATA[6]
C1906 CI_MDI[6]
10uF FE_TS_DATA[5]
10V CI_MDI[5] FE_TS_DATA[4]
R1903
10K
EAG41860102 CI_MDI[4]
@netLa
P1901 AR1906 FE_TS_DATA[3]
33
/CI_CD1 CI_MDI[3] FE_TS_DATA[2]
C1903 10067972-000LF CI_MDI[2] FE_TS_DATA[1]
0.1uF CI_MDI[1] FE_TS_DATA[0]
16V 35
CI_MDI[0]
R1908 100 36 CI_DATA[3]
R1921
CI_DATA[0-7]
37 3 CI_DATA[4]
AR1901
10K
33 CI_DATA[5] FE_TS_DATA[0-7]
CI_TS_DATA[4] 38 4
39 5 CI_DATA[6] AR1904
CI_TS_DATA[5] 33
40 6 CI_DATA[7] CI_MISTRT FE_TS_SYNC
CI_TS_DATA[6]
CI_TS_DATA[7] 41 7 R1919 47 FE_TS_VAL_ERR
/PCM_CE CI_MIVAL_ERR
42 8 CI_ADDR[10]
R1905 10K 43 9 FE_TS_CLK
CI_OE CI_MCLKI
44 10 CI_ADDR[11]
CI_IORD
45 11 CI_ADDR[9]
CI_IOWR
46 12 CI_ADDR[8]
47 13 CI_ADDR[13]
CI_MDI[0]
48 14 CI_ADDR[14]
CI_MDI[1]
CI_MDI[2] 49 15 CI_WE
50 16 R1920 100
CI_MDI[3] /PCM_IRQA
C1905 0.1uF 51 17
R1910 0 R1916 0
52 18 C1909
GND
OPT 53 19 OPT 0.1uF
CI_MDI[4]
GND
CI_MDI[5] 54 20
CI_ADDR[12]
CI HOST I/F
CI_MDI[6] 55 21
56 22 CI_ADDR[7]
CI_MDI[7]
R1906 10K 57 23 CI_ADDR[6]
R1902 47 58 24 CI_ADDR[5]
PCM_RST
R1901 47 59 25 CI_ADDR[4]
/PCM_WAIT
AR1902 60 26 CI_ADDR[3]
REG
33 61 27 CI_ADDR[2]
CI_TS_CLK
CI_TS_VAL 62 28 CI_ADDR[1]
CI_TS_SYNC 63 29 CI_ADDR[0]
64 30 CI_DATA[0]
65 31 CI_DATA[1]
CI_ADDR[0-14]
CI_TS_DATA[0] 66 32 CI_DATA[2]
33
CI_TS_DATA[1] 67 33
CI_TS_DATA[2] 68 34
CI_TS_DATA[3]
0
OPT
AR1903 G2
2 69 G1
1
R1909
CI_DET
R1907 100 IC1902
/CI_CD2 +3.3V_CI
+5V_Normal GND C1913
0.1uF
1OE VCC 16V
GND 1 20
TOSHIBA
1A1 2OE
R1904 PCM_A[0] 2 19
GND
0ITO742440D
10K C1904
0.1uF 2Y4 1Y1
CI_ADDR[7] 3 18 CI_ADDR[0]
16V
1A2 2A4
PCM_A[1] 4 17 PCM_A[7]
CI_MISTRT
CI_MIVAL_ERR
2Y3 1Y2
TC74LCX244FT
CI_MCLKI
1A3 2A3
PCM_A[2] 6 15 PCM_A[6]
2Y2 1Y3
1A4 2A2
PCM_A[3] 8 13 PCM_A[5]
2Y1 1Y4
CI DETECT CI_ADDR[4] 9 12 CI_ADDR[3]
GND 2A1
10 11 PCM_A[4]
+3.3V_Normal +3.3V_CI +3.3V_CI +3.3V_CI
IC1901
KIC7SZ32FU
L1901 IN_B 1 5 VCC

/CI_CD2
R1917
BLM18PG121SN1D
0.1uF
C1908
10K
IN_A 2
/CI_CD1
16V
GND 3 4 OUT_Y
AR1907
C1901 C1902 GND
CI_DATA[0] 33 PCM_D[0]
R1915 CI_DATA[1] PCM_D[1]
CI_DET
CI_DATA[0-7]
0.1uF 0.1uF 47
CI_DATA[2] PCM_D[2]
R1918 CI_DATA[3] PCM_D[3]
/PCM_CD
47
PCM_D[0-7]
CI_DATA[4] AR1908 PCM_D[4]
33
CI_DATA[5] PCM_D[5]
CI_DATA[6] PCM_D[6]
CI_DATA[7] PCM_D[7]
CI POWER ENABLE CONTROL
PCM_D[0-7]
CI_DATA[0-7]
+5V_CI_ON
+5V_Normal Q1902 L1902 AR1912
RSR025P03 BLM18PG121SN1D 33
S CI_ADDR[8] PCM_A[8]
D
CI_ADDR[9] PCM_A[9]
CI_ADDR[10] PCM_A[10]
C1907
C1910
0.1uF
R1923 C1912
0.1uF G 10K CI_ADDR[11] PCM_A[11]
0.1uF
16V C1911 16V
R1914 OPT
4.7uF 16V
R1912 22K 16V
10K
OPT AR1913
OPT 33
R1922 REG /PCM_REG
2.2K
C
R1913
R1911 10K AR1909
B Q1901
PCM_5V_CTL 33
2SC3052 CI_OE /PCM_OE
0
R1924 E CI_WE /PCM_WE
10K CI_IORD /PCM_IORD
CI_IOWR /PCM_IOWR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. PCMCI 45

NON ETHERNET
TP2101 EPHY_RXD0
TP2102 EPHY_RXD1
TP2103 EPHY_TXD1
EPHY_TXD0
TP2104
TP2105 EPHY_REFCLK
TP2106 EPHY_CRS_DV
EPHY_MDIO
TP2107
TP2108 ET_RXER
TP2109 /RST_PHY
EPHY_MDC
TP2110
EPHY_EN
TP2111

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. NON ETHERNET 48

NON Motion Remocon Region
TP2501 M_REMOTE_RX
TP2502 M_REMOTE_TX
TP2503 RF_RESET
TP2504 RF_ENABLE

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. NON M REMOCON 50

China HOTEL Option
Chinese Hotel Option

+24V
P3401
12505WS-09A00
HOTEL_OPT
R3404 0
1
HOTEL_OPT
C3401
0.1uF
HOTEL_OPT 2
AUDIO_R 3
+3.3V_Normal
4
HOTEL_OPT
R3403 0 5
AMP_RESET_N
R3402
10K
HOTEL_OPT 6
AMP_MUTE_HOTEL
C Q3401
RT1C3904-T112
R3401 200 B HOTEL_OPT 7
AMP_MUTE_HOTEL
HOTEL_OPT HOTEL_OPT
E R3406 0 8
SPK_R+_HOTEL
HOTEL_OPT
R3405 0 9
SPK_R-_HOTEL
CLOSE TO THE EARPHONE 10

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. CHINA HOTEL 51

/PIF_SPI_CS
R6001 0
CHB_CVBS_IN

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. NON CHB 68


32LE3300 Diagram

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32LE3300 Diagram

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Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 32LE3300 32LE3300-ZA

P/NO : MFL62863042 (1010-REV01) Printed in Korea

PRODUCT SAFETY ................................................................................. 3

ADJUSTMENT INSTRUCTION ................................................................ 8

EXPLODED VIEW .................................................................................. 16

SCHEMATIC CIRUIT DIAGRAM ................................................................

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Before returning the receiver to the customer, AC Volt-meter

always perform an AC leakage current check on the exposed

1. Application range 3. Test method

4. Component Video Input (Y, CB/PB, CR/PR)

Case1 : Software version up (6)

1. After downloading S/W by USB, TV set will reboot

3. Main PCB check process

* Boot file Download

<Caution> Using ‘power on’ button of the Adjustment R/C,

* ADC Calibration Protocol (RS232)

* Connecting picture of the measuring instrument

* After done all adjustments, Press “In-start” button and

* Auto-control interface and directions

2) FHD HDMI EDID data

* Edid data and Model option download (RS232) 10 ⓒ 01 03 80 73 41 78 0A CF 74 A3 57 4C B0 23

Download A A 0 0 When transfer the ‘Mode In’, 40 45 00 7E 8A 42 00 00 1E 01 1D 00 72 51 D0 1E 20

Cont rol si gnal Volta ge

- Adjust sequence CMD : A0h

4) Check the model name Instart menu -> Factory name

Only for training and service purposes

Copyright © 2010 LG Electronics. Inc. All rights reserved.

Mini LVDS Data L(6 bit)

LGE Internal Use Only

NC_1 NC_29 LGE107D (S7M Divx_Non RM)

L : 8 bit 4 45 AR101 S7M_DIVX

PCM_D1 GPIO145/TCON2 5V_DET_HDMI_2

PCM_A[0] GPIO37/UART3_TX WIRELESS_DL_TX

ALE I/O3 PCM_A[3] AUD_MASTER_CLK

E 22 27 /PCM_REG PCM_REG_N PM_SPI_WP1/GPIO13/PM7 /FLASH_WP

HDCP EEPROM +3.3V_Normal

4.7K 0.1uF AF2

2 R127 4.7K AF3

VSS 4 SDA NC_51 NC_46 FRC_DDR3_ODT/DDR2_BA1

R129 22 I2C_SDA NC_49 RLV0N/LHSYNC

8pF 8pF AD6

OPT OPT AF12

AB16 AB16 AB16

Y16 Y16 Y16

Y11 AA16 Y11 AA16 Y11 AA16

Y10 Y10 Y10

AB15 AB15 AB15

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

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PIN NO. HIGH LOW

VDD33_T/VDDP/U3_VD33_2:47mA VDDC_2 GND_2

BLM18PG121SN1D H14 H18

DDC_SCL_2 X201 VDD33_DVI:163mA

D5 24MHz +3.3V_Normal VDD33_DVI AVDD_DMPLL J7 M14

DSUB_HSYNC R4025 22 HSYNC0 LINE_IN_1L AV_L_IN VDDP_1 GND_62

R229 68 C205 0.047uF L3 P5 C4060 2.2uF L212 L219 T12

SOGIN0 LINE_IN_5L FRC_AVDD_RSDS_1 GND_70

SC1_FB VSYNC1 LINE_OUT_0L BT_LOUT FRC_AVDD FRC_AVDD GND_74

NON_EU R5 C235 2.2uF W14 V9