® VNQ660SP

QUAD CHANNEL HIGH SIDE SOLID STATE RELAY

TYPE RDS(on) IOUT VCC

VNQ660SP 50mΩ (*) 6A 36 V

(*) Per each channel

■ OUTPUT CURRENT PER CHANNEL: 6A 10

■ CMOS COMPATIBLE INPUTS
■ OPEN LOAD DETECTION (OFF STATE) 1

■ UNDERVOLTAGE & OVERVOLTAGE PowerSO-10™

nSHUT- DOWN ORDER CODES
■ OVERVOLTAGE CLAMP
PACKAGE TUBE T&R
■ THERMAL SHUT-DOWN
PowerSO-10™ VNQ660SP VNQ660SP13TR
■ CURRENT LIMITATION

■ VERY LOW STAND-BY POWER DISSIPATION

■ PROTECTION AGAINST:

nLOSS OF GROUND & LOSS OF VCC using| STMicroelectronics VIPower

Technology, intended for driving resistive or
M0-3

■ REVERSE BATTERY PROTECTION (**) inductive loads with one side connected to ground.
This device has four independent channels. Built-
in thermal shut down and output current limitation
DESCRIPTION protect the chip from over temperature and short
The VNQ660SP is a monolithic device made by circuit.
ABSOLUTE MAXIMUM RATING
Symbol Parameter Value Unit
VCC Supply voltage (continuous) 41 V
-VCC Reverse supply voltage (continuous) -0.3 V
IOUT Output current (continuous), per each channel Internally limited A
IR Reverse output current (continuous), per each channel -15 A
IIN Input current +/- 10 mA
ISTAT Status current +/- 10 mA
IGND Ground current at TC<25°C (continuous) -200 mA
Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF)
- INPUT 4000 V
VESD - STATUS 4000 V
- OUTPUT 5000 V
- VCC 5000 V
Maximum Switching Energy
EMAX 101 mJ
(L=1.46mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=10A)
Ptot Power dissipation at TC=25°C 113.6 W
Tj Junction operating temperature -40 to 150 °C
Tstg Storage temperature -65 to 150 °C
EC Non repetitive clamping energy at TC=25°C 150 mJ

(**) See application schematic at page 8

Rev. 2
July 2004 1/19
VNQ660SP

BLOCK DIAGRAM

VCC

OVERVOLTAGE
UNDERVOLTAGE

DEMAG 1
DRIVER 1
OUTPUT 1
ILIM1
INPUT 1

DEMAG 2
INPUT 2 DRIVER 2
OUTPUT 2
ILIM2
INPUT 3 LOGIC
DEMAG 3
INPUT 4 DRIVER 3
OUTPUT 3
ILIM3
STATUS STATUS
DEMAG 4
DRIVER 4
OVERTEMP. 1 OUTPUT 4
ILIM4
OVERTEMP. 2

OVERTEMP. 3 OPEN LOAD

OFF-STATE
OVERTEMP. 4

GND

CURRENT AND VOLTAGE CONVENTIONS

IS

VF1 (*)
IIN1 IOUT1 VCC
INPUT 1 VCC OUTPUT 1
IIN2 IOUT2 VOUT1
VIN1
INPUT 2 OUTPUT 2
VIN2 IIN3 IOUT3 VOUT2

INPUT 3 OUTPUT 3
VOUT3
VIN3 IIN4 IOUT4
INPUT 4 OUTPUT 4
VIN4 STATUS GND VOUT4

VSTAT ISTAT IGND

(*) VFn = VCCn - VOUTn during reverse battery condition

2/19
 VNQ660SP

CONFIGURATION DIAGRAM (TOP VIEW) & SUGGESTED CONNECTIONS FOR UNUSED AND N.C.
PINS

STATUS 6 5 GND
INPUT 4 7 4 OUTPUT 4
INPUT 3 8 3 OUTPUT 3
INPUT 2 9 2 OUTPUT 2
INPUT 1 10 OUTPUT 1
1

11
VCC

Connection / Pin Status N.C. Output Input

Floating X X X X
To Ground X Through 10KΩ resistor

THERMAL DATA
Symbol Parameter Value Unit
Rthj-case Thermal resistance junction-case (MAX) (all channels on) 1.1 (1) 52 (2) °C/W
Rthj-amb Thermal resistance junction-ambient (MAX) 51.1 (1) 33 (2) °C/W
(1)
When mounted on a standard single-sided FR-4 board with 1cm² of Cu (at least 35 µm thick). Horizontal mounting and no artificial air flow.
(2)
When mounted on a standard single-sided FR-4 board with 6cm² of Cu (at least 35 µm thick). Horizontal mounting and no artificial air flow.
ELECTRICAL CHARACTERISTICS (V CC=6V up to 24V; -40°C<Tj<150°C unless otherwise specified)
POWER (per each channel)
Symbol Parameter Test Conditions Min Typ Max Unit
VCC (**) Operating supply voltage 6 13 36 V
VUSD (**) Undervoltage shutdown 3.5 4.6 6 V
VUVhyst (**) Undervoltage hysteresis 0.2 1 V
VOV (**) Overvoltage shutdown 36 V
VOVhyst (**) Overvoltage hysteresis 0.25 V
Off state; Input=0V; VCC=13.5V 12 40 µA
Off state; Input=0V; VCC=13.5V
IS (**) Supply current
Tj=25°C 12 25 µA
On state Input=3.25V; 9V<VCC<18V 6 12 mA
IOUT=1A; Tj=25°C; 9V<VCC<18V 40 50 mΩ
RDS(on) On state resistance IOUT=1A, Tj=150°C; 9V<VCC<18V 85 100 mΩ
IOUT=1A; VCC=6V 130 mΩ
IL(off1) Off state output current VIN=VOUT =0V 0 50 µA
IL(off2) Off State Output Current VIN=0V; VOUT =3.5V -75 0 µA
IL(off3) Off State Output Current VIN=VOUT =0V; VCC=13V; Tj =125°C 5 µA
IL(off4) Off State Output Current VIN=VOUT =0V; VCC=13V; Tj =25°C 3 µA

(**) Per device.

VCC - OUTPUT DIODE
Symbol Parameter Test Conditions Min Typ Max Unit
VF Forward on Voltage -IOUT =1.6A; Tj=150°C 0.6 V

3/19
 VNQ660SP

ELECTRICAL CHARACTERISTICS (continued)

SWITCHING (V CC=13V)
Symbol Parameter Test Conditions Min Typ Max Unit
td(on) Turn-on delay time RL=13Ω channels 1,2,3,4 40 70 µs
td(off) Turn-on delay time RL=13Ω channels 1,2,3,4 40 140 µs
See
dVOUT/dt(on) Turn-on voltage slope RL=13Ω channels 1,2,3,4 relative V/µs
diagram
See
dVOUT/dt(off) Turn-off voltage slope RL=13Ω channels 1,2,3,4 relative V/µs
diagram

PROTECTIONS (per each channel) (see note 1)

Symbol Parameter Test Conditions Min Typ Max Unit
TTSD Shutdown temperature 150 170 200 °C
TR Reset temperature 135 °C
Thyst Thermal hysteresis 7 15 25 °C
9V<VCC<36V 6 10 18 A
Ilim DC Short circuit current
6V<VCC<36V 18 A
Turn-off output voltage
Vdemag IOUT =2A; VIN=0V; L=6mH VCC-41 VCC-48 VCC-55 V
clamp
Status low output
VSTAT ISTAT =1.6mA 0.5 V
voltage
ILSTAT Status leakage current Normal operation; VSTAT=5V 10 µA
Status pin input
CSTAT Normal operation; VSTAT=5V 25 pF
capacitance
ISTAT =1mA 6 6.8 8 V
VSCL Status clamp voltage
ISTAT =-1mA -0.7 V

Note 1: To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used
together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.
LOGIC INPUT (per each channel)
Symbol Parameter Test Conditions Min Typ Max Unit
VIL Input Low Level Voltage 1.25 V
VIH Input High Level Voltage 3.25 V
VHYST Input Hysteresis Voltage 0.5 V
IIH Input high level voltage VIN=3.25V 10 µA
IIL Input Current VIN=1.25V 1 µA
CIN Input Capacitance 40 pF
Input Clamp Voltage IIN=1mA 6 6.8 8 V
VICL
IIN=-1mA -0.7 V

OPENLOAD DETECTION (off state) per each channel

Symbol Parameter Test Conditions Min Typ Max Unit
tSDL Status Delay (*) 20 µs
Openload Voltage
VOL VIN=0V 1.5 2.5 3.5 V
Detection Threshold
Openload Detection Delay
TDOL VCC=18V (*) 300 µs
at Turn Off

(*) See Figure 1

4/19
 VNQ660SP

ELECTRICAL TRANSIENT REQUIREMENTS

ISO T/R 7637/1 TEST LEVELS
I II III IV Delays and
Test Pulse Impedance
1 -25 V -50 V -75 V -100 V 2 ms 10 Ω
2 +25 V +50 V +75 V +100 V 0.2 ms 10 Ω
3a -25 V -50 V -100 V -150 V 0.1 µs 50 Ω
3b +25 V +50 V +75 V +100 V 0.1 µs 50 Ω
4 -4 V -5 V -6 V -7 V 100 ms, 0.01 Ω

ISO T/R Test Levels Result

7637/1
Test Pulse I II III IV
1 C C C C
2 C C C C
3a C C C C
3b C C C C
4 C C C C
5 C E E E

Class Contents
C All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure and cannot be
E
returned to proper operation without replacing the device.

SWITCHING CHARACTERISTICS

VLOAD

90%
80%

dVOUT/dt(on) dVOUT/dt(off)

10%
t

VIN
td(on) tr td(off)

5/19

1
VNQ660SP

TRUTH TABLE (per each channel)

CONDITIONS INPUT OUTPUT STATUS
L L H
Normal Operation
H H H
L L H
Current Limitation H X (Tj < TTSD) H
H X (Tj > TTSD) L
L L H
Overtemperature
H L L
L L X
Undervoltage
H L X
L L H
Overvoltage
H L H
L H L
Output Voltage > VOL
H H H
L L H
Output Current < IOL
H H L

Figure 1: Status timing waveforms

OPENLOAD STATUS TIMING OVERTEMP STATUS TIMING

VIN
VIN

VSTAT
VSTAT
tDOL tSDL tSDL tSDL

6/19

2
 VNQ660SP

Figure 2: Waveforms

NORMAL OPERATION
INPUTn
LOAD VOLTAGEn
STATUS

UNDERVOLTAGE
VCC VUSDhyst
VUSD
INPUTn
LOAD VOLTAGEn
STATUSn undefined

OVERVOLTAGE
VCC<VOV VCC>VOV
VCC
INPUTn
LOAD VOLTAGEn
STATUSn

OPENLOAD with external pull-up

INPUTn
LOAD VOLTAGEn
VOL
STATUSn

tDOL tDOL

OVERTEMPERATURE
Tj TTSD
TR

INPUTn
LOAD CURRENTn
STATUSn

7/19
VNQ660SP

APPLICATION SCHEMATIC

+5V +5V

VCC1,2
Rprot
STATUS

Dld
Rprot INPUT1

OUTPUT1

µC
Rprot INPUT2

OUTPUT2

Rprot
INPUT3 OUTPUT3

Rprot
INPUT4 OUTPUT4

GND

RGND
VGND DGND

Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2.

GND PROTECTION NETWORK AGAINST
REVERSE BATTERY
Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / (IS(on)max).
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on how many devices are ON in the case of
several high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT and STATUS lines are also
required to prevent that, during battery voltage transient,
the current exceeds the Absolute Maximum Rating.
Safest configuration for unused INPUT and STATUS pin
is to leave them unconnected.

8/19

LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating. The
same applies if the device will be subject to transients on
the VCC line that are greater than the ones shown in the
ISO T/R 7637/1 table.
µC I/Os PROTECTION:
If a ground protection network is used and negative
transient are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the µC I/Os pins to latch-up.
VNQ660SP
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
9/19
VNQ660SP

Off State Output Current High Level Input Current

IL(off1) (µA) Iih (µA)

10 7

9
Off state 6
8 Vcc=24V Vin=3.25V
Vout=0V 5
7

6
4
5
3
4

3 2

2
1
1

0 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)

Input Clamp Voltage Input High Level

Vicl (V) Vih (V)

8 3.6

7.8
3.4
Iin=1mA
7.6
3.2
7.4
3
7.2

7 2.8

6.8
2.6
6.6
2.4
6.4
2.2
6.2

6 2
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)

Input Low Level Input Hysteresis Voltage

Vil (V) Vhyst (V)

2.8 2

2.6 1.8

1.6
2.4
1.4
2.2
1.2
2
1
1.8
0.8
1.6
0.6
1.4
0.4

1.2 0.2

1 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)

10/19
 VNQ660SP

Overvoltage Shutdown ILIM Vs Tcase

Vov (V) Ilim (A)

54 20

52
17.5
50
15
48
12.5
46

44 10

42
7.5
40
5
38
2.5
36

34 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)

Turn-on Voltage Slope Turn-off Voltage Slope

dVout/dt(on) (V/ms) dVout/dt(off) (V/ms)

500 700

450
600
400 Vcc=13V Vcc=13V
Rl=13Ohm Rl=13Ohm
350 500

300
400
250
300
200

150 200

100
100
50

0 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)

On State Resistance Vs Tcase On State Resistance Vs V CC

RDS(on) (mOhm) RDS(on) (mOhm)

100 100

90 90
Iout=1A Iout=1A Tc=150ºC
80 80
Vcc=9V; 13V; 18V
70 70

60 60

50 50
Tc=25ºC
40 40

30 30 Tc= - 40ºC

20 20

10 10

0 0
-50 -25 0 25 50 75 100 125 150 175 8 9 10 11 12 13 14 15 16 17 18 19 20
Tc (ºC) Vcc (V)

11/19
VNQ660SP

Status Clamp Voltage Status Leakage Current

Vscl (V) Ilstat (µA)

8 0.05

7.8 0.045
Istat=1mA Vstat=5V
7.6 0.04

7.4 0.035

7.2 0.03

7 0.025

6.8 0.02

6.6 0.015

6.4 0.01

6.2 0.005

6 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)

Status Low Output Voltage Open Load Off State Voltage Detection Threshold

Vstat (V) Vol (V)

0.6 5

4.5
0.525
Vin=0V
Istat=1.6mA 4
0.45
3.5
0.375
3

0.3 2.5

2
0.225
1.5
0.15
1
0.075
0.5

0 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)

12/19
 VNQ660SP

PowerSO-10 Maximum turn off current versus load inductance

ILM AX (A)
100

10

B
C

1
0.01 0.1 1 10 100
L(mH )

A = Single Pulse at TJstart=150ºC

B= Repetitive pulse at T Jstart=100ºC
C= Repetitive Pulse at T Jstart=125ºC

Conditions:
VCC=13.5V
Values are generated with R L=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.

VIN, IL
Demagnetization Demagnetization Demagnetization

13/19
 VNQ660SP

PowerSO-10™ THERMAL DATA

PowerSO-10™ PC Board

Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8cm2).

Rthj-amb Vs. PCB copper area in open box free air condition

RTHjamb (ºC/W)
55

50

45

40

35

30

25

20
0 2 4 6 8 10
PCB Cu heatsink area (cm^2)

14/19
VNQ660SP

PowerSO-10 Thermal Impedance Junction Ambient Single Pulse

ZT H (°C /W)
1000

0.5 cm2
100
2 cm2

4 cm2

10 8 cm 2

0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
T ime (s)

Thermal fitting model of a single channel HSD Pulse calculation formula

in PowerSO-10 Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where δ = tp ⁄ T
Thermal Parameter
Area/island (cm2) 0.5 2 4 8
R1=R7=R9=R11
0.15
(°C/W)
R2=R8=R10=R12
0.5
(°C/W)
R3 ( °C/W) 0.4
R4 (°C/W) 10
R5 (°C/W) 15
R6 (°C/W) 26 14.5 10 6
C1=C7=C9=C11
0.0006
(W.s/°C)
C2=C8=C10=C12
0.0021
(W.s/°C)
C3 (W.s/°C) 0.02
C4 (W.s/°C) 0.5
C5 (W.s/°C) 1.5
C6 (W.s/°C) 5 10 14 18

15/19
VNQ660SP

PowerSO-10™ MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 3.35 3.65 0.132 0.144
A (*) 3.4 3.6 0.134 0.142
A1 0.00 0.10 0.000 0.004
B 0.40 0.60 0.016 0.024
B (*) 0.37 0.53 0.014 0.021
C 0.35 0.55 0.013 0.022
C (*) 0.23 0.32 0.009 0.0126
D 9.40 9.60 0.370 0.378
D1 7.40 7.60 0.291 0.300
E 9.30 9.50 0.366 0.374
E2 7.20 7.60 0.283 300
E2 (*) 7.30 7.50 0.287 0.295
E4 5.90 6.10 0.232 0.240
E4 (*) 5.90 6.30 0.232 0.248
e 1.27 0.050
F 1.25 1.35 0.049 0.053
F (*) 1.20 1.40 0.047 0.055
H 13.80 14.40 0.543 0.567
H (*) 13.85 14.35 0.545 0.565
h 0.50 0.002
L 1.20 1.80 0.047 0.070
L (*) 0.80 1.10 0.031 0.043
α 0º 8º 0º 8º
α (*) 2º 8º 2º 8º
(*) Muar only POA P013P

0.10 A B
10

H E E2 E E4

1
SEATING
PLANE

e B DETAIL "A"
A

0.25
C

D
h = D1 =
= =
SEATING
PLANE
A
F
A1
A1

L
DETAIL "A"

α
P095A

16/19

1
 VNQ660SP

PowerSO-10™ SUGGESTED PAD LAYOUT TUBE SHIPMENT (no suffix)

14.6 - 14.9
B CASABLANCA MUAR
10.8 - 11
C
6.30

A C
A

0.67 - 0.73
B
1 10 0.54 - 0.6
2 9

9.5 3 8 All dimensions are in mm.

4 7 1.27
5 6 Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1)
Casablanca 50 1000 532 10.4 16.4 0.8
Muar 50 1000 532 4.9 17.2 0.8

TAPE AND REEL SHIPMENT (suffix “13TR”)

REEL DIMENSIONS
Base Q.ty 600
Bulk Q.ty 600
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4

All dimensions are in mm.

TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 24
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 11.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm.

End

Start

Top No components Components No components

cover
tape 500mm min
Empty components pockets 500mm min
saled with cover tape.

User direction of feed

17/19

1
VNQ660SP

REVISION HISTORY
Date Revision Description of Changes
- Minor changes
- Current and voltage convention update (page 2).
- “Configuration diagram (top view) & suggested connections for unused and n.c.
pins” insertion (page 3).
Jul 2004 1 - 6 cm2 Cu condition insertion in Thermal Data table (page 3).
- VCC - OUTPUT DIODE section update (page 3).
- PROTECTIONS note insertion (page 4)
- Revision History table insertion (page 18).
- Disclaimers update (page 19).
Jul 2004 2 - Disclaimers update (page 19).

18/19

1
 VNQ660SP

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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 2004 STMicroelectronics - Printed in ITALY- All Rights Reserved.

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19/19