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22
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ET_RF C6407_RF
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J4502
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ESQUEMATICOS.COM
8 7 6 5 4 3 2 1
A FD0404
28 27 26 25 23 21 19 18 10 9
52 46 41 40 39 37 35 34 33 31
TP-P55 VDD_MAIN Note: Fiducial used as test point
FID
1 C0401 1 C0402 1 C0403 1 C0404 1 C0405 1 C0406 ROOM=TEST
FD0408 0P5SQ-SMP3SQ-NSP
220PF 220PF 100PF 56PF 18PF 4PF 1
5%
10V
5%
10V
5%
16V
5%
25V
2%
16V
+/-0.1PF
16V
FID ROOM=ASSEMBLY
2 C0G-CERM 2 C0G-CERM 2 NP0-C0G 2 NP0-C0G-CERM 2 CERM 2 NP0-C0G 0P5SM1P0SQ-NSP
01005 01005 01005 01005 01005 01005 1 FD0403
FID
ROOM=TEST 0P5SQ-SMP3SQ-NSP
1
4 CHASSIS_GND_BS402 FD0400 ROOM=ASSEMBLY
FID
1 C0407 1 C0408 1 C0409 1 C0410 1 C0411 1 C0412 TP0419
1 TP0424
1 0P5SQ-SMP3SQ-NSP FD0402
A A 1 FID
5%
220PF 220PF
5%
100PF
5% 5%
56PF
2%
18PF 4PF
+/-0.1PF
TP-P55
ROOM=TEST
TP-P55
ROOM=TEST
GND TP 0P5SQ-SMP3SQ-NSP
2 10V
10V
2 C0G-CERM 2 16V 2 25V
16V
2 CERM 2 16V ROOM=TEST 1
DFU
C0G-CERM NP0-C0G NP0-C0G-CERM NP0-C0G ROOM=ASSEMBLY
01005 01005 01005 01005 01005 01005
PMU_TO_AP_FORCE_DFU TP0414
1
4 CHASSIS_GND_BS403
20 12 A
TP-P55
ROOM=TEST FORCE DFU
1 C0417 1 C0418 1 C0419 1 C0420 1 C0421 1 C0422
C 5%
220PF
5%
220PF
5%
100PF
5%
56PF
2%
18PF 4PF
+/-0.1PF
E75 TP0402 C
2 10V 2 10V 2 16V 25V
2 NP0-C0G-CERM 2 16V 2 16V 90_TRISTAR_DP1_CONN_P 1
C0G-CERM C0G-CERM NP0-C0G CERM NP0-C0G 41 40 A
01005 01005 01005 01005 01005 01005 TP-P55
ROOM=TEST FD0407
FID
0P5SM1P0SQ-NSP
TP0403 1
1 1 90_TRISTAR_DP2_CONN_P TP0404
1
41 40
A
SH0400 SH0401 TP-P55
SM SM ROOM=TEST
90_TRISTAR_DP2_CONN_N TP0405
1
SHLD-EMI-UPPER-BK-D10 SHLD-EMI-UPPER-FRT-D10 41 40 A
TP-P55
ROOM=TEST
PP_TRISTAR_ACC1 TP0406
1
41 40 A
TP-P55
ROOM=TEST ACCESSORY ID AND POWER
1
SH0402
1
SH0403 PP_TRISTAR_ACC2 TP0407
1
41 40 A
SM SM TP-P55
ROOM=TEST
AMUX
PMU_AMUX_AY TP0413
1
20 A ANALOG MUX A OUTPUT
TP-P55
ROOM=TEST
1
R0413 #25244799
200K 100k to 200k
1%
1/32W
PMU_AMUX_BY TP0423
1
MF
2 01005
20 A ROOM=PMU ANALOG MUX B OUTPUT
TP-P55
ROOM=TEST
MOJAVE
BS0405 MESA_TO_BOOST_EN TP0400
1
STDOFF-2.56OD1.4ID.99H-SM
38 37 A
TP-P55
1 ROOM=TEST
PP_LCM_BL_CAT1_CONN TP0409
1 LCM BACKLIGHT SINK1 spare
CLIP-MLB-COAX-RETENTION-D10 45 39 A
TP-P55 DRAWING NUMBER SIZE
CL0401 1 ROOM=TEST
051-00419 D
Apple Inc.
TP0410
SM-SP
REVISION
PP_LCM_BL_CAT2_CONN 1
45 39 A LCM BACKLIGHT SINK2 R
8.0.0
TP-P55
ROOM=TEST NOTICE OF PROPRIETARY PROPERTY: BRANCH
TOP SIDE
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
PP_LCM_BL_ANODE_CONN 1 LCM BACKLIGHT SOURCE
45 39 A I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE 6 OF 53
TP-P55 II NOT TO REPRODUCE OR COPY IT
ROOM=TEST SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 6 OF 81
8 7 6 5 4 3 2 1
ESQUEMATICOS.COM
8 7 6 5 4 3 2 1
D D
BOOTSTRAPPING:BOARD REV
BOARD ID
BOOT CONFIG
NOSTUFFROOM=SOC
12 BOARD_REV3 R0509 1 2 1.00K PP1V8 7 8 9 11 12 13 16 17 18 25 29
39 46 47 48 52
01005 MF 5% 1/32W
NOSTUFFROOM=SOC
12 BOARD_REV2 R0505 1 2 1.00K
01005 MF 1/32W
5% BOARD_REV[3:0]
FLOAT=LOW, PULLUP=HIGH
12 BOARD_REV1 R0508 1ROOM=SOC 2 1.00K
01005 MF 1/32W 1111 Pre-Proto w/D520 (non enclosure)
5%
NOSTUFFROOM=SOC 1110 PROTO1
NOSTUFFROOM=SOC
11 BOARD_ID2 R0503 1 2 1.00K BOARD_ID[4:0]
0=EUREKA, 1=KAROO 01005 MF 1/32W FLOAT=LOW, PULLUP=HIGH
5%
NOSTUFF ROOM=SOC SELECTED --> 01000 D10 MLB
11 BOARD_ID1 R0501 1 2 1.00K 01001 D10 DEV
01005 MF 5% 1/32W 01010 D11 MLB
0=FORM FACTOR A, 1=FORM FACTOR B 01011 D11 DEV
01100 D101 MLB
BOARD_ID0=No connect 01101 D101 DEV
01110 D111 MLB
01111 D111 DEV
0=MLB, 1=DEV
0=FORM FACTOR A, 1=FORM FACTOR B
12 PP1V8 MAKE_BASE=TRUE
0=EUREKA, 1=KAROO
BOOT_CONFIG1=No connect
BOOT_CONFIG0=No connect
B B
BOOT_CONFIG[2:0]
FLOAT=LOW, PULLUP=HIGH
000 SPI0
001 SPI0 TEST MODE
010 NVME0_X2
011 NVME0 X2 TEST
SELECTED --> 100 NVME0 X1
101 NVME0 X1 TEST
110 SLOW SPI0 TEST
111 FAST SPI0 TEST
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
PP1V8 5 7 8 9 11 12 13 16 17 18 25 29
39 46 47 48 52
1 C0700
0.1UF
20%
2 6.3V
X5R-CERM
01005
ROOM=SOC
D D
FL0700 VDD11_XTAL:1.06-1.17V @TBD mA MAX
240-OHM-25%-0.20A-0.9DCR
PP1V1_XTAL 1 2 PP1V1 15 18
1 C0704 01005
ROOM=SOC 1 C0705
0.1UF
20%
2.2UF
20%
2 6.3V 2 6.3V
X5R-CERM X5R-CERM
01005 0201-1
ROOM=SOC ROOM=SOC
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 29
PP1V8 1 C0701 3.14-3.46V @20mA MAX
0.1UF
20%
6.3V
2 X5R-CERM
01005
ROOM=SOC
CKPLUS_WAIVE=PWRTERM2GND
PP0V9_SOC_FIXED 8 9 10 15 18
VDD11_XTAL CG50
VDD33_USB CG26
VDD_FIXED_USB CC25
VDD18_USB CE25
VDD12_UH1_HSIC0 CL20
VDD18_AMUX AJ60
C C
U0700
CAYMAN-2GB-20NM-DDR-M
CSP
SYM 1 OF 16
Dev ONLY
USB_DP CM26 90_USB_AP_DATA_P 40
CL31 JTAG_SEL USB_DM CL26 90_USB_AP_DATA_N 40
CL29 JTAG_TRST*
NC
CG37 JTAG_TDO
NC
NC
CJ35 JTAG_TDI USB_VBUS CH26 USB_VBUS_DETECT 21
BL3 TESTMODE
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
PP0V9_SOC_FIXED 7
D
9 10 15 18
BW55
CC49
CC53
CC62
CC47
VDD12_PCIE CE58
CE49
CA55
CA60
CE55
CE60
MF ROOM=SOC ROOM=SOC ROOM=SOC
1 0.1UF
1
C0805
2.2UF
C0801
0.1UF 2
20%
6.3V
01005
ROOM=SOC
20% 20% X5R-CERM
6.3V 6.3V 01005
VDD_FIXED_PCIE_REFBUF
VDD12_PCIE_REFBUF
VDD_FIXED_PCIE_CLK
VDD_FIXED_PCIE_ANA
2 X5R-CERM 2 X5R-CERM ROOM=SOC
0201-1 01005
ROOM=SOC ROOM=SOC
PP1V8 5 7 9 11 12 13 16 17 18 25 29
39 46 47 48 52
1
R0805 U0700
CAYMAN-2GB-20NM-DDR-M
100K CSP
5%
1/32W
MF
2 01005 SYM 2 OF 16
ROOM=SOC BC64
17 PCIE_NAND_BI_AP_CLKREQ_L PCIE_CLKREQ0* PCIE_CLKREQ3* BE66 PCIE_WLAN_BI_AP_CLKREQ_L 52
PCIE LINK 3
#24557655:replace with 20% caps. SI no negative impact
ROOM=SOC
X5R 01005
D10 NAND is now Gen3 (was Gen2). Caps intentionally 0.22uF
1 2 GND_VOID=TRUE
C0809
ROOM=SOC 20% 6.3V
0.22UF
X5R 01005
17 90_PCIE_AP_TO_NAND_TXD_P 90_PCIE_AP_TO_NAND_TXD_C_P CK44 PCIE_TX0_P PCIE_TX3_P CK63 90_AP_PCIE3_TXD_C_P 52
1 2 GND_VOID=TRUE
17 90_PCIE_AP_TO_NAND_TXD_N C0810
ROOM=SOC 20% 6.3V
0.22UF 90_PCIE_AP_TO_NAND_TXD_C_N CJ44 PCIE_TX0_N PCIE_TX3_N CJ63 90_AP_PCIE3_TXD_C_N 52
1
R0802
1
R0806
LINK0 LINK3 100K
100K 5%
5% 1/32W
1/32W MF
MF 2 01005
2 01005 ROOM=SOC
ROOM=SOC BG66
NC PCIE_CLKREQ1* PCIE_CLKREQ2* BE65 PCIE_BB_BI_AP_CLKREQ_L 52
PCIE LINK 2
WLAN RX PP's are now managed on Page 52
CK52 PCIE_RX1_P PCIE_RX2_P CK56 90_AP_PCIE2_RXD_C_P
NC 52
PCIE LINK 1
B B
LINK 1 USED ON AP_DEV ONLY
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
G13
G17
G10
G15
G19
G21
2 X5R-CERM 2 X5R-CERM 2 2
G6
X5R-CERM X5R-CERM
01005 0201-1 0201-1 01005
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
VDD_FIXED_MIPI
VDD18_MIPI
U0700
CAYMAN-2GB-20NM-DDR-M
CSP
NC
C24 MIPI0C_DPDATA2 ISP_I2C2_SCL U65 I2C_ISP_NH_SCL 48
NC
B24 MIPI0C_DNDATA2 ISP_I2C2_SDA U66 I2C_ISP_NH_SDA 48
C NC
A26 MIPI0C_DPDATA3 ISP_I2C3_SCL W64 NC
Dev ONLY R0906
C
NC
B26 MIPI0C_DNDATA3 ISP_I2C3_SDA W66 NC
1
33.2 2 AP_TO_UT_CLK 25
B22 NOSTUFF
90_MIPI_NH_TO_AP_CLK_P MIPI0C_DPCLK
45
90_MIPI_AP_TO_LCM_DATA1_N C5 MIPID_DNDATA1
1%
1/32W
MF
1 C0907
39
01005 100PF
ROOM=SOC 5%
2 35V
NC_MIPI_AP_TO_LCM_DATA2_P C9 MIPID_DPDATA2 SENSOR0_RST A50 AP_TO_UT_SHUTDOWN_L 25
NP0-C0G
01005
NC_MIPI_AP_TO_LCM_DATA2_N B9 MIPID_DNDATA2 SENSOR1_RST E50 NC_AP_TO_NV_SHUTDOWN_L D11/111 ONLY
D11/111 ONLY SENSOR2_RST AA65 AP_TO_NH_SHUTDOWN_L 29
Radar 20511449
NC_MIPI_AP_TO_LCM_DATA3_P A11 MIPID_DPDATA3 SENSOR3_RST AE64 TP_SENSOR3_RST 1 PP SM PP0902
P2MM-NSM <--- Needed for Cayman debug; this pin cannot be input
NC_MIPI_AP_TO_LCM_DATA3_N B11 MIPID_DNDATA3 SENSOR4_RST AC65 ROOM=SOC
NC
B 26
36
AP_TO_STROBE_DRIVER_HWEN
SPI_AP_TO_MAGGIE_CS_L
BN4
BR2
DISP_TOUCH_BSYNC0
DISP_TOUCH_BSYNC1
SENSOR0_XSHUTDOWN C50 NC
SENSOR1_XSHUTDOWN B48 AP_TO_MUON_BL_STROBE_EN 37
B
NC
BR4 DISP_TOUCH_EB MIPI1C_REXT E16
A 53
28 27 26 25 23 21 19 18 10 4
52 46 41 40 39 37 35 34 33 31
PP_VDD_MAIN SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
1 C0904
220PF
1 C0905
220PF
1 C0908
220PF
1 C0909
220PF
1 C0910
220PF
spare
DRAWING NUMBER SIZE
5% 5% 5% 5% 5%
2 10V
C0G-CERM 2 10V
C0G-CERM
10V
2 C0G-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM Apple Inc. 051-00419 D
01005 01005 01005 01005 01005 REVISION
ROOM=SOC
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
R
8.0.0
AC return path for LCM MIPI which is referenced to GND and VDD_MAIN NOTICE OF PROPRIETARY PROPERTY: BRANCH
Radar 21203307 THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
6 OF 53
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 6 OF 81
8 7 6 5 4 3 2 1
ESQUEMATICOS.COM
8 7 6 5 4 3 2 1
D D
VDD12_PLL_LPDP:1.14-1.26V @3mA MAX
PP1V2_SOC VDD12_LPDP:1.14-1.26V @60mA MAX
1 C1013 1 C1001 1 C1004 1 C1005 1 C1002 CKPLUS_WAIVE=PWRTERM2GND
CKPLUS_WAIVE=PWRTERM2GND
CKPLUS_WAIVE=PWRTERM2GND
2.2UF 2.2UF 0.1UF 0.01UF 15PF
20% 20% 20% 10% 5%
6.3V 6.3V 6.3V 6.3V 16V
2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R 2 NP0-C0G-CERM
G25
G28
G30
G55
G58
G60
G62
VDD12_PLL_LPDP G23
0201-1 0201-1 01005 01005 01005
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
Desense for Wifi frequencies
VDD12_LPDP_TX
VDD12_LPDP_RX
U0700
CAYMAN-2GB-20NM-DDR-M
CSP
25 90_LPDP_UT_TO_AP_D0_P A54 LPDPRX_RX_D0_P LPDP_TX0P B27 NC
90_LPDP_UT_TO_AP_D0_N SYM 4 OF 16 Dev ONLY
25
B54 LPDPRX_RX_D0_N LPDP_TX0N C27 NC
25
90_LPDP_UT_TO_AP_D1_P B56 LPDPRX_RX_D1_P LPDP_TX1P A29 NC
25 90_LPDP_UT_TO_AP_D1_N C56 LPDPRX_RX_D1_N LPDP_TX1N B29 NC
C C
LPDP Lanes swapped between D10 and D11
D11/111 ONLY
46
NC_90_LPDP_NV_TO_AP_D3_P B63 LPDPRX_RX_D3_P LPDP_TX3P A33 NC
46 NC_90_LPDP_NV_TO_AP_D3_N C63 LPDPRX_RX_D3_N LPDP_TX3N B33
A64 LPDPRX_RX_D4_P
GND ON MLB; other on Dev B64 LPDPRX_RX_D4_N
R1001 1
300
1%
1/32W
MF
01005-1 2
ROOM=SOC B57 LPDPRX_RCAL_N
AP_LPDPRX_RCAL_NEG
C1006 1
D57 LPDPRX_EXT_C
100PF NC
5%
16V
NP0-C0G 2
01005
ROOM=SOC
#24401637:Unconnect LPDPRX_EXT_C
A 53
28 27 26 25 23 21 19 18 9 4
52 46 41 40 39 37 35 34 33 31
PP_VDD_MAIN
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
1 C1010 1 C1011 spare
33PF 33PF
5% 5% DRAWING NUMBER SIZE
2 16V 2 16V
NP0-C0G-CERM
01005
NP0-C0G-CERM
01005 Apple Inc. 051-00419 D
ROOM=SOC ROOM=SOC REVISION
AC return path for LCM LPDP which is referenced to GND and VDD_MAIN
R
8.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
R1103
33.2 BV65
32 I2S_AP_TO_CODEC_MCLK 1 2 I2S_AP_TO_CODEC_MCLK_R I2S0_MCK I2C0_SCL CK7 I2C0_AP_SCL 47
1%
1/32W
32 I2S_AP_TO_CODEC_MSP_BCLK BY66 I2S0_BCLK U0700 I2C0_SDA CG12 I2C0_AP_SDA 47
I2C2_SCL U3 I2C2_AP_SCL 47
I2S1/2/3 MCLK NC #24559456 D48 I2S1_MCK I2C2_SDA U4 I2C2_AP_SDA
NC 47
BU66 I2S2_MCK
NC
I2S_MAGGIE_TO_AP_L26_CODEC_BCLK BR66 I2S2_BCLK
36 35 34 33 32
53
I2S_BB_TO_AP_BCLK
I2S_BB_TO_AP_LRCLK CK9
I2S3_BCLK
I2S3_LRCK SPI4_MOSI CM9NC C
53 I2S_BB_TO_AP_DIN CG18 I2S3_DIN
53 I2S_AP_TO_BB_DOUT CJ9 I2S3_DOUT
I2C5_SCL CH16 I2C5_SCL 11 47
DWI_DO AM64
ROOM=SOC
C44 DWI_PMGR_TO_BACKLIGHT_DATA 37
SPI_TOUCH_TO_AP_MISO SPI2_MISO
R1101 39
B 38
38
SPI_AP_TO_MESA_MOSI
SPI_AP_TO_MESA_SCLK
A42
E44
SPI3_MOSI
SPI3_SCLK
CLK32K_OUT AM66 AP_TO_CUMULUS_CLK32K 39
B
MESA_TO_AP_INT C42 NAND_SYS_CLK BN66 AP_TO_NAND_SYS_CLK_R 0.00
38 SPI3_SSIN 1 2 AP_TO_NAND_SYS_CLK 17
R1118 0%
1/32W
MF
01005
ROOM=SOC
I2C5
See Radar#25316444 for Details
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 29
PP1V8
1
C1101
A1
1.0UF
20% VCC
6.3V
2 X5R I2S_AP_TO_CODEC_MCLK I2S_AP_TO_CODEC_MCLK_R
I2S_AP_TO_CODEC_MSP_BCLK
I2C0_AP_SCL
I2C0_AP_SDA
0201-1
ROOM=SOC U1101 I2S_AP_TO_CODEC_MSP_LRCLK
I2S_CODEC_TO_AP_MSP_DIN I2C1_AP_SCL
I2S_AP_TO_CODEC_MSP_DOUT I2C1_AP_SDA
B1 A2 I2C5_SDA
A SCL WLCSP SDA
I2C5_SCL
11 47
I2S_AP_TO_BT_LRCLK
11 47 To Cayman
I2S_BT_TO_AP_DIN
I2S_AP_TO_BT_LRCLK
I2C2_AP_SCL
I2C2_AP_SDA
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
I2S_AP_TO_BT_LRCLK I2C3_AP_SCL
I2S_BT_TO_AP_DIN I2C3_AP_SDA
PAGE TITLE
VSS
ROOM=SOC
I2S_AP_TO_BT_DOUT
I2S_MAGGIE_TO_AP_L26_CODEC_BCLK spare
B2
CRITICAL I2S_MAGGIE_TO_AP_L26_CODEC_BCLK
I2S_MAGGIE_TO_AP_DIN DRAWING NUMBER SIZE
I2S_MAGGIE_TO_AP_L26_CODEC_BCLK
I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK
I2S_AP_TO_MAGGIE_DOUT
I2S_MAGGIE_TO_AP_DIN Apple Inc. 051-00419 D
I2S_AP_TO_MAGGIE_DOUT REVISION
I2S_BB_TO_AP_BCLK
I2S_BB_TO_AP_BCLK
I2S_BB_TO_AP_BCLK
R
8.0.0
I2S_BB_TO_AP_BCLK
I2S_BB_TO_AP_LRCLK I2C5_SCL NOTICE OF PROPRIETARY PROPERTY: BRANCH
I2S_BB_TO_AP_DIN I2C5_SCL
I2C5_SDA
I2S_AP_TO_BB_DOUT I2C5_SDA
I2C5_SCL THE INFORMATION CONTAINED HEREIN IS THE
I2C5_SCL
I2C5_SDA PROPRIETARY PROPERTY OF APPLE INC.
BOARD_ID2 I2C5_SDA THE POSESSOR AGREES TO THE FOLLOWING: PAGE
BOARD_ID2
BOARD_ID2
BOARD_ID2
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
6 OF 53
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 6 OF 81
8 7 6 5 4 3 2 1
ESQUEMATICOS.COM
8 7 6 5 4 3 2 1
D D
BB64 GPIO_0
NC
27 AP_TO_ACC_BUCK_VSEL BC65 GPIO_1 U0700
36 AP_TO_MAGGIE_CRESETB_L BB66 GPIO_2 CAYMAN-2GB-20NM-DDR-M
#24557547:Delete R1204 44 20 BUTTON_VOL_UP_L AY65 GPIO_3 CSP
DEV ONLY AY66 GPIO_4
NC
53 AP_TO_BB_RESET_L AV65 GPIO_5 SYM 5 OF 16 TMR32_PWM0 AG2 NC
36 MAGGIE_TO_AP_CDONE AV67 GPIO_6 TMR32_PWM1 AH4 PROX_BI_AP_AOP_INT_PWM_L 13 29
RESERVERD FOR SSHB ID ON DEV BOARD AT67 GPIO_7 TMR32_PWM2 AH3 NC_BB_TO_AP_RESET_ACT_L D101/D111 ONLY
D101/D111 ONLY NC_AP_TO_BB_IPC_GPIO2 AT66 GPIO_8
AT64 UART0_RXD CL5
C D101/D111 ONLY
53
NC_AP_TO_GNSS_WAKE
AP_TO_BB_TIME_MARK AP66
GPIO_9
GPIO_10 UART0_TXD CJ7
UART_AP_DEBUG_RXD
UART_AP_DEBUG_TXD
40
40
C
D101/D111 ONLY NC_AP_TO_GNSS_TIME_MARK AP65 GPIO_11
53 BB_TO_AP_RESET_DETECT_L AH64 GPIO_12 UART1_CTS* E39 UART_BT_TO_AP_CTS_L 53
29 25 18 17 16 13 11 9 8 7 5 PP1V8 33 AP_TO_SPKAMP2_RESET_L
AE4 GPIO_13 UART1_RTS* D39 UART_AP_TO_BT_RTS_L 53
52 48 47 46 39
1
NOSTUFF 29 ALS_TO_AP_INT_L
AC3 GPIO_14 UART1_RXD C39 UART_BT_TO_AP_RXD
R1210
53
#25120460:REQUEST_DFU Assignment
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
SOC - AOP
D D
PP1V8
5 7 8 9 11 12 16 17 18 25 29 39
46 47 48 52
NOSTUFF
1
R1304
1.00K
5%
U0700 1/32W
MF
01005
CAYMAN-2GB-20NM-DDR-M 2
CSP ROOM=SOC
CM16 SYM 7 OF 16
20 AOP_TO_PMU_SLEEP1_REQUEST AOP_DDR_REQ CFSB_AOP CH35 PMU_TO_SYSTEM_COLD_RESET_L 7 20
C 24 SPI_AOP_TO_PHOSPHORUS_CS_L CK20
CJ31
AOP_FUNC_6
AOP_SWD_TCK_OUT CL14 SWD_AP_TO_MANY_SWCLK 17 36 53
C
53 39 23 20 LCM_TO_MANY_BSYNC AOP_FUNC_7
TRISTAR_TO_AOP_INT CK27 AOP_FUNC_8
40
AOP_SWD_TMS0 CL16 HOMER_TO_AOP_WAKE_INT
AOP_TO_MAGGIE_EN CK24 AOP_FUNC_9
36
36
AOP_SWD_TMS1 CG35 SWD_AOP_BI_BB_SWDIO BB_SWDIO has pullup in Radio_MLB pages
PHOSPHORUS_TO_AOP_INT_L CK29 AOP_FUNC_10
53
24
SWD_TMS2 BU4 SWD_AP_BI_NAND_SWDIO
SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L CK22 AOP_FUNC_11
17
24
SWD_TMS3 BV3 SWD_AP_BI_HOMER_SWDIO
24 BOT_ACCEL_GYRO_TO_AOP_DATARDY CM12 AOP_FUNC_12
36
B R1303 32
32
I2S_CODEC_XSP_TO_AOP_BCLK
I2S_CODEC_XSP_TO_AOP_DIN
CL35
CJ39
AOP_I2S_BCLK
AOP_I2S_DIN
B
33.2 CM35
36 35 34 33 I2S_AOP_TO_MAGGIE_L26_MCLK 1 2 I2S_AOP_TO_MAGGIE_L26_MCLK_R AOP_I2S_MCK
1% 32 I2S_CODEC_XSP_TO_AOP_LRCLK CK37 AOP_I2S_LRCK DOCK_ATTENTION CG41 AOP_TO_SPKAMP1_ARC_RESET_L 34 35
1/32W
MF CG39
01005 32 I2S_AOP_TO_CODEC_XSP_DOUT AOP_I2S_DOUT DOCK_CONNECT CL37 MESA_TO_AOP_FDINT 38
ROOM=SOC
DOCK_CONNECT can be GPIO, but input only. Radar 21680759
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
|-
1 AU19
--
AW60 CA25
|||
7.5UF 7.5UF 7.5UF 10UF VDD_CPU_SRAM
|||
AW8
|-
20% 20% 20% 20% BD25
-|
2 6.3V CA30
||=
4V 4V 4V BA15
=
CERM CER CERM CERM-X5R BD30 CA34
0402 0402 0402 0402-9 BA19
1 3 1 3 ROOM=SOC BD34 CA38
1 3
B 2 4 2 4
BH8
BD38 CA43 B
2 4 BD43 CA47
BD47 CE13
BD51 CE17
AF43
BD55 CE45
AF47
BD6 J13
AF51
BD60 J21
P17 VDD_CPU_SENSE BK23 AP_VDD_CPU_SENSE 20 BF28 J34
P21
P25 VSS_CPU_SENSE BK21 TP_AP_VSS_CPU_SENSE 1 SM PP1403 1
SM
PP PP1408
P2MM-NSM
BF32 P55
PP
P2MM-NSM BF36 T10
P30 ROOM=SOC
ROOM=SOC
BF45 T60
P34 VDD_GPU_SENSE AJ45 AP_VDD_GPU_SENSE 20 BF49 V30
P38
1.03V @1.44A MAX P43 VDD_SOC_SENSE AL47 TP_VDD_SOC_SENSE 1 PP1410 1
SM
PP PP1409
P2MM-NSM
BF53 Y10
0.92V @1.50A MAX VDD_GPU_SRAM PP SM
P2MM-NSM BF58 Y36
0.80V @TBD A MAX P47 ROOM=SOC
ROOM=SOC
BK28 Y60
PP_GPU_SRAM_VAR
P51 VSS_SENSE AJ47 TP_VSS_SENSE 1
PP SM PP1411
P2MM-NSM BK32 BF40
18
Y15 ROOM=SOC BK36 J60
Y19
ROOM=SOC ROOM=SOC BK40 AW25
Y23
C1439 C1437 1 C1459 Y40
7.5UF 7.5UF 10UF
20% 20% 20% Y45
4V 4V 2 6.3V
CER CERM CERM-X5R Y49
0402 0402 0402-9
1 3 ROOM=SOC Y53
1 3
2 4
2 4
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
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DRAWING NUMBER SIZE
=| ||| |-
2 4 2 4 2 4 AF30 BM30 1.06 - 1.17V @4mA MAX 100OHM-25%-0.12A
-- -| --
- - ||-
VDDIO11_PLL_DDR0 CE8 PP1V1_DDR_PLL 1 2 PP1V1
- | ||||| |||||-
AF34 BM34 7 15 18
||| |||| -
BW60
- - |- ||
AF38 BM38 VDDIO11_PLL_DDR1 01005
||- |- | |==
C1508 C1509 C1523 C1510 ROOM=SOC
- | - ||
J8
||
VDDIO11_PLL_DDR2 1 1 1 1
- | |-
AF62 BM43
- - ||-
P58
- - ||-
AJ58 BM47 BE67 VDDIO11_PLL_DDR3 0.22UF 0.22UF 0.22UF 0.22UF
|-
20% 20% 20% 20%
AL25 BM51 BH60 2 6.3V 2 6.3V 2 6.3V 2 6.3V
1 C1501 AL30 BP10 BJ67
X5R
01005-1
ROOM=SOC
X5R
01005-1
ROOM=SOC
X5R
01005-1
ROOM=SOC
X5R
01005-1
ROOM=SOC
10UF AL34 BP60 BK62
20%
2 6.3V AL38 BW15 BL67
CERM-X5R
0402-9 AL43 BW19 BM60 VDDIO11_DDR1
ROOM=SOC
C AL51
AL55
BW23
BW28
BP62
BT60 CG3
(CURRENT INCLUDED IN VDD2) C
VDDIO11_RET_DDR0 PP1V1_SDRAM 15 18 19
AL60 BW32 BW62 VDDIO11_RET_DDR1 CD65
AR60 BW36 CD67 VDDIO11_RET_DDR2 H4
AU28 BW40 CH67 VDDIO11_RET_DDR3 H64
AU32 BW45
AU36 BW49
AU40 BW53
AU45 BW58 DDR0_SYS_ALIVE CF4 SYSTEM_ALIVE
VDD_FIXED VDD_FIXED 17 20 21
AU49 BW8 DDR1_SYS_ALIVE CB64
AU53 CC10 DDR2_SYS_ALIVE H3
AB8
AU58 CC15 DDR3_SYS_ALIVE H65
AC1
AU6 CC19
AE1
BA28 CC23
AH1
BA32 CC28
E1
BA36 CC32 AM3
K1 VDDIO11_DDR2
BA40 CC45 AM65
L6
BA45 G32 BB3
P8
BA49 G36 BB65
T6
BA53 J17 BR1
V8
BA58 J23 BR67
Y6
BH25 J55 BV1
BH30 J62 BV67
BH34 L10 BY1
BH38 L58 BY67
BH43 L60 C2 1.06 - 1.17V @1.74A MAX
PP1V1_SDRAM
B BH47 T32 C66
B
15 18 19
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
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DRAWING NUMBER SIZE
=| ||| |-
-- -| --
CAYMAN-2GB-20NM-DDR-M CAYMAN-2GB-20NM-DDR-M CAYMAN-2GB-20NM-DDR-M CAYMAN-2GB-20NM-DDR-M
A2 AL32 B35 BM15 CA23 CH54 D24 L47 1
C1615 1
C1605 1
C1608 1
C1612 BB1
- - ||-
CAYMAN-2GB-20NM-DDR-M
- | ||||| |||||-
CSP CSP CSP CSP 2.2UF 2.2UF 2.2UF 2.2UF
||| |||| -
A20 AL36 B41 BM19 CA28 CH56 D26 L51 BB67 CSP
- - |- ||
20% 20% 20% 20%
||- |- | |==
A24 AL40 B46 BM23 CA32 CH59 D27 L55 6.3V 6.3V 6.3V 6.3V C3 VDD1
- | - ||
||
SYM 16 OF 16 2 2 2 2
- | |-
D
SYM 13 OF 16 SYM 14 OF 16 SYM 15 OF 16 X5R-CERM X5R-CERM X5R-CERM X5R-CERM
- - ||-
SYM 12 OF 16
D CA36
A27 AL45 B52 BM28 CH61 D29 L62 0201-1 0201-1 0201-1 0201-1 C65
- - ||-
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
|-
A31 AL53 B65 BM32 CA40 CH63 D3 L8 CK3
A35 AL58 B67 BM36 CA45 CH64 D31 M1 CK65
A5 AL62 BA13 BM40 CA49 CH65 D35 M2
A52 AN13 BA17 BM45 CA53 CH66 D4 M3
A56 AN17 BA21 BM49 CA58 CH7 D41 M4 CKPLUS_WAIVE=PWRTERM2GND
1.62-1.98V @43mA MAX CKPLUS_WAIVE=PWRTERM2GND
A59 AN21 BA30 BM53 CA6 CH9 D46 M64 PP1V8 AJ62 VDD18_EFUSE1 CG7
=| ||| |-
-- -| --
29 25 18 17 13 12 11 9 8 7 5
52 48 47 46 39
A63 AN25 BA34 BM58 CA62 CJ1 D5 M65
- - ||-
AN62 VDD18_EFUSE2 G34
- | ||||| |||||-
1
C1602 C1607 C1610 C1614
||| |||| -
A66 AN30 BA38 BM6 CB1 CJ3 D52 M66 1 1 1 AU62
- - |- ||
VDDIO18_GRP1
||- |- | |==
A9 AN34 BA43 BM62 CB3 CJ4 D56 M67 10UF 2.2UF 2.2UF 2.2UF BA62
- | - ||
||
20%
- | |-
20% 20% 20%
- - ||-
AA1 AN38 BA47 BN1 CB66 CJ41 D59 P10 6.3V 6.3V 6.3V 6.3V BF62
- - ||-
2 CERM-X5R 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM
|-
AA67 AN43 BA51 BN67 CB67 CJ42 D63 P15 0402-9 0201-1 0201-1 0201-1
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
AB10 AN47 BA55 BP13 CC13 CJ46 D65 P19 G40
AB15 AN51 BA60 BP17 CC17 CJ5 D67 P23 G45
AB19 AN55 BA8 BP21 CC21 CJ50 D7 P28 G49 VDDIO18_GRP2
AB23 AN60 BC1 BP25 CC30 CJ54 D9 P32 G53
AB28 AN8 BC2 BP30 CC34 CJ57 E12 P36
=| ||| |-
-- -| --
AB32 BP34 CC38 CJ61 E14
- - ||-
AP1 BC66 P40 AD6
- | ||||| |||||-
||| |||| -
AB36 AP4 BC67 BP38 CC43 CJ64 E18 P45 AJ6
- - |- ||
||- |- | |==
AB40 AP64 BD10 BP43 CL22 CJ65 E2 P49 AN6
- | - ||
||
- | |-
VDDIO18_GRP3
- - ||-
AB45 AP67 BD23 BP47 T30 CJ67 E20 P53 BA6
- - ||-
|-
AB49 AR10 BD28 BP51 CC8 CK4 E22 P6 BF6
AB53 AR15 BD32 BP55 CD2 CK41 E26 P62
AB58 AR19 BD36 BP8 CD4 CK42 E27 R2 CE19
AB6 AR28 BD40 BR3 CD64 CK46 E29 R4 CE23 VDDIO18_GRP4
AB62 AR32 BD45 BR65 CD66 CK5 E3 R64
AC2 AR36 BD49 BT10 CE10 CK50 E37 R66 1.62-1.98V @10mA MAX CE28
C
=|
PP1V8_SDRAM
C
- - ||- | - - -
47 41 40 37 36 32 21 20 18 16
53 52 48
AC4 CE15 E4
- - ||-
AR40 BD53 BT15 CK54 T13 CE32
- | ||||| |||||-
C1603 C1601
||| |||| -
AC64 AR45 BD58 BT19 CE47 CK57 E5 T25 1 1 CE34
- - |- ||
|
||- |- | |==
AC66 AR49 BD62 BT23 CE53 CK61 E54 T34 2.2UF 0.1UF CE36 VDDIO18_GRP10
- | - ||
||
- | |-
20% 20%
- - ||-
AD13 AR53 BF21 BT28 CE6 CK64 E57 T38 6.3V 6.3V CE43
- - ||-
VSS VSS VSS VSS VSS VSS VSS VSS 2 X5R-CERM 2 X5R-CERM
|-
AD17 AR58 BF25 BT32 CE62 CL1 E59 T51 0201-1 01005 CE38
ROOM=SOC ROOM=SOC
AD21 AR6 BF30 BT36 CF1 CL12 E61 T55
AD25 AR62 BF34 BT40 CF2 CL18 E64 U1 1.62-1.98V @2mA MAX AR23 VDD18_TSADC0
AD30 AT1 BF43 BT45 CF64 CL24 E65 U67 BK19 VDD18_TSADC1
AD34 AT3 BF47 BT49 CF65 CL27 E66 V10 AF21 VDD18_TSADC2
AD43 AT65 BF51 BT53 CF66 CL3 E7 V15 J36
=|
VDD18_TSADC3
- - ||- | - - -
CF67
- - ||-
AD47 AU13 BF55 BT58 CL33 E9 V28 CE21
|
VDD18_TSADC4
- | ||||| |||||-
||| |||| -
AD51 AU17 BF8 BT6 CG1 CL39 F1 V32 BF60
- - |- ||
|
VDD18_TSADC5
||- |- | |==
AD55 AU21 BG1 BT62 CG11 CL4 F2 V36
- | - ||
||
- | |-
- - ||-
AD60 AU25 BG3 BU1 CG2 CL41 F3 V40 1.62-1.98V @1mA MAX CG9
- - ||-
VDD18_FMON
|-
AD8 AU30 BG65 BU67 CG24 CL44 F4 V53
AF10 AU34 BG67 BV2 CG27 CL48 F64 V58 1.62-1.98V @1mA MAX CC40 VDD18_LPOSC
AF15 AU38 BH10 BV4 CG4 CL52 F65 V6
AF19 AU43 BH15 BV64 CG42 CL56 F66 V62 TBD-TBDV @30mA MAX AU23
19 PP1V2_REF VDD12_CPU_UVD
AF23 AU47 BH19 BV66 CG44 CL59 F67 W3 T28 VDD12_GPU_UVD
AF28 AU51 BH23 BW13 CG46 CL63 G38 W65 1 C1611 Y38
=|
VDD12_SOC_UVD
- - ||- | - - -
CG48 2.2UF
- - ||-
AF32 AU55 BH28 BW17 CL65 G43 Y13
|
20%
- | ||||| |||||-
||| |||| -
AF36 AU60 BH32 BW21 CG5 CL67 G47 Y17 2 6.3V BA25
- - |- ||
|
X5R-CERM VDD12_PLL_CPU
||- |- | |==
AF40 AU8 BH36 BW25 CG52 CL7 G51 Y21 0201-1
- | - ||
||
- | |-
ROOM=SOC
- - ||-
AF45 AV1 BH40 BW30 CG54 CM18 G8 Y25 Y32
- - ||-
R1602
|-
AF49 AV2 BH45 BW34 CG56 CM2 H1 Y30 VDD12_PLL_CPU:1.14-1.26V @13mA MAX AD36
AF53 AV4 BH49 BW38 CG59 CM24 H2 Y43 0.00 AD38 VDD12_PLL_SOC
PP1V2_SOC 1 2 PP1V2_PLL_CPU
B B
19 10 8
AF58 AV64 BH53 BW43 CG61 CM27 H66 Y47 0% Y34
AF6 AV66 BH58 BW47 CG64 CM39 H67 Y51 1/32W
MF
01005
1 C1606
AG1 AW10 BH6 BW51 CG65 CM4 J10 Y55 ROOM=SOC 0.1UF
AG3 AW15 BH62 CE51 CG66 CM41 J15 BF38 20%
=|
2 6.3V
-
- - - ||| - - |
01005
||| ||||| ||- -
R1601
- | |-
- - ||-
0.00
=
ROOM=SOC
- - ||-
- | ||||| |||||-
||| |||| -
||- |- | |==
- | |-
- - ||-
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
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DRAWING NUMBER SIZE
315mA MAX
R1703
24.9
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 29
PP1V8 1 2 PP1V8_NAND_AVDD
1%
1/32W
MF
01005
ROOM=NAND
1
C1726
2.2UF
1
C1710
0.1UF
20% 20%
6.3V 6.3V
2 X5R-CERM 2 X5R-CERM
0201-1 01005
ROOM=NAND ROOM=NAND
17 NAND_AGND
PROBE POINTS
D D
1
C1701
15UF
1
C1707
15UF
1
C1729
15UF
1
C1730
15UF 17 8 90_PCIE_AP_TO_NAND_REFCLK_P 1
SM
PP1701
PP
20% 20% 20% 20% P2MM-NSM
6.3V 6.3V 6.3V 6.3V ROOM=NAND
2 X5R
0402-1
ROOM=NAND
2 X5R
0402-1
ROOM=NAND
2 X5R
0402-1
ROOM=NAND
2 X5R
0402-1
ROOM=NAND
17 8 90_PCIE_AP_TO_NAND_REFCLK_N 1
SM
PP PP1702
P2MM-NSM
ROOM=NAND
1
C1708 1
C1711 1
C1717 1
C1723 1
C1712
100PF
220PF 22PF
5%
68PF
5%
39PF
5% 5%
5% 16V
2 10V 2 16V 2 16V 2 16V 2
C0G-CERM CERM NP0-C0G NP0-C0G NP0-C0G
01005 01005 01005 01005 01005
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
19 PP0V9_NAND
1007mA MAX
1
C1704 1
C1702 1
C1705 1 C1722 1 C1727
15UF 15UF 15UF 15UF 15UF
20% 20% 20% 20% 20%
6.3V 6.3V 6.3V 6.3V 6.3V
2 X5R 2 X5R 2 X5R 2 X5R 2 X5R
C 0402-1
ROOM=NAND
0402-1
ROOM=NAND
0402-1
ROOM=NAND
0402-1
ROOM=NAND
0402-1
ROOM=NAND #24543147:10uF for 32GB
#26326159:10uF for C1719 1230mA MAX (1us peak power) C
OMIT OMIT OMIT OMIT
PP3V0_NAND
OMIT
PP1V8
1 C1715 1 C1718 1 C1731 1 C1732 1 C1734 1 C1735 1 C1736
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 29 220PF 22PF 68PF 39PF 100PF 220PF 100PF
5% 5% 5% 5% 5% 5% 5%
2 10V 2 16V 16V 16V 16V 10V 2 16V
1
C1724
0.01UF
C0G-CERM
01005
CERM
01005
2 NP0-C0G
01005
2 NP0-C0G
01005
2 NP0-C0G
01005
2 C0G-CERM
01005
NP0-C0G
01005
10% ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
6.3V
2 X5R
01005
NAND_VREF
OG10
OD10
OB10
OA10
OF10
OG0
OD0
OB0
OA0
OF0
M4
R3
R7
R5
C3
E5
A3
A7
A5
K4
K6
F2
ROOM=NAND
J1
J9
J5
J7
C1725
PCI_AVDD_CLK1
PCI_AVDD_CLK2
PCI_AVDD_H
PCI_VDD1
PCI_VDD2
AVDD1
VREF
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VCC
VCC
VCC
VCC
VCC
VCC
1
B 0.01UF
10%
B
2 6.3V
U1701
X5R
01005
ROOM=NAND
THGBX6T1T82LFXF
VLGA
AP_TO_NAND_SYS_CLK D2 CLK_IN EXT_D0 G3 PMU_TO_NAND_LOW_BATT_BOOT_L
VER-1
11 20
EXT_D1 J3 AP_TO_NAND_FW_STRAP
90_PCIE_AP_TO_NAND_REFCLK_P H8 PCIE_REFCLK_P
12
17 8
EXT_D2 H2
90_PCIE_AP_TO_NAND_REFCLK_N H6 PCIE_REFCLK_M ROOM=NAND NC
17 8
EXT_D3 E3
NC
PCIE_NAND_BI_AP_CLKREQ_L G9 PCIE_CLKREQ*
BOMOPTION=OMIT_TABLE
EXT_D4 E7
8
CRITICAL NC
EXT_D5 F6
PCIE_NAND_RESREF M6 PCI_RESREF NC
EXT_D6 C7
NC
1 90_PCIE_AP_TO_NAND_TXD_P M8 PCIE_RX0_P EXT_D7 B8 SYSTEM_ALIVE
R1704
3.01K
8
90_PCIE_AP_TO_NAND_TXD_N K8 PCIE_RX0_M
15 20 21
1%
8
EXT_NCE G1 PCIE_AP_TO_NAND_RESET_L 8
1/32W N5
MF NC PCIE_RX1_P F4 ROOM=NAND 0.00 R1702
01005 N3 EXT_NRE SWD_AP_BI_NAND_SWDIO_R 1 2 SWD_AP_BI_NAND_SWDIO 13
2 ROOM=NAND NC PCIE_RX1_M 1/32W 0% 01005 MF
C5 ROOM=NAND 0.00 R1707
P8 EXT_NWE SWD_AP_NAND_SWCLK_R 1 2 SWD_AP_TO_MANY_SWCLK 13 36 53
8 90_PCIE_NAND_TO_AP_RXD_P PCIE_TX0_P 1/32W 0% 01005 MF
90_PCIE_NAND_TO_AP_RXD_N N7 PCIE_TX0_M EXT_RNB G5
8 NC
M2 PCIE_TX1_P EXT_CLE H4
NC NC
K2 PCIE_TX1_M
NC EXT_ALE D4
7 AP_TO_NAND_RESET_L F8 RESET*
A NC
D8 TRST*
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
NAND_ZQ D6 ZQ PAGE TITLE
spare
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1
R1701
34.8
DRAWING NUMBER
051-00419
SIZE
D
B2
B4
B6
OE10
G7
L3
L5
L7
P2
P4
P6
OC0
OC10
0.5% OE0 Apple Inc.
1/32W REVISION
MF
01005
2 ROOM=NAND
17 NAND_AGND
R
8.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
BAT/USB
53
PP_VDD_MAIN
13.4A MAX
28 27 26 25 23 21 19 10 9 4
1 2 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
H14 VDD_MAIN_W A6 BUCK0_LX1
BUCK0
52 46 41 40 39 37 35 34 33 31
BUCK INPUT
0201-1 0201-1 0201-1 0201-1 0201-1 C13
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU B18 BUCK1_LX0 1 2 PP_GPU_VAR 14
D13 PIQA20161T-SM
C18 NO_XNET_CONNECTION=1 CRITICAL
BUCK1_LX0
H1 D18
ROOM=PMU 1 C1813 1 C1820 1 C1827 1 C1833 1 C1839 1 C1865 0.67V - 0.92V
13.4A MAX
H2 VDD_BUCK2 A18 15UF 15UF 15UF 15UF 15UF 15UF
20% 20% 20% 20% 20% 20%
C1877 C1849 C1856 0.22UH-20%-6.7A-0.023OHM
BUCK1
1 1 1 H3 2
6.3V 6.3V
2 X5R
6.3V
2 X5R
6.3V
2 X5R
6.3V
2 X5R
6.3V
2 X5R
X5R
2.2UF 2.2UF
20%
2.2UF
20% A16 BUCK1_LX1 1 2 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1
20% T2 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
6.3V 6.3V
2 6.3V
X5R-CERM 2 X5R-CERM 2 X5R-CERM VDD_BUCK3 B16 NO_XNET_CONNECTION=1 PINA20121T-SM CRITICAL
0201-1 0201-1 0201-1 T3 BUCK1_LX1 ROOM=PMU
C16
ROOM=PMU ROOM=PMU ROOM=PMU
M1 D16
M2 VDD_BUCK4 L1812 1 C1814 1 C1821 1 C1828 1 C1834 1 C1866 1 C1873
0.22UH-20%-6.7A-0.023OHM
C M3
A14 BUCK1_LX2 2 1
15UF
20% 20%
15UF
20%
15UF
20%
15UF
20%
15UF
5%
220PF C
B1 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 10V
C0G-CERM
B14 PINA20121T-SM CRITICAL
VDD_BUCK5 BUCK1_LX2 0402-1 0402-1 0402-1 0402-1 0402-1 01005
C1 NO_XNET_CONNECTION=1 ROOM=PMU
C14 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
D1
D14
K18
VDD_BUCK6
L1813
K19 0.22UH-20%-6.7A-0.023OHM
A12 BUCK1_LX3 1 2
U6 PINA20121T-SM
VDD_BUCK7 B12 NO_XNET_CONNECTION=1 CRITICAL
V6 BUCK1_LX3 ROOM=PMU
C12
F18 D12
VDD_BUCK8
F19
BUCK1_FB F12BUCK1_PP_GPU_FB 14
L18
L19
VDD_BUCK9 L1814
D10/D101:#24681501,TY ONLY, D11/D11: Both Vendor
1.0UH-20%-3.6A-0.060OHM
BUCK2_LX0 1 2 PP_SOC_VAR 14
L1803 G1
4.7A MAX
CRITICAL
BUCK2
BUCK2_LX0 G2 PIQA20161T-SM CRITICAL
1.0UH-3.6A-0.06OHM ROOM=PMU 0.67V/0.80V
15 10 9 8 7 PP0V9_SOC_FIXED 2 1 BUCK5_LX0 B2
G3
L1815
1 C1822 1 C1829 1 C1835 1 C1841 1 C1864 1 C1871
MEKK2016T-SM C2 0.47UH-20%-3.8A-0.048OHM 15UF 15UF 15UF 15UF 15UF 220PF
BUCK5_LX0 20% 20% 20% 20% 20% 5%
C1867 C1840 C1801 C1803 C1807
BUCK5
ROOM=PMU
2 1 BUCK5_FB F5 BUCK5_FB
BUCK2_FB J5 BUCK2_PP_SOC_FB 14
CRITICAL L1804
ROOM=SOC NO_XNET_CONNECTION=1
L1816 ROOM=PMU
1.0UH-20%-3.6A-0.060OHM
1UH-20%-2.1A-0.12OHM
BUCK3
1.7A MAX
BUCK6
BUCK6_LX0 NO_XNET_CONNECTION=1 1 1 1
1.5A MAX
4.7A MAX
1.5A MAX
BUCK4
BUCK7
1 1 1 ROOM=PMU NO_XNET_CONNECTION=1 1 1 1 1 1
ROOM=PMU
220PF 15UF 15UF OMIT N3 15UF 15UF 15UF 15UF 220PF
5%
2 10V
20%
2 6.3V
20%
2 6.3V
XW1803 L1818 2
20%
6.3V 2
20%
6.3V
20%
2 6.3V 2
20%
6.3V 2
5%
10V
C0G-CERM X5R X5R SHORT-20L-0.05MM-SM 0.47UH-20%-3.8A-0.048OHM X5R X5R X5R X5R C0G-CERM
01005 0402-1 0402-1 2 1 0402-1 0402-1 0402-1 0402-1 01005
BUCK7_FB R8 BUCK7_FB 2 1
ROOM=PMU ROOM=PMU ROOM=PMU L1 BUCK4_LX1 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
ROOM=SOC NO_XNET_CONNECTION=1
PIQA20121T-SM
CRITICAL L1801 BUCK4_LX1 L2
L3
NO_XNET_CONNECTION=1 ROOM=PMU
OMIT
CRITICAL
1UH-20%-2.1A-0.12OHM XW1805
SHORT-20L-0.05MM-SM
14 PP_GPU_SRAM_VAR 2 1 BUCK8_LX0 G18
BUCK4_FB K5 BUCK4_FB 1 2
PIQA20121T-SM G19 BUCK8_LX0
0.80V - 0.92V 1 C1869 1 C1806 1 C1810 ROOM=PMU NO_XNET_CONNECTION=1 ROOM=SOC
1.5A MAX
BUCK8
A CRITICAL L1802
1.0UH-20%-1.5A-0.161OHM T1 PP1V8 5 7 8 9 11 12 13 16 17 25 29 39 A
BUCK3_SW1
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
46 47 48 52
PAGE TITLE
1 2 U1
25 PP2V8_UT_AF_VAR BUCK9_LX0
0603
M18
BUCK9_LX0 spare
SWITCH OUTPUTS
M19
0.75A MAX
53 52
27 26 25 23 21 19 18 10 9 4
46 41 40 39 37 35 34 33 31 28
PP_VDD_MAIN ADELYN LDO SPECS
1 1 1 1
OMIT
1
C1901
15UF
C1910
10UF
C1914
10UF
C1911
10UF
C1907
10UF
XW1901
SHORT-20L-0.05MM-SM
20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V
LDO# ADJ.RANGE, LOW ADJ.RANGE, HI ACCURACY MAX.CURRENT LDO# ADJ.RANGE, LOW ADJ.RANGE, HI ACCURACY MAX.CURRENT
18 VDD_MAIN_SNS 2 1 2 X5R 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R
0402-1 0402-9 0402-9 0402-9 0402-9 LDO1 (Ca) 1.2-2.475V 2.4-3.675V +/-1.4% 50mA 1.2-2.475V 2.4-3.675V
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU LDO11 (Cb) +/-30mV 250mA
NO_XNET_CONNECTION
OMIT LDO2 (Ca) 1.2-2.475V 2.4-3.675V +/-2.5% 50mA LDO12 (E) 1.8V +/-5% 10mA
XW1902
SHORT-20L-0.05MM-SM LDO3 (Ca) 1.2-2.475V 2.4-3.675V +/-2.5% 50mA LDO13 (Cb) 1.2-2.475V 2.4-3.675V +/-30mV 250mA
20 PMU_PRE_UVLO_DET 2 1
D
ROOM=PMU
LDO4 (D) 0.7-1.2V +/-2.5% 60mA LDO14 (Gb) 0.7-1.4V +/-3.0% 400mA
D LDO5 (F) 2.5-3.6V(tbc) +/-75mV 1000mA LDO15 (Ca) 1.2-2.475V 2.4-3.675V +/-2.5% 50mA
1.2-2.475V 2.4-3.675V 250mA
LDO6 (Cb) +/-2.5% (500/100mA in bypass)
LDO16 (Cb) 1.2-2.475V 2.4-3.675V +/-30mV 250mA
LDO7 (Cb) 1.2-2.475V 2.4-3.675V +/-30mV 250mA
LDO17 (Ca) 1.2-2.475V 2.4-3.675V +/-2.5% 50mA
53 52
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN LDO8 (Cb) 1.2-2.475V 2.4-3.675V +/-30mV 250mA
46 41 40 39 37 35 34 33 31 28 LDO18 (Gb) 0.7-1.4V +/-3.0% 400mA
LDO9 (Cb) 1.2-2.475V 2.4-3.675V +/-25mV 250mA
LDO19 (Gb) 0.7-1.4V +/-3.0% 400mA
53 38 37 32 25 23 PP_VDD_BOOST LDO10 (Ga) 0.7-1.2V +/-4.5% 1150mA
LDO_RTC 2.5V +/-2.0% 10mA
1 C1915 1 C1912 BUF_1V2 1.2V +/-5.0% 10mA
15UF
20%
15UF
20%
6.3V
2 X5R
6.3V
2 X5R U1801
0402-1 0402-1
ROOM=PMU ROOM=PMU D2333A1
WLCSP
SYM 1 OF 4
VLDO1 T12 PP3V3_USB 7 LDO1
VLDO2 U11 PP1V8_VA 32 33 34 35 LDO2
R12
VLDO3 T10 PP3V0_ALS_APS_CONVOY 25 29 LDO3
VDD_LDO1
VLDO4 T16 PP0V8_AOP 15 LDO4
V11 VDD_LDO2_15
R10
VLDO5_0 U9 PP3V0_NAND 17 52 LDO5
VDD_LDO3_17
VLDO5_1 U10
18 15 PP1V1_SDRAM R16 VDD_LDO4
V9
VLDO6 T14 PP_ACC_VAR 27 40 46 LDO6
1 C1908 1 C1913 VDD_LDO5
LDO INPUT
2.2UF 2.2UF V10 VBYPASS R15
20% 20% R14 VDD_LDO6_BYP
6.3V 6.3V
2 X5R-CERM 2 X5R-CERM VLDO7 T17 PP3V0_TRISTAR_ANT_PROX 29 40 41 53 LDO7
C 0201-1
ROOM=PMU
0201-1
ROOM=PMU
P19
R19
VDD_LDO7_8
VDD_LDO9
VLDO8 P18 PP2V9_NH_AVDD 29 LDO8 C
VLDO9 R18 PP1V8_HAWKING 44 LDO9
R9 VDD_LDO10
V13 VDD_LDO11_13 VLDO9_FB P17
18 PP1V25_BUCK V16 VDD_LDO14
VLDO10 T9 PP0V9_NAND 17 LDO10
T19 VDD_LDO16
VLDO11 U13NC LDO11
V17 VDD_LDO18
VLDO12 P7 PP1V8_ALWAYS 20 21 LDO12
V18 VDD_LDO19
LDO
VLDO13 U14 PP3V0_MESA 38 LDO13
U19 VDD_LDO19
VLDO14 U16 PP1V2_SOC 8 10 16 LDO14
VLDO15 U12 PP1V8_MESA 38 48 LDO15
G15 VPP_OTP VLDO16 T18NC #24989262 1/20W R1901 MF NOSTUFF LDO16
PP_LDO17
1%
2
0.00 1 0201
VLDO17 T11 LDO17
U1801
D2333A1 VLDO18 U17 PP1V2_UT_DVDD LDO18
E6 U8 PAGE TITLE
E7 V1 spare
E8 V12 DRAWING NUMBER SIZE
E9 V19
Apple Inc. 051-00419 D
F1 V8 REVISION
F17
R
8.0.0
F2 NOTICE OF PROPRIETARY PROPERTY: BRANCH
P2MM-NSM
ROOM=SOC
1
R2008
100K
1 PP SM PP2003
P2MM-NSM
5%
1/32W
MF
47 41 40 37 36 32 21 20 18 16 PP1V8_SDRAM PP1V8_ALWAYS 19 20 21 ROOM=PMU 01005
53 52 48 2 ROOM=PMU
BUTTON_RINGER_A
D
44 20
D 1
R2006
100K
1
R2005
100K
1
R2012
10K
U1801
D2333A1
PP1V8_ALWAYS 19 20 21
5% 5% 5% WLCSP NOSTUFF
1/32W
MF
01005
1/32W
MF
01005
1/32W
MF
01005 7 AP_TO_PMU_WDOG_RESET P9 RESET_IN1
SYM 3 OF 4
IREF K6 PMU_IREF
1
R2007
220K
2 ROOM=PMU 2 ROOM=PMU 2 ROOM=PMU 5%
40 TRISTAR_TO_PMU_HOST_RESET P10 RESET_IN2 1/32W
RESETS
NO_XNET_CONNECTION MF
AP_TO_PMU_SOCHOT_L PMU_VREF
REFS
11 P11 RESET_IN3 VREF J7 01005
2 ROOM=PMU
PMU_TO_SYSTEM_COLD_RESET_L M5 RESET* 1 1 BUTTON_POWER_KEY_L
13 7
SHDN
C2006
0.22UF
R2011
200K
44 20
COMPARATOR
SYSTEM_ALIVE VDROOP1* G7 PMU_TO_AP_THROTTLE_GPU_L 11 44 20 BUTTON_VOL_DOWN_L
21 17 15 H5 SYS_ALIVE
53 39 23 13 LCM_TO_MANY_BSYNC HIGH=FORCE PWM MODE L13 FORCE_SYNC
NC L10 CRASH* VDROOP0_DET F6 AP_VDD_CPU_SENSE 14
PMGR
ROOM=PMU
11 SPI_PMGR_TO_PMU_MOSI N5 MOSI
IBAT L7 NC
C 11 SPI_PMU_TO_PMGR_MISO P5 MISO
VBAT M7 NC C
ADC
BRICK_ID H7 TRISTAR_TO_PMU_USB_BRICK_ID 20 40
7 AP_TO_PMU_AMUX_OUT J14 AMUX_A0
PMU_ADC_IN
ADC_IN K7
20 PMU_ADC_IN J15 AMUX_A1
20
NC J16 AMUX_A2
FOREHEAD NTC 44 12 BUTTON_VOL_UP_L K16 AMUX_A3 BUTTON1 M12 BUTTON_VOL_DOWN_L 20 44
BUTTONS
39 37 20 44
AMUX
TRISTAR_TO_PMU_USB_BRICK_ID J13 AMUX_A6 BUTTON4 N11 NC Reserved for MENU key on dev board
C2007 1 R2001 40 20
GPIO
NTC
01005 ROOM=PMU RADIO_PA_NTC P6 TDEV3
ROOM=PMU 2 SHORT-20L-0.05MM-SM GPIO11 F9 PMU_TO_WLAN_REG_ON 53
ROOM=SOC 1 2 AP_NTC L5 TDEV4
GPIO12 G9 BT_TO_PMU_HOST_WAKE 53
OMIT NC L6 TDEV5
GPIO13 F8 PMU_TO_CODEC_DIGLDO_PULLDN
B PMU_TCAL
B
32
G16 TCAL
XW2003
SHORT-20L-0.05MM-SM
GPIO14 G8 PMU_TO_ACC_BUCK_SW_EN 27
XTAL
53
OMIT PMU_XTAL2 V15 XTAL2 0.00
RADIO PA NTC XW2004 GPIO17 J9 PMU_TO_AP_FORCE_DFU_R 1 2 PMU_TO_AP_FORCE_DFU 4 12
100PF
5% 10KOHM-1%
XW2005
SHORT-20L-0.05MM-SM
0.22UF
20%
37 47 RS
CRITICAL
1 1
C2011
100PF
R2010
3.92K
Y2001
32.768KHZ-20PPM-12.5PF
AP NTC 5%
16V
0.1%
1/20W 1 2
2 NP0-C0G MF
01005 0201
1 2 ROOM=PMU 1 1
ROOM=PMU
C2003
22PF
1.60X1.00-SM
ROOM=PMU C2004
22PF
C2010 1 R2004 5%
16V
CERM 2
5%
16V
2 CERM
100PF 01005 01005
5% 10KOHM-1% AP_NTC_RETURN ROOM=PMU ROOM=PMU
16V 2 01005 19 PMU_VSS_RTC
NP0-C0G
2
01005
ROOM=PMU
ROOM=PMU
XW2001
SHORT-20L-0.05MM-SM
1 2
ROOM=PMU
A OMIT
A
NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC SYNC_MASTER=Sync
PAGE TITLE
SYNC_DATE=05/17/2016
spare
DRAWING NUMBER SIZE
TIGRIS CHARGER
D D
TIGRIS_LDO
C TIGRIS_PMID
1 C2104 1 C2115 C
1 C2103 1 C2109 1 C2111 1 C2112 220PF 2.2UF
D2
C2
A2
B2
5% 20%
330PF 4.2UF 4.2UF 330PF 2 10V 2 6.3V
X5R-CERM
A2
A3
B1
B2
B3
10% 10% 10% 10% C0G-CERM
VDD_MAIN
VDD_MAIN
VDD_MAIN
VDD_MAIN
16V 16V 16V 16V 01005 0201-1
2 CER-X7R 2 X5R-CERM 2 X5R-CERM 2 CER-X7R S CRITICAL
01005
ROOM=CHARGER
0402-1
ROOM=CHARGER
0402-1
ROOM=CHARGER
01005
ROOM=CHARGER
ROOM=CHARGER ROOM=CHARGER
Q2101
28
TO TRINITY A1
CSD68827W
NO_XNET_CONNECTION G BGA
#25112685,Remove Snub ROOM=CHARGER
F5
PMID U2101 LDO
G4 C2105
A5 SN2400AB0 G5
0.047UF C2106 1 C2102 1
D
40 4 PP5V0_USB VBUS WCSP BOOT TIGRIS_BOOT 1 2 330PF 220PF
B5 10% 5%
VBUS A4 16V 10V 2
C2101 C2110 2
C1
C2
C3
1 1 ROOM=CHARGER ROOM=CHARGER 10% CER-X7R C0G-CERM
D5 BUCK_SW 16V 01005 01005
4.2UF 330PF VBUS CRITICAL B4 X5R ROOM=CHARGER ROOM=CHARGER
C5 BUCK_SW
20 19 PP1V8_ALWAYS 10% 10% VBUS D4 0201
2 16V
X5R-CERM 2 16V
CER-X7R E5 BUCK_SW
0402-1 01005 VBUS C4
ROOM=CHARGER ROOM=CHARGER BUCK_SW TIGRIS_BUCK_LX
1
R2101 47 I2C1_AP_SDA
G3
SDA A1
100K E4 BAT
5% 47 I2C1_AP_SCL SCL B1
1/32W BAT
MF E3 D1
2 01005 20 17 15 SYSTEM_ALIVE SYS_ALIVE BAT
ROOM=CHARGER C1
F4 BAT PP_BATT_VCC
R2103
4 22
40 TRISTAR_TO_TIGRIS_VBUS_OFF VBUS_OVP_OFF
F4: 100 kOhm pullup to VLDO (regulated output voltage) E1
100 G2 BAT_SNS VBATT_SENSE
20 TIGRIS_TO_PMU_INT_L 1 2 TIGRIS_TO_PMU_INT_R_L INT
E2
22
1 C2108 1 C2117 1 C2118
5%
ROOM=CHARGER
F1 ACT_DIODE TIGRIS_ACTIVE_DIODE 330PF 2.2UF 2.2UF
#24558610: Change to 100ohm 1/32W TIGRIS_VBUS_DETECT VBUS_DET 10% 20% 20%
16V
MF G1 NOSTUFF 2 CER-X7R 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
01005 F3 HDQ_HOST SWI_AP_BI_TIGRIS
R2102 1
12 01005 0201-1 0201-1
TEST F2
PGND
PGND
PGND
PGND
R2104 HDQ_GAUGE TIGRIS_TO_BATTERY_SWI_1V8
100K
ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER
30.1K 2 5%
USB_VBUS_DETECT 1 1/32W
B B
7
A3
B3
D3
C3
1%
ROOM=CHARGER 48 47 41 40 37 36 32 20 18 16 PP1V8_SDRAM MF
01005
ROOM=CHARGER 2
53 52
1/32W
MF
01005
1
R2105 Q2102
40.2K RV3C002UN
1% DFN
1
1/32W
MF
G
2 01005
TIGRIS_TO_BATTERY_SWI 22
3
D
S
SYM_VER_1
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
D D
BATTERY CONNECTOR
THIS ONE ON MLB ---> 516S00172 (matches d10 mlb MCO rev 27)
C C
XW2201
SHORT-20L-0.05MM-SM
1 2 VBATT_SENSE 21
ROOM=BATTERY_B2B
PLACE_NEAR=J2201:2mm
J2201
RCPT-BATT-SHORT
NO_XNET_CONNECTION=1
F-ST-SM
11
7 8
R2201 1 5 PP_BATT_VCC 4 21
100
TIGRIS_TO_BATTERY_SWI 1 2 TIGRIS_BATTERY_SWI_CONN 3 2
21
5% 4 6
1 C2202 1 C2203 1 C2204
56PF 100PF 220PF
1/32W
MF
01005
1 C2201 5%
2 25V
5%
2 16V
5%
10V
2 C0G-CERM
ROOM=BATTERY_B2B 56PF 9 10 NP0-C0G-CERM
01005
NP0-C0G
01005 01005
5%
2 25V
NP0-C0G-CERM 12 ROOM=BATTERY_B2B ROOM=BATTERY_B2B ROOM=BATTERY_B2B
01005 ROOM=BATTERY_B2B
ROOM=BATTERY_B2B
CRITICAL
ALLOW_APPLE_PREFIX
B B
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
D D
BOOST
C C
53 39 20 13 LCM_TO_MANY_BSYNC A2 GPIO
HIGH=FORCE PWM MODE PGND
AGND
D2
D3
D4
D1
Control details from Radar 19634006
B B
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
1 C2418 1
BOMOPTION=CARBON_1
C2402 1
BOMOPTION=CARBON_1
C2415
1 C2401 1
2.2UF
0.1UF 20%
2.2UF 0.1UF 0.1UF
C4
20%
20% 20% 20% 2
6.3V 2 6.3V
X5R-CERM
6.3V 6.3V X5R-CERM
2 6.3V
X5R-CERM 2 X5R-CERM 2 X5R-CERM 01005 0201-1 VDD
0201-1 01005 01005 ROOM=MAGNESIUM
36 24 18
PP1V8_MAGGIE_IMU ROOM=CARBON ROOM=CARBON ROOM=CARBON
BOMOPTION: CARBON_1
ROOM=MAGNESIUM
U2402
HSCDTD601A-19A
#25765850:Update Carbon APN
16
1
LGA
C2 VPP SDO B4
BOMOPTION=CARBON_1
SPI_IMU_TO_AOP_MISO
R2401
BOMOPTION=CARBON_1
1
VDD VDDIO NC 13 24
ROOM=MAGNESIUM
114K INT PD
DRDY A1 COMPASS_TO_AOP_INT
5PF 13
+/-0.1PF CRITICAL
13 ACCEL_GYRO_TO_AOP_INT 7 INT DRDY 6 ACCEL_GYRO_TO_AOP_DATARDY 13 2
16V
NP0-C0G
01005
VSS
ROOM=CARBON ROOM=CARBON
PP2404
1
C1
BOMOPTION=CARBON_1 CRITICAL SMPP
1 C2403 P2MM-NSM
0.1UF 9 GND ROOM=MAGNESIUM
10 GND
11 GND
12 GND
13 GND
15 GND
10%
6.3V
2 X6S PP2401
1
C C
SMPP
0201
ROOM=CARBON P2MM-NSM
ROOM=MAGNESIUM
PP2402
1 PP SM
#25782019:Add 0ohm P2MM-NSM
ROOM=MAGNESIUM
R2404 PP2403
PP1V8_MAGGIE_IMU 1
0.00 2 24 PP1V8_MAGGIE_IMU_R 1 SMPP
36 24 18
P2MM-NSM
0%
1/32W
MF
1 C2448 1 C2442 1 C2445 ROOM=MAGNESIUM
24
PP1V8_MAGGIE_IMU_R
ROOM=BOT_CARBON ROOM=BOT_CARBON ROOM=BOT_CARBON 1
PP SM PP2440
P2MM-NSM
ROOM=HOMER
16
1
R2441
100K
VDD VDDIO
5%
1/32W U2404
MF MPU-6900-21
2 01005
ROOM=SOC LGA
13
SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L 5 CS SPC 2 SPI_AOP_TO_IMU_SCLK_R2 13
8 FSYNC SDI 3 SPI_AOP_TO_IMU_MOSI 13 24
NOSTUFF
10 GND
11 GND
12 GND
13 GND
15 GND
10%
2 6.3V
X6S
0201
ROOM=BOT_CARBON
R2422
1
0.00 2
24 PP1V8_MAGGIE_IMU_FILT PP1V8_MAGGIE_IMU 18 24 36
NOSTUFF NOSTUFF NOSTUFF NOSTUFF
1 C2413 1 C2405 1 C2420 1 C2421 0%
1/32W
MF
1 C2422 1 C2423 1 C2414
0.1UF 0.1UF 4PF 20PF 01005 20PF 5.6PF 2.2UF
20% 20% +/-0.1PF 5% ROOM=PHOSPHORUS 5% +/-0.1PF 20%
2 6.3V 2 6.3V 2 16V 2 16V 2 16V 2 16V 2 6.3V
X5R-CERM X5R-CERM NP0-C0G NP0-C0G-CERM NP0-C0G-CERM NP0-C0G-CERM X5R-CERM
01005 01005 01005 01005 01005 01005 0201-1
ROOM=PHOSPHORUS ROOM=PHOSPHORUS ROOM=PHOSPHORUS ROOM=PHOSPHORUS ROOM=PHOSPHORUS ROOM=PHOSPHORUS ROOM=PHOSPHORUS
24
PP1V8_MAGGIE_IMU_FILT
8
NOSTUFF
BOSCH: Internal PU 1
R2403 VDD VDDIO
100K U2403
A 5%
1/32W
MF 24 13 SPI_AOP_TO_IMU_MOSI 3 SDI
BMP284AA
LGA SDO 5 SPI_IMU_TO_AOP_MISO 13 24
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
01005 4 SCK PAGE TITLE
2 SPI_AOP_TO_IMU_SCLK_R1
13
ROOM=SOC 24 13
REVISION
R
8.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
U2501 FL2504 D
D LP5907UVX2.925-S
DSBGA VOLTAGE=2.925V
150OHM-25%-200MA-0.7DCR
53 38 37 32 23 19 PP_VDD_BOOST A1 VIN VOUT A2 PP2V9_UT_AVDD_CONN 45 46 9 AP_TO_UT_CLK 1 2 AP_TO_UT_CLK_CONN 45
NOSTUFF
1 C2527 B1 VEN
ROOM=RCAM_B2B
See Page46: D10x C2531/C2507 are 2.2UF 1 C2502 1 C2504 1 C2512
01005
ROOM=RCAM_B2B 1 C2513
2.2UF 0.22UF 220PF 100PF 56PF
20% GND 10% 5% 5% 5%
6.3V 2 10V 2 25V
2 6.3V 2 CER-X5R 2 16V
C0G-CERM NP0-C0G NP0-C0G-CERM
B2
X5R-CERM 01005
0201-1 01005 01005 01005
ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B
FL2500 FL2501
33-OHM-25%-1500MA 150OHM-25%-200MA-0.7DCR
1 2
18 PP2V8_UT_AF_VAR PP2V8_UT_AF_VAR_CONN 45 9 AP_TO_UT_SHUTDOWN_L 1 2 AP_TO_UT_SHUTDOWN_CONN_L 45
0201 1
ROOM=RCAM_B2B 1 C2505 1 C2501 01005
ROOM=RCAM_B2B C2514
220PF
2.2UF 220PF 5%
10V
20% 5%
2 6.3V 2 10V 2 C0G-CERM
X5R-CERM C0G-CERM 01005
0201-1 01005 ROOM=RCAM_B2B
ROOM=RCAM_B2B ROOM=RCAM_B2B
FL2502 FL2503
33-OHM-25%-1500MA 150OHM-25%-200MA-0.7DCR
29 19 PP3V0_ALS_APS_CONVOY 1 2 PP3V0_UT_SVDD_CONN 45 26 UT_AND_NV_TO_STROBE_DRIVER_STROBE 1 2 UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN 45
0201
ROOM=RCAM_B2B
1
C2519 1
C2518 01005
ROOM=RCAM_B2B
1 C2515
2.2UF 220PF 220PF
20% 5% 5%
6.3V 10V 10V
2 X5R-CERM 2 C0G-CERM 2 C0G-CERM
C 0201-1
ROOM=RCAM_B2B
01005
ROOM=RCAM_B2B
01005
ROOM=RCAM_B2B C
FL2505
33-OHM-25%-1500MA
19 PP1V2_UT_DVDD 1 2 PP1V2_UT_VDD_CONN 45
0201
ROOM=RCAM_B2B
1
C2506
2.2UF
1
C2508
2.2UF
1
C2510
2.2UF
1
C2503
220PF
1
C2521
15PF
20% 20% 20% 5% 5%
6.3V 6.3V 6.3V 10V 16V
2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 C0G-CERM 2 NP0-C0G-CERM
0201-1 0201-1 0201-1 01005 01005
ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B
Desense for Wifi frequencies
B B
10 90_LPDP_UT_TO_AP_D0_P
MAKE_BASE=TRUE
90_LPDP_UT_TO_AP_D0_P C2523
ROOM=RCAM_B2B
1 2 0.1UF 90_LPDP_UT_TO_AP_D0_CONN_P 45
20% 6.3V
X5R-CERM 01005
10 90_LPDP_UT_TO_AP_D0_N
MAKE_BASE=TRUE
90_LPDP_UT_TO_AP_D0_N C2524
ROOM=RCAM_B2B
1 2 0.1UF 90_LPDP_UT_TO_AP_D0_CONN_N 45
20% 6.3V
X5R-CERM 01005
10 90_LPDP_UT_TO_AP_D1_P
MAKE_BASE=TRUE
90_LPDP_UT_TO_AP_D1_P C2525
ROOM=RCAM_B2B
1 2 0.1UF 90_LPDP_UT_TO_AP_D1_CONN_P 45
20% 6.3V
X5R-CERM 01005
10 90_LPDP_UT_TO_AP_D1_N
MAKE_BASE=TRUE
90_LPDP_UT_TO_AP_D1_N C2526 1 2 0.1UF 90_LPDP_UT_TO_AP_D1_CONN_N 45
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
D M2600
D
53 52
27 26 25 23 21 19 18 10 9 4
46 41 40 39 37 35 34 33 31 28
PP_VDD_MAIN NEO
SIP
C2609 1 C2610 1 C2613 1 SYM 1 OF 3
10UF
20%
10UF
20%
220PF B8 ROOM=STROBE
5% VDD D9
6.3V 6.3V 10V D2 LED1 PP_STROBE_DRIVER1_COOL_LED
CERM-X5R 2 CERM-X5R 2 C0G-CERM 2 VDD D10
44 45
0402-9 0402-9 01005 D3 CRITICAL LED1
ROOM=STROBE ROOM=STROBE ROOM=STROBE VDD
D6
C9 LED2 PP_STROBE_DRIVER1_WARM_LED 44 45
9 AP_TO_STROBE_DRIVER_HWEN HWEN1 D7
LED2
C8
25 UT_AND_NV_TO_STROBE_DRIVER_STROBE STB1
C10
NTC STROBE_MODULE_NTC 44
D8
53 37 BB_TO_STROBE_DRIVER_GSM_BURST_IND GSM1
B9
48 I2C_ISP_UT_SDA SDA1
B10
48 I2C_ISP_UT_SCL SCL1
C C
PP_VDD_MAIN
M2600
53 52
27 26 25 23 21 19 18 10 9 4
46 41 40 39 37 35 34 33 31 28
NEO
C2611 1 C2612 1 C2614 1 SIP
SYM 2 OF 3
10UF 10UF
20%
220PF
20% 5% B18 VDD
6.3V 6.3V 10V
CERM-X5R 2 CERM-X5R 2 C0G-CERM 2 LED1 B11 PP_STROBE_DRIVER2_COOL_LED 44 45
0402-9 0402-9 01005 B19 VDD
LED1 B12
D13 VDD
ROOM=STROBE2 ROOM=STROBE2 ROOM=STROBE
A2
GND
M2600 GND C14
LED2 B14 PP_STROBE_DRIVER2_WARM_LED 44 45 A3 NEO C15
C12 HWEN0 GND GND
LED2 B15 A4 SIP C16
GND SYM 3 OF 3 GND
C13 STB0 A5 C17
GND GND
NTC C11 A6 C18
GND GND
B13 GSM0 A7 C19
GND GND
A8 C20
46 I2C_ISP_NV_SDA D12 SDA2 GND GND
A9 D1
GND GND
46 I2C_ISP_NV_SCL D11 SCL2 A10 D4
GND GND
A11 D5
GND GND
A12 D14
GND GND
A13 D15
GND GND
A14 D16
GND GND
A15 D17
GND GND
A16 D18
GND GND
A17 D19
GND GND
B A18
A19
GND GND E1 B
GND GND E2
A20 E3
GND GND
B2 E4
GND GND
B3 E5
GND GND
B4 E6
53 52
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN GND GND
46 41 40 39 37 35 34 33 31 28 B5 E7
GND GND
B6
1 C2617 1 C2618 B7
GND GND E8
220PF 220PF GND GND E9
5% 5% B16
2 10V 2 10V GND GND E10
C0G-CERM C0G-CERM B17
01005 01005 GND GND E11
ROOM=STROBE2 ROOM=STROBE2 B20 E12
GND GND
C1 E13
AC return path for plane edge termination, which occurs near the Strobe modules. GND GND
C2 E14
GND GND
C3 E15
GND GND
C4 E16
GND GND
C5 E17
GND GND
C6 E18
GND GND
GND1S
GND2S
C7
GND1
GND2
GND GND E19
A1
B1
E20
D20
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
ACCESSORY BUCK
#25761020:Add Bypass 0ohm
NOSTUFF
R2711
0.00
1 2
D 1%
1/20W
D
MF
0201
ROOM=ACC_BUCK
From PMU LDO6
Q2700
A2
PMCM4401VPE
U2700 WLCSP
FAN53612-1.5V-1.9V
CRITICAL
L2700 #25370332: For EMC
WLCSP 0.47UH-20%-2.52A-0.08OHM #25919133: C2707 on P46
A2
ACC_BUCK_EN B2 B1 ACC_BUCK_SW 1 2 VOLTAGE=1.9V PP_ACC_BUCK_VAR
S
B1 B2
PIGA1608-SM
12 AP_TO_ACC_BUCK_VSEL A1 C1 ACC_BUCK_FB ROOM=ACC_BUCK
27
A1 G
1
R2701
1 1 1
XW2700 ROOM=TRISTAR
1 C2710 10UF 220PF 0.1UF SHORT-20L-0.05MM-SM PP_ACC_VAR
C2
100K 20% 5% 20%
1 2
19 27 40 46
5% 0.22UF
10%
6.3V
2 CERM-X5R 2
10V
C0G-CERM 2
6.3V
X5R-CERM
27 ACC_BUCK_FB
1/32W
MF
2 01005
2 6.3V
CER-X5R
01005 1
0402-9
ROOM=ACC_BUCK
01005
ROOM=ACC_BUCK
01005
ROOM=ACC_BUCK
ROOM=ACC_BUCK
NO_XNET_CONNECTION=1
PLACE_NEAR=Q2700:2mm
Q2701 1 C2708
ROOM=ACC_BUCK
PMCM4401VPE 4UF
ROOM=ACC_BUCK R2705
10K WLCSP 20%
6.3V
5% #25172498 2 OMIT 2 CER-X5R
1/32W
MF
01005 2
1
R2702 XW2707
0201
ROOM=TRISTAR
ROOM=ACC_BUCK 200K A2 SHORT-20L-0.05MM-SM
0.1% ROOM=TRISTAR
S
1/32W B1 B2 1 NO_XNET_CONNECTION=1
TF
2 01005 #25741319: Change to 4UF
ROOM=ACC_BUCK
20
ACC_BUCK_TO_PMU_AMUX ACT_DIODE_TO_COMP_SENSE
A1 G
ROOM=TRISTAR
PMU_AMUX_B3 FOR NOW 1
R2704
ACT_DIODE_TO_COMP_OUT
200K
0.1%
1/32W
TF
2 01005
ROOM=ACC_BUCK
ACT_DIODE_TO_COMP_POS
46 40 27 19 PP_ACC_VAR
C2706 1
0.22UF
5
10%
6.3V 2
CER-X5R VCC
01005
ROOM=ACC_BUCK
U2701
SCY992200A
4 IN+ UDFN
B ACT_DIODE_TO_COMP_NEG 3 IN-
VOUT 6
B
NC 2 NC #26434500: Divider to all 200kohm,0.1%
#25987909: To Resistor Divider
VEE
1
R2706 ROOM=ACC_BUCK
1
R2703
1
200K 200K
0.1% 0.1%
1/32W 1/32W
TF TF
2 01005 2 01005
ROOM=ACC_BUCK ROOM=ACC_BUCK
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
D D
M2800 M2800
TRINITY TRINITY
SIP SIP
SYM 1 OF 5 SYM 4 OF 5
53 52
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN
D5 VDD TIG B5 TIGRIS_BUCK_LX 21
53 52
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN
D2 VDD BL1 F6 BL_SW1_LX 37
C C
46 41 40 39 37 35 34 33 31 28 46 41 40 39 37 35 34 33 31 28
D6 VDD TIG B6 D3 VDD BL1 G6
F2 VDD BL1 H6
A3 GND
M2800 GND H1
G2 VDD BL1 J6 TRINITY
A4 GND GND H3
H2 VDD SIP
BL2 B2 BL_SW2_LX A5 GND SYM 5 OF 5 GND H4
J2 VDD
37
GND1S
GND2S
GND1
GND2
A1
A2
P7
P6
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
D FL2902 D
33-OHM-25%-1500MA
19 PP1V2_NH_NV_DVDD 1 2 PP1V2_NH_DVDD_CONN 45
0201
ROOM=FOREHEAD 1 C2916 1 C2915 1 C2903
20%
2.2UF 0.1UF
20% 5%
220PF FL2910
150OHM-25%-200MA-0.7DCR
6.3V 6.3V
2 X5R-CERM 2 X5R-CERM 2 10V
C0G-CERM
0201-1 01005 01005 1 2
ROOM=FOREHEAD ROOM=FOREHEAD 53 41 40 19 PP3V0_TRISTAR_ANT_PROX PP3V0_PROX_CONN
ROOM=FOREHEAD
01005
ROOM=FOREHEAD 1 C2927 1 C2908
FL2903 2.2UF
20%
220PF
5%
10-OHM-750MA #24511567: Remove C2918
2 6.3V 2 10V
X5R-CERM C0G-CERM
19 PP2V9_NH_AVDD 1 2 PP2V9_NH_AVDD_CONN 45
0201-1 01005
ROOM=FOREHEAD ROOM=FOREHEAD
01005-1
ROOM=FOREHEAD 1 C2909 1 C2901 1 C2904
2.2UF 0.1UF 220PF
20% 20% 5%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 10V
C0G-CERM
0201-1 01005 01005
ROOM=FOREHEAD ROOM=FOREHEAD ROOM=FOREHEAD
FL2907
150OHM-25%-200MA-0.7DCR
SPEAKER2 2
220PF
5%
10V
C0G-CERM
01005
1 2 ROOM=FOREHEAD
9 AP_TO_NH_CLK AP_TO_NH_CLK_CONN 45
01005
1 C2910 SPEAKERAMP2_TO_SPEAKER_OUT_POS
C C
46 45 33
ROOM=FOREHEAD
56PF NO_XNET_CONNECTION=1
5%
25V
2 NP0-C0G-CERM
1 C2935
01005 220PF
5%
ROOM=FOREHEAD 10V
2
FL2908 C0G-CERM
01005
150OHM-25%-200MA-0.7DCR ROOM=FOREHEAD
1 2 SPEAKERAMP2_TO_SPEAKER_OUT_NEG 33 45 46
9 AP_TO_NH_SHUTDOWN_L AP_TO_NH_SHUTDOWN_CONN_L
01005
ROOM=FOREHEAD 1 C2911 NO_XNET_CONNECTION=1
C2931 1
220PF
5%
10V
220PF
2 C0G-CERM 5%
10V 2
01005 C0G-CERM
ROOM=FOREHEAD
01005
ROOM=FOREHEAD
R2903
0.00
33 SPEAKER_TO_SPEAKERAMP2_VSENSE_P 1 2 SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_P 45
0% NO_XNET_CONNECTION=1
1/32W
1 C2933
CONVOY I/O
MF
01005
ROOM=FOREHEAD 220PF
5%
#25657495: Update FL2905 to 100ohm 2 10V
C0G-CERM
01005
R2905 ROOM=FOREHEAD
33 PDM_ADARE_TO_CONVOY_CLK 1
100 2 PDM_ADARE_TO_CONVOY_CLK_CONN 45
R2904
0.00
SPEAKER_TO_SPEAKERAMP2_VSENSE_N 1 2 SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_N
5%
1/32W
MF
1 C2905 33
0%
45
56PF NO_XNET_CONNECTION=1
01005
ROOM=FOREHEAD 5%
2 25V
1/32W
MF
01005
1 C2934
NP0-C0G-CERM
01005 ROOM=FOREHEAD 220PF
5%
B FL2906
ROOM=FOREHEAD 2 10V
C0G-CERM
01005 B
ROOM=FOREHEAD
150OHM-25%-200MA-0.7DCR
33 PDM_CONVOY_TO_ADARE_DATA 1 2 PDM_CONVOY_TO_ADARE_DATA_CONN 45
01005
ROOM=FOREHEAD 1 C2906
56PF
5%
2 25V
NP0-C0G-CERM
01005
ROOM=FOREHEAD MIC3 FL2914
150OHM-25%-200MA-0.7DCR
32 PP_CODEC_TO_FRONTMIC3_BIAS 1 2 PP_CODEC_TO_FRONTMIC3_BIAS_CONN 45
01005
ROOM=FOREHEAD 1 DZ2905
PROX/ALS I/O #25170697: R2915 to 240ohm/C2921 to 220pF
2
6.8V-100PF
01005
ROOM=FOREHEAD
R2915
PROX_BI_AP_AOP_INT_PWM_L 1
240 2 PROX_BI_AP_AOP_INT_PWM_L_CONN
FL2904
13 12 45 150OHM-25%-200MA-0.7DCR
1%
1/32W
MF
1 C2921 31 FRONTMIC3_TO_CODEC_AIN4_N 1 2 FRONTMIC3_TO_CODEC_AIN4_CONN_N 45
01005 220PF 01005 NO_XNET_CONNECTION=1
5%
ROOM=FOREHEAD
2 10V
C0G-CERM
ROOM=FOREHEAD 1 DZ2906
01005 6.8V-100PF
01005
ROOM=FOREHEAD ROOM=FOREHEAD
2
FL2911 FL2909
150OHM-25%-200MA-0.7DCR 150OHM-25%-200MA-0.7DCR
A 12 ALS_TO_AP_INT_L 2 1 ALS_TO_AP_INT_CONN_L
01005
45 31 FRONTMIC3_TO_CODEC_AIN4_P 2
01005
1
NO_XNET_CONNECTION=1
FRONTMIC3_TO_CODEC_AIN4_CONN_P 45
SYNC_MASTER=Sync
A
DZ2907
SYNC_DATE=05/17/2016
1 PAGE TITLE
1 C2924 ROOM=FOREHEAD
6.8V-100PF spare
ROOM=FOREHEAD 56PF 01005
ROOM=FOREHEAD
5% 2 DRAWING NUMBER SIZE
2 25V
NP0-C0G-CERM
01005
ROOM=FOREHEAD Apple Inc. 051-00419 D
REVISION
R
8.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D CRITICAL
D
ROOM=CODEC
U3101
WLCSP-1
41 LOWERMIC1_TO_CODEC_AIN1_P L2 AIN1+ SYM 1 OF 3 AOUT1+ L9 NC
LOWERMIC1_TO_CODEC_AIN1_N AOUT1-
WAS FOR RECEIVER; REPLACED BY SPEAKER IN D1xy
41 L1 AIN1- M9NC
CS42L71
AOUT2+ L8 NC
AOUT2- M8NC
HPOUTA K10NC
41 LOWERMIC4_TO_CODEC_AIN2_P K3 AIN2+ HPOUTB K11NC
41 LOWERMIC4_TO_CODEC_AIN2_N L3 AIN2-
HS3 M5
HS4 M4
HS3_REF L10
HS4_REF M10
44 REARMIC2_TO_CODEC_AIN3_P K2 AIN3+
44 REARMIC2_TO_CODEC_AIN3_N K1 AIN3-
HSIN+ D1 NC
HSIN- E1 NC
29 FRONTMIC3_TO_CODEC_AIN4_P J3 AIN4+
For Borealis
29 FRONTMIC3_TO_CODEC_AIN4_N J4 AIN4-
C HPDETECT J9 NC C
NC F1 AIN5+
NC G1 AIN5-
NC F2 AIN6+ ROOM=CODEC
NC F3 AIN6- C3107
100PF
1 2
5%
16V
44 HAWKING_TO_CODEC_AIN7_P G2 AIN7+
R3104
20.0
NP0-C0G
01005
1 2 90_MIKEYBUS_DATA_P 40
44 HAWKING_TO_CODEC_AIN7_N G3 AIN7-
5%
1/32W
MF
NC A4 DMIC1_CLK DP J12 90_MIKEYBUS_CALTRA_DATA_P 01005
ROOM=CODEC
NC B4 DMIC1_DATA DN H12 90_MIKEYBUS_CALTRA_DATA_N
C4 DMIC2_CLK
MBUS_REF G10 MIKEYBUS_REFERENCE 41
R3103
20.0
NC C3 DMIC2_DATA 1 2 90_MIKEYBUS_DATA_N 40
5%
NC A3 DMIC3_CLK 1/32W
NC B3 DMIC3_DATA 1
R3101
MF
01005
ROOM=CODEC
C3106
100PF
100
NC A2 DMIC4_CLK 5% 1 2
1/32W
NC B2 DMIC4_DATA MF
01005 5%
B 33 PDM_CODEC_TO_SPKAMP2_CLK A9 PDM_CLK
2ROOM=CODEC 16V
NP0-C0G
01005
B
ROOM=CODEC
33 PDM_CODEC_TO_SPKAMP2_DATA B9 PDM_DATA
53
27 26 25 23 21 19 18 10 9 4
52 46 41 40 39 37 35 34 33 28
PP_VDD_MAIN
A 1 C3112 1 C3113 SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
220PF 220PF PAGE TITLE
5%
2 10V
C0G-CERM
5%
2 10V
C0G-CERM
spare
01005 01005 DRAWING NUMBER SIZE
ROOM=CODEC ROOM=CODEC
Apple Inc. 051-00419 D
AC return path for Mikeybus which is referenced to GND and VDD_MAIN REVISION
Radar 21203307
R
8.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
CODEC_AGND 32
53 38 37 25 23 19 PP_VDD_BOOST
1 C3212 1 C3214 1 C3205
0.1UF 0.1UF 2.2UF
20% 20% 20%
6.3V 6.3V 6.3V
2 X5R-CERM 2 X5R-CERM 2 X5R-CERM
01005 01005 0201-1 47 41 40 37 36 32 21 20 18 16 PP1V8_SDRAM
ROOM=CODEC ROOM=CODEC ROOM=CODEC 53 52 48
47 41 40 37 36 32 21 20 18 16 PP1V8_SDRAM
1
R3201
53 52 48 1.00K
1 C3211 1 C3213 1 C3215 5%
1/32W
MF
10UF 0.1UF 0.1UF
20% 20% 20% 2 01005
ROOM=CODEC
6.3V 6.3V 6.3V
2 CERM-X5R 2 X5R-CERM 2 X5R-CERM D3
CODEC_RESET_L H3 RESET* JTAG_TMS
0402-9
ROOM=CODEC
01005
ROOM=CODEC
01005
ROOM=CODEC PP1V2_VD_FILT R3202 1
JTAG_TCK D4
NC
NC
100K D2
JTAG_TDI
1 C3217 1 C3221
5%
1/32W
MF
U3101 JTAG_TDO C2
NC
01005 2 K8 WAKE* WLCSP-1 NC
1.0UF 1.0UF NC SYM 3 OF 3
VD G12
20% 20%
VD D12
VPROG_CP H11
VP_MBUS H10
VD_FILT E12
VCP J11
ROOM=CODEC D11
VP M7
VD_FILT C1
VL A5
6.3V 6.3V AUDIO_TO_AOP_INT_L
VA J1
2 X5R 2 X5R 35 34 33 13 K9 INT* CS42L71 TSTO NC
0201-1 0201-1 ROOM=CODEC
TSTO B10
CRITICAL NC
ROOM=CODEC ROOM=CODEC
SPI_AP_TO_CODEC_CS_L C9 CS* TSTO D5
11
NC
C 36 11 SPI_AP_TO_CODEC_MAGGIE_SCLK C8 CCLK TSTO D6
E5
NC C
TSTO NC
C3203 36 11 SPI_AP_TO_CODEC_MAGGIE_MOSI B8 MOSI TSTO E6
NC
4.7UF PP_CODEC_TO_LOWERMIC1_BIAS M6 MIC1_BIAS FLYP K12NC
LOWERMIC1_TO_CODEC_BIAS_FILT_RET 1 2
41
LOWERMIC1_BIAS_FILT_IN K7 MIC1_BIAS_FILT
U3101 36 11 SPI_CODEC_MAGGIE_TO_AP_MISO A8 MISO TSTO E7
NC
41
WLCSP-1 TSTO K4
NC
20% SYM 2 OF 3 I2S_AP_TO_CODEC_MCLK C12 MCLK
11
6.3V
X5R-CERM1 CS42L71 C10
402 ROOM=CODEC TSTI
ROOM=CODEC CRITICAL I2S_MAGGIE_TO_AP_L26_CODEC_BCLK C6 ASP_SCLK TSTI D10
C3204
36 35 34 33 11
2
X5R-CERM1
402
1 C3223 1 C3224 GND F4
ROOM=CODEC 1.0UF 1.0UF GND F5
XW3203 20% 20%
B SHORT-20L-0.05MM-SM
ROOM=FOREHEAD
2 6.3V
X5R
0201-1
2 6.3V
X5R
0201-1 GNDCP L11
GND
GND
F6
F7
B
1NO_XNET_CONNECTION ROOM=CODEC ROOM=CODEC
GND F8
OMIT F9
GND
GND F10
1 C3222 1 C3225 GND G4
1.0UF 1.0UF GND G5
20% 20%
2 6.3V 2 6.3V GND G6
X5R X5R
0201-1 0201-1 GND G7
ROOM=CODEC ROOM=CODEC
-VCP_FILT M11NC GND G8
F12 GND G9
LP_FILT+ CALTRA_LP_FILTP H6
GND
GND H7
1 C3220 GND H8
0.1UF GND H9
20%
2 6.3V
X5R-CERM
01005 GND J8
NC M3 HS_BIAS_FILT ROOM=CODEC
1 C3208
10UF
20%
2 6.3V
CERM-X5R
0402-9
GNDHS
ROOM=CODEC
GNDD
GNDD
GNDD
GNDD
GNDP
GNDA
FILT- H2
A A
A6
B1
E11
F11
L4
L7
J2
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
PAGE TITLE
CODEC_AGND 32
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DRAWING NUMBER SIZE
8.0.0
2 1 NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
53
27 26 25 23 21 19 18 10 9 4
52 46 41 40 39 37 35 34 31 28
PP_VDD_MAIN PP1V8_VA 19 32 34 35
A5
F5
CRITICAL
L3302 VP VA
C 1.2UH-20%-3.0A-0.080OHM C
1 2 SPEAKERAMP2_LX A2 SW U3301 VBST_B A1 PP_SPKR2_VBOOST
PIQA20161T-SM B2 SW CS35L26-A1 VBST_B B1
ROOM=SPKAMP2
WLCSP
1 C3312 1 C3311 1 C3324 1 C3325 1 C3306 1 C3308
47 I2C2_AP_SDA D6 SDA VBST_A C1 220PF 0.1UF 10UF 10UF 10UF 10UF
ROOM=SPKAMP2 5% 10% 20% 20% 20% 20%
VBST_A D1 2 10V
C0G-CERM 2 16V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM
47 I2C2_AP_SCL E6 SCL CRITICAL 01005 0201 0402-8 0402-8 0402-8 0402-8
ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2
35 34 32 13 AUDIO_TO_AOP_INT_L A7 INT*
12 AP_TO_SPKAMP2_RESET_L A6 RESET*
1 C3319
1
R3301 34 SPKAMP1_TO_SPKAMP2_SYNC F6 ALIVE/SYNC ISNS+ F1 SPEAKERAMP2_ISENSE_P 0.01UF
100K ISNS- E1 SPEAKERAMP2_ISENSE_N 10%
6.3V
5% 29 PDM_ADARE_TO_CONVOY_CLK PDM_ADARE_TO_CONVOY_CLK E5 AD0/PDM_CLK1 2 X5R
1/32W MAKE_BASE=TRUE 01005
MF
2 01005 I2S_AOP_TO_MAGGIE_L26_MCLK B7 MCLK ROOM=SPKAMP2
R3304
36 35 34 13
1 NO_XNET_CONNECTION
ROOM=SPKAMP2 VSNS+ E2 SPEAKER_TO_SPEAKERAMP2_VSENSE_P 29
100K 36 35 34 32 11 I2S_MAGGIE_TO_AP_L26_CODEC_BCLK C7 SCLK
5% VSNS- E3 SPEAKER_TO_SPEAKERAMP2_VSENSE_N 29
1/32W
MF 36 35 34 32 11 I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK C6 LRCK/FSYNC
2 01005
ROOM=SPKAMP2
36 35 34 32 I2S_MAGGIE_TO_L26_CODEC_DOUT D7 SDIN SPEAKERAMP2_TO_SPEAKER_OUT_POS
OUT+ D2 29 45 46
A3
A4
B3
B4
C3
C4
C5
D3
D4
B5
E4
F2
B 2
10%
10V
X5R B
402-1
ROOM=SPKAMP2
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
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DRAWING NUMBER SIZE
SPEAKER AMPLIFIER 1
(South)
D D
#25112685,Remove C3414
See SPKAMP1 C3424 on Pg46
53
27 26 25 23 21 19 18 10 9 4
52 46 41 40 39 37 35 33 31 28
PP_VDD_MAIN PP1V8_VA 19 32 33 35
A5
F5
C VP VA C
A2 A1
TO TRINITY 28 SPEAKERAMP1_LX
B2
SW U3402 VBST_B
B1
PP_SPKR1_VBOOST
SW CS35L26-A1 VBST_B
D6 WLCSP C1
1 C3427 1 C3428 1 C3403 1 C3404 1 C3431 1 C3432
48 I2C_AOP_SDA SDA VBST_A 220PF 0.1UF 10UF 10UF 10UF 10UF
ROOM=SPKAMP1 D1 5% 10% 20% 20% 20% 20%
E6 VBST_A 10V 16V 10V 10V 10V 10V
2 C0G-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM
48 I2C_AOP_SCL SCL CRITICAL 01005 0201 0402-8 0402-8 0402-8 0402-8
A7 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1
35 33 32 13 AUDIO_TO_AOP_INT_L INT*
PULLED LOW ON PG 35
A6
35 13 AOP_TO_SPKAMP1_ARC_RESET_L RESET*
SPKAMP1_TO_SPKAMP2_SYNC
F6
ALIVE/SYNC ISNS+
F1
SPEAKERAMP1_ISENSE_P
1 C3430
33
E1 0.01UF
E5 ISNS- SPEAKERAMP1_ISENSE_N 10%
6.3V
MAKE_BASE=TRUE GND AD0/PDM_CLK1 2 X5R
B7 01005
36 35 33 13 I2S_AOP_TO_MAGGIE_L26_MCLK MCLK ROOM=SPKAMP1
E2 NO_XNET_CONNECTION
C7 VSNS+ SPEAKER_TO_SPEAKERAMP1_VSENSE_P 41
36 35 33 32 11 I2S_MAGGIE_TO_AP_L26_CODEC_BCLK SCLK E3
VSNS- SPEAKER_TO_SPEAKERAMP1_VSENSE_N 41
C6
36 35 33 32 11 I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK LRCK/FSYNC
D7
36 35 33 32 I2S_MAGGIE_TO_L26_CODEC_DOUT SDIN D2
OUT+ SPEAKERAMP1_TO_SPEAKER_OUT_POS 41
B6 C2
36 35 33 32 I2S_L26_CODEC_TO_MAGGIE_DIN SDOUT OUT- SPEAKERAMP1_TO_SPEAKER_OUT_NEG 41
F7
NC PDM_CLK0
E7
PDM_DATA0 FILT+
F4
SPEAKERAMP1_FILT
C3422 1 1 C3434
NC 1000PF 1000PF
D5 F3 10% 10%
PDM_DATA1 AD1 10V 2 2 10V
GNDP GNDA 1 C3429 X5R
01005
X5R
01005
A3
A4
B3
B4
C3
C4
C5
D3
D4
B5
E4
F2
20%
2 6.3V
X5R-CERM
0201-1
ROOM=SPKAMP1
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
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DRAWING NUMBER SIZE
ARC DRIVER
D D
C C
A5
F5
VP VA
A2 A1 VOLTAGE=8.0V
TO TRINITY 28 ARC1_LX
B2
SW U3502 VBST_B
B1
PP_ARC1_VBOOST
SW CS35L26-A1 VBST_B
D6 WLCSP C1
1 C3526 1 C3535 1 C3537 1 C3524 1 C3538 1 C3539
48 I2C_AOP_SDA SDA VBST_A 220PF 0.1UF 10UF 10UF 10UF 10UF
ROOM=SPKAMP2 D1 5% 10% 20% 20% 20% 20%
E6 VBST_A 2 10V 2 16V 2 10V 2 10V 2 10V 2 10V
I2C_AOP_SCL SCL CRITICAL C0G-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM
48 01005 0201 0402-8 0402-8 0402-8 0402-8
A7 ROOM=ARC1 ROOM=ARC1 ROOM=ARC1 ROOM=ARC1 ROOM=ARC1 ROOM=ARC1
34 33 32 13 AUDIO_TO_AOP_INT_L INT*
A6
34 13 AOP_TO_SPKAMP1_ARC_RESET_L RESET*
D7
10PF 36 34 33 32 I2S_MAGGIE_TO_L26_CODEC_DOUT SDIN D2 VOLTAGE=8.0V
5%
16V 2 OUT+ ARC1_TO_SOLENOID1_OUT_POS 41
CERM B6 C2
01005 36 34 33 32 I2S_L26_CODEC_TO_MAGGIE_DIN SDOUT OUT- VOLTAGE=8.0V ARC1_TO_SOLENOID1_OUT_NEG 41
ROOM=ARC1 F7
NC PDM_CLK0
E7 F4
B NC PDM_DATA0 FILT+ ARC1_FILT C3529 1 1 C3542 B
D5 F3 1000PF 1000PF
PDM_DATA1 AD1 10% 10%
GNDP GNDA 1 C3536 10V 2
X5R 2 10V
X5R
01005 01005
2.2UF
A3
A4
B3
B4
C3
C4
C5
D3
D4
B5
E4
F2
20% ROOM=ARC1 ROOM=ARC1
2 6.3V
X5R-CERM
0201-1
ROOM=ARC1
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
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DRAWING NUMBER SIZE
D D
MAGGIE LDO
APN: 353S00842
MAGGIE
APN: 336S00020
U3603
LD39130S-1.2V/AP
47 41 40 37 36 32 21 20 18 16 PP1V8_SDRAM A1 IN CSP OUT A2 PP1V2_MAGGIE
53 52 48
B1 EN 1 C3605 1 C3601
GND
4UF
20%
0.1UF
20%
6.3V 6.3V
2 CER-X5R 2 X5R-CERM
B2
0201 01005
ROOM=ARC_CTRL ROOM=ARC_CTRL
R3601
100
1 2 PP1V2_MAGGIE_PLL
C3602
5%
1/32W 1
MF
01005 0.1UF
ROOM=ARC_CTRL 20%
2 6.3V
X5R-CERM
01005
ROOM=ARC_CTRL
C C
VPP_2V5 must be > 1.71V for SPI Slave programming
36 24 18 PP1V8_MAGGIE_IMU
1 C3604 1 C3606
2.2UF 0.1UF
C4
D4
C3
A4
B3
A5
20% 20%
6.3V 6.3V
2 X5R-CERM 2 X5R-CERM
SPI_VCCIO1
VCCIO_0
VCCIO_2
VCCPLL
VPP_2V5
VCC
0201-1 01005
ROOM=ARC_CTRL ROOM=ARC_CTRL
ICE5LP4K-SWG36I
NC
A2 IRLED U3602 IOB_10A B4
NC
R3604 MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC
F4 33.2
IOB_11B_G5 I2S_MAGGIE_TO_AP_L26_CODEC_BCLK_R 1 2 I2S_MAGGIE_TO_AP_L26_CODEC_BCLK
HOMER STM32L0
STM32L03 APN: 337S00231
MICRO NC
NC
C6 RGB0
B6 RGB1
WLCSP
IOB_12A_G4_CDONE
IOB_16A
E4
F3
MAGGIE_TO_AP_CDONE
UART_AOP_TO_MAGGIE_TXD
12 1%
1/32W
11 32 33 34 35
BANK 0
MF
A6 RGB2 13
01005
NC IOB_20A E3 I2S_MAGGIE_TO_AP_DIN 11 ROOM=ARC_CTRL MAGGIE <-> AP (SDIN)
36 MAGGIE_TO_HOMER_WAKE B5 IOT_46B_G0 IOB_25B_G3 C2 I2S_AOP_TO_MAGGIE_L26_MCLK 13 33 34 35
BANK 1
IOB_26A B1 I2S_MAGGIE_TO_L26_CODEC_DOUT 32 33 34 35 MAGGIE <-> ARC, SPKRS, CODEC (SDOUT)
D2 PP1V8_MAGGIE_IMU 18 24 36
F6 IOB_27B I2S_L26_CODEC_TO_MAGGIE_DIN 32 33 34 35 MAGGIE <-> ARC, SPKRS, CODEC (SDIN)
SPI_MAGGIE_TO_HOMER_POS_SCLK IOB_2A
E6 IOB_3B_G6
IOB_29B E2 I2S_AP_TO_MAGGIE_DOUT 11 MAGGIE <-> AP (SDOUT) 1
R3605 1
R3602
BANK 2
PP1V8_SDRAM IOB_30A C1 10K 10K
47 41 40 37 36 32 21 20 18 16
53 52 48 D6 IOB_4A 5% 5%
NC IOB_31B B2 I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC 1/32W 1/32W
SPI_HOMER_TO_MAGGIE_POS_MISO D5 IOB_5B
11 32 33 34
C3603
35 MF MF
1 IOB_32A_SPI_SO F2 SPI_CODEC_MAGGIE_TO_AP_MISO
AOP_TO_MAGGIE_EN F5 IOB_6A
11 32
2 01005 2 01005
2.2UF 13
IOB_33B_SPI_SI D1 SPI_AP_TO_CODEC_MAGGIE_MOSI
20% MAGGIE_TO_AOP_INT E5 IOB_7B
11 32
6.3V 13
IOB_34A_SPI_SCK E1 SPI_AP_TO_CODEC_MAGGIE_SCLK
X5R-CERM 2 11 32
B
0201-1
ROOM=HOMER IOB_35B_SPI_CSN F1 SPI_AP_TO_MAGGIE_CS_L 9
B
CRESET_B D3 AP_TO_MAGGIE_CRESETB_L 12
GND_LED
ROOM=ARC_CTRL
PP3601
P2MM-NSM
SM PP 1
CRITICAL 1
R3603
GND
GND
ROOM=HOMER 511K
D1
C4
1%
PP3602 SM PP 1
VDD VDDA
1/32W
A1
C5
A3
P2MM-NSM MF
2 01005
ROOM=HOMER
U3601
STM32L031E6Y6D
E5 PA0_CLK_INROOM=HOMER PB0 E2
NC
B4 PA1 PB1 D2 SPI_MAGGIE_TO_HOMER_POS_MOSI
NC WLCSP
12 UART_HOMER_TO_AP_RXD D4 PA2 PB3 B2
12 UART_AP_TO_HOMER_TXD E4 PA3 PB6 A3
36 MAGGIE_TO_HOMER_WAKE
B3 PA4 PB7 A4
NC
R3607 NC
D3 PA5
B5
1
100 2 AP_BI_HOMER_BOOTLOADER_ALIVE_R E3 PA6 PC14_OSC32_IN NC
PC15_OSC32_OUT C5
5% C3 PA7 NC NOTE: RESET HAS INTERNAL 65K PULLUP
1/32W NC
MF 13 HOMER_TO_AOP_WAKE_INT C1 PA8 RST* D5 PMU_TO_HOMER_RESET_L 20
01005
I2C_HOMER_SCL B1 PA9
ROOM=HOMER 47 41
ROOM=HOMER
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DRAWING NUMBER SIZE
C3 E2
39 20 LCM_TO_CHESTNUT_PWR_EN LCM_EN VNEG(SUB)
200K INT PD
C2 A4
40 20 13 7 PMU_TO_AOP_TRISTAR_ACTIVE_READY RESET* HVLDO1 PP5V7_MESON_AVDDH 39
NO INT PULL
E1 A3
20 CHESTNUT_TO_PMU_ADCMUX ADCMUX HVLDO2 PP5V7_LCM_AVDDH 39
PGND1
PGND2
AGND
A1
HVLDO3 PP5V1_TOUCH_VDDH 39
C1
B1
D4
1UF
20%
10UF 10UF 10UF 4.7UF 4.7UF 220PF
20% 20% 20% 20% 20% 5%
16V 10V 10V 10V
2 CER-X5R 2 X5R-CERM 2 X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 C0G-CERM
0201 0402-8 0402-8 0402-8 0402 0402 01005
ROOM=CHESTNUT ROOM=CHESTNUT ROOM=CHESTNUT ROOM=CHESTNUT ROOM=CHESTNUT ROOM=CHESTNUT ROOM=CHESTNUT
PLACE_NEAR=U3701:2MM
D4 IN DSBGA OUT A1
CRITICAL
48 47 41 40 36 32 21 20 18 16
53 52
PP1V8_SDRAM D3 VIO/HWEN SW1 C4
53 26 BB_TO_STROBE_DRIVER_GSM_BURST_IND D2 INHIBIT
GND
GND
B B
B3
B4
1
R3701
200K
1%
1/32W
MF
01005
2
ROOM=BACKLIGHT
L3703
1.0UH-20%-0.4A-0.636OHM
53 52
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN 1 2 POS18V0_MESA_LX
46 41 40 39 37 35 34 33 31 28
0403
C3718 1 ROOM=MOJAVE
CRITICAL
10UF
20% U3702
6.3V LM3638A0 PP16V0_MESA
CERM-X5R 2 BGA
0402-9
ROOM=MOJAVE B1 SW
ROOM=MOJAVE
CRITICAL
1 C3708 1 C3720
100PF 2.2UF
53 38 32 25 23 19 PP_VDD_BOOST A2 VIN VOUT C3 5% 20%
2 35V
NP0-C0G 2 35V
X5R
MESA_TO_BOOST_EN B2 EN_M 01005 0402
C3724 1 38 4
ROOM=MOJAVE ROOM=MOJAVE
A 10UF
20%
6.3V 2
A3 EN_S
A
PP17V0_MOJAVE_LDOIN C2 LDOIN PMID C1
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
PGND
AGND
B3
D MAMBA_TO_LCM_MDRIVE_CONN_MESA
GUARD 10
12
9
11
I2C_MESA_TURTLE_SCL_CONN
MESA_TO_BOOST_EN_CONN
48
D
FL3801 LCM_TO_MAMBA_MSYNC_CONN
38
14 13 MESA_TO_AP_INT_CONN
38
150OHM-25%-200MA-0.7DCR 45 38
2.2UF
ROOM=MAMBA_MESA
1 C3802 5%
56PF PP3801 47
I2C_TOUCH_TO_MAMBA_SCL 22 21 SPI_MESA_TO_AP_MISO_CONN
38
2 6.3V
X5R-CERM
5%
10V
NP0-C0G-CERM
01005 38 PP1V8_TOUCH_TO_MAMBA_CONN 24 23 PP2V75_MAMBA_CONN 38
0201-1 2 C0G-CERM
01005 ROOM=MAMBA_MESA
ROOM=MAMBA_MESA
ROOM=MAMBA_MESA 28 27
FL3802 30
150OHM-25%-200MA-0.7DCR ROOM=MAMBA_MESA
37 4 PP16V0_MESA 1 2 PP16V0_MESA_CONN 38
01005 53 37 32 25 23 19 PP_VDD_BOOST
ROOM=MAMBA_MESA 1 C3803
5%
2 35V
100PF
NP0-C0G
MAMBA POWER NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM TI:353S00576
01005 C3828 1 IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC.
VENDOR ALSO RECOMMENDS CIN = COUT FOR STABILITY
ST:353S00932
ROOM=MAMBA_MESA 2.2UF
20%
5
11 38 X5R-CERM C0G-CERM
01005
C
01005 0402-8
C 1
R3807 ROOM=MAMBA_MESA 1 C3816
56PF
ROOM=MAMBA_MESA ROOM=MAMBA_MESA
511K 5%
1%
1/32W
MF
2 25V
NP0-C0G-CERM
01005
R3805
2 01005 PP1V8_TOUCH 0.00
ROOM=MAMBA_MESA ROOM=MAMBA_MESA 47 46 39 38 18 1 2 PP1V8_TOUCH_TO_MAMBA_CONN 38
0%
R3809
1/32W
MF
01005
1 C3824 1 C3811
ROOM=MAMBA_MESA 2.2UF 220PF
0.00 20% 5%
11 SPI_AP_TO_MESA_SCLK 1 2 SPI_AP_TO_MESA_SCLK_CONN 38 2 6.3V
X5R-CERM
10V
2 C0G-CERM
1
R3808
511K
0%
1/32W
MF
1 C3817
56PF
MAMBA DIGITAL I/O 0201-1
ROOM=MAMBA_MESA
01005
ROOM=MAMBA_MESA
1%
01005
ROOM=MAMBA_MESA 5%
2 25V
FL3804
1/32W
MF NP0-C0G-CERM 150OHM-25%-200MA-0.7DCR
01005
2 01005
ROOM=MAMBA_MESA ROOM=MAMBA_MESA 45 MAMBA_TO_LCM_MDRIVE 1 2 MAMBA_TO_LCM_MDRIVE_CONN_MESA 38
01005 NOSTUFF
C3805 1 ROOM=MAMBA_MESA 1 C3806
56PF 56PF
R3811 5%
25V
NP0-C0G-CERM 2 2
5%
25V
33.2 01005 NP0-C0G-CERM
11 SPI_MESA_TO_AP_MISO 1 2 SPI_MESA_TO_AP_MISO_CONN 38 01005
ROOM=MAMBA_MESA ROOM=MAMBA_MESA
1%
1/32W
MF
1 C3818
01005 56PF
ROOM=MAMBA_MESA 5%
2 25V
NP0-C0G-CERM
01005
ROOM=MAMBA_MESA
R3801
681
B 11 MESA_TO_AP_INT 1 2 MESA_TO_AP_INT_CONN 38
B
1%
1/32W
MF
1 C3819
01005 100PF
ROOM=MAMBA_MESA 5%
2 16V
NP0-C0G
01005
ROOM=MAMBA_MESA
R3802
681
37 4 MESA_TO_BOOST_EN 1 2 MESA_TO_BOOST_EN_CONN 38
FL3806
1%
1/32W
MF
1 C3801 150OHM-25%-200MA-0.7DCR
01005 100PF 13 MESA_TO_AOP_FDINT 1 2 MESA_TO_AOP_FDINT_CONN 38
ROOM=MAMBA_MESA 5%
2 16V 01005
NP0-C0G
01005 ROOM=MAMBA_MESA 1 C3826
ROOM=MAMBA_MESA 100PF
5% #24543342: stuff 100pF
2 16V
NP0-C0G
01005
FL3811
150OHM-25%-200MA-0.7DCR
ROOM=MAMBA_MESA
13 AOP_TO_MESA_BLANKING_EN 1 2 AOP_TO_MESA_BLANKING_EN_CONN 38
01005
1 C3825
56PF
5%
2 25V
NP0-C0G-CERM
01005
ROOM=MAMBA_MESA
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
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DRAWING NUMBER SIZE
L3902
FL3906 65OHM-0.7-2GHZ-3.4OHM
PP1V8
240-OHM-25%-0.42A-0.31DCR
2 1 4
TAM0605 CRITICAL
SYM_VER-1
1
AP/TOUCH INTERFACE
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 29
PP1V8_LCM_CONN 45 9 90_MIPI_AP_TO_LCM_DATA0_P 90_MIPI_AP_TO_LCM_DATA0_CONN_P 45
D
0201
ROOM=DISPLAY_B2B 1 C3934 1 C3914 3 2
D
2.2UF 220PF 9 90_MIPI_AP_TO_LCM_DATA0_N 90_MIPI_AP_TO_LCM_DATA0_CONN_N 45
20% 5% ROOM=DISPLAY_B2B
2 6.3V 2 10V
L3903
X5R-CERM C0G-CERM
0201-1 01005
ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B 65OHM-0.7-2GHZ-3.4OHM
TAM0605
SYM_VER-1
CRITICAL
4 1
9 90_MIPI_AP_TO_LCM_DATA1_P 90_MIPI_AP_TO_LCM_DATA1_CONN_P 45
3 2
FL3904
9 90_MIPI_AP_TO_LCM_DATA1_N 90_MIPI_AP_TO_LCM_DATA1_CONN_N 45
150OHM-25%-200MA-0.7DCR
ROOM=DISPLAY_B2B 2 1
12 AP_TO_TOUCH_MAMBA_RESET_L AP_TO_TOUCH_MAMBA_RESET_CONN_L 38 45
FL3913
01005
ROOM=DISPLAY_B2B 1 C3915 1 C3902
150OHM-25%-200MA-0.7DCR 220PF 220PF
5% 5%
37 20 LCM_TO_CHESTNUT_PWR_EN 2 1 LCM_TO_CHESTNUT_PWR_EN_CONN 45 2 10V 10V
C0G-CERM 2 C0G-CERM
01005 01005
ROOM=DISPLAY_B2B 1 C3916 ROOM=DISPLAY_B2B
01005
ROOM=MAMBA_MESA
220PF
5%
10V
2 C0G-CERM To Display B2B To Mamba/Mesa B2B
01005
FL3908 ROOM=DISPLAY_B2B
240-OHM-25%-0.42A-0.31DCR
37 PN5V7_LCM_MESON_AVDDN 2 1 PN5V7_LCM_MESON_AVDDN_CONN
0201
ROOM=DISPLAY_B2B 1 C3909
5%
220PF FL3915
10V
2 C0G-CERM
150OHM-25%-200MA-0.7DCR
01005
01005
12 AP_TO_LCM_RESET_L 1 2 AP_TO_LCM_RESET_CONN_L 45
FL3909 ROOM=DISPLAY_B2B
1 1 C3917
240-OHM-25%-0.42A-0.31DCR R3901
C 37 PP5V7_MESON_AVDDH 2 1 PP5V7_MESON_AVDDH_CONN
100K
5% 5%
220PF C
1/32W 2 10V
C0G-CERM
0201
ROOM=DISPLAY_B2B 1 C3910 1 C3940 MF
01005
ROOM=DISPLAY_B2B 2
01005
ROOM=DISPLAY_B2B
220PF 2.2UF
20%
5%
10V
2 C0G-CERM
6.3V
2 X5R-CERM R3915
FL3910
01005 0201-1
PMU_TO_LCM_PANICB 1
10 2 PMU_TO_LCM_PANICB_CONN
FL3922
ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B 20 45 150OHM-25%-200MA-0.7DCR
33-OHM-25%-1500MA
PP1V8_TOUCH 1 2 PP1V8_TOUCH_CONN
5%
1/32W
MF
1 C3918 11 SPI_AP_TO_TOUCH_CS_L 2 1 SPI_AP_TO_TOUCH_CS_CONN_L 45
47 46 38 18
100PF 01005
C3932 1
0201
1 C3911
01005
ROOM=DISPLAY_B2B
2
5%
16V ROOM=DISPLAY_B2B 1 C3924
ROOM=DISPLAY_B2B NP0-C0G 56PF
2.2UF 220PF
20%
6.3V
X5R-CERM 2
5%
2 10V
C0G-CERM
AOP/TOUCH INTERFACE 01005
ROOM=DISPLAY_B2B
5%
2 25V
NP0-C0G-CERM
01005
0201-1 01005 ROOM=DISPLAY_B2B
ROOM=DISPLAY_B2B
FL3911 ROOM=DISPLAY_B2B
R3923
240-OHM-25%-0.42A-0.31DCR 0.00 2
2 1 11 SPI_AP_TO_TOUCH_SCLK 1 SPI_AP_TO_TOUCH_SCLK_CONN 45
PP5V1_TOUCH_VDDH PP5V1_TOUCH_VDDH_CONN
37
NOSTUFF 0%
0201
ROOM=DISPLAY_B2B 1 C3912 C3922 1
1/32W
MF
1 C3923
220PF 56PF 01005 56PF
5% 5% ROOM=DISPLAY_B2B 5%
2 10V 25V 2 25V
C0G-CERM
01005 FL3916 NP0-C0G-CERM 2
01005
NP0-C0G-CERM
01005
150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B
ROOM=DISPLAY_B2B
LCM_TO_MANY_BSYNC 2 1 LCM_TO_MANY_BSYNC_CONN
ROOM=DISPLAY_B2B
FL3924
BACKLIGHT FL3901 53 23 20 13
01005
45 150OHM-25%-200MA-0.7DCR
33-OHM-25%-1500MA
1 2
ROOM=DISPLAY_B2B 1 C3919 11 SPI_AP_TO_TOUCH_MOSI 2 1 SPI_AP_TO_TOUCH_MOSI_CONN 45
PP_LCM_BL_ANODE PP_LCM_BL_ANODE_CONN 56PF 01005
37
0201
NOSTUFF VOLTAGE=25.0V 5% ROOM=DISPLAY_B2B 1 C3925
ROOM=DISPLAY_B2B 1 C3903 2 25V
NP0-C0G-CERM
01005 5%
56PF
B 2%
220PF
2 50V
#26634069: nostuff C3903 to help desense
ROOM=DISPLAY_B2B 2 25V
NP0-C0G-CERM
01005
ROOM=DISPLAY_B2B
B
C0G
0201
ROOM=DISPLAY_B2B
FL3919
FL3917 150OHM-25%-200MA-0.7DCR
150OHM-25%-200MA-0.7DCR SPI_TOUCH_TO_AP_MISO 2 1 SPI_TOUCH_TO_AP_MISO_CONN 45
FL3902 UART_TOUCH_TO_AOP_RXD 2 1 UART_TOUCH_TO_AOP_RXD_CONN
11
01005
33-OHM-25%-1500MA 13
01005
45
ROOM=DISPLAY_B2B 1 C3926
37 PP_LCM_BL_CAT1 1 2 PP_LCM_BL_CAT1_CONN ROOM=DISPLAY_B2B 1 C3920 5%
56PF
0201 56PF 2 25V
ROOM=DISPLAY_B2B 1 C3904 5%
2 25V
NP0-C0G-CERM
01005
100PF NP0-C0G-CERM
01005 ROOM=DISPLAY_B2B
5%
2 35V
NP0-C0G FL3920
01005 FL3918 ROOM=DISPLAY_B2B 150OHM-25%-200MA-0.7DCR
FL3903 ROOM=DISPLAY_B2B 150OHM-25%-200MA-0.7DCR 12 TOUCH_TO_AP_INT_L 2 1 TOUCH_TO_AP_INT_L_CONN 45
33-OHM-25%-1500MA UART_AOP_TO_TOUCH_TXD 2 1 UART_AOP_TO_TOUCH_TXD_CONN 01005
PP_LCM_BL_CAT2 1 2 PP_LCM_BL_CAT2_CONN
13
01005
45
ROOM=DISPLAY_B2B 1 C3927
37
0201 ROOM=DISPLAY_B2B 1 C3921 5%
100PF
ROOM=DISPLAY_B2B 1 C3905 56PF
5% 2 16V
NP0-C0G
100PF 2 25V
NP0-C0G-CERM
01005
ROOM=DISPLAY_B2B
5%
2 35V 01005
NP0-C0G
01005 ROOM=DISPLAY_B2B R3908
ROOM=DISPLAY_B2B
AP_TO_CUMULUS_CLK32K 33.2
11 2 1 AP_TO_CUMULUS_CLK_32K_CONN 45
1%
1/32W
MF
1 C3928
01005 100PF
ROOM=DISPLAY_B2B 5%
2 16V
AC Coupling Caps NP0-C0G
01005
ROOM=DISPLAY_B2B
A A
PP_VDD_MAIN
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
28 27 26 25 23 21 19 18 10 9 4
53 52 46 41 40 37 35 34 33 31 PAGE TITLE
For placement "along the way" as we route from SOC to B2B. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
6 OF 53
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 6 OF 81
8 7 6 5 4 3 2 1
ESQUEMATICOS.COM
8 7 6 5 4 3 2 1
D D
53 41 29 19 PP3V0_TRISTAR_ANT_PROX PP_ACC_VAR 19 27 46
PP5V0_USB
1 C4003 1 C4002 4 21 41
TRISTAR 2
53 52
6.3V 6.3V
2 X5R
0201-1
2 X5R-CERM
01005
1 C4004 D CRITICAL
ROOM=TRISTAR ROOM=TRISTAR 0.01UF
Q4001
10%
C
6.3V
C z=0.45mm 2 X5R
01005
1 G RV3CA01ZP
<rdar:/24285280> EVT: 343S00091 (P2:343S00078) ROOM=TRISTAR TRISTAR_REVERSE_GATE DFN
ROOM=TRISTAR
R4002
ACC_PWR D5
1
VDD_1V8 F3
VDD_3V0 F4
S
10K 2 Sm Footprint: 376S00135
5%
R4001 1/32W
MF
6.34K 2 2 01005
20 TRISTAR_TO_PMU_USB_BRICK_ID 1 ROOM=TRISTAR
1%
1 C4001 1/32W
MF U4001
10%
0.01UF 01005
ROOM=PMU CBTL1610A3BUK
C3 WLCSP
2 6.3V
X5R 31 90_MIKEYBUS_DATA_P DIG_DP P_IN F6 PP5V0_USB_RVP
C4
01005 90_MIKEYBUS_DATA_N DIG_DN ACC1 C5 PP_TRISTAR_ACC1
ROOM=PMU
31
ACC2 E5 PP_TRISTAR_ACC2
4 41
1 C4006
A1 4 41
1UF
53 90_USB_BB_DATA_P USB1_DP 20%
B1
53 90_USB_BB_DATA_N USB1_DN DP1 A2 90_TRISTAR_DP1_CONN_P 4 41 2 16V
CER-X5R
L4022 TRISTAR_USB_BRICK_ID_R C2
BRICK_ID
DN1 B2 90_TRISTAR_DP1_CONN_N 4 41
0201
15NH-250MA ROOM=TRISTAR
A3 DP2 A4 90_TRISTAR_DP2_CONN_P 4 41
90_USB_AP_DATA_P 1 2 90_USB_AP_DATA_L_P USB0_DP
DN2 B4
7
0201 90_USB_AP_DATA_L_N B3 90_TRISTAR_DP2_CONN_N 4 41
USB0_DN
ROOM=TRISTAR
CON_DET_L E3 TRISTAR_CON_DETECT_L
L4021 12 UART_AP_TO_ACCESSORY_TXD E2
UART0_TX
4 41
15NH-250MA 12 UART_ACCESSORY_TO_AP_RXD E1
UART0_RX POW_GATE_EN*
21
D6 TRISTAR_TO_TIGRIS_VBUS_OFF
7 90_USB_AP_DATA_N 1 2
12 UART_AP_DEBUG_TXD F2
UART1_TX SWITCH_EN E4
POW_GATE_EN* is 6V-tolerant
PMU_TO_AOP_TRISTAR_ACTIVE_READY 7 13 20 37
PP4001
P2MM-NSM
#25714843: Remove R4003 Weak PD
0201 SM
F1
ROOM=TRISTAR 12 UART_AP_DEBUG_RXD UART1_RX HOST_RESET B6 TRISTAR_TO_PMU_HOST_RESET 20 1
PP
D2 D3
UART2_TX SDA I2C0_AP_SDA 47
D1 D4
UART2_RX SCL I2C0_AP_SCL
B NC
B
53 47
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN C6
52 46 41 39 37 35 34 33 31 28
A5 INT TRISTAR_TO_AOP_INT 13
7 SWD_DOCK_TO_AP_SWCLK JTAG_CLK E6
BYPASS TRISTAR_BYPASS
1 C4007 1 C4008 7 SWD_DOCK_BI_AP_SWDIO B5
JTAG_DIO
220PF 220PF
DVSS
DVSS
DVSS
5% 5%
2 10V
C0G-CERM 2 10V
C0G-CERM
1 C4005
01005 01005 1.0UF
20%
F5
C1
A6
ROOM=SOC ROOM=SOC 6.3V
2 X5R
0201-1
ROOM=TRISTAR
AC return path for USB pairs which is referenced to GND and VDD_MAIN
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
ROOM=DOCK_B2B 1 C4128
56PF
5%
FL4103 #26118161: Update FL4104 to 49.9ohm 25V
2 NP0-C0G-CERM
150OHM-25%-200MA-0.7DCR 01005
2 1 PP3V0_LAT_CONN R4104 ROOM=DOCK_B2B
01005
41
I2C_HOMER_SCL 1
49.9 2
I2C_HOMER_SCL_CONN FL4117
C4134
47 36 41
ROOM=DOCK_B2B 1 CKPLUS_WAIVE=I2C_PULLUP 150OHM-25%-200MA-0.7DCR
1%
1 C4135 LOWERMIC1_TO_CODEC_AIN1_CONN_NEG
220PF
D
1/32W 2 1
LOWERMIC1_TO_CODEC_AIN1_N
D MF 31 41
5% 56PF
10V 01005 01005
2 C0G-CERM
01005
ROOM=DOCK_B2B
2
5%
25V
NP0-C0G-CERM
ROOM=DOCK_B2B 1 C4129
ROOM=DOCK_B2B 01005 5%
56PF
FL4112 ROOM=DOCK_B2B 25V
2 NP0-C0G-CERM
01005
150OHM-25%-200MA-0.7DCR
FL4107 I2C_HOMER_SDA 1 2 I2C_HOMER_SDA_CONN FL4118 ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR 47 36
CKPLUS_WAIVE=I2C_PULLUP
41
150OHM-25%-200MA-0.7DCR
01005
53 40 29 19 PP3V0_TRISTAR_ANT_PROX 2 1 PP3V0_LAT1_CONN 41 1 C4136 32 PP_CODEC_TO_LOWERMIC1_BIAS 2 1 PP_CODEC_TO_LOWERMIC1_BIAS_CONN 41
01005 56PF
ROOM=DOCK_B2B 1 C4119 VOLTAGE=3.0V
2
5%
25V
01005
ROOM=DOCK_B2B
1 C4130
220PF
5%
NP0-C0G-CERM
01005 220PF
10V
2 C0G-CERM
01005 ARC1 ROOM=DOCK_B2B
5%
10V
2 C0G-CERM
01005
FL4108 ROOM=DOCK_B2B
ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR 41 35 ARC1_TO_SOLENOID1_OUT_POS FL4119
2 1
150OHM-25%-200MA-0.7DCR
53 52
32 21 20 18 16 PP1V8_SDRAM PP1V8_LAT_ARC_CONN 41
48 47 40 37 36
01005 LOWERMIC4_TO_CODEC_AIN2_P 2 1 LOWERMIC4_TO_CODEC_AIN2_CONN_POS
C4120
31 41
ROOM=DOCK_B2B 1
01005
220PF ROOM=DOCK_B2B 1 C4131
5%
10V 41 35 ARC1_TO_SOLENOID1_OUT_NEG 56PF
2 C0G-CERM 5%
01005 C4101 1 C4102 1 2 25V
NP0-C0G-CERM
01005
ROOM=DOCK_B2B 220PF 220PF
5% 5% ROOM=DOCK_B2B
R4109 10V
C0G-CERM 2
10V
C0G-CERM 2 FL4120
1
0.00 2
01005 01005 150OHM-25%-200MA-0.7DCR
53 BB_TO_LAT_ANT_SCLK BB_TO_LAT_ANT_SCLK_CONN 41 ROOM=DOCK_B2B ROOM=DOCK_B2B
LOWERMIC4_TO_CODEC_AIN2_N 2 1 LOWERMIC4_TO_CODEC_AIN2_CONN_NEG
C4121
0% 31 41
1/32W 1
01005
C4132
MF
01005
ROOM=DOCK_B2B 5%
33PF
16V
2 NP0-C0G-CERM
Antenna GPIO ROOM=DOCK_B2B 1
56PF
C
5%
C 01005
ROOM=DOCK_B2B
FL4101
25V
2 NP0-C0G-CERM
01005
150OHM-25%-200MA-0.7DCR
R4110 2 1
FL4121 ROOM=DOCK_B2B
56PF 01005
MF
01005
5%
33PF 5%
25V
ROOM=DOCK_B2B
1 C4133
ROOM=DOCK_B2B 2 220PF
2 16V
NP0-C0G-CERM
NP0-C0G-CERM 01005 5%
10V
01005
ROOM=DOCK_B2B
FL4102
ROOM=DOCK_B2B
SPEAKER1 2 C0G-CERM
01005
ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR FL4114
2 1
150OHM-25%-200MA-0.7DCR
53 BB_TO_LAT_GPO2 BB_TO_LAT_GPO2_CONN 41
01005 34 SPEAKER_TO_SPEAKERAMP1_VSENSE_P 2 1 SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_POS 41
ROOM=DOCK_B2B 1 C4111 01005
ROOM=DOCK_B2B 1 C4126
56PF 220PF
5% 5%
2 25V
NP0-C0G-CERM 2 10V
C0G-CERM
01005 01005
ROOM=DOCK_B2B
FL4115 ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR
Per ANT Erdinc, change to cap
34 SPEAKER_TO_SPEAKERAMP1_VSENSE_N 2 1 SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_NEG 41
01005
ROOM=DOCK_B2B 1 C4127
220PF
5%
VOLTAGE=14.0V 2 10V
C0G-CERM
01005
ROOM=DOCK_B2B
40 21 4 PP5V0_USB
B J4101 41 34 SPEAKERAMP1_TO_SPEAKER_OUT_POS B
C4109 1 C4105 1 C4106 1 C4107 1 C4108 1 245857 1 C4103
0.1UF 0.1UF 0.1UF 330PF 330PF F-ST-SM 220PF
10% 10% 10% 10% 10% 53 5%
25V 2 25V 2 25V 2 16V 16V 2 2 10V
X5R X5R X5R CER-X7R 2 CER-X7R C0G-CERM
0201 0201 0201 01005 01005 49 50 01005
ROOM=DOCK_B2B ROOM=DOCK_B2B ROOM=DOCK_B2B ROOM=DOCK_B2B ROOM=DOCK_B2B ROOM=DOCK_B2B
1 2 41 34 SPEAKERAMP1_TO_SPEAKER_OUT_NEG
41 34 SPEAKERAMP1_TO_SPEAKER_OUT_NEG #25429221:Carrier Dock flex to add +1 ACC2 pin
41 SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_NEG 3 4 1 C4104
46 BB_TO_LAT_GPO3_CONN 5 6 PP_TRISTAR_ACC2_CONN 41
220PF
5%
LOWERMIC4_TO_CODEC_AIN2_CONN_NEG 7 8 BB_TO_LAT_GPO2_CONN 2 10V
41
41
41
PP_CODEC_TO_LOWERMIC4_BIAS_CONN
PP_TRISTAR_ACC1_CONN
9
11
10
12
LOWERMIC4_TO_CODEC_AIN2_CONN_POS
LOWERMIC4_TO_CODEC_BIAS_FILT_RET
41
41
32
TRISTAR C0G-CERM
01005
ROOM=DOCK_B2B
40 4
40 4
90_TRISTAR_DP2_CONN_P
90_TRISTAR_DP2_CONN_N
15
17
16
18
BB_TO_LAT_ANT_SCLK_CONN
BB_TO_LAT_ANT_DATA_CONN
41
41
TRISTAR_CON_DETECT_L
R4102
2
1.00K 1
TRISTAR_CON_DETECT_CONN_L 41
USB AC Coupling
AC return path for USB pairs which is referenced to GND and VDD_MAIN
19 20 PP1V8_LAT_ARC_CONN 41
40 4
5%
90_TRISTAR_DP1_CONN_N 21 22 PP3V0_LAT1_CONN 53
PP_VDD_MAIN
40 4
90_TRISTAR_DP1_CONN_P 23 24
41 1/32W
MF
01005
1 C4116 27 26 25 23 21 19 18 10 9 4
52 46 40 39 37 35 34 33 31 28
40 4
27PF
25 26 ROOM=DOCK_B2B 5%
2 16V
1 C4143
MIKEYBUS_REFERENCE 27 28 NP0-C0G 220PF
31
LOWERMIC1_TO_CODEC_AIN1_CONN_POS 29 30 LOWERMIC1_TO_CODEC_AIN1_CONN_NEG
FL4105 01005 5%
2 10V
41 41 10-OHM-1.1A ROOM=DOCK_B2B C0G-CERM
32 LOWERMIC1_TO_CODEC_BIAS_FILT_RET 31 32 PP_CODEC_TO_LOWERMIC1_BIAS_CONN 41
1 2
01005
33 34 40 4 PP_TRISTAR_ACC1 PP_TRISTAR_ACC1_CONN 41
TRISTAR_CON_DETECT_CONN_L
ROOM=SOC
41
01005
47 I2C_MIC1_SDA_CONN 35 36 ROOM=DOCK_B2B 1 C4117 VOLTAGE=4.3V
47 I2C_MIC1_SCL_CONN 37 38 100PF
5%
A ARC1_TO_SOLENOID1_OUT_POS
39
41
40
42
ARC1_TO_SOLENOID1_OUT_NEG
ARC1_TO_SOLENOID1_OUT_POS
35 41
FL4106
2 16V
NP0-C0G
01005 SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
41 35 35 41
PAGE TITLE
SOLENOID1_TO_ARC1_VSENSE_POS 43 44 SOLENOID1_TO_ARC1_VSENSE_NEG 22-OHM-25%-1800MA ROOM=DOCK_B2B
35
41 PP3V0_LAT_CONN 45 46 I2C_HOMER_SDA_CONN
35
41 40 4 PP_TRISTAR_ACC2 1 2 PP_TRISTAR_ACC2_CONN 41
spare
DRAWING NUMBER SIZE
SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_POS 47 48 I2C_HOMER_SCL_CONN 0201
41 41
ROOM=DOCK_B2B 1 C4118 VOLTAGE=4.3V
Apple Inc. 051-00419 D
#25098110: Decrease DCR 100PF REVISION
5%
41 34 SPEAKERAMP1_TO_SPEAKER_OUT_POS 51 52 2 16V
NP0-C0G
R
8.0.0
01005 NOTICE OF PROPRIETARY PROPERTY: BRANCH
54 ROOM=DOCK_B2B
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
SHEET
6 OF 53
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 6 OF 81
8 7 6 5 4 3 2 1
ESQUEMATICOS.COM
8 7 6 5 4 3 2 1
CHASSIS_GND_BS401 4 44
PP_STROBE_DRIVER1_COOL_LED 26 45 PP_STROBE_DRIVER2_COOL_LED 26 45
FL4407
C4406 1 1 C4408 C4411 1 1 C4412 120-OHM-0.220A
220PF
5%
27PF 220PF
5%
27PF
5% 20 BUTTON_RINGER_A 1 2 BUTTON_RINGER_A_CONN 45
5%
10V 10V 16V
2 16V 01005
C0G-CERM 2
01005
NP0-C0G
01005
C0G-CERM 2
01005
2 NP0-C0G
01005 C4418 1 ROOM=LEFT_BUTTON 1
ROOM=RIGHT_BUTTON ROOM=RIGHT_BUTTON ROOM=RIGHT_BUTTON ROOM=RIGHT_BUTTON 27PF
5%
6.3V 0201
NP0-C0G 2 5.5V-6.2PF
ROOM=LEFT_BUTTON
0201 DZ4402
ROOM=LEFT_BUTTON
2
FL4404
150OHM-25%-200MA-0.7DCR CHASSIS_GND_BS401 4 44
26 STROBE_MODULE_NTC 1 2 STROBE_MODULE_NTC_CONN 45
01005
R4401 1 ROOM=RIGHT_BUTTON
1 C4407
27K 220PF
0.5%
1/32W 5% R4405
MF 2 10V
C0G-CERM 100
01005 2 01005 20 BUTTON_VOL_DOWN_L 1 2 BUTTON_VOL_DOWN_CONN_L 45
ROOM=RIGHT_BUTTON
C HAWKING R4406 C
100
#24678255:DOE with 10% and/20% cap 20 12 BUTTON_VOL_UP_L 1 2 BUTTON_VOL_UP_CONN_L 45
C4417 C4420 1
5%
1/32W
MF
1 DZ4404
0.22UF 100PF 01005 12V-33PF
01005-1
5% ROOM=LEFT_BUTTON
31 HAWKING_TO_CODEC_AIN7_N 1 2 HAWKING_TO_CODEC_AIN7_N_CONN 45
16V 2 2 ROOM=LEFT_BUTTON
NP0-C0G
01005
20%
6.3V ROOM=LEFT_BUTTON CHASSIS_GND_BS401 4 44
X5R
01005
ROOM=RIGHT_BUTTON
C4421 FL4405
0.22UF 150OHM-25%-200MA-0.7DCR
31 HAWKING_TO_CODEC_AIN7_P 1 2 HAWKING_TO_CODEC_AIN7_C_P 1 2 HAWKING_TO_CODEC_AIN7_P_CONN 45
01005
20% CKPLUS_WAIVE=MISS_N_DIFFPAIR
ROOM=RIGHT_BUTTON NOSTUFF
6.3V
X5R
01005
1 C4415 1 C4422
56PF 180PF
ROOM=RIGHT_BUTTON 5% 10%
2 25V 2 10V
NP0-C0G-CERM CERM
01005 01005
ROOM=RIGHT_BUTTON ROOM=RIGHT_BUTTON
FL4406
150OHM-25%-200MA-0.7DCR
PP1V8_HAWKING 1 2 PP1V8_HAWKING_CONN
B B
19 45
01005
ROOM=RIGHT_BUTTON 1 C4416 1 C4414
2.2UF 220PF
20% 5%
2 6.3V 2 10V
X5R-CERM C0G-CERM
0201-1 01005
FL4403
150OHM-25%-200MA-0.7DCR
32 PP_CODEC_TO_REARMIC2_BIAS 2 1 PP_CODEC_TO_REARMIC2_BIAS_CONN 45
01005
ROOM=RIGHT_BUTTON 1 C4403
220PF
5%
2 10V
C0G-CERM
01005
ROOM=RIGHT_BUTTON
FL4401
150OHM-25%-200MA-0.7DCR
31 REARMIC2_TO_CODEC_AIN3_P 2 1 REARMIC2_TO_CODEC_AIN3_CONN_P 45
01005
ROOM=RIGHT_BUTTON 1 C4404
56PF
5%
2 25V
NP0-C0G-CERM
01005
A ROOM=RIGHT_BUTTON
A
FL4402
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
PAGE TITLE
150OHM-25%-200MA-0.7DCR
2 1
spare
31 REARMIC2_TO_CODEC_AIN3_N REARMIC2_TO_CODEC_AIN3_CONN_N 45 DRAWING NUMBER SIZE
01005
Apple Inc. 051-00419 D
ROOM=RIGHT_BUTTON 1 C4405 REVISION
56PF R
8.0.0
5%
2 25V
NP0-C0G-CERM NOTICE OF PROPRIETARY PROPERTY: BRANCH
01005 THE INFORMATION CONTAINED HEREIN IS THE
ROOM=RIGHT_BUTTON PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
6 OF 53
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 6 OF 81
8 7 6 5 4 3 2 1
ESQUEMATICOS.COM
8 7 6 5 4 3 2 1
LPDP_UT_BI_AP_AUX_CONN
2
4
1
3 90_LPDP_UT_TO_AP_D0_CONN_N COMBINED BUTTON FLEX CONNECTOR
D
25 25
D 25 AP_TO_UT_SHUTDOWN_CONN_L
UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN
6
8
5
7
90_LPDP_UT_TO_AP_D0_CONN_P 25
MLB APN: 516S00150
25
FLEX APN: 516S00149
48 I2C_UT_SDA_CONN 10 9 90_LPDP_UT_TO_AP_D1_CONN_N 25
I2C_UT_SCL_CONN 12 11 90_LPDP_UT_TO_AP_D1_CONN_P
48
14 13
25
J4504
AA37D-S014SVA1
25 PP3V0_UT_SVDD_CONN 16 15 AP_TO_UT_CLK_CONN 25 F-ST-SM
19 20
46 25 PP2V9_UT_AVDD_CONN 18 17
20 19
MAKE_BASE=TRUE GND 15 16 PP_STROBE_DRIVER2_COOL_LED 26 44
25 PP1V8_UT_CONN 22 21
44 PP_CODEC_TO_REARMIC2_BIAS_CONN 1 2 STROBE_MODULE_NTC_CONN 44
25 PP2V8_UT_AF_VAR_CONN 26 25
44 REARMIC2_TO_CODEC_AIN3_CONN_N 3 4 PP1V8_HAWKING_CONN
44 REARMIC2_TO_CODEC_AIN3_CONN_P
5 6 HAWKING_TO_CODEC_AIN7_P_CONN
44
44
XW4501
SHORT-20L-0.05MM-SM
32 REARMIC2_TO_CODEC_BIAS_FILT_RET 7 8 1 2 HAWKING_TO_CODEC_AIN7_N_CONN 44
47 I2C_MIC2_SDA_CONN
9 10 BUTTON_RINGER_A_CONN 44 ROOM=RIGHT_BUTTON
47 I2C_MIC2_SCL_CONN
11 12 BUTTON_VOL_UP_CONN_L 44
44 BUTTON_POWER_KEY_CONN_L
13 14 BUTTON_VOL_DOWN_CONN_L
DISPLAY / TOUCH FLEX CONNECTOR
44
44 26 PP_STROBE_DRIVER1_COOL_LED 17 18 PP_STROBE_DRIVER2_WARM_LED 26 44
THIS ONE ---> 516S00138 RCPT (USED ON MLB)
516S00137 PLUG 44 26 PP_STROBE_DRIVER1_WARM_LED 21 22
J4502
BB35C-RA40-3A
F-ST-SM
45
41 42
47
R4501
39
TP_LCM_PIFA 21 22
38 LCM_TO_MAMBA_MSYNC_CONN 23 24 90_MIPI_AP_TO_LCM_DATA0_CONN_P 39
PMU_TO_LCM_PANICB_CONN 25 26 90_MIPI_AP_TO_LCM_DATA0_CONN_N
1 C4507 39
UART_TOUCH_TO_AOP_RXD_CONN 27 28
39
56PF 39
5% 39 LCM_TO_CHESTNUT_PWR_EN_CONN 29 30 90_MIPI_AP_TO_LCM_DATA1_CONN_P 39
2 25V
NP0-C0G-CERM
01005 38 MAMBA_TO_LCM_MDRIVE 31 32 90_MIPI_AP_TO_LCM_DATA1_CONN_N 39
ROOM=DISPLAY_B2B 39 AP_TO_LCM_RESET_CONN_L 33 34
39 4 PP_LCM_BL_CAT1_CONN 100MA 35 36 90_MIPI_AP_TO_LCM_CLK_CONN_P 39
39 4 PP_LCM_BL_CAT2_CONN 100MA 39 40
43 44
46
B B
FOREHEAD516S00146
FLEX
THIS ONE --->
CONNECTOR
RCPT (USED ON MLB)
516S00145 PLUG
J4503
245858036201829
F-ST-SM
41
37 38
29 PP2V9_NH_AVDD_CONN 1 2 90_MIPI_NH_TO_AP_DATA0_P 9
29 PP1V8_NH_IO_CONN 3 4 90_MIPI_NH_TO_AP_DATA0_N 9
5 6
29 AP_TO_NH_SHUTDOWN_CONN_L 7 8 90_MIPI_NH_TO_AP_CLK_P 9
29 AP_TO_NH_CLK_CONN 9 10 90_MIPI_NH_TO_AP_CLK_N 9
29 SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_P 11 12
29 PP3V0_ALS_CONVOY_CONN 13 14 90_MIPI_NH_TO_AP_DATA1_P 9
47 I2C_ALS_CONVOY_SCL_CONN 15 16 90_MIPI_NH_TO_AP_DATA1_N 9
48 I2C_PROX_SCL_CONN 17 18
29 PROX_BI_AP_AOP_INT_PWM_L_CONN 19 20 PP1V2_NH_DVDD_CONN 29
29 PDM_CONVOY_TO_ADARE_DATA_CONN 21 22 I2C_NH_SCL_CONN 48
A 29 FRONTMIC3_TO_CODEC_AIN4_CONN_N 23 24 I2C_NH_SDA_CONN 48
A
PP3V0_PROX_CONN SPEAKERAMP2_TO_SPEAKER_OUT_POS
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
29 25 26 29 33 46
PAGE TITLE
29
29
PDM_ADARE_TO_CONVOY_CLK_CONN
PP_CODEC_TO_FRONTMIC3_BIAS_CONN
27
29
28
30
SPEAKERAMP2_TO_SPEAKER_OUT_NEG
SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_N
29 33 46
29
spare
DRAWING NUMBER SIZE
31 32 ALS_TO_AP_INT_CONN_L
33 34 I2C_ALS_CONVOY_SDA_CONN
29
D 25 18 17 16 13 12 11 9 8 7 5
52 48 47 39 29
PP1V8 NOSTUFF 10 NC_AP_LPDP_AUX2
MAKE_BASE=TRUE
NC_AP_LPDP_AUX2
D
1 R4603 1 R4604
1
R4711
2.2K 2.2K 10K
5% 5% 5%
1/32W 1/32W 1/32W
MF MF MF
01005 01005 2 01005
2 ROOM=SOC 2 ROOM=SOC ROOM=MAMBA_MESA
I2C_TOUCH_TO_MAMBA_SCL 47
9 I2C_ISP_NV_SCL MAKE_BASE=TRUE I2C_ISP_NV_SCL 26
9 I2C_ISP_NV_SDA
MAKE_BASE=TRUE I2C_ISP_NV_SDA 26
NC Nets in Small FF
10 NC_90_LPDP_NV_TO_AP_D2_P NC_90_LPDP_NV_TO_AP_D2_P
MAKE_BASE=TRUE
UT B2B 10 NC_90_LPDP_NV_TO_AP_D2_N
MAKE_BASE=TRUE
NC_90_LPDP_NV_TO_AP_D2_N
1 C2531 1 C2507
2.2UF 2.2UF 10 NC_90_LPDP_NV_TO_AP_D3_N NC_90_LPDP_NV_TO_AP_D3_N
MAKE_BASE=TRUE
20% 20%
2 6.3V 2 6.3V
X5R-CERM X5R-CERM
0201-1 0201-1
ROOM=RCAM_B2B ROOM=RCAM_B2B
C C
NEG_COMPASS_COIL_COMP POS_COMPASS_COIL_COMP
1
XW3333
SHORT-20L-0.05MM-SM
B
NO_XNET_CONNECTION
B 2
ROOM=MAMBA_MESA
OMIT
1 C3332 1 C3333
220PF 220PF
5% 5%
2 10V
C0G-CERM 2 10V
C0G-CERM
01005 01005
#25742582,Add back C3531 in layout at ARC #26104509:C3525 Change to 1UF 0201 in DVT ROOM=SPKAMP2 ROOM=SPKAMP2
53 52
27 26 25 23 21 19 18 10 9 4
PP_VDD_MAIN 53 52
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN
46 41 40 39 37 35 34 33 31 28 46 41 40 39 37 35 34 33 31 28
C3531 1 C3525 1
10UF 1.0UF
20%
20%
10V 6.3V
X5R-CERM 2 X5R 2
0402-8 0201-1
ROOM=ARC1 ROOM=ARC1
A
53 41
01005
ROOM=DOCK_B2B 1 C4608 1 C2707
SYNC_MASTER=Sync
PAGE TITLE
SYNC_DATE=05/17/2016
56PF
5%
2 25V
NP0-C0G-CERM
2.2UF
20%
spare
01005 2 6.3V DRAWING NUMBER SIZE
X5R-CERM
ROOM=DOCK_B2B 0201-1
ROOM=TRISTAR Apple Inc. 051-00419 D
REVISION
R
8.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
AP TOUCH
PP1V8 46 39 38 18
PP1V8_TOUCH
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 29
NOSTUFF NOTE:MAMBA I2C 2.2K PULL-UPS TO PP1V8_TOUCH INSIDE GALILEO
I2C0 R4701
4.02K
1%
1
R4702
4.02K
1%
1 1
R4712
10K
ADDING R3803, R3804 AS OPTION FOR TWEAKING VALUE
1/32W 1/32W 5%
MF MF #26682438:Move to Page 46 1/32W
D
01005 2 01005 2 MF
HOMER
MF MF
I2C5
01005 01005
ROOM=SOC 2 ROOM=SOC 2
C #24544426
56PF
1 1
56PF
I2C1_AP_SCL 20
53 52
1 1 1 1
5%
2 25V 2
5%
25V
I2C1_AP_SDA 20 R4713 R4714 R4715
2.2K
R4716
2.2K
NP0-C0G-CERM NP0-C0G-CERM 1.00K 1.00K 5% 5%
01005 01005 5% 5% 1/32W 1/32W
ROOM=PMU ROOM=PMU 1/32W 1/32W MF MF
MF MF 01005 010052
2 01005 2 01005 ROOM=SOC 2 ROOM=SOC
ROOM=HOMER ROOM=HOMER
I2C_HOMER_SCL I2C5_SCL
I2C2 I2C_HOMER_SDA
36 41
36 41 I2C5_SDA
11
11
I2C1_AP_SCL 21
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 29
PP1V8 I2C1_AP_SDA 21
1 1
R4705 R4706
2.2K
5%
1/32W
2.2K
5%
1/32W
I2C3
MF MF 25 18 17 16 13 12 11 9 8 7 5 PP1V8
01005 01005 52 48 47 46 39 29
ROOM=SOC 2 ROOM=SOC 2
1 1
11 I2C2_AP_SCL MAKE_BASE=TRUE I2C2_AP_SCL 33
R4709
2.2K
R4710
2.2K
11 I2C2_AP_SDA MAKE_BASE=TRUE I2C2_AP_SDA 33
5% 5%
1/32W 1/32W
ROOM=FOREHEAD MF MF ROOM=DOCK
R4707
01005
ROOM=SOC 2
01005
ROOM=SOC 2 FL4730
0.00 150OHM-25%-200MA-0.7DCR ckplus_waive=I2C_PULLUP
1 2 I2C_ALS_CONVOY_SCL_CONN 45
0% MF 11 I2C3_AP_SCL 2 1 I2C_MIC1_SCL_CONN 41
1/32W 01005 01005
R4708 #26633265:mitigate MIC1 undershoot
TO DOCK FLEX
0.00
I2C_ALS_CONVOY_SDA_CONN FL4729
B
1 2
B 0% MF
45
I2C3_AP_SDA 2
100 1
CKPLUS_WAIVE=I2C_PULLUP
I2C_MIC1_SDA_CONN
1/32W 01005
ROOM=FOREHEAD
C4707 1 1 C4708 TO FOREHEAD FLEX 11 41
5%
56PF
5% 5%
56PF 1/32W
MF
01005
C4730 1 1 C4729
25V 2 2 25V ROOM=DOCK 56PF 56PF
NP0-C0G-CERM NP0-C0G-CERM 5% 5%
01005 01005 25V 25V
ROOM=FOREHEAD ROOM=FOREHEAD NP0-C0G-CERM 2 2 NP0-C0G-CERM
01005 01005
ROOM=DOCK_B2B ROOM=DOCK_B2B
ROOM=RIGHT_BUTTON
FL4732
150OHM-25%-200MA-0.7DCR
2 1 I2C_MIC2_SCL_CONN 45
CKPLUS_WAIVE=I2C_PULLUP
01005
FL4731 TO COMBINED BUTTON FLEX
150OHM-25%-200MA-0.7DCR
2 1 I2C_MIC2_SDA_CONN 45
CKPLUS_WAIVE=I2C_PULLUP
01005
ROOM=RIGHT_BUTTON
C4732 1 1 C4731
56PF 56PF
5% 5%
25V 2 2 25V
NP0-C0G-CERM NP0-C0G-CERM
01005 01005
ROOM=RIGHT_BUTTON ROOM=RIGHT_BUTTON
FL4742
150OHM-25%-200MA-0.7DCR
A 2 1 I2C_DISP_EEPROM_SCL_CONN 45
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
01005 PAGE TITLE
ROOM=DISPLAY_B2B
AOP
PP1V8_SDRAM
ISP
47 41 40 37 36 32 21 20 18 16
53 52 48
PP1V8_SDRAM
1 C4807
I2C 47 41 40 37 36 32 21 20 18 16
53 52 48 0.1UF
20%
I2C0
VCC B1
1 1 2 6.3V
R4801
2.2K
R4802
2.2K
X5R-CERM
01005
5% 5% ROOM=SOC PP1V8 #24550735: ISP I2C0 PU
1/32W
MF
1/32W
MF
#24544699: Support 1MHz 25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 29
2
01005
2
01005 U4802 1 1
MAX20312 R4808 R4809
D 13 I2C_AOP_SCL MAKE_BASE=TRUE
WLP
A2 IOVCC1 ROOM=SOC
5%
1.00K 5%
1.00K D
1/32W 1/32W
I2C_AOP_SDA B2 IOVCC2 MF MF
13 MAKE_BASE=TRUE 2 01005 2 01005
ROOM=SOC ROOM=SOC
A1 GND
9
I2C_ISP_UT_SCL MAKE_BASE=TRUE I2C_ISP_UT_SCL 26
R4816
I2C_AOP_SCL
I2C1 1
0.00
2 I2C_UT_SCL_CONN 45
I2C_AOP_SDA
34
34
See page 46 0%
1/32W 1 C4817
CKPLUS_WAIVE=I2C_PULLUP
MF
01005 56PF
ROOM=RCAM_B2B 5%
2 25V
I2C_AOP_SCL 35 NP0-C0G-CERM
01005
I2C_AOP_SDA 35
R4817 ROOM=RCAM_B2B
ROOM=FOREHEAD
FL4815 TO FCAM FLEX
I2C2 1
0.00 2
1
I2C_UT_SDA_CONN 45
CKPLUS_WAIVE=I2C_PULLUP
150OHM-25%-200MA-0.7DCR 25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 29
PP1V8
0%
1/32W
MF
C4816
56PF
01005 5%
2 1 I2C_PROX_SCL_CONN 45 ROOM=RCAM_B2B 25V
01005 CKPLUS_WAIVE=I2C_PULLUP 2 NP0-C0G-CERM
1 1
R4810
2.2K
R4811
2.2K
01005
ROOM=RCAM_B2B
ROOM=FOREHEAD 5% 5% MF
C Intentional R4815 Change
25V
2 NP0-C0G-CERM
01005
25V
2 NP0-C0G-CERM
01005
01005
ROOM=FOREHEAD 5%
2 25V
56PF
C
ROOM=FOREHEAD ROOM=FOREHEAD NP0-C0G-CERM
01005
ROOM=FOREHEAD
38 19 PP1V8_MESA R4813
0.00
PP1V8_SDRAM 16 18 20 21 32 36 37 40 41 47 1 2 I2C_NH_SDA_CONN 45
48 52 53 1
R4803 1
R4804 0% 1
C4813 CKPLUS_WAIVE=I2C_PULLUP
5 4.7K 4.7K 1/32W
1% 1% MF 56PF
VCC 1/32W 1/32W 01005 5%
ROOM=FOREHEAD 25V
6S U4805 3
MF
2 01005
MF
2 01005 R4806
2 NP0-C0G-CERM
74LVC1G3157GX Y0 NC ROOM=MAMBA_MESA ROOM=MAMBA_MESA
01005
ROOM=FOREHEAD
4Z X2SON6 0.00
Y1 1 I2C_AOP_SCL_ISO 2 1 I2C_MESA_TURTLE_SCL_CONN 38
GND
2 0% 1/32W
MF 01005 ROOM=MAMBA_MESA
13 AOP_TO_MESA_I2C_ISO_EN 1 C4809
1
R4805 56PF
PP1V8_SDRAM 5%
1%
511K 16 18 20 21 32 36 37 40 41 47
48 52 53 2 25V
NP0-C0G-CERM TO MAMBA/MESA FLEX
1/32W 5 01005
MF ROOM=MAMBA_MESA
VCC
2 01005
6S U4806 3
R4807
74LVC1G3157GX Y0 NC
4Z
X2SON6 0.00
Y1 1 I2C_AOP_SDA_ISO 2 1 I2C_MESA_TURTLE_SDA_CONN 38
GND
2 0% 1/32W
MF 01005 ROOM=MAMBA_MESA
1 C4810
56PF
5%
2 25V
NP0-C0G-CERM
B 01005
ROOM=MAMBA_MESA B
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
D D
C C
B B
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
This page contains items which differ accross all MLB designs
PCIe lanes
PP0801
P2MM-NSM 1
D
SM ROOM=SOC
PP
D
90_AP_PCIE3_RXD_C_P 8 52
90_AP_PCIE3_RXD_C_N 8 52
PP0802
P2MM-NSM PP
1
SM ROOM=SOC
1 2 0.1UF 90_PCIE_BB_TO_AP_RXD_P
8 90_AP_PCIE2_RXD_C_P C0816
ROOM=SOC 20% 6.3V GND_VOID=TRUE
53 MAKE_BASE=TRUE
X5R-CERM 01005
1 2 0.1UF 90_PCIE_BB_TO_AP_RXD_N
8 90_AP_PCIE2_RXD_C_N C0817 53 MAKE_BASE=TRUE
1 2 0.1UF
8 90_AP_PCIE2_TXD_C_N C0818
ROOM=SOC 20% 6.3V GND_VOID=TRUE
90_PCIE_AP_TO_BB_TXD_N 53 MAKE_BASE=TRUE
X5R-CERM 01005
25 18 17 16 13 12 11 9 8 7 5 PP1V8
48 47 46 39 29
1 R0807
100K
5%
1/32W
MF
2 01005
ROOM=SOC
52 PCIE_WLAN_BI_AP_CLKREQ_L
1 2
8 90_AP_PCIE3_RXD_C_P C0811
ROOM=SOC 20% 6.3V
0.1UF
GND_VOID=TRUE
90_PCIE_WLAN_TO_AP_RXD_P 53 MAKE_BASE=TRUE
X5R-CERM 01005
1 2
8 90_AP_PCIE3_RXD_C_N C0812
ROOM=SOC 20% 6.3V
0.1UF 90_PCIE_WLAN_TO_AP_RXD_N
GND_VOID=TRUE
53 MAKE_BASE=TRUE
X5R-CERM 01005
1 2
8 90_AP_PCIE3_TXD_C_P C0814
ROOM=SOC 20% 6.3V
0.1UF 90_PCIE_AP_TO_WLAN_TXD_P
GND_VOID=TRUE
53 MAKE_BASE=TRUE
X5R-CERM 01005
B 8 90_AP_PCIE3_TXD_C_N C0813
ROOM=SOC
1
20%
2
6.3V
0.1UF 90_PCIE_AP_TO_WLAN_TXD_N 53 MAKE_BASE=TRUE B
X5R-CERM 01005 GND_VOID=TRUE
PP3V0_NAND
A
17 19
WIFI/BT
1 106
4 WLAN_RF 107
D 6 LBEE5W11GJ-943
LGA
108 D
2 1 PP1V8_SDRAM PP_VDD_MAIN 1
18 SYM 2 OF 2
109
21 110
1 C7600_RF 1 C7601_RF 1 C7602_RF 1 C7606_RF 1 C7607_RF 24 111
27PF 0.01UF 10UF 0.01UF 27PF
5% 10% 20% 10% 5% 27 112
2 16V
NP0-C0G
6.3V
2 X5R 2 6.3V
CERM-X5R 2 6.3V
X5R 2 16V
NP0-C0G 32 113
01005 01005 0402-9 01005 01005
WLAN WLAN WLAN WLAN 34 114
VDDIO_1P8V 15
VBAT_VCC 28
VBAT_VCC 29
VBAT_RF_VCC 30
VBAT_RF_VCC 31
36 115
45 116
46 117
55 54 53 PMUGPIO_TO_WLAN_CLK32K 54 LPO_IN 47 118
IN
48 119
UART_BB_TO_WLAN_COEX 8 SECI_RX GND
54 53 IN 49 120
UART_WLAN_TO_BB_COEX 7 SECI_TX
54 53 OUT 50 121
51 122
PP1V8_SDRAM
WLAN_RF BT_DEV_WAKE 55 AP_TO_BT_WAKE IN 53 54 55
53 123
1 PMU_TO_WLAN_REG_ON 92 WL_REG_ON LBEE5W11GJ-943 57 124
R7600_RF 54 53
55 IN
10K LGA 58 125
5% 93 BT_REG_ON SYM 1 OF 2 60 126
1/32W 55 54 53 IN
PMU_TO_BT_REG_ON
MF 41 65 127
01005
2 WLAN BT_UART_RXD UART_AP_TO_BT_TXD IN 53 54 55
IN
53 54
53 54
135 C
55 54 53 UART_WLAN_TO_AP_RXD 11 FAST_UART_TX 74 136
OUT
55 54 53 UART_AP_TO_WLAN_TXD 10 FAST_UART_RX 75 137
IN
76 138
77 139
UART_WLAN_TO_AP_CTS_L 9 FAST_UART_RTS_OUT
54 53 OUT 78 140
79 141
UART_AP_TO_WLAN_RTS_L 12 FAST_UART_CTS_IN
54 53 IN 80 142
55 54 53 AP_TO_WLAN_DEVICE_WAKE 13 WL_DEV_WAKE WL_HOST_WAKE 14 WLAN_TO_PMU_HOST_WAKE 53 54 55
81 143
IN OUT
82 144
83 145
55 54 53 BT_TO_PMU_HOST_WAKE 56 BT_HOST_WAKE PCIE_CLKREQ* 17 PCIE_WLAN_BI_AP_CLKREQ_L 53 54
84 146
OUT BI
PCIE_PERST* 16 PCIE_AP_TO_WLAN_RESET_L 53 54 55
85 147
IN
86 148
56 50_WLAN_G_0 52 2G_ANT_CORE0 87 THRM_PAD 149
BI
1 50_LAT_WLAN_G_1 5 2G_ANT_CORE1 PCIE_RDP 19 90_PCIE_AP_TO_WLAN_TXD_P 53 54 55
88 150
IO IN
PCIE_RDN 20 90_PCIE_AP_TO_WLAN_TXD_N 53 54 55
89 151
IN
50_WLAN_A_0 59 5G_ANT_CORE0 90 152
56 BI
PCIE_TDP 22 90_PCIE_WLAN_TO_AP_RXD_P
50_LAT_WLAN_A_1 66 5G_ANT_CORE1 OUT 53 54
91 153
1 IO
PCIE_TDN 23 90_PCIE_WLAN_TO_AP_RXD_N OUT 53 54
94 154
PCIE_REFCLK_P 25 90_PCIE_AP_TO_WLAN_REFCLK_P 53 54 55
95 155
IN
PCIE_REFCLK_N 26 90_PCIE_AP_TO_WLAN_REFCLK_N 96 156
IN 53 54 55 C7604_RF
7.5UF 97 157
CXT_A/JTAG_TDI 63 AOP_TO_WLAN_CONTEXT_A 20%
IN 53 54 55
L7600_RF 4V 98 158
CXT_B/JTAG_TDO 3 AOP_TO_WLAN_CONTEXT_B CERM
IN 55 2.2UH-20%-0.68A-0.25OHM 0402 99 159
SR_VLX 33 SR_LVX 1 2 SR_LVX_1 1 3 100 160
B VIN_LDO 35 VIN_LDO
0806
2 4
101 161 B
102 162
103 163
1 C7603_RF 104
100PF
5% 105
2 16V
NP0-C0G
01005
WLAN
PP7600_RF PP7610_RF
P2MM-NSM OMIT P2MM-NSM OMIT
SM SM TABLE_ALT_HEAD
2 1 AOP_TO_WLAN_CONTEXT_A 1 2 1 PMUGPIO_TO_WLAN_CLK32K 1 PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
PP PP
TDI PART NUMBER
PP7601_RF PP7611_RF TABLE_ALT_ITEM
P2MM-NSM OMIT P2MM-NSM OMIT 339S00201 339S00199 ALTERNATE WLAN_RF ALT WIFI/BT MODULE
SM SM
2 1 AOP_TO_WLAN_CONTEXT_B 1 2 1 WLAN_TO_PMU_HOST_WAKE 1
PP PP
TDO
PP7612_RF
P2MM-NSM OMIT
SM
2 1 90_PCIE_AP_TO_WLAN_REFCLK_P 1
PP
PP7603_RF PP7613_RF
P2MM-NSM OMIT P2MM-NSM OMIT
SM SM
2 1 UART_WLAN_TO_AP_RXD 1 2 1 90_PCIE_AP_TO_WLAN_REFCLK_N 1
PP PP
PP7604_RF PP7614_RF
P2MM-NSM OMIT P2MM-NSM OMIT
SM SM
2 1 UART_AP_TO_WLAN_TXD 1 2 1 90_PCIE_AP_TO_WLAN_TXD_P 1
PP PP
A PP7606_RF
P2MM-NSM OMIT
PP7616_RF
P2MM-NSM OMIT
PP7621_RF
P2MM-NSM OMIT
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
SM SM SM PAGE TITLE
1 1 1
2 JTAG_WLAN_TMS PP 2 1 PCIE_AP_TO_WLAN_RESET_L PP 2 1 UART_BT_TO_AP_RXD PP
spare
PP7607_RF PP7617_RF PP7622_RF DRAWING NUMBER SIZE
P2MM-NSM OMIT P2MM-NSM OMIT P2MM-NSM OMIT
2 JTAG_WLAN_TRST_L 1
SM
2 JTAG_WLAN_SEL
SM
1 2 1 UART_AP_TO_BT_RTS_L
SM
1 Apple Inc. 051-00419 D
PP PP PP
REVISION
PP7608_RF
P2MM-NSM OMIT
PP7618_RF
P2MM-NSM OMIT
PP7623_RF
P2MM-NSM OMIT
R
8.0.0
1
SM SM
1
SM
1 NOTICE OF PROPRIETARY PROPERTY: BRANCH
2 1 AP_TO_WLAN_DEVICE_WAKE PP 2 1 PMU_TO_WLAN_REG_ON PP 2 1 UART_BT_TO_AP_CTS_L PP
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
PP7609_RF PP7619_RF PP7624_RF THE POSESSOR AGREES TO THE FOLLOWING: PAGE
P2MM-NSM OMIT P2MM-NSM OMIT P2MM-NSM OMIT
2 1 BT_TO_PMU_HOST_WAKE 1
SM
2 1 PMU_TO_BT_REG_ON
SM
1 2 1 AP_TO_BT_WAKE
SM
1
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
6 OF 53
PP PP PP
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 6 OF 81
8 7 6 5 4 3 2 1
ESQUEMATICOS.COM
8 7 6 5 4 3 2 1
D
WIFI UPPER ANTENNA FEEDS OMIT_TABLE
D
R7704_RF
2.4NH+/-0.1NH-0.370A
55 BI
50_WLAN_G_0 1 2 50_UAT_WLAN_2G_EAST BI 53
54
2GHZ UAT
01005
1 C7707_RF 1 C7708_RF
0.2PF 0.6PF
+/-0.1PF +/-0.05PF
16V
2 NP0-C0G 16V
2 CERM
01005 01005
WLAN_UP_RFFE WLAN_UP_RFFE
NOSTUFF OMIT_TABLE
OMIT_TABLE
R7703_RF
1
0.00 2
50_WLAN_A_0 50_LAT_WLAN_5G_EAST
55 BI
0%
BI 53
54 5GHZ UAT
1 C7705_RF 1/32W 1 C7706_RF
MF
0.2PF 01005 0.2PF
+/-0.1PF +/-0.1PF
2 16V 16V
2 NP0-C0G
NP0-C0G
01005 01005
WLAN_UP_RFFE WLAN_UP_RFFE
OMIT OMIT
C C
JUAT2_RF
MM8830-2600B
F-RT-SM
W5BPF_RF
OMIT_TABLE 5.15-5.85GHZ-1.2DB OMIT_TABLE
R7711_RF LFB185G53CGZE200 R7702_RF
1
0.00 2 1 3 1
0.00 2 1 2
54 53 BI
50_UAT_WLAN_5G_WEST 50_UAT_WLAN_5G_BPF 50_UAT2_BPF 50_UAT2_TEST 50_UAT2_M 1
C R
0% 0%
1/32W 1 C7709_RF 1/32W 1 C7710_RF
2
MF MF
1 C7729_RF 01005 1 C7711_RF 0.2PF 01005 0.2PF GND
+/-0.1PF +/-0.1PF
0.2PF 0.2PF 2 16V
16V
2 NP0-C0G
+/-0.1PF +/-0.1PF NP0-C0G
3
UP_RFFE
2 16V
NP0-C0G 2 16V
NP0-C0G
01005
WLAN_UP_RFFE
01005
WLAN_UP_RFFE
01005 01005 OMIT OMIT
WLAN_UP_RFFE WLAN_UP_RFFE
OMIT OMIT
B B
A SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
FAN48614BUC50X
2 PP_VDD_MAIN_NFC A3 VIN VOUT A1 VDD_NFC_5V 2
L7502_RF VOUT A2
D
1 C7521_RF
100PF
1 C7511_RF
15UF 1
1.8UH-0.7A
2 NFC_BOOST_SW
B1 SW
B2 SW
1 C7517_RF
15UF
1 C7522_RF
100PF
D
5% 20% 20% 5%
16V
2 NP0-C0G 6.3V
2 X5R 0603 6.3V
2 X5R 16V
2 NP0-C0G
NFC 2 NFC_BOOST_EN B3 EN
01005 0402-1 0402-1 01005
C1 PGND
C2 PGND
C3 AGND
NFC NFC NFC NFC
2 VDD_NFC_5V
1 C7520_RF
1UF
20%
VUP G2
C6
C7
ESE_VDD C5
AVDD D7
D3
B5
SVDD B7
TVDD E7
01005 1UF 1UF 0.22UF 20% 560
NFC 20% 20% 20% 10V
2 X5R 2 NFC_RXP 1 2 NFC_RXP_CAP 1 2
10V
2 X5R 10V
2 X5R 6.3V
2 X5R
VDD
VBAT
SIM_PMU_VCC
PVDD
0201 1%
0201 0201 01005 NFC 2% 1/20W
NFC NFC NFC 25V MF
C0G-NP0 201
0201 NFC
NFC
L7500_RF
160NH-10%-0.48A-0.33OHM
C NFC_RF F1 2 NFC_TXP 1 2 NFC_BALP C
PN67VEU3-B001D004 IC00 NC 0402
58 57 53 NFC_TO_PMU_HOST_WAKE D1 IRQ UFLGA SIM_SWIO A4 NFC_SWP 53 57
NFC 1 C7509_RF
BAL0 2
GND 1
OUT BI
57 53 SE2_PRESENT A5 SVDD_REQ GPIO0 A7 NFC_TEST_OUT 2
680PF
IN 2%
AP_TO_NFC_FW_DWLD_REQ B2 DWL IC01 A6 25V
2 C0G-NP0
57 53 IN NC
NFC_TO_BB_CLK_REQ A2 CLK_REQ TX_PWR_REQ D5 NFC_BOOST_EN 0201
ATB161006F-20011
57 53 OUT 2
NFC
BB_TO_NFC_CLK A3 NFC_CLK_XTAL1
ESE_DWPM_DBG G7
57 53 IN
BALUN_RF
UART_AP_TO_NFC_TXD C1 RX NC 180 PHASE SHIFT INTRODUCED BY BALUN
ESE_DWPS_DBG G6
58 57 53 IN
B1
SM
58 57 53 UART_NFC_TO_AP_RXD TX NC DONE FOR BEST ROUTING
OUT
58 57 53 UART_AP_TO_NFC_RTS_L D2 CTS RX+ F6 NFC_RXP 2
IN
58 57 53 UART_NFC_TO_AP_CTS_L A1 RTS RX- F5 NFC_RXN 2
OUT
4 UNBAL
PMU_TO_NFC_EN E1 VEN
3 BAL1
TX1 G3
58 57 53 IN
NFC_TXP 2
E3 L7501_RF
2 VDD_NFC_ESE SMX_RST* TX2 G5 NFC_TXN 2 160NH-10%-0.48A-0.33OHM
C7514_RF
E4 220PF
SMX_CLK TP7500_RF
NC
F4 WKUP_REQ E5 AP_TO_NFC_DEV_WAKE IN 53 57 58 2 NFC_TXN 1 2 NFC_BALN NFC_ANT_MATCH 1 2 NFC_ANT 1
A
ESE_IO1
0402 SM-TP1P25-TOP
B3
57 53 IN
SE2_READY SE2_BUSY VMID F7 NFC_VMID NFC 1 C7510_RF 2%
50V 1 C7515_RF 1 C7516_RF 1 C7518_RF OMIT
ICEFALL_LDO_ENABLE B4 IC2 680PF C0G
SE2_ENABLE F2
57 53 OUT
SE2_PWR_REQ 2% 0201 1000PF 820PF 120PF
NFC_SWP_MUX E6 EXT_MUX OUT 53 57 58
25V
2 C0G-NP0 OMIT_TABLE 2% 2% 2%
SE2_SVDD_IN G1
57 53 OUT
PP1V8_SDRAM 53 57 58
25V
2 C0G-NP0 25V
2 C0G-NP0 50V
2 NP0-C0G
IN 0201
C3 XTAL2 C7508_RF NFC C7512_RF 0201 0201 0201
NC 1000PF R7509_RF 22PF NFC NFC OMIT_TABLE
B6 DVSS
C4 DVSS
D4 AVSS
D6 AVSS
F3 AVSS
C2 PVSS
G4 TVSS
560 OMIT_TABLE
E2 VSS
B1
PP7505_RF PP7509_RF
P2MM-NSM P2MM-NSM
SM SM
2 1 UART_AP_TO_NFC_RTS_L 1 PP 2 1 AP_TO_NFC_DEV_WAKE 1 PP
OMIT OMIT R7520_RF
0.00
PP7506_RF 2 1 PP_VDD_MAIN 1 2 PP_VDD_MAIN_NFC 2
P2MM-NSM
A
SM 1%
2 1 UART_NFC_TO_AP_CTS_L 1 PP
OMIT
1/20W
MF
0201
SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
PAGE TITLE
NOSTUFF
spare
DRAWING NUMBER SIZE
BASEBAND
16 15 11 6 5 4 3 2 1 PP1V8_SDRAM
1 1
R5502_RF R5510_RF
100K 100K
1% 1%
1/32W 1/32W
MF MF
01005
2 BASEBAND 01005
2 BASEBAND
16 2 1 PCIE_AP_BI_BB_CLKREQ_L
16 5 2 1 AP_TO_BBPMU_SDWN_L
16 15 11 6 5 4 3 2 1 PP1V8_SDRAM
1
D 1%
R5500_RF
100K D
1/32W
MF
01005
2 BASEBAND
16 2 SIM1_DETECT
BB_RF
BB_RF PMB9943
16 5 4 VDD_SIM1 WF2BGA
PMB9943
WF2BGA 1 SYM 7 OF 9
R5501_RF OMIT_TABLE
SYM 1 OF 9
OMIT_TABLE 4.7K
1% U5 SYS_CLK
1/32W 69 59 IN
SYSCLK_26MHZ RXDAT_MAIN_0_1- D1 90_DIGRF_M0_RX1_N IN 59
MF
SIM CARD 1
69 SIM1_CLK G18 CC1_CLK FS 01005 RXDAT_MAIN_0_1+ D2 90_DIGRF_M0_RX1_P 59
OUT 2 BASEBAND 59 SYSCLK_26MHZ_EN V6 SYS_CLK_EN IN
69 55 SIM1_IO F19 CC1_IO FS OUT
RXDAT_MAIN_0_2- C2
BI
90_DIGRF_M0_RX2_N 59
69 SIM1_RST F18 CC1_RST FS 16 2 SIM1_IO IN
RXDAT_MAIN_0_2+ C3
OUT
90_DIGRF_M0_RX2_P IN 59
RXDAT_MAIN_1_1- M1
SIM CARD 2
CC2_IN FS
I2S2
OUT IN
90_DIGRF_M0_TX_P 59
69 54 UART_AP_TO_BB_TXD H16 USIF1_RXD_MRST FS I2S2_RX Y3 I2S_AP_TO_BB_DOUT 53 54 5 2 I2C_BBPMU_SCL OUT
IN IN
I2S2_TX W3 I2S_BB_TO_AP_DIN I2C_BBPMU_SDA TXDAT_MAIN_1_1- N1 90_DIGRF_M1_TX_N
USIF1
OUT 53 54 5 2 OUT 59 69
J17 USIF1_RTS* I2S2_WA0 Y4 I2S_AP_TO_BB_LRCLK 53 54 TXDAT_MAIN_1_1+ N2 90_DIGRF_M1_TX_P 59 69
NC OUT OUT
EINT4 H17 USIF1_CTS* FS FS I2S2_WA1 W4 AP_TO_BB_COREDUMP_TRIG IN 53 54
EINT2 MPHY_MAIN_0_EN A3 DIGRF_M0_EN 59
OUT
C
D19 USIF3_TXD_MTSR MPHY_MAIN_1_EN K4
C 54 53 OUT
UART_BB_TO_AOP_RXD DIGRF_M1_EN OUT 59
55 59 69
NC OUT IN
I2C1_SDA K17 I2C_BB_EEPROM_SDA 55 RXDAT_AUX_1_1+ T2 90_DIGRF_A1_RX1_P 59 69
USIF2
BI IN
Y5 USIF2_RTS*
NC I2C2_SCL B16 I2C_BBPMU_SCL 55 58 RXDAT_AUX_1_2- U1 90_DIGRF_A1_RX2_N 59
AA7 USIF2_CTS* OUT IN
I2C2
EINT7 69 54 53 IN
AP_TO_BB_TIME_MARK U7 MMCI1_CD* FS USB_DMINUS AA1 90_USB_BB_N BI 53 54 69 TXDAT_AUX_1_1+ R2 90_DIGRF_A1_TX_P OUT 59
69
MPHY_AUX_1_EN T4
OUT
DIGRF_A1_EN 59
BB_HW_ID<0> U9 MMCI1_DAT_0 USB_TEST Y2 OUT
USB 3.0
69 IN NC 1
EINT4 69 BB_HW_ID<1> V7 MMCI1_DAT_1 R5506_RF BASEBAND
IN
V8 USB30_TXP AB2
NC 200
EINT5 69 BB_HW_ID<2> MMCI1_DAT_2 1%
IN
USB30_TXN AB1 1/32W
EINT6 54 53 AP_TO_BB_IPC_GPIO2 U8 MMCI1_DAT_3 NC MF
BI
USB30_RXP AC1 01005
NC 2 BASEBAND
USB30_RXN AC2
NC
USB_SSIC_LLI_TXP R18
NC
USB_SSIC_LLI_TXN P18
MIPI LLI
SSIC
NC
USB_SSIC_LLI_RXP R20
B USB_SSIC_LLI_RXN R19
NC
NC
B
PCI_PET_P1 AE16 100_PCIE_BB_TO_AP_RX_P
EXT INTERRUPT
53 54
58 BBPMU_ALERT_L C15 EINT0
OUT
BB_RF
IN
PCI_PET_N1 AE15 100_PCIE_BB_TO_AP_RX_N 53 54 69
69 55 SIM1_DETECT J18 EINT1 FS OUT
PMB9943
IN AE13 100_PCIE_AP_TO_BB_TX_P
PCIE
J20 PCI_PER_P1 IN 53 54 69
WF2BGA
69 54 53 PCIE_BB_TO_PMU_WAKE_L EINT2 BOOTROM DRIVEN
OUT
PCI_PER_N1 AE14 100_PCIE_AP_TO_BB_TX_N 53 54 69 SYM 9 OF 9
54 53 AP_TO_BB_IPC_GPIO K18 EINT3 FS IN
OMIT_TABLE
BI
PCI_REFCLK_P AD15 100_PCIE_AP_TO_BB_REFCLK_P 53 54 58 BBPMU_STBY C16 MODEM_STDBY
IN OUT
PCI_REFCLK_N AD14 100_PCIE_AP_TO_BB_REFCLK_N 53 54 FS PCIE_CLKREQ* M17 PCIE_AP_BI_BB_CLKREQ_L 53 54 55 69
IN
69 54 53 BB_TO_AP_GSM_TXBURST D17 FTA_TRIG
BI
PCI_REF_RES AB15 PCIE_REF_RES OUT
PCIE_PERST* L18 PCIE_AP_TO_BB_PERST_L 53 54 69 PERST PULLED DOWN AT AP
IN
68 GNSS_BLANK E17 IDC_PA_BLANKING
BASEBAND 1 OUT
R5507_RF 69 54 53 UART_WLAN_TO_BB_COEX D16 IDC_UART_RXD FS 1 C5501_RF
200 IN
E16 100PF
1% 69 54 53 UART_BB_TO_WLAN_COEX IDC_UART_TXD FS
1/32W
OUT 5%
MF D15 2 16V
NP0-C0G
01005 69 58 55 54 53 AP_TO_BBPMU_SDWN_L SDWN_REQ* FS 01005
2 BASEBAND OUT
BASEBAND
69 58 BBPMU_VCLK B13 VCLK
OUT
BB EEPROM BASEBAND
16 15 11 6 5 4 3 2 1 PP1V8_SDRAM
1 C5500_RF
1 1
1UF R5504_RF R5505_RF
20% 10K 10K
2 16V
CER-X5R 1% 1%
0201 1/32W 1/32W
BASEBAND MF MF
2 01005 2 01005
A1
BASEBAND BASEBAND
A VCC
EPROM_RF
A
BASEBAND
PAGE TITLE
CAT24C08C4A
WLCSP
2 I2C_BB_EEPROM_SCL B1 SCL SDA B2 I2C_BB_EEPROM_SDA 2
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
VSS
BASEBAND
R
5.0.0
NOTICE OF PROPRIETARY PROPERTY:
A2
BRANCH
BASEBAND MEMORY/DEBUG
PP1V8_SDRAM
D
16 15 11 6 5 4 3 2 1
D 1
R5603_RF
100K
1%
1/32W
MF
2 01005
BASEBAND
BB_RF 69 56 54 53 IN
AP_TO_BB_RESET_L
PMB9943
WF2BGA
SYM 2 OF 9
OMIT_TABLE
V11 NAND_ADQ_0 DDR_DQ_0 AE6
NC NC
AB12 NAND_ADQ_1 DDR_DQ_1 AD7
NC NC
AA12 NAND_ADQ_2 BB_RF
NC
Y12 NAND_ADQ_3 PMB9943
NC
Y13 NAND_ADQ_4 WF2BGA
NC SYM 6 OF 9
V12 NAND_ADQ_5 OMIT_TABLE
NC
U13 NAND_ADQ_6
NC
V13 NAND_ADQ_7
NC
DBB EMIC
NAND IF
BB_RF
C NC NAND_ALE
BBPMU_XG_RESET_SD_L B17
PMU CONTROL
Y9 69 58 XG_SDWN* C19 TRIG_IN C20
IN
NAND_CE* 69 BB_JTAG_TDO TDO
NC OUT NC
Y11 NAND_CLE 54 53 BB_TO_AP_RESET_ACT_L K19 RESET2* 69 BB_JTAG_TDI B20 TDI
NC OUT IN
HW_MON1 D20 HW_MON1 69
U11 NAND_RB* AP_TO_BB_RESET_L K20 CP_RESET_BB* FS BB_JTAG_TMS C18 TMS
OUT
JTAG
69 56 54 53 69
NC IN IN
HW_MON2 E20 HW_MON2 69
AB10 NAND_RE* 69 BB_JTAG_TCK C17 TCK
OUT
NC 59 XCVR0_RESET_L L4 RESET_TRX1*
IN
W10 NAND_WE*
OUT
69 BB_JTAG_TRST_L A19 TRST*
NC 59 XCVR1_RESET_L U4 RESET_TRX2*
IN
W11 NAND_WP*
OUT B19 RTCK
NC NC
MONITORING
F4 TPIU_TRACEPKT0
NC
E4 TPIU_TRACEPKT1
NC
B8 DDR_CA_0 E5 TPIU_TRACEPKT2
NC NC
A8 DDR_CA_1 F5 TPIU_TRACEPKT3
NC L10 RCT_MON2 NC
A9 DDR_CA_2 NC E7 TPIU_TRACEPKT4
ADN SENSE
CONTACT
NC L11 RCT_MON1 NC
B9 DDR_CA_3 NC F6 TPIU_TRACEPKT5
NC NC
C10 DDR_CA_4 F17 VSS_SENSE D6 TPIU_TRACEPKT6
NC NC
A13 DDR_CA_5 DDR_DQ_31 AD19 G7 TPIU_TRACEPKT7
NC NC NC
TPIU
C12 DDR_CA_6 G6 TPIU_TRACEPKT8
NC DDR_DQS_T_0 AD9 NC
C13 DDR_CA_7 NC D5 TPIU_TRACEPKT9
NC DDR_DQS_C_0 AE9 NC
D13 DDR_CA_8 NC F8 TPIU_TRACEPKT10
NC DDR_DQS_T_1 AD13 NC
E14 DDR_CA_9 NC C6 TPIU_TRACEPKT11
NC DDR_DQS_C_1 AE12 VSS B18 NC
NC C5 TPIU_TRACEPKT12
DDR_DQS_T_2 AD6 VSS V2 NC
NC C7 TPIU_TRACEPKT13
DDR_DQS_C_2 AE5 VSS V20 NC
NC D7 TPIU_TRACEPKT14
DDR_DQS_T_3 AE17 VSS W13 NC
NC E8 TPIU_TRACEPKT15
DDR_DQS_C_3 AC16 VSS W15 NC
NC
VSS W17 C4 TPIU_TRACECLK
DDR_CK_T B11 NC
NC VSS W19 D4 TPIU_TRACECTL
DDR_CK_C A11 NC
NC VSS W20
B DDR_DQM_0
DDR_DQM_1
AD10
AD12
NC VSS W5 BASEBAND
B
NC VSS Y17
VSS Y19
DDR_DQM_3 AD16 NC
BASEBAND
CLOCKS & CONTROL
DDR_CS_1 B10 NC
R5600_RF
15 11 0.00
3 2 1 PP1V8_SDRAM 1 2 PP1V8_TCXO
6 5 4
16 0%
1/32W 1 C5602_RF
MF
0.01UF
3
A
01005
10%
2 6.3V
X5R
VDD A
01005 TCXO_RF PAGE TITLE
BASEBAND 32.768KHZ-5PPM
CSP BASEBAND MEMORY/DEBUG
DRAWING NUMBER SIZE
1 CLKOUT 2 TCXO_BB_GNSS_32K
NC CAL/NC OUT 56 68 69
Apple Inc.
051-00542 D
REVISION
GND R
5.0.0
4
D
R14
R16
VDD_CORE_MAIN
VDD_CORE_MAIN
VDD_EMIC_IO_3
VDD_EMIC_IO_3
AC17
AC18
AE11
D
T16 VDD_CORE_MAIN VDD_EMIC_IO_CA AC11
U15 VDD_CORE_MAIN VDD_EMIC_IO_CA AC12
U16 VDD_CORE_MAIN VDD_EMIC_1V8_IO AB16 VDD_DDR_1V8 4 5
U18 VDD_CORE_MAIN VDD_LDO_DLL_EMIC AE11
1 C5740_RF
V14 VDD_CORE_MAIN
VDD_SMB_IO V1 PP1V8_SDRAM 1 2 3 4 5 6
0.1UF
V16 VDD_CORE_MAIN 11 15 16 20%
V18 1 C5737_RF 2 6.3V
X5R-CERM
VDD_CORE_MAIN 01005
W18 VDD_CORE_MAIN 1UF BASEBAND
VDD_LDO_USB_SS AC3 VDD_IO_1V2 20%
2 16V
4 5
W16 VDD_CORE_MAIN
LDO_MON_USB_SS AB4 CER-X5R
Y14 VDD_CORE_MAIN NC 1 C5735_RF 0201
VDD_USB_SS_IO AA2 VDD_USB_3V15 BASEBAND
Y16 VDD_CORE_MAIN
5
0.22UF
10%
Y18 VDD_CORE_MAIN 1 C5719_RF 2 6.3V
CER-X5R
Y20 VDD_CORE_MAIN 0.1UF 01005
20% BASEBAND
6.3V
2 X5R-CERM
VDD_CORE_1V0 L6 VDD_CORE_3G VDD_LDO_DIGRF_PHY1 F1 VDD_IO_1V2
5 4 4 5 01005
M4 VDD_CORE_3G LDO_MON_DIGRF1 G4 BASEBAND
1 C5721_RF 1 C5726_RF NC 1 C5730_RF 1 C5732_RF 1 C5742_RF 1 C5743_RF
M5 VDD_CORE_3G VDD_LDO_DIGRF_PHY2 K2
1UF 0.1UF 1UF 0.1UF 0.1UF 0.1UF
20% 20% N6 VDD_CORE_3G LDO_MON_DIGRF2 D3 20% 20% 20% 20%
2 16V
CER-X5R 2 6.3V
X5R-CERM P4 K1
NC 2 16V
CER-X5R 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
0201 01005 VDD_CORE_3G VDD_LDO_DIGRF_PHY3 0201 01005 01005 01005 BB_RF
BASEBAND BASEBAND R6 VDD_CORE_3G LDO_MON_DIGRF3 N4 BASEBAND BASEBAND BASEBAND BASEBAND PMB9943
NC
U6 VDD_CORE_3G VDD_LDO_DIGRF_PHY4 P1 WF2BGA
V4 VDD_CORE_3G LDO_MON_DIGRF4 R4 A10 VSS SYM 3 OF 9 VSS_USB AB3
NC
V5 VDD_CORE_3G VDD_LDO_USB_SSIC_MPHY P20 A14 VSS GROUND VSS_PLL V9
N18 A2 OMIT_TABLE W14
B6 LDO_MON_SSIC NC VSS VSS_PLL
5 4 VDD_CORE_1V0 VDD_CORE_LTE
VDD_LDO_PCIE T20 A4 VSS VSS_MPHY_1 E3
B7 VDD_CORE_LTE T19 AA14
C
1 C5722_RF 1 C5727_RF F3
C 1UF
20%
0.1UF
20%
C11
C8
VDD_CORE_LTE
LDO_MON_PCIE
VDD_PCIE_1V8 U20
NC
PP1V8_SDRAM 1 2 3 4 5 6 11 15 16
AA17
VSS
VSS
VSS_MPHY_1
VSS_MPHY_2 H3
VDD_CORE_LTE
2 16V
CER-X5R 2 6.3V
X5R-CERM D11
AA19 VSS VSS_MPHY_2 J3
0201 01005 VDD_CORE_LTE VPP Y8 NC
1 C5734_RF
AA8 M3
BASEBAND BASEBAND D9 0.1UF VSS VSS_MPHY_3
VDD_CORE_LTE A1 20% AB6 N3
DUMMY_BALL VSS VSS_MPHY_3
E11 VDD_CORE_LTE A20
NC 2 6.3V
X5R-CERM AC10 R3
E9 DUMMY_BALL NC 01005 VSS VSS_MPHY_4
VDD_CORE_LTE AE1 BASEBAND B1 T3
F10 DUMMY_BALL NC VSS VSS_MPHY_4
VDD_CORE_LTE AE20 B12 P19
F11 DUMMY_BALL NC VSS VSS_MPHY_SSIC_TX
VDD_CORE_LTE BB_RF B2 N20
F12 VSS VSS_MPHY_SSIC_RX
VDD_CORE_LTE PMB9943 B3 T18
F13 WF2BGA VSS VSS_PCIE_TX
VDD_CORE_LTE B4
F9 AB11 CKE_MEM SYM 8 OF 9
AA13 VSS
VDD_CORE_LTE 3 BB_DDR_CKE VSS_EMIC B5 VSS VSS N10
G10 VDD_CORE_LTE ZQ_MEM D14 ZQ_MEM LPDDR2 RAM VSS_EMIC AB17
OMIT_TABLE C1 VSS VSS N11
G11 VDD_CORE_LTE VSS_EMIC AB18
D8 VSS VSS N12
H10 VDD_CORE_LTE VSS_EMIC AB19
E10 VSS VSS N13
H11 VDD_CORE_LTE 1 VSS_EMIC AB5
R5700_RF 5 4 VDD_IO_1V2 A7 BUS_SET_MEM E12 VSS VSS N14
H15 VDD_CORE_LTE 240 VSS_EMIC AC19
1% E13 VSS VSS N16
J10 VDD_CORE_LTE 1/32W 5 4 VDD_DDR_1V8 A16 VDD1_MEM VSS_EMIC AC4
MF E6 VSS VSS N17
J11 VDD_CORE_LTE 01005 A6 VDD1_MEM VSS_EMIC AC9
2 BASEBAND F14 VSS VSS N7
J12 VDD_CORE_LTE AB20 VDD1_MEM VSS_EMIC AD11
F2 VSS VSS N8
J13 VDD_CORE_LTE AE2 VDD1_MEM VSS_EMIC AD17
F7 VSS VSS N9
J5 VDD_CORE_LTE VSS_EMIC AD18
5 4 VDD_IO_1V2 A17 VDD2_MEM G13 VSS VSS P10
J6 VDD_CORE_LTE VSS_EMIC AD2
A5 VDD2_MEM G14 VSS VSS P11
J7 VDD_CORE_LTE VSS_EMIC AD20
AC20 VDD2_MEM G3 VSS VSS P12
J8 VDD_CORE_LTE VSS_EMIC AD4
AD1 VDD2_MEM G9 VSS VSS P15
J9 VDD_CORE_LTE VSS_EMIC AD5
H5 VSS VSS P17
K11 VDD_CORE_LTE AC13 VDDQ_MEM VSS_EMIC AD8
H6 VSS VSS P2
B K13
K15
VDD_CORE_LTE
VDD_CORE_LTE
AE18
AE4
VDDQ_MEM
VDDQ_MEM
VSS_EMIC
VSS_EMIC
C9
D10
H7 VSS VSS P3 B
H8 VSS VSS P6
K5 VDD_CORE_LTE AE7 VDDQ_MEM VSS_EMIC D12
H9 VSS VSS P7
K8 VDD_CORE_LTE VSS_EMIC G12
J16 VSS VSS P8
M10 VDD_CORE_LTE VSS_EMIC H12
K10 VSS VSS P9
M11 VDD_CORE_LTE VSS_EMIC H13
K16 VSS VSS R13
M13 VDD_CORE_LTE VSS_EMIC J15
K3 VSS VSS R15
M15 VDD_CORE_LTE VSS_EMIC K12
K6 VSS VSS R17
M8 VDD_CORE_LTE VSS_EMIC L13
K7 VSS VSS R7
5 4 VDD_CORE_1V0 M9 VDD_CORE_LTE VSS_EMIC M12
K9 VSS VSS T11
R12 VDD_CORE_LTE VSS_EMIC N15
1 C5717_RF 1 C5718_RF L16 VSS VSS T12
R9 VDD_CORE_LTE VSS_EMIC P13
1UF 1UF L19 VSS VSS T13
20% 20% AB7 VDD_CORE_DSP VSS_EMIC V15
2 16V
CER-X5R 2 16V
CER-X5R AB8
L3 VSS VSS T14
0201 0201 VDD_CORE_DSP AC14 L5 T15
BASEBAND BASEBAND U10 VSSQ_MEM VSS VSS
VDD_CORE_TD AE19 L7 T17
V10 VSSQ_MEM VSS VSS
AB7 U10 VDD_CORE_TD AE3 L8 T7
VSSQ_MEM VSS VSS
5 4 VDD_IO_1V2 W12 VDD_LDO_PLL VSSQ_MEM AE8 L9 VSS VSS U14
U12 LDO_MON_PLL M16 VSS VSS U17
NC BASEBAND M18 VSS VSS U19
11 6 5 4 3 2 1 PP1V8_SDRAM N19 VDD_RTC
16 15 M19 VSS VSS U3
16 5 2 VDD_SIM1 F20 VDD_SIM1
5 4 VDD_IO_1V2 M6 VSS VSS V17
CKPLUS_WAIVE=PWRTERM2GND G20 VDD_SIM2 M7 VSS VSS V19
11 6 5 4 3 2 1 PP1V8_SDRAM W8 VDD_MMC_IO 1 C5703_RF 1 C5704_RF 1 C5706_RF 1 C5708_RF 1 C5710_RF 1 C5711_RF 1 C5712_RF 1 C5741_RF
16 15
2.2UF 0.1UF 0.1UF 0.1UF 2.2UF 2.2UF 0.1UF 0.1UF BASEBAND
PP1V8_SDRAM AA6 VDD_IO18 20% 20% 20% 20% 20% 20% 20% 20%
2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
11 6 5 4 3 2 1
16 15
AA9 VDD_IO18 X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM
1 C5713_RF 1 C5714_RF 1 C5700_RF 1 C5716_RF 1 C5723_RF 1 C5728_RF 0201-1 01005 01005 01005 0201-1 0201-1 01005 01005
G8 BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND
A 1UF
20%
16V
0.1UF
20%
6.3V
0.47UF
10%
6.3V
0.47UF
10%
6.3V
0.1UF
20%
6.3V
0.1UF
20%
6.3V
J19
VDD_IO18
VDD_IO18 A
2 CER-X5R 2 X5R-CERM 2 CERM-X5R 2 CERM-X5R 2 X5R-CERM 2 X5R-CERM R10
BASEBAND POWER
PAGE TITLE
0201 01005 0201 0201 01005 01005 VDD_IO18
BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND R11 VDD_IO18 5 4 VDD_DDR_1V8
R8 VDD_IO18 DRAWING NUMBER SIZE
1 C5705_RF 1 C5707_RF 1 C5709_RF 1 C5715_RF
R5701_RF
T8 VDD_IO18 2.2UF 0.1UF 0.1UF 0.1UF Apple Inc.
051-00542 D
10K 20% 20% 20% 20%
2 6.3V 2 6.3V 2 6.3V 2 6.3V
REVISION
VDD_VREFCP 1 2 VREF_0V6 A18
5
1% 5 4 VDD_IO_1V2 AB13
VREF_0V6
VDD_LDO_CORE_EMIC
X5R-CERM
0201-1
X5R-CERM
01005
X5R-CERM
01005
X5R-CERM
01005
R
5.0.0
1/32W 1 C5702_RF BASEBAND BASEBAND BASEBAND BASEBAND NOTICE OF PROPRIETARY PROPERTY: BRANCH
MF AA11 LDO_MON_EMIC
01005 0.01UF 1 C5724_RF NC THE INFORMATION CONTAINED HEREIN IS THE
BASEBAND 10%
2 6.3V 1UF BASEBAND
PROPRIETARY PROPERTY OF APPLE INC.
X5R 20% THE POSESSOR AGREES TO THE FOLLOWING: PAGE
01005
BASEBAND 2 16V
CER-X5R
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
57 OF 73
0201 II NOT TO REPRODUCE OR COPY IT
SHEET
BASEBAND III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST IV ALL RIGHTS RESERVED 57 OF 81
8 7 6 5 4 3 2 1
ESQUEMATICOS.COM
8 7 6 5 4 3 2 1
BASEBAND PMIC
D D
BBPMU_RF
0.47UH-20%-4.8A-0.032OHM
L5800_RF 1
16 15 8 7 6 5 1 PP_VDD_MAIN B4 VSYS PMB6826 VMOD1LX D1 VMOD1LX 2 VDD_CORE_1V0 4 5
BBPMU
G4 VSYS BGA VMOD1LX D2 0805
VMOD1SENSE D3 VMOD1_FB 5
1.0UH-20%-3.2A-0.07OHM
L5801_RF 1
69 59 56 OUT
BBPMU_PWRGOOD E4 XG_PWRGOOD VMOD2LX A2 VMOD2LX 2 VRF_CORE_1V0 5 6
BBPMU
69 54 53 IN
PMU_TO_BBPMU_ON B6 PMIC_ON VMOD2LX B2 0805
69 55 54 53 IN
AP_TO_BBPMU_SDWN_L C4 SDWN* VMOD2SENSE B1 VMOD2_FB 5
2.2UH-20%-2.1A-0.155OHM
L5802_RF 1
69 56 OUT
BBPMU_XG_RESET_L F2 XG_RESET* VMOD3LX A7 VMOD3LX 2 VRF_ANA_1V3 5 6
BBPMU
69 56 OUT
BBPMU_XG_RESET_SD_L F6 XG_RESET_SD* VMOD3SENSE B7 VMOD3_FB 5 0805
4 VDD_USB_3V15 H4 VUSB_IO/GPIO1
1.0UH-20%-2.1A-0.128OHM
L5803_RF 1
1 C5821_RF VMOD4LX H2 VMOD4LX 2 VDD_IO_1V2 4 5
BBPMU
2.2UF 56 IN
BBPMU_32K A4 CLK_32K VMOD4SENSE G1 VMOD4_FB 5 0603
20%
2 6.3V
X5R-CERM IN
I2C_BBPMU_SDA F3 I2CSDA VMOD5LX G8 VDD_DDR_1V8 4
0201-1 55 I2C_BBPMU_SCL F4 I2CSCL VMOD5SENSE G7
BBPMU BI
XW5804_RF
SHORT-20L-0.05MM-SM
5 4 VDD_CORE_1V0 1 2 VMOD1_FB 5
OMIT
XW5805_RF
SHORT-20L-0.05MM-SM
SELF TEST
6 5 VRF_CORE_1V0 1 2 VMOD2_FB 5
OMIT
XW5806_RF
SHORT-20L-0.05MM-SM XW5800_RF
VRF_ANA_1V3 1 2 VMOD3_FB SHORT-20L-0.05MM-SM
6 5 5
5 4 VDD_CORE_1V0 1 2 BBPMU_TO_PMU_AMUX1 53 54
OMIT OUT
XW5707_RF OMIT
SHORT-20L-0.05MM-SM
5 4 VDD_IO_1V2 1 2 VMOD4_FB 5 XW5801_RF
A OMIT
6 5 VRF_CORE_1V0
SHORT-20L-0.05MM-SM
1 2 BBPMU_TO_PMU_AMUX2 OUT 53 54 A
1 C5803_RF 1 C5805_RF 1 C5807_RF 1 C5810_RF 1 C5801_RF
BASEBAND PMIC
PAGE TITLE
OMIT
20UF 20UF 20UF 20UF 20UF
20% 20% 20% 20% 20% XW5802_RF
2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R SHORT-20L-0.05MM-SM DRAWING NUMBER SIZE
0402
BBPMU
0402
BBPMU
0402
BBPMU
0402
BBPMU
0402
BBPMU 5 4 VDD_IO_1V2 1 2 BBPMU_TO_PMU_AMUX3 OUT 53 54
Apple Inc.
051-00542 D
OMIT REVISION
R
5.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
TRANSCEIVERS XCVR0_RF
PMB5750
BGA
SYM 5 OF 5
LAYOUT: TRACE SHOULD B1 ~1NH/1MM B3 VSS1 VSS39 U16
LAYOUT: TRACE SHOULD B1 ~1NH/1MM B9 VSS2 VSS40 U6
R5906_RF R5908_RF
0.00 0.00 C12 VSS3 VSS41 U8
6 5 VRF_ANA_1V3 1 2 6 VDD_XCVR0_1V3 6 5 VRF_ANA_1V3 1 2 6 VDD_XCVR1_1V3
C16 VSS4 VSS42 V3
1% 1%
1 C5944_RF 1/20W 1 C5904_RF 1 C5917_RF 1 C5929_RF 1 C5930_RF 1 C5931_RF 1 C5932_RF 1 C5933_RF 1 C5940_RF 1 C5941_RF 1 C5947_RF 1 C5948_RF 1 C5949_RF 1 C5945_RF 1/20W 1 C5911_RF 1 C5925_RF 1 C5934_RF 1 C5935_RF 1 C5936_RF 1 C5937_RF 1 C5938_RF 1 C5939_RF 1 C5942_RF 1 C5951_RF 1 C5952_RF C2 VSS5
MF MF
0.1UF 15UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.22UF 2.2UF 2.2UF 2.2UF 27PF 15UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.22UF 2.2UF 2.2UF
D 10%
2 6.3V
0201
XCVR 20%
2 6.3V
20%
6.3V
2 X5R-CERM
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
10%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
5%
2 16V
0201
XCVR 20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
10%
2 6.3V
20%
2 6.3V
20%
2 6.3V
C4
C8
VSS6
VSS7
D
CER-X5R X5R X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM CER-X5R X5R-CERM X5R-CERM X5R-CERM NP0-C0G X5R X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM CER-X5R X5R-CERM X5R-CERM
01005 0402-1 01005 01005 01005 01005 01005 01005 01005 01005 0201-1 0201-1 0201-1 01005 0402-1 01005 01005 01005 01005 01005 01005 01005 01005 0201-1 0201-1 D3 VSS8
XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR
NOSTUFF F15 VSS9
F3 VSS10
F5 VSS11
XCVR0_RF XCVR1_RF
F9 VSS12
PMB5750 PMB5750 H11
BGA BGA VSS13
XW5901_RF LAYOUT: MAX DCR 85MOHM XW5903_RF
LAYOUT: MAX DCR 85MOHM SHORT-0201 SYM 1 OF 5 SHORT-0201 SYM 1 OF 5 H15 VSS14
VDD_XCVR0_1V3 L14 VDD_XCVR1_1V3 L14
SMARTI5 SMARTI5
6 VDD1V3_MPHY 6 VDD1V3_MPHY H3
6 5 VRF_CORE_1V0 1 2 VRF_XCVR0_1V0 6 6 5 VRF_CORE_1V0 1 2 VRF_XCVR1_1V0 6 VSS15
E14 VDD1V3_CI E14 VDD1V3_CI
OMIT OMIT H5 VSS16
XCVR 1 C5915_RF 1 C5918_RF H9 VDD1V3_TXPLL XCVR 1 C5922_RF 1 C5926_RF H9 VDD1V3_TXPLL H7 VSS17
0.47UF 0.1UF N6 VDD1V3_RX1PLL 0.47UF 0.1UF N6 VDD1V3_RX1PLL
10% 20% 10% 20% J4 VSS18
6.3V
2 CERM-X5R 6.3V
2 X5R-CERM N14 VDD1V3_RX2PLL 2 6.3V 2 6.3V N14 VDD1V3_RX2PLL
CERM-X5R X5R-CERM K3 VSS19
0201 01005 K7 VDD1V3_RXMS 0201 01005 K7 VDD1V3_RXMS
XCVR XCVR XCVR XCVR L10 VSS20
NOSTUFF NOSTUFF
C6 VDD1V3_TXDIG L5901_RF C6 VDD1V3_TXDIG L12 VSS21
L5900_RF 600-OHM-25%-0.1A
600-OHM-25%-0.1A B1 VDD1V3_TXRF B1 VDD1V3_TXRF L4 VSS22
16 15 11 6 5 4 3 2 1 PP1V8_SDRAM 1 2 VDD_XCVR1_1V8 6 L8 VSS23
15 11 6 5 4 3 2 1 PP1V8_SDRAM 1 2 VDD_XCVR0_1V8 6 R14 VDD1V3_RX2DCO R14 VDD1V3_RX2DCO
16 0201-1 M13 VSS24
0201-1
1 C5920_RF 1 C5921_RF N4 VDD1V3_RX1DCO 1 C5914_RF 1 C5928_RF N4 VDD1V3_RX1DCO M15 VSS25
15UF 0.1UF 15UF 0.1UF M3 VSS26
20% 20% D7 VDD1V3_TXDCO 20% 20% D7 VDD1V3_TXDCO
2 6.3V 6.3V
2 X5R-CERM 2 6.3V 2 6.3V P13 VSS27
X5R X5R X5R-CERM
0402-1 01005 U4 VDD1V3_RXRF 0402-1 01005 U4 VDD1V3_RXRF P3 VSS28
XCVR XCVR XCVR XCVR
R10 VSS29
C14 VDD1V3_TXMS C14 VDD1V3_TXMS
R5901_RF R5907_RF R12 VSS30
0.00 K15
0.00 K15 R6
6 5 1 PP_VDD_MAIN 1 2 VDD_XCVR0_BAT 6 6 VRF_XCVR0_1V0 VDD1V0_DIG 16 15 8 7 6 5 1 PP_VDD_MAIN 1 2 VDD_XCVR1_BAT 6 6 VRF_XCVR1_1V0 VDD1V0_DIG VSS31
16 15 8 7
1% 1% R8 VSS32
C
1 C5903_RF 1 C5912_RF 1/20W 1 C5916_RF 1 C5919_RF G14 1 C5924_RF 1 C5943_RF1/20W 1 C5923_RF 1 C5927_RF G14
C 6 VDD_XCVR0_1V8 VDD1V8_CI 6 VDD_XCVR1_1V8 VDD1V8_CI
MF MF T13 VSS33
100PF 27PF 0201 0.47UF 0.1UF T9 VDD1V8_RX 100PF 27PF 0201 0.47UF 0.1UF T9 VDD1V8_RX
5% 5% XCVR 10% 20% 5% 5% XCVR 10% 20% T3 VSS34
2 16V 2 16V 6.3V
2 CERM-X5R 6.3V
2 X5R-CERM D5 VDD1V8_TX 2 16V 2 16V 2 6.3V 2 6.3V D5 VDD1V8_TX
NP0-C0G NP0-C0G NP0-C0G NP0-C0G CERM-X5R X5R-CERM T5 VSS35
01005 01005 0201 01005 01005 01005 0201 01005
XCVR XCVR XCVR XCVR 6 VDD_XCVR0_BAT D13 VDD_BAT XCVR XCVR XCVR XCVR 6 VDD_XCVR1_BAT D13 VDD_BAT U10 VSS36
NOSTUFF NOSTUFF
U12 VSS37
CEXT0_RX2PLL N12 CEXT_RX2PLL CELL_CLK_EN J12 SYSCLK_26MHZ_EN IN 55 CEXT1_RX2PLL N12 CEXT_RX2PLL CELL_CLK_EN J12 U14 VSS38
CEXT0_TXPLL J8 CEXT_TXPLL CELL_CLK J14 SYSCLK_26MHZ 55 69 CEXT1_TXPLL J8 CEXT_TXPLL CELL_CLK J14
OUT NC XCVR
CEXT0_RX1PLL P7 CEXT_RX1PLL CEXT1_RX1PLL P7 CEXT_RX1PLL
CEXT0_TXMAG B5 CEXT_TXMAG CEXT1_TXMAG B5 CEXT_TXMAG XCVR1_RF
PMB5750
54 53 BB_TO_NFC_CLK F13 FSYS_RF GPO0 J6 F13 FSYS_RF GPO0 J6 XCVR1_RFE_GPO0 61
BGA
1 C5900_RF 1 C5901_RF 1 C5902_RF 1 C5905_RF OUT NC 1 C5908_RF 1 C5909_RF 1 C5910_RF 1 C5913_RF NC OUT
SYM 5 OF 5
NFC_TO_BB_CLKREQ M11 FSYS_RF_EN_CLK_ON GPO1 K5 XCVR1_26MHZ_EN M11 FSYS_RF_EN_CLK_ON GPO1 K5
22NF 22NF 22NF 1UF 59 54 53 IN NC 22NF 22NF 22NF 1UF 59 OUT NC B3 VSS1 VSS39 U16
10% 10% 10% 20% XCVR1_26MHZ G12 FSYS_C GPO2 L6 10% 10% 10% 20% GNSS_26MHZ_CLKOUT G12 FSYS_C GPO2 L6
2 25V 2 25V 2 25V 2 10V 2 25V 2 25V 2 25V 2 10V
59 68
OUT NC OUT NC B9 VSS2 VSS40 U6
CER-X5R CER-X5R CER-X5R X5R XCVR1_26MHZ_EN E12 FSYS_C_EN GPO3 P11 XCVR0_TSYNC_OUT CER-X5R CER-X5R CER-X5R X5R E12 FSYS_C_EN GPO3 P11 XCVR0_TSYNC_IN
0201 0201 0201 0201 59 IN 6 0201 0201 0201 0201 6
C12 VSS3 VSS41 U8
XCVR GPO4 N10 XCVR0_TSYNC_IN 6
XCVR GPO4 N10 XCVR0_TSYNC_OUT 6
C16 VSS4 VSS42 V3
55 DIGRF_M0_EN F11 MPHY_EN GPO5 T7 55 DIGRF_M1_EN F11 MPHY_EN GPO5 T7
IN NC IN NC C2 VSS5
55 DIGRF_A0_EN K11 MPHY2_EN GPO6 T11 55 DIGRF_A1_EN K11 MPHY2_EN GPO6 T11
IN NC IN NC C4 VSS6
69 59 58 56 BBPMU_PWRGOOD K13 RESET_MAIN* 69 59 58 56 BBPMU_PWRGOOD K13 RESET_MAIN*
IN IN C8 VSS7
56 XCVR0_RESET_L H13 RESET_TRX* 56 XCVR1_RESET_L H13 RESET_TRX*
IN IN D3 VSS8
F15 VSS9
59 XCVR0_JTAG_TMS K9 TMSC MI3 C10 59 XCVR1_JTAG_TMS K9 TMSC MI3 C10 F3 VSS10
BI NC BI NC
59 XCVR0_JTAG_TCK J10 TCKC MI4 D11 59 XCVR1_JTAG_TCK J10 TCKC MI4 D11 F5 VSS11
IN NC IN NC
F9 VSS12
55 OUT
90_DIGRF_M0_RX1_P G16 MPHY_RX1_DAT 55 OUT
90_DIGRF_M1_RX1_P G16 MPHY_RX1_DAT H11 VSS13
55 OUT
90_DIGRF_M0_RX1_N H17 MPHY_RX1_DATX 55 OUT
90_DIGRF_M1_RX1_N H17 MPHY_RX1_DATX H15 VSS14
90_DIGRF_M0_RX2_P E16 MPHY_RX2_DAT 90_DIGRF_M1_RX2_P E16 MPHY_RX2_DAT H3 VSS15
B B
55 OUT 55 OUT
55 OUT
90_DIGRF_M0_RX2_N F17 MPHY_RX2_DATX 55 OUT
90_DIGRF_M1_RX2_N F17 MPHY_RX2_DATX H5 VSS16
55 IN
90_DIGRF_M0_TX_P J16 MPHY_TX_DAT RFFE_SDATA P9 RFFE1_DATA BI 59 60 61 62 64 65 69 55 IN
90_DIGRF_M1_TX_P J16 MPHY_TX_DAT RFFE_SDATA P9 RFFE1_DATA BI 59 60 61 62 64 H7 VSS17
65
55 IN
90_DIGRF_M0_TX_N K17 MPHY_TX_DATX RFFE_SCLK N8 RFFE1_CLK OUT 59 60 61 62 64 65 69 55 IN
90_DIGRF_M1_TX_N K17 MPHY_TX_DATX RFFE_SCLK N8 RFFE1_CLK OUT 59 60 61 62 64 J4 VSS18
65
RFFE_VIO M9 VDD_RFFE_VIO_1V8 59 60 61 62 64 65 66 RFFE_VIO M9 VDD_RFFE_VIO_1V8 59 60 61 62 64 K3 VSS19
55 90_DIGRF_A0_RX1_P P17 MPHY2_RX1_DAT
OUT
69 55 90_DIGRF_A1_RX1_P P17 MPHY2_RX1_DAT
OUT 65 66
OUT OUT L10 VSS20
55 90_DIGRF_A0_RX1_N N16 MPHY2_RX1_DATX RFFE2_SCLK M7 RFFE2_CLK_R 6 69 55 90_DIGRF_A1_RX1_N N16 MPHY2_RX1_DATX RFFE2_SCLK M7 RFFE2_CLK_R 6
OUT OUT L12 VSS21
55 90_DIGRF_A0_RX2_P T17 MPHY2_RX2_DAT RFFE2_SDATA M5 RFFE2_DATA_R 6 55 90_DIGRF_A1_RX2_P T17 MPHY2_RX2_DAT RFFE2_SDATA M5 RFFE2_DATA_R 6
OUT OUT L4 VSS22
55 90_DIGRF_A0_RX2_N R16 MPHY2_RX2_DATX 55 90_DIGRF_A1_RX2_N R16 MPHY2_RX2_DATX
OUT OUT L8 VSS23
55 90_DIGRF_A0_TX_P M17 MPHY2_TX_DAT XO_SUP D17 XO_SUP 6 55 90_DIGRF_A1_TX_P M17 MPHY2_TX_DAT XO_SUP D17
IN IN NC M13 VSS24
55 IN
90_DIGRF_A0_TX_N L16 MPHY2_TX_DATX AFCDAC D15 AFC_DAC 6 55 IN
90_DIGRF_A1_TX_N L16 MPHY2_TX_DATX AFCDAC D15 NC M15 VSS25
XO B17 VCXO_26MHZ 6 XO B17 XCVR1_26MHZ 6
M3 VSS26
XCVR XCVR P13 VSS27
VCTCXO
P3 VSS28
R10 VSS29
R12 VSS30
R6 VSS31
R8 VSS32
VDD_XCVR1_1V8 6
R5903_RF
0.00 T13 VSS33
VDD_XCVR0_1V8 6 6 XO_SUP 1 2 XO_SUP_R
T3 VSS34
0%
1 1 1/32W 1 C5907_RF T5 VSS35
R5904_RF R5912_RF MF
27K 27K 01005 4700PF U10 VSS36
5% 5% XCVR 10% R6506_RF
1/32W 1/32W 6.3V
2 X5R VDD_RFFE_VIO_1V8 6 7 8 9 11 12 13 0.00 U12 VSS37
MF MF 01005 6 RFFE2_CLK_R 1 2 RFFE2_CLK 66
OUT U14 VSS38
2 01005
XCVR 2 01005
XCVR XCVR NFC_TO_BB_CLKREQ 1 6 0%
1/32W
4
VCC MF XCVR
XCVR0_JTAG_TMS 1 1 01005
6 R5902_RF R5905_RF
VTCXO_RF 4.7K 100K
A
XCVR1_JTAG_TMS
A
6
26MHZ-6PPM-1.8V 1% 1%
XCVR0_JTAG_TCK 6 1P6X1P2-SM 1/32W 1/32W
MF MF R6508_RF
XCVR1_JTAG_TCK 0.00 PAGE TITLE
2 01005 2 01005
TRANSCEIVERS
6
6 AFC_DAC 1 3 VCXO_26MHZ 6 XCVR XCVR 6 RFFE2_DATA_R 1 2 RFFE2_DATA 66
VCONT OUT BI
1 1 NOSTUFF
R5909_RF R5900_RF 0%
1/32W DRAWING NUMBER SIZE
562K 562K 1 C5906_RF GND 1 C5950_RF MF
1% 1% 5600PF XCVR 18PF NOTE: GNSS_CLK REQUESTED WITH AT@CMD 01005
Apple Inc.
051-00542 D
2
ET MODULATOR
D D
ALPES II ES2
XW6000_RF
SHORT-10L-0.25MM-SM
16 15 8 6 5 1 PP_VDD_MAIN 1 2 PP_VDD_MAIN_ET VPA_ET 61 62
OUT
OMIT
ET 1 C6000_RF 1 C6001_RF 1 C6002_RF 1 C6003_RF
2.2UF 1000PF 100PF 27PF
20% 10% 5% 5%
6.3V 10V 16V 16V
C 2 X5R-CERM
0201-1
2 X5R
01005
2 NP0-C0G
01005
2 NP0-C0G
01005 C
ET ET ET ET
VCC2 26
PVDD 3
ET_RF
QM81003M
69 61 50_ET_DAC_N 8 VRAMP- LGA
IN
69 61 50_ET_DAC_P 7 VRAMP+
IN
66 65 64 62 61 59 VDD_RFFE_VIO_1V8 15 VIO
IN
65 64 62 61 59 RFFE1_DATA 17 DATA
BI
65 64 62 61 59 RFFE1_CLK 16 CLK
IN
THERM
PAD
GND
ET
1
2
4
5
6
9
10
11
12
13
14
18
19
22
23
27
28
29
30
31
32
20
21
24
25
USID=0XC
B B
A A
PAGE TITLE
ET MODULATOR
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
C6100_RF
56PF R6100_RF
1 2 0.00
61 IN
50_XCVR0_2GLB_TX 50_XCVR0_2GLB_TX_T 1 2
11
0%
4
5% 1 1/32W
6.3V MF
NP0-C0G 01005 VBATT VCC
01005 XCVR L6109_RF
XCVR GSMPA_RF
L6100_RF 3.0NH+/-0.1NH-0.6A
1.0NH+/-0.1NH-0.580A SKY77359
01005 1 2 50_2GMB_PA_OUT 62 1710-1910
XCVR 50_XCVR0_2GLB_TX_M 9 RFIN_LB_0 OUT
NOSTUFF 0201
LGA RFFE
2 50_XCVR1_2GLB_TX_M 10 RFIN_LB_1
1 C6107_RF 1 C6110_RF
2
3
5
6
7
17
TX2GHB B11 50_XCVR0_2GMB_TX 1710-1910 NOSTUFF 2% 2%
2 25V 2 25V
61
OUT 10%
TX2GLB B7 50_XCVR0_2GLB_TX OUT 61 824- 915 2 2 6.3V
CERM-X5R
C0H-CERM
0201
C0H-CERM
0201
TX25 A4 01005 RFFE RFFE
NC NOSTUFF NOSTUFF
NC A2 1 C6116_RF
NC
TXH A10 50_XCVR0_B3_B4_B1_B25_TX 62 1710-1980 18PF
OUT 2%
TXL A8 50_XCVR0_LB_TX 62 699- 915 2 16V
CERM
C
OUT
C XCVR
01005
NOSTUFF
MB HB TDD S-PAD
9 7 VPA_ET VDD_RFFE_VIO_1V8 IN 59 60 61 62 64 65 66
RFFE1_DATA 59 60 61 62 64 65
1 C6115_RF 1C6104_RF BI
VFE_AUX_3V1 RFFE1_CLK
11 9 8 5
18PF 18PF IN 59 60 61 62 64 65
2% 2%
1 C6113_RF 1 C6114_RF 2 16V
CERM 2 16V
CERM
0.1UF 18PF 01005 01005
20% 2% RFFE RFFE
XCVR1_RF 2 6.3V
X5R-CERM 2 16V
CERM
PMB5750
VBATT 11
VIO 14
SDATA 12
SCLK 13
01005 01005
VCC1 8
VCC2 9
BGA RFFE RFFE
SYM 3 OF 5 11 9 8 5 VFE_AUX_3V1
PADACFN A12 50_ET_DAC_N OUT 60 61 69
63 50_XCVR1_B38_B40_B41_RX 27 RX_B38_B40_B41
OUT
63 50_XCVR1_B34_B39_RX 25 RX_B34_B39
OUT
GND THRM_PAD
RFFE
1
2
4
6
7
10
15
17
19
21
22
24
26
28
23
20
18
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
USID=0XF
A A
PAGE TITLE
TDD TRANSMIT
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
FDD TRANSMIT
9 8 7 VPA_ET
VDD_RFFE_VIO_1V8 59 60 61 62 64 65 66
11 9 8 5 VFE_AUX_3V1 1 C6204_RF 1 C6205_RF IN
RFFE1_DATA
18PF 39PF BI 59 60 61 62 64 65
1 C6201_RF 1 C6202_RF 2% 5% RFFE1_CLK
2 16V 2 16V
IN 59 60 61 62 64 65
0.1UF 18PF CERM NP0-C0G
20% 2% 01005 01005
2 6.3V
X5R-CERM 2 16V
CERM
RFFE RFFE
D
01005
RFFE
01005
RFFE D
VCC1 41
VCC2 40
VIO 10
VBATT 7
SDATA 8
SCLK 9
LBPA_RF
2 L6202_RF
61 IN
50_XCVR0_LB_TX RFIN0 RF6110 1.5NH+/-0.1NH-1.0A
3 LGA 1 2
61 IN
50_XCVR1_LB_TX RFIN1 50_LAT_LB_M 50_LAT_LB BI 64 824-915
0201
LB S-PAD
18 OMIT_TABLE
61 50_2GLB_PA_OUT 2G_TX
IN 1 C6213_RF
12 ANT1 16 1.0PF
65 50_LB_DRX LB_DIV
OUT +/-0.1PF
2 25V
C0G
63 50_XCVR0_LB_RX 26 LB_RX0 ANT2 14 201
OUT
L6201_RF OMIT_TABLE
63 50_XCVR1_LB_RX 25 LB_RX1
3.3NH+/-0.1NH-0.5A
OUT
50_UAT_LB_M 1 2 50_UAT_LB 64 824-915
63 50_XCVR0_VLB_RX 24 VLB_RX0
BI
OUT 0201
23 OMIT_TABLE
63 50_XCVR1_VLB_RX VLB_RX1
OUT 1 C6214_RF
1.6PF
+/-0.05PF
GND THRM_PAD
2 25V
C0G-CERM
RFFE 0201
OMIT_TABLE
1
4
5
6
11
13
15
17
19
20
21
22
27
28
29
30
31
32
33
34
35
36
37
38
39
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
USID=0XD PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_HEAD
TABLE_5_ITEM
C C
TABLE_5_ITEM
9 8 7 VPA_ET
B B
29
37
38
26
28
27
VBATT
VCC1
VCC2
VIO
SDATA
SCLK
61 50_2GMB_PA_OUT 34 RFIN_GSM
IN
61 50_XCVR0_B3_B4_B1_B25_TX 31 RFIN_MB C6206_RF
IN
50_XCVR1_B7_B30_TX 32 MHBPA_RF 8PF
61 IN RFIN_HB 1 2
50_LAT_MB_HB_M 50_LAT_MB_HB
MB-HB-FDD BI 64
MB/HB S-PAD
ANT2 13 2
63 50_XCVR0_B1_B4_RX 1 RX_B1
OUT
63 50_XCVR0_B3_RX 3 RX_B3 L6200_RF
OUT
63 50_XCVR1_B7_RX 5 RX_B7
1.2NH-+/-0.05NH-1.1A-0.04OHM
OUT
63 50_XCVR0_B4_RX 17 RX_B4 50_UAT_MB_HB_M 1 2 50_UAT_MB_HB 64 1710-2690
OUT BI
63 50_XCVR0_B25_RX 19 RX_B25 0201
OUT
21 1 C6212_RF OMIT_TABLE
63 OUT
50_XCVR1_B30_RX RX_B30
18PF
GND EPAD 2%
2 25V
C0H-CERM
0201
2
4
12
15
16
18
20
22
23
24
25
30
33
35
36
39
40
41
42
6
9
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
OMIT
A
USID=0XE TABLE_5_HEAD
A
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_ITEM
FDD TRANSMIT
DRAWING NUMBER SIZE
TABLE_5_ITEM
152S00020 1 IND, 12NH, 0201, UH-Q L6203_RF D111 THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
TABLE_5_ITEM
152S2021 1 IND, 1.5NH, 0201, UH-Q L6200_RF D111 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
62 OF 73
NOSTUFF C6212_RF D111 SHEET
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 62 OF 81
8 7 6 5 4 3 2 1
ESQUEMATICOS.COM
8 7 6 5 4 3 2 1
PRIMARY RECIEVE
L6300_RF
22NH-3%-0.25A
10 50_XCVR0_VLB_RX_M 1 2 50_XCVR0_VLB_RX 62
IN
0201
XCVR L6308_RF
15NH-3%-0.3A-0.7OHM
D 10 50_XCVR1_VLB_RX_M 1 2 50_XCVR1_VLB_RX IN 62 D
0201
L6301_RF XCVR 1
10NH-+/-3%-0.25A
10 50_XCVR0_LB_RX_M 1 2 50_XCVR0_LB_RX 62 L6326_RF
IN
01005 18NH+/-3%-0.250A
XCVR 1 0201
XCVR
NOSTUFF
L6317_RF 2
9.1NH-3%-0.17A-1.7OHM L6309_RF
01005 8.2NH-3%-0.3A
XCVR
NOSTUFF 1 2
10 50_XCVR1_LB_RX_M 50_XCVR1_LB_RX IN 62
2 0201
XCVR 1
XCVR PRX
L6327_RF
XCVR PRX
18NH+/-3%-0.250A
0201
XCVR
2
L6312_RF
XCVR1_RF 1.8NH+/-0.1NH-0.8A
XCVR0_RF PMB5750 50_XCVR1_B30_RX_M 50_XCVR1_B30_RX
PMB5750 BGA 10 IN 62
SYM 2 OF 5 0201
BGA XCVR
SYM 2 OF 5 FBRRF1 A16 50_XCVR1_LAT_CPLR IN 64
10 50_XCVR0_B25_RX_M 1 2 50_XCVR0_B25_RX 62
IN
0201 L6315_RF
1
XCVR 3.0NH+/-0.1NH-0.6A
10 50_XCVR1_B34_B39_RX_M 50_XCVR1_B34_B39_RX IN 61
L6323_RF 0201
2.4NH+/-0.1NH-0.6A XCVR
0201
B XCVR
L6329_RF
B
2 5.6NH+/-3%-0.4A
R6300_RF 0201
3.6NH+/-0.1NH-400MA XCVR
10 50_XCVR0_B3_RX_M 50_XCVR0_B3_RX IN 62
0201
1 L6316_RF
NOSTUFF 3.3NH+/-0.1NH-0.5A
L6324_RF 10 50_XCVR1_B40B_NO_FILT_RX_M 50_XCVR1_B40B_NO_FILT_RX IN 62
3.6NH+/-0.1NH-400MA 0201
0201 XCVR 1 C6315_RF
XCVR 2.7PF
+/-0.05PF
2 2 25V
C0G-CERM
0201
XCVR
L6305_RF
0.6NH-+/-0.05NH-1.1A-0.04OHM
10 50_XCVR0_GSM1800_RX_M
0201
XCVR GSMDI_RF
GSM1800-1900
B8856
L6318_RF LGA
3.0NH+/-0.1NH-0.6A
0201
XCVR 50_XCVR0_GSM1800_RX 4 GSM1800
COMMON 1 50_XCVR0_2GMB_RX IN 62
50_XCVR0_GSM1900_RX 3 GSM1900
1
A L6306_RF GND
L6307_RF
3.6NH+/-0.1NH-0.5A A
1.3NH+/-0.1NH-1.1A 0201 PAGE TITLE
XCVR
PRIMARY RECEIVE
2
5
6
10 50_XCVR0_GSM1900_RX_M
0201 2 DRAWING NUMBER SIZE
XCVR
Apple Inc.
051-00542 D
REVISION
L6319_RF
3.0NH+/-0.1NH-0.6A
R
5.0.0
0201 NOTICE OF PROPRIETARY PROPERTY: BRANCH
XCVR
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
63 OF 73
SHEET
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 63 OF 81
8 7 6 5 4 3 2 1
ESQUEMATICOS.COM
8 7 6 5 4 3 2 1
R6400_RF
LATDI_RF 0.00
DPX202690DT-4190A1SJ 11 9 8 5 VFE_AUX_3V1 1 2 VFE_AUX_3V1_LATCP
0805 0%
R6401_RF 1/32W 1 C6409_RF 1 C6410_RF 1 C6411_RF
6 0.00 MF
0.1UF 18PF 0.1UF
62 BI
50_LAT_MB_HB HI COM 2 50_LAT_LB_MB_HB_M 1 2 01005
20% 2% 20%
4
1% 2 6.3V
X5R-CERM 2 16V
CERM 2 6.3V
X5R-CERM
62 50_LAT_LB LO 1/20W 01005 01005 01005
BI 1 C6403_RF MF JLAT1_RF
0201 RFFE RFFE RFFE
0.2PF MM7829-2700
9
GND RFFE NOSTUFF
RFFE +/-0.05PF F-ST-SM
VDD
2 25V
COG-CERM
1
3
5
2
0201 LATCP_RF C6402_RF
RFFE DUAL-COUPLER-MOD 56PF
50_LAT_LB_MB_HB 1 RFIN1 LGA RFOUT1 2 50_LAT1_CPL 1 2 50_LAT1_ANT 1
13 RFIN2 RFOUT2 14
NC NC 5% 1 RFFE
FL6400_RF 25V 3
6 USID NP0-C0G-CERM
10-OHM-1.1A 01005
1 2 5 VIO 4 L6400_RF
VDD_RFFE_VIO_1V8 VDD_RFFE_VIO_LATCP RF_CPL1 50_XCVR0_LAT_CPLR
13 12 11 9 8 7 6 OUT 63
56NH-100MA-3.9OHM
01005 65 64 62 61 60 59 RFFE1_DATA 12 SDATA RF_CPL2 16 50_XCVR1_LAT_CPLR 63 0201
BI OUT
1 C6401_RF 1 C6405_RF 1 C6407_RF 8 SCLK UP_RFFE
59 IN
RFFE1_CLK
27PF 0.033UF 5.0PF 62 61 60
64 FOR ESD AND LOW FREQUENCY IMD
5% 20% +/-0.1PF 65 2
GND
2 16V
NP0-C0G 2 4V
X5R-CERM 2 16V
NP0-C0G
01005 01005 01005 RFFE
3
7
10
11
15
C USID=0X6 C
1 C6406_RF 1 C6408_RF
18PF 0.1UF
2% 20%
9
2 16V
CERM 2 6.3V
X5R-CERM
VDD 01005 01005
RFFE RFFE
UATCP_RF
DUAL-COUPLER-MOD 16 15 6 5 4 3 2 1 PP1V8_SDRAM
62 50_UAT_MB_HB 1 RFIN1 LGA RFOUT1 2 50_UAT_MB_HB_SOUTH 53 54
BI BI 1 C6414_RF 1 C6415_RF
50_UAT_LB 13 RFIN2 RFOUT2 14 50_UAT_LB_SOUTH
62 BI BI 53 54
0.01UF 33PF
FL6401_RF 10% 5% GPIO_RF
10-OHM-1.1A 6 USID 2 6.3V
X5R 2 16V
NP0-C0G-CERM
01005 01005 QM18064
13 12 11 9 8 7 6 VDD_RFFE_VIO_1V8 1 2 VDD_RFFE_VIO_UATCP 5 VIO RF_CPL1 4 50_XCVR0_UAT_CPLR 63
WLCSP
OUT A3 VIO GPO1 A4 LAT_TUNER_GPO1 53 54
01005 65 64 62 61 60 59 RFFE1_DATA 12 SDATA RF_CPL2 16 50_XCVR1_UAT_CPLR 63
OUT
BI OUT
GPO2 B1 LAT_TUNER_GPO2 53 54
65 64 62 61 60 59 RFFE1_CLK 8 SCLK OUT
IN
GPO3 B2 LAT_TUNER_GPO3 53 54
65 RFFE1_CLK_FILT
54 BB_TO_LAT_ANT_SCLK-53[I275] A1 SCLK OUT
1 C6400_RF 1 C6404_RF IN
GPO4 B4 UAT_TUNER_GPO
GND OUT 53 54
0.033UF 5.0PF 65 54 RFFE1_DATA_FILT
BB_TO_LAT_ANT_DATA-53[I275] A2 SDATA
20% +/-0.1PF RFFE
BI
2 4V 2 16V
3
7
10
11
15
X5R-CERM NP0-C0G
01005 01005
NOSTUFF 1 C6412_RF 1 C6413_RF GND
B3
20% 20%
2 6.3V
X5R-CERM
01005
RFFE
2 6.3V
X5R-CERM
01005
RFFE
USID=0X8
NOSTUFF NOSTUFF
A A
PAGE TITLE
Apple Inc.
051-00542 D
REVISION
R
5.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
LB DRX ASM
D D
13 12 5 VFE_LNA_2V7
XCVR0_RF
PMB5750 1 C6503_RF 1 C6501_RF
BGA
SYM 4 OF 5 18PF 0.1UF
2% 20%
9
RD1 W4 50_XCVR0_B1_B4_DRX 12 2 16V
CERM 2 6.3V
X5R-CERM
V5 VDD 01005 01005
RD2 RFFE RFFE R6500_RF
RD3 W6 50_XCVR0_B3_B25_DRX 12
2 LBDR_RF 0.00
12 50_XCVR0_VLB_DRX VLB_RX0 D5325 ANT 16 50_LB_DRX_M 1 2 50_LB_DRX 62
RD4 V7 IN
12 50_XCVR1_VLB_DRX 12 VLB_RX1 LGA 1%
RD5 W8 1 C6504_RF 1/20W
50_XCVR0_LB_DRX 3 LB_RX0 MF
RD6 V9
12
18PF 0201
50_XCVR1_LB_DRX 11 LB_RX1 2% RFFE
2 25V
12
RD7 W10
C0H-CERM
RD8 V11 0201
65 VDD_RFFE_VIO_FILT_1V8 5 VIO RFFE
RD9 W12 IN NOSTUFF
65 64 54 RFFE1_DATA_FILT
BB_TO_LAT_ANT_DATA-53[I275]
7 SDATA
RD10 V13 BI
65 64 54 RFFE1_CLK_FILT
BB_TO_LAT_ANT_SCLK-53[I275]
6 SCLK
RD11 W14 IN
GND EPAD
RD12 V15 50_XCVR0_LB_DRX 12
RD13 W16
1
4
8
10
13
14
15
17
18
19
20
21
RD14 V17 50_XCVR0_VLB_DRX 12
XCVR
USID=0X9
C C
MB HB DRX ASM
13 12 5 VFE_LNA_2V7
BYPASSING SHARED WITH LB DRX ASM
18
XCVR1_RF
2 VDD
PMB5750 12 50_XCVR0_B3_B25_DRX B3_B25
BGA 12 50_XCVR0_B1_B4_DRX 3 B1_B4 MHBDR_RF
SYM 4 OF 5
12 50_XCVR1_B40_B30_DRX 15 B30_B40 D5313
RD1 W4 50_XCVR1_VLB_DRX 12 LGA
12 50_XCVR1_B7_B41_B38_DRX 16 B7_B41_B38
RD2 V5
12 50_XCVR1_B34_DRX 13 B34 R6501_RF
RD3 W6 50_XCVR1_LB_DRX 12
14 0.00
12 50_XCVR1_B39_DRX B39 ANT1 10 50_LAT_MB_HB_DRX_M 1 2 50_LAT_MB_HB_DRX 62
RD4 V7 IN
1%
RD5 W8 50_XCVR1_B7_B41_B38_DRX 12 65 VDD_RFFE_VIO_FILT_1V8 22 VIO 1 C6505_RF 1/20W
ANT2 8
IN
MF
RD6 V9 50_XCVR1_B40_B30_DRX 12 65 64 54 RFFE1_DATA_FILT
BB_TO_LAT_ANT_DATA-53[I275]
20 SDATA 18PF 0201
BI 2% RFFE
RD7 W10 65 64 54 RFFE1_CLK_FILT
BB_TO_LAT_ANT_SCLK-53[I275]
IN
21 SCLK 2 25V
C0H-CERM
RD8 V11 GND THRM_PAD 0201
RFFE
RD9 W12 NOSTUFF
B B
1
4
5
6
7
9
11
12
17
19
23
24
25
26
RD10 V13 50_XCVR1_B39_DRX 12
R6502_RF
W14
0.00
RD11 50_UAT_MB_HB_DRX_M 1 2 50_UAT_MB_HB_DRX IN 66
RD12
RD13
V15
W16
50_XCVR1_B34_DRX 12
USID=0XA 1 C6506_RF
18PF
1%
1/20W
MF
0201
RD14 V17 2% RFFE
2 25V
C0H-CERM
XCVR 0201
RFFE
NOSTUFF
RFFE FILTERING
R6503_RF
0.00
66 64 62 61 60 59 IN
VDD_RFFE_VIO_1V8 1 2 VDD_RFFE_VIO_FILT_1V8 OUT 65
0%
1 C6500_RF 1/32W
MF
1000PF 01005
10% RFFE
2 6.3V
X5R-CERM
01005
R6504_RF
0.00
64 62 61 60 59 BI
RFFE1_DATA 1 2 RFFE1_DATA_FILT BI BB_TO_LAT_ANT_DATA-53[I275]
54 64 65
0%
1 C6507_RF 1/32W
MF
5.0PF 01005
+/-0.1PF RFFE
2 16V
NP0-C0G
A 01005
A
PAGE TITLE
64 62 61 60 59 IN
RFFE1_CLK 1
R6505_RF
0.00 2 RFFE1_CLK_FILT OUT BB_TO_LAT_ANT_SCLK-53[I275]
54 64 65
DIVERSITY RECEIVE ASM'S
DRAWING NUMBER SIZE
0%
1 C6508_RF 1/32W
MF Apple Inc.
051-00542 D
5.0PF 01005 REVISION
+/-0.1PF
2 16V
NP0-C0G
RFFE R
5.0.0
01005 NOTICE OF PROPRIETARY PROPERTY: BRANCH
0201
UP_RFFE
2 VFE_LNA_FILT_2V7 13 LB DRX LNA
13 VFE_LNA_FILT_2V7
BYPASS SHARED WITH MB/HB DRX LNA
D D
10
VDD
13 12 11 9 8 7 6 VDD_RFFE_VIO_1V8 9 VIO
13 1 UAT_TUNER_RFFE_DATA 7 SDATA
13 1 UAT_TUNER_RFFE_CLK 8 SCLK
GND EPAD
1 C6617_RF 1 C6619_RF 1 C6620_RF
18PF 18PF 0.033UF
1
2
4
5
6
11
12
13
15
16
17
18
19
20
21
22
23
24
25
2% 2% 20%
2 16V
CERM 2 16V
CERM 2 4V
X5R-CERM
01005
UP_RFFE
NOSTUFF
01005
UP_RFFE
NOSTUFF
01005
USID=0X2
C
54 53 BI
50_UAT_MB_HB_WEST 1
R6605_RF
0.00 2 50_UUAT_MB_HB_TX 13
MB/HB DRX LNA 13 VFE_LNA_FILT_2V7
C
1%
1/20W 1 C6625_RF 1 C6629_RF
MF 1 C6613_RF
0201 18PF 0.1UF
UP_RFFE 18PF 2% 20%
2% 2 16V 2 6.3V
20
2 25V
C0H-CERM
CERM
01005
X5R-CERM
01005
0201 VDD UP_RFFE UP_RFFE
UP_RFFE
NOSTUFF MHBLN_RF
50_UUAT_MB_HB_TX 4 IN_TX ANT 16 50_UUAT_MB_HB
13
SKY13703-19 BI 67
1
3
5
6
7
8
9
10
11
12
13
14
15
17
18
19
24
25
26
27
28
2 25V
COG-CERM
0201
UP_RFFE
NOSTUFF USID=0X3
B B
0%
1/32W
MF
01005
R6601_RF
0.00
59 BI
RFFE2_DATA 1 2 UAT_TUNER_RFFE_DATA 1 13
0%
1/32W
MF
01005
A A
PAGE TITLE
Apple Inc.
051-00542 D
REVISION
R
5.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
66 BI
50_UUAT_LB 1
1%
R6708_RF
1/20W
MF
0201
0.00 2 50_UUAT_LB_PLEXER
1 C6726_RF
UAT1
OMIT_TABLE 0.5PF JUAT1_RF
+/-0.05PF
25V
2 COG-CERM MM8830-2600B
0201 F-RT-SM
OMIT_TABLE QUADP_RF
10 LB ACFM-W512-AP1 L6704_RF
C6707_RF
L6702_RF LGA 6.8PF 2.3NH-+/-0.1NH-0.6A-0.12OHM TO ANTENNA FEED
0.00 14
66 IN
50_UUAT_MB_HB 50_UUAT_HB_PLEXER MB-HB ANT 5 50_UAT1 1 2 50_UAT1_M 1 2 50_UAT1_TEST 1 2 50_UAT1_TUNER BI 53 54
1 C R
1% WIFI 0201
1/20W +/-0.1PF 1 OMIT_TABLE
MF 1 17 GNSS 25V
0201 C0G
0201 GND
OMIT_TABLE OMIT_TABLE 1 C6728_RF
L6703_RF UP_RFFE
L6705_RF
3
11NH-3%-0.3A 0.6PF
12NH-3%-0.3A-0.5OHM 0201 +/-0.05PF
0201 GND OMIT_TABLE 25V
2 CERM
EPAD
OMIT 0201
2 OMIT_TABLE
2
3
4
6
7
8
9
11
12
13
15
16
18
19
2
C FOR ESD AND LOW FREQUENCY IMD
C
R6711_RF
0.00
54 53 BI
50_UAT_WLAN_2G_WEST 1 2 50_UAT_WLAN_2G_PLEXER
1%
1/20W 1
MF TABLE_5_HEAD
MATCHING CONTROLLED BY WIFI_MLB 9.1NH+/-0.3%-0.3A 131S0424 1 CAP, 6.8PF, 0201, HQ C6707_RF D101
0201 TABLE_5_ITEM
68 OUT
50_GNSS 1 2 50_GNSS_PLEXER 131S0349 1 CAP, 6.2PF, 0201, HQ C6707_RF D111
1% TABLE_5_ITEM
TABLE_5_HEAD
B B
TABLE_5_ITEM
A A
PAGE TITLE
Apple Inc.
051-00542 D
REVISION
R
5.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
D D
GNSS_RF
BCM47734
L6800_RF
WLBGA 120NH-5%-40MA
G1 TMO GNSS_TCXO A3 GNSS_26MHZ_TCXO 15 15 VDD_GNSS_AUX_1V8 1 2 VGNSS_LNA_L
0201
& BLANKING
TEST MODE PIN CNTIN A4 GNSS_26MHZ_CLKOUT 59 GNSS
CLOCKING
IN
1 C6803_RF
GPIO_18/SYNC B5 AP_TO_GNSS_TIME_MARK IN 53 54 69
0.1UF
I2S & JTAG INTERFACE GFIL_RF 20%
A7 GPIO_04/I2S_MCLK CLK32 E3 TCXO_BB_GNSS_32K GPS-GNSS 2 6.3V
7
NC IN 56 69 X5R-CERM
SAFGB1G56XA0F57 VDD 01005
B7 GPIO_05/I2S_LRCI L6801_RF GNSS
NC 7.5NH+/-0.3%-0.4A LGA GLNA_RF
GNSS RF & ANALOG SKY65766-13
54 53 AP_TO_GNSS_DEVICE_WAKE C7 GPIO_06/I2S_BCLK GNSS_RFIN B1 50_GNSS_RFIN 1 2 50_GNSS_SAW 4 UNBAL_PRT UNBAL_PRT 1 50_UUAT_GNSS 9 RFOUT LGA RFIN 1 50_GNSS 67
IN IN
0201
D7 GPIO_07/I2S_SDI GNSS_AUX_OUT B3 GNSS_IF_TEST_OUT 69
GNSS GND LNA_EN 3 GNSS_EXT_LNA_EN 15 16
NC OUT 1 C6802_RF
GND
1.5PF GNSS
6
5
3
2
UART_GNSS_TO_AP_RXD F7 GPIO_00/HOST_SPI_CLK/ GPIO_10/UART1_RTS* C6 +/-0.1PF GNSS
2 16V
69 54 53 OUT NC
8
6
5
4
2
UART0_TXD/I2CS_SCL NP0-C0G
G7 GPIO_01/HOST_SPI_FSS/ GPIO_11/UART1_CTS* D6 NC 01005
UART_AP_TO_GNSS_TXD
HOST INTERFACE
69 54 53 IN
UART0_RXD/I2CS_SDA GNSS
H7 GPIO_02/HOST_SPI_RXD/ GPIO_12/SPI1_RXD E6 NC
69 54 53 UART_GNSS_TO_AP_CTS_L
GPIO_21/SPI1_TXD E5
OUT
UART0_RTS* NC
UART_AP_TO_GNSS_RTS_L J7 GPIO_03/HOST_SPI_TXD/
PMU INTERFACE
D1 VDD1P2_GRF GPIO_27/SPI1_FSS E4 NC
VDD_GNSS_GRF_1V2
C2 VDD1P8_AUX GPIO_17/LNA_EN A5 GNSS_EXT_LNA_EN 15 16
15 VDD_GNSS_AUX_1V8
VDD_GNSS_IO_1V8 C3 VDD1P8_IO GPIO_19/UART1_RXD C5 NC
F2 VDD_PMU_IN_AON GPIO_20/UART1_TXD D5 NC
15 PP_VDD_MAIN_GNSS
6 5 4 3 2 1 PP1V8_SDRAM D2 VDD_PMU_IN GPIO_24/I2S_SDO F4
16 11 NC
69 54 53 PMU_TO_GNSS_EN F1 NSTANDBY GPIO_25/I2S_LRCO/IFVALID B4 GNSS_BLANK 55
IN IN
GNSS_REF_CAP E1 REF_CAP
1 C6804_RF 1 C6805_RF 1 C6806_RF 1 C6812_RF 1 C6813_RF 1 C6807_RF 1 C6808_RF 1 C6810_RF 1 C6801_RF 1 C6814_RF 1 C6809_RF
ADC_IN1/GPIO_28 J1
1UF 1UF 1UF 47PF 1UF 0.1UF 1UF 2.2UF 100PF 27PF 1UF 1 C6811_RF NC
20% 20% 20% 5% 20% 10% 20% 20% 5% 5% 20% H1 VDD_ADC ADC_IN2/GPIO_29 J2
2 16V 2 16V 2 16V 2 16V 2 16V 2 16V 2 16V 2 6.3V 2 16V 2 16V 2 16V 0.01UF NC
CER-X5R CER-X5R CER-X5R CERM CER-X5R X5R-CERM CER-X5R X5R-CERM NP0-C0G NP0-C0G CER-X5R 10% ADC_IN3/GPIO_30/SWDIO J3
POWER IINPUT
0201 0201 0201 01005 0201 0201 0201 0201-1 01005 01005 0201 2 16V A2 VDD_IF NC
GNSS GNSS GNSS GNSS GNSS GNSS GNSS GNSS GNSS GNSS GNSS X5R-CERM ADC_IN4/GPIO_31/SWDCLK J4
0201 NC
GNSS E7 VDD_IO ADC_IN5/GPIO_32/UART0_RTS* H3
NC
GNSS_RF.J5 GNSS_RF.A1,A2 GNSS_RF.E7 GNSS_RF.D2 ADC_IN6/GPIO_33/UART0_RXD H4
A1 VDD_LNA NC
ADC_IN7/GPIO_34/UART0_CTS* G3
NC
J5 VDD_SRAM ADC_IN8/GPIO_35/UART0_TXD G4
NC
ADC INTERFACE
C4 VSS_CORE ADC_REF H2
XW6800_RF G5 VSS_CORE
SHORT-10L-0.25MM-SM
B PP_VDD_MAIN 1 2 PP_VDD_MAIN_GNSS
B
GROUND
16 8 7 6 5 1 15
C1 VSS_IF
OMIT
GNSS B2 VSS_LNA
E2 VSS_PMU
TCXO
KEEP AWAY FROM HEAT SOURCES
15 VDD_GNSS_AUX_1V8
1 C6800_RF
0.1UF
4
20%
2 6.3V
VCC
X5R-CERM
GTCXO_RF 01005
26MHZ-4PPM-1.8V GNSS
1P6X1P2-SM
3 GNSS_26MHZ_TCXO 15
OUT
GND
GNSS
A A
2
1
PAGE TITLE
GNSS
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
BASEBAND
55 OUT OMIT OMIT OMIT 55 OUT NOSTUFF
BB_HW_ID<1>
D
55
9 SIM_DETECT_GND SIM_DETECT 8 SIM1_DETECT OUT 1
D R6910_RF
OUT 55 69
BB_HW_ID<2>
55 OUT HW CONFIG DEV_HW_CONFIG 1.00K
1 1 1 RESERVED Z 1%
SIM1_CLK 3 CLK J_SIM_RF IO 7 SIM1_IO 1/32W
PP6901_RF
69 55 IN BI 55 69 R6902_RF R6904_RF R6907_RF MF
P2MM-NSM RCPT-WIDE-HSG-THICK-PIVOT 1.00K 1.00K 1.00K RESERVED 0
SM 1% 1% 1% 2 01005
BASEBAND
PP
1 AP_TO_BBPMU_SDWN_L 1 2 5 69 55 IN
SIM1_RST 2 RESET F-RT-SM SWP 6 SIM1_SWP BI 53 54 69 1/32W 1/32W 1/32W RESERVED 1 NOSTUFF
MF MF MF
OMIT 2 01005
BASEBAND 2 01005
BASEBAND 2 01005
BASEBAND
16 5 4 2 VDD_SIM1 1 VCC 2 OMIT OMIT OMIT
PP6903_RF DZ6900_RF NOTE: STUFFING FOR HWID IS IN RADIO_MLB_FF SUB-DESIGN
P2MM-NSM 1 C6900_RF
GND
5.5V-6.2PF
SM
1 BBPMU_PWRGOOD 1 DZ6901_RF 0201
2.2UF
5
10
11
12
13
14
15
16
3 5 6
PP
20% 12V-33PF SIM 1 C6901_RF HARDWARE HW_ID<2:0> HARDWARE HW_ID<2:0> HARDWARE HW_ID<2:0>
OMIT 6.3V 01005-1
2 X5R-CERM 1 100PF RF DEV2 0 0 Z ICE16 PROTO0 0 0 0 ICE16.1 PROTO1 Z Z 1
0201-1 2 SIM 5%
PP6904_RF SIM 16V RF DEV2.1 0 Z 0 ICE16 PROTO0 ES2 0 0 1 ICE16.1 PROTO2 Z 1 Z
P2MM-NSM 2 NP0-C0G
SM
1 BBPMU_XG_RESET_L 01005 RF DEV3 0 Z Z ICE16 PROTO1 0 1 0 ICE16.1 EVT Z 1 1
3 5
PP BASEBAND RF DEV4 Z 0 0 ICE16 PROTO2 0 1 1 ICE16.2 EVT 1 Z Z
OMIT
RF DEV4.1 Z 0 Z ICE16 PROTO2 ES2.2 1 0 0 ICE16.1 EVT2 1 Z 1
PP6905_RF RF DEV4.2 Z Z 0 ICE16 EVT 1 0 1 ICE16.2 EVT2 1 1 Z
P2MM-NSM
SM
1 BBPMU_XG_RESET_SD_L RF DEV5 Z Z Z ICE16 EVT2 CARRIER 1 1 0 ICE16.1 DVT/PVT 0 1 Z
3 5
PP
RF DEV5.1 0 Z 1 ICE16 DVT/PVT 1 1 1 ICE16.2 DVT/PVT Z 0 1
BOOTCFG
OMIT
16 2 SIM1_IO
PP6906_RF 16 2 SIM1_CLK
P2MM-NSM 16 15 11 6 5 4 3 2 1 PP1V8_SDRAM
SM 16 2 SIM1_RST 16 15 11 6 5 4 3 2 1 PP1V8_SDRAM
1 TCXO_BB_GNSS_32K 3 15
PP
SIM1_SWP 1
OMIT
16 1
1 1 R6911_RF
R6905_RF R6908_RF 1.00K
1 1.00K 1.00K 1%
PP6909_RF 1 1% 1% 1/32W
P2MM-NSM DZ6902_RF 1/32W 1/32W MF
SM MF MF
1 BB_DEBUG_ERROR DZ6904_RF 2 01005
PP 2 SG-WLL-2-2 SG-WLL-2-2 2 01005
BASEBAND 2 01005
BASEBAND PCIE_AP_TO_BB_PERST_L
BASEBAND
NOSTUFF
OMIT ESD202-B1-CSP01005 ESD202-B1-CSP01005 56 OUT
HW_MON1
69 55 54 53 OUT
1 2 1 STUFF FOR VENDOR CONFIG ONLY
2 56 HW_MON2
C
OUT
C PP6961_RF
P2MM-NSM
SM
1 AP_TO_BB_MESA_ON
DZ6903_RF
SG-WLL-2-2
DZ6905_RF
SG-WLL-2-2 HW_MON1 HW_MON2 TRIG_IN
PP 1 2
ESD202-B1-CSP01005 ESD202-B1-CSP01005 NAND 0 0 1
OMIT 2 2
FLASHLESS 1 0 1
PP6962_RF FLASHLESS WDOG DIS 1 1 0
P2MM-NSM
XCVR
SM
1 BB_TO_AP_GSM_TXBURST NAND 1 1 1
1 2
PP
BOOTSTRAPS ARE INTERNALLY PULLED DOWN
OMIT
PP6963_RF PP6931_RF
P2MM-NSM P2MM-NSM
SM SM
DEBUG CONNECTOR
1 AP_TO_BB_TIME_MARK 1 2 1 SYSCLK_26MHZ 2 6
PP PP
OMIT OMIT
PP6932_RF
P2MM-NSM
ETIC MLB 516S1185
FLEX 516S1184
SM
1 50_ET_DAC_P 7 8
PP J_DEBUG
OMIT 20-5857-036-001-829
PP6933_RF F-ST-SM
P2MM-NSM 41
SM
1 50_ET_DAC_N 7 8 16 15 8 7 6 5 1 PP_VDD_MAIN 37 38
PP
OMIT
2 1 USB_BB_VBUS 1 2 VDD_SIM1 2 4 5 16
90_USB_BB_P 3 4 SIM1_RST
GNSS BBPMU
2 1 2 16
2 1 90_USB_BB_N 5 6 SIM1_CLK 2 16
PMU_TO_BBPMU_ON 7 8 SIM1_IO
B B
5 1 2 16
16 15 11 6 5 4 3 2 1 PP1V8_SDRAM 9 10 SIM1_SWP 1 16
PP6935_RF
PP6937_RF P2MM-NSM 3 BB_JTAG_TDO 11 12 SIM1_DETECT 2 16
P2MM-NSM SM
1 BBPMU_VCLK 13 14
SM 2 5 3 BB_JTAG_TDI VDD_SIM2
1 GNSS_EXT_LNA_EN 15
PP
PP
OMIT 3 BB_JTAG_TRST_L 15 16 SIM2_RST
OMIT 17 18
3 1 AP_TO_BB_RESET_L SIM2_CLK
PCIE
PP6954_RF
PP6936_RF P2MM-NSM 3 BB_JTAG_TCK 19 20 SIM2_IO
P2MM-NSM SM
1 BBPMU_VDIO 21 22
SM 2 5 3 BB_JTAG_TMS SIM2_SWP
1 PMU_TO_GNSS_EN 1 15
PP
PP
OMIT SELECT 7 6 5 1 PP_VDD_MAIN 23 24 SIM2_DETECT
OMIT 16 15 8
25 26
SIM2_IO_R BB_JTAG_RESET_L
PP6915_RF PP6938_RF 2 1 UART_BB_TO_AP_RXD 27 28 UART_BB_TO_WLAN_COEX 1 2
P2MM-NSM P2MM-NSM 29 30
SM SM 2 1 UART_AP_TO_BB_TXD UART_WLAN_TO_BB_COEX 1 2
1 100_PCIE_AP_TO_BB_TX_P 1 2 1 UART_GNSS_TO_AP_RXD 1 15
PP PP
PP_VDD_BOOST 31 32
OMIT OMIT NC
33 34
PP6916_RF PP6939_RF 35 36
P2MM-NSM P2MM-NSM
SM SM
1 100_PCIE_AP_TO_BB_TX_N 1 2 1 UART_AP_TO_GNSS_TXD 1 15
PP PP
39 40
DIGRF
OMIT OMIT
42
PP6964_RF
P2MM-NSM NOSTUFF
SM
1 UART_GNSS_TO_AP_CTS_L 1 15 PP6950_RF
PP
P2MM-NSM
OMIT SM
1 90_DIGRF_M1_TX_P 2 6
PP
PP6918_RF PP6965_RF OMIT
P2MM-NSM P2MM-NSM
SM SM
1 100_PCIE_BB_TO_AP_RX_N 1 2 1 UART_AP_TO_GNSS_RTS_L 1 15 PP6951_RF
PP PP
P2MM-NSM
OMIT OMIT SM
1 90_DIGRF_M1_TX_N 2 6
PP
A
PCIE GND
PP6919_RF PP6966_RF OMIT
P2MM-NSM
SM
1 PCIE_AP_TO_BB_PERST_L 1 2 16
P2MM-NSM
SM
1 AP_TO_GNSS_TIME_MARK 1 15 PP6952_RF
A
PP PP
P2MM-NSM PAGE TITLE
OMIT OMIT SM
PP
1 90_DIGRF_A1_RX1_P 2 6 PP6948_RF
P2MM-NSM
TEST POINTS & SIM
PP6920_RF PP6940_RF OMIT SM DRAWING NUMBER SIZE
P2MM-NSM P2MM-NSM 1
SM
1 PCIE_AP_BI_BB_CLKREQ_L 1 2
SM
1 GNSS_IF_TEST_OUT 15 PP6953_RF
PP
OMIT Apple Inc.
051-00542 D
PP PP
P2MM-NSM REVISION
SM
OMIT OMIT
PP
1 90_DIGRF_A1_RX1_N 2 6 PP6949_RF
P2MM-NSM
R
5.0.0
PP6921_RF PP6945_RF OMIT SM NOTICE OF PROPRIETARY PROPERTY: BRANCH
P2MM-NSM P2MM-NSM 1
SM SM PP
THE INFORMATION CONTAINED HEREIN IS THE
1 PCIE_BB_TO_PMU_WAKE_L 1 2 1 GNSS_TO_PMU_HOST_WAKE 1 15 OMIT PROPRIETARY PROPERTY OF APPLE INC.
PP PP
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
OMIT OMIT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
69 OF 73
SHEET
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 69 OF 81
8 7 6 5 4 3 2 1
ESQUEMATICOS.COM
8 7 6 5 4 3 2 1
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
8 0006400877 ENGINEERING RELEASED 2016-06-14
D
D10 RADIO_MLB_FF D
IO
SM INOUT 50_UAT1_EAST 5 SIGNAL3-E SIGNAL3-W 11 50_UAT1_WEST INOUT
50_UAT1_EAST 6 SIGNAL1-U SIGNAL1-L 7 50_UAT_MB_HB_SOUTH
59 BI IO INOUT
59 BI OUT 53 INOUT
1 50_LAT_WLAN_NORTH 2 SIGNAL2-U SIGNAL2-L 11 50_LAT_WLAN_SOUTH 1
2 23 INOUT
B UP_RFFE 1
B
COAX
32
W2BPF_RF
WLAN-BT-LTE
885118
TRUE
LGA C7701_RF
L7700_RF 3.6PF
1 0.00 1 1 INPUT
IO
50_LAT_WLAN_G_1 1 2 50_WLAN_G_1_BPF OUTPUT 4 50_WLAN_G_1_M 1 2 50_WLAN_G_1_DPLX JLAT3_RF
0% MM7829-2700
1/32W 1 GND +/-0.1PF W25DI_RF F-ST-SM
MF 1 16V 1 LFD212G45MP2E013
01005 WLAN_RFFE NP0-C0G 2
01005 LGA
2
3
5
WLAN_RFFE
OMIT L7701_RF WLAN_RFFE L7703_RF R7701_RF
L7702_RF 0.00 2
9.1NH-3%-0.17A-1.7OHM 9.1NH-3%-0.17A-1.7OHM 4.0NH-+/-0.1NH-0.27A 4 P1 P3 2 50_LAT_WLAN_M 1 50_LAT_WLAN_NORTH 1 1 50_LAT_WLAN_SOUTH 1
01005 01005 01005
OMIT WLAN_RFFE WLAN_RFFE 0%
6 P2 1/32W
1 C7703_RF MF 1 C7704_RF 3
2 GND 01005
2 2 0.2PF WLAN_RFFE 0.2PF
WLAN_RFFE +/-0.1PF OMIT +/-0.1PF
2 16V
16V
1
3
5
NP0-C0G 2 NP0-C0G
01005 01005
R7700_RF WLAN_RFFE WLAN_RFFE
0.00 2 OMIT OMIT
IO
50_LAT_WLAN_A_1 1 50_WLAN_A_1_DPLX
0%
1 C7700_RF
0.2PF
1/32W
MF
01005
1 THROUGH METROCIRC
A +/-0.1PF
16V
2 NP0-C0G
WLAN_RFFE
OMIT
C7702_RF SYNC_MASTER=Sync SYNC_DATE=05/17/2016
A
01005 4.3NH-3%-0.270A PAGE TITLE
WLAN_RFFE
OMIT
01005
WLAN_RFFE
OMIT
spare
DRAWING NUMBER SIZE
2
Apple Inc. 051-00419 D
REVISION
R
8.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
2 BB_TO_UAT_SCLK
1 C5904_RF
120PF
10%
2 10V
CER-X7R PLEASE CONTACT ANTENNA (MATT MOW)
53 IN
BB_TO_LAT_ANT_DATA
1 C5909_RF
33PF
5%
C 2 16V
NP0-C0G-CERM
01005 C
LB/MLB/GNSS/MB/HB
STANDOFF
4
0201
VDD
2
USPDT_RF
RF1341
L8008_RF
3.0NH+/-0.1NH-0.6A
WLCSP
53 BB_BUFFER_GPO1 3 CB 1 USPDT_RF 1 2 DC_BLOCK
IN
RF1 6 0201
1 C8005_RF GNDA RFGND
5%
33PF 1 C8008_RF
2
16V
2 NP0-C0G-CERM 18PF
2%
01005 2
25V
C0H-CERM
0201
ALT_GND 1 TP8000_RF
A
SM-TP1P25-TOP
OMIT
5G WIFI
UAT GROUND RING STANDOFF
1
OMIT_TABLE
L8009_RF
9.1NH-0.4A
C7731_RF SUAT2_RF
STDOFF-2.56OD1.4ID.99H-SM
03015
1.2PF
IO
50_UAT2_M 1 2 50_UAT2_FEED 1 2 PP8000_RF
P2MM-NSM
SM
+/-0.05PF UP_RFFE 2 CHASSIS_GND 1
2 CHASSIS_GND 25V 1 1 PP
C0G-CERM
0201 NOSTUFF
1 C6734_RF 1 C6735_RF 1 C6730_RF 1 C6731_RF 1 C6732_RF 1 C6733_RF 1 C7730_RF L7709_RF
1.8NH+/-0.1NH-0.8A 3.0NH+/-0.1NH-0.6A
A 5%
100PF
5%
18PF
5%
220PF
5%
56PF 4.0PF
+/-0.1PF 5%
220PF NOSTUFF 0201 0201
A
2 16V
NP0-C0G 2 16V
CERM 2 6.3V
CERM 2 16V
NP0-C0G 2 16V
NP0-C0G 2 6.3V
CERM L6710_RF SGND_RF
SYNC_MASTER=Sync
PAGE TITLE
SYNC_DATE=05/17/2016
2
UP_RFFE Apple Inc. 051-00419 D
REVISION
R
8.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH