doi 10.

1515/ijeeps-2012-0040 International Journal of Emerging Electric Power Systems 2013; 14(2): 123–138

Madhan Mohan*, Bhim Singh, and Bijaya Ketan Panigrahi

Design, Control, and Modeling of a New Voltage

Source Converter for HVDC System

Abstract commutated thyristor HVDC system [1–8]. Fully con-

A New Voltage Source Converter (VSC) based on neutral
clamped three-level circuit is proposed for High Voltage
DC (HVDC) system. The proposed VSC is designed in a
multipulse configuration. The converter is operated by
Fundamental Frequency Switching (FFS). A new control
method is developed for achieving all the necessary con-
trol aspects of HVDC system such as independent real
and reactive power control, bidirectional real and reac-
tive power control. The basic of the control method is
varying the pulse width and by keeping the dc link
voltage constant. The steady state and dynamic perfor-
mances of HVDC system interconnecting two different
frequencies network are demonstrated for active and
reactive power control. Total number of transformers
used in this system are reduced to half in comparison
with the two-level VSCs for both active and reactive
power control. The performance of the HVDC system is
improved in terms of reduced harmonics level even at
fundamental frequency switching. The harmonic perfor-
mance of the designed converter is also studied for dif-
ferent value of the dead angle (β), and the optimized
range of the dead angle is achieved for varying reactive
power requirement. Simulation results are presented for
the designed three level multipulse voltage source con-
verters with the proposed control algorithm.
Keywords: voltage source converter, high voltage direct
current transmission, THD, dead angle (β)
*Corresponding author: Madhan Mohan, IIT, New Delhi, India,
E-mail: dmadhanmohan@gmail.com
Bhim Singh, IIT, New Delhi, India, E-mail: bhimsinghr@gmail.com
Bijaya Ketan Panigrahi, IIT, New Delhi, India,
E-mail: bkpanigrahi@ee.iitd.ac.in
1 Introduction
Developments in power electronics technology and semi-
conductor devices have made the HVDC transmission
system a better alternate to the conventional line
trolled power electronics devices such as Insulated Gate
Bipolar Transistor (IGBT) and Gate Turn Off (GTO) thyr-
istor, Integrated Gate Commutated Thyristors (IGCT) are
some of the recent self-commutated semiconductor
devices, which made the VSC (Voltage Source
Converter) technology more popular. This VSC based
HVDC system can control the reactive power of the ac
system at both the converters end independently, while
maintaining continuous balance of active power flow
between these two converters [3, 4]. A prototype model
of 300 MW ac–dc converter, using series of GTO devices
of rating 6 kV and 6 kA, has been developed for HVDC
transmission system and it is also applicable for BTB
interconnection [5]. The PWM (pulse width modulation)
technique is used to control the active and reactive power
independently and it also reduces the voltage and current
harmonics. However, application of PWM technique to
the system having high dc link voltage and power rating
causes significant increase in switching losses, thus
reducing the conversion efficiency and increasing the
installation cost by cooling equipments.
Either multipulse voltage source converter or multi-
level converter can be used to overcome the issue of high
switching losses in HVDC systems. These converter con-
figurations are well suited for HVDC systems [6–8]. In
multipulse converter configurations, the low value of
THD is achieved by employing a harmonics cancellation
technique. The multi-module VSC configuration is oper-
ated at low switching frequency, 6 to 10 times of the
fundamental frequency. In this configuration, a number
of bridges are operated in series. For example, the mini-
mum order of harmonic is 23rd when the HVDC system is
operated at the frequency of 350 Hz, with a fundamental
frequency of 50 Hz [9]. The harmonic level of the basic
two-level, 6-pulse converter is not practically viable for
such applications. Number of pulses increases by 6n at
the dc bus, and the minimum harmonics order at the ac
mains becomes 6n–1, when n number of converters are
connected in parallel or series configuration. A set of
sixteen two-level converters have to be used to achieve
the dual 48-pulse converter operation and the number of
steps is increased at the ac side voltage and the ac

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124 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System

current almost becomes sinusoidal waveform [10, 11]. It
uses a total of thirty-two transformers on both the
rectifier and the inverter sides.
This paper proposes a new three-level 48-pulse
voltage source converter with the dynamic dead angle
(β) control. The control and switching of the three-level
converters are designed in such a way that the active
and reactive power control is achieved in all the four
quadrants with constant dc link voltage. It uses only
eight three level VSC bridges and eight transformers per
station which are half in number compared to the two-
level converter. This reduces the number of transformers
used in the HVDC systems with better control and
improved power quality. This results in a great reduction
of voltage and current harmonics without performing
pulse width modulation control. The objective of this
paper is to design a multipulse voltage source converter
for high power and high voltage applications with mini-
mum switching losses, minimum voltage and current
THDs, better control and cost effective for HVDC system
[12, 13].
2 Design of three-level 48-pulse
VSC based HVDC system
A design of three-level 48-pulse voltage source converter
based HVDC system is presented in this section. Figure 1
shows the proposed HVDC system configurations of
100 MW, 48-pulse three-level voltage source converter con-
nected to 33 kV systems on both rectifier and inverter
stations. The converter station uses eight basic 6-pulse
three-level converters topology to realize 48-pulse voltage
source converter configuration. Each converter is operated
at a phase angle difference of 7.5° between each other.
Converters (1 and 5) are provided with a phase shift of
−3.75°, converters (2 and 6) are provided with −11.25°,
converters (3 and 7) are provided with 11.25°, and conver-
ters (4 and 8) are provided with a phase shift of 3.75°,
through their gating pulses. This results in a 48-pulse
converter operation of the system having 7.5° phase shift
in applied voltage between each converter. These conver-
ters are connected in parallel on the dc side with an energy

Three level Three level

GTO converter GTO converter
a1 a1
1 +
+
1
C1
b1 N N b1
C2 –
c1 – c1

2 a1
+
+ a1 2
b1 N N b1

c1 – –
c1

3 a1 + a1 3
+

b1 N N b1

c1 – – c1

4 a1 + a1 4
+

33 kV, 60 Hz b1 N N b1 33 kV, 60 Hz

Vs1
–
c1
Vs2
c1 –
XL XL

5 a1
+
+ a1 5
b1 N N b1

c1 – – c1

6 a1 6
+ + a1

b1
N b1
N
c1 – –
c1

a1 + a1
7 + 7
b1 b1
N N
–
c1 – c1

a1
8 + + a1 8
b1 N N b1

c1 – –
c1

Figure 1 A three-level 48-Pulse voltage source converter based HVDC system.

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 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System 125

storing mid-point dc capacitor. The ac sides of all the eight transmission system. The system parameters for simulation
converters are connected to an isolated delta connected of three-level 48-pulse VSC based HVDC system is listed in
transformer secondary windings. Table 1.
First four VSCs bridge converters are connected in
Y-Δ configuration and the last four VSCs bridge conver- Table 1 System parameters of three-level 48-pulse VSC based
ters are connected in Δ-Δ configuration. Each converter HVDC system.
cell is rated at 12.5 MW which consists of 12 GTO thyris-
tors and 18 diodes and two dc mid-point capacitors form- Design parameters Design values

ing a three-phase voltage-source converter. The star and Rated active power P 100 MW
delta connected primary windings are connected in series Line-to-line supply voltage Vs 33 kV
together. The total number of the GTO thyristors used in Frequency f1/f2 50 Hz/60 Hz
the 100-MW BTB system reaches 16 × 6 = 96. ac inductance L1/L2 6.9 mH/5.7 mH
dc link voltage Vdc 3 kV
The detailed transformer connection used for three-
dc link capacitance C1/C2 0.125 F/0.125 F
level 48-pulse VSC is shown in Figure 2. The supply voltage Transformation ratio n 1/2
of 33 kV is applied to primary windings of the transformers.
This voltage is equally divided in all the eight primary
windings because of their series connection. The dc link 2.1 Concept of dead angle (β)
voltage can be designed according to the system config-
uration and by selecting suitable turns ratio of the conver- A three-level voltage source converter unit consists of
ter transformer. For back-to-back application, the dc link three legs, and there are four valves (each valve is GTO/
voltage can be designed as low as possible [14]. The voltage IGCT connected in parallel with a reverse diode) in a
in each primary winding is 33/8 kV and the transformation phase leg, two inner valves and two outer valves. The
ratio is 1/2 therefore, the secondary winding voltage is basic three-level neutral point clamped voltage source
rated at 2.1 kV. The peak value of 2.1 kV is 2.9 kV. converter is shown in Figure 3. There are three switching
Therefore, the dc voltage is taken as 3 kV. This makes condition for three-level converters. First condition is 1–2
isolation and protection much easier than a dc link voltage ON, 1′-2′ OFF, second condition is 2–2′ ON, 1–2′ OFF, and
as high as or higher than 250 kV in a conventional HVDC third condition is 1′-2′ ON, 1–2 OFF.

Conv.1
a1 +
+
C1
b1 N Vdc
C2
c1 –
Conv.2 –
a2 +

b2 N

c2 –
Conv.3
Vsa a3 +

b3 N
Vac1
c3 –
Vac4 Conv.4
a4 +

Vac5 b4 N
Vab8

Vab5 c4 –
3-phase AC Vac8
supply Conv.5
a5 +

Vbc4 b5 N
Vab4 Vbc8 Vbc5
c5 –
Vab1 Vbc1
Vsb Conv.6
a6 +
Vsc b6 N

c6 –
Conv.7
a7 +

b7 N

c7 –
Conv.8
a8 +

b8 N

c8 –

Figure 2 Transformers connection for three-level 48-pulse voltage source converter.

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126 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System

Vdc1

C1
2 D1

R
N1
Y
Vdc
B
1'
D2 C2
Vdc2

2'

Figure 3 Basic three-level neutral point clamped voltage source converter.

Vao
σ
V1
π/2 3π/2 ωt
0
π
–V1
2π
–Vao (i)

Vao
σ
V1 2β β
β
π/2 3π/2 ωt
0
β π−β π 2π
–V1

–Vao (ii)

Figure 4 Stepped waveform of (i) two-level VSC (ii) three-level VSC.

These three conditions give that only two valves out of the
four in a phase-leg are switched at any time to develop a
three-level output ac voltage waveform. The inner and outer
valves are series connected and the two clamping diodes D1
and D2 are connected to the mid-point of the split valves 1–2
and 1′-2′ and to the mid-point N of the dc capacitors and so,
six clamping diodes are needed for the three legs. Each of
the valves has to block one-half of the dc link voltage and
the ac pole voltage can be (0 or ±Vdc/2). Figure 4 shows a
two-level and three-level output ac voltage waveforms. The
three-level voltage is measured between phase and dc neu-
tral point N. It can be seen that when the valves 1–2 are
conducting, the phase terminal is connected to the positive
dc terminal, and the terminal phase voltage is Vdc/2. When
the valves 1′–2′ are conducting, the phase terminal is con-
nected to the negative DC terminal and the terminal phase

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 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System 127

voltage is, –Vdc/2. When the valves 2–1′ are conducting, the
phase terminal voltage is clamped through diodes D1–D2
and its voltage becomes zero. Thus, the conduction period
of the valves 1 and 2′ in positive half cycle is effectively
(180°–2β), which is the pulse width (σ) of the converter
voltage in square wave operation. This angle β is called as
the dead-angle. In the negative half cycle, valves 2 and 1′
conduct for the same period. The total dead angle in a half
cycle period with FFS modulation is 2β as shown in Figure 4.
Conduction angle ðσÞ ¼ 180  2β
Or
Dead angle ðβÞ ¼ ð180  σÞ=2
The harmonics characteristic of the three-level converter
vary with the conduction angle (σ) [16]. Every individual
harmonics varies in the shape of “inverted V” repeatedly
between the angle 180° and 0°. The conduction angle
(σ) should be properly selected at which the overall
harmonics are less. For example, at a particular angle,
the 5th order harmonics may be less, but at the same time
the 7th order harmonics may be high. Therefore, the
optimum angle should be selected to have less overall
harmonics and thereby THD. The angle (σ) is also respon-
sible for reactive power control. Both these factors are
considered while selecting the optimized conduction
angle or dean angle.
The variation of conduction angle (σ) per half cycle
caused by variation of the dead angle allows the conver-
ter voltage to change independently under the constant
dc link capacitor voltage, and it is one of the attributes of
½1
the three-level VSC topology, which is used to control
harmonics. The full 180° square wave operation of VSC
½2 can be achieved when β = 0° and by the way three-level
VSC topology is transformed into two-level VSC structure.
The parameter β can be chosen (generally close to zero)
in a way that reduces certain harmonics, keeping funda-
mental component of the output ac voltage as large as
possible. It may also be used as a second control para-
meter to handle the dynamics of the system. The 48-pulse
VSC stepped ac output voltage waveform is shown in
Figure 5.

5000
Vab1

0
–5000
5000
Vab2

–5000

5000
Vab3

–5000
5000
Vab4

–5000
5000
Vab5

–5000
5000
Vab6

–5000
5000
Vab7

0
–5000
5000
Vab8

–5000 4
x 10
5
Vab

–5
1 1.002 1.004 1.006 1.008 1.01 1.012 1.014 1.016 1.018 1.02
Time (sec)

Figure 5 Stepped AC voltage waveform realization.

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128 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System
2.2 Design of AC inductor and DC bus
capacitor
An inductor at ac side and a capacitor at dc bus are
mandatory for a voltage source converter operation.
The ac inductor is connected between the ac grid voltage
and the primary windings of the converter transformer.
The inductive reactance value is selected as 0.2 pu to
limit the 5th harmonic current below 20% of the funda-
mental current as in the case of conventional line com-
mutated thyristor converter based HVDC system.
The nth order harmonic voltage is expressed as,
Vn ¼ V1 =n
The corresponding nth harmonic current is expressed as,
In ¼ Vn =ðn XÞ
Substituting eq. [3.5] in eq. [3.6] gives,
In ¼ V1 =ðn  XÞ
2
V1, is the fundamental ac voltage in the ac grid, and X is
the reactance of the interfacing reactor including the
leakage reactance of the transformer at fundamental
frequency.
The fundamental current (I1) is decided by the power
flow and may be expressed as,
I1 ¼ jðVs  Vc ffδ Þ=X
The reactance value is selected to be 0.2 pu for 100 MW,
33 kV system in order to restrict the 5th harmonic current
to 20% of the fundamental current. Therefore,
The 5th harmonic current is given as
I5 ¼ V1 =ð25  0:2Þ ¼ 0:2 pu when V1 ¼ 1 pu
For a 100 MW, 33 kV, 50 Hz ac grid system, the
inductance value is calculated as follows,
Xpu ¼ 0:2;
where Xpu may be expressed as,
Xpu ¼ X=Zbase
For a 100 MW, 33 kV, 50 Hz ac grid systems, the base
impedance Zbase is as,
Zbase ¼ ðkVÞ2 =MVA
Zbase ¼ ð33Þ2 =100 ¼ 10:39 Ω
Using eq. [3.10],
Xpu ¼ X=Zbase ¼ 0:2 ¼ X=10:39
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The value of interfacing reactance is as,
X ¼ 2:178 Ω
This reactance may be expressed in terms of an
inductance as,
X ¼ 2πfL1 ½8
Therefore, an interfacing inductance may be expressed as,
L1 ¼ X=ð2πf Þ ½9
Substituting the values of X ¼ 2:178 Ω and frequency
f = 50 Hz, the value of the interfacing inductor is calculated as,
L1 ¼ 2:178=ð2π  50Þ ¼ 6:9 mH
½1
For 100 MW, 33 kV, 60 Hz ac grid system (operating as an
inverter station), the inductance value is calculated using
the eqs. [7], [8], and [9] as,
½2
Xpu ¼ 0:2
Xpu ¼ X=Zbase
½3
Zbase ¼ ðkVÞ2 =MVA ¼ ð33Þ2 =100 ¼ 10:39 Ω
Xpu ¼ X=Zbase; 0:2 ¼ X=10:39
The value of interfacing reactance is as,
X ¼ 2:178 Ω
This reactance may be expressed in terms of an induc-
tance as,
½4
X ¼ 2πfL2 and L2 ¼ X=ð2πf Þ
Substituting the values of X = 2.178 Ω and frequency
f = 60 Hz, the value of the interfacing inductor is calcu-
lated as
L2 ¼ 2:178=ð2π  60Þ ¼ 5:7 mH
½5
The dc link capacitor is designed based on the power
rating of the HVDC system, magnitude of the dc bus
voltage, and its recovery time under the dynamic condi-
tions. The total MVA rating of the converter for 100 MW of
active power and 60 MVAR of reactive power is 116 MVA.
The MVA rating is generally considered as 120 MVA. For
½6 this VSC rating, with full reactive power of 60 MVAR, the
active power is 1.03%. The extra 3% of active power
(3 MW) is used to recover the charge of the dc bus
capacitor and to maintain the dc link voltage. It is desired
½7 to settle the dc bus voltage within one cycle of the funda-
mental frequency during dynamics with an overshoot/
undershoot of 3% (i.e 90 V) for 3 kV reference dc bus
voltage under the dynamics of control of the power flow.
Considering all these above factors, the dc bus capacitor
can be designed using the following relation as,
 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System 129

E ¼ P: Δt ¼ ð1=2ÞCdc fðV  dc Þ2  ðVdc Þ2 g
where E is the differential energy on the dc bus capacitor
either due to discharging or charging of the dc capacitor
caused by various disturbances. P is the active power
required to charge the dc bus capacitor. Δt is the time
within which the dc bus voltage is to be settled to its

reference value. Vdc is the reference dc bus voltage, and
Vdc is the actual dc bus voltage.
From eq. [3.14], the value of the dc capacitor may be
expressed as,
Cdc ¼ ð2P: ΔtÞ=fðV  dc Þ2  ðVdc Þ2 g
Substituting the values P = 3 MW, Δt = 20 ms (1 cycle),
V  dc ¼ 3 kV, Vdc = 2910 V in eq. [11], the value of dc bus
capacitor is as,
Cdc ¼ ð2  3  106  20  103 Þ=½ð3000Þ2  ð2910Þ2 g
Cdc ¼ 0:225 F
The calculated value of the dc capacitor is 0.225 F and it
is selected as 0.25 F. For three level VSC, the value of a
Cdc1 = Cdc2 = 2Cdc =0.125 F.
3 Control algorithm
The co-coordinated control of two converter stations is
the heart of HVDC systems for dynamic control of the
active and reactive power. Figure 6 shows the control
½10 scheme of the proposed HVDC system. The active power
transfer is based on control of the voltage phase angle (δ).
It is the angle difference between the supply voltage and
the converter voltage. The coordination of the active
power transfer through the rectifier and inverter stations
consists of using the phase angle (δ) as a control para-
meter to reduce the errors in the two local feedback
regulated system. The rectifier needs to ensure that the
total dc link voltage Vdc is regulated at its reference
voltage. This is done by using the phase angle (δ), the
angle control level of the rectifier to transfer active power
½11 to minimize the error between the measured total dc
voltage and the reference voltage. Therefore, active
power is controlled by using δ angle and the voltage
magnitudes of the rectifier and the inverter are available
for independent reactive power control. The reactive
power flow depends on the magnitude of the supply
voltage and the converter voltage. The magnitude of the
supply voltage is constant and the magnitude of conver-
ter voltage is controlled by varying the dc voltage.
Therefore, the dc voltage variation is mandatory for the
reactive power control, when the converter operates with
fixed pulse width called (β).
There are two controllers used in the control algo-
rithm, namely, the outer controller and the inner control-
ler. The outer controller produces the reference signal for
the inner controller. The outer controller consists of
active power controller, dc voltage controller, reactive
power controller, and ac voltage controller. The inner
controller consists of current controllers. The reference

+
+
Vs1 C1 C1 Vs2
P1,Q1 Vdc Vdc1 P2,Q2
Vc1 Vc2

C2 Vdc2 C2

–
–

ΔVdc

Gate Δδ
DC voltage
balance +
– Gate
control
Circuit Circuit
+ +

β1 δ1 β1 δ1
Phase shift Phase shift
calculation calculation
* * * *
Vd1 , Vq1 Vd 2 , Vq 2
Vdq 2,Idq 2
Vdq1, idq1 Current Current
control control
Vdc
* * * *
Id1 , Iq1 Id 2 ,Iq 2

DC voltage
control

*
P* Vdc

Figure 6 Control scheme of the three-level VSC based HVDC system using dynamic dead angle (β) control.

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130 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System

signals for the current controllers are the output of outer In general, the instantaneous active power, and the
controllers. The controller of the rectifier station consists reactive power are drawn from the utility grid and are
of the dc voltage controller and the reactive power con- expressed as,
troller or an ac voltage controller, and the inverter station
For the rectifier station,
consists of the active power controller and the reactive
power controller or an ac voltage controller.
P1 ¼ vsd1: id1 þ vsq1: iq1 ½16

3.1 DC voltage controller Q1 ¼ vsd1: iq1 þ vsq1: id1 ½17

The dc voltage controller is common for both the rectifier For an inverter station,
and inverter stations. In this controller, sensed dc voltage
is compared with reference dc voltage, and voltage error P2 ¼ vsd2: id2 þ vsq2: iq2 ½18
is processed in a PI (Proportional Integral) controller
which gives d-axis reference (id1 , id2 ) currents for the Q2 ¼ vsd2: iq2 þ vsq2: id2 ½19
rectifier and an inverter stations, respectively.
where, id1, iq1 are the d-axis and q-axis components of the
The d-axis reference currents id1 and id2 are given as,
supply current is1, vsd1, vsq1 are the d- axis and q-axis
ð component of supply voltage (vs) of rectifier station. The
id1 ¼ fP  =ð3Vs Þg þ fKp ðVdc  Vdc Þ þ KI ðVdc  Vdc Þdtg ½12
block diagram of dc link voltage controller is shown in
ð
Figure 7.
id2 ¼ fP =ð3Vs Þg þ fKp ðVdc  Vdc Þ þ KI ðVdc  Vdc Þdtg ½13

P* Ip1*
The q-axis reference currents (iq1 , iq2 ) for the rectifier 1/Vs
and inverter stations are calculated from the reference + Id1*
reactive power of each station as, +
*
iq1  ¼ ðQ1  =ð3Vs ÞÞ ½14 Vdc ΔIdc*
+ PI
–

iq2  ¼ ðQ2  =ð3Vs ÞÞ ½15 Vdc Id2*

where P  is the reference active power to be transmitted
from one side to another side, Kp, KI are proportional and
integral gain constants, Vs is rms supply voltage, Vdc  is
reference dc voltage, and Vdc is actual dc voltage. The
above equations are rotating and synchronous reference
frame.
The first term in eq. [1] decides the power flow in the
system and second term achieves dc bus voltage regula-
tion by means of controlling the additional amount of
active power flowing from ac side to dc side. When Vdc is
lower than the Vdc  , then id1  is increased as shown in
eq. [1], so that a small amount of active power flows into
the dc link capacitor through the rectifier, thus Vdc rises
up to Vdc . When Vdc is higher than the Vdc  , then id1  is
decreased so that a reduced amount of active power
flows into the dc link capacitor, thus Vdc is lowered to
Vdc  . The reference values of the reactive currents (iq1
and iq2  ) are calculated from the reactive power reference
as shown in eqs. [3] and [4] for the rectifier and inverter
stations, respectively.
+
–P * Ip2* +
1/Vs
Figure 7 Block diagram of DC voltage controller.
3.2 Current controller
The block diagram of the current controller is shown in
Figure 8. The output of dc voltage controller is given as
an input to the current controller. The d-axis and q-axis
reference currents for the rectifier and an inverter stations
are compared with sensed d-axis and q-axis currents,
and the current controller generates reference d-axis
and q-axis voltages (Vd  , Vq  ). The calculation of actual
d-axis and q-axis voltages and currents are given as,
vsd1 ¼ ð2=3Þ  fvsa sinðωtÞ þ vsb sinðωt  2π=3Þ
½20
þ vsc sinðωt þ 2π=3Þg

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 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System 131

Vd

I *d V *d 1 *
+ V d
+ PI
– –
–
Id

Id
R ++

ωL
δ*
tan–1(vq /vd)
ωL
Iq
R ++

Iq* Iq V *d 2
– –
+ PI –
+
V *q

Vq

Figure 8 Block diagram of current controller.

ð
vsq1 ¼ ð2=3Þ  fvsa cosðωtÞ þ vsb cosðωt  2π=3Þ Vd2  ¼ vsd2  ðkp Δid2  þ ki Δid2  dtÞ  ðRid2 þ ωL2 iq1 Þ
½21
þ vsc cosðωt þ 2π=3Þg ½26

ð
id1 ¼ ð2=3Þ  fisa sinðωtÞ þ isb sinðωt  2π=3Þ
½22 Vq2  ¼ vsq2  ðkp Δiq2  þ ki Δiq2  dtÞ  ðRiq2 þ ωL2 id2 Þ
þ isc sinðωt þ 2π=3Þg
½27

iq1 ¼ ð2=3Þ  fisa cosðωtÞ þ isb cosðωt  2π=3Þ where vsd2, vsq2 are the d-q axis components of
½23
þ isc cosðωt þ 2π=3Þg supply voltage, ωL2 is the ac link reactance of inverter
station.
vsd1, vsq1 are the d-axis and q-axis components of the From the above equations, the angle (δ) is calculated
supply voltage vs, and v1d, v1q d-axis and q-axis compo- for the rectifier and an inverter stations as,
nents of converter voltage v1 and id1, iq1 d-axis, and q-axis
components of supply current is at the rectifier station. δ1 ¼ tan1 ðvq1  =vd1  Þ ½28
The operation of the inner current controller for the rec-
tifier station can be explained by using the following
δ2 ¼ tan1 ðvq2  =vd2  Þ ½29
equations as,
ð
Vd1  ¼ vsd1  ðkp Δid1  þ ki Δid1  dtÞ  ðRid1 þ ωL1 iq1 Þ The angle (β) is calculated for the rectifier and an inverter
station by the following equations.
½24
ð sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
   ð2vc1 Þ2  ðVd1 2 þ Vq1 2 Þ
Vq1 ¼ vsq1  ðkp Δiq1 þ ki Δiq1 dtÞ  ðRiq1 þ ωL1 id2 Þ β1 ¼ tan 1
½30
ðVd1 2 þ Vq1 2 Þ
½25
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
where vsd1, vsq1 are d-q axis components of supply voltage ð2vc2 Þ2  ðVd2 2 þ Vq2 2 Þ
1
and ωL1 is ac link reactance of rectifier station. For β2 ¼ tan ½31
ðVd2 2 þ Vq2 2 Þ
inverter station,

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132 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System

where Vc1 and Vc2 are converter voltages of rectifier and
inverter stations.
Calculated δ1 and δ2 are used to transfer active power
between the rectifier and an inverter station.
The dead angle (β) is calculated by eqs. [19] and [20]
for the rectifier and an inverter stations, respectively. The
calculated dead angle (β) is used to calculate conduction
angle sigma (σ) by eq. [32] as,
σ ¼ 180 -2β
The complete control of the three-level 48-pulse VSC
based HVDC system using dynamic dead angle (β) control
is shown in Figure 6.
An auxiliary PI-controller is employed to control the
dc voltages across the two capacitors at the same voltage
level determining the additional phase angle variation
(Δδ) in reference to the voltage deviation of the dc capa-
citors. Finally, the phase angle (δ þ Δδ) in combination
with the dead angle (β) generates the gating pulses for
the converters. The proportional (Kp) and integral (Ki)
gains of the PI-controllers are tuned to obtain the desir-
able operating performance.
4 Results and discussion
The performance of the three-level 48-pulse voltage
source converter based HVDC system is studied using
dynamic dead angle (β) control. The performance of the
HVDC system is investigated in MATLAB simulation. The
effect of dead angle (β) is tested on the performance of
the three-level VSC based HVDC system. From this simu-
lation it has been successfully demonstrated that the
dead angle (β) control can be used for the independent
reactive power control in the three-level voltage source
converter based HVDC system with a constant dc voltage
along with the active power control. The three-level 48-
pulse voltage source converter is mainly simulated to
demonstrate for reactive power control and power quality
improvement in terms of harmonics. The simulation
½32 results also demonstrate the ability of the VSC converter
to operate in steady state condition, active power
control and reversal, and an independent reactive
power control.
Figure 9 show the steady state performances of rec-
tifier and inverter stations of a three-level 48-pulse VSC
based HVDC system with dynamic (β) control. It shows
the supply voltage, supply current, active power, reactive
power, and dc voltage of both stations. During the steady
state operating condition, an active power of 100 MW is
transferred from the rectifier station to an inverter station.
Figure 10 shows the variation of (δ) and (β) from the
steady state converter operation and the stepped conver-
ter voltages of the rectifier and inverter stations.
Figures 11 and 12 show the dynamic performance of
both stations during the reactive power control at inverter
stations. During this condition, the reactive power at an
inverter stations is controlled between +60 Mvar and
−60 Mvar. The reactive power of the rectifier station is
controlled at zero value. An active power of 100 MW is
transferred from the rectifier to an inverter station.
Figures 13 and 14 show the dynamic performance of the

Figure 9 Steady state performance of the three-level 48-pulse VSC (i) rectifier station (ii) inverter station.

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 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System 133

δ
δ

β
β

Figure 10 (i) Variation of angles (δ) and (β) values and (ii) stepped converter voltage of rectifier and inverter stations of the three-level
48-pulse VSC based HVDC system.
V
I
P
Q
V

Figure 11 Dynamic performance of rectifier station during the reactive power control at inverter station of three-level 48-pulse VSC based
HVDC system.

rectifier and an inverter station during the active power
reversal. Initially, the active power of 100 MW is trans-
ferred from the rectifier to an inverter. At 0.8 s, the active
power is reversed at an inverter to rectifier station.
Figure 15 shows the variation of angles (δ) and (β) during
the active power reversal operation. This shows that, only
by controlling the angles (δ) and (β), the active power is
transferred between the two stations.
The harmonic performance of the three-level 48-
pulse VSC based HVDC system investigated during the
steady state operating condition when the active power of
100 MW is transferred from the rectifier to an inverter and
the reactive power at both stations are controlled at zero
value. Figure 16 shows the waveform and harmonic spec-
tra of converter voltage and supply current of the rectifier
station. The THD (Total Harmonic Distortion of the con-
verter voltage is observed as 2.33% and THD) of the
supply current is observed as 0.68%
Figure 17 shows the waveform and harmonic spectra
of converter voltage and the supply current of the inverter
station. The THD of converter voltage is observed as 2.03%
and the THD of the supply current is observed as 0.56%.

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134 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System

P
QV I
V

Figure 12 Dynamic performance of inverter station during the reactive power control of three-level 48-pulse VSC based HVDC system.
V
I
PQ

Figure 13 Dynamic performance of the rectifier station during active power reversal of three-level 48-pulse VSC based HVDC system.
V I
P
Q
V

Figure 14 Dynamic performance of the inverter station during active power reversal of three-level 48-pulse VSC based HVDC system.

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 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System 135

δ δ
δ

δ δ

β β
β

Figure 15 Variation of the angles (δ) and (β) values during active power reversal of the three-level 48-pulse VSC based HVDC system.

THD
THD

Figure 16 Waveform and Harmonic Spectra of (i) converter voltage (ii) supply current of rectifier station of the three-level 48-pulse VSC
based HVDC system.

Figure 17 Waveform and Harmonic Spectra of (i) converter voltage (ii) supply current of inverter station of three-level 48-pulse VSC based
HVDC system.

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136 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System

Table 2 Variation of converter voltage THD for different dead angle (β) and conduction angle (σ) of the three-level 48-pulse voltage source
converter.

(σ) 180 175 170 165 160 155 150 145 140 135 130 125 120 115 110 105
(β) 0 2.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5 35 37.5
THDV 2.73 2.28 1.46 1.75 2.49 1.74 1.92 2.74 2.0 1.96 2.55 2.16 2.72 2.27 2.37 2.62

4.1 Dead angle (β) vs THD at a fundamental frequency, switching with constant dc link
voltage which is not possible with the two-level converter. In
The THD of the converter voltage is observed for every case of the two-level converter, the dc link voltage should be
change in the dead angle. Table 2 shows the variation of varied to control the converter ac voltage for reactive power
converter voltage THD for different values of dead angle (β) control. The harmonic performance also increased com-
and the conduction angle (σ) of a 48-pulse three-level vol- pared to 48-pulse two-level converter. This is achieved by
tage source converter. The THD of the VSC voltage is the the extra angle (β). The harmonics performance is almost
minimum at a conduction angle of 170° and dead angle of 5°. equal to 96-pulse VSC converter with only eight converters.
The value of THD is 1.46%. The next minimum value of THD The comparison of the three-level 48-pulse VSC with the
of VSC converter voltage is 1.74% at a conduction angle of two-level 48-pulse VSC is given in Table 3.
155°. Therefore, the operating region of a 48-pulse voltage
source converter can be decided based on the reactive power Table 3 Comparison of the three-level 48-pulse VSC with the
requirement and the THD of the VSC voltage. Both the two-level 48-pulse VSC.
reactive power requirement and minimum THD can be
achieved simultaneously by selecting a proper dead angle. Three-level Two-level
48-pulse VSC 48-pulse
For example, for a 48-pulse converter operation, the con-
VSC
duction angle (σ) of 135° is the best choice for zero reactive
power control and minimum THD as observed as 1.96%. For Simultaneous control of reactive Yes No
+60 Mvar, the conduction angle of 110° is the best choice power and dc voltage
Pulse width control Yes No
with the THD of 2.37%. For −40 Mvar, the conduction angle
Voltage THD Very less High
of 170° is the best choice with the THD of converter voltage
Current THD Very less High
1.46%, the least minimum value in the operating range. The No. of converters 8 8
variation of reactive power with respect to the dead angle (β) No. of transformers 8 8
and conduction (δ) is shown in Figure 18. Pulse operation Equivalent to 48-pulse
From the above design and modeling it shows that, a 48- 96-pulse VSC
FFS and HVDC applications Suitable Not suitable
pulse VSC employing three-level converter can be operated
P
Q
V

Figure 18 Reactive power control of the 24-pulse three-level VSC based HVDC system using the dynamic dead angle (β) control.

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 M. Mohan et al.: Design, Control, and Modeling of a New VSC for HVDC System
5 Conclusion
A new three-level 48-pulse voltage source converter con-
figuration has been designed and modeled for HVDC
system. A new dynamic dead angle (β) control method
has been employed with the three-level voltage source
converter operating at fundamental frequency switching.
In this control, the HVDC system operation has been
successfully demonstrated and also an analysis of (β)
References
1. Kim C-K, Sood VK, Jang G-S, Lim S-J, Lee S-J. HVDC
transmission, power conversion applications in power
systems. IEEE Press-Wiley, 2009.
2. Asplund G, Eriksson K, Svensson K. DC transmission based
on voltage source converters. In: Proceedings of CIGRE SC14
colloquium in South Africa, 1997.
3. Wang X, Ooi B-T. High voltage direct current transmission
system based on voltage source converter. In: PESC’90
Record, vol. 1, 325–32.
4. Weimers L. HVDC light: a new technology for a better
environment. IEEE Power Eng Rev 1989;18:1920–6.
5. Zhao Z, Iravani MR. Applications for GTO voltage-source
inverter for tapping HVDC power. IEE Proc Gen Transm Distrib
1994;141:369–77.
6. Suzuki H, Nakajima T, Mino K, Sugimoto S, Mino Y, Abem H.
Development and testing of prototype models for a
high-performance 300 MW self-commutated AC/DC converter.
IEEE Trans Power Deliv 1997;12:1589–601.
7. Kuang J, Ooi BT. Series connected voltage-source converter
modules for force-commutated SVC and DC-transmissions.
IEEE Trans Power Deliv 1994;9:977–83.
8. Liu YH, Zhang RH, Arrillaga J, Watson NR. An overview of
self-commutating converters and their application in
transmission and distribution. In: IEEE/PES Transmission and
Distribution Conference & Exhibition, Asia and Pacific Dalian,
China, 2005.
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Authenticated
Download Date | 5/21/15 1:47 PM
137
value for various reactive power requirement and harmo-
nic performance has been carried out in detail. Therefore,
the selection of converter operation region is more flex-
ible according to the requirement of the reactive power
and power quality. The performance of this 48-pulse VSC
based HVDC system has been demonstrated in steady
state operation, active power control in bidirectional,
independent control of the reactive power and power
quality improvement.
9. Rodríguez J, Lai J-S, Peng FZ. Multilevel inverters: a survey of
topologies, controls, and applications. IEEE Trans Ind Electron
2002;49:724–39.
10. Saeedifard M, Bakhshai A, Joos G, Jain P. Low switching fre-
quency space vector modulators for high power multi-module
converters. IEEE Trans Power Electron 2005;20:1301–18.
11. Hagiwara M, Fujita H, Akagi H. Performance of a self-commutated
BTB HVDC link system under a single-line to-ground fault
condition. IEEE Trans Power Electron 2003;18:278–85.
12. Gonzalez-Hernandez S, Moreno-Goytia E, Anaya-Lara O.
Analysis of wide area integration of dispersed wind farms
using multiple VSC-HVDC links. In: Proceedings of Power
Electronics and Motion Control Conference, EPE-PEMC 2008,
1–3 September 2008:1784–9.
13. Flourentzou N, Agelidis VG, Demetriades GD. VSC-based HVDC
power transmission systems: an overview. IEEE Trans Power
Electron 2009;24:592–602.
14. Hagiwara M, Akagi H. An approach to regulating the DC-link
voltage of a voltage-source BTB system during power link
faults. IEEE Trans Ind Appl 2005;41:1263–71.
15. Hagiwara M, Fujita H, Akagi H. A 21-level (line-to-line) BTB system
based on series connection of sixteen converter-cells for power
flow control: experimental verifications by a 200-V, 10-kW
laboratory system. In: Proceedings of IEEE Conference, 2004:1–6.
16. Hingorani NG, Gyugyi L. Understanding FACTS. Wiley-IEEE
Press edition, 1999.
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