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clc;
clear all;
close all;
r1 = 0;
for i = 1:length(x)
y = x(i)^2 - 3:h:1 - x(i)^2;
% Trapezoidal rule for integrating with respect to y
r1(i) = (h / 2) * (sum(f(x(i), y)) + sum(f(x(i), y(2:end-1))));
end
% Now you might want to annotate or plot the results, such as:
fprintf('Result of the double integral: %.4f\n', r2);
The numerical computation of the integral ∫x(y-1) over a symmetric region is anticipated to yield an exact
result of 0 due to the cancellation of positive and negative contributions. This cancellation is a consequence
of the function's characteristics, where (y-1) changes sign when y transitions across 1, combined with the
symmetry of the linear term x around the origin. The integration region and its boundaries exhibit symmetry
with respect to the x-axis, further supporting the expectation of a precise integral value. However, despite
these inherent symmetries, minor deviations from the exact result (0) may occur in numerical computations.
These discrepancies can be attributed to errors introduced during discretization using methods like the
trapezoidal rule and the finite grid employed for integration, which may lead to slight inaccuracies in the
final numerical output.
Problem 2:
When analyzing a circuit with diodes using Kirchhoff's Voltage Law (KVL), it is crucial to consider
the bias conditions of the diodes. In the positive half cycle where D1 is forward biased and D2 is
reverse biased, the KVL equation can be expressed as -Vi + IDR + VD + 8 = 0. Substituting the
diode current expression ID = Is (ⅇ𝑣𝐷∕𝑣𝑇 -1) into this equation yields -Vi + Is (ⅇ𝑣𝐷∕𝑣𝑇 -1) × R + VD
+ 8 = 0. On the other hand, during the negative half cycle when D2 is forward biased and D1 is
reverse biased, the KVL equation becomes Vi + IDR + VD + 6 = 0, which can be further refined by
substituting ID = Is (ⅇ𝑣𝐷∕𝑣𝑇 -1) to get Vi + Is (ⅇ𝑣𝐷∕𝑣𝑇 -1) × R + VD + 6 = 0. These equations
capture the conditions when diodes are either forward or reverse biased, providing a way to
express diode current in terms of diode voltage accurately.
Problem 3(b):
clc;
clear all;
close all;
% Initialize Vo
Vo = 0;
Problem 3(c):
clc;
close all;
v = -10:1:10;
Is = 0.1e-12;
Vt = 25e-3;
Vd = 0.7;
R = 5e3;
Id = Is * (exp(Vd/Vt) - 1);
Vi_p = 0:0.001:10;clc;
close all;
% Given parameters
v = -10:1:10;
Is = 0.1e-12;
Vt = 25e-3;
Vd = 0.7;
R = 5e3;
Vd_1(i) = v_new + 8;
end
Vd_2(i) = v_new1 ;
end
% Calculate the output voltage for negative input voltages and adjust the offset
V_d = -Vd_2 - 6;
% Annotations
text(5, 2, 'Vi > 0', 'FontSize', 12); % Annotation for Vi > 0
text(-5, -4, 'Vi < 0', 'FontSize', 12); % Annotation for Vi < 0
text(-7, -6, 'V_d', 'FontSize', 12); % Annotation for the line V_d
for i = 1:length(Vi_p)
fv = @(v) Is * R * (exp(v/Vt) - 1) + v + 8 - Vi_p(i);
der = @(v) Is * R * (exp(v/Vt))/Vt + 1;
v0 = 0;
Vd_1(i) = v_new + 8;
end
plot(Vi_p, Vd_1,'LineWidth',2);
xlabel('Input Voltage (Vi)');
ylabel('Output Voltage (Vd)');
title('Output Voltage vs Input Voltage');
hold on;
for i = 1:length(Vi_n)
fv = @(v1) Is * R * (exp(v1/Vt) - 1) + v1 + 6 + Vi_n(i);
der = @(v1) Is * R * (exp(v1/Vt))/Vt + 1;
v01 = 0;
Vd_2(i) = v_new1 ;
end
V_d=-Vd_2-6;
plot(Vi_n, V_d,'LineWidth',2);
Problem 4:
clc;
close all;
f1 = @(x1,x2) x1^2+x2^2-10;
f2 = @(x1,x2) x1-x2+2;
tol = 1e-6;
x0 = [0.5; 0.5];
f = [f1(x0(1),x0(2)); f2(x0(1),x0(2))];
k = [f1_der_x1(x0(1),x0(2)), f1_der_x2(x0(1),x0(2)); f2_der_x1(x0(1),x0(2)), f2_der_x2(x0(1),x0(2))];
end
fprintf("Root:\n");
fprintf("x1 = %g\n", x0(1));
fprintf("x2 = %g\n", x0(2));