SVERI’S COLLEGE OF ENGINEERING(POLY)

PANDHARPUR

MICRO PROJECT
Academic year: 2023-24

TITAL OF PROJECT:

INTERNAl ARCHITECTURE OF 8086

Group Details

Roll Name of group member Enrollment

N0 no

41 Shruti Rahul Menkudale 2210740203

43 Anushka Arvind Yelpale 2210740206

46 Siddhi Pranshant Rajmane 2210740210

67 Ashwini Gunda Chopade 23212470180

 Semester:- 4 Scheme:- I

Title of Project:- INTERNAl ARCHITECTURE OF 8086

COs addressed by the Micro Project:

CO 1 Describe the two main execution unit.

CO 2 Understanding BIU fetching instruction from memory.

CO 3 EU manage data transfer.

CO 4 Understand the each part of unit

CO 5 Implement and analysis architecture of 8086.

Comments/Suggestions about team work/leadership/inter-personal communication (if any)

Marks out of 4
Marks out of 6 Total
for
for mars
Roll No Name of students performance in
performance in out
oral/
group activity of 10
Presentation

41 Shruti Rahul Menkudale

43 Anushka Arvind Yelpale
46 Siddhi Prashant Rajmane
67 Ashwini Gunda Chopade

Name and
Signature of Mr.A.B.Rupnar
faculty
Evolution sheet for Micro Project

Academic Year:- 2023-24 Name of Faculty: Mr.A.Rupnar

Course:- Computer Engineering Course code:- CO4I
Subject:- MIC Subject Code:- 22415

Semester:- 4 Scheme:- I
 SVERI’S COLLEGE OF ENGINEERING (POLYTECHNIC)PANDHARPUR.

CERTIFICATE

This is to certify that the Project report entitled

Submitted by
Roll Name of Student Enrollment
no no
41 Shruti Rahul Menkudale
43 Anushka Arvind Yelpale
46 Siddhi Prashant Rajmane
67 Ashwini Gunda Chopade

Is a bonafide work carried out by above students, under the guidance of

Mr.A.Rupnar and it is submitted towards the fulfillment of requirement of
MSBTE, Mumbai for the award of Diploma in Information Technology at
SVERI’s COE (Polytechnic), Pandharpur during the academic year 2023-2024.

(Mr.A.B.Rupnar)
Guide
(Mr.Bhandare P. S.) (Dr. N.D.Misal. .)

HOD Principa
 Micro-Project Report
☆ Introduction:-
The 8086 is a sixteen-bit microprocessor. The term sixteen-bit
means that its arithmetic logic unit, its inner registers, and the maximum of its
commands are meant to work with sixteen-bit binary statistics. The 8086 has a
sixteen-bit statistics bus, so it may read data from or write data to memory and
ports both sixteen bits or eight bits at a time. The 8086 has a 20 bit deal with
bus, so it may deal with any one of 220, or 1,048,576 memory locations.

Aim of the project:

Analyze the functional block of 8086 microprocessor.

Project objectives:

The functional block diagram of 8086 is split into functional units.

(1) Bus Interface Unit
(2) Execution Unit

1. BUS INTERFACE UNIT:

Bus Interface Unit is a gate (enhance) interface among peripheral devices and
processors. Through the bus interface only, the processor can transfer and obtain data.

The bus interface unit contains:-

A) Segment Registers
B) Instruction Queue
C) Instruction Pointers

A) Segment register :

The most memory access of the 8086 processor is 1 MB. Each section has a few
predefined functions. In the 8086 processor, every phase has a potential of sixty- four
KB. So the 4 segments will save 256 KB of memory places. These 4 phase registers will
preserve the bottom address of the corresponding section.

In the 8086 Processor, there are 5 phase registers.

They are:
1. ES – Extra Segment
2.CS – Code Segment
3.DS – Data Segment
4.SS – Stack Segment
5.IP – Instruction Pointer
1. ES(EXTRA SEGMENT) :

It is a 16 bit resister containing address of extra segment. It is used to addressing extra

segment which contains another data of memory.

2. CS(CODE SEGMENT) :

The code segment is a section of memory that holds the code (programs and
procedures) used by the microprocessor. The code segment register defines the
starting address of the section of memory holding code.

3. DS(DATA SEGMENT) :

It is a 16 bit resister containing address of data segment. It is used for addressing data
segment of memory where data is stored.

4. IP(INSTRUCTION POINTER) :

It holds the 16 bit address of next instruction within the code segment. The value
stored in IP is called off set or displacement.

B) Instruction queue :

To increase the execution speed of BIU fetches as many as 6 instruction byte ahead to time
from memory.

C) Instruction pointer :

The instruction pointer will deliver the subsequent address of the instruction to be executed.
Instruction Point can't be used for different

2) EXECUTION UNIT :

The execution unit of 8086 tells BIU where to fetch the instruction or data decode and execute
those instructions.
The EU contains control system to perform various internal operations.
It contains 8 general purpose register, Two 16 bit pointer, 16 bit ALU, Flag register….
The execution unit contains:

A. ALU
B. General Purpose Registers
C. Pointer Register
D. Index Register
E. Flag Registers

A) ALU |:

The ALU is 16 bit hence it is called as 16 bit ALU unit.

The ALU responsible for all type of arithmetic & logical operations.

B) GENERAL PURPOSE REGISTER:

EU has 8 general purpose register as AH, AL, BH, BL, CH, CL, DH, DL. These register can be used
as 8-bit register individually for 8-bit operations, for 16-bit operations they can be used in pairs
as the: -AH-AL, BH-BL, CH-CL, DH-DL …
THE:-

1) AH-AL is Referred as AX
2) BH-BL is Referred as BX
3)CH-CL is Referred as CX
4) DH-DL is Referred as DX

1) AX (ACCUMULATOR):

AX is a 16-bit accumulator with lower order 8-bit of AX designed as AL and upper 8-bit of AX
designed as AH.AX register can keep sixteen-bit data only.AL can be used as 8-bit accumulator
for 8-bit operation. It is the most important general purpose register having multiple functions.
2) BX (BASE REGISTER):

This register is mainly us3ed as a base register. For memory related instructions BX is used to
store 16-bit effective address of the corresponding memory location. It holds the staring base
location of a memory region within a data segment. It is used as offset storage for forming
physical address.

3) CX (COUNTER REGISTER):

CX register is a code register (Count Register).It is used as default counter or count register in
case of string and loop instruction.

4) DX (DATA REGISTER):

DX register is the data register. DX register is used to store data. If the result of
multiplication is more than 16-bit , then the lower order 16-bit are stored in AX and higher
order 16-bit are stored in DX.It is used to store 16-bit port address during certain 1/0
instruction.

B) POINTER REGISTER:
The other register in EU :- SP, BP which is called pointer register.

1) SP(STACK POINTER) :
It is an 16 bit register pointing to a program stack in stack segment.

2) BP(BASE POINTER) :
Base pointer is 16 bit register pointing to data in stack segment

C) INDEX REGISTER :
The 8086 micro-processor has two 16 bit index register that is SI & DI. These operation
particularly used for string manipulation.

1) SI(STACK INDEX) : SI
is 16 bit register generally used to store source in data.

2) DI(DESTINATION INDEX) :
DI is 16 bit register generally used to store destination in data.
E)FLAG REGISTER :

* FLAG REGISTER :

It is a 16 bit register containing 9 flag .A flag is set/ reset to indicate some condition of an
instruction operation on ALU. Flag register is consist of conditional flag.

* CONDITIONAL FLAG :

A) (OF)OVERFLOW FLAG :
This flag is set if result is too large positive number or too small negative number to fit into
destination operand.

B) (SF) SIGN FLAG :

This flag is set if result of operation is negative otherwise operation is positive it is in rest
mode.

C) (ZF) ZERO FLAG :

Flag set if result of arithmetic and logical operations is zero otherwise it is in reset mode.
D) (AF) AUXILIARY FLAG:
This flag is say when carry is generated by bit D3 otherwise it is in reset.

E) (PF)PARITY FLAG:
Flag used to indicate parity of result. The lower order 8 bit contains even no of 1’s at that time
parity flag is set. If no is odd no of 1’s the flag is reset.

F) (CF)CARRY FLAG:
This flag is set if carry or borrow is generated in the result of ALU.Otherwise it is in reset mode.

*CONDITONAL FLAG:

A) (DF) DIRECTION FLAG:

This is used in string operation. In this operation if it is set string byte are accessed from higher
memory address to lower memory address. It is in reset then string byte access from lower
memory address to higher memory address.

B) (IF) INTERRPUT FLAG:

It is an enable or disables flag. If it is set of maskable interrupt of 8086 is enable. If it is reset the
interrupt is disable.

C) (TF) TRAP FLAG:

Flag is used for single stape control. It allow user to execute 1 instruction of program of at a
time for debugging. When trap flag is set program can run in single state model
Conclusion :

Unlike microcontrollers, microprocessors do not have inbuilt

memory. Finally we can say 8086 microprocessor set thestage for a computer and worldwide standard
that wouldbecome the basis for the architecture of every computermade today
Reference :

1) https://ro.scribd.com/presentation/212330553/Internal-Architecture-of-
Intel- 8086-Final

2) https://www.geeksforgeeks.org/architecture-of-8086/