SN54/74LS113A

DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
The SN54 / 74LS113A offers individual J, K, set, and clock inputs. These
monolithic dual flip-flops are designed so that when the clock goes HIGH, the
inputs are enabled and data will be accepted. The logic level of the J and K DUAL JK NEGATIVE
inputs may be allowed to change when the clock pulse is HIGH and the EDGE-TRIGGERED FLIP-FLOP
bistable will perform according to the truth table as long as minimum setup
times are observed. Input data is transferred to the outputs on the LOW POWER SCHOTTKY
negative-going edge of the clock pulse.

LOGIC DIAGRAM (Each Flip-Flop) J SUFFIX

CERAMIC
CASE 632-08
14
1

Q Q
5(9) 6(8)

N SUFFIX
PLASTIC
CASE 646-06
SET (SD) 14
4(10)
K 1
J
3(11) 2(12)
1(13)
CLOCK (CP) D SUFFIX
SOIC
14
1 CASE 751A-02

ORDERING INFORMATION

MODE SELECT — TRUTH TABLE SN54LSXXXJ Ceramic

SN74LSXXXN Plastic
INPUTS OUTPUTS SN74LSXXXD SOIC
OPERATING MODE
SD J K Q Q
Set L X X H L
Toggle H h h q q LOGIC SYMBOL
Load “0” (Reset) H l h L H
Load “1” (Set) H h l H L 4 10
Hold H l l q q
H, h = HIGH Voltage Level SD 11 SD
L, I = LOW Voltage Level 3 J Q 5 J Q 9
X = Don’t Care
1 CP 13 CP
l, h (q) = Lower case letters indicate the state of the referenced input (or output)
l, h (q) = one set-up time prior to the HIGH to LOW clock transition. 2 K Q 6 12 K Q 8

VCC = PIN 14
GND = PIN 7

FAST AND LS TTL DATA

5-1
 SN54/74LS113A

GUARANTEED OPERATING RANGES

Symbol Parameter Min Typ Max Unit
VCC Supply Voltage 54 4.5 5.0 5.5 V
74 4.75 5.0 5.25
TA Operating Ambient Temperature Range 54 – 55 25 125 °C
74 0 25 70
IOH Output Current — High 54, 74 – 0.4 mA
IOL Output Current — Low 54 4.0 mA
74 8.0

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)

Limits
S b l
Symbol P
Parameter Min Typ Max U i
Unit T
Test C
Conditions
di i
Guaranteed Input HIGH Voltage for
VIH Input HIGH Voltage 2.0 V
All Inputs
54 0.7 Guaranteed Input
p LOW Voltage
g for
VIL Input LOW Voltage V
74 0.8 All Inputs

VIK Input Clamp Diode Voltage – 0.65 – 1.5 V VCC = MIN, IIN = – 18 mA
54 25
2.5 35
3.5 V VCC = MIN
MIN,, IOH = MAX,
MAX, VIN = VIH
VOH O
Output HIGH Voltage
V l
74 2.7 3.5 V or VIL per Truth Table

54, 74 0.25 0.4 V IOL = 4.0 mA VCC = VCC MIN,

VOL Output LOW Voltage VIN = VIL or VIH
74 0.35 0.5 V IOL = 8.0 mA per Truth Table

J, K 20
Set 60 µA VCC = MAX, VIN = 2.7 V
Clock 80
IIH Input HIGH Current
J, K 0.1
Set 0.3 mA VCC = MAX, VIN = 7.0 V
Clock 0.4
J, K – 0.4
IIL Input LOW Current mA VCC = MAX, VIN = 0.4 V
Set, Clock – 0.8
IOS Short Circuit Current (Note 1) – 20 – 100 mA VCC = MAX
ICC Power Supply Current 6.0 mA VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)

Limits
S b l
Symbol P
Parameter Min Typ Max U i
Unit T
Test C di i
Conditions
fMAX Maximum Clock Frequency 30 45 MHz
VCC = 5.0
50V
tPLH Propagation
p g Delay,
y, Clock 15 20 ns
CL = 15 pF
tPHL Set to Output 15 20 ns

AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)

Limits
S b l
Symbol P
Parameter Min Typ Max U i
Unit T
Test C
Conditions
di i
tW Clock Pulse Width High 20 ns
tW Set Pulse Width 25 ns
VCC = 5
5.0
0V
ts Setup Time 20 ns
th Hold Time 0 ns

FAST AND LS TTL DATA

5-2