hyd.vlsi@pantechmail.

com

VLSI DESIGN

Project
Titles Applications
Code
Design and Verification of Serial Peripheral ADC
PANVLSI001 Interface(SPI) Applications
Design and Verification of Universal Asynchronous
Interface
PANVLSI002 Receiver Transmitter (UART)
Applications
Design and Verification of Synchronous FIFO
Memory
PANVLSI003
Management
PANVLSI004 Design of an AMBA-Advanced Peripheral Bus (APB)
ARM
Protocol IP Block Applications
In Situ and In-Field Technique for Monitoring and
PANVLSI005 Decelerating NBTI in 6T-SRAM Register Files Power
Management

ASIC Verification of Dual Port SRAM

PANVLSI006
Memory
Management
PANVLSI007 Approximate Reverse Carry Propagate Adder for DSP
Energy-Efficient DSP Applications Applications
A Low-Power High-Speed Comparator for Precise Memory
PANVLSI008 Applications Applications

SPI to I2C Conversion using Verilog ADC

PANVLSI009
applications

A Simple Yet Efficient Accuracy-Configurable Adder Power

PANVLSI010 Design Management

A Low-Power High-Speed Comparator for Precise Memory

PANVLSI011 Applications applications

PANVLSI012 Design and Verification of Inter Integrated Circuit(I2C) Communication

Applications
Full Adder/Subtractor Circuit using Reversible Logic
PANVLSI013 Power
Gates Management

Design of ALU using dual mode logic with optimized

Power
PANVLSI014 power and speed
Management
Implementation of 4-BIT universal shift register using
PANVLSI015 Memory
diode free adiabatic logic Management
 hyd.vlsi@pantechmail.com

VLSI DESIGN

Probability-Driven Multi bit Flip-Flop Integration With Power

PANVLSI016
Clock Gating Management
Design and implementation of 32-bit adders using
Memory
PANVLSI017 various full adders applications

New High-Speed Multi output Carry Look-Ahead Power

PANVLSI018 Adders Management

PANVLSI019 Reliability Enhancement of Low-Power Sequential Memory

Circuits Using Reconfigurable Pulsed Latches applications
A Verilog based Moore and Mealy FSMs Sequence
PANVLSI020 Detectors
Timing and Synchronization for Explicit FSM based
PANVLSI021 Traffic Light Controller Traffic
Management

PANVLSI022 Design and Synthesis of ALU using MAC

Reversible Logic for MAC Applications applications

Design and Verification of 8 bit Hamming Encoder security

PANVLSI023
and Decoder applications
Fixed-Point Matrix Multiplication in Verilog
PANVLSI024 Memory
Applications

PANVLSI025 Delay Analysis for Current Mode Threshold Logic Power

Gate Designs Management

PANVLSI026 Conditional-Boosting Flip-Flop for Near-Threshold Memory

Voltage Application applications
A 0.1–2-GHz Quadrature Correction Loop for Digital PLL
PANVLSI027 applications
Multiphase Clock Generation Circuits in 130- nm CMOS

A 65-nm CMOS Constant Current Source with ADC

PANVLSI028
Reduced PVT Variation applications

Medical
PANVLSI029 FPGA based Temperature Control and Monitoring equipment
System for X-ray Measurement Instrument applications
FPGA based real time monitoring system for irrigation
PANVLSI030
agricultural field systems
Efficient Advance Encryption Standard (AES)
PANVLSI031 Implementation on FPGA Using Xilinx System Cryptography
Generator
 hyd.vlsi@pantechmail.com

VLSI DESIGN

RSA Based Biometric Encryption System Using FPGA Security

PANVLSI032 system
for Increased Security
PANVLSI033 Security Approach for LSB Steganography Based FPGA Security
Implementation system
Automatic Controller Component Development using Home
PANVLSI034
FPGA Device automation

Reconfigurable Smart Water Quality Monitoring System Water quality

PANVLSI035
in IOT Environment system
PANVLSI036 A Review of FPGA implementation of Internet IOT
of Things
A Parallel Hybrid Heuristic Based on Karp’s
PANVLSI037 shopping
Partitioning for PTSP on Multi-core Processors Protocol
Design of Low Power Memory Cell Using D Flip-
PANVLSI038 Photo Voltaic
Flop Under Adiabatic Reduction Technique
Design Methodology for Voltage-Scaled Clock
PANVLSI039 Photo Voltaic
Distribution Networks
Full-Swing Local Bit line SRAM Architecture Based
PANVLSI040 onthe22nm Fin FET Technology for Low- Voltage Processors
Operation Design

Cyclic Combinational Gate Diffusion Input (CCGDI)

PANVLSI041 Technique-A New Approach of Low Power Digital Memory Cell
Combinational Circuit Design
Self-gated resonant-clocked flip-flop optimized for power
PANVLSI042 Photovoltaic
efficiency and signal integrity

PANVLSI043 Reducing Power, Leakage, and Area of Standard- Power

Cell ASICs Using Threshold Logic Flip-Flops Management
PANVLSI044 Dual Use of Power Lines for Design-for DFT
Testability—A CMOS Receiver Design

PANVLSI045 Sub threshold Level Shifter with Self Controlled CPU Design
Current Limiter by Detecting Output Error
PANVLSI046 Implementation of Low Power Flip-Flop Design in Power
Nanometer Regime Management
Design of a Low Power 4x4 Multiplier Based on Five
PANVLSI047 Transistor(5-T)Half Adder, Eight Transistor (8-T)Full ALU Design
Adder &Two Transistor(2-T)AND Gate
Analysis of ternary multiplier using booth encoding
PANVLSI048 Photovoltaic
technique system
Multiplier-less pipeline architecture for lifting- based
PANVLSI049 Signal
two-dimensional discrete wavelet transform Processing
 hyd.vlsi@pantechmail.com

VLSI DESIGN

PANVLSI050 A New Gate for Low Cost Design of All-optical Radar

Reversible Logic Circuit
High-Speed and Energy-Efficient Carry Skip Adder
PANVLSI051 Operating Under a Wide Range of Supply Voltage CPU Design
Levels

PANVLSI052 Low-Cost High-Performance VLSI Architecture for Signal process

Montgomery Modular Multiplication
A Low-Power Architecture for the Design of a One-
PANVLSI053 Signal
Dimensional Median Filter processing
PANVLSI054 On the Analysis of Reversible Booth’s Multiplier Telecommunica
tions
Parity Preserving Adder/Sub tractor using a Novel Quantum
PANVLSI055
Reversible Gate Computing

PANVLSI056 Comparisons of Robert, Prewitt, Sobel operator Defense

based edge detection methods for real-time uses on
FPGA
PANVLSI057 Reversible Image Data Hiding with Contrast Enhancement Machine vision

PANVLSI058 Image segmentation frame work based on multiple Defense

feature spaces
PANVLSI059 Reconfigurable Architecture of Adaptive Median Filter– Computer
An FPGA Based Approach for Impulse Noise vision
Suppression
PANVLSI060 ACDF based Lifting scheme for the satellite Computer
image compression vision
Hardware Implementation of Digital Watermarking Broadcast
PANVLSI061
System for Real Time Captured Image Transmitting monitoring

PANVLSI062 Real-Time Image Segmentation using a Spiking Satellite

Neuromorphic Processor imagery

PANVLSI063 Spartan 6 FPGA Implementation Of 2d-Discrete Wavelet Signal

Transform In Verilog HDL processing
Research and implementation of color image processing System
PANVLSI064 design
pipeline based on FPGA
PANVLSI065 Hardware Implementation of a Brain Inspired Filter for Human vision
Image Processing
Security
PANVLSI066 High-Throughput Ring-LWE Crypto processors
system
Low-Cost Sorting Network Circuits Using Unary Computer
PANVLSI067
Processing vision

Toward Energy-Efficient Stochastic Circuits Using Human

PANVLSI068
Parallel Sobol Sequence vision
 hyd.vlsi@pantechmail.com

VLSI DESIGN

Feedback-Based Low-Power Soft-Error-Tolerant CPU Design

PANVLSI069
Design for Dual-Modular Redundancy
Pulse based Acyclic Asynchronous Pipelines for CPU Design
PANVLSI070
Combinational Logic Circuits
Low Overhead Warning Flip-Flop Based on Charge Photo
PANVLSI071
sharing For Timing Slack Monitoring Voltaic

Impact of Device Aging on Early Mode Failures in

PANVLSI072
Pulsed Latches Photo
Voltaic

Lifting based Discrete Wavelet Transform using Image

PANVLSI073
Spartan3 FPGA Image Processing Kit Processing

Contention-free high-speed clock-gate based on Photo

PANVLSI074
Set/Reset latch for Wide Voltage Scaling Voltaic

Low-Power and Fast Full Adder by Exploring New Photo

PANVLSI075 Voltaic
XOR and XNOR Gates
Digitally Assisted On-Chip Body Bias Tuning Scheme Power
PANVLSI076
for Ultra Low-Power VLSI System Management

Multi-Bit Pulsed-Latch Based Low Power Synchronous Processors

PANVLSI077
Circuit Design Design

Radiation Hardened Latch Designs for Double and Power

PANVLSI078
Triple Node Upsets Management

VLSI design of low-cost and high-precision fixed-point Power

PANVLSI079
reconfigurable FFT Processor Management

A Simple Yet Efficient Accuracy Configurable Adder Power

PANVLSI080
Design Management

IOT based Security System using FPGA Security

PANVLSI081
Applications

Gesture based Home Automation System using FPGA Home

PANVLSI082
Applications

FPGA Based Robotic ARM Controller Robotics

PANVLSI083

IOT based Smart Irrigation System using FPGA IOT

PANVLSI084
Real Time moving Object Detection using FPGA Home
PANVLSI085
Applications