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<Variant Name>

Title : RF BD

NB1-RD3EE2
Engineer: EE
Size Project Name Rev
A UX482 R0.1

Date: Monday, July 13, 2020 Sheet 69 of 102


Power
SYSTEM PAGE REF.

PAGE Content
FX516 SCHEMATIC PW_IMVP9
Page 80,81

1 Block Diagram +3VADSW/+5VSUS


2 System Setting
Page 87
3 CPU_DMI,PEG,eDP,DDI
4 CPU_DDR
BLOCK DIAGRAM +1.8VSUS
5 CPU_GND
Page 83
6 CPU_CFG,RSVD
7 CPU_ESPI,SPI,SMB,CLINK +1.1V
8 CPU_PCH_CSI2,EMMC,CNV Page 86
9 CPU_POWER CHA DDR4 on-board Page 14
10 CPU_POWER_CAP Page 45 EDP Page 93
EEPROM LCD Panel (eDP - FHD) 3200 MHz (8G or 16G) PW +NVVDD
11 TBT_Titan Ridge SP Page 78 Slave Chager
W25Q80EWSNIG Page 91
12 TBT_TPS65994AD&Type C Page 16 ISL9238BHRTZ-T
CHB DDR4 SO-DIMM
13 TBT
NVIDIA GPU Page 70-79 PCIE_0~3 GEN4X4
3200 MHz (8G or 16G)
14 DIM_DDR4_ON-BOARD_A(1) VRAM GDDR6
Page 72-75 GN20E4/E3/P0/P1 Page 94
15 DIM (256Mbx32)*8 IFPC_HDMI TCP0 TBT-JHL8040R
PD controller
16 DIM_DDR4 SO-DIMM B(0) TOP CC1
Charger
17 DIM_ BURNSIDEBRIDGE SN2001022YBGR
Page 89
18 DIM_CA/DQ Voltage Page 11
HDMI Retimer HDMI Switch Page 48
CPU DDIB
19 DDR4_TERMINATION* SPI ROM OVP IC Load Switch
20 PCH_HDA,SMBUS,SYS PWR SN75DP159RSBT TS3DV642A0RUAR W25Q80DVSNIG CAT24C512WI-GT4 Page 88
21 PCH-CPT(2)_PCIE,USB2,MISC Page 48 Page 12
22 PCH-CPT(3)_CLK,LPC,USB3 TGL-HU
23 PCH-CPT(4)_eDP,PCI,DP,MISC HDMI Connecter Type C Port
24 PCH-CPT(5)_SPI J4801 Debug Conn. USB3.1 Gen2 Type-C
25 PCH-CPT(6)_GPIO
Page 44
26 PCH-CPT(7)_POWER,GND
27 PCH-CPT(8)_POWER,GND USB3.1 Gen1 Type-A Port1
28 PCH-SPI ROM,OTH USB3.0 Gen1 Type-A
30 KBC_IT8995
J5201 Jack LPC EC IC
31 EC_KB_TP Page 52
IT5125VG-192/CX
36 AUD-ALC3288
38 Audio_Jack Page 30
39 SMART AMP TAS5766M USB3.1 Gen1 Type-A Port2 SPI ROM
USB3.0 Gen1 Type-A W25Q128JVPIQ
Page 28
40 Card Reader AU6465 J5202 Jack tiger lake UP3
44 BUG_Debug
Page 52 CNVi
45 CRT_LCD Panel_CMOS_DMIC
48 HDMI WIFI_J5301 con.
51 NGFF_SSD USB3.1 Gen1 Type-A Port3
52 USB Port USB3.0 Gen1 Type-A Page 53

53 USB 3.0 MB Type-C J3803 Jack I2C3 Touch pad


Page 31
54 G-sensor J3105 CON.
Page 38

56 LED_Indicator
57 DSG_Discharge M.2 PCIE x4
58 PRO_PROTECT
M.2 TYPE 2280
PCIEx4 Only USB2.0 port2 N key Page 35

60 DC_DC & BAT Conn. PCIE Only_J4001 Jack


ITE IT8299E
62 ME_Conn & Skew Hole Page 40
63 EMI_RF Reserve
64 U3_B2B CONN
66 WLAN&BT SIP Keyboard Backlight CON.

67 LID_Switch / FAN_connector M.2 TYPE 2280 M.2 PCIE x4


70 GPU PCIE PCIEx4 & SATA PCIE & SATA_J4101 Jack
Azalia
Page 31

71 GPU MEMORY Interface


Page 41
72 Frame Buffer
74 GPU STRAP SPEAKER
75 GPU GPIO 8ohm/2W

76 GPU VDD/GND Azalia Codec


Power button board Page 39
77 GPU PWG Decopling I2S
78 GPU Power FPC_CON_4P Realtek ALC3288
79 VGA Sensor SPEAKER
80_PW_IMVP8 (1)
Page 55 8ohm/2W 06103-00360100
81_PW_IMVP8 (2) Page 39

83_PW_+1.0VSUS / +1.8VSUS
86_PW_1.2V/+0.6VS
INT. DMIC
87_PW_+3VADSW/+5VSUS (Reserved)
Page 36
88_PW_LOAD SWITCH
Page 45
89_PW_CHARGER(BQ24780) <Variant Name>

Project Name
90_PW_PROTECTION Rev

UX482 R0.1

91_PW_NVVDD Title : Block Diagram


94_PW_VRAM Size
Custom
Dept.: NB1-RD3EE2 Engineer: EE
Date: Monday, July 13, 2020 Sheet 1 of 102
Main Board
U0301A

Justin Note. LSX & AUX MUX is build in burnside bridge


@20200616_修正EDP_TP連線
AC2 AY2
45 EDP_TXP3 DDIA_TXP[3] TCP0_TXRX_P1 TCP0_TXRX_P1 11
AC1 AY1
45 EDP_TXN3 DDIA_TXN[3] TCP0_TXRX_N1 TCP0_TXRX_N1 11
45
45
EDP_TXP2
EDP_TXN2
AD2
AD1
AF1
DDIA_TXP[2]
DDIA_TXN[2]
i7-4.7G_01001-01990500 TCP0_TXRX_P0
TCP0_TXRX_N0
BB1
BB2
AM5
TCP0_TXRX_P0
TCP0_TXRX_N0
11
11

EDP
45
45
EDP_TXP1
EDP_TXN1
AF2
AG2
DDIA_TXP[1]
DDIA_TXN[1] i5-4.2G_01001-01990400 TCP0_TX_P1
TCP0_TX_N1
AM7
AT7
TCP0_TX_P1
TCP0_TX_N1
11
11 TBT Type C port 0
45 EDP_TXP0 DDIA_TXP[0] TCP0_TX_P0 TCP0_TX_P0 11
AG1 AT5
45 EDP_TXN0 DDIA_TXN[0] TCP0_TX_N0 TCP0_TX_N0 11
AP7
TCP0_AUX_P TCP0_AUXP 11
AJ2 AP5
45 EDP_AUXP DDIA_AUX_P TCP0_AUX_N TCP0_AUXN 11
AJ1
45 EDP_AUXN DDIA_AUX_N
AT2
TCP1_TXRX_P1
DN4 AT1
GPP_E22/ DDPA_CTRLCLK/DNX_FORCE_RELOAD TCP1_TXRX_N1
DT6 AU1
GPP_E23/DDPA_CTRLDATA TCP1_TXRX_P0
AU2
TCP1_TXRX_N0
DR5 AD5
45 eDP_HPD_PCH GPP_E14/DDSP_HPDA/DISP_MISCA TCP1_TX_P1
AD7
TCP1_TX_N1
T12 AH7
48 HDMI_CLKP_PCH DDIB_TXP[3] TCP1_TX_P0
T11 AH5
48 HDMI_CLKN_PCH DDIB_TXN[3] TCP1_TX_N0
Y11 AF7
48 HDMI_DATA0P_PCH DDIB_TXP[2] TCP1_AUX_P
Y9 AF5
HDMI 48 HDMI_DATA0N_PCH
T9
DDIB_TXN[2] TCP1_AUX_N
48 HDMI_DATA1P_PCH DDIB_TXP[1]
P9 BF1
48 HDMI_DATA1N_PCH DDIB_TXN[1] TCP2_TXRX_P1
V11 BF2
48 HDMI_DATA2P_PCH DDIB_TXP[0] TCP2_TXRX_N1
V9 BE2
48 HDMI_DATA2N_PCH DDIB_TXN[0] TCP2_TXRX_P0
BE1
TCP2_TXRX_N0
AB9 BD7
DDIB_AUX_P TCP2_TX_P1
AD9 BD5
DDIB_AUX_N TCP2_TX_N1
AY5
TCP2_TX_P0
DM29 AY7
48 DDPC_SCL_PCH GPP_H16/ DDPB_CTRLCLK/PCIE_LNK_DOWN TCP2_TX_N0
DK27 BB5
48 DDPC_SDA_PCH GPP_H17/DDPB_CTRLDATA TCP2_AUX_P
BB7
TCP2_AUX_N
DG43
48 HDMI_HP GPP_A18/ DDSP_HPDB/DISP_MISCB/I2S4_RXD
BK1
TCP3_TXRX_P1
DG47 BK2
GPP_A21/DDPC_CTRLCLK/I2S5_TXD TCP3_TXRX_N1
DJ47 BJ2
GPP_A22/DDPC_CTRLDATA/I2S5_RXD TCP3_TXRX_P0
BJ1
TCP3_TXRX_N0
DU8 BM7
11 TBT_LSX0_TXD GPP_E18/ DDP1_CTRLCLK/TBT_LSX0_TXD TCP3_TX_P1
DV8 BM5
11 TBT_LSX0_RXD GPP_E19/ DDP1_CTRLDATA/TBT_LSX0_RXD TCP3_TX_N1
BH5
TCP3_TX_P0
DF6 BH7
GPP_E20/ DDP2_CTRLCLK/TBT_LSX1_TXD TCP3_TX_N0
TBT_LSX1_TXD DD6 BK5
GPP_E21/ DDP2_CTRLDATA/TBT_LSX1_RXD TCP3_AUX_P
TBT_LSX1_RXD BK7
TCP3_AUX_N
DN23 ISH_SPI_CS#/DDP3_CTRLCLK/TBT_LSX2_TXD/GSPI2_CS0#
GPP_D9/
DM23 AN2
GPP_D10/ ISH_SPI_CLK/DDP3_CTRLDATA/TBT_LSX2_RXD/GSPI2_CLK TC_RCOMP_P
AN1 TC_RCOMP_P R0301 1% 150OHM
TC_RCOMP_N
DK23 TC_RCOMP_N 2 1
GPP_D11/ ISH_SPI_MISO/DDP4_CTRLCLK/TBT_LSX3_TXD/GSPI2_MISO
DN21 M8
GPP_D12/ ISH_SPI_MOSI/DDP4_CTRLDATA/TBT_LSX3_RXD/GSPI2_MOSI DSI_DE_TE_2

DF43 AB1
GPP_A17/DISP_MISCC/I2S4_TXD DDI_RCOMP
DF45 DISP_RCOMP
GPP_A19/ DDSP_HPD1/DISP_MISC1/I2S5_SCLK
DF47 CE4

2
GPP_A20/ DDSP_HPD2/DISP_MISC2/I2S5_SFRM DISP_UTILS/DSI_DE_TE_1
R0304
R0302 100KOhm DH52 150OHM
+3VSUS GPP_A14/ USB_OC1#/DDSP_HPD3/I2S3_RXD/DISP_MISC3/DMIC_CLK_B1
R0303 1 2 100KOhm USB_OC1# DK45 1%
+3VSUS GPP_A15/ USB_OC2#/DDSP_HPD4/DISP_MISC4/I2S4_SCLK
1 2 USB_OC2#

1
DM8
45 L_VDDEN_PCH eDP_VDDEN
DN8
EDP1_CTRL 45 eDP_BL_EN_PCH eDP_BKLTEN
DG10
45 eDP_PWM_PCH eDP_BKLTCTL

TGL-UP3
01001-01990500
TBT LSX #0, LSX #1 Pins VCCIO Configuration
High: 3.3V
Low: 1.8V
Weak INT. PD 20K

R0305 1 @ 2 1MOhm
TBT_LSX0_TXD

R0306 1 @ 2 1MOhm
TBT_LSX1_TXD

R0310 1 @ 2 1MOhm
TBT_LSX0_RXD
R0311 1 @ 2 1MOhm
TBT_LSX1_RXD

<Variant Name>

Project Name Rev

UX482 R0.1

Title : CPU_DISPLAY
Size
D
Dept.: NB1-RD3EE2 Engineer: EE
Date: Monday, July 13, 2020 Sheet 3 of 102
Memory Channel A MA/B_
On Board DDR4 I/O-IOMEM-S/D VDDIO_MEM_S3 (S0_1.2)_FP6 (FDS)
Memory Channel B
Main Board
SO-DIMM DDR4

U0301B On board 只接一組


(Follow FP6 MPDG P53 & GA502) U0301C
LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL) DDR4/LP4/LP5/LP5 CMD Flip
14 M_A_DQ[63:0]
CP53 BT42
DDR0_DQ0[7] DDR0_CLK_P1/DDR3_CLK_P/DDR3_CLK_P /DDR3_CLK_P
M_A_DQ0 CP52 BT41 M_A_CLK_DDR1 1 T0404 @ LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL) DDR4/LP4/LP5/LP5 CMD Flip
DDR0_DQ0[6] DDR0_CLK_N1/DDR3_CLK_N/DDR3_CLK_N /DDR3_CLK_N 16 M_B_DQ[63:0]
M_A_DQ1 CP50 BP52 M_A_CLK_DDR#1 1 T0405 @ AL53 R41
DDR0_DQ0[5] NC/DDR2_CLK_P/DDR2_CLK_P /DDR2_CLK_P DDR4_DQ0[7]/ DDR1_DQ0[7]/DDR0_DQ4[7] DDR1_CLK_P1/DDR7_CLK_P/DDR7_CLK_P /DDR7_CLK_P M_B_CLK_DDR1 16
M_A_DQ2 CP49 BP53 M_B_DQ0 AL52 R42 M_B_CLK_DDR1
DDR0_DQ0[4] NC/DDR2_CLK_N/DDR2_CLK_N /DDR2_CLK_N DDR4_DQ0[6]/ DDR1_DQ0[6]/DDR0_DQ4[6] DDR1_CLK_N1/DDR7_CLK_N/DDR7_CLK_N /DDR7_CLK_N M_B_CLK_DDR#1 16
M_A_DQ3 CU53 CD42 M_B_DQ1 AL50 M52 M_B_CLK_DDR#1
DDR0_DQ0[3] NC/DDR1_CLK_P/DDR1_CLK_P /DDR1_CLK_P DDR4_DQ0[5]/ DDR1_DQ0[5]/DDR0_DQ4[5] NC/DDR6_CLK_P/DDR6_CLK_P /DDR6_CLK_P
M_A_DQ4 CU52 CD41 M_B_DQ2 AL49 M53
DDR0_DQ0[2] NC/DDR1_CLK_N/DDR1_CLK_N /DDR1_CLK_N DDR4_DQ0[4]/ DDR1_DQ0[4]/DDR0_DQ4[4] NC/DDR6_CLK_N/DDR6_CLK_N /DDR6_CLK_N
M_A_DQ5 CU50 CC52 M_B_DQ3 AP53 AC42
DDR0_DQ0[1] DDR0_CLK_P0/DDR0_CLK_P/DDR0_CLK_P /DDR0_CLK_P M_A_CLK_DDR0 14,19 DDR4_DQ0[3]/ NC/DDR5_CLK_P/DDR5_CLK_P /DDR5_CLK_P
M_A_DQ6 CU49 CC53 M_A_CLK_DDR0 AP52 DDR1_DQ0[3]/DDR0_DQ4[3] AC41
DDR0_DQ0[0] DDR0_CLK_N0/DDR0_CLK_N/DDR0_CLK_N /DDR0_CLK_N M_A_CLK_DDR#0 14,19 M_B_DQ4
0 M_A_DQ7 CH53
DDR0_DQ1[7] DDR4/LP4/LP5/LP5 CMD Flip
M_A_CLK_DDR#0 M_B_DQ5 AP50
DDR4_DQ0[2]/ DDR1_DQ0[2]/DDR0_DQ4[2] NC/DDR5_CLK_N/DDR5_CLK_N /DDR5_CLK_N
Y52
CH52 BT45 DDR4_DQ0[1]/ DDR1_DQ0[1]/DDR0_DQ4[1] DDR1_CLK_P0/DDR4_CLK_P/DDR4_CLKP /DDR4_CLK_P M_B_CLK_DDR0 16
M_A_DQ8 M_B_DQ6 AP49 Y53 M_B_CLK_DDR0
DDR0_DQ1[6] NC/DDR3_CKE0/DDR3_WCK_P /DDR3_WCK_P DDR4_DQ0[0]/ DDR1_DQ0[0]/DDR0_DQ4[0] DDR1_CLK_N0/DDR4_CLK_N/DDR4_CLK_N /DDR4_CLK_N M_B_CLK_DDR#0 16
M_A_DQ9 CH50 BT47 M_B_DQ7 AF53 M_B_CLK_DDR#0
DDR0_DQ1[5] NC/DDR3_CKE1/DDR3_WCK_N /DDR3_WCK_N DDR4_DQ1[7]/ DDR1_DQ1[7]/DDR0_DQ5[7] DDR4/LP4/LP5/LP5 CMD Flip
M_A_DQ10 CH49 BN51 M_B_DQ8 AF52 R47
DDR0_DQ1[4] NC/DDR2_CKE0/DDR2_WCK_P /DDR2_WCK_P DDR4_DQ1[6]/ DDR1_DQ1[6]/DDR0_DQ5[6] NC/DDR7_CKE0/DDR7_WCK_P /DDR7_WCK_P
M_A_DQ11 CL53 BN53 M_B_DQ9 AF50 R45
DDR0_DQ1[3] NC/DDR2_CKE1/DDR2_WCK_N /DDR2_WCK_N DDR4_DQ1[5]/ DDR1_DQ1[5]/DDR0_DQ5[5] NC/DDR7_CKE1/DDR7_WCK_N /DDR7_WCK_N
M_A_DQ12 CL52 CD45 M_B_DQ10 AF49 K51
DDR0_DQ1[2] NC/DDR1_CKE0/DDR1_WCK_P /DDR1_WCK_P DDR4_DQ1[4]/ DDR1_DQ1[4]/DDR0_DQ5[4] NC/DDR6_CKE0/DDR6_WCK_P /DDR6_WCK_P
M_A_DQ13 CL50 CD47 M_B_DQ11 AH53 K53
DDR0_DQ1[1] NC/DDR1_CKE1/DDR1_WCK_N /DDR1_WCK_N DDR4_DQ1[3]/ DDR1_DQ1[3]/DDR0_DQ5[3] /DDR6_WCK_N
M_A_DQ14 CL49 CA51 M_B_DQ12 AH52 NC/DDR6_CKE1/DDR6_WCK_N AC47
DDR0_DQ1[0] NC/DDR0_CKE0/DDR0_WCK_P /DDR0_WCK_P DDR4_DQ1[2]/ DDR1_DQ1[2]/DDR0_DQ5[2] NC/DDR5_CKE0/DDR5_WCK_P /DDR5_WCK_P
M_A_DQ15 CT47 CA53 M_B_DQ13 AH50 AC45
DDR1_DQ0[7]/DDR0_DQ2[7] NC/DDR0_CKE1/DDR0_WCK_N /DDR0_WCK_N DDR4_DQ1[1]/ DDR1_DQ1[1]/DDR0_DQ5[1] NC/DDR5_CKE1/DDR5_WCK_N /DDR5_WCK_N
M_A_DQ16 CV47 M_B_DQ14 AH49 W51
DDR1_DQ0[6]/DDR0_DQ2[6] DDR4/LP4/LP5/LP5 CMD Flip
CT45 BU52 1 T0401 @ DDR4_DQ1[0]/ DDR1_DQ1[0]/DDR0_DQ5[0] NC/DDR4_CKE0/DDR4_WCK_P /DDR4_WCK_P
M_A_DQ17 M_B_DQ15 AR41 W53
DDR1_DQ0[5]/DDR0_DQ2[5] DDR0_CKE1/DDR2_CA4/DDR2_CA5 /DDR2_CA1 DDR5_DQ0[7]/ DDR1_DQ2[7]/DDR1_DQ4[7] /DDR4_WCK_N
M_A_DQ18 CV45 BL50 M_A_CKE1 M_B_DQ16 AV42 NC/DDR4_CKE1/DDR4_WCK_N
DDR1_DQ0[4]/DDR0_DQ2[4] DDR0_CKE0/DDR2_CA5/DDR2_CA6 /DDR2_CA0 M_A_CKE0 14,19 DDR5_DQ0[6]/ DDR1_DQ2[6]/DDR1_DQ4[6] DDR4/LP4/LP5/LP5 CMD Flip
M_A_DQ19 CT42 M_A_CKE0 M_B_DQ17 AR42 P52
DDR1_DQ0[3]/DDR0_DQ2[3] DDR4/LP4/LP5/LP5 CMD Flip
CV42 CF42 1 T0403 @ DDR5_DQ0[5]/ DDR1_DQ2[5]/DDR1_DQ4[5] DDR1_CKE1/DDR6_CA4/DDR6_CA5 /DDR6_CA1 M_B_CKE1 16
M_A_DQ20 M_B_DQ18 AV41 J50 M_B_CKE1
DDR1_DQ0[2]/DDR0_DQ2[2] DDR0_CS1/DDR1_CA1/DDR1_CA1 /DDR1_CA5 DDR5_DQ0[4]/ DDR1_DQ2[4]/DDR1_DQ4[4] /DDR6_CA0 M_B_CKE0 16
M_A_DQ21 CT41 CF47 M_A_CS#1 M_B_DQ19 AR45 DDR1_CKE0/DDR6_CA5/DDR6_CA6 M_B_CKE0
DDR1_DQ0[1]/DDR0_DQ2[1] DDR0_CS0/NC/DDR1_CS1/DDR1_CA4 M_A_CS#0 14,19 DDR5_DQ0[3]/ DDR1_DQ2[3]/DDR1_DQ4[3] DDR4/LP4/LP5/LP5 CMD Flip
M_A_DQ22 CV41 M_A_CS#0 M_B_DQ20 AV45 AE42
DDR1_DQ0[0]/DDR0_DQ2[0] DDR4/LP4/LP5/LP5 CMD Flip
CK47 CE53 DDR5_DQ0[2]/ DDR1_DQ2[2]/DDR1_DQ4[2] DDR1_CS1/DDR5_CA1/DDR5_CA1 /DDR5_CA5 M_B_CS#1 16
M_A_DQ23 M_B_DQ21 AR47 AE47 M_B_CS#1
DDR1_DQ1[7]/DDR0_DQ3[7] NC/DDR0_CA0/DDR0_CA0/DDR0_CA6
1 M_A_DQ24 CM47
DDR1_DQ1[6]/DDR0_DQ3[6] NC/DDR0_CA1/DDR0_CA1/DDR0_CA5
CE50 M_B_DQ22 AV47
DDR5_DQ0[1]/ DDR1_DQ2[1]/DDR1_DQ4[1] DDR1_CS0/NC/DDR5_CS1/DDR5_CA4
DDR4/LP4/LP5/LP5 CMD Flip M_B_CS#0
M_B_CS#0 16
CK45 BL53 DDR5_DQ0[0]/ DDR1_DQ2[0]/DDR1_DQ4[0]
M_A_DQ25 M_B_DQ23 AJ41 N42
DDR1_DQ1[5]/DDR0_DQ3[5] NC/DDR2_CS0/DDR2_CA2/DDR2_CA2 DDR5_DQ1[7]/ DDR1_DQ3[7]/DDR1_DQ5[7] NC/DDR7_CA5/DDR7_CA6/DDR7_CA0
M_A_DQ26 CM45 BP47 M_B_DQ24 AJ42 N45
DDR1_DQ1[4]/DDR0_DQ3[4] NC/DDR3_CA5/DDR3_CA6/DDR3_CA0 DDR5_DQ1[6]/ DDR1_DQ3[6]/DDR1_DQ5[6] NC/DDR7_CA4/DDR7_CA5/DDR7_CA1
M_A_DQ27 CK42 BP42 M_B_DQ25 AL41 N44
DDR1_DQ1[3]/DDR0_DQ3[3] NC/DDR3_CA4/DDR3_CA5/DDR3_CA1 DDR5_DQ1[5]/ DDR1_DQ3[5]/DDR1_DQ5[5] NC/DDR7_CA3/DDR7_CA4/DDR7_CS1
M_A_DQ28 CM42 BP45 M_B_DQ26 AL42 N47
DDR1_DQ1[2]/DDR0_DQ3[2] NC/DDR3_CA3/DDR3_CA4/DDR3_CS1 DDR5_DQ1[4]/ DDR1_DQ3[4]/DDR1_DQ5[4] NC/DDR7_CA2/DDR7_CA3/DDR7_CS0
M_A_DQ29 CM41 BP44 M_B_DQ27 AJ45 J53
DDR1_DQ1[1]/DDR0_DQ3[1] NC/DDR3_CA2/DDR3_CA3/DDR3_CS0 DDR5_DQ1[3]/ DDR1_DQ3[3]/DDR1_DQ5[3] NC/DDR6_CS0/DDR6_CA2/DDR6_CA2
M_A_DQ30 CK41 LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL) M_B_DQ28 AJ47 AC50
DDR1_DQ1[0]/DDR0_DQ3[0] DDR5_DQ1[2]/ DDR1_DQ3[2]/DDR1_DQ5[2] NC/DDR4_CA1/DDR4_CA1/DDR4_CA5
M_A_DQ31 BF53 BB44 M_B_DQ29 AL45 AC53
DDR2_DQ0[7]/DDR0_DQ4[7]/ DDR0_DQ2[7] DDR3_DQSP[1]/DDR0_DQSP[7] /DDR1_DQSP[3] M_A_DQS7 14 DDR5_DQ1[1]/ DDR1_DQ3[1]/DDR1_DQ5[1] NC/DDR4_CA0/DDR4_CA0/DDR4_CA6
M_A_DQ32 BF52 BD44 M_A_DQS7 M_B_DQ30 AL47
DDR2_DQ0[6]/DDR0_DQ4[6]/ DDR0_DQ2[6] DDR3_DQSN[1]/DDR0_DQSN[7] /DDR1_DQSN[3] M_A_DQS#7 14 LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL)
BF50 BK44 DDR5_DQ1[0]/ DDR1_DQ3[0]/DDR1_DQ5[0]
M_A_DQ33 M_A_DQS#7 M_B_DQ31 A43 K36
DDR2_DQ0[5]/DDR0_DQ4[5]/ DDR0_DQ2[5] DDR3_DQSP[0]/DDR0_DQSP[6] /DDR1_DQSP[2] M_A_DQS6 14 DDR6_DQ0[7]/ DDR1_DQ4[7]/DDR0_DQ6[7] DDR7_DQSP[1]/DDR1_DQSP[7] /DDR1_DQSP[7] M_B_DQS7 16
M_A_DQ34 BF49 BH44 M_A_DQS6 M_B_DQ32 B43 K38 M_B_DQS7
DDR2_DQ0[4]/DDR0_DQ4[4]/ DDR0_DQ2[4] DDR3_DQSN[0]/DDR0_DQSN[6] /DDR1_DQSN[2] M_A_DQS#6 14 DDR6_DQ0[6]/ DDR1_DQ4[6]/DDR0_DQ6[6] DDR7_DQSN[1]/DDR1_DQSN[7] /DDR1_DQSN[7] M_B_DQS#7 16
M_A_DQ35 BH53 BA51 M_A_DQS#6 M_B_DQ33 D43 G44 M_B_DQS#7
DDR2_DQ0[3]/DDR0_DQ4[3]/ DDR0_DQ2[3] DDR2_DQSP[1]/DDR0_DQSP[5] /DDR0_DQSP[3] M_A_DQS5 14 DDR6_DQ0[5]/ DDR1_DQ4[5]/DDR0_DQ6[5] DDR7_DQSP[0]/DDR1_DQSP[6] /DDR1_DQSP[6] M_B_DQS6 16
M_A_DQ36 BH52 BA50 M_A_DQS5 M_B_DQ34 E44 J44 M_B_DQS6
DDR2_DQ0[2]/DDR0_DQ4[2]/ DDR0_DQ2[2] DDR2_DQSN[1]/DDR0_DQSN[5] /DDR0_DQSN[3] M_A_DQS#5 14 DDR6_DQ0[4]/ DDR1_DQ4[4]/DDR0_DQ6[4] /DDR1_DQSN[6] M_B_DQS#6 16
M_A_DQ37 BH50 BG51 M_A_DQS#5 M_B_DQ35 A46 DDR7_DQSN[0]/DDR1_DQSN[6] D39 M_B_DQS#6
DDR2_DQ0[1]/DDR0_DQ4[1]/ DDR0_DQ2[1] DDR2_DQSP[0]/DDR0_DQSP[4] /DDR0_DQSP[2] M_A_DQS4 14 DDR6_DQ0[3]/ DDR1_DQ4[3]/DDR0_DQ6[3] /DDR0_DQSP[7] M_B_DQS5 16
M_A_DQ38 BH49 BG50 M_A_DQS4 DDR6_DQSP[1]/DDR1_DQSP[5]
DDR2_DQ0[0]/DDR0_DQ4[0]/ DDR0_DQ2[0] DDR2_DQSN[0]/DDR0_DQSN[4] /DDR0_DQSN[2] M_B_DQ36 B46 C39 M_B_DQS5
M_A_DQS#4 14 DDR6_DQ0[2]/ DDR1_DQ4[2]/DDR0_DQ6[2] DDR6_DQSN[1]/DDR1_DQSN[5] /DDR0_DQSN[7] M_B_DQS#5 16
M_A_DQ39 AY53 CK44 M_A_DQS#4 M_B_DQ37 D46 C45 M_B_DQS#5
DDR2_DQ1[7]/DDR0_DQ5[7]/ DDR0_DQ3[7] DDR1_DQSP[1]/DDR0_DQSP[3] /DDR1_DQSP[1] M_A_DQS3 14 DDR6_DQ0[1]/ DDR1_DQ4[1]/DDR0_DQ6[1] DDR6_DQSP[0]/DDR1_DQSP[4] /DDR0_DQSP[6] M_B_DQS4 16
M_A_DQ40 AY52 CM44 M_A_DQS3
2 M_A_DQ41 AY50
DDR2_DQ1[6]/DDR0_DQ5[6]/ DDR0_DQ3[6] DDR1_DQSN[1]/DDR0_DQSN[3] /DDR1_DQSN[1]
CT44 M_A_DQS#3
M_A_DQS#3 14 M_B_DQ38 E47
DDR6_DQ0[0]/ DDR1_DQ4[0]/DDR0_DQ6[0] DDR6_DQSN[0]/DDR1_DQSN[4] /DDR0_DQSN[6]
D45 M_B_DQS4
M_B_DQS#4 16
DDR2_DQ1[5]/DDR0_DQ5[5]/ DDR0_DQ3[5] /DDR1_DQSP[0] M_B_DQ39 E38 AJ44 M_B_DQS#4
DDR1_DQSP[0]/DDR0_DQSP[2] M_A_DQS2 14 DDR6_DQ1[7]/ DDR1_DQ5[7]/DDR0_DQ7[7] DDR5_DQSP[1]/DDR1_DQSP[3] /DDR1_DQSP[5] M_B_DQS3 16
M_A_DQ42 AY49 CV44 M_A_DQS2 M_B_DQ40 D38 AL44 M_B_DQS3
DDR2_DQ1[4]/DDR0_DQ5[4]/ DDR0_DQ3[4] DDR1_DQSN[0]/DDR0_DQSN[2] /DDR1_DQSN[0] M_A_DQS#2 14 DDR6_DQ1[6]/ DDR1_DQ5[6]/DDR0_DQ7[6] DDR5_DQSN[1]/DDR1_DQSN[3] /DDR1_DQSN[5] M_B_DQS#3 16
M_A_DQ43 BC53 CK51 M_A_DQS#2 M_B_DQ41 B38 AV44 M_B_DQS#3
DDR2_DQ1[3]/DDR0_DQ5[3]/ DDR0_DQ3[3] DDR0_DQSP[1]/DDR0_DQSP[1] /DDR0_DQSP[1] M_A_DQS1 14 DDR6_DQ1[5]/ DDR1_DQ5[5]/DDR0_DQ7[5] DDR5_DQSP[0]/DDR1_DQSP[2] /DDR1_DQSP[4] M_B_DQS2 16
M_A_DQ44 BC52 CK50 M_A_DQS1 M_B_DQ42 A38 AR44 M_B_DQS2
DDR2_DQ1[2]/DDR0_DQ5[2]/ DDR0_DQ3[2] DDR0_DQSN[1]/DDR0_DQSN[1] /DDR0_DQSN[1] M_A_DQS#1 14 DDR6_DQ1[4]/ DDR1_DQ5[4]/DDR0_DQ7[4] DDR5_DQSN[0]/DDR1_DQSN[2] /DDR1_DQSN[4] M_B_DQS#2 16
M_A_DQ45 BC50 CR51 M_A_DQS#1 M_B_DQ43 E41 AG51 M_B_DQS#2
DDR2_DQ1[1]/DDR0_DQ5[1]/ DDR0_DQ3[1] DDR0_DQSP[0]/DDR0_DQSP[0] /DDR0_DQSP[0] M_A_DQS0 14 DDR6_DQ1[3]/ DDR1_DQ5[3]/DDR0_DQ7[3] DDR4_DQSP[1]/DDR1_DQSP[1] /DDR0_DQSP[5] M_B_DQS1 16
M_A_DQ46 BC49 CR50 M_A_DQS0 M_B_DQ44 D40 AG50 M_B_DQS1
DDR2_DQ1[0]/DDR0_DQ5[0]/ DDR0_DQ3[0] DDR0_DQSN[0]/DDR0_DQSN[0] /DDR0_DQSN[0] M_A_DQS#0 14 DDR6_DQ1[2]/ DDR1_DQ5[2]/DDR0_DQ7[2] DDR4_DQSN[1]/DDR1_DQSN[1] /DDR0_DQSN[5] M_B_DQS#1 16
M_A_DQ47 BK47 DDR4/LP4/LP5/LP5 CMD Flip M_A_DQS#0 M_B_DQ45 B40 AN51 M_B_DQS#1
DDR3_DQ0[7]/DDR0_DQ6[7]/ DDR1_DQ2[7] DDR6_DQ1[1]/ DDR1_DQ5[1]/DDR0_DQ7[1] DDR4_DQSP[0]/DDR1_DQSP[0] /DDR0_DQSP[4] M_B_DQS0 16
M_A_DQ48 BK45 CF44 1 T0402 @ A40 AN50
DDR3_DQ0[6]/DDR0_DQ6[6]/ DDR1_DQ2[6] /DDR1_CA6 M_B_DQ46 M_B_DQS0
DDR0_ODT1/DDR1_CA0/DDR1_CA0 DDR6_DQ1[0]/ DDR1_DQ5[0]/DDR0_DQ7[0] DDR4_DQSN[0]/DDR1_DQSN[0] /DDR0_DQSN[4] M_B_DQS#0 16
M_A_DQ49 BH47 DDR0_ODT0/DDR1_CS0/DDR1_CA2 CF45 M_A_ODT1 M_B_DQ47 G42 M_B_DQS#0
DDR3_DQ0[5]/DDR0_DQ6[5]/ DDR1_DQ2[5] /DDR1_CA2 M_A_ODT0 14,19 DDR7_DQ0[7]/DDR1_DQ6[7] DDR4/LP4/LP5/LP5 CMD Flip
M_A_DQ50 BH45 DDR4/LP4/LP5/LP5 CMD Flip M_A_ODT0 M_B_DQ48 G41 AE44
DDR3_DQ0[4]/DDR0_DQ6[4]/ DDR1_DQ2[4] DDR7_DQ0[6]/DDR1_DQ6[6] DDR1_ODT1/DDR5_CA0/DDR5_CA0 /DDR5_CA6 M_B_ODT1 16
M_A_DQ51 BH42 CB47 M_B_DQ49 J41 AE45 M_B_ODT1
DDR3_DQ0[3]/DDR0_DQ6[3]/ DDR1_DQ2[3] DDR0_MA16/DDR1_CA4/DDR1_CA5 /DDR1_CA1 M_A_RAS# 14,19 DDR7_DQ0[5]/DDR1_DQ6[5] /DDR5_CA2 M_B_ODT0 16
M_A_DQ52 BK42 CB44 M_A_RAS# DDR1_ODT0/DDR5_CS0/DDR5_CA2
DDR3_DQ0[2]/DDR0_DQ6[2]/ DDR1_DQ2[2] DDR0_MA15/DDR1_CA3/DDR1_CA4 /DDR1_CS1 M_A_CAS# 14,19 M_B_DQ50 J42 M_B_ODT0
DDR7_DQ0[4]/DDR1_DQ6[4] DDR4/LP4/LP5/LP5 CMD Flip
M_A_DQ53 BK41 CB45 M_A_CAS# M_B_DQ51 G45 AA47
DDR3_DQ0[1]/DDR0_DQ6[1]/ DDR1_DQ2[1] DDR0_MA14/DDR1_CA2/DDR1_CA3 /DDR1_CS0 M_A_A[13:0] 14,19 DDR7_DQ0[3]/DDR1_DQ6[3] DDR1_MA16/DDR5_CA4/DDR5_CA5 /DDR5_CA1 M_B_RAS# 16
M_A_DQ54 BH41 CF41 M_A_WE# M_B_DQ52 J45 AA44 M_B_RAS#
DDR3_DQ0[0]/DDR0_DQ6[0]/ DDR1_DQ2[0] DDR0_MA13/DDR1_CS1/DDR1_CS0 /DDR1_CA3 DDR7_DQ0[2]/DDR1_DQ6[2] /DDR5_CS1
M_A_DQ55 BD47 BU53 M_A_A13 G47
DDR1_MA15/DDR5_CA3/DDR5_CA4
AA45 M_B_CAS# 16
DDR3_DQ1[7]/DDR0_DQ7[7]/ DDR1_DQ3[7] DDR0_MA12/DDR2_CA1/DDR2_CA1 /DDR2_CA5 M_B_DQ53 M_B_CAS#
BB47 BT51 M_A_WE# 14,19 DDR7_DQ0[1]/DDR1_DQ6[1] DDR1_MA14/DDR5_CA2/DDR5_CA3 /DDR5_CS0 M_B_A[13:0] 16
M_A_DQ56 M_A_A12
3 M_A_DQ57 BD45
DDR3_DQ1[6]/DDR0_DQ7[6]/ DDR1_DQ3[6] DDR0_MA11/NC/DDR2_CS1/DDR2_CA4
BV42 M_A_A11
M_A_WE# M_B_DQ54 J47
DDR7_DQ0[0]/DDR1_DQ6[0] DDR1_MA13/DDR5_CS1/DDR5_CS0 /DDR5_CA3
AE41 M_B_WE#
DDR3_DQ1[5]/DDR0_DQ7[5]/ DDR1_DQ3[5] DDR0_MA10/DDR3_CA1/DDR3_CA1 /DDR3_CA5 M_B_DQ55 G38 P53 M_B_A13
BB45 BU50 DDR7_DQ1[7]/DDR1_DQ7[7] DDR1_MA12/DDR6_CA1/DDR6_CA1 /DDR6_CA5 M_B_WE# 16
M_A_DQ58 M_A_A10 M_B_DQ56 G36 N51 M_B_A12
DDR3_DQ1[4]/DDR0_DQ7[4]/ DDR1_DQ3[4] DDR0_MA9/DDR2_CA0/DDR2_CA0 /DDR2_CA6 DDR7_DQ1[6]/DDR1_DQ7[6] DDR1_MA11/NC/DDR6_CS1/DDR6_CA4 M_B_WE#
M_A_DQ59 BB42 BY53 M_A_A9 M_B_DQ57 H36 U42 M_B_A11
DDR3_DQ1[3]/DDR0_DQ7[3]/ DDR1_DQ3[3] DDR0_MA8/DDR0_CA2/DDR0_CA3 /DDR0_CS0 DDR7_DQ1[5]/DDR1_DQ7[5] DDR1_MA10/DDR7_CA1/DDR7_CA1 /DDR7_CA5
M_A_DQ60 BB41 CA50 M_A_A8 M_B_DQ58 H38 P50 M_B_A10
DDR3_DQ1[2]/DDR0_DQ7[2]/ DDR1_DQ3[2] DDR0_MA7/DDR0_CA4/DDR0_CA5 /DDR0_CA1 DDR7_DQ1[4]/DDR1_DQ7[4] DDR1_MA9/DDR6_CA0/DDR6_CA0 /DDR6_CA6
M_A_DQ61 BD42 BY52 M_A_A7 M_B_DQ59 N36 U53 M_B_A9
DDR3_DQ1[1]/DDR0_DQ7[1]/ DDR1_DQ3[1] DDR0_MA6/DDR0_CA3/DDR0_CA4 /DDR0_CS1 DDR7_DQ1[3]/DDR1_DQ7[3] DDR1_MA8/DDR4_CA2/DDR4_CA3 /DDR4_CS0
M_A_DQ62 BD41 BY50 M_A_A6 M_B_DQ60 L36 W50 M_B_A8
DDR3_DQ1[0]/DDR0_DQ7[0]/ DDR1_DQ3[0] DDR0_MA5/DDR0_CA5/DDR0_CA6 /DDR0_CA0 DDR7_DQ1[2]/DDR1_DQ7[2] DDR1_MA7/DDR4_CA4/DDR4_CA5 /DDR4_CA1
M_A_DQ63 CD51 M_A_A5 M_B_DQ61 L38 U52 M_B_A7
DDR0_MA4/DDR0_CS0/DDR0_CA2 /DDR0_CA2 DDR7_DQ1[1]/DDR1_DQ7[1] DDR1_MA6/DDR4_CA3/DDR4_CA4 /DDR4_CS1
CD53 M_A_A4 M_B_DQ62 N38 U50 M_B_A6
DDR0_MA3/DDR0_CS1/DDR0_CS0 /DDR0_CA3 DDR7_DQ1[0]/DDR1_DQ7[0] DDR1_MA5/DDR4_CA5/DDR4_CA6 /DDR4_CA0
BV47 M_A_A3 M_B_DQ63 AA51 M_B_A5
DDR0_MA2/DDR3_CS0/DDR3_CA2 /DDR3_CA2 DDR1_MA4/DDR4_CS0/DDR4_CA2 /DDR4_CA2
CE52 M_A_A2 AA53 M_B_A4
DDR0_MA1/NC/DDR0_CS1/DDR0_CA4 DDR1_MA3/DDR4_CS1/DDR4_CS0 /DDR4_CA3
BV41 M_A_A1 U47 M_B_A3
DDR0_MA0/NC/DDR3_CS1/DDR3_CA4 DDR1_MA2/DDR7_CS0/DDR7_CA2 /DDR7_CA2
DDR4/LP4/LP5/LP5 CMD Flip M_A_A0 AC52 M_B_A2
BN50 DDR1_MA1/NC/DDR4_CS1/DDR4_CA4
/DDR2_CS0 U41 M_B_A1
DDR0_BG1/DDR2_CA2/DDR2_CA3 M_A_BG1 14,19 DDR1_MA0/NC/DDR7_CS1/DDR7_CA4
BL52 M_A_BG1 M_B_A0
DDR0_BG0/DDR2_CA3/DDR2_CA4 /DDR2_CS1 M_A_BG0 14,19 DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip M_A_BG0 K50
CB42 DDR1_BG1/DDR6_CA2/DDR6_CA3 /DDR6_CS0 M_B_BG1 16
/DDR1_CA0 J52 M_B_BG1
DDR0_BA1/DDR1_CA5/DDR1_CA6 M_A_BA1 14,19 DDR1_BG0/DDR6_CA3/DDR6_CA4 /DDR6_CS1 M_B_BG0 16
BV44 M_A_BA1 M_B_BG0
DDR0_BA0/DDR3_CA0/DDR3_CA0 /DDR3_CA6 M_A_BA0 14,19 DDR4/LP4/LP5/LP5 CMD Flip
DDR4/LP4/LP5/LP5 CMD Flip M_A_BA0 AA42
BT53 DDR1_BA1/DDR5_CA5/DDR5_CA6 /DDR5_CA0 M_B_BA1 16
DDR0_ACT#/DDR2_CS1/DDR2_CS0 /DDR2_CA3 M_A_ACT# 14,19 U44 M_B_BA1
DDR1_BA0/DDR7_CA0/DDR7_CA0 /DDR7_CA6 M_B_BA0 16
DDR4/LP4/LP5/LP5 CMD Flip M_A_ACT# M_B_BA0
BV45 N53
DDR0_PAR/DDR3_CS1/DDR3_CS0 /DDR3_CA3 M_A_PARITY 14,19 DDR1_ACT#/DDR6_CS1/DDR6_CS0 /DDR6_CA3 M_B_ACT# 16
M_A_PARITY M_B_ACT#
AU50 U45
DDR0_ALERT# M_A_ALERT# 14,19 DDR1_PAR/DDR7_CS1/DDR7_CS0 /DDR7_CA3 M_B_PARITY 16
AU49 M_A_ALERT# M_B_PARITY
DDR0_VREF_CA +V_D4CH0_CA_VREF 18
AU53
E52 DDR1_ALERT# M_B_ALERT# 16
AU52 M_B_ALERT#
DDR_VTT_CTL
DRAM_RESET#
DV47 DDR_VTT_CTRL 0_VREF_CA需在確認 DDR1_VREF_CA +V_D4CH1_CA_VREF 18
C49 DRAMRST#
DDR_RCOMP
SM_RCOMP_0 1_VREF_CA需在確認
DDR_VTT_CTRL: TGL-UP3

TGL-UP3 System Memory Power Gate Control: 01001-01990500


01001-01990500 Disables the platform memory VTT regulator
Follow SCH VDD2_MEM: 1.2V in C8 and deeper and S3.
Ref: Intel 570805_Coffeelake_EDS_Vol_1_Rev1.5 P.116
LPDDR4X COMPENSATION SIGNALS
+1.2V

R0411 1 2 100Ohm 1% VTT Enable R1.0-02


SM_RCOMP_0 +1.2V +3VS
1

R0402
470Ohm Cost down
1%
SL0402
2

1
1 2
0201 M_A_RESET# 14,16
DRAMRST#

1
R0405 0OHM R0407
DDR_VTT_CTRL 1 2 C0602 300KOhm
U0401 0.1UF/6.3V

2
2
@
1 NC 5
VCC
R0406 @ 0OHM 2 A
1 2 DDR_PG_CTRL_RR 3 Y 4 R0408 0OHM
GND DDR_PG_CTRL 86
1 2

U74AUP1G07G-AL5-R
<Variant Name>
06004-00620000

30,58,59,80 ALL_SYSTEM_PWRGD
R0409 @ 0OHM Title : CPU_DDR4
1 2
[ 建議用料 ] Engineer: EE
1st. : LOGIC U74AUP1G07G-AL5-R 06004-00620000 NB1-RD3EE2

2nd. : LOGIC 74AUP1G07SE-7 SOT353 06004-00051800 Size Project Name Rev

Custom UX482 R0.1

Date: Monday, July 13, 2020 Sheet 4 of 102


U0301J

D22 DK47
CSI_F_DP[1] CNVi_WT_D1P CNV_WT_D1P_PCH 53
B22 DM47
CSI_F_DN[1] CNVi_WT_D1N CNV_WT_D1N_PCH 53
E22 DN49
CSI_F_DP[0] CNVi_WT_D0P CNV_WT_D0P_PCH 53
D20 DR49
CSI_F_DN[0] CNVi_WT_D0N CNV_WT_D0N_PCH 53
A20 DN45
CSI_F_CLK_P CNVi_WT_CLKP CNV_WT_CLKP_PCH 53
B20 DN47
CSI_F_CLK_N CNVi_WT_CLKN CNV_WT_CLKN_PCH 53
@20200528_RF add
B18 DU43
CSI_E_DP[1]/CSI_F_DP[2] CNVi_WR_D1P CNV_WR_D1P_PCH 53
A18 DV43
CSI_E_DN[1]/CSI_F_DN[2] CNVi_WR_D1N CNV_WR_D1N_PCH 53
D18 DR44
CSI_E_DP[0]/CSI_F_DP[3] CNVi_WR_D0P CNV_WR_D0P_PCH 53
E18 DT43
CSI_E_DN[0]/CSI_F_DN[3] CNVi_WR_D0N CNV_WR_D0N_PCH 53
C16 DV44
CSI_E_CLK_P CNVi_WR_CLKP CNV_WR_CLKP_PCH 53
D16 DW44
CSI_E_CLK_N CNVi_WR_CLKN CNV_WR_CLKN_PCH 53

D15 DN51 R0802 1% 150OHM


E15
CSI_C_DP[2] CNVi_WT_RCOMP
CNV_RCOMP 1 2
@20200528_Fllow UX435
CSI_C_DN[2]
A15 DJ13
CSI_C_DP[3] GPP_F3/CNV_RGI_RSP/UART0_CTS# CNV_RGI_RSP_PCH 53
B15 DG13 R0801 22Ohm /CNVi
CSI_C_DN[3] GPP_F2/CNV_RGI_DT/UART0_TXD CNV_RGI_DT_PCH 53
DF15 2 1
GPP_F1/CNV_BRI_RSP/UART0_RXD CNV_BRI_RSP_PCH 53
L18 DF17
CSI_C_DP[1] GPP_F0/CNV_BRI_DT/UART0_RTS# CNV_BRI_DT_PCH 53
N18
CSI_C_DN[1] @20200528_RF add
L20 DJ10
CSI_C_DP[0] GPP_F5/MODEM_CLKREQ /CRF_XTAL_CLKREQ M.2_BT_PCMOUT_CLKREQ0 53
N20 DV15
CSI_C_DN[0] GPP_F6/CNV_PA_BLANKING
G20 DK10
CSI_C_CLK_P GPP_F4/CNV_RF_RESET# M.2_BT_PCMFRM_CRF_RST_N 53
H20
CSI_C_CLK_N

H16
CSI_B_DP[1]
G16
CSI_B_DN[1]
G18
CSI_B_DP[0]
H18
CSI_B_DN[0]
L16
CSI_B_CLK_P
N16
CSI_B_CLK_N

G14
CSI_B_DP[2]
H14
CSI_B_DN[2]
L14
CSI_B_DP[3]
N14
CSI_B_DN[3]

K14
CSI_RCOMP
CSI_RCOMP
DK25
2

GPP_H23/IMGCLKOUT4
DM25
R2011 GPP_H22/IMGCLKOUT3
DN25
150OHM GPP_H21/IMGCLKOUT2
DJ25
1% GPP_H20/IMGCLKOUT1
DR30
GPP_D4/IMGCLKOUT_0/BK4/SBK4
1

TGL-UP3
01001-01990500

www.teknisi-indonesia.com

<Variant Name>

Project Name Rev

UX482 R0.1

Title : CPU_PCH_CSI2,EMMC
Size
Dept.: NB1-RD3EE2 Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 8 of 102
<Variant Name>

Project Name Rev

UX482 R0.1

Title : SKU_Table
Size
Dept.: NB1-RD3EE2 Engineer:
Custom
Date: Monday, July 13, 2020 Sheet 2 of 102
<Core Design>

Title : DDR4_TERMINATION

ASUSTeK COMPUTER INC.


Engineer: EE
Size Project Name Rev
A GX502GX R1.2

Date: Monday, July 13, 2020 Sheet 13 of 102


U0301P U0301Q U0301R

A27 B19 BY44 CY44 DP53 K34


VSS1 VSS67 VSS132 VSS192 VSS246 VSS290
A32 B2 BY45 CY45 DR11 K48
VSS2 VSS68 VSS133 VSS193 VSS247 VSS291
A45 B23 BY47 CY47 DR16 K5
VSS3 VSS69 VSS134 VSS194 VSS248 VSS292
A49 B27 BY49 CY5 DR22 L22
VSS4 VSS70 VSS135 VSS195 VSS249 VSS293
AA41 B32 BY9 D27 DR28 L28
VSS5 VSS71 VSS136 VSS196 VSS250 VSS294
AA48 B36 C13 D32 DR34 L34
VSS6 VSS72 VSS137 VSS197 VSS251 VSS295
AB5 B39 C19 D36 DR40 L39
VSS7 VSS73 VSS138 VSS198 VSS252 VSS296
AB7 B42 C23 D42 DR46 L41
VSS8 VSS74 VSS139 VSS199 VSS253 VSS297
AB8 B48 CA48 D49 DT4 L42
VSS9 VSS75 VSS140 VSS200 VSS254 VSS298
AC44 B52 CB41 D5 DT50 L44
VSS10 VSS76 VSS141 VSS201 VSS255 VSS299
AC49 B8 CC10 DA30 DU11 L45
VSS11 VSS77 VSS142 VSS202 VSS256 VSS300
AD4 BA48 CC3 DA33 DU16 L47
VSS12 VSS78 VSS143 VSS203 VSS257 VSS301
AD48 BA53 CC5 DA53 DU22 L49
VSS13 VSS79 VSS144 VSS204 VSS258 VSS302
AD8 BB4 CD44 DC17 DU28 M1
VSS14 VSS80 VSS145 VSS205 VSS259 VSS303
AF4 BB8 CD48 DD15 DU34 M2
VSS15 VSS81 VSS146 VSS206 VSS260 VSS304
AF8 BC1 CD7 DD24 DU40 M50
VSS16 VSS82 VSS147 VSS207 VSS261 VSS305
AG41 BC2 CE49 DD26 DU46 N22
VSS17 VSS83 VSS148 VSS208 VSS262 VSS306
AG42 BD12 CG48 DD28 DV1 N28
VSS18 VSS84 VSS149 VSS209 VSS263 VSS307
AG44 BD4 CG51 DD31 DV40 N34
VSS19 VSS85 VSS150 VSS210 VSS264 VSS308
AG45 BD48 CG52 DD33 DV52 N39
VSS20 VSS86 VSS151 VSS211 VSS265 VSS309
AG47 BD8 CG9 DD35 DW51 N41
VSS21 VSS87 VSS152 VSS212 VSS266 VSS310
AG48 BF39 CH41 DD39 E13 N48
VSS22 VSS88 VSS153 VSS213 VSS267 VSS311
AG53 BF4 CH42 DD45 E19 P11
VSS23 VSS89 VSS154 VSS214 VSS268 VSS312
AH4 BF41 CH44 DD51 E35 P14
VSS24 VSS90 VSS155 VSS215 VSS269 VSS313
AH8 BF42 CH45 DD52 E48 P16
VSS25 VSS91 VSS156 VSS216 VSS270 VSS314
AK12 BF44 CH47 DE3 G22 P18
VSS26 VSS92 VSS157 VSS217 VSS271 VSS315
AK4 BF45 CJ3 DE5 G28 P20
VSS27 VSS93 VSS158 VSS218 VSS272 VSS316
AK48 BF47 CJ5 DF19 G34 P22
VSS28 VSS94 VSS159 VSS219 VSS273 VSS317
AK5 BF5 CJ9 DF37 G39 P33
VSS29 VSS95 VSS160 VSS220 VSS274 VSS318
AK7 BF7 CK39 DG15 G48 P35
VSS30 VSS96 VSS161 VSS221 VSS275 VSS319
AK8 BF8 CK48 DG21 G51 P4
VSS31 VSS97 VSS162 VSS222 VSS276 VSS320
AM1 BG48 CK53 DG27 G52 P49
VSS32 VSS98 VSS163 VSS223 VSS277 VSS321
AM2 BG53 CL9 DG33 H12 P8
VSS33 VSS99 VSS164 VSS224 VSS278 VSS322
AM4 BH1 CN12 DG39 H22 R39
VSS34 VSS100 VSS165 VSS225 VSS279 VSS323
AM8 BH2 CN48 DG45 H28 R44
VSS35 VSS101 VSS166 VSS226 VSS280 VSS324
AN41 BH4 CN51 DG5 H34 T19
VSS36 VSS102 VSS167 VSS227 VSS281 VSS325
AN42 BH8 CN52 DG53 H8 T29
VSS37 VSS103 VSS168 VSS228 VSS282 VSS326
AN44 BK12 CN9 DG6 J39 T33
VSS38 VSS104 VSS169 VSS229 VSS283 VSS327
AN45 BK4 CP3 DJ1 J49 T4
VSS39 VSS105 VSS170 VSS230 VSS284 VSS328
AN47 BK48 CP41 DJ2 K16 T48
VSS40 VSS106 VSS171 VSS231 VSS285 VSS329
AN48 BK8 CP42 DJ4 K18 T8
VSS41 VSS107 VSS172 VSS232 VSS286 VSS330
AN53 BL49 CP44 DK51 K20 U19
VSS42 VSS108 VSS173 VSS233 VSS287 VSS331
AP4 BM1 CP45 DL3 K22 U25
VSS43 VSS109 VSS174 VSS234 VSS288 VSS332
AP8 BM4 CP5 DL5 K28 U39
VSS44 VSS110 VSS175 VSS235 VSS289 VSS333
AT4 BM41 CR48 DM10 U49
VSS45 VSS111 VSS176 VSS236 VSS334
AT48 BM42 CR53 DM15 V19
VSS46 VSS112 VSS177 VSS237 VSS335
AT51 BM44 CR9 DM21 V4
VSS47 VSS113 VSS178 VSS238 VSS336
AT8 BM45 CT5 DM27 V8
VSS48 VSS114 VSS179 VSS239 VSS337
AV12 BM47 CU4 DM33 W1
VSS49 VSS115 VSS180 VSS240 VSS338
AV39 BM8 CU9 DM39 W16
VSS50 VSS116 VSS181 VSS241 VSS339
AV4 BN48 CV10 DM4 W26
VSS51 VSS117 VSS182 VSS242 VSS340
AV5 BP41 CV48 DM45 W30
VSS52 VSS118 VSS183 VSS243 VSS341
AV7 BP49 CV5 DN1 W39
VSS53 VSS119 VSS184 VSS244 VSS342
AV8 BP5 CV51 DN2 W41
VSS54 VSS120 VSS185 VSS245 VSS343
AW1 BP50 CV52 W42
VSS55 VSS121 VSS186 VSS344
AW2 BP7 CY17 W44
VSS56 VSS122 VSS187 VSS345
AW48 BT44 CY22 W45
VSS57 VSS123 VSS188 VSS346
AY4 BT48 CY35 W47
VSS58 VSS124 VSS189 VSS347
AY41 BU49 CY41 W48
VSS59 VSS125 VSS190 VSS348
AY42 BV3 CY42 Y4
VSS60 VSS126 VSS191 VSS349
AY44 BV48 Y49
VSS61 VSS127 VSS350
AY45 BV5 Y50
VSS62 VSS128 VSS351
AY47 BW10 Y8
VSS63 VSS129 TGL-UP3 VSS352
AY8 BY41
VSS64 VSS130 01001-01990500
AY9 BY42
VSS65 VSS131
B13
VSS66 TGL-UP3
01001-01990500

TGL-UP3
01001-01990500

<Variant Name>

Project Name Rev

UX482 R0.1

Title : CPU_PCH_POEWR,GND
Size
Dept.: NB1-RD3EE2 Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 5 of 102
Main Board
+VCCIO_OUT

U0301T
1
1020

SL0601 U0301S

UX435 follow VC T15 A51


CFG[15] RSVD_TP21 U0301D
2

V17 B51
CFG[14] RSVD_TP22
1KOhm R0603 CFG14 U15
CFG[13] DF53 C53
1KOhm 1 2 R0604 CFG1 K11 C1 RSVD5 RSVD9
CFG[12] RSVD_TP23 T35
1KOhm 1 2 R0605 CFG2 K12 D2 RSVD10
CFG[11] RSVD_TP24 DF52 E53 DV24
1KOhm 1 2 R0606 CFG3 CFG11 K9 RSVD6 RSVD11 RSVD1
CFG[10] CF39 DW47
1KOhm 1 2 R0607 CFG7 CFG10 T17 CP39 RSVD12 RSVD2
CFG[9] RSVD_TP25 DT52 U35 DW49
1KOhm 1 2 R0608 CFG9 CFG9 K7 CU40 PCH_IST_TP[1] RSVD13 RSVD3
CFG[8] RSVD_TP26 DU53 F53 A48
1KOhm 1 2 R0609 CFG10 H7 AK9 PCH_IST_TP[0] RSVD14 RSVD4
CFG[7] RSVD25 B53
1KOhm 1 2 R0610 CFG11 CFG7 K8 RSVD15
CFG[6] DF50 AP9
1 2 CFG14 H9 AH9 RSVD7 RSVD16
CFG[5] RSVD26 DF49 A52 TGL-UP3
E6 RSVD8 RSVD17
CFG[4] 01001-01990500
CFG4 H5 DW6
CFG[3] RSVD27 CY30 BF12
CFG3 E9 DV6 RSVD_TP1 RSVD_TP4
CFG[2] RSVD28 CY15 V21
CFG2 D9 RSVD_TP2 RSVD_TP5
CFG[1] W20
CFG1 E7 DV4 RSVD_TP6
CFG[0] RSVD_TP27 D4 U37
DW3 RSVD_TP3 RSVD_TP7
RSVD_TP28 CD39
B5 RSVD_TP8
CFG_RCOMP A6 U21
CFG_RCOMP DU1 IST_TP[1] RSVD_TP9
RSVD_TP29 A4 CB39
2

U17 DT2 IST_TP[0] RSVD18


CFG[17] RSVD_TP30 BB12
R0602 H11 RSVD_TP10
CFG[16] W37
1% 49.9Ohm DW2 RSVD_TP11
RSVD_TP31 AY12
Y1 DV2 RSVD_TP12
BPM#[3] RSVD_TP32 W38
nbs_r0201_h12_000s M4 RSVD_TP13
BPM#[2] U38
1

AB4 E1 RSVD_TP14
BPM#[1] RSVD_TP33 CY28
Y2 F1 RSVD_TP15
BPM#[0] RSVD_TP34

A3 AB2
RSVD19 RSVD29
B3 TGL-UP3
RSVD20
DR1 01001-01990500
RSVD_TP35
AR2 DR2
TCP0_MBIAS_RCOMP RSVD_TP36
TCP0_MBIAS_RCOMP AL10
RSVD_TP16 @20200629_公版並未接地,follo UX482 但預留0 ohm
2

AM12 DR53
RSVD_TP17 RSVD_TP37
R0611 AH12 DW5
RSVD_TP18 RSVD_TP38
2.2KOHM AJ10
RSVD_TP19
AR1 DV51 R0614 1 0OHM 2 /NA
1% RSVD_TP20 VSS
DW52
TP1
1

BN10 DV53
RSVD21 TP2
BM12 W34
RSVD22 RSVD30
DD13 V35
RSVD23 RSVD31
DF13
RSVD24
D52
SKTOCC#

CFG STRAPS TGL-UP3


01001-01990500

R0613 1 @ 2 1KOhm
CFG7 1 0 NOTE
R0601 1 @ 2 1KOhm
CFG14

R0612 1 2 1KOhm
CFG4 CFG4 DISABLE ENABLE eDP ENABLE

CFG[7]: PEG Training:


— 1 = (default) PEG Train immediately following RESET# de assertion.
— 0 = PEG Wait for BIOS for training.

<Variant Name>

Project Name Rev

UX482 R0.1

Title : ICLU_CPU CFG_R1.0C


Size
Dept.: NB1-RD3EE2 Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 6 of 102
U0301E Main Board

DJ37 DK21
28 SPI_CLK_SPI SPI0_CLK GPP_C0/SMBCLK SMB_CLK 28
DG35 DM19 To SO-DIMM
28 PCH_SPI_DQ3 SPI0_IO3 GPP_C1/SMBDATA SMB_SDA 28
DJ39 DN19
28 PCH_SPI_DQ2 SPI0_IO2 GPP_C2/SMBALERT#
DJ33 GPP_C2
To ROM/TPM 28 SPI_SO_SPI SPI0_MISO
DJ35 DK19
28 SPI_SI_SPI SPI0_MOSI GPP_C3/SML0CLK TBT_SMB_CLK 11 Reserved for TBT Vpro
DF35 DM17
SPI0_CS1# GPP_C4/SML0DATA TBT_SMB_DATA 11
DG37 DN17
28 SPI_CS#0_SPI SPI0_CS0# GPP_C5/SML0ALERT#
DF39 GPP_C5
SPI0_CS2#
DK17
DJ6
GPP_C6/SML1CLK
DJ17
PD_SMB1_CLK 12,28 to PD
GPP_E11/SPI1_CLK/THC0_SPI1_CLK GPP_C7/SML1DATA PD_SMB1_DATA 12,28
DN5 CY50 +3VSUS
GPP_E2/SPI1_IO3/THC0_SPI1_IO3 GPP_B23/SML1ALERT#/PCHHOT# /GSPI1_CS1# UX435
DR9 GPP_B23
GPP_E1/SPI1_IO2/THC0_SPI1_IO2
DM6 DN53
GPP_E12/ SPI1_MISO_IO1/THC0_SPI1_IO1 GPP_A5/ESPI_CLK ESPI_CLK 30 R0709 1 2 2.2KOhm
DK6 DJ53
GPP_E13/ SPI1_MOSI_IO0/THC0_SPI1_IO0 GPP_A3/ESPI_IO3/SUSACK# ESPI_IO3 30 PD_SMB1_CLK
DK8 DH50 R0710 1 2 2.2KOhm
GPP_E10/SPI1_CS#/THC0_SPI1_CS# _SUSPWRDNACK ESPI_IO2 30 To EC
DV11 GPP_A2/ESPI_IO2/SUSWARN# DP50 PD_SMB1_DATA
GPP_E8/SPI1_CS1#/SATA_LED# GPP_A1/ESPI_IO1 ESPI_IO1 30
DW9 DP52 R0712 1 2 2.2KOhm
GPP_E17/THC0_SPI1_INT# GPP_A0/ESPI_IO0 ESPI_IO0 30
DT8 DK52 SMB_CLK
GPP_E6/THC0_SPI1_RST# GPP_A4/ESPI_CS# ESPI_CS# 30
GPP_E6 DL50 R0713 1 2 2.2KOhm
GPP_A6/ESPI_RESET# ESPI_RST# 30
DN15 SMB_SDA
GPP_F11/THC1_SPI2_CLK
DK13 R0705 1 2 2.2KOhm
GPP_F15/ GSXSRESET#/THC1_SPI2_IO3
DM13 TBT_SMB_CLK
GPP_F14/GSXDIN/THC1_SPI2_IO2
DN13 R0706 1 2 2.2KOhm
GPP_F13/GSXSLOAD/THC1_SPI2_IO1
DJ15 TBT_SMB_DATA
GPP_F12/GSXDOUT/THC1_SPI2_IO0 R0711 1 2 100KOhm
DK15
GPP_F16/GSXCLK/THC1_SPI2_CS#
DN10 SPI0_MOSI need 100K pulled up to SPI_SI_SPI
3.3V
GPP_F18/THC1_SPI2_INT#
DV14 VPRO ENABLE STRAP R0707 1 @/VPRO 2 10KOhm
GPP_F17/THC1_SPI2_RST#
GPP_C2
DH3 R0715 1 @ 2 100KOhm
CL_CLK TLS CONFIDENTIALITY
DH4 GPP_E6
CL_DATA LOW: TLS CONFIDENTIALITY DISABLE
DF2
CL_RST# HIGH: TLS CONFIDENTIALITY ENABLE
WEAK INT.PD 20K
Must be pulled up to support
+1.8VSUS
TGL-UP3 Intel AMT with TLS.
01001-01990500
Follow Intel TGL-UP3 CRB

+1.8VSUS

1
R0716
47KOhm

1
R0701

2
4.7KOhm
@
GPP_E6

1
R0714
GPP_C2
20KOhm

1
@
BFX STRAP 1 -BIT1 WEAK INT.PD 20K R0703

2
20KOhm nbs_r0201_h10_000s

@ 1%
+1.8VSUS

2
nbs_r0201_h10_000s

R0702 1 @ 2 4.7KOhm 1%
GPP_C5

CPUNSSC CLOCK FREQ


HIGH:19.2MHZ CLOCK FROM DIVIDER
(DERIVED FROM 38.4MHZ CRYSTAL)
LOW: 38.4MHZ CLOCK FROM DIRECT CRYSTAL (DEFAULT)
WEAK INT.PD 20K

+1.8VSUS

1
R0704
4.7KOhm
@

2
GPP_B23

1
R0708
20KOhm
@

2
nbs_r0201_h10_000s

1%

<Variant Name>

Project Name Rev

UX482 R0.1

Title : CPU_LPC,SPI,SMB,CLINK
Size
Dept.: NB1-RD3EE2 Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 7 of 102
Imax =70A
U0301O

+VCCIN 2800 mils +VCCIN


+1.2V
U0301M

AA39 AF9
VDD2_1 VCCSTG_OUT1 +VCCSTG_OUT
AB40 AF12
VDD2_2 VCCSTG1 +VCCSTG_12 +VCCSTG_OUT +VCCSTG_12
AC39 AD12
A24 G32 VDD2_3 VCCSTG2
VCCIN1 VCCIN66 AD40
A26 H24 VDD2_4
VCCIN2 VCCIN67 AD51 AN10
A29
VCCIN3 VCCIN68
H26
AD52
VDD2_5 VCCSTG_OUT2
AM9
+VCCSTG_OUT Imax = 0.15A
A30 H30 VDD2_6 VCCSTG_OUT3
VCCIN4 VCCIN69 AE39 AG10 R0904 1 2 0Ohm
A33 H32 VDD2_7 VCCSTG_OUT4
VCCIN5 VCCIN70 AF40
A35 J1 VDD2_8
VCCIN6 VCCIN71 AG39 V15
AY39 J2 VDD2_9 VCCIO_OUT +VCCIO_OUT R1.1B add +VCCIO_OUT
VCCIN7 VCCIN72 AH40
B24 K1 VDD2_10 +VCCSTG +VCCSTG_345
VCCIN8 VCCIN73 AJ39 M9
B26 K2 VDD2_11 VCCSTG_OUT_LGC +VCCSTG_OUT_LGC
VCCIN9 VCCIN74 AK40
B29 K24 VDD2_12
VCCIN10 VCCIN75 AK51 BT2
B30 K26 VDD2_13 VCCST1 +1.05V_VCCST
VCCIN11 VCCIN76 AK52 BT1
B33 K30 VDD2_14 VCCST2
VCCIN12 VCCIN77 AL39 BT4 R0905 1 2 0Ohm
B35 K32 VDD2_15 VCCST3
BA10
VCCIN13 VCCIN78
L24
AM40
VDD2_16 PU power rail
VCCIN14 VCCIN79 AN39 BP2
BA40 L26 VDD2_17 VCCSTG3 +VCCSTG_345
VCCIN15 VCCIN80 AP40 BP1
BB39 L30 VDD2_18 VCCSTG4
VCCIN16 VCCIN81 AR39 BP4
BB9 L32 VDD2_19 VCCSTG5 UX435 follow VC
VCCIN17 VCCIN82 AT52
BC10 N24 VDD2_20
VCCIN18 VCCIN83 AU40
BC40 N26 VDD2_21
VCCIN19 VCCIN84 AW40
BD39 N30 VDD2_22
VCCIN20 VCCIN85 AW51
BD9 N32 VDD2_23
VCCIN21 VCCIN86 AW52
BE10 P24 VDD2_24
VCCIN22 VCCIN87 BD51
BE40 P26 VDD2_25
VCCIN23 VCCIN88 BD52
BF9 P28 VDD2_26 +1.05V_VCCST
VCCIN24 VCCIN89 BK51
BG10 P30 VDD2_27
VCCIN25 VCCIN90 BK52
BG40 P32 VDD2_28
VCCIN26 VCCIN91 BV51
BH12 T21 VDD2_29
VCCIN27 VCCIN92 BV52
BH39 T23 VDD2_30
VCCIN28 VCCIN93 CA40

2
BH9 T25 VDD2_31
VCCIN29 VCCIN94 CC40
BJ10 T27 VDD2_32 R0901
BJ40
VCCIN30 VCCIN95
T31
CC49
VDD2_33 SVID DATA 100Ohm
VCCIN31 VCCIN96 CC50
BK39 U23 VDD2_34 nbs_r0201_h12_000s
VCCIN32 VCCIN97 CE40
BL10 U27 VDD2_35
VCCIN33 VCCIN98 CG40

1
BL40 U29 VDD2_36
VCCIN34 VCCIN99 CH39 1%
BM39 U31 VDD2_37
VCCIN35 VCCIN100 CJ40
BN40 U33 VDD2_38
VCCIN36 VCCIN101 CL40 P_SVID_DATA_50OHM_X2 80
BP12 V23 VDD2_39
VCCIN37 VCCIN102 CN40
BP39 V25 VDD2_40
VCCIN38 VCCIN103 CP47
BR10 V27 VDD2_41
VCCIN39 VCCIN104 CR40
BR40 V29 VDD2_42
VCCIN40 VCCIN105 D50
BT12 V31 VDD2_43
VCCIN41 VCCIN106 E51
BT39 V33 VDD2_44
VCCIN42 VCCIN107 F49
BU10 W22 VDD2_45
VCCIN43 VCCIN108 T51 Neil:SVID Topology check ICL PDGR1.31
BU40 W24 VDD2_46
VCCIN44 VCCIN109 T52
BV12 W28 VDD2_47
VCCIN45 VCCIN110
BY12 W32
VCCIN46 VCCIN111
CA10
VCCIN47
CB12 R38 TGL-UP3
VCCIN48 VCCIN_SENSE P_VCCIN_VCCSENSE_50OHM 80
D24 R37 01001-01990500
D26
VCCIN49 VSSIN_SENSE P_VCCIN_VSSSENSE_50OHM 80 SVID CLOCK
VCCIN50
D29 M12
VCCIN51 VIDSOUT
D30 M11 P_SVID_DATA_50OHM_X2
VCCIN52 VIDSCK P_SVID_CLK_50OHM_X2 80
D33 P12 P_SVID_CLK_50OHM_X2
VCCIN53 VIDALERT#
D35 P_SVID_ALERT#_X3
VCCIN54
E24
VCCIN55
E26 Justin : >10 UF should be on power side check PDG 1.2 R.252 0324
VCCIN56
E27
VCCIN57
E29 +1.05V_VCCST
VCCIN58
E30
VCCIN59
E32
VCCIN60
E33 +1.05V_VCCST
VCCIN61

2
G2
VCCIN62 +VCCSTG
G24 +VCCSTG R0902
G26
VCCIN63 SVID ALERT 56Ohm
VCCIN64
G30
1

VCCIN65
1

nbs_r0201_h12_000s
C0922 C0918 C0907

1
C0921
1UF/6.3V 1UF/6.3V 1UF/6.3V
2

TGL-UP3 1UF/6.3V
2

nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s R0903 1 2 0OHM


01001-01990500 nbs_c0201_h14_000s P_SVID_ALERT#_50OHM_X2 80
P_SVID_ALERT#_X3

GND
GND
GND
+VCCIN
+1.2V
1

C0901 C0902 C0903 C0904 C0905 C0906


1

1
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V
2

C0908 C0909 C0910 C0911 C0912 C0913 C0919 C0924


nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

2
nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s
nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s

GND

GND
1

1
C0914 C0915 C0916 C0917 C0925 C0920 C0926 C0923 C0933 C0934 C0935 C0936 C0937
10UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V 1UF/6.3V 10UF/6.3V 1UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

2
nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s
nbs_c0201_h14_000s nbs_c0201_h14_000s
nbs_c0201_h14_000s

GND

teknisi indonesia
+1.2V
1

C0927 C0928
1UF/6.3V 1UF/6.3V C0930 C0929 C0932 C0931
2

nbs_c0201_h14_000s nbs_c0201_h14_000s 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V


2

nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s

<Variant Name>

GND Project Name Rev

UX482 R0.1

Title : CPU_POEWR
Size
Dept.: NB1-RD3EE2 Engineer: EE
D
Date: Monday, July 13, 2020 Sheet 9 of 102
Memory Down Vref Main Board

+1.2V

1
R1815
1.8KOHM M_A_VREFCA
1%

20mil

2
R1814
20mil
R1805
1 2
4 +V_D4CH0_CA_VREF
+V_VREF_CA 1 2
0Ohm
2.7Ohm
nbs_r0603_h24_000s

1
C1803

2
0.022UF/16V C1806 C1807
0.1UF/6.3V 0.1UF/6.3V

1
2
nbs_c0201_h13_000s nbs_c0201_h13_000s

1
R1816
1.8KOHM
+V_VREF_CA_RC 1%

1
R1813 GND GND

2
24.9Ohm
R1.0 Hacken 1219

2
GND GND

High Frequency termina�on,


can absorb any high
frequency noise coming from
CPU/board crosstalk

SO-DIMM1 Vref

+1.2V

2
1% 共用VREF_CA分壓
R1811
R1817 M_B_VREFCA
1KOhm
+V_VREF_CA 2 1
@
0Ohm
20mil 20mil

1
R1809
R1810
1 2
4 +V_D4CH1_CA_VREF
+V_VREF_VD1 2 1
0Ohm
2.2Ohm
nbs_r0603_h24_000s

2
C1802 C1810 C1811
0.022UF/16V 0.1UF/6.3V 0.1UF/6.3V

1
2

2
1% nbs_c0201_h13_000s nbs_c0201_h13_000s
R1812
1KOhm
+V_VREF_RC1

1
R1808 GND GND

1
24.9Ohm

2
GND GND

Project Name
High Frequency termina�on, Rev

can absorb any high GX502GX R1.2


frequency noise coming from
CPU/board crosstalk Title : DIM_CA/DQ Voltage
Size
B
Dept.: ASUSTeK COMPUTER Engineer: EE
Date: Monday, July 13, 2020 Sheet 18 of 102
CPU - VCCIN DECAPS- Underneath the package

+VCCIN

TGL UP3 ICCmax=65A (0402 10uF *12)


1

1
C1011 C1012 C1013 C1014 C1015 C1016 C1017 C1018 C1019 C1020 C1021 C1022 C1023 C1025 C1026 C1027 C1029 C1028 C1030 C1024
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2

2
@20200616_add C1031~36: 15PF for EMI/RF

+VCCIN

TGL IVR decoupling Caps

1
1
1

1
C1036 C1035 C1034 C1033 C1032 C1031
15PF/50V 15PF/50V 15PF/50V 15PF/50V 15PF/50V 15PF/50V

2
2
2

Project Name Rev

UX482 R0.1

Title : CPU_POWER_CAP
Size
C
Dept.: NB1-RD3EE2 Engineer: EE
Date: Monday, July 13, 2020 Sheet 10 of 102
Imax=1port+1CC=3.6A Main Board
+5VSUS +5V_PD
Power Flow Chart
TYPE-C Connector
+PD_VBUS_CH +PD_VBUS

220PF/50V

220PF/50V
GND
SL1201 1 2 SHORT_LAND
OVP for type C input Port A +TBTA_VBUS_CON +TBTA_VBUS_CON
PA_VBUSx
0805 移除SL1201、SL1202讓power更完整? (9KTS1693EVB-TR)
@
+5V_PD Type C Connector
+5V_PD
SL1202 1 2 SHORT_LAND
PP_5V
PD J1201
0805 (TPS65994AD) A1 B1
GND1 GND4

C1213

C1214
@ A2 B2
SSTXp1 SSTXp2

1
C1201 TBT0_TX_P0_C1 A3 B3 TBT0_TX_P1_C1
SSTXn1 SSTXn2

1
PB_VBUSx TBT0_TX_N0_C1 A4 B4 TBT0_TX_N1_C1
VBUS1 VBUS4
22UF/6.3V A5 B5
VSYS Type C Connector CC1 CC2

2
TBTA_CC1_C A6 B6 TBTA_CC2_C
Dp1 Dp2

2
1

1
@ C1210 C1204 C1208 USB_C_U2_PP3 A7 B7 USB_C_U2_PP3
U1201 Dn1 Dn2
+3VSUS +3VA_EC 100UF/6.3V USB_C_U2_PN3 A8 B8 USB_C_U2_PN3
10UF/25V 10UF/25V SBU1 SBU2
GND A7 G5 TBTA_SBU1_C A9 B9 TBTA_SBU2_C
PP5V_1 PA_CC1 +PD_VBUS_CH_R VBUS2 VBUS3

2
B7 H5 TBTA_CC1 A10 B10
PP5V_2 PA_CC2 SSRXn2 SSRXn1
R1235 0Ohm C7 TBTA_CC2 +PD_VBUS_CH TBT0_TXRX_N1_C1 A11 B11 TBT0_TXRX_N0_C1
PP5V_3 SSRXp2 SSRXp1
1 2 D7 TBT0_TXRX_P1_C1 A12 B12 TBT0_TXRX_P0_C1
PP5V_4 GND3 GND2
R1232 0Ohm GND E7
PP5V_5
+VCC3V3_FLASH_A 1 @ 2 F7 H8 1 3
PP5V_6 PA_VBUS3 NP_NC1 P_GND1

1
C1206 G7 G8 2 4
PP5V_7 PA_VBUS2 Slave Chager NP_NC2 P_GND2

1
10UF/6.3V H7 F8 C1202 5
R1216 1 2 2.2KOhm
PP5V_8 PA_VBUS1
10UF/25V C1209 (ISL9238BHRTZ-T) P_GND3
6
P_GND4

2
R1223 1 2 2.2KOhm SC_I2C3_SCL H4 E8 @ 4.7UF/25V 7
VIN_3V3 PA_GATE_VBUS P_GND5

2
R1221 1 2 10KOhm SC_I2C3_DAT PA_GATE_VBUS 8
P_GND6
R1220 1 2 2.2KOhm SC_I2C3_IRQ# A4 +PD_VBUS_CH_R
PA_GATE_VSYS
R1217 1 2 2.2KOhm PCH_I2C2_SCL_X GND PA_GATE_SYS GND GND USB_CON_24P
R1212 1 2 10KOhm PCH_I2C2_SDA_X G4 A3
PCH_I2C1_IRQ# ADCIN1 G3
ADCIN1 VSYS 12013-00175600
ADCIN2
R1226 1 2 0Ohm ADCIN2 B4 GND GND
NC1

1
@ Check with TGL VC with DPIN R3420 1 2 10KOhm C1
GND GPIO0
R3421 1 2 10KOhm GPIO0_HPDB G1 C1227 C1215 C1226 C1212
GPIO1
R1239 1 @ 2 0Ohm GPIO1_HPDA A6 D8 10UF/25V 10UF/25V 10UF/25V 10UF/25V
11 RT0_PESETN GPIO2 GND1

2
GND TBT_BB_RESET#_X1 H6
R1240 1 2 0Ohm RT1_PESETN B3
GPIO3 Port A Dual N MOS
11 TBT_PORT0_EN GPIO4 PD_VBUS_TBT connect to power PAGE(OVP)
TBT_TCP0_3V3_EN_X1 C2 A8 GND GND GND GND
GPIO5 GND2
R3412 1 2 0OHM TBT_PORT1_EN F6 B8
11,23,30 TBT_FORCE_PWR GPIO6 GND3
+VCC3V3_FLASH_A R1241 1 2 0Ohm TBT_FORCE_PWR_PD G6 C8 +PD_VBUS +TBTA_VBUS_CON
GPIO7 GND4
FLT#_PD1 R3422 1 2 10KOhm PDA_GPIO7 B6
GND GPIO8 Q1207 Q1205
R1214 1 2 2.2KOhm R3461 1 @ 2 0OHM PDA_GPIO8 C6 +PD_VBUS_CH_R +PD_VBUS_CH
23 H_PROCHOT_D#_R GPIO9
QM3126M3 QM3126M3
1

R1209 1 2 2.2KOhm EC_I2C1_SCL C1217 PROCHOT_PD GND


R1248 1 2 10KOhm EC_I2C1_SDA 0.01UF/50V B5 3 L1205 1 2 120Ohm
Follow TGL RVP NC2

S
EC_I2C1_IRQ# E1 A5 2 5 3

D
I2C_EC_SCL NC3
2

EC_I2C1_SCL F1 1 5 2 L1206 1 2 120Ohm


Connect to EC I2C_EC_SDA

1
EC_I2C1_SDA D1 1 C1219

G
I2C_EC_IRQ#

1
EC_I2C1_IRQ# C1233 150PF/50V L1207 1 2 120Ohm

4
GND 150PF/50V @

2
E2 @
I2C2s_SCL

2
PCH_I2C2_SCL_X D2
Connect to PCH PCH_I2C2_SDA_X F2
I2C2s_SDA
H3
I2C2s_IRQ# LDO_3V3
+LDOA_3V3 +VCC3V3_FLASH_A

1
PCH_I2C1_IRQ#
H1 D1202

1
LDO_1V5_1
R3426 1 2 0OHM A2 G2 R1233 R1234 AZ4024-01F
11 TBT_I2C_SCL I2C3m_SCL LDO_1V5_2
R3428 1 2 0OHM SC_I2C3_SCL A1 SL1203 @ 0Ohm 0Ohm 07024-01190100
11 TBT_I2C_SDA I2C3m_SDA1
SC_I2C3_DAT B2 H2 1 2
Connect to I2C ROM & BB I2C3m_SDA2 GND5

2
R3423 1 2 0OHM B1 0402

2
11 TBT_I2C_INT# I2C3m_IRQ#

1
SC_I2C3_IRQ# C1203 SHORT_LAND C1205
10UF/6.3V 10UF/6.3V PA_GATE_SYS PA_GATE_VBUS
SN2001021YBGR
+LDOA_1V5 @ GND

2
I2C Default Slave Address -> 0x42 @20200623_將3VSUS改+3VA_DSW
GND GND

+3VA_DSW
+LDOA_3V3 +LDOA_3V3

1
C1207
10UF/6.3V +TBTA_VBUS_CON Close to typeC connector
R1237
@

2
@ @ R1229 1 2 10KOhm 100KOhm
1

R1250 R1251 TBT_BB_RESET#_X1 1 2 GND


1KOhm 1KOhm GND
R1 1% R1 1% R1236 1 2 10KOhm R1238 1 2 10KOhm

1
TBT_PORT0_EN @ C1228 C1220 C1221 C1222 C1223
2

C1224 C1211 C1225


4.7UF/25V 0.01UF/50V 0.01UF/50V 0.01UF/50V 0.01UF/50V

teknisi indonesia
10UF/25V 10UF/25V 10UF/25V
@20200623_將3VSUS 改+3VA_DSW 並R1231 不上件 @ @ @
@

2
ADCIN2 ADCIN1
1

+3VA_DSW
R1249 R1205
1KOhm 1KOhm GND
R2 1% R2 1% GND
RT0_PESETN
2

RT1_PESETN
@20200623_將R1242改不上件
1

R1231
GND GND R1242
100KOhm
1

R1230 /X
/X
100KOhm +VCC3V3_FLASH_A from PCH
2

100KOhm 靠近U1201,避免分支

RN1203B @
2

3 4
From EC

1
0OHM
R1211
TBT_PORT1_EN GND 21 USB_PN3
GND & 0Ohm USB_C_U2_PN3

2
90Ohm/100Mhz
Slave Charger
R1243
R1244

To PD

2
L1204

3
2
21 USB_PP3
1 2 USB_C_U2_PP3
0OHM
2
2

R1210 1 2 0Ohm R1213 1 2 0Ohm


28,30,93 SMB3_DAT
EC_I2C1_SDA_R EC_I2C1_SDA RN1203A @
6 1
Q1201A
EM6K1-G-T2R
10Ohm
10Ohm

確認是否需要 R1239 & AND Gate schematic擇一

5
R1219 1 2 0Ohm R1215 1 2 0Ohm
28,30,93 SMB3_CLK
EC_I2C1_SCL_R EC_I2C1_SCL
3 4
Q1201B
EM6K1-G-T2R

2
+3VA_DSW
R1222 1 2 0Ohm R1218 1 2 0Ohm
16
17
18
19
20
21
22
23
24
25

30 PD_INT1#
U1202 @ @ 6 1 EC_I2C1_IRQ#_R EC_I2C1_IRQ#
GND R1246 1 2 R1258 1 2 0Ohm Q1202A
27 SLP_S5#
D2
D1
GND3

GND4
GND5
GND6
GND7
GND8

0Ohm EM6K1-G-T2R D1201 D1209


N.C.1
N.C.2

N/A U1204 2 1 2 1
27,30,58 DPWROK_EC R1255 1 2 1 B 5 TBT0_TX_P0_C1 USB_C_U2_PP3
VCC
15 1 0Ohm ESD101_B1_02ELS ESD101_B1_02ELS
From TBT BB 11 TCP0_SBU1
14
SBU1 C_SBU1
2 TBTA_SBU1_C
To Connector 2 A N/A +3VS D1210
11 TCP0_SBU2 SBU2 C_SBU2
13 3 TBTA_SBU2_C TBT_BB_RESET#_X1 2 1 D1211
GND2 VBIAS
12 4 3 4 TBT0_TX_N0_C1 2 1
CC1 C_CC1 GND RT0_PESETN 11
RPD_G1
RPD_G2

TBTA_CC1 11 5 TBTA_CC1_C Y ESD101_B1_02ELS USB_C_U2_PN3


From PD

1
CC2 C_CC2
VPWR
FLT#
GND1

TBTA_CC2 TBTA_CC2_C TC7SZ08FU R1224 D1205 ESD101_B1_02ELS


1

06G004600803 0Ohm 2 1

1
C1238 TBT0_TXRX_P0_C1
GND TPD6S300RUKR 0.1UF/50V C1257 ESD101_B1_02ELS

2
9
8
7
6

2
10

R1257 @ 0Ohm 10PF/50V D1206


FW from PCH or APU update I2C ROM to PD
2
+LDOA_3V3 1 2 2 1
R1252 1 0Ohm 2 TBT0_TXRX_N0_C1 GND

5
R1253 1 0Ohm 2 GND ESD101_B1_02ELS
GND 4 3 R1225 1 2 0Ohm D1207
7,28 PD_SMB1_DATA
PCH_I2C2_SDA_R PCH_I2C2_SDA_X 2 1
0Ohm
0Ohm

GND GND
2
2

Q1202B TBT0_TX_N1_C1
R1254 1 2 100KOhm RPD_Gx: EM6K1-G-T2R ESD101_B1_02ELS

2
Short to C_CCx if dead battery resistors are needed. D1208
Short to GND if dead battery resistors are not needed.
目前設計 不論是否要支援dead battery都要接到CC PIN 1 6 R1227 1 2 0Ohm 2 1
7,28 PD_SMB1_CLK
R1245
R1247
1

@ @ PCH_I2C2_SCL_R PCH_I2C2_SCL_X TBT0_TX_P1_C1


1
1

C1239 Q1203A ESD101_B1_02ELS


2.2uF/10V FLT#_PD1 EM6K1-G-T2R D1203

5
2

2 1
4 3 R1228 1 2 0Ohm TBT0_TXRX_N1_C1
27 PD_SMB_INT#
PCH_I2C1_IRQ#_R PCH_I2C1_IRQ# ESD101_B1_02ELS
GND Q1203B D1204
EM6K1-G-T2R 2 1
GND TBT0_TXRX_P1_C1
ESD101_B1_02ELS

GND

+3VA +3VA UX435 若由PD跳壓 不需要


PD SINK connect 11 TCP0_TX_P0_RT R1265 1 2 2.2Ohm C1218 1 2 0.22UF/25V
R1266 1 2 2.2Ohm TCP0_TX_P0_RT_CMF TBT0_TX_P0 C1234 1 2 0.22UF/25V TBT0_TX_P0_C
TBT0_TX_P0_C1
SR驗證OK 可拿掉 11 TCP0_TX_N0_RT
R1267 1 2 2.2Ohm TCP0_TX_N0_RT_CMF TBT0_TX_N0 C1235 1 2 0.22UF/25V TBT0_TX_N0_C1
11 TCP0_TX_P1_RT
R1268 1 2 2.2Ohm TCP0_TX_P1_RT_CMF TBT0_TX_P1 C1236 1 2 0.22UF/25V TBT0_TX_P1_C1
11 TCP0_TX_N1_RT
1

TCP0_TX_N1_RT_CMF TBT0_TX_N1 TBT0_TX_N1_C1


R1260 C1237 1 2 0.33UF/25V
I2C ROM
1

100KOhm R1269 1 2 2.2Ohm C1240 0.33UF/25V


11 TCP0_TXRX_P0_RT TBT0_TXRX_P0 1 2 TBT0_TXRX_P0_C1
R1259 R1270 1 2 2.2Ohm TCP0_TXRX_P0_RT_CMF C1241 0.33UF/25V
11 TCP0_TXRX_N0_RT TBT0_TXRX_N0 1 2 TBT0_TXRX_N0_C1
2

1 2 2.2Ohm TCP0_TXRX_N0_RT_CMF +VCC3V3_FLASH_A +VCC3V3_FLASH_A


100KOhm 11 TCP0_TXRX_P1_RT R1271 TBT0_TXRX_P1 C1242 1 2 0.33UF/25V TBT0_TXRX_P1_C1
PS_ON_PD 88
R1272 1 2 2.2Ohm TCP0_TXRX_P1_RT_CMF U1203
11 TCP0_TXRX_N1_RT TBT0_TXRX_N1 TBT0_TXRX_N1_C1
2

TCP0_TXRX_N1_RT_CMF R1208 1 @ 2 10KOhm R1201 1 2 10KOhm 1 8


A0 VCC
R1202 1 @ 2 10KOhm A0 R1203 1 2 10KOhm A0 2 7
1
6

A1 WP
1

EM6K1-G-T2R R1206 1 @ 2 10KOhm A1 R1207 1 2 10KOhm A1 3 6 WP

1
R1274 A2 SCL
2 Q1204A R1276 R1275 R1273 A2 A2 4 5 SC_I2C3_SCL R1204
GND SDA
220KOhm 220KOhm 220KOhm SC_I2C3_DAT 10KOhm
220KOhm
1
1

1
1

1
CAT24C512WI-GT3 1% C1216
2
2

R1262
2

R1264 R1263 R1261 GND

2
220KOhm 220KOhm 220KOhm 0.1UF/6.3V
220KOhm

2
2
2

2
2

GND
3

EM6K1-G-T2R TCP0_TX_P0_RT_CMF TBT0_TX_P0 GND GND GND


5 Q1204B TCP0_TX_N0_RT_CMF TBT0_TX_N0 GND GND GND
GND
PDA_GPIO7
4

TCP0_TX_P1_RT_CMF TBT0_TX_P1
TCP0_TX_N1_RT_CMF TBT0_TX_N1 GND GND GND
GND

GND

TCP0_TXRX_P0_RT_CMF TBT0_TXRX_P0
TCP0_TXRX_N0_RT_CMF TBT0_TXRX_N0
Project Name Rev
TCP0_TXRX_P1_RT_CMF TBT0_TXRX_P1
TCP0_TXRX_N1_RT_CMF TBT0_TXRX_N1 DesignIP R2.0a

Title : TBT_TPS65993AD&Type C
Size
Custom
Dept.: Engineer:
ASUSTeK COMPUTER INC. NB1 EE4
Date: Monday, July 13, 2020 Sheet 12 of 102
<Variant Name>

Title : DDR4_ON-BOARD_A2

NB1-RD3EE2
Engineer: EE
Size Project Name Rev
Custom UX482 R0.1

Date: Monday, July 13, 2020 Sheet 15 of 102


Main Board
SODIMM CHB-DIMM0 M_B_DQ[63:0] 4
Change C1601 to monut & same with C4016
TOP H4.0mm STD (J1601) @20190219A
Imax=1.2V/1.48A 4,14 M_A_RESET#
M_A_RESET#
Imax=0.6/0.5A

2
J1601A +1.2V +VTT +2.5V +3VS C1601 /X/EMI
137 8 0.1UF/16V

1
4 M_B_CLK_DDR0 CK0_T DQ0
139 7 M_B_DQ41
4 M_B_CLK_DDR#0
138
CK0_C DQ1
20 M_B_DQ40 J1601B
Imax=3.3V/0.003A Imax=2.5V/0.144A
4 M_B_CLK_DDR1 CK1_T DQ2
140 21 M_B_DQ46 163 258
4 M_B_CLK_DDR#1 CK1_C DQ3
4 M_B_DQ45
5 160
VDD19 VTT
DQ4 VDD18
109 3 M_B_DQ42 159 GND
4 M_B_CKE0 CKE0 DQ5 VDD17
110 16 M_B_DQ43 154 259
4 M_B_CKE1 CKE1 DQ6 VDD16 VPP2
17 M_B_DQ47 153 257
DQ7 VDD15 VPP1
149 28 M_B_DQ44 148
4
4
M_B_CS#0
M_B_CS#1
157
S0*
S1*
DQ8
DQ9
29 M_B_DQ32 147
VDD14
VDD13
@20200619_依照公版修改SA2=0/ SA1=1/ SA0=0
41 M_B_DQ35 142
DQ10 VDD12
155 42 M_B_DQ39 141 R1602 +3VS +3VS +3VS
4 M_B_ODT0
161
ODT0 DQ11
24 M_B_DQ38
4 136
VDD11
255 0Ohm
4 M_B_ODT1 ODT1 DQ12 VDD10 VDDSPD
25 M_B_DQ34 135 VDDSPD_+3VS 1 2
DQ13 VDD9

1
115 38 M_B_DQ33 130 C1603

2
4 M_B_BG0 BG0 DQ14 VDD8

2
113 37 M_B_DQ36 129 C1617 2.2uF/10V /@ N/A /@
4 M_B_BG1 BG1 DQ15 VDD7
150 50 M_B_DQ37 124 0.1UF/6.3V R1603 R1604 R1605

1
4 M_B_BA0 BA0 DQ16 VDD6

2
145 49 M_B_DQ51 123 nbs_c0201_h13_000s 0Ohm 0Ohm 0Ohm
4
4 M_B_BA1
M_B_A[13:0]
BA1 DQ17
DQ18
62 M_B_DQ48 118
VDD5
VDD4
2.2uF*1
63
144
A0 DQ19
M_B_DQ55 117
VDD3
GND GND
0.1uF*1 SPD ADDRESS FOR CHANNEL-B

1
M_B_A0 133 46 M_B_DQ53 112
M_B_A1 132
A1 DQ20
45 M_B_DQ50
6 111
VDD2
M_B_SA2
WRITE ADDRESS: 0XA4
READ ADDRESS: 0XA5
A2 DQ21 VDD1
M_B_A2 131 58 M_B_DQ49 M_B_SA1 SA0 = 0; SA1 = 1; SA2 = 0
A3 DQ22
M_B_A3 128 59 M_B_DQ54 M_B_SA0
A4 DQ23
M_B_A4 126 70 M_B_DQ52 263
A5 DQ24 NP_NC1
M_B_A5 127 71 M_B_DQ62 264
A6 DQ25 NP_NC2

2
M_B_A6 122 83 M_B_DQ63 N/A /@ N/A
A7 DQ26
M_B_A7 125 84 M_B_DQ57 261 R1606 R1607 R1608
M_B_A8 121
A8 DQ27
66 M_B_DQ58
7 MT1
262
A9 DQ28 MT2 0Ohm 0Ohm 0Ohm
M_B_A9 146 67 M_B_DQ56
A10_AP DQ29
M_B_A10 120 79 M_B_DQ59 251 252
A11 DQ30 VSS1 VSS48

1
M_B_A11 119 80 M_B_DQ61 247 248
A12 DQ31 VSS2 VSS49
M_B_A12 158 174 M_B_DQ60 243 244
A13 DQ32 VSS3 VSS50
M_B_A13 151 173 M_B_DQ8 239 238
+1.2V 4 M_B_WE# A14_WE* DQ33 VSS4 VSS51
156 187 M_B_DQ11 235 234 GND GND GND
4 M_B_CAS# A15_CAS* DQ34 VSS5 VSS52
152 186 M_B_DQ12 231 230
4 M_B_RAS# A16_RAS* DQ35
170 M_B_DQ13
1 227
VSS6 VSS53
226
2

DQ36 VSS7 VSS54


169 M_B_DQ10 223 222
DQ37 VSS8 VSS55
114 183 M_B_DQ9 217 218
R1609 4 M_B_ACT# ACT* DQ38 VSS9 VSS56
M_B_VREFCA 182 M_B_DQ14 213 214
240Ohm DQ39 VSS10 VSS57
143 195 M_B_DQ15 209 210
4 M_B_PARITY PARITY DQ40 VSS11 VSS58
116 194 M_B_DQ2 205 206
1

4 M_B_ALERT# ALERT* DQ41 VSS12 VSS59


134 207 M_B_DQ0 201 202
EVENT* DQ42 VSS13 VSS60
M_B_EVENT# 108 208 M_B_DQ7 197 196 +2.5V
M_A_RESET#
RESET* DQ43
191 M_B_DQ4
0 193
VSS14 VSS61
192 +VTT
DQ44 VSS15 VSS62
164 190 M_B_DQ1 189 188
VREFCA DQ45 VSS16 VSS63
203 M_B_DQ3 185 184
DQ46 VSS17 VSS64
1

1
254 204 181 180

1
C1612 M_B_DQ5 N/A N/A
2

2
28 M_B_SMB_DAT SDA DQ47 VSS18 VSS65

1
C1616 2.2uF/10V 253 216 M_B_DQ6 175 176 C1635 C1636 C1637 C1638 C1639 C1640

2
28 M_B_SMB_CLK SCL DQ48 VSS19 VSS66
0.1UF/6.3V @ 215 M_B_DQ25 171 172 C1641 C1642 C1606 10UF/6.3V 180PF/50V 1UF/6.3V 1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V
1

1
DQ49 VSS20 VSS67

2
2

2
nbs_c0201_h13_000s 166 228 M_B_DQ28 167 168 0.1UF/6.3V nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h13_000s nbs_c0201_h13_000s
3 10UF/6.3V 4.7UF/6.3V

1
SA2 DQ50 VSS21 VSS68

2
260 229 107 106 nbs_c0402_h28_000s
M_B_SA2 M_B_DQ27 N/A nbs_c0201_h13_000s
SA1 DQ51 VSS22 VSS69
GND GND M_B_SA1 256 211 M_B_DQ31 103 102 N/A
SA0 DQ52 VSS23 VSS70
M_B_SA0 212 M_B_DQ24 99 98 GND GND GND
DQ53 VSS24 VSS71
224 M_B_DQ26 93 94 GND GND GND GND GND GND
DQ54 VSS25 VSS72
225 M_B_DQ29 89 90
DQ55 VSS26 VSS73
92 237 M_B_DQ30 85 86
91
CB0_NC
CB1_NC
DQ56
DQ57
236 M_B_DQ19 81
VSS27
VSS28
VSS74
VSS75
82 10uF*1-->unmount 10uF*1-->unmount
101 249 77 78
105
CB2_NC DQ58
250
M_B_DQ17
M_B_DQ18
2 73
VSS29 VSS76
72
0.1uF*1 1uF*2-->*1 unmount
CB3_NC DQ59 VSS30 VSS77
+1.2V 88
CB4_NC DQ60
232 M_B_DQ20 69
VSS31 VSS78
68 4.7uF*1 0.1uF*2
87 233 M_B_DQ21 65 64
100
CB5_NC
CB6_NC
DQ61
DQ62
245 M_B_DQ23 61
VSS32
VSS33
VSS79
VSS80
60 180pF*1
104 246 M_B_DQ22 57 56
CB7_NC DQ63 VSS34 VSS81
M_B_DQ16 51 52
M_B_DQS[7:0] 4 VSS35 VSS82
12 13 47 48
DM0*/DBI0* DQS0_T VSS36 VSS83
33 34 M_B_DQS5 43 44
DM1*/DBI1* DQS1_T VSS37 VSS84
54 55 M_B_DQS4 39 40
DM2*/DBI2* DQS2_T VSS38 VSS85
75 76 M_B_DQS6 35 36 +1.2V
DM3*/DBI3* DQS3_T VSS39 VSS86
GX502pull-H 1.2V 178
199
DM4*/DBI4* DQS4_T
179
200
M_B_DQS7
M_B_DQS1
31
27
VSS40 VSS87
30
26 100uF*2
DM5*/DBI5* DQS5_T VSS41 VSS88
220 221 23 22
241
DM6*/DBI6* DQS6_T
242
M_B_DQS0
M_B_DQS3 19
VSS42 VSS89
18
22uF*2
DM7*/DBI7* DQS7_T VSS43 VSS90
0.1uF*10

1
96 97 M_B_DQS2 15 14
DM8*/DBI8* DQS8_T VSS44 VSS91
9 10 C1602 C1620
DQS0_C
11
M_B_DQS#[7:0] 4
5
VSS45
VSS46
VSS92
VSS93
6 100UF/6.3V 100UF/6.3V 180pF*1

2
DQS1_C
32
53
M_B_DQS#5
M_B_DQS#4
1
VSS47 VSS94
2
1uF*3-->unmount
DQS2_C
74 M_B_DQS#6 DDR4_DIMM_260P
DQS3_C
177 M_B_DQS#7 GND
DQS4_C
198 M_B_DQS#1
DQS5_C
219 M_B_DQS#0 GND GND
DQS6_C
240

1
For ECC M_B_DQS#3

2
DQS7_C
95 M_B_DQS#2 C1643 C1644 C1645 C1646 C1647 C1648 C1649 C1650
DQS8_C
@ T1601 1 162 22UF/6.3V 22UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V
SO-DIMMs that do not support ECC (x64 only)

1
S2*/C0

2
@ T1602 1 M_B_DIMM0_S2 165 nbs_c0201_h13_000s
nbs_c0201_h13_000s
nbs_c0201_h13_000s
nbs_c0201_h13_000s
nbs_c0201_h13_000s
nbs_c0201_h13_000s
S3*/C1 will use the SPD with EVENT# not wired.
M_B_DIMM0_S3 SO-DIMMs that support ECC (x72) will use a
DDR4_DIMM_260P GND GND GND GND GND GND GND GND
combined SPD/Thermal Sensor with EVENT#
wired. Follow FP6 CRB CAP number
@20190701A

1
/@ /@ /@

2
EVENT# ON ECC DIMM: KEEP A PULL UP IF NO PIN IN PCH C1604 C1605 C1607 C1608 C1609 C1610 C1613 C1614
0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 180PF/50V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
nbs_c0201_h13_000s
nbs_c0201_h13_000s
nbs_c0201_h13_000s
nbs_c0201_h13_000s nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h14_000s

GND GND GND GND GND GND GND GND

<Variant Name>

Title : DDR4_ON-BOARD_A1

NB1-RD3EE2
Engineer: EE
Size Project Name Rev
Custom UX482 R0.1

Date: Monday, July 13, 2020 Sheet 16 of 102


Main Board
+1.05V_VCCST

2
R2301 U0301U

1KOhm
+1.05V_VCCST DCI supported +VCCSTG

1
M7 K4
CATERR# PROC_TRST#

1
CATERR# BK9 B9 XDP_TRST_CPU#
30 PECI_EC PECI PROC_TMS R2304
R2307 PECI_EC E2 D12 XDP_TMS_CPU
PROCHOT# PROC_TDO
1 2 H_PROCHOT_D# M5 A12 XDP_TDO_CPU 1KOhm Stall reset sequence after PCU PLL
THRMTRIP# PROC_TDI
1KOhm THERMTRIP# B6 XDP_TDI_CPU lock until de-asserted:
PROC_TCK 1 = (Default) Normal

2
CT39 XDP_TCLK_CPU Operation; No stall.
PROC_POPIRCOMP
PROC_POPIRCOMP CB9 D8 0 = Stall.
PCH_OPIRCOMP PCH_JTAGX CPU_EAR
PCH_OPIRCOMP CW12 A9 XDP_TCLK_CPU
TP3 PCH_TMS

1
CM39 E12 XDP_TMS_CPU
TP4 PCH_TDO R2310
B12 XDP_TDO_CPU
PCH_TDI
1 T2301 DF4 A7 XDP_TDI_CPU 1KOhm
DBG_PMODE PCH_TCK
DBG_PMODE H4 @
11,12,30 TBT_FORCE_PWR PCH_TRST#

2
1 0OHM 2 DB42
2

R2302 XDP_TRST_CPU#
GPP_B4/CPU_GP3
R2313 R2312 TBT_FORCE_PWR_CPU DB41 C11
78 HDMI_HDP_EN_dGPU# GPP_B3/CPU_GP2 PROC_PREQ#
DF8 D11
49.9Ohm 49.9Ohm GPP_E7/CPU_GP1 PROC_PRDY#
1% 1% DU5
GPP_E3/CPU_GP0 +VCCSTG_OUT_LGC
nbs_r0201_h12_000s
nbs_r0201_h12_000s G1
EAR_N/EAR_N_TEST_NCTF
1

DF31 CPU_EAR
GPP_H2
GPP_H2 DV32 DT15
GPP_H1 GPP_F7
GPP_H1 DW32 DR15
GPP_H0 GPP_F9
GPP_H0 DT14 R2303 1 2 51Ohm
GPP_F10
DJ27 XDP_TDO_CPU nbs_r0402_h16_000s
GPP_H19/TIME_SYNC0

R2306 1 2 51Ohm
XDP_TCLK_CPU nbs_r0402_h16_000s
TGL-UP3
01001-01990500

+3VSUS

CPU SIDEBAND SIGNALS +VCCSTG_OUT_LGC BFX STRAP 3 -BIT4 WEAK INT.PD 20K
R2309 1 @ 2 4.7KOhm
GPP_H2
BFX STRAP 2 -BIT3 WEAK INT.PD 20K
1

R2305 R2311 1 @ 2 4.7KOhm and page5 GPP_C5


1KOhm GPP_H1
BFX STRAP 1 -BIT2 WEAK INT.PD 20K
R2314 1 @ 2 4.7KOhm
2

2 1 SL2301 +3VA_EC GPP_H0


THRO_CPU# 30 OD
R2308 1 2 499Ohm 2 0201 1 SL2302 +5VS OD 4-BIT BOOT STRAP CONFIGURATION ENCODINGS:
IMVP9_VRHOT# 80
H_PROCHOT_D# H_PROCHOT_D#_R 2 0201 1 SL2303 +5VS 0100 = BIOS ON ESPI PERIPHERAL CHANNEL; CSME ON MASTER ATTACHED SPI
0201 PWRLIMIT#_CPU 89 OD 1100 = BIOS ON ESPI PERIPHERAL CHANNEL; CSME ON SLAVE ATTACHED SPI.
H_PROCHOT_D#_R 12 1000 = SLAVE ATTACHED FLASH CONFIGURATION (BIOS/CSME ON ESPI ATTACHED DEVICE).
OD 0000 = MASTER ATTACHED FLASH CONFIGURATION (BIOS/CSME ON SPI).
OTHERS: RESERVED

<Variant Name>

Project Name Rev

UX482 R0.1

Title : CPU_MISC,JTAG,CLK
Size
Dept.: NB1-RD3EE2 Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 23 of 102
<Variant Name>

Title : DDR4_ON-BOARD_A2

NB1-RD3EE2
Engineer: EE
Size Project Name Rev
Custom UX482 R0.1

Date: Monday, July 13, 2020 Sheet 17 of 102


+VTT N501
+1.2V

4,14 M_A_A[13:0]
C1914

1
@ R1902
C1902 C1903 N/A 2 1
M_A_CLK_DDR0 4,14
10UF/6.3V 10UF/6.3V MLCC/+/-10% 0.01UF/6.3V DIMM_CLOCK_TERM_B 1 2

1
36Ohm R1907 36Ohm
nbs_c0402_h28_000s nbs_c0402_h28_000s
M_A_A8 1 2 /@ C1901
36Ohm R1905 原11G231210415030 0.1UF/6.3V/0201 1.5PF/25V Change to 0201 @20181122B

2
M_A_A11 1 2 改11202-0119F000 0.01UF/6.3V/0201 R1903
GND GND Modified by TG 20180629
36Ohm R1924
M_A_CLK_DDR#0 4,14
M_A_A13 36Ohm 1 2 R1908 1 2
M_A_A1 36Ohm 1 2 R1915 36Ohm
M_A_A7 1 2
C1905

2
0.1UF/10V
@ nbs_c0201_h13_000s

1
36Ohm R1928
M_A_A3 36Ohm 1 2 R1909
4,14 M_A_CKE0
1 2 GND

N501 36Ohm R1913 Clock Pull up power change from +0.6V to +1.2V (CFL PDG) 20820601
4,14 M_A_ODT0
36Ohm 1 2 R1901
4,14 M_A_BG1
36Ohm 1 2 R1911
4,14 M_A_ACT#
36Ohm 1 2 R1958
4,14 M_A_PARITY
1 2
+VTT
36Ohm R1929
M_A_A5 1 2

1
R1926 36Ohm C1928 C1929 C1930 C1931 C1932 C1933 C1934 C1935
4,14 M_A_CS#0
1 2 10uF*4 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
M_A_A0
R1916
1 2
36Ohm
1uF*16 nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h14_000s

R1921 36Ohm
M_A_A2 1 2
R1927 36Ohm GND
M_A_A4 1 2
R1925 36Ohm
M_A_A6 1 2 Close U1401 Close U1402 Close U1403 Close U1404
R1955 36Ohm
M_A_A9 1 2
R1923 36Ohm
M_A_A10 1 2
R1938 36Ohm
M_A_A12 1 2 +VTT
R1922 36Ohm
4,14 M_A_WE#
M_A_WE# 1 2
R1918 36Ohm
4,14 M_A_CAS#
M_A_CAS# 1 2

1
R1906 36Ohm
4,14 M_A_RAS#
M_A_RAS# 1 2 C1936 C1937 C1938 C1939 C1940 C1941 C1942 C1943
R1919 36Ohm 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
4,14 M_A_BA0
M_A_BA0 1 2 nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h14_000s
nbs_c0201_h14_000s
R1920 36Ohm
4,14 M_A_BA1
M_A_BA1 1 2
R1917 36Ohm
4,14 M_A_BG0
M_A_BG0 1 2 GND
C1912

2 1 @
Close U1405 Close U1407 Close U1408 Close U1409
0.1UF/10V

nbs_c0201_h13_000s
GND
+VTT

@20200603_Follow GX502 +1.2V

1
R1904 1 2 49.9OHM
4,14 M_A_ALERT#
C1904 C1906 C1907 C1908
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V

2
nbs_c0402_h28_000s nbs_c0402_h28_000s nbs_c0402_h28_000s nbs_c0402_h28_000s
2017/12/20 Changed by Jason

GND

<Variant Name>

Project Name Rev

UX482 R0.1

Title : DDR4_CA_DQ_VOLTAGE
Size
Custom
Dept.: NB1-RD3EE2 Engineer: EE
Date: Monday, July 13, 2020 Sheet 19 of 102
Main Board
20GBPS TBT LINK PORT 0 Retimer Power +3V_RT0
MAX 0.75W
U1101D U1101B
From CPU
TBT PORTS To CONN
C1115 1 2 2.2UF/6.3V L2
VCC3P3_ANA VCC3P3_SX
E6
C1105 2 1 220NF/6.3V J1 J12 nbs_c0201_h15_000s RT0_3.3V_ANA
3 TCP0_TX_P0 ASSRXp1 BSSRXp1 TCP0_TXRX_P0_RT 12
C1101 2 1 220NF/6.3V TCP0_TX_P0_C J2 J11 E5 M4 +3V_RT0_A
3 TCP0_TX_N0 ASSRXn1 BSSRXn1 TCP0_TXRX_N0_RT 12 +3V_LC_RT0 VCC3P3_LC VCC3P3_SVR1
TCP0_TX_N0_C M5
VCC3P3_SVR2
C1103 2 1 220NF/6.3V G1 G12 F6
3 TCP0_TXRX_P0 ASSTXp1 BSSTXp1 TCP0_TX_P0_RT 12 +0.9V_RT0 VCC0P9_SVR_ANA1
C1102 2 1 220NF/6.3V TCP0_TXRX_P0_C G2 G11 G6 J7
3 TCP0_TXRX_N0 TCP0_TX_N0_RT 12

1
ASSTXn1 BSSTXn1 VCC0P9_SVR_ANA2 VCC3P3A
TCP0_TXRX_N0_C C1116 +3V_RT0_A

Port B - TypeC Side


C1106 2 1 220NF/6.3V C1 C12 E3 L1

Port A - Host Side


3 TCP0_TX_P1 ASSRXp2 BSSRXp2 TCP0_TXRX_P1_RT 12 2.2UF/6.3V VCC0P9_SVR1 SVR_IND1
C1104 2 1 220NF/6.3V TCP0_TX_P1_C C2 C11 G3 M1 +0.9V_RT0_PHASE

2
3 TCP0_TX_N1 ASSRXn2 BSSRXn2 TCP0_TXRX_N1_RT 12 nbs_c0201_h15_000s VCC0P9_SVR2 SVR_IND2

Power
TCP0_TX_N1_C
C1108 2 1 220NF/6.3V E1 E12 E9 M2
3 TCP0_TXRX_P1 ASSTXp2 BSSTXp2 TCP0_TX_P1_RT 12 VCC0P9_SVR_PB_ANA1 SVR_VSS1
C1107 2 1 220NF/6.3V TCP0_TXRX_P1_C E2 E11 G9 M3 NC_J5
3 TCP0_TXRX_N1 ASSTXn2 BSSTXn2 TCP0_TX_N1_RT 12 VCC0P9_SVR_PB_ANA2 SVR_VSS2
TCP0_TXRX_N1_C Connect to ++3V_RT0 for DBR
M7 M10 R1113 1 0OHM 2 J3
3 TBT_LSX0_TXD PA_LSTX_SBU1 BSBU1 TCP0_SBU1 12 VCC0P9_LC
L7 L10 A_BSBU1 R1120 1 0OHM 2 RT0_0.9V_LC
3 TBT_LSX0_RXD PA_LSRX_SBU2 BSBU2 TCP0_SBU2 12
A_BSBU2 L6 J5 @1 T1102
VCC0P9_LVR NC_J5
L8 RT0_0.9V_LVR M6 J6 PW_VCC3v3_P1_A

1
3 TCP0_AUXP

1
PA_AUX_P VCC0P9_LVR_SENSE NC_J6
M8
3 TCP0_AUXN PA_AUX_N C1112 C1113 C1114
2.2UF/6.3V 2.2UF/6.3V 10UF/6.3V
BURNSIDEBRIDGE_JHL8040R_A1 @20200702 follow Gu503 預留

2
nbs_c0201_h15_000s nbs_c0201_h15_000s
06118-00060400
BURNSIDEBRIDGE_JHL8040R_A1
06118-00060400

MISC Justin: SMBUS for Vpro Decoupling [Inductor colay footprint] R1.0B
1st source : 09016-00122200
@20200623_Add R1121 & R1122 :0 ohm 不上件 +0.9V_RT0
I2C connect to PD network 2nd source : 09016-00121400
U1101A

C6 C9 L1102
EE_DI I2C_SCL TBT_I2C_SCL 12 SVR max current 0.75A
RT0_DI B4 E7 1 2
EE_DO I2C_SDA TBT_I2C_SDA 12
FLASH

RT0_DO B6 A10 +0.9V_RT0_PHASE


EE_CS_N I2C_INT TBT_I2C_INT# 12
RT0_CSN C7 B10 0.68UH
EE_CLK FORCE_PWR TBT_FORCE_PWR 12,23,30
RT0_CLK A9
FLASH_BUSY_N
+3V_LC_RT0

1
B9

POC GPIO
TBT_FLASH_BUSY# C1123 C1124

2
POC_GPIO_5
A8 RT0_GPIO5 22UF/6.3V 22UF/6.3V C1117 C1120 C1118 C1119 C1121 C1122 C1125
POC_GPIO_6
R1101 1 2 10KOhm A3 B8 RT0_GPIO6 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 18PF/25V

1
TDI PERST_N TBT_PERST# 27

2
2

2
MISC & R1121 1 0OHM 2 /X
DEBUG
R1102 1 2 10KOhm RT0_TDI C3 A7 nbs_c0603_h39_000s nbs_c0603_h39_000s nbs_c0201_h15_000s nbs_c0201_h15_000s nbs_c0201_h15_000s nbs_c0201_h15_000s nbs_c0201_h15_000s nbs_c0201_h15_000s
TMS SMBUS_SCL TBT_SMB_CLK 7 nbs_c0201_h13_000s
R1103 1 2 10KOhm RT0_TMS B5 B7 R1122 1 0OHM 2 /X
UX435 TCK SMBUS_SDA TBT_SMB_DATA 7
JTAG

R1104 1 2 10KOhm RT0_TCK C5 A4


TDO POC_GPIO_10
+3V_RT0 RT0_TDO A5 RT0_FLSH_SHARE_EN
Justin : A0 chip issue workaround
POC_GPIO_11
POC_GPIO_12
A6 RT0_FLSH_MSTR_SLV @20200702 follow Gu503 預留
L3
NC_L3
R1115 1 @ 2 10KOhm M11 +3V_RT0 +3V_RT0_A +3V_RT0
T1101 THERMDA Justin : From PD
RT0_TCK 1
M12 R1125 1 2 0Ohm
TEST_EDM
B2 /no TBT_Wake
FUSE_VQPS_64
L11
RESET_N RT0_PESETN 12
A11
MONDC

1
1

1
A12 L9 C1133 C1132 C1131 C1130

2
NC_A12 XTAL_25_IN
DEBUG

Main

L12 M9 RT0_XTAL_IN C1127 C1126 22UF/6.3V 22UF/6.3V 2.2UF/6.3V 2.2UF/6.3V


MONDC_SVR XTAL_25_OUT
RT0_XTAL_OUT 2.2UF/6.3V 18PF/25V nbs_c0603_h39_000s nbs_c0603_h39_000s nbs_c0201_h15_000s nbs_c0201_h15_000s

1
2

2
2

2
B3 L5 nbs_c0201_h15_000s
TEST_PWR_GOOD RSENSE nbs_c0201_h13_000s
RT0_TPD B11 L4 RT0_RSENSE R1106 1 0.5% 2 4.75KOHM
TEST_EN RBIAS
RT0_RBIAS
A1
ATEST_P Justin : 0.5%
A2
ATEST_N

BURNSIDEBRIDGE_JHL8040R_A1
06118-00060400
@20200611_C1110 & C1111 將18PF改22PCF

PU/PD +3VS Flash ROM 25Mhz Xtal U1101C

+3VA_DSW +3V_RT_FLASH C1110


L1103 B1 F12
VSS_ANA1 VSS_ANA9
D1102 1 2 B12 G7
Justin : S0 indicator VSS_ANA2 VSS_ANA13
R1116 1 2 10KOhm 1 RT0_XTAL_IN RT0_XTAL_IN_C 1
NA 2
22PF/25V D1 H1
VSS_ANA3 VSS_ANA14
RT0_GPIO6 3 120Ohm/100Mhz D2 H2

1
VSS_ANA6 VSS_ANA17
+3VA_DSW
GND
2 D11 H11
VSS_ANA4 VSS_ANA15
D12 H12
VSS_ANA5 VSS_ANA16
R1119 1 2 10KOhm BAT54ATB +3V_RT_FLASH X1101
2 F1 J9
VSS_ANA7 VSS_ANA18
TBT_FLASH_BUSY# 25MHZ F2 K1
+3V_RT0 07009-00027200 4 F7
VSS_ANA10 VSS_ANA19
K2
VSS_ANA11 VSS_ANA22
@20200527_改EN選擇,因沒有第2port改不上件 F9 K11
C1111 VSS_ANA12 VSS_ANA20
L1104 F11 K12

3
VSS_ANA8 VSS_ANA21
@ R1107 2.2KOhm 1 2

VSS1
VSS2
VSS3
R1112 1 2 10KOhm RT0_CSN R1108 2 1 2.2KOhm RT0_XTAL_OUT RT0_XTAL_OUT_C 1
NA 2
22PF/25V
RT0_FLSH_SHARE_EN RT0_DO R1109 12 2
1 3.32KOhm 120Ohm/100Mhz
1 @ 2 1 2
R1117 10KOhm Justin : Master RT0_WP# R1110 3.32KOhm BURNSIDEBRIDGE_JHL8040R_A1

F3
F5
G5
RT0_FLSH_MSTR_SLV +3V_RT_FLASH RT0_HOLD# Neil:xtal meet intel spec 06118-00060400
R1105 1% 100Ohm nbs_r0201_h12_000s External onboard capacitors follow CRB
RT0_TPD 1 2 1st source : 07009-00027200
R1111 1 2 10KOhm 2nd source : 07009-00027500
RT0_GPIO5
R1118 1 2 10KOhm
RT0_FLSH_SHARE_EN 1
C1109
20200527
2.2UF/6.3V
2

R1114 1 2 10KOhm U1102 nbs_c0201_h15_000s


TBT_FORCE_PWR 1 8
CS# VCC
RT0_CSN 2 7
DO(IO1) HOLD#/RESET(IO3)
RT0_DO 3 6 RT0_HOLD#
WP#(IO2) CLK
RT0_WP# 4 5 RT0_CLK
Justin : used NVM shared mode
GND DI(IO0)
RT0_DI @20200702 follow Gu503 預留
W25Q80DVSNIG

NVM mode SHARE_EN MSTR_SLV


+3V_RT0
Master 1 1 +3V_RT0LDO

Slave 1 0
No shared 0 N/A R1123 1 2 0Ohm
/no TBT_Wake
Check which power solution should be used +3VA_DSW
@20200702 follow Gu503 預留
R1124 1 2 0Ohm
+3V_RT0LDO 1 2 +3VA_DSW /@/TBT_Wake
R1132 75Ohm

1
1 2 C1134
R1131 75Ohm 10UF/6.3V
@

2
Imax=2A U1103
R1133 1 2 0Ohm 1 6 GND
VOUT VIN
+VCC3V3_SX_LDOX1 2 5
GND ILIM
12 TBT_PORT0_EN R1129 1 2 0Ohm 3 4
EN/FLAG# DSG
BB_TCP0_LS_R_EN System support Wake +VCC3V3_SX
NCT3527U power connection to +3VADSW
1
1

C1153 R1136
1

2.2UF/6.3V 10KOhm C1128


C1129 1UF/6.3V
4.7UF/6.3V
2
2

GND GND GND GND Project Name Rev


GND
UX482 R0.1

Title : Intel Titan-Ridge


Size
C
Dept.: NB1-RD3EE2 Engineer: EE
Date: Monday, July 13, 2020 Sheet 11 of 102
U0301G

HD Audio
DR38 DW15
GPP_R0/HDA_BCLK/I2S0_SCLK GPP_F8_I2S_MCLK2_INOUT
ACZ_BCLK_AUD_X1 DU37 DW24
GPP_R1/HDA_SYNC/I2S0_SFRM GPP_D19/I2S_MCLK1
ACZ_SYNC_AUD_X1 DT37
GPP_R2/HDA_SDO/I2S0_TXD
ACZ_SDOUT_AUD_X1 DV37 DG41
36 ACZ_SDIN0_AUD GPP_R3/HDA_SDI0/I2S0_RXD GPP_A23/I2S1_SCLK
DT38
GPP_R7/I2S1_SFRM
DV41 DV38
GPP_R4/HDA_RST# GPP_R6/I2S1_TXD
ACZ_RST#_AUD_X1 DL53 DW38
R2007 1 2 33Ohm GPP_A7/I2S2_SCLK/DMIC_CLK_A0 GPP_R5/HDA_SDI1/I2S1_RXD
36 ACZ_BCLK_AUD DG51
R2002 1 2 33Ohm ACZ_BCLK_AUD_X1 /DMIC_DATA_0 GPP_A8/I2S2_SFRM/CNV_RF_RESET#
36 ACZ_SYNC_AUD DG50 DN31
R2004 1 2 33Ohm ACZ_SYNC_AUD_X1 45 EDP_OD# GPP_A10/I2S2_RXD/DMIC_DATA1 GPP_S6/SNDW3_CLK/DMIC_CLK_A0
36 ACZ_SDOUT_AUD DM31
ACZ_SDOUT_AUD_X1 GPP_S7/SNDW3_DATA/DMIC_DATA0
DL49
1 2 33Ohm 53 WLAN_ON# /DMIC_CLK_A1 GPP_A9/I2S2_TXD/MODEM_CLKREQ/CRF_XTAL_CLKREQ
DL52 DK33
ACZ_RST#_AUD ACZ_RST#_AUD_X1 GPP_A11/PMC_I2C_SDA/I2S3_SCLK GPP_S4/SNDW2_CLK/DMIC_CLK_A1
R2003
1.8V @20200528_add RF CNVi DK31
GPP_S5/SNDW2_DATA/DMIC_DATA1
DH49
53 BT_ON_PCH /DMIC_CLK_B0 GPP_A13/PMC_I2C_SCL/I2S3_TXD
DW35
GPP_S2/SNDW1_CLK/DMIC_CLK_B0
1.8V DF33 DV35
200Ohm 2 1 R2006 SNDW_RCOMP GPP_S3/SNDW1_DATA/DMIC_CLK_B1
SNDW_RCOMP DT32
GPP_S0/SNDW0_CLK
DR35
GPP_S1/SNDW0_DATA
GND

ACZ_OP_SD 37
Q2002A TGL-UP3
EM6K1-G-T2R 01001-01990500
Power: +VCCPGPPR
6

2
ACZ_RST#_AUD
1

@20200630_因layout走線問題將Q2001B改新的一顆Q2002A

GND

FLASH DESCRIPTOR STRAP VCCHDA=+1.8VSUS @20200612_add C2001 for CRB


+VCCHDA close to the PCH ball

+VCCHDA

1
R2005
HDA_SDO ICL SDOUT VIL<0.45V 2.2KOhm
0=SECURITY MEASURES not override

1
C2001
1=Override
2
0.1UF/6.3V

2
ACZ_SDOUT_AUD_X1

ACZ_SDOUT:(1)ICL PCH: Internal PD 20k ohm,


1

VIL=0.25*VCC, VIH=0.75*VCC
(2) ALC3288:VIL<0.4*DVDD_IO, VIH>0.6*DVDD_IO 330Ohm
R2001
2

EM6K1-G-T2R
6

Q2001A
2
30 PCH_SPI_OV
1

ACZ_SDOUT is a signal used for Flash


Descriptor security Override/ME debug mode
HIGH : get overrideen, LOW : disable override
GND

Intel: To enable Flash Descriptor Security Override, this


signal should be pulled up to VCCHDA through a 1
KΩ to 2.2 KΩ ±5% resistor.

www.teknisi-indonesia.com

<Variant Name>

Project Name Rev

UX482 R0.1

Title : CPU_PCH_AUDIO,SDIO,SDXC
Size
D
Dept.: NB1-RD3EE2 Engineer: EE
Date: Monday, July 13, 2020 Sheet 20 of 102
<Variant Name>

Project Name Rev

UX482 R0.1

Title : Test Point


Size
Dept.: NB1-RD3EE2 Engineer: EE
B
Date: Monday, July 13, 2020 Sheet 29 of 102
TGL-UP3 PCIEx4
GEN4
DGPU
52 U3_U3RXDN1 U0301H
PCIE1_RXN/USB31_1_RXN
CV1
52 U3_U3RXDP1 PCIE1_RXP/USB31_1_RXP
CV2
J3802 USB3.1 Gen1 Type-A Port1 52 U3_U3TXDN1
DA7
PCIE1_TXN/USB31_1_TXN
52 U3_U3TXDP1 PCIE1_TXP/USB31_1_TXP
DA8
Right connector 52 U3_U3RXDN2 PCIE2_RXN/USB31_2_RXN
70 PCIEG_RXP8
/VGA
/VGA
0.22UF/6.3V
0.22UF/6.3V
1
1
2
2
C2108
C2107 PCIENB_TXP8
P5
P7
PCIE4_TX_P[3] PCIE4_TX_P[1]
V5
V7 PCIENB_TXP6
C2104
C2103
2
2
1
1
0.22UF/6.3V
0.22UF/6.3V
/VGA
/VGA
PCIEG_RXP6 70
70 PCIEG_RXN8 PCIE4_TX_N[3] PCIE4_TX_N[1] PCIEG_RXN6 70
CT4 PCIENB_TXN8 N1 T1 PCIENB_TXN6
52 U3_U3RXDP2 PCIE2_RXP/USB31_2_RXP 70 PCIENB_RXP8 PCIE4_RX_P[3] PCIE4_RX_P[1] PCIENB_RXP6 70
J3803 USB3.1 Gen1 Type-A Port2 52 U3_U3TXDN2
CU3
PCIE2_TXN/USB31_2_TXN RSVD_BSCAN 70 PCIENB_RXN8
N2
PCIE4_RX_N[3] PCIE4_RX_N[1]
T2
PCIENB_RXN6 70
CW7 E3
52 U3_U3TXDP2 PCIE2_TXP/USB31_2_TXP
CW8 R2115 1 1% 2 113Ohm /VGA 0.22UF/6.3V 1 2 C2106 T5 Y5 C2102 2 1 0.22UF/6.3V /VGA
USB2_COMP 70 PCIEG_RXP7 PCIE4_TX_P[2] PCIE4_TX_P[0] PCIEG_RXP5 70
DE1 USBCOMP R2117 1 2 0OHM /VGA 0.22UF/6.3V 1 2 C2105 PCIENB_TXP7 T7 Y7 PCIENB_TXP5 C2101 2 1 0.22UF/6.3V /VGA
38 U3_U3RXDN3 PCIE3_RXN/USB31_3_RXN USB_ID 70 PCIEG_RXN7 PCIE4_TX_N[2] PCIE4_TX_N[0] PCIEG_RXN5 70
CT1 DF1 USB2_ID R2118 1 2 10KOhm PCIENB_TXN7 R1 V1 PCIENB_TXN5
38 U3_U3RXDP3 PCIE3_RXP/USB31_3_RXP USB_VBUSSENSE 70 PCIENB_RXP7 PCIE4_RX_P[2] PCIE4_RX_P[0] PCIENB_RXP5 70
J3803 USB3.1 Gen1 Type-A Port3 38 U3_U3TXDN3
CT2
PCIE3_TXN/USB31_3_TXN
DC12 USB2_VBUSSENSE
70 PCIENB_RXN7
R2
PCIE4_RX_N[2] PCIE4_RX_N[0]
V2
PCIENB_RXN5 70
CU7
38 U3_U3TXDP3 PCIE3_TXP/USB31_3_TXP PCIE_RCOMP_N
Le� connector CU8
PCIE_RCOMP_P
DT9
DV9
PCIE_RCOMPN
PCIE_RCOMPP
R2116 1 1% 2 100Ohm
PCIE4_RCOMP_P
Y12
V12 PCIE4_RCOMPP R2101 1 1% 2 2.2KOHM
33 PCIE_LAN_RXN4 PCIE4_RXN/USB31_4_RXN PCIE4_RCOMP_N
CN4 10G211100017010 PCIE4_RCOMPN
33 PCIE_LAN_RXP4 PCIE4_RXP/USB31_4_RXP GPP_H12/M2_SKT2_CFG0
CN5 DR32 PCIE RCOMP 100 OHM 1% 10G211220117030
LAN 33 PCIE_LAN_TXN4
CR7
PCIE4_TXN/USB31_4_TXN GPP_H13/M2_SKT2_CFG1
DT31 PCIE4 RCOMP 2.2k OHM 1%
33 PCIE_LAN_TXP4 PCIE4_TXP/USB31_4_TXP GPP_H14/M2_SKT2_CFG2 TGL-UP3
CR8 DK29
@20200528_0.1uF 在P33 RF線路 GPP_H15/M2_SKT2_CFG3 01001-01990500
DN29
40 PCIE5_RXN_NGFF2_L0 PCIE5_RXN
CN1 1 T2101 @
40 PCIE5_RXP_NGFF2_L0 PCIE5_RXP GPP_E4/DEVSLP0
CN2 DG8 SATA1_DEVSLP
40 PCIE5_TXN_NGFF2_L0 PCIE5_TXN GPP_E5/DEVSLP1 SATA2_DEVSLP 41
CJ7 DN6
40 PCIE5_TXP_NGFF2_L0 PCIE5_TXP
CJ8 100KOhm R2119
GPP_A16/USB_OC3#/I2S4_SFRM
DJ45 USB_OC3# 100KOhm 2 1 R2120
40 PCIE6_RXN_NGFF2_L1 PCIE6_RXN GPP_E9/USB_OC0# +3VSUS
CL3 DD8 USB_OC0# 2 1
40 PCIE6_RXP_NGFF2_L1 PCIE6_RXP
CL4 SSD_DET1 41
40 PCIE6_TXN_NGFF2_L1 PCIE6_TXN
GPP_A12/SATAXPCIE1/SATAGP1
/I2S3_SFRM T2102 @
@20200611_R2103改不上電解漏電
CG7 DF41 1
40 PCIE6_TXP_NGFF2_L1 PCIE6_TXP GPP_E0/SATAXPCIE0/SATAGP0
CG8 DP4 SSD_DET0
M.2 PCIE x4
(PCIE Only) 40 PCIE7_RXN_NGFF2_L2 PCIE7_RXN USB2N_1 USB2_DN 35
PE_DET
40 PCIE7_RXP_NGFF2_L2
CK2
PCIE7_RXP USB2P_1
DC9
USB2_DP 35 N-KEY SATA General Purpose
CK1 DC11
40 PCIE7_TXN_NGFF2_L2 PCIE7_TXN
CD8
40 PCIE7_TXP_NGFF2_L2 PCIE7_TXP USB2N_2
CD9 DA4
USB2P_2
DA5 +3VSUS
40 PCIE8_RXN_NGFF2_L3 PCIE8_RXN
CK4
40 PCIE8_RXP_NGFF2_L3 PCIE8_RXP USB2N_3 USB_PN3 12
40 PCIE8_TXN_NGFF2_L3
CK5
PCIE8_TXN USB2P_3
DB3
USB_PP3 12 USB TypeC
CB7 DB4 R2103 /X 10KOhm
40 PCIE8_TXP_NGFF2_L3 PCIE8_TXP
CB8 SSD_DET1 1 2
USB2N_4 USB_PN4 38
DC7
41 PCIE9_RXN_NGFF1_L3
CG4
PCIE9_RXN USB2P_4
DC8
USB_PP4 38 USB Port3
41 PCIE9_RXP_NGFF1_L3 PCIE9_RXP
CG5
41 PCIE9_TXN_NGFF1_L3 PCIE9_TXN USB2N_5 USB_PN5 52
41 PCIE9_TXP_NGFF1_L3
BY8
PCIE9_TXP USB2P_5
DA11
USB_PP5 52 USB Port1
BY7 DA12

41 PCIE10_RXN_NGFF1_L2 PCIE10_RXN USB2N_6 USB_PN6 52


M.2 PCIE x4 41 PCIE10_RXP_NGFF1_L2
CG1 DA2 USB Port2
PCIE10_RXP USB2P_6 USB_PP6 52
(PCIE & SATA) CG2 DA1
41 PCIE10_TXN_NGFF1_L2 PCIE10_TXN
BV8
41 PCIE10_TXP_NGFF1_L2 PCIE10_TXP USB2N_7
BV7 DD2
USB2P_7
DD1
41 PCIE11_RXN_NGFF1_L1 PCIE11_RXN/SATA0_RXN
CF3
Auto PCIE/SATA DET 41 PCIE11_RXP_NGFF1_L1 PCIE11_RXP/SATA0_RXP USB2N_8
CF4 DA9
41 PCIE11_TXN_NGFF1_L1 PCIE11_TXN/SATA0_TXN USB2P_8
BV9 CW9
41 PCIE11_TXP_NGFF1_L1 PCIE11_TXP/SATA0_TXP
BT9
USB2N_9
DD4
41 PCIE12_RXN_NGFF1_L0 PCIE12_RXN/SATA1_RXN USB2P_9
CE1 DD5
41 PCIE12_RXP_NGFF1_L0 PCIE12_RXP/SATA1_RXP
CE2 USB_P10_M.2_BT_DN 53
41 PCIE12_TXN_NGFF1_L0 PCIE12_TXN/SATA1_TXN USB2N_10
41 PCIE12_TXP_NGFF1_L0
BT8
PCIE12_TXP/SATA1_TXP USB2P_10
CY3
USB_P10_M.2_BT_DP 53
BT
BT7 CV4

U0301I
01001-01990500

PCIE USAGE
PCI-E* X1 DEFAULT/OPTION Co-lay Clock

N/A
PCIE 1

PCIE 2
N/A USB 2.0 USB 3.0
N/A 1 IO Type A USB3_1
PCIE 3
USB 3.1 Port (IO)
N/A 2 USB3_2
PCIE 4
N/A 3 TypeC port0 USB3_3
PCIE 5
N/A 4 TypeC port1 USB3_4
PCIE 6
N/A 5 Camera
PCIE 7/SATA 0
N/A 6 Card Reader
PCIE 8/SATA 1A
N/A 7
PCIE 9
8
PCIE 10
N/A TCSS (CPU)
N/A 9 TCP0
MB TypeC port0
PCIE 11/SATA 0
N/A 10 TCP1
PCIE 12/SATA 1A
MB TypeC port1
PCIE SSD TCP2
PCIE 13
PCIE SSD TCP3
PCIE 14
PCIE SSD
PCIE 15/SATA 1B
PCIE SSD SATA SSD
PCIE 16/SATA 2

<Variant Name>

Project Name Rev

UX482 R0.1

Title : CPU_PCH_PCIE,USB,SATA
Size
Dept.: NB1-RD3EE2 Engineer: EE
D
Date: Monday, July 13, 2020 Sheet 21 of 102
TGL-UP3

1%
R2202 60.4Ohm
GND XCLK_BIASREF
1 2 XCLK_BIASREF DJ5
70 GPU_PCIE_CLKN CLKOUT_PCIE_N0
DGPU 70 CN8
CLKOUT_PCIE_P0
GPU_PCIE_CLKP
CN7

CLKOUT_PCIE_N1 SRTCRST#
GFX
33 PCIE_LAN_CLKN
LAN BY3 DK37 SRTC_RST#
33 PCIE_LAN_CLKP CLKOUT_PCIE_P1 RTCRST#
BY4 DN37 RTC_RST#

CLKOUT_PCIE_N2 RTCX1
CB5 DR47 RTC_X1
CLKOUT_PCIE_P2 RTCX2
CB4 DT47 RTC_X2

CLKOUT_PCIE_N3 GPD8/SUSCLK SUS_CLK 40,41,53


CL8 DW41 SUS_CLK
CLKOUT_PCIE_P3
CL7
XTAL_IN
DL1 XTAL_38M_IN
40 CLK4_PCIE_NGFF2# CLKOUT_PCIE_N4 XTAL_OUT
M.2 SSD Port2 40 CLK4_PCIE_NGFF2
BW5
CLKOUT_PCIE_P4
DM1 XTAL_38M_OUT
BW4 CLKREQ0_PEGA# 70
GPP_D5/SRCCLKREQ0#
DW30
GPP_D6/SRCCLKREQ1# CLKREQ1_LAN# 33
DV30
CLKOUT_PCIE_N5 GPP_D7/SRCCLKREQ2#
CB1 DT30
CLKOUT_PCIE_P5 GPP_D8/SRCCLKREQ3#
CB2 DT24 CLKREQ4_NGFF2# 40
GPP_H10/SRCCLKREQ4#
DG25 CLKREQ4_NGFF2#
41 CLK6_PCIE_NGFF1# CLKOUT_PCIE_N6 GPP_H11/SRCCLKREQ5#
M.2 SSD Port1 41 CLK6_PCIE_NGFF1
BW2 DF23 CLKREQ6_NGFF1# 41
BW1
CLKOUT_PCIE_P6 GPP_F19/SRCCLKREQ6#
DU14 CLKREQ6_NGFF1# @20200702_add RTC ba�ery

U0301K
01001-01990500 RTC Power +3VA RTC battery
Sam:
CLKOUT_PCIE_P/N [6:4, 2:1] = Support up to PCIe Gen3
CLKOUT_PCIE_P/N [3, 0] = Support up to PCIe Gen4

@20200630_XTAL change 07009-00111800 & 15PF for UX482 @20200630_將C2201& C2202 Change 10PF for UX482 R1.1

1
SL2203

3060
+3VS
RTC XTAL 32.768KHz XTAL 38.4MHz

2
1 2 C2201 /@
R2201 10KOhm L2201 0Ohm
CLKREQ0_PEGA# SRC0 C2205
1 2 R2220
R2205 0Ohm XTAL_38M_IN 1 2 XTAL_38M_IN_C 1 2
R2203 1 N/A 2 10KOhm 2 1 RTC_X1_C 1 2 RTC_X1
SRC1 120Ohm/100Mhz

1
CLKREQ1_LAN# GND 10PF/50V

1
1
15PF/50V R2204

1
32.768KHZ R2214 C2209
R2211 1 2 10KOhm R2207 38.4MHZ
SRC2
2
200KOhm 45.3KOhm 10PF/50V
X2201

2
CLKREQ4_NGFF2# 10MOhm 1% X2202
nbs_r0201_h12_000s /@

2
4

1
07009-00111800 5%
SRC3

2
C2202 /@
L2202 0Ohm

3
C2206
1 2 R2221 GND GND
R2208 1 2 10KOhm R2206 0Ohm XTAL_38M_OUT 1 2 XTAL_38M_OUT_C 1 2 +VCC_RTC
CLKREQ6_NGFF1# SRC4 2 1 RTC_X2_C 1 2 RTC_X2
GND
120Ohm/100Mhz
07009-00131300 10PF/50V
GND +RTCBAT
15PF/50V
1st:07009-00112500 Neil:xtal meet intel spec
2nd:07009-00113600 External onboard capacitors follow CRB D2202
SRC5 External onboard capacitors follow DG suggest
Typical values for C1 and C2 are 18 pF, based on crystal load of 12.5 pF 2 /@
3 R2213 10KOhm
1 +RTC_BAT 1 2

BAV70_L
/@ /@
BAT2201

3
SIDE1
1
+3VA 1

1
@20200611_R2209 & R2210 由27K改20K for CRB 2
2
C2210 C2208 4
SIDE2
0.1UF/6.3V 0.1UF/6.3V

2
/@
+3VA_RTC /@
WTOB_CON_2P
12G17100002C
GND

1
GND
+3VA_RTC
BAT54CTB
D2201
R2210
1
1%
2
20KOhm 20 mils

3
SRTC_RST# 32
SRTC_RST# SL2201
nbs_r0201_h10_000s NA
1 2
0402 +3VA_RTC_D
1

C2204

1
1UF/6.3V C2207 +3VA_RTC +VCC_RTC
nbs_c0201_h14_000s 1UF/6.3V SL2202
2

JA - SRTC RST_N nbs_c0201_h14_000s


JA 2 1

2
SAVE ME RTC REGISTER -(1-X) DEFAULT 0603
CLEAR ME RTC REGISTER - (1-2)
/@

GND
R2209 1% 20KOhm
+V3.3A_RTC GENERATION
1 2 RTC_RST# 32
RTC_RST#
nbs_r0201_h10_000s NA
1

C2203
1UF/6.3V Justin : No used divided resisters. PCH has Rload inside and +3VA PU will cause VCCRTC drop to 2.7V in S0
nbs_c0201_h14_000s
VCCRTC must not exceed 3.3V and sustained operation at voltages below 3.0V is not recommended
2

JB - RTC REST_N JB
CLEAR CMOS - (1-2) Intel suggested to use diode circuit for long life relibility
SAVE CMOS - (1-X) DEFAULT

GND

@20200630_change name CLKREQ0_PEGA#


DGPU CLKReq#

CLKREQ0_PEGA#

Q2201
For Optimus 2N7002K 3
3

D
R2212
/@ 10KOhm
11
25,70,77,78 DGPU_PWROK
G
2

S
2
2

GND GND

<Variant Name>

Project Name Rev

UX482 R0.1

Title : CPU_PCH_CLOCK SIGNALS,RTC


Size
D
Dept.: NB1-RD3EE2 Engineer: EE
Date: Monday, July 13, 2020 Sheet 22 of 102
Keyboard Connector
Main Board

@20200707_ME change 12018-00620100


KB connector change to P.31
FPC_CON_32P
@20190731C +5VS_LED_KB

SIDE1 1 Volume_down# 35 C3163


33 1 Volume_up# 35
2 CON3101
3
4
2
3
Mic_mute#
Gaming_center#
35
35
Keyboard Backlight CON. 1
1 GND1
5 Gaming_center# 1 2
4 2
5 2
3 4700PF/50V
5 HOT KEY COM 3
6 4 6
6 KSO7 4 GND2
7 C3164
7 KSO0
8
8 KSI1 FPC_CON_4P
9
9 KSI7 Mic_mute# 1 2
10 /LED
10 KSO9
11 4700PF/50V
11 KSI6
12
12 KSI5
13 C3165
13 KSO3 GND
14 KSO[15:0] 35
14 KSI4
15

6
15 KSI2 EM6K1-G-T2R Volume_down# 1 2

3
16 KSI[7:0] 35
16 KSO1 Q3103A /LED
17 5 Q3103B 2 4700PF/50V
17 KSI3 35 KB_BACK_LED_R EM6K1-G-T2R
18 KB_BACK_LED_R /LED
18 KSI0

1
19 C3166
19 KSO13 07005-01990000 07005-01990000
20
20 KSO5

1
21
21 KSO2 Volume_up# 1 2
22 R3130 /LED
22 KSO4
23 100KOhm 4700PF/50V
23 KSO8
24
24 KSO6

2
25
25 KSO11 GND
26
26 KSO10
27
27 KSO12
28
29
28
29
KSO14
KSO15
GND GND GND
For EMI
20170411 ashton modify
30 CAP_LED_CON# 56
30
31
31 D3102
SIDE2 32 GND
34 32 +5VSUS_KB _Wally C3120 2 1 0.1UF/16V N/A 1 6
1

1 6
J3101
0Ohm @20200619_KB 耗電量320mA 換一顆MOS 400mA KSO5 2
3
2 5
5
4
KSO4
KSO8
3 4
R3105 KSO2 KSO6
AZ2115-05C /EMI
2

+5VSUS D3101
1 6
1 6
KSI6 2 5 KSI2
2 5
3 4 KSI4
3 4
KSI5 KSO3
AZ2115-05C /EMI

D3104
1 6
1 6
KSO7 2 5 KSI1
2 5
3 4 KSI7
3 4
KSO0 KSO9
AZ2115-05C /EMI

D3105
1 6
1 6
KSO11 2 5 KSO12
2 5
3 4 KSO14
3 4
KSO10 KSO15
AZ2115-05C /EMI

D3106
1 6
1 6
KSO1 2 5 KSO13
2 5
3 4 KSI0
3 4
KSI3
AZ2115-05C /EMI

GND

EMI Reserve
如要上件請確認容值(選擇Pico等級) +3VS +3VS_TPCON

TP Connector
L3101

2 1 Irat=600mA
120Ohm/100Mhz N/A
I2C3_SCL_TCH_PAD I2C3_SDA_TCH_PAD
2

C3161 C3162
0.1UF/6.3V 0.1UF/6.3V
1

@/EMI @/EMI

GND GND
TP Conn.
J3105 +3VS_TPCON
6 8
+3VS_TPCON 6 SIDE2
D3110 ESD Diode 5
25 I2C3_SDA_TCH_PAD 5
1st Source: P/N:07024-00200200 AMAZING/AZC099-04SP.R7G

1
I2C3_SDA_TCH_PAD 4 C3116
25 I2C3_SCL_TCH_PAD 4
2nd Source: P/N:07024-00710000 NXP/PUSB2X4D I2C3_SCL_TCH_PAD 3 0.1UF/16V
3
25 CPAD_INT# 2 N/A
2

2
for ESD I2C3_SCL_TCH_PAD I2C3_SDA_TCH_PAD @ T3133 1 TPC26T CPAD_INT# 1 7
1 SIDE1
LID_SW#_TP
1

FPC_CON_6P N/A GND


CPAD_INT#
C3113 D3109 D3110 12018-00162400
1

AZ5325-01F AZ5325-01F

07024-00640000 07024-00640000
2

07G022005N30
GND
TVM0G5R5M101R001 @
2

GND

GND GND GND

<Variant Name>

Title : KBC_KB & TP


ASUSTeK COMPUTER
Engineer: EE
Size Project Name Rev

C GM501 R1.0

Date: Monday, July 13, 2020 Sheet 31 of 102


<Variant Name>

Project Name Rev

UX482 R0.1

Title : PCH-SPI ROM,OTH


Size
Dept.: NB1-RD3EE2 Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 24 of 102
Main Board
+3VS
U0301F

@20200701_修改default iGPU
DC53 DR27
31 CPAD_INT# GPP_B16/GSPI0_CLK GPP_D14/ISH_UART0_TXD
SL7903 1 2 DA51 DW27 /NA
48 iGPU_dGPU_switch 0201 GPP_B18/GSPI0_MOSI GPP_D13/ISH_UART0_RXD
DC49 DV25 R2550 1 2 10KOhm
GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS#
DC50 DT25 iGPU_dGPU_switch
GPP_B14/ SPKR/TIME_SYNC1/GSPI0_CS1# GPP_D15/ISH_UART0_RTS#/GSPI2_CS1# /IMGCLKOUT5
DC52 R2551 1 2 100KOhm
@20200701_iGPU_dGPU_switch change pull High GPP_B15/GSPI0_CS0#
DB45 R2503 1 2 0OHM /X
GPP_B6/ISH_I2C0_SCL GC_STATE_EC 30,70
BIOS Default Setting High:iGPU & 若為LOW 則 DGPU CY49 DB44 /VGA
GPP_B20/GSPI1_CLK GPP_B5/ISH_I2C0_SDA
CY53
GPP_B22/GSPI1_MOSI
CY52 CY39
GPP_B21/GSPI1_MISO GPP_B8/ISH_I2C1_SCL
DA50 DB47 R2542 1 2 10KOhm
GPP_B19/GSPI1_CS0# GPP_B7/ISH_I2C1_SDA
CPAD_INT#
DV21 DD47
70 GPU_RST# GPP_C9/UART0_TXD GPP_B10/I2C5_SCL/ISH_I2C2_SCL
DT21 DD44
22,70,77,78 DGPU_PWROK GPP_C8/UART0_RXD GPP_B9/I2C5_SDA/ISH_I2C2_SDA
DR21
GPP_C11/UART0_CTS#
DW21 DJ8
70 DGPU_PWR_EN# GPP_C10/UART0_RTS# GPP_E16/ISH_GP7 EXT_SCI# 30
DR7 R2531 /NA 2.2KOhm
GPP_E15/ISH_GP6 EXT_SMI# 30
DV19 DR24 I2C3_SDA_TCH_PAD R2532 1 /NA 2 2.2KOhm
GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_D18/ISH_GP5
DIMM_SEL1 DT19 DU25 PCB_ID0 RB751CS40 /UX482_ISH I2C3_SCL_TCH_PAD 1 2
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_D17/ISH_GP4
Justin : GPP_C14 Follow CRB
UX435
DIMM_SEL0 DR18
GPP_C15/ UART1_CTS#/ISH_UART1_CTS# GPP_D3/ISH_GP3/BK3/SBK3
DV31 PCB_ID1 D2501
LID_SW# 30,45,52,56
@20200528 add 2.2k pull high
T2501 1 DIMM_SEL2 DU19 DU31 ISH_LID 2 1 LID_SW#
GPP_C14/ UART1_RTS#/ISH_UART1_RTS# GPP_D2/ISH_GP2/BK2/SBK2
SPI_TPM_INT_N DT27
GPP_D1/ISH_GP1/BK1/SBK1
DJ21 DV27 SL2504 1 2
44 UART2_TXD GPP_C21/UART2_TXD GPP_D0/ISH_GP0/BK0/SBK0 0201
DG23 CVT_SNSR#
44 UART2_RXD GPP_C20/UART2_RXD
DJ19 DR51 R2502 1 2 200Ohm
UART DEBUG 44 UART2_CTS# GPP_C23/UART2_CTS# GPP_RCOMP R2520 1 2 10KOhm
DF21 GPP_RCOMP
44 UART2_RTS# GPP_C22/UART2_RTS#
DN33 ISH_LID
GPP_T3
DV18 DT35
GPP_C17/I2C0_SCL GPP_T2
Touch pannel DW18
GPP_C16/I2C0_SDA
DG17
GND @20200701 add 10k pull high follow UX482 R1.1
GPP_U5
DJ23 DG19
31 I2C3_SCL_TCH_PAD GPP_C19/I2C1_SCL GPP_U4
DT18
31 I2C3_SDA_TCH_PAD GPP_C18/I2C1_SDA
Touch pad R2507 1 @ 2 10KOhm
DJ29 SPI_TPM_INT_N
GPP_H5/I2C2_SCL
DJ31
@20200528 Follow GA502 net name GPP_H4/I2C2_SDA

DF29
GPP_H7/I2C3_SCL
DG29
Second Touch PU MB GPP_H6/I2C3_SDA
GPU_RST#
DF25 R2511 1 @ 2 10KOhm
GPP_H9/I2C4_SCL/CNV_MFUART2_TXD
DF27 EXT_SMI#
GPP_H8/I2C4_SDA/CNV_MFUART2_RXD

1
R2514 1 @ 2 10KOhm
C2501 EXT_SCI#
TGL-UP3 100PF/50V

2
@/EMI
01001-01990500
@20200611_R2511 & R2514 改不上件解漏電
GND

+3VSUS

@
R2506 1 2 10KOhm
DGPU_PWR_EN#

+3VSUS
/VGA
R2505 1 2 10KOhm
GPU_RST#
R2517 1 2 100KOhm R2516 1 2 100KOhm
PCB-ID0: GPP_D18 N/A PCB_ID0
/X
R2519 1 2 100KOhm R2518 1 2 100KOhm
PCB-ID1: GPP_D17 N/A PCB_ID1
/X

ISH UX463 1105


+3VSUS

Onboard Memory: /RAM /X/RAM 2


R2508 1 2 100KOhm R2509 1 100KOhm
GPP_C12 => DIMM_SEL0 R2504 1 2 10KOhm
DIMM_SEL0
GPP_C13 => DIMM_SEL1 /X/RAM /RAM CVT_SNSR#
R2510 1 2 100KOhm R2512 1 2 100KOhm
GPP_C15 => DIMM_SEL2 /UX482_ISH
DIMM_SEL1
R2513 1 /RAM 2 100KOhm R2515 1 /X/RAM 2 100KOhm
DIMM_SEL2

DIMM_SEL# Key Part List


MEMORY DOWN Table GPP_C15 GPP_C13 GPP_C12

2 1 0

0 0 0 上件: R2508 / R2510 / R2513


03012-00030900 SKU3 Micron 8Gb 不上件: R2509 / R2512 / R2515

上件: R2509 / R2510 / R2513


03012-00031000 SKU2 SAMSUNG 8Gb 0 0 1
不上件: R2508 / R2512 / R2515

SKU1 上件: R2508 / R2512 / R2513


03012-00060400 MICRO 16Gb 0 1 0
目前線路 不上件: R2509 / R2510 / R2515

SAMSUNG 16Gb 0 1 1 上件: R2509 / R2512 / R2513


03012-00060100 SKU4 不上件: R2508 / R2510 / R2515

1 0 0

1 0 1

1 1 1

www.teknisi-indonesia.com

<Variant Name>

Project Name Rev

UX482 R0.1

Title : CPU_CFG,RSVD,GND
Size
D
Dept.: NB1-RD3EE2 Engineer: EE
Date: Monday, July 13, 2020 Sheet 25 of 102
+VCCIN_AUX U0301N

+1.8VSUS
Imax = 0.165A
Imax = 32A
AB12 CY18
VCCIN_AUX1 VCCPRIM_1P8_1 +1.8VSUS +VCCA_CLKLDO_1P8
AC10 CY20
AE10
VCCIN_AUX2 VCCPRIM_1P8_2
CY24
R2602 Imax = 0.165A
VCCIN_AUX3 VCCPRIM_1P8_3 1 2
AK2 CY26
VCCIN_AUX4 VCCPRIM_1P8_4
AR10 DA18
VCCIN_AUX5 VCCPRIM_1P8_5 100mOhm PDG sugest:LC filter reserved

1
AT12 DA20
VCCIN_AUX6 VCCPRIM_1P8_6
AU10 DA22 nbs_r0603_h22_000s
VCCIN_AUX7 VCCPRIM_1P8_7 R2617
AW10 DA24
VCCIN_AUX8 VCCPRIM_1P8_8 +VCCHDA 0Ohm
BV1 DA26
VCCIN_AUX9 VCCPRIM_1P8_9 SL2605 Imax = 0.005A

2
BV39 DC18
VCCIN_AUX10 VCCPRIM_1P8_10 1 2
BW40 DC20 0402
VCCIN_AUX11 VCCPRIM_1P8_11
BY39 DC22

1
VCCIN_AUX12 VCCPRIM_1P8_12 C2633 C2634 C2605 C2606
CC1 DC24
VCCIN_AUX13 VCCPRIM_1P8_13 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
CD12 DC26
VCCIN_AUX14 VCCPRIM_1P8_14 +3VSUS_PCH
CF10 DD20

2
VCCIN_AUX15 VCCPRIM_1P8_15 +3VSUS
CG12 DD22 +3VSUS_PCH
CH10
VCCIN_AUX16 VCCPRIM_1P8_16
DV22
SL2606 Imax = 0.2A
VCCIN_AUX17 VCCPRIM_1P8_17 1 2
CJ1 0402
VCCIN_AUX18
CJ12 DA35
VCCIN_AUX19 VCCPRIM_3P3_1
CK10 DC28
VCCIN_AUX20 VCCPRIM_3P3_2
CL12 DC30
VCCIN_AUX21 VCCPRIM_3P3_3
CM10 DD30 Justin : PDG no decoupling requirement
VCCIN_AUX22 VCCPRIM_3P3_4
CP1
VCCIN_AUX23
CP10 DV34 C2677 0.1UF/6.3V
VCCIN_AUX24 DCPRTC
CR12 VCCRTCEXT 1 2 +VCCA_CLKLDO_1P8
VCCIN_AUX25
CT10 DV46 C2617 2.2UF/6.3V
CU12
VCCIN_AUX26 VCCLDOSTD_0P85
VCCLDO_0.85V 1 2
Justin : PDG page 661
VCCIN_AUX27 In ICL platforms it is assume that VCCPLL is supplies directly from the PCH105A
CY1
VCCIN_AUX28 VCCA_CLKLDO_1P8_1
DV16 Imax = 0.165A output and not powered through the VCCST power gate
AK1 DC15
VCCIN_AUX29 VCCA_CLKLDO_1P8_2

AV9 DV28 C2631 4.7UF/6.3V


82 P_VCCIN_AUX_VSSSENSE_50OHM VCCIN_AUX_VSSSENSE VCCDPHY_1P24
AT9 VCCDPHY_1P24 1 2
82 P_VCCIN_AUX_VCCSENSE_50OHM VCCIN_AUX_VCCSENSE
DD38 C2608 1UF/6.3V +VCC1.05_OUT_FET
DD17
VCCDSW_1P05
1 2
Loopback 1P05 power to supply to Fuse, CNVPLL
VCCDSW_1P05
VCC_VNNEXT_1P05_1 and CNVLDO
DD18 BR3
VCC_VNNEXT_1P05_2 VCC1P05_1
BR4
DA15
VCC1P05_2
BT5 Loopback 1P05 power 0.002A
to supply to CPU Load
(PLL, ST, STG, FETs)
To CPU
VCC_V1P05EXT_1P05_1 VCC1P05_3
DA17
Justin : C10_gate# to power rail stable should be 65us
VCC_V1P05EXT_1P05_2
DA31
VCCPRIM1P05_OUT_PCH1 +VCC1.05_OUT_PCH
DB39 DC33
GPP_B2/VRALERT# VCCPRIM1P05_OUT_PCH2
DV12 DC31 1 +3VA_RTC
GPP_F22/VNN_CTRL VCCPRIM1P05_OUT_PCH3 T2603 T2601
DT12
GPP_F23/V1P05_CTRL +VCC1.05_OUT_FET Q2601A
+1.05V_VCCST
DC35
VCCRTC Imax = 0.8A
DB37 DD37 Imax = 0.004A

1
82 VCCINAUX_CORE_VID0 GPP_B0/CORE_VID0 VCCDSW_3P3 +3VA_DSW 6 D S 1
Imax = 0.005A

1
DB38 DA28 C2655 C2654
82 VCCINAUX_CORE_VID1 GPP_B1/CORE_VID1 VCCPGPPR +VCCHDA
0.1UF/6.3V 1UF/6.3V
CY31 nbs_c0201_h14_000s
Justin : no ext VR cost down solution VCCPRIM_3P3_5 +3VSUS_PCH G

2
CY33
will add 4.2mW in S0ix VCCPRIM_3P3_6 PE532DX
CV39

2
VCCPRIM_1P8_18 +1.8VSUS

AP12
RSVD
VCCST_EN_12V

TGL-UP3 Q2601B T2602


01001-01990500 Imax = 0.15A
+VCCSTG
VID1 VID0 VCCIN_AUX 5 D S 3

1
+1.8VSUS
0 0 0V
G
Justin : >10 UF should be on power side 0 1 1.1V PE532DX

4
1 0 1.65V

1
+VCCIN_AUX R2606 1 2 100KOhm
1 1 1.8V C2601
57 VCCSTG_EN_12V
VCCSTG_EN_12V
+12VS_GATE
+3VSUS

1
10UF/6.3V

2
C2603
1

@100PF/50V

2
C2641 C2609 C2610 C2614 C2632 C2635 C2636 C2637 C2638 C2639 R2611 100KOhm
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 10UF/6.3V VCCINAUX_CORE_VID0 R2613 1 2 100KOhm
2

+VCCIN_AUX VCCINAUX_CORE_VID1 1 2

GND
1

Neil: AC simulation modify


C2681 C2678 C2682 C2679 C2680 GND
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2

GND

Justin : can bulid in logic ic @20200616_add C2683~88 : 15PF for EMI/RF


+3VSUS +3VSUS VCCST Enable Logic (OR) +3VSUS +12VSUS

Justin : Logic OR!! Used OR gate may reduce leakage


+VCCIN_AUX
2

VCCST must be on when VCCIN_AUX on


2

2
R2610
R2608 100KOhm R2614 R2615
100KOhm 100KOhm 100KOhm TGL IVR decoupling Caps
D2601
1
1

1
VCCST_OVRD_LV 88 VCCINAUX_CORE_VID0 2
VCCST_OVRD_LV
3 VCCST_EN_12V

1
1
1

1
VCCINAUX_CORE_VID1 1
3

3
EM6K1-G-T2R EM6K1-G-T2R C2688 C2687 C2686 C2685 C2684 C2683
BAT54CTB
Q2604B Q2605B 15PF/50V 15PF/50V 15PF/50V 15PF/50V 15PF/50V 15PF/50V

2
5 5

2
2

2
Vf 0.32-1V

2
1
C2611
VCCST_OVRD# VCCST_EN#
Vgs 0.8-1.5V
4

4
0.01UF/25V
D2602
6

6
EM6K1-G-T2R EM6K1-G-T2R

2
2 Q2604A VCCST_OVRD_LV R2609 2 2 Q2605A
27 VCCST_OVRD
1 2 3 VCCST_EN
1

1
27,30,58,70,88,96 PM_SUSB#
0OHM 1 2
BAT54CTB
R2616 R2604
1 @ 2 1MOhm
27,30,57,70,88,96 SUSB_EC#
0OHM VCCST_EN_R
1

R2.0 for power sequence


SR 需確認VCCST_EN 放電時間

<Variant Name>

Project Name Rev

UX482 R0.1

Title : CPU_PCH_POEWR,GND
Size
D
Dept.: NB1-RD3EE2 Engineer: EE
Date: Monday, July 13, 2020 Sheet 26 of 102
Main Board
U0301L Justin : PMC_ALERT# is typeC PD alert pin , follow CRB +3VSUS

@20200602_SLP_S5#_Follow GX502
DV49 BM9 1 T2702 TPC26T_50
30,58 PM_SLP_SUS# SLP_SUS# PROCPWRGD
DK41 PROCPWRGD SL2705 1 2 R2717 1 2 10KOhm
GPD3/PWRBTN# 0201 PM_PWRBTN# 30
12 SLP_S5# R2724 1 2 0OHM DM43 DN41 PM_PWRBTN#_R PM_SYSRST_R# nbs_r0201_h12_000s
GPD10/SLP_S5# GPD0/BATLOW#
SL2704 1 2 SLP_S5#_R DJ41 DK43 PM_BATLOW_R# R2713 1 2 10KOhm
30,57,58,86 PM_SUSC# 0201 GPD5/SLP_S4# GPD1/ACPRESENT
SL2703 1 2 SLP_S4_R# DJ43 ME_AC_PRESENT_PCH UX435 PD_SMB_INT#
UX435 nbs_r0201_h12_000s
26,30,58,70,88,96 PM_SUSB# 0201 GPD4/SLP_S3#
SLP_S3_R# 1
T2704 DR41 CW40
GPD6/SLP_A# GPP_B11/PMCALERT# PD_SMB_INT# 12
SLP_A# DT44 DN27 SL2702 1 2
GPD9/SPL_WLAN# GPP_H18/CPU_C10_GATE# 0201 CPU_C10_GATE# 30 +3VA_RTC
DG31 C10_GATE# T2705 1
GPP_H3/SX_EXIT_HOLDOFF#
T2703 1 DD42 SX_EXIT_HOLDOFF# TPC26T_50
TPM PCH_SLP_S0_R# DN39
GPP_B12/SLP_S0#
DK39
SLP_LAN# WAKE# PCIE_WAKE# 33,70 R2723 1 2 1MOhm
WAKE#
SM_INTRUDER#
DM35 DM41
RSMRST# GPD2/LAN_WAKE#
PM_RSMRST#_PCH DD10 DT41 PCIE_LAN_WAKE# T2701 1 TPC26T_50 +3VA_DSW
SYS_RESET# GPD11/LANPHYPC/DSWLDO_MON @20200623_R2712 改不上件 Follow UX482 R1.1
PM_SYSRST_R# DD41 DSWLDO_MON
GPP_B13/PLTRST#
PLT_RST# DN43 R2712 1 /X 2 0OHM R2711 100KOhm
GPD7 TBT_PERST# 11 TONY 0122 Update R2512 Change to 100K
SL2706 1 2 DK35 PCH_GPD7 PM_BATLOW_R# 1 2
nbs_r0201_h10_000s
12,30,58 DPWROK_EC 0201 DSW_PWROK
DPWROK_R DF10 CE5 SL2701 1 2 R2722 1 2 10KOhm
SYS_PWROK VCCSTPWRGOOD_TCSS 0201
PM_SYSPWROK_PCH DN35 BP8 VCCST_PWRGD_CPU R2709 1 2 62Ohm
VCCST_OVRD PCIE_LAN_WAKE# nbs_r0201_h12_000s
PCH_PWROK VCCST_PWRGD VCCST_PWRGD_PCH 58
PM_PWROK_PCH BP9 VCCST_PWRGD_PCH_X1 R2705 1KOhm
VCCST_OVERRIDE VCCST_OVRD 26
DM37 VCCST_OVRD PCIE_WAKE# 1 2
INTRUDER# T2706
SM_INTRUDER# DT49 DR12 1
SPIVCCIOSEL GPP_F20/EXT_PWR_GATE# T2707
SPIVCCIOSEL DW12 EXT_PWR_GATE# 1 R2714 1 2 10KOhm
GPP_F21/EXT_PWR_GATE2#
EXT_PWR_GATE#2 PM_RSMRST#_PCH nbs_r0201_h12_000s
R2718 1 2 10KOhm
@20200623_R2715改上件 Follow UX482 R1.1 DPWROK_EC nbs_r0201_h12_000s
TGL-UP3
R2706 1 @ 2 10KOhm Justin:follow CRB
01001-01990500
TBT_PERST# nbs_r0201_h12_000s
R2715 1 /NA 2 0OHM
R2707 100KOhm
PLT_RST# TBT_PERST#
VCCST_OVRD 1 2
nbs_r0201_h10_000s

R2719 1 2 10KOhm
PM_SYSPWROK nbs_r0201_h12_000s
R2720 100KOhm
PCH STRAPS PM_PWROK 1 2
nbs_r0201_h10_000s
D2704
R2725 100KOhm
SLP_S5# 1 2
nbs_r0201_h10_000s
@
+3VA_DSW VCCST_PWRGD_PCH 1 2

VPORT0402L331V05

1
PLT_RST# 30,32,33,40,41,58,59,70
PLT_RST#
R2701
D2706
4.7KOhm
BUF_PLT_RST# 30,32,33,40,41,58,59,70 @ @

2
PM_PWROK_PCH 1 2
SPIVCCIOSEL
IECS0305C040FR

1
R2704 D2707
4.7KOhm
@

2
PM_SYSPWROK_PCH 1 2

IECS0305C040FR

SPI 1.8V/3.3V SEL

LOW 3.3V
HIGH 1.8V

Justin : change to logic IC C10_Gate Logic (AND)


+3VA_DSW
+3VSUS

R2703
U2701
1 6
B VCC
09'MoW04: CPU_C10_GATE# 2 5
26,30,57,70,88,96 SUSB_EC# A NC
3 4
GND Y C10_PWR_GATE# 57,88

2
Optional if ME FW is
Ignition FW 74LVC1G08GM

100KOhm
1

R2721
1 2
30 PM_SYSPWROK
1KOhm PM_SYSPWROK_PCH

1 2
30 PM_PWROK
R2708 1KOhm PM_PWROK_PCH
1 2
30,58 PM_RSMRST#
R2710 1KOhm PM_RSMRST#_PCH
D2703
1 ME_AC_PRESENT_PCH
30 ME_AC_PRESENT
3
2
DPWROK_R
Change to UX334FL BAT54ATB

Andy1 Shih 0114


D2701
1
30,80 IMVP9_PWRGD
3
2
+3VA_DSW 3VA_DSW_PWRGD
BAT54ATB
2

R2702
100KOhm

D2708
1

1 2
3VA_DSW_PWRGD DPWROK_R D2705
1 2
58,82 VCCIN_AUX_PWRG
RB751CS40 VCCIN_AUX_PWRG
N/A RB751CS40
1

C2701 D2702
0.1UF/6.3V
@ 2
30,58,87 3VA_DSW_PWRGD
2

3VA_DSW_PWRGD 3
1
BAT54CTB

Power failure solution (S0-->G3,S5-->G3):


<Variant Name>
Justin : take DSW_PWROK low on emergency power loss, it must also take RSMRST# low at the same time Project Name Rev

UX482 R0.1

Title : CPU_PCH_SYS_POWER
Size
Dept.: NB1-RD3EE2 Engineer: EE
D
Date: Monday, July 13, 2020 Sheet 27 of 102
SPI PCH Power System Management Interface +12VS +3VS

+12VS
Justin : for PD platform using +3VA_EC to avoid dead battery issue.
+3VA_EC

1
+3VA_EC D2801 +3V_SPI
R2806 R2807
1 4.7KOhm
+3VSUS R2804 0Ohm 3 20 mils 4.7KOhm

2 1 +3V_SPI_R 2

2
2
@ SMB1_CLK_S 48,50,78
R2805 0Ohm
2 1 BAT54ATB

2
30,35 SMB1_CLK_EC 6 1
Q2806A
EM6K1-G-T2R Thermal sensor,Re�mer 30,35 SMB1_CLK_EC 6 1 PD_SMB1_CLK 7,12
EC(SMB1) Q2807A @
EC(SMB1) PCH

5
Note. No TPM : R1 22 ohm EM6K1-G-T2R
SPI0 2-Load(1 Flash and 1TPM) R2 75 ohm

5
30,35 SMB1_DAT_EC
EC G3 flash sharing with Wire-OR Topology R3 22 ohm
3 4
SMB1_DAT_S 48,50,78
Justin :Follow DG 6.12.3.2 R4 X Q2806B
30,35 SMB1_DAT_EC PD_SMB1_DATA 7,12
EM6K1-G-T2R
3 4

CPU POWER IC Q2807B @

R1.3 PD project should use isola�on aviod SPI leakage ADDR 0x7E CPU Thermal sensor EM6K1-G-T2R

ADDR 0x90
+12VSUS
VRAM Thermal sensor
1
R2815
2 ADDR 0x91 @20200707_改不上件
20mil
+12VSUS_SPI @20200611_新增R2810 Pull 5VSUS
+5VSUS 100KOhm /X
並將R2815改不上件,解漏電 GPU Thermal sensor
R2810
ADDR 0x92
1 2

100KOhm

PCH,TPM Side
EC,SPI ROM Side
Q2804A
+12VSUS_SPI EM6K1-G-T2R
R2801 1 2 15Ohm R2809 1 2 49.9Ohm
2

7 SPI_CLK_SPI EC_SCK_PCH 30
5%
1 6 R2825 1 2 49.9Ohm
SPI_CLK_SPI_R2 SPI_CLK_SPI_R SPI_CLK_SPI_3
R2826 1 2 0OHM
@
Q2804B
@20200602 Remove SMB_CLK to AMP & NVVDD CLK Switck
+12VSUS_SPI EM6K1-G-T2R R2819 1 2 49.9Ohm
EC_SI_PCH 30
R2802 1 2 15Ohm
5

7 SPI_SI_SPI
5%
4 3 R2823 1 2 49.9Ohm
SPI_SI_SPI_R2 SPI_SI_SPI_R SPI_SI_SPI_3

R2827 1 @ 2 0OHM

Q2805A
EM6K1-G-T2R
+12VSUS_SPI
R2820 1 2 15Ohm R2808 1 2 49.9Ohm
2

7 SPI_SO_SPI EC_SO_PCH 30
5%
1 6 1 2 49.9Ohm
SPI_SO_SPI_R2 SPI_SO_SPI_R R2824 SPI_SO_SPI_3

R2830 1 @ 2 0OHM

Q2803A
+12VSUS_SPI EM6K1-G-T2R
2

SPI_CS#0_SPI_3
SL2801 1 2 1 6 2 1 SL2805
7 SPI_CS#0_SPI 0201 0201 EC_SCE#_PCH 30
SPI_CS#0_SPI_R
CS# does not require series resistor
R2828 1 @ 2 0OHM

Q2805B
+12VSUS_SPI EM6K1-G-T2R
5

R2818
1 2 4 3
7 PCH_SPI_DQ2
PCH_SPI_DQ2_R PCH_SPI_DQ2_2
49.9Ohm
R2831 1 @ 2
0OHM

+12VSUS_SPI
Q2803B
EM6K1-G-T2R SMBus Interface
5

R2803 +12VS +3VS


1 2 4 3
7 PCH_SPI_DQ3
PCH_SPI_DQ3_R PCH_SPI_DQ3_2
49.9Ohm

R2829 1 @ 2 0OHM

2
RN2801B RN2801A
4.7KOhm 4.7KOhm

@20200709_modify 05006-00096300 16MB PRMC SPI ROM PCH SO-DIMM

1
2
Justin : check rom size with BIOS +3V_SPI
Intel suggest 32MB 7 SMB_CLK 6 1 M_B_SMB_CLK 16

6/6 R2834,R2832 empty for leakge issue EM6K1-G-T2R

5
Q2801A
7 SMB_SDA M_B_SMB_DAT 16
1

T2801 1 TPC26T_50 3 4
2

T2802 1 TPC26T_50 C2803 EM6K1-G-T2R


2

T2803 1 TPC26T_50 R2832 0.1UF/6.3V +3VS


Q2801B
2

R2834 100KOhm
100KOhm N/A
N/A
1
1

+12VS
U2802

2
1 8 RN2802B RN2802A
CS# VCC
SPI_CS#0_SPI_3 2 7
DO(IO1) IO3 4.7KOhm 4.7KOhm
SPI_SO_SPI_3 3 6 PCH_SPI_DQ3_2
IO2 CLK
PCH_SPI_DQ2_2 4 5 SPI_CLK_SPI_3
GND DI(IO0)
SPI_SI_SPI_3

1
W25R128JVSIQ 16MB ROM
2

R2817
2
100KOhm
TPC26T_50 1 T2813
12,30,93 SMB3_CLK P_SMB2_CLK_50OHM 80
TPC26T_50 1 T2809
1

6 1
TPC26T_50 1 T2810 EM6K1-G-T2R
ICL PDG P.326 Q2810A
05006-00096300 16MB PRMC SPI ROM 5
S:05006-00096500 12,30,93 SMB3_DAT P_SMB2_DATA_50OHM 80
3 4
EM6K1-G-T2R
Q2810B <Variant Name>

Project Name Rev

UX482 R0.1

Title : PCH-SPI ROM,OTH


Size
Dept.: NB1-RD3EE2 Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 28 of 102
DDR4 3200 1024M*8 1.2V = 8G
SKU2_Micron: 03012-00030900
SKU3_Samsung: 03012-00031000

M_A_VREFCA
M_A_VREFCA
1Gx8(IO) U1401 M_A_VREFCA U1402
U1403
Total: 1Gx8ea = 8G M_A_VREFCA
J1 J1
DDR4 3200 2048M*8 1.2V = 16G J1 U1404
VREFCA VREFCA
SKU1_Micron: 03012-00060400 (此次更換_0609 VREFCA

SKU4_Samsung: 03012-00060100 J1
VREFCA
L3 C2 L3 C2
A0 DQ0 A0 DQ0
L3 C2 M_A_A0 L7 B7 M_A_DQ20 M_A_A0 L7 B7 M_A_DQ31
A0 DQ0 A1 DQ1 A1 DQ1
M_A_A0 L7 B7 M_A_DQ15 M_A_A1 M3 D3 M_A_DQ21 M_A_A1 M3 D3 M_A_DQ30
A1 DQ1 A2 DQ2 A2 DQ2
M_A_A1 M3 D3 M_A_DQ11 L3 C2 M_A_A2 K7 D7 M_A_DQ17 M_A_A2 K7 D7 M_A_DQ24
A2 DQ2 A0 DQ0 A3 DQ3 A3 DQ3
M_A_A2 K7 D7 M_A_DQ8 M_A_A0 L7 B7 M_A_DQ0 M_A_A3 K3 D2 M_A_DQ23 M_A_A3 K3 D2 M_A_DQ27
A3 DQ3 A1 DQ1 A4 DQ4 A4 DQ4
M_A_A3 K3 D2 M_A_DQ14 M_A_A1 M3 D3 M_A_DQ7 M_A_A4 L8 D8 M_A_DQ16 M_A_A4 L8 D8 M_A_DQ28
A4 DQ4 A2 DQ2 A5 DQ5 A5 DQ5
M_A_A4 L8 D8 M_A_DQ9 M_A_A2 K7 D7 M_A_DQ2 M_A_A5 L2 E3 M_A_DQ22 M_A_A5 L2 E3 M_A_DQ25
A5 DQ5 A3 DQ3 A6 DQ6 A6 DQ6
M_A_A5 L2 E3 M_A_DQ13 M_A_A3 K3 D2 M_A_DQ5 M_A_A6 M8 E7 M_A_DQ18 M_A_A6 M8 E7 M_A_DQ26
A6 DQ6 A4 DQ4 A7 DQ7 A7 DQ7
M_A_A6 M8 E7 M_A_DQ10 M_A_A4 L8 D8 M_A_DQ1 M_A_A7 M2 M_A_DQ19 M_A_A7 M2 M_A_DQ29
A7 DQ7 A5 DQ5 A8 A8
M_A_A7 M2 M_A_DQ12 M_A_A5 L2 E3 M_A_DQ6 M_A_A8 M7 M_A_A8 M7
A8 A6 DQ6 A9 A9
M_A_A8 M7 M_A_A6 M8 E7 M_A_DQ3 M_A_A9 J3 M_A_A9 J3
A9 A7 DQ7 A10/AP A10/AP
M_A_A9 J3 M_A_A7 M2 M_A_DQ4 M_A_A10 N2 M_A_A10 N2
A10/AP A8 A11 A11
M_A_A10 N2 M_A_A8 M7 M_A_A11 J7 M_A_A11 J7
A11 A9 A12/BC_n A12/BC_n
M_A_A11 J7 M_A_A9 J3 M_A_A12 N8 M_A_A12 N8
A12/BC_n A10/AP A13 A13
M_A_A12 N8 M_A_A10 N2 M_A_A13 H2 C3 M_A_A13 H2 C3
A13 A11 WE_n/A14 DQS_t WE_n/A14 DQS_t
M_A_A13 H2 C3 M_A_A11 J7 M_A_WE# B3 M_A_DQS2 M_A_WE# B3 M_A_DQS3
4,19 M_A_WE# WE_n/A14 DQS_t A12/BC_n DQS_c DQS_c
M_A_WE# B3 M_A_DQS1 M_A_A12 N8 M_A_DQS#2 M_A_DQS#3
DQS_c A13
M_A_DQS#1 M_A_A13 H2 C3
WE_n/A14 DQS_t
M_A_WE# B3 M_A_DQS0 K2 K2
DQS_c BA0 BA0
K2 M_A_DQS#0 M_A_BA0 K8 M_A_BA0 K8
4,19 M_A_BA0 BA0 BA1 BA1
M_A_BA0 K8 M_A_BA1 M_A_BA1
4,19 M_A_BA1 BA1
M_A_BA1 K2 B2 B2
BA0 VDDQ1 +1.2V VDDQ1 +1.2V
B2 M_A_BA0 K8 J2 B8 J2 B8
VDDQ1 +1.2V BA1 BG0 VDDQ2 BG0 VDDQ2
J2 B8 M_A_BA1 M_A_BG0 J8 C1 M_A_BG0 J8 C1
4,19 M_A_BG0 BG0 VDDQ2 +1.2V BG1 VDDQ3 BG1 VDDQ3
4,19 M_A_BG1
M_A_BG0 J8
BG1 VDDQ3
C1
Imax=1.2V/0.28A VDDQ1
B2 M_A_BG1
VDDQ4
C9 M_A_BG1
VDDQ4
C9 Imax=1.2V/0.28A
M_A_BG1
VDDQ4
C9 J2
BG0 VDDQ2
B8
VDDQ5
E2 Imax=1.2V/0.28A VDDQ5
E2
E2 M_A_BG0 J8 C1 F7 E8 F7 E8
F7
VDDQ5
E8 M_A_BG1
BG1 VDDQ3
C9
Imax=1.2V/0.28A M_A_CLK_DDR0 F8
CK_t VDDQ6
M_A_CLK_DDR0 F8
CK_t VDDQ6
4,19 M_A_CLK_DDR0 CK_t VDDQ6 VDDQ4 CK_c CK_c
M_A_CLK_DDR0 F8 E2 M_A_CLK_DDR#0 M_A_CLK_DDR#0
4,19 M_A_CLK_DDR#0 CK_c VDDQ5
M_A_CLK_DDR#0 F7 E8 G3 G3
CK_t VDDQ6 CKE CKE
G3 M_A_CLK_DDR0 F8 M_A_CKE0 M_A_CKE0
4,19 M_A_CKE0 CKE CK_c
M_A_CKE0 M_A_CLK_DDR#0 F3 A1 F3 A1
F3 A1 G3 G7
ODT VDD1
C7 G7
ODT VDD1
C7
@20200618_del M_A_VREFCA 整組Power 在P18已有
M_A_ODT0 M_A_ODT0
4,19 M_A_ODT0 ODT VDD1 CKE CS_n VDD2 CS_n VDD2
M_A_ODT0 G7 C7 M_A_CKE0 M_A_CS#0 H3 F1 M_A_CS#0 H3 F1
4,19 M_A_CS#0 CS_n VDD2 ACT_n VDD3 ACT_n VDD3
M_A_CS#0 H3 F1 F3 A1 M_A_ACT# L9 F9 M_A_ACT# L9 F9
4,19 M_A_ACT# ACT_n VDD3 ODT VDD1 ALERT_n VDD4 ALERT_n VDD4
M_A_ACT# L9 F9 M_A_ODT0 G7 C7 M_A_ALERT# H8 H1 M_A_ALERT# H8 H1
4,19 M_A_ALERT# ALERT_n VDD4 CS_n VDD2 RAS_n/A16 VDD5 RAS_n/A16 VDD5
M_A_ALERT# H8 H1 M_A_CS#0 H3 F1 M_A_RAS# H7 J9 M_A_RAS# H7 J9
4,19 M_A_RAS# RAS_n/A16 VDD5 ACT_n VDD3 CAS_n/A15 VDD6 CAS_n/A15 VDD6
M_A_RAS# H7 J9 M_A_ACT# L9 F9 M_A_CAS# M1 M_A_CAS# M1
4,19 M_A_CAS# CAS_n/A15 VDD6 ALERT_n VDD4 VDD7 VDD7
M_A_CAS# M1 M_A_ALERT# H8 H1 N9 N9
VDD7 RAS_n/A16 VDD5 VDD8 VDD8
N9 M_A_RAS# H7 J9 R1425 1 2 10KOhm A7 R1426 1 2 10KOhm A7
VDD8 CAS_n/A15 VDD6 +1.2V DM_n/DBI_n/TDQS_t +1.2V DM_n/DBI_n/TDQS_t
R1424 1 2 10KOhm A7 M_A_CAS# M1 M_A_DM2 A3 M_A_DM3 A3
+1.2V DM_n/DBI_n/TDQS_t VDD7 TDQS_c TDQS_c
M_A_DM1 A3 N9
TDQS_c VDD8
R1420 1 2 10KOhm A7
+1.2V DM_n/DBI_n/TDQS_t
M_A_DM0 A3 N3 A9 N3 A9
TDQS_c PAR VSS1 PAR VSS1
N3 A9 M_A_PARITY C8 M_A_PARITY C8
4,19 M_A_PARITY PAR VSS1 VSS2 VSS2
M_A_PARITY C8 E1 E1
VSS2 VSS3 VSS3
E1 N3 A9 L1 E9 L1 E9
VSS3 PAR VSS1 RESET_n VSS4 RESET_n VSS4
L1 E9 M_A_PARITY C8 M_A_RESET# G1 M_A_RESET# G1
4,16 M_A_RESET# RESET_n VSS4 VSS2 VSS5 VSS5
M_A_RESET# G1 E1 H9 H9
VSS5 VSS3 VSS6 VSS6
H9 L1 E9 1 2 B9 K1 1 2 B9 K1
VSS6 RESET_n VSS4 ZQ VSS7 ZQ VSS7
1 2 B9 K1 M_A_RESET# G1 R1401 240Ohm ZQ_1401 K9 R1402 240Ohm ZQ_1402 K9
ZQ VSS7 VSS5 VSS8 VSS8
R1403 240Ohm ZQ_1403 K9 1 2 H9 +2.5V N1 +2.5V N1
+2.5V VSS8 VSS6 VSS9 VSS9
N1 R1404 240Ohm B9 K1 GND B1 GND B1
VSS9 ZQ VSS7 VPP1 VPP1
GND B1 ZQ_1404 K9 M9 M9
VPP1 VSS8 VPP2 VPP2
M9 GND +2.5V N1
VPP2
B1
VSS9 Imax=2.5V/30mA Imax=2.5V/30mA
Imax=2.5V/30mA M9
VPP1
G9 G9
VPP2 TEN TEN
G9 G2 A2 G2 A2
TEN Imax=2.5V/30mA NC1 VSSQ1 NC1 VSSQ1

2
G2 A2 G8 A8 G8 A8
NC1 VSSQ1 NC2 VSSQ2 NC2 VSSQ2
2

G8 A8 G9 R1411 N7 D1 R1412 N7 D1
NC2 VSSQ2 TEN NC3 VSSQ3 NC3 VSSQ3
R1409 N7 D1 G2 A2 0Ohm F2 D9 0Ohm F2 D9
NC3 VSSQ3 NC1 VSSQ1 NC4 VSSQ4 NC4 VSSQ4

2
0Ohm F2 D9 G8 A8 nbs_r0201_h12_000s nbs_r0201_h12_000s
NC4 VSSQ4 NC2 VSSQ2
nbs_r0201_h12_000s R1410 N7 D1
NC3 VSSQ3

1
0Ohm F2 D9 K4AAG085WA-BCWE K4AAG085WA-BCWE
NC4 VSSQ4
1

K4AAG085WA-BCWE nbs_r0201_h12_000s 03012-00060400 03012-00060400


03012-00060400

1
K4AAG085WA-BCWE
03012-00060400 GND GND GND GND
GND GND
GND
GND

Add R1409- R1416 (Vendor sugges�on)


@20190902D

M_A_VREFCA M_A_VREFCA
U1405 U1407 M_A_VREFCA M_A_VREFCA
U1408 U1409
J1 J1
VREFCA VREFCA
J1 J1
VREFCA VREFCA

L3 C2 L3 C2
A0 DQ0 A0 DQ0
M_A_A0 L7 B7 M_A_DQ34 M_A_A0 L7 B7 M_A_DQ43 L3 C2 L3 C2
A1 DQ1 A1 DQ1 A0 DQ0 A0 DQ0
M_A_A1 M3 D3 M_A_DQ37 M_A_A1 M3 D3 M_A_DQ44 M_A_A0 L7 B7 M_A_DQ57 M_A_A0 L7 B7 M_A_DQ51
A2 DQ2 A2 DQ2 A1 DQ1 A1 DQ1
M_A_A2 K7 D7 M_A_DQ32 M_A_A2 K7 D7 M_A_DQ40 M_A_A1 M3 D3 M_A_DQ58 M_A_A1 M3 D3 M_A_DQ48
A3 DQ3 A3 DQ3 A2 DQ2 A2 DQ2
M_A_A3 K3 D2 M_A_DQ39 M_A_A3 K3 D2 M_A_DQ45 M_A_A2 K7 D7 M_A_DQ59 M_A_A2 K7 D7 M_A_DQ55
A4 DQ4 A4 DQ4 A3 DQ3 A3 DQ3
M_A_A4 L8 D8 M_A_DQ35 M_A_A4 L8 D8 M_A_DQ42 M_A_A3 K3 D2 M_A_DQ63 M_A_A3 K3 D2 M_A_DQ49
A5 DQ5 A5 DQ5 A4 DQ4 A4 DQ4
M_A_A5 L2 E3 M_A_DQ36 M_A_A5 L2 E3 M_A_DQ46 M_A_A4 L8 D8 M_A_DQ60 M_A_A4 L8 D8 M_A_DQ50
A6 DQ6 A6 DQ6 A5 DQ5 A5 DQ5
M_A_A6 M8 E7 M_A_DQ33 M_A_A6 M8 E7 M_A_DQ41 M_A_A5 L2 E3 M_A_DQ62 M_A_A5 L2 E3 M_A_DQ54
A7 DQ7 A7 DQ7 A6 DQ6 A6 DQ6
M_A_A7 M2 M_A_DQ38 M_A_A7 M2 M_A_DQ47 M_A_A6 M8 E7 M_A_DQ61 M_A_A6 M8 E7 M_A_DQ52
A8 A8 A7 DQ7 A7 DQ7
M_A_A8 M7 M_A_A8 M7 M_A_A7 M2 M_A_DQ56 M_A_A7 M2 M_A_DQ53
A9 A9 A8 A8
M_A_A9 J3 M_A_A9 J3 M_A_A8 M7 M_A_A8 M7
A10/AP A10/AP A9 A9
M_A_A10 N2 M_A_A10 N2 M_A_A9 J3 M_A_A9 J3
A11 A11 A10/AP A10/AP
M_A_A11 J7 M_A_A11 J7 M_A_A10 N2 M_A_A10 N2
A12/BC_n A12/BC_n A11 A11
M_A_A12 N8 M_A_A12 N8 M_A_A11 J7 M_A_A11 J7
A13 A13 A12/BC_n A12/BC_n
M_A_A13 H2 C3 M_A_A13 H2 C3 M_A_A12 N8 M_A_A12 N8
WE_n/A14 DQS_t WE_n/A14 DQS_t A13 A13
M_A_WE# B3 M_A_DQS4 M_A_WE# B3 M_A_DQS5 M_A_A13 H2 C3 M_A_A13 H2 C3
DQS_c DQS_c WE_n/A14 DQS_t WE_n/A14 DQS_t
M_A_DQS#4 M_A_DQS#5 M_A_WE# B3 M_A_DQS7 M_A_WE# B3 M_A_DQS6
DQS_c DQS_c
M_A_DQS#7 M_A_DQS#6
K2 K2
BA0 BA0
M_A_BA0 K8 M_A_BA0 K8 K2 K2
BA1 BA1 BA0 BA0
M_A_BA1 M_A_BA1 M_A_BA0 K8 M_A_BA0 K8
BA1 BA1
B2 B2 M_A_BA1 M_A_BA1
VDDQ1 +1.2V VDDQ1 +1.2V
J2 B8 J2 B8 B2 B2
BG0 VDDQ2 BG0 VDDQ2 VDDQ1 +1.2V VDDQ1 +1.2V
M_A_BG0 J8 C1 M_A_BG0 J8 C1 J2 B8 J2 B8
BG1 VDDQ3 BG1 VDDQ3 BG0 VDDQ2 BG0 VDDQ2
M_A_BG1 C9 M_A_BG1 C9 M_A_BG0 J8 C1 M_A_BG0 J8 C1
VDDQ4
E2
Imax=1.2V/0.28A VDDQ4
E2
Imax=1.2V/0.28A M_A_BG1
BG1 VDDQ3
C9
Imax=1.2V/0.28A M_A_BG1
BG1 VDDQ3
C9
F7
VDDQ5
E8 F7
VDDQ5
E8
VDDQ4
E2
VDDQ4
E2
Imax=1.2V/0.28A
CK_t VDDQ6 CK_t VDDQ6 VDDQ5 VDDQ5
M_A_CLK_DDR0 F8 M_A_CLK_DDR0 F8 F7 E8 F7 E8
CK_c CK_c CK_t VDDQ6 CK_t VDDQ6
M_A_CLK_DDR#0 M_A_CLK_DDR#0 M_A_CLK_DDR0 F8 M_A_CLK_DDR0 F8
CK_c CK_c
G3 G3 M_A_CLK_DDR#0 M_A_CLK_DDR#0
CKE CKE
M_A_CKE0 M_A_CKE0 G3 G3
CKE CKE
F3 A1 F3 A1 M_A_CKE0 M_A_CKE0
ODT VDD1 ODT VDD1
M_A_ODT0 G7 C7 M_A_ODT0 G7 C7 F3 A1 F3 A1
CS_n VDD2 CS_n VDD2 ODT VDD1 ODT VDD1
M_A_CS#0 H3 F1 M_A_CS#0 H3 F1 M_A_ODT0 G7 C7 M_A_ODT0 G7 C7
ACT_n VDD3 ACT_n VDD3 CS_n VDD2 CS_n VDD2
M_A_ACT# L9 F9 M_A_ACT# L9 F9 M_A_CS#0 H3 F1 M_A_CS#0 H3 F1
ALERT_n VDD4 ALERT_n VDD4 ACT_n VDD3 ACT_n VDD3
M_A_ALERT# H8 H1 M_A_ALERT# H8 H1 M_A_ACT# L9 F9 M_A_ACT# L9 F9
RAS_n/A16 VDD5 RAS_n/A16 VDD5 ALERT_n VDD4 ALERT_n VDD4
M_A_RAS# H7 J9 M_A_RAS# H7 J9 M_A_ALERT# H8 H1 M_A_ALERT# H8 H1
CAS_n/A15 VDD6 CAS_n/A15 VDD6 RAS_n/A16 VDD5 RAS_n/A16 VDD5
M_A_CAS# M1 M_A_CAS# M1 M_A_RAS# H7 J9 M_A_RAS# H7 J9
VDD7 VDD7 CAS_n/A15 VDD6 CAS_n/A15 VDD6
N9 N9 M_A_CAS# M1 M_A_CAS# M1
VDD8 VDD8 VDD7 VDD7
R1423 1 2 10KOhm A7 R1422 1 2 10KOhm A7 N9 N9
+1.2V DM_n/DBI_n/TDQS_t +1.2V DM_n/DBI_n/TDQS_t VDD8 VDD8
M_A_DM4 A3 M_A_DM5 A3 R1421 1 2 10KOhm A7 R1419 1 2 10KOhm A7
TDQS_c TDQS_c +1.2V DM_n/DBI_n/TDQS_t +1.2V DM_n/DBI_n/TDQS_t
M_A_DM7 A3 M_A_DM6 A3
TDQS_c TDQS_c

N3 A9 N3 A9
PAR VSS1 PAR VSS1
M_A_PARITY C8 M_A_PARITY C8 N3 A9 N3 A9
VSS2 VSS2 PAR VSS1 PAR VSS1
E1 E1 M_A_PARITY C8 M_A_PARITY C8
VSS3 VSS3 VSS2 VSS2
L1 E9 L1 E9 E1 E1
RESET_n VSS4 RESET_n VSS4 VSS3 VSS3
M_A_RESET# G1 M_A_RESET# G1 L1 E9 L1 E9
VSS5 VSS5 RESET_n VSS4 RESET_n VSS4
H9 H9 M_A_RESET# G1 M_A_RESET# G1
VSS6 VSS6 VSS5 VSS5
1 2 B9 K1 1 2 B9 K1 H9 H9
ZQ VSS7 ZQ VSS7 VSS6 VSS6
R1405 240Ohm ZQ_1405 K9 R1406 240Ohm ZQ_1407 K9 1 2 B9 K1 1 2 B9 K1
+2.5V VSS8 +2.5V VSS8 ZQ VSS7 ZQ VSS7
N1 N1 R1407 240Ohm ZQ_1408 K9 R1408 240Ohm ZQ_1409 K9
VSS9 VSS9 +2.5V VSS8 +2.5V VSS8
GND B1 GND B1 N1 N1
VPP1 VPP1 VSS9 VSS9
M9 M9 GND B1 GND B1
VPP2 VPP2 VPP1 VPP1
M9 M9
Imax=2.5V/30mA Imax=2.5V/30mA VPP2 VPP2

G9 G9
Imax=2.5V/30mA Imax=2.5V/30mA
TEN TEN
G2 A2 G2 A2 G9 G9
NC1 VSSQ1 NC1 VSSQ1 TEN TEN
2

G8 A8 G8 A8 G2 A2 G2 A2
NC2 VSSQ2 NC2 VSSQ2 NC1 VSSQ1 NC1 VSSQ1

2
R1413 N7 D1 R1414 N7 D1 G8 A8 G8 A8
NC3 VSSQ3 NC3 VSSQ3 NC2 VSSQ2 NC2 VSSQ2
0Ohm F2 D9 0Ohm F2 D9 R1415 N7 D1 R1416 N7 D1
NC4 VSSQ4 NC4 VSSQ4 NC3 VSSQ3 NC3 VSSQ3
nbs_r0201_h12_000s nbs_r0201_h12_000s 0Ohm F2 D9 0Ohm F2 D9
NC4 VSSQ4 NC4 VSSQ4
nbs_r0201_h12_000s nbs_r0201_h12_000s
1

K4AAG085WA-BCWE K4AAG085WA-BCWE

1
03012-00060400 03012-00060400 K4AAG085WA-BCWE K4AAG085WA-BCWE
03012-00060400 03012-00060400

GND GND GND GND


GND GND GND GND

10uF*1
1uF*4
+2.5V
DIM Thermal Sensor
+2.5V +2.5V
Close to IC Pin B1/M9 +2.5V
Close to IC Pin B1/M9 Close to IC Pin B1/M9
Cap Placement of VREF
Close to IC Pin B1/M9
M_A_VREFCA
1

1
1

C1478 C1481 C1482 C1483 C1406


U1401
1

1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V C1484 C1485 C1486 C1487 C1416 C1488 C1489 C1490 C1491 C1422
2

0.1uF
2

nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V C1492 C1493 C1494 C1495 C1427
2

2
2

nbs_c0402_h28_000s
nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V
2
2

nbs_c0402_h28_000s nbs_c0402_h28_000s
nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s
nbs_c0402_h28_000s
GND
Close U1401 GND GND
U1402
Close U1402 Close U1403 GND Delete DIM thermal Sensor related schematic 0918
0.1uF

Close U1404 2.2uF

+1.2V +1.2V +1.2V +1.2V U1403


0.1uF
Close U1401 Close U1402 Close U1403 Close U1404
U1404
0.1uF
1

1
1

C1496 C1497 C1498 C1499 C1447 C1403 C1404 C1405 C1412 C1445 C1413 C1414 C1415 C1418 C1442 C1419 C1420 C1421 C1423 C1432
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V
2

2
2

nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s
nbs_c0402_h28_000s nbs_c0402_h28_000s nbs_c0402_h28_000s nbs_c0402_h28_000s

GND GND GND GND

+1.2V +1.2V +1.2V


+1.2V
Close U1405 Close U1407 Close U1408
Close U1409
1

1
1

C1424 C1425 C1426 C1428 C1448 C1407 C1429 C1430 C1431 C1433 C1446 C1408 C1434 C1435 C1436 C1438 C1444 C1409
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V C1439 C1440 C1441 C1443 C1437 C1410
2

2
2

nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V
2

2
2

nbs_c0402_h28_000s nbs_c0402_h28_000s nbs_c0402_h28_000s nbs_c0402_h28_000s nbs_c0402_h28_000s nbs_c0402_h28_000s


nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s nbs_c0201_h14_000s
nbs_c0402_h28_000s nbs_c0402_h28_000s +1.2V +1.2V
GND GND GND
GND

M_A_A[13:0] 4,19
1

1
C1411
+ CE1401 + CE1402 @ M_A_DQ[63:0] 4
330UF/2V 330UF/2V 10PF/50V
2

+1.2V N/A N/A


M_A_DQS[3:0] 4
2

M_A_VREFCA
Close U1401~U1404 pin J1 M_A_VREFCA
Close U1405~U1409 pin J1 Close to IC Pin M1 GND
M_A_DQS[7:4] 4

M_A_DQS#[3:0] 4
1

GND
C1449 C1450 M_A_VREFCA
M_A_DQS#[7:4] 4
10UF/6.3V 10UF/6.3V
2

CE1402, CE1401 (220uf) change to CE1601 (330uf)


1

nbs_c0402_h28_000s nbs_c0402_h28_000s
C1469 C1470 C1471 C1472 C1473 C1474 C1475 C1476
@20190626A
2

0.047UF/6.3V 0.047UF/6.3V 0.047UF/6.3V 0.047UF/6.3V 0.047UF/6.3V 0.047UF/6.3V 0.047UF/6.3V 0.047UF/6.3V C1451 C1452 C1453 C1454
2

0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V


1

GND
nbs_c0201_h13_000s
nbs_c0201_h13_000s
nbs_c0201_h13_000s
nbs_c0201_h13_000s

GND GND

GND

+1.2V
Add C1401 C1402 C1458
請放置末端
@20190713A
1

/@
C1401
10UF/6.3V
Delete C1402 C1458
2

C1401 0805 --> 0603


請放置末端
GND @20190715E

<Variant Name>

Title : DDR4_ON-BOARD_A1

NB1-RD3EE2
Engineer: EE
Size Project Name Rev
E UX482 R0.1

Date: Monday, July 13, 2020 Sheet 14 of 102


EC 8585 +3VA

R3001 100KOhm
Only 3V Torlence Power PWR_SW# R3004 1 2 100KOhm
LID_SW# 1 2
GPB[0,1,2,3,4,5,6] R3021 100KOhm
GPC[3,4,5,6,7] +3VS +3VA_EC +3VPLL +3VA_EC +3VACC
+3VA AC_IN_OC# 1 2
GPD[0,4,6,7] R3067 100KOhm
GPE[4] SL3005 SL3006 SLVCHG_AC_IN_OC# 1 2
GPF[6,7] 1
0603
2 1
0603
2 R3068 @ 100KOhm
FAN_V_Switch 1 2
GPH[7]

1
1

1
nbs_c0201_h13_000s C3017
GPI [0 :7] C3002 C3010 C3016 C3003 C3006 C3004 C3005 C3007 C3001 R3080 100KOhm
0.1UF/6.3V
GPJ[0:7] SL3007 1 2

2
0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V nbs_c0201_h13_000s

2
1 2
nbs_c0201_h13_000s nbs_c0201_h13_000s
nbs_c0201_h13_000s
nbs_c0201_h13_000s
nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s 0603

EC_AGND +3VA_EC

R3063 1 2 100KOhm @
Can be adjusted to
EC_GPG2
Open-Drain for port: RN3002B
2.2KOhm
SMB3_DAT RN3002A 3 4
2.2KOhm
SMB3_CLK 1 2
GPA0~GPA3 R3019 R3005 4.7KOhm
GPB0~GPB7 SMB1_DAT_EC R3007 1 2 4.7KOhm
GPD0~GPD7 1 2
+1.8VSUS Justin : ICL ESPI support 1.8V only, SMB1_CLK_EC R3020 1 2 4.7KOhm
GPE0~GPE7 0Ohm P_SMB0_DAT R3013 1 2 4.7KOhm

GPF0~GPF7 P_SMB0_CLK 1 2

+VCC_ESPI
LCD_BACKOFF# 45 D3009
+3VA_EC @
1
GPH0~GPH6 +3VPLL +3VACC 3
MANCHG_AC_IN_OC# 89 R3027 1 2 10KOhm
GPJ0~GPJ5 AC_IN_OC# 2
BAT1_IN_OC#
SLVCHG_AC_IN_OC# 93 R3028 1 2 10KOhm

BAT54AW
07G004068011 2018/06/28 by James

D10

K10
D4
D5

K4

E4

E9
J5

J4
U3001
R3006 1 2 15Ohm K1 M5
7 ESPI_IO0 PWR_LED 56

VSTBY2
VSTBY3
VSTBY1
VSTBY6
VSTBY5
VSTBY4

VCC

GPH7

AVCC
EIO0/LAD0/GPM0 PWM0/GPA0
R3008 1 2 15Ohm ESPI_IO0_EC J2 N5 R3017 1 2 100KOhm
7 ESPI_IO1 EIO1/LAD1/GPM1 PWM1/GPA1 CHG_LED# 56
R3012 1 2 15Ohm ESPI_IO1_EC J1 M6 CHG_LED# 3VADSW_ON
EC Require 7 ESPI_IO2
H2
EIO2/LAD2/GPM2 PWM2/GPA2 CHG_FULL_LED# 56
R3014 1 2 15Ohm ESPI_IO2_EC N6 R3015 1 2 100KOhm
7 ESPI_IO3 EIO3/LAD3/GPM3 PWM3/GPA3 FAN2_PWM 50
7 ESPI_CLK R3044 1 2 51Ohm ESPI_IO3_EC K2 K6 5VSUS_ON
ESCK/LPCCLK/GPM4 SMCLK5/PWM4/GPA4
R3045 1 2 ESPI_CLK_EC H1 J6 R3061 1 2 1MOhm
7 ESPI_CS# 0201 ECS#/LFRAME#/GPM5 SMDAT5/PWM5/GPA5 FAN1_PWM 50
R3023 1 2 ESPI_CS#_EC M4 M7 @ 2 1 SL7902
7 ESPI_RST# 0201 ERST#/LPCRST#/GPD2 PWM6/SSCK/GPA6 0402 FAN_V_Switch 96
T3003 1 ESPI_RST#_EC G2 K7 T7845
ALERT#/SERIRQ/GPM6 PWM7/RIG1#/GPA7
R3041 1 /X 2 0OHM ESPI_ALERT# L2 AMP_SLEEP# 1
25 EXT_SMI# PLTRST#/ECSMI#/GPD4
R3018 1 /X 2 0OHM EXT_SMI#_X1 N4 A4 Need external PU R3060 1 2 100KOhm
25 EXT_SCI# ECSCI#/GPD3 AC_IN#/GPB0
R3035 1 0OHM 2 EXT_SCI#_X1 F1 A3 AC_IN_OC# VSUS_ON
35 NKey_WRST GA20/GPB5 LID_SW#/GPB1 Need external PU LID_SW# 25,45,52,56
T7843 1 EC_GPB5 H4 D2 T7842
KBRST#/GPB6 CTX0/TMA0/GPB2
EC_GPB6 L1 A1 1 R3081 1 2 1MOhm
32 EC_RST# WRST# VSTBY0 +3VA
UX435 E2 E5
78 DGPU_LIMIT SSCE1#/GPG0 CRX0/GPC0 T7844
SL3012 1 2 B5 1
28 EC_SCK_PCH 0201 FSCK
GPG6 do not pull-up +3VA_EC EC_SCK_PCH_X1 D1 C2 R3024 1 2 0OHM
FDIO3/DSR0#/GPG6 GPC4 PM_SUSB# 26,27,58,70,88,96
SL3016 1 2 A6 PM_SUSB#_EC Virtual Wires reserved
28 EC_SO_PCH 0201 FMISO R3022 1 2 10KOhm
SL3017 1 2 EC_SO_PCH_X1 B6 E1
28 EC_SI_PCH 0201 FMOSI GPC6 BAT1_IN_OC# 89 PD_INT1#
SL3004 1 2 EC_SI_PCH_X1 A7 M2 BAT1_IN_OC# @ 1 2 R3054
28 EC_SCE#_PCH 0201 FSCE# RXD/SIN0/PWUREQ#/BBO/SMCLK2ALT/ GPC7 0402 NKEY_PWR_EN 35
T3012 1 EC_SCE#_PCH_X1 E7
SSCE0#/GPG2
GPG2 Pu for EC load code
EC_GPG2 N1 1 2 SL3015
RI1#/GPD0 0201 CPU_C10_GATE# 27
J12 N3 EC_GPD0 +3VA_DSW
44 KSI0_EC KSI0/STB# RI2#/GPD1 ME_AC_PRESENT 27
J13 N7
44 KSI1_EC KSI1/AFD# GINT/CTS0#/GPD5 OP_SD# 37
J9 M11
44 KSI2_EC KSI2/INIT# TACH0A/GPD6 FAN1_TACH 50
H12 M12 Reserve for GPB5 OD PM_PWRBTN# test
44 KSI3_EC KSI3/SLIN# TACH1A/TMA1/GPD7 FAN2_TACH 50
H9 R3032 1 2 100KOhm
44 KSI4_EC KSI4
H10 N2 1 2 SL3009 PM_PWRBTN#
44 KSI5_EC KSI5 SMCLK4/L80HLAT/BAO/GPE0 0201 SUSB_EC# 26,27,57,70,88,96
@ T3020 1 H13 A13 EC_GPE0 1 2 SL3010 1 2
KSI6 EGAD/GPE1 SUSC_EC# 38,52 R3016 10KOhm
@ T3021 1 EC_KSI6 G9 B12 EC_GPE1 0201
KSI7 EGCLK/GPE3 5VSUS_ON 87 THRO_CPU#
EC_KSI7 A12 +3VS
EGCS#/GPE2 1.2V_ON 86 @
M8 A5
44 KSO0_EC KSO0/PD0 GPE4/BTN# VSUS_ON 84,88
J7 N8
44 KSO1_EC KSO1/PD1 RTS1#/GPE5 3VADSW_ON 87,88
N9 M1 T3015
44 KSO2_EC KSO2/PD2 TXD/SOUT0/LPCPD#/GPE6
M9 M3 EC_GPE6 1 1 R3042 2 R3085 1 2 10KOhm nbs_r0201_h12_000s
44 KSO3_EC KSO3/PD3 SMDAT4/L80LLAT/GPE7 THRO_CPU# 23
K8 EC_GPE7 100Ohm IMVP9_PWRGD
44 KSO4_EC KSO4/PD4
J8
44 KSO5_EC KSO5/PD5
N10 F4 SL3008 1 2
44 KSO6_EC KSO6/PD6 FDIO2/DTR1#/SBUSY/GPG1/ID7 0201 ADP_INSERT_NG# 89
M10 EC_GPG1
44 KSO7_EC KSO7/PD7
@ T3022 1 N11 +3VA_EC +1.8VSUS
KSO8/ACK#
EC_KSO8 K9
KSO9/BUSY
@20200615_由GPG6改GPG1 for EC Change
44 KSO9_EC
@ T3004 1 N12 E6 @
KSO10/PE VFSPI
@ T3005 1 EC_KSO10 N13 R3039 1 2 10KOhm
KSO11/ERR#
@ T3007 1 EC_KSO11 M13 D8 T3006 ESPI_ALERT# nbs_r0201_h12_000s
KSO12/SLCT CLKRUN#/GPH0/ID0
@ T3008 1 EC_KSO12 L12 E8 EC_GPH0 1
KSO13 CRX1/SIN1/SMCLK3/GPH1/ID1 SMB3_CLK 12,28,93
@ T3018 1 EC_KSO13 L13 D7 SMB3_CLK
KSO14 CTX1/SOUT1/SMDAT3/GPH2/ID2 SMB3_DAT 12,28,93
@ T3019 1 EC_KSO14 K12 A9 SMB3_DAT
KSO15 GPH3/ID3 PM_RSMRST# 27,58
R3043 1 2 0OHM EC_KSO15 K13 B8
27,32,33,40,41,58,59,70 BUF_PLT_RST# KSO16/SMOSI/GPC3 GPH4/ID4 DPWROK_EC 12,27,58
R3025 1 2 0OHM J10 A8
27,57,58,86 PM_SUSC# KSO17/SMISO/GPC5 GPH5/ID5 PM_PWROK 27
PM_SUSC#_EC B7 1 2 SL3003
Virtual Wires reserved GPH6/ID6 0201 PM_SYSPWROK 27
F2 EC_GPH6
35 NKey_INT# GPJ6
@ T3013 1 G1 G10 1 2 SL3011
GPJ7 ADC0/GPI0 0201 PM_SLP_SUS# 27,58
NVDD_SMB_SEL G13 EC_GPI0
ADC1/GPI1 3VSUS_PWRGD 58
A11 G12
27 PM_PWRBTN# PS2CLK0/TMB0/CEC/GPF0 ADC2/GPI2 ALL_SYSTEM_PWRGD 4,58,59,80
0OHM 2
PM_PWRBTN#
@ 1 R3026 B11 F9
11,12,23 TBT_FORCE_PWR PS2DAT0/TMB1/GPF1 ADC3/GPI3 IMVP9_PWRGD 27,80
A10 F13 IMVP9_PWRGD 1 2 SL3014
59,60,89,90 P_SMB0_CLK SMCLK0/GPF2 ADC4/GPI4 0201 3VA_DSW_PWRGD 27,58,87
Battery,Charger B10 F10 EC_GPI4
59,60,89,90 P_SMB0_DAT SMDAT0/GPF3 ADC5/DCD1#/GPI5 MB_MAX_POWER 89
T3010 1 D9 F12 MB_MAX_POWER
PS2CLK2/GPF4 ADC6/DSR1#/GPI6 AD_MAX_POWER 89
T3011 1 B9 E13 A/D_MAX_POWER
PS2DAT2/GPF5 ADC7/CTS1#/GPI7 P_IADP_10 89
T3014 1 Pmon_ADC
B4 E12
32,56 PWR_SW# PWRSW/GPB3 TACH2A/GPJ0 T3009 @20200616_GN20未使用改留測點
A2 D13 EC_GPJ0 1
32,88 PS_ON_EC XLP_OUT/GPB4 TACH2B/GPJ1 GC_STATE_EC 25,70
B3 D12
28,35 SMB1_CLK_EC SMCLK1/GPC1 DAC2/TACH0B/GPJ2 PD_INT1# 12
Thermal sensor,Retimer B2 C13
28,35 SMB1_DAT_EC SMDAT1/GPC2 DAC3/TACH1B/GPJ3 LAN_PWR_EN 33
1 2 B1 B13
VCORE

R3033 43Ohm
23 PECI_EC SMCLK2/PECI/GPF6 DAC4/DCD0#/GPJ4 EC_OV_DDR 86
AVSS
VSS1

VSS2
VSS3
VSS4
VSS5

PECI_EC_R C1 C12
20 PCH_SPI_OV SMDAT2/PECIRQT#/GPF7 DAC5/RIG0#/GPJ5
ADAPTER_IN#_R
IT5125VG-128/CX
D6
K5
F5
G4
G5
H5
E10

06037-00370200
20200526更換料號
PM_RSMRST# remove pull down @ EC side
EC_12

R3065 1 2 10KOhm nbs_r0201_h12_000s


SUSB_EC# R3066 1 2 10KOhm nbs_r0201_h12_000s
EC_AGND SUSC_EC#
BGA 7.1*7.1*0.97
1

C3008
0.1UF/6.3V
Support Slave CHG ITE5125 GPD2 need pull down for EC load code
(Prevent from leakage)
2

nbs_c0201_h13_000s R3010 1 2 75KOHM


ESPI_RST#
EMI request
+3VA_EC

IT5125VG-128/CX (128KB) (06037-00370000) ? PM_SUSC#


R3002
R3003
1
1
2
2
100KOhm
100KOhm
LID_SW# BUF_PLT_RST# IT5125VG-192/CX (192KB)(06037-00370200) PM_SUSB#
R3009 1 2 100KOhm
1

NKey_WRST

1
1

@ D3001 D3002
C3012 R3094
@ @
100KOhm R3011 100KOhm
2.2UF/6.3V
LAN_PWR_EN 1 2
2

VPORT0402L331V05 VPORT0402L331V05 PM_SUSC# D8802 R3090 100KOhm


2

2
1 EC_OV_DDR 1 2
1

D3006 3
IECS0305C040FR ADAPTER_IN#_R 2
GND GND GND ADAPTER_IN# 89

@ BAT54AW
2

SUSC_EC# PWR_SW#
1

D3003 D3004 GND


@ @

PM_SUSB#
VPORT0402L331V05 VPORT0402L331V05
2

D3007
IECS0305C040FR
GND GND @
2

SUSB_EC# GND
1

EC_RST#
D3005
1

@ D3008
IECS0305C040FR
VPORT0402L331V05 @
2

GND

GND

<Variant Name>

Project Name Rev

UX482 R0.1

Title : CR_KBC_IT8521
Size
D
Dept.: NB1-RD3EE2 Engineer: EE
Date: Monday, July 13, 2020 Sheet 30 of 102
1nd NGFF PCIE x4 (PCIE & SATA) +3VS +3VS_SSD1

SL4101
+3VS_SSD1 +3VS_SSD1
1 2
0805

NGFF_SSD @

1
R4101 SL4102
10KOhm 1 2
0805
J4102

2
@
1 2
1 2
3 4
3 4
5 6
21 PCIE9_RXN_NGFF1_L3 5 6
PCIE9 7 8
21 PCIE9_RXP_NGFF1_L3 7 8

1
9 10
9 10 DAS_DSS_LED1# 40 C4101 C4102 C4103 C4108 C4104 C4105
NGFF1 PCIE Lane3 C4107 1 2 0.22UF/10V 11 12 DAS_DSS_LED1# 8PF/25V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
21 PCIE9_TXN_NGFF1_L3 11 12
C4109 1 2 0.22UF/10V NGFF1_TXN3 13 14
21 PCIE9_TXP_NGFF1_L3 13 14

2
NGFF1_TXP3 15 16
15 16
17 18
21 PCIE10_RXN_NGFF1_L2 17 18
PCIE10 19 20
21 PCIE10_RXP_NGFF1_L2 19 20
21 22
NGFF1 PCIE Lane2 21 22
C4106 1 2 0.22UF/10V 23 24
21 PCIE10_TXN_NGFF1_L2 23 24

1
C4110 1 2 0.22UF/10V NGFF1_TXN2 25 26 C4112 C4113 C4114 C4111 C4115
21 PCIE10_TXP_NGFF1_L2 25 26

1
NGFF1_TXP2 27 28 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V C4120 C4121
27 28
29 30 22UF/6.3V 22UF/6.3V
21 PCIE11_RXN_NGFF1_L1 29 30

2
PCIE11 31 32 N/A N/A
31 32

2
21 PCIE11_RXP_NGFF1_L1
33 34
NGFF1 PCIE Lane1 33 34
C4116 1 2 0.22UF/10V 35 36
21 PCIE11_TXN_NGFF1_L1 35 36
C4117 1 2 0.22UF/10V NGFF1_TXN1 37 38
21 PCIE11_TXP_NGFF1_L1 37 38
For SATA PCIE colay NGFF1_TXP1 39 40 SATA1_DEVSLP_C
39 40
41 42
21 PCIE12_RXP_NGFF1_L0 41 42
43 44 GND
PCIE12/SATA1a 21 PCIE12_RXN_NGFF1_L0 43 44
45 46
45 46
NGFF1 PCIE Lane0 C4118 1 2 0.22UF/10V 47 48
21 PCIE12_TXN_NGFF1_L0 47 48
/SATA Port1 21 PCIE12_TXP_NGFF1_L0
C4119 1 2 0.22UF/10V NGFF1_TXN0 49
49 50
50 R4102 1 2 0Ohm
BUF_PLT_RST# 27,30,32,33,40,58,59,70
NGFF1_TXP0 51 52 NGFF1_PERST# BUF_PLT_RST#
51 52 CLKREQ6_NGFF1# 22
53 54 CLKREQ6_NGFF1# 1 T4103 @
22 CLK6_PCIE_NGFF1# 53 54
55 56 NGFF1_PEWAKE# 1 T4101 @
22 CLK6_PCIE_NGFF1 55 56
57 58 1 T4102 @
57 58

67 68 R4103 1 2 0Ohm
67 68 SUS_CLK 22,40,53
R4104 1 @ 2 0Ohm 69 70 NGFF1_SUSCLK @ SUS_CLK
69 70
NGFF1_CONFIG 71 72
71 72

NP_NC2
NP_NC1
+3VS_SSD1 73 74

SIDE2
SIDE1
73 74
R4105 75
75
0Ohm
21 SSD_DET1
@
1

R4106 MINI_PCI_75P_REMOV8

79
78

77
76
10KOhm
1

12003-00079400
3

Q4103B
R4107
EM6K1-G-T2R
2

10KOhm
5 GND GND
@
2

Pin69 Config NGFF PCIE


Umount R4028
6

Q4103A
EM6K1-G-T2R 12003-00079400
2 GND
1

HW_Control NGFF Device Sleep


Option NGFF1_CONFIG SSD_DET1 EMI @/PCIE
R4117 0Ohm H4102
PCIE SSD 1 0 SATA2_DEVSLP 21
NGFF1_PERST# SATA1_DEVSLP_C 1 2 N/A

SATA SSD 0 1 /Enable Devslp

1
R4108 CT236CB176D146
D4101 0Ohm 13020-01379900
VPORT0402L331V05
/X/EMI /Disable Devslp

2
2
GND
GND
GND 0911

13020-01379900
Close to Device connector

<Variant Name>

Project Name Rev

UX482 R0.1

Title : MiniCard_SSD
Size
Dept.: NB1-RD3EE2 Engineer: EE
D
Date: Monday, July 13, 2020 Sheet 41 of 102
PD project should use Silego solution for EC/RTC reset

+3VA_EC

R3201 1 2 100KOhm

D3203
BAT54CTB

2
3
1

EC_RST# 30

C3206 Press PWR_SW# 15s, than reset EC

1
C3205 0.1UF/6.3V
1UF/6.3V

2
Thermal Policy R3206 1
@
2 10KOhm
PS_ON_EC 30,88

1 2 D3206
RB751CS40 @
+3VA U3201 SN1409049DPUR VIL only 0.5V

8
1 2
@20200602 Follow GA502 R3203 0OHM
PS_ON 88

EC_RST#
PS_ON_D
1 2 SL3203 D3204
78 DGPU_THERML_SHDWN# 0201 1 7 1
VDD PS_ON SRTC_RST# 22
1 2 SL3201 2 6 R3221 1 @ 2 0Ohm 3
50 CPU_THERM# 0201 THERM# RTC_RST#
THERM#_S 3 5 RTC_RST#_S 2
Power_SW# GND RTC_RST# 22

BAT54CTB

PLT_RST#
30,56 PWR_SW# +3VA
Press PWR_SW# 20s clear RTC for ASUS CSC request

4
SLG4E43722V
06004-01330000

1
R3214
+3VA
1MOHM
27,30,33,40,41,58,59,70 PLT_RST#

3
EM6K1-G-T2R

1
R3220 5 Q3205B
100KOhm

4
@20200611_U3201改 06004-01330000 follow UX334

6
EM6K1-G-T2R

2
2 Q3205A C3207
RTC_RST#_U3201 0.01UF/16V

www.teknisi-indonesia.com

<Variant Name>

Project Name Rev

UX482 R0.1

Title : RST_Reset Circuit


Size
D
Dept.: NB1-RD3EE2 Engineer: EE
Date: Monday, July 13, 2020 Sheet 32 of 102
+3VSUS_LAN Main Board
+1V_LAN

The distance from U3301.24 to L3301 within 200 mil.

The distance from L3301 to C3347 within 200 mil.


R3305 2.49KOHM
1 2 TPC26T 1 T3301 @

+1V_LAN @20200615_換回較常用XTAL 但體積較大 for GA502 & GX502

X2_LAN
X1_LAN
+3VS

33/34 pin ground pad GND 07G010272501


need ground via

1
R3301 1 2 0Ohm 60 mil X3301
/LDO R3307 25.00MHZ
1KOhm 1 3
0.1UF/16V X1_LAN X2_LAN

2
+1V_LAN
C3304

33
32
31
30
29
28
27
26
25
U3301A

1
ISOLATEB

4
GND1
AVDD33_2
RSET
AVDD10_3
CKXTAL2
CKXTAL1
LED0

LED2
LED1/GPO

2
C3306 +/-30ppm/10PF C3307

1
R3322 10PF/50V 10PF/50V

2
1 24 GND 15KOhm
34 L_TRDP0 MDIP0 REGOUT
2 23 REGOUT_60
34 L_TRDM0 MDIN0 VDDREG +3VSUS_LAN
3 22 VDD_REG

2
AVDD10_1 DVDD10 +1V_LAN
4 21
34 L_TRDP1 MDIP1 LANWAKEB
5 20 PCIE_WAKE# 27,70 GND GND GND
34 L_TRDM1 MDIN1 ISOLATEB
6 19 ISOLATEB GND
34 L_TRDP2 MDIP2 PERSTB BUF_PLT_RST# 27,30,32,40,41,58,59,70
34 L_TRDM2
7
MDIN2 HSON
18 LAN_RST# X3301: 25MHZ +/-30ppm/10pF (3225)
8 17
AVDD10_2 HSOP

REFCLK_N
REFCLK_P
1st: P/N:07G010272501 TXC/7V25000011

AVDD33_1
CLKREQB
MDIN3
MDIP3

HSIN
HSIP
C3334 0.1UF/16V 2nd: P/N:07G010952500 HOSONIC/E3FB25
1 2
RTL8111H-CGT PCIE15_RXN_GLAN_X1 1 2 PCIE_LAN_RXN4 21
9
10
11
12
13
14
15
16
PCIE15_RXP_GLAN_X1 PCIE_LAN_RXP4 21
06112-00030200 C3335 0.1UF/16V

@20200528_change net name Realtek suggests 3V_LAN raise time >1ms

34 L_TRDP3 PCIE_LAN_CLKN 22 +3VSUS


L_TRDP3 +3VSUS_LAN
34 L_TRDM3 PCIE_LAN_CLKP 22
L_TRDM3 R3302
C3350 0.1UF/16V 1 2 0Ohm
+3VSUS_LAN
1 2 E_3VSUS_LAN_20
PCIE_LAN_TXN4 21
PCIE15_TXN_GLAN_X1 1 2
PCIE_LAN_TXP4 21
PCIE15_TXP_GLAN_X1
C3351 0.1UF/16V PEA28BA Q3304
CLKREQ1_LAN# 22 3
EMI Reserve

S
2 5

D
1
LAN_RST# U3301B

G
1

34
C3301 GND2

4
35
1000PF/50V GND3
36
N/A GND4
2

CLKREQ_GLAN#, PCIE_WAKE# 37
GND5 /NA
LAN_PWR_gate
should be PU on the host side

1
C3390
0.01UF/25V
GND

2
RTL8111H-CGT
/NA
GND
GND

+12VSUS +12VSUS

1
R3390 R3391
+3VSUS_LAN +1V_LAN 100KOhm 100KOhm
/NA /NA

2
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V LAN_PWR_gate
1

C3302 C3303
4.7UF/10V 4.7UF/10V C3342 C3341 C3326 C3327 C3328 C3336

3
pin3 pin8 pin22 pin30 EM6K1-G-T2R
pi32 pin11 pi32 pin11
2

5 Q3305B
LAN_PWR_gate_1

4
6
/NA
SL3385 EM6K1-G-T2R
1 2 2 Q3305A
30 LAN_PWR_EN 0402
GND

1
1
GND /NA C3392
/NA
0.1UF/25V

2
/NA

GND GND GND

Project Name Rev

GX550LXS R1.0

Title : LAN RTL8111GUX-CG


Size
C
Dept.: ASUSTeK COMPUTER Engineer: EE
Date: Monday, July 13, 2020 Sheet 33 of 102
3 4 RN3404B
0OHM
L_TRLM3_L_1 L_TRLM3_L
/@ Main Board

3
L3404
330OHM/100Mhz

2
1 2
0OHM
L_TRLP3_L_1 RN3404A L_TRLP3_L
/@

3 4 RN3403B
0OHM
L_TRLP1_L_1 L_TRLP1_L
/@

3
L3405
330OHM/100Mhz
@20200702_RF要求修改連線順序

2
U3401

2 23 1 2
33 L_TRDP0 TD1+ MX1+ 0OHM
L_TRDP0 L_TRLP0_L_1 L_TRLM1_L_1 RN3403A L_TRLM1_L
1 24 /@
TCT1 MCT1
LAN_VDDCT L_CMT0_L
3 22
33 L_TRDM0 TD1- MX1-
L_TRDM0 L_TRLM0_L_1

5 20 3 4 RN3402B
33 L_TRDP1 TD2+ MX2+ 0OHM
L_TRDP1 L_TRLP1_L_1 L_TRLP2_L_1 L_TRLP2_L
4 21 /@
TCT2 MCT2
L_CMT1_L

3
6 19
33 L_TRDM1
L_TRDM1
TD2- MX2-
L_TRLM1_L_1 L3406
330OHM/100Mhz
LAN Connector
8 17 J3402
33 L_TRDP2 TD3+ MX3+
L_TRDP2 L_TRLP2_L_1 8 10
8 P_GND2
7 18 L_TRLM3_L 7 12

2
TCT3 MCT3 7 NP_NC2
L_CMT2_L L_TRLP3_L 6
6
9 16 L_TRLM1_L 5
33 L_TRDM2 TD3- MX3- 1 2 5
L_TRDM2 L_TRLM2_L_1 0OHM L_TRLM2_L 4
L_TRLM2_L_1 RN3402A L_TRLM2_L 4
L_TRLP2_L 3
3
11 14 /@ L_TRLP1_L 2 11
33 L_TRDP3 TD4+ MX4+ 2 NP_NC1
L_TRDP3 L_TRLP3_L_1 L_TRLM0_L 1 9
1 P_GND1
10 15 L_TRLP0_L
TCT4 MCT4
L_CMT3_L
3 4 RN3401B LAN_JACK_8P
12 13 0OHM
33 L_TRDM3 TD4- MX4- L_TRLM0_L_1 L_TRLM0_L 12014-00692000
1

C3401 L_TRDM3 L_TRLM3_L_1


N/A 0.1UF/25V GST5009 /@ LAN_GND
2

3
L3407
330OHM/100Mhz

GND

2
1 2
0OHM
L_TRLP0_L_1 RN3401A L_TRLP0_L
/@

R3401 75Ohm
EMI
1 2 C3406 1000PF/50V
L_CMT0_L GND_LAN_T 1 2 @
nbs_c0603_h37_000s
R3402 75Ohm
1 2 C3404 1000PF/50V
L_CMT1_L 1 2 @
nbs_c0603_h37_000s
R3403 75Ohm
1 2 C3403 1000PF/50V
L_CMT2_L 1 2 @
R3404 75Ohm nbs_c0603_h37_000s
1 2
L_CMT3_L C3402 1000PF/50V
1

1 2 @
C3405 nbs_c0603_h37_000s
1000PF/2KV
2

GND LAN_GND

LAN_GND Place near chassis GND


D3401,D3402 ESD Diode
GND_LAN_T 上禁止加任何零件
1st Source: P/N:07024-00200200 AMAZING/AZC099-04SP.R7G

2nd Source: P/N:07024-00710000 NXP/PUSB2X4D

+3VSUS +3VSUS

L_TRDM0 L_TRDP2 L_TRDP1 L_TRDP3


I/O4

I/O4
I/O3

I/O3
VDD

VDD
4

D3401 D3402
AZC099-04SP AZC099-04SP

D3401,D3402 ESD Diode


DIODE 橫擺 1st Source: P/N:07024-00200200 AMAZING/AZC099-04SP.R7G

2nd Source: P/N:07024-00710000 NXP/PUSB2X4D


Project Name Rev
07024-00200200 07024-00200200
I/O2

I/O2
I/O1

I/O1
GND

GND
3

GX550LXS R1.0

N/A N/A Title : LAN_RJ45_CON


L_TRDP0 L_TRDM2 L_TRDM1 L_TRDM3
GND GND Size
Dept.: ASUSTeK COMPUTER Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 34 of 102
<Variant Name>

Project Name Rev

UX482 R0.1

Title : CB-****
Size
Dept.: NB1-RD3EE2 Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 43 of 102
Add @20190422A
Change DSW to SUS
N_KEY_IT8299E Nkey_Power For EC Reset N_key Pull up @20181009

Change DSW to SUS +3VSUS_NKeyPWR

+5VS_LED_KB +3VSUS_NKeyPWR
@20181009 +3VSUS_NKeyPWR

+5VSUS
U3502 D3507重新叫料 @20190909A R3556 1 2 10KOhm
17 N/A SMCLK0_8299

2
GND4

2
16 C3507 NKey_WRST# R3557 1 2 10KOhm

1
GND3
15 0.1UF/25V R3516 D3507 SMDAT0_8299

1
GND2
1 14 C3505 N/A C3515 C3516 C3517 C3518 C3519 100KOhm RB520CM-30T2R R3513 1 2 10KOhm

2
VIN1_1 VOUT1_2
2 13 0.1UF/25V /@ Q3501A Mic_mute#

0.01UF/25V
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V

6
VIN1_2 VOUT1_1
0Ohm R3503 3 12 1 2 N/A N/A N/A N/A N/A 07004-00110300 EM6K1-G-T2R R3515 1 2 10KOhm

0.01UF/25V

2
ON1 CT1

1
1 2 +5VS_LED_KB_ON_10 4 11 +5VS_LED_KB_CT_10 2 /MG Gaming_center#

PC3502
VBIAS GND1 30 NKey_WRST
30 NKEY_PWR_EN 0Ohm R3504 5 10 R3562 1 2 10KOhm

1
PC3501
ON2 CT2
1 2 NKeyPWR_ON_10
@ 6 9 +3VSUS_NKeyPWR_CT_10 1 2 NKey_WRST# Volume_down#
VIN2_1 VOUT2_2
0.1UF/25V

1
7 8 C3501 R3561 1 2 10KOhm
VIN2_2 VOUT2_1
C3506 N/A Change DSW to SUS

1
GND 1UF/6.3V C3548 GND Q3501B Volume_up#

3
1
SN1409049DPUR
@20181009 N/A 1UF/6.3V EM6K1-G-T2R R3514 1 2 10KOhm

2
@ @ 5 /MG NKEY_INT#
Change DSW to SUS

4
Add @20190422A

1
@20181009 C3510 C3511 C3512 C3513 GND GND

+3VSUS L3501
+3VSUS_NKeyPWR 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
1 2

1
120Ohm
@ C3508 Add C3502,C3503,C3504,C3509
100PF/50V GND
C3510,C3511,C3512,C3513

2
N/A
@20181116A
L3502 @0312 Change by Vicent,

1
1

1
1 2 for N-key device lost C3514 C3502 C3503 C3504
+5VSUS 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V C3509
120Ohm /NA 1000PF/50V @20190227A

2
TVL7533PDQNR add 10uf for PSRR 400-700K approaching 40db N/A
@0312 Change by Vicent,
Imax=1.5A U3509
Imax=500mA Add @20190422A for N-key device lost
4 1
IN OUT
+3VS_NKeyPWR GND Change DSW to SUS
+3VSUS_NKeyPWR
@20181009
GND2

3 2
EN GND1

IT8299E
NKEY_PWR_EN
TLV75533PDQNR
5

1
C3552
1

10UF/6.3V

2
C3549
1UF/6.3V R3532 1 2 0Ohm
31 KSI0 USB2_DP 21
2

GND GND R3534 1 2 0Ohm


31 KSI1 USB2_DN 21
31 KSI2

USB_1_DP0_R
USB_1_DM0_R
31 KSI3
GND
31 KSI4 GND
GND
Change NKEY PWR solu�on @20191003A 31 KSI5

+3VSUS_NKeyPWR
Delete T3501 & SCAN_LINE_2
CAP_LED --> GPC7

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
U3503
@20191120A +3VSUS_NKeyPWR

DP
DM
VSS4
PWM15/GSW7/GPB7
KSI5/GPD5
KSI4/GPD4
KSI3/SLIN#/GPD3
KSI2/INIT#/GPD2
KSI1/AFD#/GPD1

VSTBY33_4
KSI0/STB#/GPD0

KSO16/TACH0A/SSCK0/GPG0
GCLK0/SMISO0/PWM0/GPA0

SSCK0/PWM1/GPA1
SMOSI0/PWM2/GPA2
SMISO1/KSO17/TACH1A/GPG1
2
6 1 1
56 CAP_LED# SMDAT2/GPC7
/NKEY_power_control# CAP_LED# 2 48
31 KSI6 KSI6/GPD6 SSCE0#/PWM3/GPA3
Q3597A 3 47
31 KSI7 KSI7/GPD7 SMISO1/PWM4/GPA4 ITE8299_PWR_LED 56
EM6K1-G-T2R 4 46
30 NKEY_INT# RXD/SMISO0/GPC5 PWM11/GSW3/GPB3
T3504 @ 1 5 45
TXD/GPC4 PWM10/GSW2/GPB2
@ 6 44
WRST# VSS3 GND
R3560 0Ohm NKey_WRST# 7 43
28,30 SMB1_CLK_EC SMCLK0/GPC0 KSO8/ACK#/GPF0 KSO8 31
R3559 2 1 0Ohm SMCLK0_8299 8 42
28,30 SMB1_DAT_EC SMDAT0/GPC1 KSO9/BUSY/GPF1 KSO9 31
2 @ 1 SMDAT0_8299 9 41
31 Mic_mute# SMCLK1/GPC2 PWM12/GSW4/GPB4
SMCLK1_8299 10 40
Q3597B 31 Gaming_center# SMDAT1/GPC3 KSO10/PE/GPF2 KSO10 31
SMDAT1_8299 11 39
31 KSO7 KSO7/PD7/GPE7 KSO11/ERR#/GPF3 KSO11 31
EM6K1-G-T2R +3VSUS_NKeyPWR 12 38

STRIP1/SMCLK2/TACH2D/GPC6
31 KSO6 KSO6/PD6/GPE6 KSO12/SLCT/GPF4 KSO12 31
13 37
For ESD 3 4
GND
14
15
VSTBY33_1
VSS1
KSO13/GPF5
VSTBY33_3
36
KSO13 31

STRIP0/TACH1D/GPH2
N/A C3528 35
GND VCOREB2 KB_BACK_LED_R 31

SSCE1#/PWM7/GPA7
PWM13/GSW5/GPB5

SMOSI1/PWM6/GPA6
SSCK1/PWM5/GPA5
2 1 0.1UF/25V IT8299_VCOREB2 16 34 KB_BACK_LED_R

PWM8/GSW0/GPB0
KSO5/PD5/GPE5 PWM14/GSW6/GPB6

5
1 2 33

KSO4/PD4/GPE4
KSO3/PD3/GPE3
KSO2/PD2/GPE2
KSO1/PD1/GPE1
KSO0/PD0/GPE0
C3546
/NKEY_power_control# PWM9/GSW1/GPB1
N/A 2.2UF/6.3V

KSO15/GPF7
KSO14/GPF6
A5 --> B5 @20191104B

VSTBY33_2
C3520 2 1 390PF/50V C3530 2 1 390PF/50V

VCOREB
31 KSO5
KSI0 KSO0

VSS2
R3501 1 @ 2 10KOhm R3535 1 @ 2 10KOhm
nbs_r0201_h12_000s nbs_r0201_h12_000s +3VSUS_NKeyPWR
Volume_down# : GPC4 <-> GPH2 IT8299E-120A/CX

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
+3VSUS_NKeyPWR
KSI1
C3521 2 1 390PF/50V
KSO1
C3531 2 1 390PF/50V
@20191120A 06037-00430000

R3518 1 @ 2 10KOhm R3536 1 @ 2 10KOhm

1
nbs_r0201_h12_000s nbs_r0201_h12_000s R3528 1 /EC_ITE 2 0Ohm
31 Volume_up#
GPC6

IT8299_VCOREB
2 1 2 1 1 /EC_ITE 2 T3502
C3522 390PF/50V C3532 390PF/50V R3508 0Ohm
31 Volume_down#
KSI2 KSO2 GPH2 @
R3519 1 @ 2 10KOhm R3537 1 @ 2 10KOhm C3546 10UF --> 2.2UF KSO14 31
nbs_r0201_h12_000s nbs_r0201_h12_000s
@20191127A 31 KSO4 KSO15 31
31 KSO3
C3523 2 1 390PF/50V C3533 2 1 390PF/50V
KSI3 KSO3
31
31
KSO2
KSO1
Add T3502 @20191104B
R3520 1 @ 2 10KOhm R3538 1 @ 2 10KOhm
31 KSO0
nbs_r0201_h12_000s nbs_r0201_h12_000s
Change net name
OW1 --> GPC6

1
C3524 2 1 390PF/50V C3534 2 1 390PF/50V C3547 C3529

2
KSI4 KSO4 C3547 10UF --> 2.2UF 2.2UF/6.3V 0.1UF/25V
R3521 1 @ 2 10KOhm R3539 1 @ 2 10KOhm GPIO_INT# --> GPH2 @20191127A N/A N/A

1
A5 --> B5 @20191104B

2
nbs_r0201_h12_000s nbs_r0201_h12_000s
@20191204A
C3525 2 1 390PF/50V C3535 2 1 390PF/50V
KSI5 KSO5 GND GND
R3522 1 @ 2 10KOhm R3540 1 @ 2 10KOhm
nbs_r0201_h12_000s nbs_r0201_h12_000s

C3526 2 1 390PF/50V C3536 2 1 390PF/50V


KSI6
R3524 1 @ 2 10KOhm
nbs_r0201_h12_000s
KSO6
R3541 1 @ 2 10KOhm
nbs_r0201_h12_000s
@20200630_料號change 06037-00430000
C3527 2 1 390PF/50V C3537 2 1 390PF/50V
KSI7 KSO7
R3525 1 @ 2 10KOhm R3542 1 @ 2 10KOhm
nbs_r0201_h12_000s nbs_r0201_h12_000s

GND GND

C3538 2 1 390PF/50V
KSO8 C3542 2 1 390PF/50V
R3543 1 @ 2 10KOhm KSO12
nbs_r0201_h12_000s R3547 1 @ 2 10KOhm
nbs_r0201_h12_000s
C3539 2 1 390PF/50V
KSO9 C3543 2 1 390PF/50V
R3544 1 @ 2 10KOhm KSO13
nbs_r0201_h12_000s R3548 1 @ 2 10KOhm
nbs_r0201_h12_000s
C3540 2 1 390PF/50V
KSO10 C3544 2 1 390PF/50V
R3545 1 @ 2 10KOhm KSO14
nbs_r0201_h12_000s R3549 1 @ 2 10KOhm
nbs_r0201_h12_000s
C3541 2 1 390PF/50V
KSO11 C3545 2 1 390PF/50V
R3546 1 @ 2 10KOhm KSO15
nbs_r0201_h12_000s R3550 1 @ 2 10KOhm
nbs_r0201_h12_000s

GND
GND

Title : LAN_*****
ASUSTeK COMPUTER
Engineer: Gaming RD
Size Project Name Rev

Custom G711GW 1.0

Date: Monday, July 13, 2020 Sheet 35 of 102


+5VS

@20200618_Del 1.8VS 在P88 Power已有


+5VS_PVDD_1
+5VS_AUDIO
+5VS_AUDIO +5VS +3VS +1V8_AUD_DVDD
SL3613
Analog 0Ohm NA R3634
1 2 1 2
0603 60mils

1
120mils L3601
Digital Place next to PIN41 +1.8VS

1
@ 3A 120Ohm C3603 C3605
1 2 0Ohm /@ R3638 C3604 C3610 10UF/6.3V 0.1UF/16V
MOAT

2
1

1 2 10UF/6.3V 0.1UF/16V

2
1

1
D3601 nbs_l0603_h37_000s
AZ2015-01H.R7F C3617 C3601 GND_AUDIO GND_AUDIO
+3VA +3VA_AUDIO

1
@ Digital 10UF/6.3V 0.1UF/16V

2
SL3615 C3609 C3602 @ GND
1 2 0.1UF/16V 10UF/6.3V Place next to PIN3 Place next to PIN38

2
0603

@ GND
+1.8VS +1.8VS_codec +1.8VS
Digital Analog
2

SL3619 +1V8_AUD_DVDD_IO
Max = 4W
1 2 R3622
0603 Power Efficiency:80% ->5 W
GND 1 2
I=1A@5V +5VS_PVDD_2
@ 60mils

1
GND 0Ohm
Place next to PIN46

1
C3623
10UF/6.3V C3612

2
0.1UF/16V

2
1

1
C3642 C3611
10UF/6.3V 0.1UF/16V
MOAT

2
@ GND

Place next to PIN17 DETECTION


SL3616
1 2 GND
0603 +1.8VS_codec Place close to pin 48
R3606 1 2 100KOhm
+1V8_AUD_DVDD
@ SL3617 0214 LY request to small size Max = 4W
1 2
Power Efficiency:80% -> 5 W
20 mils Need to be 1%
0603
I=1A@5V HPOUT_JD FOR Single 4-Pole JACK DETECT.

1
@ @

1
C3625
C3614 C3615 0.1UF/16V R3603 1 2 200KOHM
TOU_CON 37

2
+3VA_AUDIO
10UF/6.3V 0.1UF/16V

2
Need to be 1%
PCB trace width of GND
Ring2 & SLEEVE at least 40 mil
GND_AUDIO

1
GND GND_AUDIO @ GND_AUDIO
C3618
Place next to PIN19
@20200612_MIC2_R_SLEEVE & MIC2_L_RING2 0.1UF/16V

2
C3627 0.1UF/16V
at least 40 mil
Remove LINE1_JD

1
1
@ 2 C3630
Place next to PIN37
10UF/6.3V GND_AUDIO
@20181011D
37 MIC2_R_SLEEVE

2
C3631 0.1UF/16V MIC2_R_SLEEVE C3620
37 MIC2_L_RING2 LINE1_R 37
1
@ 2 MIC2_L_RING2 LINE1_R 2 1
37 MIC2_VREFO_R LINE1_L 37 GND_AUDIO
MIC2_VREFO_R LINE1_L LDO1_CAP
37 MIC2_VREFO_L
MIC2_VREFO_L
37 HPOUT_L 10UF/6.3V

MIC2-CAP
HPOUT_L C3608 2 1 4.7UF/6.3V
37 HPOUT_R
HPOUT_R 20180108 防漏電
R3609 1 2 100KOhm

VREF
GND GND_AUDIO
TBD 25
26 GND_AUDIO
27
28
29
30
31
32
33
34
35
36
U3601A

11/27 EMI request

VREF
AVSS1
MIC2-CAP
5VSTB/AUX_MODE
MIC2-VREFO-R
MIC2-VREFO-L
HPOUT-R(PORT-I-R)

LINE1-R(PORT-C-R)
HPOUT-L(PORT-I-L)

LINE1-L(PORT-C-L)
MIC2-R(PORT-F-R)/SLEEVE
MIC2-L(PORT-F-L)/RING2

R3623 0OHM
45 DMIC_CLK
1 2 DMIC_CLK_U3601
+5VS_AUDIO
+1.8VS_codec CPVEE LDO1-CAP
C3619 2 1 2.2uF/10V 24 37
/EAPD/DMIC-CLK-IN

GND_AUDIO CBN AVDD1


CPVEE 23 38 LDO1_CAP
CBP LINE2-L(PORT-E-L) +5VS_PVDD_1
C3622 2 1 2.2uF/10V CBN 22 39
AVSS2 LINE2-R(PORT-E-R)
CBP 21 40
LDO2-CAP PVDD1
C3637 2 1 4.7UF/6.3V 20 41
GND_AUDIO CPVDD/AVDD2 SPK-OUT-L+
+1V8_AUD_DVDD_IO LDO2 19 42
LDO3-CAP SPK-OUT-L- H_SPKL+_CODEC 39
C3606 2 1 4.7UF/6.3V 18 43
GND DVDD-IO SPK-OUT-R- H_SPKL-_CODEC 39
I2S-EN/SPDIF-OUT/DMIC-DATA34

LDO3 17 44 R3624 0OHM


AUDIOLINK_SDATA-OUT SPK-OUT-R+ H_SPKR-_CODEC 39 45 DMIC_DATA
20 ACZ_SDOUT_AUD 16 45 1 2 DMIC_DATA_U3601
AUDIOLINK_SDATA-IN PVDD2 H_SPKR+_CODEC 39
R3607 1 2 33Ohm A_Z_SDOUT_AUD 15 46 U3601B
20 ACZ_SDIN0_AUD AUDIOLINK_SYNC I2S-IN/I2S-OUT-JD(JD3)
A_Z_SDIN0_AUD_X1 14 47 1 T3606 50
20 ACZ_SYNC_AUD
R3612 0OHM A_Z_SYNC_AUD 13
AUDIOLINK_BCLK Analog HP/LINE1-JD(JD1)
48 I2S_OUT_JD N/A 51
PVSS2
20 ACZ_BCLK_AUD
1 2 A_Z_BCLK_AUD Pin19~Pin40 PVSS1
49 HPOUT_JD +5VS_PVDD_2 52
PVSS3
Note R3607 PVSS4
53
I2S-MCLK/I2S-OUT2

GPIO0/DMIC-DATA12

RN2001 33ohm for HDA 3.3V PVSS5


54
EMI request RN2001 33ohm for HDA 1.8V PVSS6
GPIO1/DMIC-CLK

55
Digital 56
PVSS7
PVSS8
57
AZ_B-AUD-S (S5_1.8)_FP6 (FDS) 58
PVSS9
PVSS10
I2S-LRCK

I2S-BCLK
I2S-OUT1

I2C-DATA

GND
I2C-CLK
I2S-IN

ALC3288-CG
DVDD

GND 06103-00360100
PDB

Remove ESS ALC3288-CG


9
8
7
6
5
4
3
2
1
12

10
11

@20181008G 06103-00360100 EAPD#: Pin 1 by verb table define

nbs_qfn_48p_9v_000 EAPD# 37
EAPD#

R3605 0OHM
DLY_OP_SD# 37
DLY_OP_SD#_AUD 1 2
+1V8_AUD_DVDD
@ T3607 1 I2S_OUT2_1

@ TPC12T T3603
@ TPC12T T3605 1 I2C_CLK_U3601
1 I2C_DAT_U3601
DMIC_CLK_U3601
DMIC_DATA_U3601

U3601A, U3601B 06103-00360000 --> 06103-00360100


@20191118A

ACZ_BCLK_AUD DMIC_CLK
1

C3626 C3607
22PF/50V 22PF/25V
2

@ @

GND GND

Please reserve close to chip Please reserve close to chip Please reserve close to chip Please reserve close to chip Please reserve close to chip Please reserve close to chip

0221 change to 0201 for LY routing

<Core Design>

Project Name Rev

GX531GX 1.0

Title : AUD ALC3288-CG


Size
Dept.: Engineer:
ASUSTeK COMPUTER INC. NB1 EE
D
Date: Monday, July 13, 2020 Sheet 36 of 102
Main Board
Headphone&MIC

A_GND / GND

C3709 2 1 0.1UF/16V

C3710 2 1 0.1UF/16V

C3708 2 1 0.1UF/16V EMI


36 MIC2_VREFO_R

GND MIC_MIX_CON
GND_AUDIO
MIC2_L/RING_CON MIC_MIX_CON MIC2_L/RING_CON

1
36 MIC2_VREFO_L

1
D3703
C3713 AZ5123-01F.R7GR C3714 D3701
HP & MIC Connector
HP & MIC Connector 100PF/50V 100PF/50V AZ5123-01F.R7GR

2
N/A N/A

2
2

2
R3710 R3714
2.2KOhm 2.2KOhm J3701
GND_AUDIO GND_AUDIO
6
6 GND_AUDIO
MIC_MIX_CON 4
36 TOU_CON 4 GND_AUDIO

1
R3702 1 2 0Ohm TOU_CON 5
36 MIC2_R_SLEEVE 5
@20200612_For Vender change @20200612_For Vender change
MIC_MIX_CON
1
1
R3705 1 2 0Ohm HP_L_R_R_CON 2
36 MIC2_L_RING2 2
MIC2_L/RING_CON HP_R_R_R_CON 3
3
MIC2_L/RING_CON

1
AUDIO_JACK_6P
C3712 C3711 12014-00718100
100PF/50V 100PF/50V

2
GND_AUDIO

GND_AUDIO GND_AUDIO

R3712 75Ohm 1% L3704 1 2 120OHM/100Mhz


HP_R_R R3713 1 2 75Ohm HP_R_R_R
1% L3701 1 2 120OHM/100Mhz HP_R_R_R_CON
HP_L_R 1 2 HP_L_R_R HP_L_R_R_CON

1
R3711 R3708
1KOHM 1KOHM C3703 C3704
@ @ 100PF/50V 100PF/50V

2
@ @

1
GND_AUDIO
GND_AUDIO

2016.09.06 Add DEPOP solution


Q3757A Q3758A
UM6K1N /NA UM6K1N /NA
1 6
36 HPOUT_R
AC_HP_L_0 6 1

MUTE
2

2
MUTE_POP#
5

5
4 3
36 HPOUT_L
AC_HP_R_0 3 4
Q3757B /NA Q3758B /NA
UM6K1N UM6K1N

C3705 2 1 4.7UF/6.3V R3704 1 /@ 2 0Ohm


36 LINE1_R
HP_R_R
MLCC 4.7UF/6.3V (0402) X5R 20%
C3706 2 1 4.7UF/6.3V R3703 1 /@ 2 0Ohm
36 LINE1_L
HP_L_R
MLCC 4.7UF/6.3V (0402) X5R 20%

MUTE CONTROL +12VS


1

R3709
+3VA 100KOhm
Follow X409J
+3VS
2

R3716
1

R3707 1 2
3

Q3759B 10KOhm MUTE_POP#


5 EM6K1-G-T2R R3706
10KOhm
1

100KOhm
4

Q3760B C3707
D3702 5 EM6K1-G-T2R 2.2UF/16V
1

BAT54AW Q3760A
4
6

1
30 OP_SD#
3 2 EM6K1-G-T2R
2 UX334 add for Mic C3986
1

36 EAPD#

Tony 0122 D3902 Change to 07G004068011 (UX435)

DLY_OP_SD# 36
DLY_OP_SD#

+3VS
VTH MAX=1.5V, ACZ1.8V min=1.62V

MUTE CONTROL new solution for 1.8V HDA BUG 0318


1

R3715
10KOhm
6

Q3759A
2

2 EM6K1-G-T2R
20 ACZ_OP_SD
1

Project Name Rev

GX531GX 1.0

Title : AUDIO ALC3236-CG/VB2 Jack


Size
D
Dept.: Engineer:
ASUSTeK COMPUTER INC. NB1

Date: Monday, July 13, 2020 Sheet 37 of 102


<Variant Name>

Project Name Rev

UX482 R0.1

Title : CRT_D-Sub
Size
Dept.: NB1-RD3EE2 Engineer: EE
B
Date: Monday, July 13, 2020 Sheet 46 of 102
Main Board

<Variant Name>

Project Name Rev

UX482 R0.1

Title : Display Port


Size
Dept.: NB1-RD3EE2 Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 47 of 102
USB3.1_Port3
USB3.1 Direct

C3842 1
N/A 2 0.1UF/25V
21 U3_U3TXDN3
C3843 1
N/A 2 0.1UF/25V U3_U3TXDN3_DI U3_U3TXDN3_DI U3_U3TXDN3_X3
21 U3_U3TXDP3
U3_U3TXDP3_DI U3_U3TXDP3_DI U3_U3TXDP3_X3
R027 N/A 0Ohm
21 U3_U3RXDN3
R016 1 N/A 2 0Ohm U3_U3RXDN3_DI U3_U3RXDN3_DI U3_U3RXDN3_X2
21 U3_U3RXDP3
1 2 U3_U3RXDP3_DI U3_U3RXDP3_DI U3_U3RXDP3_X2
Power switch 2A:
Main source: 06016-00030100

USB2.0 EMI-Protection With ECMF(PCB 1.05mm_10Layer)


+5VSUS +5V_USBA +5V_USB1
USB3.1 Gen1 Port 3
From PCH USB2.0 Port
@20200612_for layout change 10L 5
U3802
1 1
L3803
2 1
J3803

IN OUT VBUS
2 E_5V_USB1_60 2
GND D-

1
@20200529_USB3 Change USB4 4
EN/EN# FLT#
3 1 C3832 80Ohm/100Mhz USB_PN3_X2 3
D+

1
T3801 + C3853 C3835 C3833 USB_PP3_X2 4
GND
@20200708_P1&P2互換與P3&P4互換

1
TPS2001DDBVR 47UF/6.3V 22UF/6.3V 100UF/6.3V 0.1UF/25V 5
STDA_SSRX-

2
C3851 C3852 @ U3_U3RXDN3_C 6
U3801 STDA_SSRX+ USB Port0

2
10UF/6.3V 1UF/6.3V U3_U3RXDP3_C 7
CO-LAY GND_DRAIN

2
1 3 8
21 USB_PP4
USB_PP4
Via_Input1 Via_Output1
USB_PP3_X2 U3_U3TXDN3_C 9
STDA_SSTX-
STDA_SSTX+
Le� connector
2 4 GND GND U3_U3TXDP3_C
21 USB_PN4 Via_Input2 Via_Output2
USB_PN4 USB_PN3_X2 GND GND USB2.0: USB Port3 10
P_GND1
GND GND 11
USB3.0: USB Port3 P_GND3
5 9 12
C1_1 Via9 P_GND4
ECMF_LP_U5202 ECMF_LP_U5202 13
6 10
@20200615_新增L3801 & L3802 & L3811 & L3812 for EMI 30,52 SUSC_EC# P_GND2
C2_1 Via10
ECMF_LN_U5202 ECMF_LN_U5202 USB_CON_9P
1

C3840 C3841 7 11
C1_2 Via11 12013-00054300
18PF/25V 18PF/25V ECMF_LP_U5202 GND
nbs_c0201_h13_000s nbs_c0201_h13_000s 8
C2_2 Via12
12
12013-00054300
2

ECMF_LN_U5202 L3801
15 13 GND
1.87OHM

8
6
Via15 Via13
ECMF_LP_U5202
16 14

GND4
GND2
Via16 Via14
ECMF_LN_U5202
GND 17 SIG_IN- SIG_OUT-
Via17 4 3
18 R3801 1 @ 2 0OHM
R1_1
USB_PP4 nbs_r0201_h10_000s SIG_IN+ SIG_OUT+
19 R3802 1 @ 2 0OHM
@20200529_USB3 Change USB4 1 2
R2_1
USB_PN4 nbs_r0201_h10_000s

GND3
GND1
20
R1_2
USB_PP3_X2
21 /RF/X
USB2.0 ESD-Protection

7
5
R2_2
USB_PN3_X2
nbs_empass_ecmf_8p_13v_005;nbs_empass_ecmf_8p_13v_005_t;nbs_empass_ecmf_8p_13v_005_b
temp_M08_000010 D3801
GND
/NA I/O3 I/O2
USB_PP3_X2 4 3 USB_PN3_X2
1 2 RN3802A +5V_USBA VDD GND
0OHM 5 2
I/O4 I/O1
6 1

Note : 1. This part & symbol only apply for standard PCB stack-up listed in datasheet appendix I U3_U3TXDN3_X3 U3_U3TXDN3_C ESD5485E-6/TR
GND

Please check your project must matching the thickness , DF and DK value of PCB every layer

2
2. C5209&C5210 must replaced with 18pF 0201 capacitors and the tolerance of capacitance value is 5% L3811
90OHM
1st Source: P/N:07024-02160000 ESD PROTECTION ESD5485E-6/TR
3. Pin7 & Pin8 & Pin11 & Pin12 must be connected to system ground Irat=160mA

1
@/EMI
4. Pin13 to Pin16 are floated in regular scheme
U3_U3TXDP3_X3 U3_U3TXDP3_C
3 4 RN3802B

USB3.0 ESD-Protection
0OHM

1 2 RN3801A
0OHM
D3802

2 1 U3_U3RXDN3_X2 U3_U3RXDN3_C
U3_U3TXDP3_C

AZ5B6S-01B

2
L3812
D3803
90OHM
2 1 Irat=160mA

1
U3_U3TXDN3_C @/EMI

AZ5B6S-01B
U3_U3RXDP3_X2 U3_U3RXDP3_C
D3804 3 4 RN3801B
0OHM
2 1
U3_U3RXDP3_C

AZ5B6S-01B
L3802
1.87OHM GND

8
6
D3805

2 1

GND4
GND2
U3_U3RXDN3_C
SIG_IN- SIG_OUT-
AZ5B6S-01B 4 3

SIG_IN+ SIG_OUT+
1 2
GND

GND3
GND1
ESD PROTECTION

1st Source: P/N:07024-01360000 ESD PROTECTION AZ5B6S-01B /RF/X

7
5
Project Name Rev
GND
UX482 2.0

Title : USB3.1 (Gen2)


Size
Dept.: NB1-RD3EE2 Engineer: EE
Custom
Date: Monday, July 13, 2020 Sheet 38 of 102
20180801
delete 0ohm
L3901 1 2 220Ohm/100MHz
36 H_SPKR+_CODEC
L3902 1 2 220Ohm/100MHz H_SPKR+_CON
36 H_SPKR-_CODEC
INTERNAL SPK1 Conn.

1
L3903 1 2 220Ohm/100MHz C77858
36 H_SPKL+_CODEC
L3904 1 2 220Ohm/100MHz 2200PF/50V
36 H_SPKL-_CODEC SPK L+ L- R+ R- trace width
Speaker 4 ohm

2
Max = 2W / Channel
Max = 2W / Channel (@PVDD=5V)
I = 0.55A (@Speaker : 7.4 Ohm(+-10%))

1
GND C3950
2200PF/50V
(Smart AMP MAX 2A/Channel) ==> 60mils J3901

2
6 8
6 SIDE2
H_SPKR-_CON 5
5
H_SPKL+_CON 4
4

1
C3951 H_SPKL+_CON 3
3
2200PF/50V H_SPKL-_CON 2
2
H_SPKR-_CON 1 7
1 SIDE1

2
H_SPKR+_CON
WTOB_CON_6P
@20200528_follow GX502 remove 0 ohm 12017-00011400

1
GND C3953 GND
2200PF/50V

2
H_SPKL-_CON

D3901 @EMC

2 1
H_SPKR+_CON

ESD9B5.0ST5G

D7804 @EMC

2 1
H_SPKR-_CON

ESD9B5.0ST5G

D3903 @EMC

2 1
H_SPKL-_CON

ESD9B5.0ST5G

D3904 @EMC

2 1
H_SPKL+_CON

ESD9B5.0ST5G

GND

Project Name Rev

GX531GX 1.0

Title : AUD_INT SPK


Size
A2
Dept.: ASUSTeK COMPUTER INC. Engineer: EE
Date: Monday, July 13, 2020 Sheet 39 of 102
+3VS

HDMI Active-Level Shift +3VS


Main Board
R4801 1 @ 2 64.9KOHM R4803 1 @ 2 64.9KOHM
SLEW_CTL R4835 1
0402
2 @ HDMI PWR_+5VS_HDMI
+1V8_AON --> 3VS
+12VS
GND
@20190722A
Slew rate control when I2C_EN/PIN = Low.
SLEW_CTL = H, fastest data rate
SLEW_CTL = L, 5 ps slow From HDMI Switch

1
SLEW_CTL = No Connect, 10 ps slow Q4801A

2
UM6K1N R4802
R4810 1 2 @ 1 6 R4815 1 2 @ +5VS 100KOhm +5VS_F +5VS_HDMI
0402 0402
HDMI_DDCDAT IFPE_SDA_HDMI_M HDMI_SDA_CON_M HDMI_SDA_CON

2
+3VS
R4817 1 2 @ 4 3 R4818 1 2 @
0402 0402
HDMI_DDCCLK IFPE_SCL_HDMI_M HDMI_SCL_CON_M HDMI_SCL_CON Q4803

1
1
G
R4807 1 @ 2 64.9KOHM R4808 1 2 64.9KOHM Q4801B 1.5A/6V
HDMI_SEL UM6K1N 2 3 F4801 1 2

3
5
+5VS_HDMI

D
S

1
07013-00220000 C4817
GND SI2304DDS-T1-GE3 0.1UF/16V
HDMI_SEL when I2C_EN/PIN = Low
Q4801只用07G005107010 Vth 1.5V Ciss 13pF與07G005905021 Vth 1.5V Ciss 7.8pF

2
HDMI_SEL = High: Device configured for DVI Remove SL4802 (20180927)
HDMI_SEL = Low: Device configured for HDMI +3VS
GND

+3VS C4834 0.1UF/16V


GND
1 2

R4809 1 @ 2 64.9KOHM R4811 1 @ 2 64.9KOHM


HDMI Conn.
EQ_SEL @20200612_For Vender Change
R4836 0Ohm
R4837 2 1 0Ohm HDMI_DDC_CLK_R J4801
GND 2 1 HDMI_DDC_DATA_R 1
TMDS_Data2+
+1.1VS_HDMI SLEW_CTL HDMI_TXP2_CON 2 20
Input Receive Equalization pin strap when I2C_EN/PIN = Low TMDS_Data2_Shield P_GND1
C4815 HDMI_SDA_CON 3
EQ_SEL = L: Fixed EQ at 7.5 dB +5VS_HDMI
TMDS_Data2-
GND HDMI_SCL_CON HDMI_TXN2_CON 4 22
EQ_SEL = No Connect: Adaptive EQ GND
+1.1VS_HDMI
TMDS_Data1+ P_GND3
HDMI_TXP1_CON 5

OE
2 1
EQ_SEL = H: Fixed at 14 dB GND
TMDS_Data1_Shield
0.1UF/16V 6
TMDS_Data1-
HDMI_TXN1_CON 7
TMDS_Data0+
GND HDMI_TXP0_CON 8
TMDS_Data0_Shield
+3VS 9

1
TMDS_Data0-

2
C4811 HDMI_TXN0_CON 10
TMDS_Clock+
11

42
41
40
39
38
37
36
35
34
33
32
31
U4801A 0.1UF/16V R4846 R4840 HDMI_CLKP_CON
From HDMI Switch TMDS_Clock_Shield

2
R4812 1 @ 2 64.9KOHM R4813 1 @ 2 64.9KOHM +3VS 12
2.2KOhm 2.2KOhm TMDS_Clock-

GND4
GND3
VDD5
SDA_SRC
SCL_SRC
VCC2
OE
GND2
SLEW_CTL
SDA_SNK
SCL_SNK
VDD4
PRE_SEL HDMI_CLKN_CON 13
CEC
GND 14
Utility

1
C4804 0.1UF/16V 1 30 R4843 1MOhm 15
IN_D2p OUT_D2p SCL
GND HDMI_TXP2 C4802 1 2 0.1UF/16V HDMI_TXP2_X1 2 29 HDMI_TX2+ 1 2 HDMI_SCL_CON 16 23
De-emphasis pin strap when I2C_EN/PIN = Low. 2 IN_D2n OUT_D2n SDA P_GND4
HDMI_TXN2 1 2 HDMI_TXN2_X1 3 28 HDMI_TX2- HDMI_SDA_CON 17
PRE_SEL = L: - 2 dB de-emphasis level

2
HPD_SRC HPD_SNK DDC/CEC/GND
C4807 0.1UF/16V HDP_SOURCE 4 27 HPD_SINK R4864 18 21
PRE_SEL = No Connect: 0 dB IN_D1p OUT_D1p +5VS_HDMI +5V_Power P_GND2
HDMI_TXP1 C4803 1 2 0.1UF/16V HDMI_TXP1_X1 5 26 HDMI_TX1+ 1 6 0Ohm 19
PRE_SEL = H: Reserved 0 IN_D1n OUT_D1n Hot_Plug_Detect
HDMI_TXN1 C4808 1 2 0.1UF/16V HDMI_TXN1_X1 6 25 HDMI_TX1- HPD_SINK HPD_SINK_R 2 1 HDMI_HPD_CON
HDMI_TXP0 C4801 1 2 0.1UF/16V HDMI_TXP0_X1 7
IN_D0p 06106-00390100 OUT_D0p
24 HDMI_TX0+ UM6K33N HDMI_CON_19P

1
IN_D0n OUT_D0n

1
HDMI_TXN0 1 2 HDMI_TXN0_X1 8 23 HDMI_TX0- Q4804A R4816 D4803
+3VS 1 C4806 0.1UF/16V I2C_EN 9
I2C_EN/PIN HDMI_SEL#/A1
22 HDMI_SEL 20KOhm
12022-00130800
IN_CLKp OUT_CLKp
HDMI_CLKP C4805 1 2 0.1UF/16V HDMI_CLKP_X1 10 21 HDMI_CLK+
IN_CLKn OUT_CLKn

EQ_SEL/A0
HDMI_CLKN 1 2 HDMI_CLKN_X1 HDMI_CLK-
CLK

2
SDA_CTL

PRE_SEL
SCL_CTL
R4814 1 @ 2 64.9KOHM R4819 1 2 64.9KOHM

VSADJ
+3VS

GND1
VCC1
VDD1

VDD2
VDD3
I2C_EN TVL040201AB1

2
GND GND
SN75DP159RSBT GND

11
12
13
14
15
16
17
18
19
20
GND nbs_qfn_40p_9v_003

2
+1.1VS_HDMI +3VS +1.1VS_HDMI GND
I2C_EN/PIN = High; puts device into I2C control mode @20200612_For Vender add /X /X
I2C_EN/PIN = Low; puts device into pin strap mode R4848 R4847
2.2KOhm
2.2KOhm

1
R4831 @ 0Ohm GND
28,50,78 SMB1_CLK_S

1
1
R4830 2 @ 1 0Ohm SCL_CTL VS_ADJ
28,50,78 SMB1_DAT_S EQ_SEL C4812 C4814
2 1 SDA_CTL
PRE_SEL 0.1UF/16V 0.1UF/16V

1
1

2
R4850 R4849 6.8KOhm
1KOhm 1KOhm R4832

1
1%

1
1%

2
HDMI EMI
2

2
C4821 C4816 GND
+3VS 0.1UF/16V 0.1UF/16V

2
GND GND GND
U4801B

GND GND 43
1

GND5
R4804 44
10KOhm Add 45
GND6
GND7
RN4802A 1
10OHM
2 @/EMI
@ @20190829C 46
47
GND8
HDMI_CLK+ HDMI_CLKP_CON
2

GND9
48

1
GND10
R4821 1 2 @ 49 R4822

1
GND11 90Ohm
0402 50 09G092090400 470OHM
HDMI_HPD_TO_SW HDP_SOURCE GND12
LX4801 @/EMI

2
+3VS SN75DP159RSBT
GND
+1.1VS_HDMI @20200612_For Vender add
HDMI_CLK- RN4802B 3 4 @/EMI HDMI_CLKN_CON
10OHM

RN4803A 1 2 @/EMI
10OHM
1

1
1

C4813 C4819 C4820 C4823 C4824 HDMI_TX0+ HDMI_TXP0_CON


C4810 C4809 10PF/50V 4.7PF/25V C4822 10PF/50V 4.7PF/25V

1
10UF/6.3V
C4842 0.1UF/16V 4.7UF/6.3V 0.01UF/10V @ @ 0.01UF/10V @ @ R4824

1
2
2

2
1 2 90Ohm 09G092090400
OE 470OHM
nbs_c0603_h35_000s LX4802
C4843 0.1UF/16V @/EMI
1 2

2
GND [0912] [0912]
Add C4813,C4819 Add C4823,C4824 HDMI_TX0- RN4803B 3 4 @/EMI HDMI_TXN0_CON
Operation enable/reset pin Vendor suggest(power noise) Vendor suggest(power noise) 10OHM
OE = L: Power-down mode OE = H: Normal operation GND GND
Internal weak pullup: Resets device when transitions from H to L RN4804A 1 2 @/EMI
10OHM

HDMI_TX1+ HDMI_TXP1_CON

1
R4825

1
90Ohm 09G092090400 470OHM
LX4805 @/EMI
U4802

2
HDMI LDO 1.1VS HDMI_TXN1_CON
1
2
Line-1
9 HDMI_TX1- RN4804B 3 4 @/EMI HDMI_TXN1_CON
Line-2 NC4 10OHM
HDMI_TXP1_CON 3 8 HDMI_TXN1_CON
GND NC3
4 7 HDMI_TXP1_CON
Line-3 NC2
HDMI_TXN2_CON 5 6 HDMI_TXN2_CON RN4805B 3 4 @/EMI
Line-4 NC1 10OHM
HDMI_TXP2_CON HDMI_TXP2_CON
Imax = 0.35A AZ1045-04F HDMI_TX2- HDMI_TXN2_CON
GND GND

1
@
+1.8VS +1.1VS_HDMI

4
R4841
U4806 U4803 LX4803 470OHM
R4866 5 R4806 1 90Ohm 09G092090400 @/EMI
GND2 Line-1
4 1 HDMI_TXP0_CON 2 9

2
IN OUT Line-2 NC4

1
1 2 U4802_IN 3 2 1 2 HDMI_TXN0_CON 3 8 HDMI_TXP0_CON
EN GND1 GND NC3
1

0Ohm 0Ohm 4 7 HDMI_TXN0_CON HDMI_TX2+ RN4805A 1 2 @/EMI HDMI_TXP2_CON


1

Line-3 NC2 10OHM


1

R4865 TLV75511PDQNR C4844 C4846 HDMI_CLKP_CON 5 6 HDMI_CLKP_CON


Line-4 NC1
C4847 10Ohm GND 4.7UF/6.3V 0.1UF/10V HDMI_CLKN_CON HDMI_CLKN_CON
2

4.7UF/6.3V @ AZ1045-04F
2

GND
2

@
GND GND
GND
1

C4845
1UF/6.3V HDMI_SCL_CON Add Co-lay device +3VS
HDMI_SDA_CON
@20190626E
2

GND
D4801 D4802
AZ5525-01F.R7G AZ5525-01F.R7G

3
RN4806A RN4806B
2

2.2KOHM 2.2KOHM

GND GND

4
+3VS

Imax = 0.35A
D4801/4802 change to 07024-00880000 +3VS +3V_eDP_SW
+1.1VS_HDMI
@20190705C HDMI Switch DDPC_SCL_PCH
1

R4868 SL4802 1 2 DDPC_SDA_PCH


@ 0603
0Ohm @
R4867 @ 0Ohm
1 2 @20200701_因AB互換一同對調
2

R4805 C4833
1

R4829 100PF/50V R4827 0Ohm


8.2KOhm 3 DDPC_SCL_PCH
R4833 1 2 0Ohm DDPC_SCL_PCH_C
5.1KOhm @ 3 DDPC_SDA_PCH
1

1 2 DDPC_SDA_PCH_C
R4823
2

U4804
10Ohm R4842 0Ohm +3V_eDP_SW
2

79 IFPC_HDMI_DDC_CLK_3V
R4828 1 2 0Ohm GPU_EDP_AUXP_C
VIN1 VOUT3 79 IFPC_HDMI_DDC_DATA_3V
6 5 1 2 GPU_EDP_AUXN_C
2

VIN2 VOUT2 GND


7 4
8
VIN3
EN
VOUT1
FB
3 Delete C4820 C4828
9
10
VCNTL POK
2
1
@20190626E
@20200625_因layout要求互換 Close to U4301_pin1

39
40
41
42
43
44
GND1
1

C4832 11 U4805
1

GND2
0.1UF/16V C4830 C4831 12 R4820
GND3
13 38 1 1 2

GND1
GND2
1UF/6.3V 10UF/6.3V 21.5KOhm C4818 0.1UF/25V

SDA_B

SDA_A
SCL_B

SCL_A
3 HDMI_CLKP_PCH D0+A VCC GND
2

2
2

37 2 R4838 1 2 10KOhm
APL5930CQBI-TRG 3 HDMI_CLKN_PCH D0-A EN
36 3
2

3 HDMI_DATA0P_PCH D1+A SCL


35 4 HDMI_DDCCLK
3 HDMI_DATA0N_PCH D1-A SDA
GND 34 5 HDMI_DDCDAT
Frome CPU 3 HDMI_DATA1P_PCH D2+A D0+
GND 33 6 HDMI_CLKP
3 HDMI_DATA1N_PCH D2-A D0-
32 7 HDMI_CLKN
3 HDMI_DATA2P_PCH D3+A D1+
31 8 HDMI_TXP0
3 HDMI_DATA2N_PCH D3-A D1-
30 9 HDMI_TXN0
NC2 NC1
29 10
79 IFPC_HDMI_CLKP D0+B D2+
28 11 HDMI_TXP1
79 IFPC_HDMI_CLKN D0-B D2-
27 12 HDMI_TXN1
79 IFPC_HDMI_TXP0 D1+B D3+
26 13 HDMI_TXP2
79 IFPC_HDMI_TXN0 D1-B D3-
25 14 HDMI_TXN2
79 IFPC_HDMI_TXP1 D2+B HPD
24 15 HDMI_HPD_TO_SW 1 T4803
Frome GPU 79 IFPC_HDMI_TXN1 D2-B CEC
23 16 U4301_CEC

HPD_B
CEC_B
HPD_A
CEC_A
79 IFPC_HDMI_TXP2 D3+B SEL1 +3V_eDP_SW
22 17 eDP_MUX_SEL1 R4834 1 2 10KOhm
79 IFPC_HDMI_TXN2 D3-B SEL2 +3V_eDP_SW
eDP_MUX_SEL2 R4839 1 2 10KOhm

TS3DV642A0RUAR
HDMI HPD

21
20
19
18
+3VS

GPU_HPD 1 T4801
@20200701_因AB互換一同對調
R4861 1MOhm CPU_HPD U4301_CEC_A
1 2 1 T4802
U4301_CEC_B

www.teknisi-indonesia.com
2

3
SL4801 Q4802B
2 1 1 6 5 UM6K33N
3 HDMI_HP 0201
CPU_HPD 25 iGPU_dGPU_switch

4
UM6K33N
1

Q4802A R4826
20KOhm
GND
2

+3VS
EN SEL1 SEL2 FUNCTION
GND
dGPU iGPU
1

L X X Switch Disabled. All Channel Hi-Z.


R4844 iGPU_dGPU_switch 0 1
10KOhm
@ Channel A Enabled. Channel A iGPU
H H L Channel B dGPU (Default)
Channel B Hi-Z. (Default)
2

R4845 1 2 @ Channel A Hi-Z. Project Name Rev


78 IFPC_HDMI_HPD 0402 H H H Channel B Enabled.
GPU_HPD
Design IP 0.1A

Title : HDMI ReTimer_Revision History_R0.1A


Size
A1
Dept.: ASUSTeK COMPUTER Engineer: EE
Date: Monday, July 13, 2020 Sheet 48 of 102
2 nd NGFF PCIE x4 (PCIE only)
+3VS +3VS_SSD2

SL4001
1 2
+3VS_SSD2 +3VS_SSD2 0805
@

SL4002

1
R4001 1 2
0805
10KOhm
@
J4001

2
1 2
GND1 3.3V1
3 4
GND2 3.3V2
5 6
21 PCIE8_RXN_NGFF2_L3 PERn3 NC15
7 8
PCIE8 21 PCIE8_RXP_NGFF2_L3 PERp3 NC16

1
9 10 C4002 C4003 C4004 C4005 C4006 C4007
GND3 (0/3.3V) DAS/DSS#(I/O)/LED_1#(I)
NGFF2 PCIE Lane3 C4018 1 2 0.22UF/10V 11 12 DAS_DSS_LED2# 8PF/25V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
21 PCIE8_TXN_NGFF2_L3 PETn3 3.3V3
C4019 1 2 0.22UF/10V NGFF2_TXN3 13 14
21 PCIE8_TXP_NGFF2_L3 PETp3 3.3V4

2
NGFF2_TXP3 15 16
GND4 3.3V5
17 18
21 PCIE7_RXN_NGFF2_L2 PERn2 3.3V6
19 20
21 PCIE7_RXP_NGFF2_L2 PERp2 NC17
PCIE7 21 22
GND5 NC18
C4016 1 2 0.22UF/10V 23 24
NGFF2 PCIE Lane2 21 PCIE7_TXN_NGFF2_L2 PETn2 NC19
C4017 1 2 0.22UF/10V NGFF2_TXN2 25 26
21 PCIE7_TXP_NGFF2_L2 PETp2 NC20

1
1
C4021

1
NGFF2_TXP2 27 28 C4011 C4012 C4013 C4014 C4015 C4020
GND6 NC21
29 30 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 22UF/6.3V 22UF/6.3V
21 PCIE6_RXN_NGFF2_L1 PERn1 NC22
31 32 N/A N/A

2
PERp1 NC23

2
21 PCIE6_RXP_NGFF2_L1

2
PCIE6 33 34
GND7 NC24
C4009 1 2 0.22UF/10V 35 36
NGFF2 PCIE Lane1 21 PCIE6_TXN_NGFF2_L1 PETn1 NC25
C4010 1 2 0.22UF/10V NGFF2_TXN1 37 38
21 PCIE6_TXP_NGFF2_L1 PETp1 DEVSLP(O)
NGFF2_TXP1 39 40
GND8 NC26
41 42
21 PCIE5_RXN_NGFF2_L0 PERn0/SATA-B+ NC27
43 44 GND
21 PCIE5_RXP_NGFF2_L0 PERp0/SATA-B- NC28
PCIE5 45 46
GND9 NC29
NGFF2 PCIE Lane0 C4001 1 2 0.22UF/10V 47 48
21 PCIE5_TXN_NGFF2_L0 PETn0/SATA-A- NC30
C4008 1 2 0.22UF/10V NGFF2_TXN0 49 50 R4011 1 2 0Ohm
21 PCIE5_TXP_NGFF2_L0 PETp0/SATA-A+ PERST#(O)(0/3.3V)/NC BUF_PLT_RST# 27,30,32,33,41,58,59,70
NGFF2_TXP0 51 52 NGFF2_PERST#
GND10 CLKREQ#(I/O)(0/3.3V)/NC CLKREQ4_NGFF2# 22
53 54 TPC26T @1 T4004
22 CLK4_PCIE_NGFF2# REFCLKn PEWAKE#(I/O)(0/3.3V)/NC
55 56 NGFF2_PEWAKE#TPC26T @1 T4001
22 CLK4_PCIE_NGFF2 REFCLKp NC31
57 58 TPC26T @1 T4002
GND11 NC32

67 68 R4012 1 2 0Ohm
NC33 SUSCLK(32kHz)(O)(0/3.3V) SUS_CLK 22,41,53
@ T4003 1 TPC26T 69 70 NGFF2_SUSCLK @
PEDET/NC-PCIe/GND-SATA 3.3V7
NGFF2_CONFIG 71 72
GND12 3.3V8

NP_NC2
NP_NC1
73 74

SIDE2
SIDE1
GND13 3.3V9
75
GND14

EMI
MINI_PCI_75P_REMOV8

79
78

77
76
12003-00162500 NGFF2_PERST#
GND

1
D4001
VPORT0402L331V05
GND /X/EMI

2
GND
H4002

+3VS

CT236CB176D146 R4030 1 @/PCIE 2 0Ohm

1
R4060
*** PN: 13020-05070000 D4006 10KOhm
H=3.5 41 DAS_DSS_LED1#
1
DAS_DSS_LED1# 3

2
DAS_DSS_LED# 56
2
DAS_DSS_LED2#
GND BAT54AW

@20200702_layout空間關係調高更換J4001 & H4002 R4022 1 @/PCIE 2 0Ohm

<Variant Name>

Project Name Rev

UX482 R2.1

Title : CB_AU6465
Size
C
Dept.: NB1-RD3EE2 Engineer: Huang
Date: Monday, July 13, 2020 Sheet 40 of 102
Main Board

<Variant Name>

Project Name Rev

UX482 2.0

Title : HDMI to MIPI_TC358870XBG


Size
B
Dept.: NB1-RD3EE2 Engineer: EE
Date: Monday, July 13, 2020 Sheet 49 of 102
Main Board

Thermal Sensor : SN170027


ALERT/SDA/SCL: Open-drain output; pullup resistor 5Kohm

Pin function Supply voltage.: 1.62 V to 3.6 V

CPU Add @20190612B VRAM Add @20190612B Add @20190612B GPU


0Ohm /NA R5006 0Ohm /NA R5014 0Ohm /NA R5016
SMB1_CLK_L 0Ohm 2 /NA 1 R5007 SMB1_CLK_S SMB1_CLK_S 28,48,78 SMB1_CLK_L 0Ohm 2 /NA 1 R5015 SMB1_CLK_S SMB1_CLK_L 0Ohm 2 /NA 1 R5017 SMB1_CLK_S
SMB1_DAT_L 2 1 SMB1_DAT_S SMB1_DAT_S 28,48,78 SMB1_DAT_L 2 1 SMB1_DAT_S SMB1_DAT_L 2 1 SMB1_DAT_S

+3VS +3VS +3VS

U5001 U5002 U5003


1 6 1 6 1 6
SCL SDA SCL SDA SCL SDA
2 5 2 5 2 5
GND V+ GND V+ GND V+
3 4 3 4 3 4
ALERT ADD0 ALERT ADD0 ALERT ADD0

2
SN1710027DRLR N/A C5020 SN1710027DRLR N/A C5014 SN1710027DRLR N/A C5015
0.01UF/16V 0.01UF/16V ADD0=SDA 0.01UF/16V

1
ADD0=V+
ADD0=GND
+3VS +3VS +3VS
2

2
R5010 R5011 R5012
N/A 4.7KOhm N/A 4.7KOhm N/A 4.7KOhm

Add @20190612B Add @20190612B


1

1
O/D O/D O/D
0Ohm /@ R5008 0Ohm /@ R5013
CPU_THERM# 32
2 1 CPU_THERM# 2 1 CPU_THERM#

Near CPU Near VRAM Near GPU


SMBUS addr=10010000 (90) SMBUS addr=10010001 (91) SMBUS addr=10010010 (92)

ADD0: Address select. Connect to GND, SDA, SCL, or V+


CPU&GPU FAN Note : connector and power are by project design

T5001
+12VS_5VS_FAN0 +12VS_5VS_FAN1
+3VS +3VS
1

@
1 T5002
1
2

1
C5018 C5011
C5017 0.1UF/16V C5003 0.1UF/16V
R5002 10UF/25V @ R5003 10UF/25V @
2

2
2

10KOhm J5003 10KOhm J5004


N/A 0918 4 6 N/A 4 6
4 SIDE2 4 SIDE2
1

3 3
30 FAN1_PWM
2
3
2
30 FAN2_PWM
2
3
2
Delete TP5001 @20190619A
1 5 1 5 +12VS_FAN +5VS
30 FAN1_TACH 1 SIDE1 30 FAN2_TACH 1 SIDE1
1

1
C5019 C5016 WTOB_CON_4P C5012 C5013 WTOB_CON_4P
100PF/50V 100PF/50V 100PF/50V 100PF/50V TP5002

1
12017-00380100 12017-00380100
@ @ @ @ R5004 R5005 1
2

2
0Ohm 0Ohm FAN1_PWM s00043 @
TPC40
@/12VFAN /5VFAN
+12VS_5VS_FAN0 TP5003

2
SL5001 SHORT_LAND 1
1st: 12017-00330300 1st: 12017-00330300 @ 1 2 FAN1_TACH s00043 @
0603 TPC40
2nd :12G171010049 2nd :12G171010049 FAN_VOLTAGE
+12VS_5VS_FAN1 TP5004
SL5002 SHORT_LAND 1
@ 1 2 GND s00043 @
Change to 12017-00380100 Change to 12017-00380100 0603 TPC40

@20190611B @20190611B

<Core Design>

Title : FAN_Thermal Sensor & Fan

ASUSTeK COMPUTER
Engineer: EE
Size Project Name Rev

C GX502GX 1.0

Date: Monday, July 13, 2020 Sheet 50 of 102


<Variant Name>

Title : XDD_HDD & ODD CON

ASUSTeK COMPUTER
Engineer: EE
Size Project Name Rev

A GX502GX 1.0

Date: Monday, July 13, 2020 Sheet 42 of 102


2017/11/10 Flash BIOS
Rename
12018-00390900 @20181011G
FPC_CON_15P

15 KSO7_EC 30
15
GND2 14 KSO0_EC 30
17 14
13 KSI1_EC 30
13
12 KSO9_EC 30
12
11 KSI5_EC 30
11
10 KSO3_EC 30
10
9 KSI4_EC 30
9
8 KSI2_EC 30
8
7 KSO1_EC 30
7
6 KSI3_EC 30
6
5 KSI0_EC 30
5
4 KSO5_EC 30
4
3 KSO2_EC 30
3
GND1 2 KSO4_EC 30
16 2
1 KSO6_EC 30
1
JDEBUG4401

/NA
GND Rename @20190430A

/DEBUG
D4401 Jigboard4 debug guide
1 2 DIP SW to 0000 : BIOS Flash
+3VS
+3VS_UART
UART Debug card RB751CS40
DIP SW to
DIP SW to
0010 : Keyboard CONN Port80
1000 : SMBUS CONN Port80 & BIOS DUMP(by Postcode monitor)

1
R4405 R4402 R4403 R4404
+3VS 51KOhm 51KOhm 51KOhm 51KOhm

Follow CRB Pu 50Kohm /DEBUG /DEBUG /DEBUG /DEBUG


2

2
UART2_RXD
UART2_TXD
UART2_RTS#
UART2_CTS#
JDEBUG4402
8 6
SIDE2 6
5
5 UART2_RXD 25
4
4 UART2_TXD 25
3
3 UART2_RTS# 25
2
2 UART2_CTS# 25
7 1
SIDE1 1

WTOB_CON_6P /DEBUG

12G171230062

<Core Design>

Title : DEBUG_LPC
ASUSTeK COMPUTER
Engineer: EE
Size Project Name Rev

B GX502GX 1.0

Date: Monday, July 13, 2020 Sheet 44 of 102


Main Board
R1.1-02

NGFF M.2 TYPE_E-KEY WIFI WLAN PWR_+3V_NGFF_WLAN (Non-ISCT)


Support ASUS Open Cloud Computing (AOConnect)
WLAN PWR to +3VSUS

+3VSUS
+3V_NGFF_WLAN
@20200528 EE add USB Port 10
R5301 1 2 0Ohm

3
ULX5301
90Ohm/100MHz
/X/USB2
+1.8VSUS

2
R5324 N/A 1 2 20KOhm
/USB2 3 4 URN5301B
21 USB_P10_M.2_BT_DN 0Ohm +3V_NGFF_WLAN +3V_NGFF_WLAN CNV_RGI_DT_CON
/USB2 5 6 URN5301C USB_P10_M.2_BT_L_DN
21 USB_P10_M.2_BT_DP 0Ohm @20200601_RF 要求R5324 change 100K
10G253000004050 USB_P10_M.2_BT_L_DP
R5323/R5324 close to M.2 @20200622_RF 要求R5324 change 20K
10G253000004050

R5323 1 2 10KOhm
/USB2 1 2 URN5301A
0Ohm CNV_BRI_DT_PCH
/USB2 7 8 URN5301D
0Ohm J5301

1
10G253000004050
76 78 R5308 R5309
10G253000004050 NP_NC1 SIDE1 GND
10KOhm 10KOhm GND
1 2 @ @
1 2
3 4

2
3 4
USB_P10_M.2_BT_L_DP 5 6
5 6
USB_P10_M.2_BT_L_DN 7 8
7 8 +1.8VSUS
9 10
8 CNV_WR_D1N_PCH 9 10 M.2_BT_PCMFRM_CRF_RST_N 8
CNV_WR_D1N_PCH 11 12
8 CNV_WR_D1P_PCH 11 12
CNV_WR_D1P_PCH 13 14 R5335/R5336 close to PCH
13 14 M.2_BT_PCMOUT_CLKREQ0 8
15 16 R5335 N/A 1 2 20KOhm Remove WLAN and LAN power switch circuit
8 CNV_WR_D0N_PCH 15 16
CNV_WR_D0N_PCH 17 18 CNV_RGI_RSP_PCH R5336 N/A 1 2 20KOhm 2019.11.19
8 CNV_WR_D0P_PCH 17 18 GND
CNV_WR_D0P_PCH 19 20 R5331 CNV_BRI_RSP_PCH
19 20
21 22 1 2
8 CNV_WR_CLKN_PCH 21 22 CNV_BRI_RSP_PCH 8
CNV_WR_CLKN_PCH 23 CNV_BRI_RSP_CON
8 CNV_WR_CLKP_PCH 23
CNV_WR_CLKP_PCH R5331/R5333 close to M.2 49.9OHM
R5332/R5334 close to PCH

32 R5332 1 2 0Ohm
32 CNV_RGI_DT_PCH 8
33 34 CNV_RGI_DT_CON R5333 1 2 49.9OHM
33 34 CNV_RGI_RSP_PCH 8
35 36 CNV_RGI_RSP_CON R5334 1 2 0Ohm R5320 N/A 75KOhm PD close to PCH
35 36 CNV_BRI_DT_PCH 8
37 38 CNV_BRI_DT_CON M.2_BT_PCMFRM_CRF_RST_N R5322 2 1 71.5KOhm
37 38
39 40 M.2_BT_PCMOUT_CLKREQ0 R5328 @ 2 1 75KOhm
39 40
41 42 CNV_RGI_DT_PCH 2 1
41 42
43 44
43 44
45 46
45 46
47 48
47 48
49 50 R5316 1 2 33Ohm
49 50 SUS_CLK 22,40,41
51 52 SCLK_WLAN GND
51 52
53 54 R5310 1 2 0Ohm PD close to PCH
53 54
@ T5301 1 55 56 BT_ON_R R5311 1 2 0Ohm BT_ON/OFF#
55 56
WAKE_WLAN# 57 58 WLAN_ON_R RF_DEV_ON
57 58
59 60
8 CNV_WT_D1N_PCH 59 60 [CNV Mode Select] CNV_RGI_DT_PCH
CNV_WT_D1N_PCH 61 62
8 CNV_WT_D1P_PCH 61 62 An external pull-up or pull-down is required.
CNV_WT_D1P_PCH 63 64 1 T5307 @ 0 = Integrated CNVi enable.
63 64
65 66 CLKIN_XTAL 1 = Integrated CNVi disable.
8 CNV_WT_D0N_PCH 65 66
CNV_WT_D0N_PCH 67 68
8 CNV_WT_D0P_PCH 67 68
CNV_WT_D0P_PCH 69 70 +3V_NGFF_WLAN
69 70
71 72
8 CNV_WT_CLKN_PCH 71 72 [Intel FAE]
CNV_WT_CLKN_PCH 73 74
8 CNV_WT_CLKP_PCH
75
73 74 RGI_DT has an automatic detect CNVi mechanisim,
CNV_WT_CLKP_PCH
75 please do not use external PD.
The CRF has an internal strong 1K PD already.
77 79 Do not leave this pin float,
NP_NC2 SIDE2
if CNVi is not used, it still need a 20K ohm PU.
MINI_PCI_75P

12003-001640100沿用GA502
GND GND

WLAN & BT ON
@20200611_del WLAN_Wake# Control for RF

3
Q5301B
5 EM6K1-G-T2R
+3V_NGFF_WLAN
WLAN NGFF_WLAN bypass capactor

4
R5312
1 10KOhm 2 +3V_NGFF_WLAN
5% RF_DEV_ON

6
Place near pin2,4 Place near pin72,74
Q5301A
EM6K1-G-T2R 2
WLAN_ON# 20

1
1

1
Screw Hole C5301 C5302 C5309 C5303 C5304 C5312

1
GND R5313 2012/10/9 10UF/6.3V 0.1UF/6.3V 0.01UF/25V 0.1UF/6.3V 10UF/6.3V 0.01UF/25V

2
2

2
100KOhm for intel deep S3 13020-01371400
@ 5.0/3.5*M2.0*3.85L-BL1-SN-SMD

2
GND
GND H5301

CT236CB176D146
To match WHQL test.Due to 13020-01379900
BT wake up to spend much 20200707 Rex 新增
time if use
+3VS.So,change to +3V,let
BT can work quickly when GND
S3 wake up.
+3V_NGFF_WLAN

High active
1

R5314
10KOhm
5%
1
2

3
BT_ON_PCH 20
BT_ON/OFF# 2
1

C5307
0.1UF/25V D5301
@ BAT54CW
SUS PWR
2

GND
Project which use the combo card schematic should
make sure that BT_ON signal can't be High at
S3/S4/S5 state to prevent leakage

<Core Design>

Title :
WiFi/WiMax
ASUSTeK COMPUTER
Engineer: EE
Size Project Name Rev

D GX502GX 1.0

Date: Monday, July 13, 2020 Sheet 53 of 102


+LCD_VCC change to +3VS_LCD
Controll Signal (LCD/BL) +3VS_LCD
@20181113B Panel BL Power Design IP Delete R4569 0 OHM AC_BAT_SYS_LCD

@20190719C @20191009A Imax=0.485A


要看Panda 新panel的spec.: 56K ohm
Normal : L (OD Enable)

2
R4502

1
Ac�ve : H (OD disable)
1KOhm C4523 eDP Panel Conn.
0.1UF/25V

2
N/A

1
AC_BAT_SYS AC_BAT_SYS_LCD
+3VS +3VS
D4503 J4502
GND
42
LCD_BACKOFF# 30 SIDE2
2 R4503 40 44
40 SIDE4
3 1 0Ohm 2 F4501 1 2 1.5A/24V 39
eDP_BL_EN_PCH 3 39
1 /NA 38

1
38
N/A R4589 37

1
BAW56W 37
100KOhm R4588 36
Note 1 @/BL_PWRSW U4506 10KOhm SL4503 1 2 35
36

預留0 OHM 7 GND @/BL_PWRSW EDP_OD_CON_R @


0402 EDP_OD_CON 34
35

2
GND2 34
@20181113B 1 6 33

2
VIN VOUT 33

2
2 5 LCD_PWM_CON 32
3
PG ISET
4
Note 3 R4567 LCD_BLEN_CON 31
32

LCD_BKEN_CON change to LCD_BLEN_CON GND1 EN


LCD_BL_PWREN 100KOhm 30
31
30
@20181113B GA217RB1U R4541 29

1
29

1
C4534 200KOhm C4528 C4533 28
D4509 06016-01930000 28

1
1UF/25V @/BL_PWRSW 10UF/25V 0.1UF/25V EDP_HPD_CON 27
@/BL_PWRSW 27
/BL_PWRSW 1% /BL_PWRSW 26
/BL_PWRSW 26

2
2 EDP_AUXN_CON 25

2
25
LCD_BLEN_CON 3 GND EDP_AUXP_CON 24
LID_SW# 25,30,52,56 24
1 23
23
1

1
@ EDP_TXP0_CON 22
LCD_BLEN_CON
C4507 C4502
BAW56W O_LID_EC# change to LID_SW# GND EDP_TXN0_CON 21
22
21

1
22PF/25V 100PF/50V @20181113B GND
Note 2 20
20
2

2
/@ /@ EDP_TXP1_CON 19
R4515 19
EDP_TXN1_CON 18
100KOhm 18
17
17

2
GND GND EDP_TXP2_CON 16
16
EDP_TXN2_CON 15
15
14
GND 14
EDP_TXP3_CON 13
13
EDP_TXN3_CON 12
12
11
11
DMIC_CLK_C 10
10
DMIC_DATA_C 9
9
8
8
+3VS_LCD 7
7
6
6
5
L4504 SL4521
Imax=1.3A MIC_3V 4
5
4
1 2 1 2 +3VS_LCD_F 3
0201 eDP_PWM_PCH 3 3
LCD_PWM_CON LCD_BACK_PWM_L +3VS_LCD 2 43
2 SIDE3
1KOhm/100Mhz 1
1

1
1

1
D4508 C4531 C4532 41
SIDE1
VS5V0BL1HS C4511 C4510 +3VS C4538

0.1UF/6.3V

0.1UF/6.3V
22PF/25V 100PF/50V R4514 1UF/6.3V WTOB_CON_40P

2
2

/@ 10KOhm
@ 12017-00182200
2

PR modify 1106B

2
1
R4513
GND GND 10KOhm EDP_OD_CON_R GND GND
GND L4504 N/A GND

3
09G013103100 --> 09G013102200 Q4501B 1st : 12017-00182200

2
5 UM6K33N
@20190708D

4
LCD VDDEN / +3VS_LCD

6
RES 150 OHM 1/8W(0805)5% -> 1/10W 是否OK Q4501A
2 UM6K33N
20 EDP_OD#
GND +3VS_LCD

1
@/LCD_PSW
+3VS_LCD R4506 1 2 75Ohm +3VS

1
GND C4529 C4530
1 2
R4566 /LCD_PSW 75Ohm

0.1UF/6.3V

0.1UF/6.3V
Imax=2A

2
R4508 U4510
1 2 0Ohm 1 6
VOUT VIN
+3VS_LCD_PSW 2 5 GND
/LCD_PSW GND ILIM
1 2 3 4
3 L_VDDEN_PCH EN/FLAG# DSG
R4507 +3VS_LED_EN
1

1KOhm NCT3527U 20200527 eDP from CPU


1

C4503
4.7UF/6.3V
R4510 /LCD_PSW R4512 Change name Re-�mer@20181023F
1
2

100KOhm 10KOhm C4506


/LCD_PSW
/LCD_PSW 1UF/6.3V
/LCD_PSW
2

C4504 1 2 0.1UF/6.3V
3 EDP_TXN0
C4505 1 2 0.1UF/6.3V EDP_TXN0_C
3 EDP_TXP0
GND GND EDP_TXP0_C
GND
Must mount GND GND C4519 1 2 0.1UF/6.3V
3 EDP_TXN1
C4513 1 2 0.1UF/6.3V EDP_TXN1_C
3 EDP_TXP1
EDP_TXP1_C

C4521 1 2 0.1UF/6.3V
3 EDP_TXN2
C4514 1 2 0.1UF/6.3V EDP_TXN2_C
3 EDP_TXP2
EDP_TXP2_C
Delete Re-�mer@20181023F
C4524 1 2 0.1UF/6.3V
3 EDP_TXN3
C4515 1 2 0.1UF/6.3V EDP_TXN3_C
3 EDP_TXP3
EDP_TXP3_C
For EMI
For ESD
C4508 1 2 0.1UF/6.3V
3 EDP_AUXN
1 2 R4504A 1 2 R4511A C4520 1 2 0.1UF/6.3V EDP_AUXN_C
0OHM 0OHM 3 EDP_AUXP
EDP_AUXP_C
U4507
EDP_TXN0_C EDP_TXN0_CON EDP_TXN3_C EDP_TXN3_CON 1 @ 1 2 SL4501
Line-1 3 eDP_HPD_PCH 0402
EDP_TXP0_CON 2 9 EDP_HPD_CON
2

Line-2 NC4
90Ohm/100Mhz 90Ohm/100Mhz EDP_TXN0_CON 3 8 EDP_TXP0_CON
GND NC3
L4512 L4516 4 7 EDP_TXN0_CON
Line-3 NC2
@ @ EDP_TXP1_CON 5 6 EDP_TXP1_CON
3

Line-4 NC1
EDP_TXN1_CON EDP_TXN1_CON
EDP_TXP0_C EDP_TXP0_CON EDP_TXP3_C EDP_TXP3_CON AZ1045-04F
3 4 R4504B 3 4 R4511B GND @
0OHM 0OHM

1 2 R4505A 1 2 R4501A U4508


0OHM 0OHM

EDP_TXP2_CON
1
2
Line-1
9
eDP_HPD (CPU)
Line-2 NC4
EDP_TXN1_C EDP_TXN1_CON EDP_AUXP_C EDP_AUXP_CON EDP_TXN2_CON 3 8 EDP_TXP2_CON
4
GND NC3
7 EDP_TXN2_CON Delete Re-�mer@20181023F
2

Line-3 NC2
90Ohm/100Mhz 90Ohm/100Mhz EDP_TXP3_CON 5 6 EDP_TXP3_CON +3VS
Line-4 NC1
L4513 L4505 EDP_TXN3_CON EDP_TXN3_CON
@ @ AZ1045-04F
3

GND

1
@
EDP_TXP1_C EDP_TXP1_CON EDP_AUXN_C EDP_AUXN_CON @20200617_N跟P的位置對調 for layout R4556
3 4 R4505B 3 4 R4501B 10KOhm
0OHM 0OHM
@
U4509

2
1
1 2 R4509A EDP_AUXP_CON 2
Line-1
Line-2 NC4
9 Rename

teknisi indonesia
0OHM
EDP_AUXN_CON 3
4
GND NC3
8
7
EDP_AUXP_CON
EDP_AUXN_CON
@20181017H EDP_HPD_CON

Line-3 NC2
EDP_TXN2_C EDP_TXN2_CON 5 6
2

1
Line-4 NC1
90Ohm/100Mhz
L4515 AZ1045-04F R4557
@ GND 100KOhm
3

2
EDP_TXP2_C EDP_TXP2_CON
3 4 R4509B GND
0OHM

MIC
MIC module Delete @20181022M
For ESD
C4509 22PF --> 100PF EDP_OD_CON LCD_BLEN_CON LCD_PWM_CON

@20190719C EDP_HPD_CON
+3VS MIC_3V
1

1
@ @
1
1

@ D4501 D4502
D4506 D4504 D4505
1 R4555 2 10Ohm ESD7951ST5G ESD7951ST5G ESD7951ST5G
GND
R4522 @ 0Ohm DMIC_DATA_C DMIC_DATA 36 DMIC_DATA_C 1 2 07G022005H60 07G022005H60 ESD7951ST5G ESD7951ST5G
1 2 C4509 1 2 100PF/50V @ @ 07G022005H60 07G022005H60
GND
07G022005H60
L4501 1 2 120Ohm L4503 @
N/A 1 2 1KOHM/100MHz D4507
DMIC_CLK 36
2

2
DMIC_CLK_C ESD7951ST5G
GND
2

2
1

C4501 C4556 1 2 22PF/50V DMIC_CLK_C 1 2


GND
0.1UF/16V
N/A 2015.05.08 Realtek
/X Suggest 07G022005H60
2

GND GND
20180611 ESD Suggest GND GND
GND
C4556 change to unmunt 20180611 ESD Suggest
R4507(10ohm) change to L4503
<Core Design>
@20190102A
Title : CRT_eDP
ASUSTeK COMPUTER
Engineer: EE
Size Project Name Rev

D GX502GX 1.0

Date: Monday, July 13, 2020 Sheet 45 of 102


Project Name Rev

UX482 R0.1

Title : G-Sensor
Size
Dept.: NB1-RD3EE2 Engineer: EE
B
Date: Monday, July 13, 2020 Sheet 54 of 102
PCIE SSD LED +5VSUS
@20181013C

PWR LED

1
R5617
2.2KOhm
+5VSUS +5VSUS
N/A PWR LED PCIE SSD LED Charger LED

2
1

1
R5607 LED5602
Charger LED

+
2.2KOhm WHITE
07G015L0008A

1
N/A R5611

2
N/A 2.2KOhm

2
+5VSUS_PWRLED# N/A

2
1
LED5603

+
WHITE
07G015L0008A SSD_LED#_L +5VSUS_ChargerLED#
N/A

1
PWR_LED_CON# LED5605

+
WHITE&ORANGE
07014-00190100
Die 1 White + Pin 1 - Pin 3 N/A
R5623
Die 2 Orange + Pin 2 - Pin 4
6

R5608 Q5601A
2 0Ohm 1 2 +5VS 1 2 SSD_LED#_L
30 PWR_LED PJX8838_R1_00002
@ PWR_LED_R N/A
1

3
3
0Ohm
Q5601B
R5606 5 PJX8838_R1_00002 N/A
1

1
2 0Ohm 1 R5610 N/A R5620

4
35 ITE8299_PWR_LED
1MOhm 100KOhm

3
30 CHG_LED#
N/A N/A N/A Q5610B
5 PJX8838_R1_00002
2

2
DAS_DSS_LED# PCIE pull-hi定要上 N/A

4
30 CHG_FULL_LED#

6
GND GND R5622 Q5610A
2 0Ohm 1 2 PJX8838_R1_00002
40 DAS_DSS_LED#
N/A

1
N/A
GND

GND

OS LED

OS_LED

GX501VI R1.1D 161004 KB connector change to P.31 Change to monut @ 20181129A


@20190731C
3

Q5602B
5 EM6K1-G-T2R
25,30,45,52 LID_SW#
LID_SW#
4

GX501VI R1.1G OS LED turn off when Lid close


6

Q5602A
2 EM6K1-G-T2R
GX501VI R1.1H
PWR_LED_R
1

GND 2017.03.04 change for DXF Limita�on

CAPS LOCK LED


@20181015C

R5639

CAP LED 35 CAP_LED# CAP_LED_CON# 31


1 2

2.2kOHM
5%

MB_PWR BUTTON CON.

/WOFP +3VA_EC
12018-00082000
FPC_CON_4P

GND2 4
6 4
3
3 OS_LED
2 PWR_SW# 30,32
2 PWR_SW#
GND1 1
5 1
J5601

<Variant Name>

Project Name Rev

UX482 R3.0

Title : LED_indicator
Size
Dept.: NB1-RD3EE2 Engineer: Stanley_Kao
Custom
Date: Monday, July 13, 2020 Sheet 56 of 102
Main Board
3VSUS_PWRGD VCCST_PWRGD
SL5804 1 2 +3VA_DSW +1.05V_VCCST
82,84 1.8VSUS_PWRGD 0201 3VSUS_PWRGD 30

2
SL5802 1 2
88 P_3VSUS_PWRGD 0201 R5802 R5808

PU P.88 100KOhm 1KOhm

1
VCCST_PWRGD_PCH 27

3
EM6K1-G-T2R
Q5801_PIN5
5 Q5801B

4
6
EM6K1-G-T2R
2 Q5801A
Justin : Removed Unused pwrgd ALL_SYSTEM_PWRGD

1
ALL_SYS_PWRGD
D5804
1
3VSUS_PWRGD 3
2 Justin : Removed Unused pwrgd
27,30,87 3VA_DSW_PWRGD

BAT54ATB
+3VSUS +3VSUS
+3VS
2
1

2
R5804 R0.1-32
R5809 100KOhm R5805
100KOhm 10KOhm
D5808
by SLP_S4#
2

1
59,86 1.2V_PWRGD

1
3
ALL_SYSTEM_PWRGD 4,30,59,80
2
86 2.5V_PWRGD

1
BAT54AW C5804
by SLP_S4# 1UF/6.3V

2
/NA

R5801 1 2 100KOhm
+3VSUS

D5809

27,82 VCCIN_AUX_PWRG
1 @20200611_改上件for sequence
3
2
26,27,30,70,88,96 PM_SUSB#

BAT54ATB
by SLP_S3#

+3VA_DSW

CNL PCH GLIITCH ISSUE MITIGATION( CRB V0.8)


PM_SLP_SUS# 27,30

2
R5803
100KOhm

2
R5899

3
EM6K1-G-T2R

1
100KOhm
5 Q5803B
DPWROK_EC_Q5803

1
6
EM6K1-G-T2R
2 Q5803A
12,27,30 DPWROK_EC

+3VA_DSW

PLT_RST# 27,30,32,33,40,41,59,70
PM_SUSB#
2

R5807
100KOhm
3

6
EM6K1-G-T2R EM6K1-G-T2R
1

5 Q5802B 2 Q5804A
PM_RSMRST_Q5802#
4

1
6

EM6K1-G-T2R
2 Q5802A
27,30 PM_RSMRST#
1

PM_SUSC# 27,30,57,86
3

EM6K1-G-T2R
5 Q5804B
4

Project Name Rev

UX482 R0.1

Title : PRO_Protect
Size
Dept.: NB1-RD3EE2 Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 58 of 102
TYPE-C USB3.1

<Core Design>

Title : TYPE-C USB3.1_R1.5_4

ASUSTeK COMPUTER
Engineer:
Size Project Name Rev

D GX502GX 1.0

Date: Monday, July 13, 2020 Sheet 51 of 102


USB2.0 EMI-Protection With ECMF(PCB 1.05mm_10Layer) @20200612_for layout change 10L Power switch 2A:
Main source: 06016-00030100

+5V_U5505
+5VSUS +5V_USB3

USB3.1 Gen1 Port 1


From PCH USB2.0 Port From PCH USB2.0 Port U5202 L5209 J5201
5 1 1 2 1
U5204 IN OUT VBUS
2 E_5V_USB3_60 2
1 3 GND D-

1
21 USB_PP6 Via_Input1 Via_Output1 4 3 1 80Ohm/100Mhz C5240 USB_PN5_X1 3
U5203 USB_PP6_X1
EN/EN# FLT# D+ USB2.0: USB Port5

1
T5201 + C5223 USB_PP5_X1 4
2 4 GND

1
1 3 21 USB_PN6 Via_Input2 Via_Output2 TPS2001DDBVR 47UF/6.3V 22UF/6.3V C5221 C5203 5
21 USB_PP5 Via_Input1 Via_Output1 STDA_SSRX- USB3.0: USB Port1

2
USB_PP5_X1 USB_PN6_X1 C5226 C5225 @ 100UF/6.3V 0.1UF/25V U3_U3RXDN1_C 6
STDA_SSRX+

2
2 4 10UF/6.3V 1UF/6.3V U3_U3RXDP1_C 7
21 USB_PN5 Via_Input2 Via_Output2 CO-LAY GND_DRAIN

2
USB_PN5_X1 5 9 8
C1_1 Via9 STDA_SSTX-

5 9
ECMF_LP_U5507
6 10
ECMF_LP_U5507 U3_U3TXDN1_C 9
STDA_SSTX+ Right down connector
C2_1 Via10 U3_U3TXDP1_C
C1_1 Via9
ECMF_LP_U5506 ECMF_LP_U5506 ECMF_LN_U5507 ECMF_LN_U5507 GND GND GND GND 10
P_GND1

1
ECMF_LN_U5506
6
C2_1 Via10
10
ECMF_LN_U5506
C5208
18PF/25V
C5207
18PF/25V
7
C1_2 Via11
11
ECMF_LP_U5507
GND GND 11
12
P_GND3 12013-00054300
8 12 P_GND4
nbs_c0201_h13_000s nbs_c0201_h13_000s
1

1
C5206 C5205 7 11 C2_2 Via12 13

2
C1_2 Via11 30,38 SUSC_EC# P_GND2
18PF/25V 18PF/25V ECMF_LP_U5506 ECMF_LN_U5507
nbs_c0201_h13_000s nbs_c0201_h13_000s 8 12 15 13 USB_CON_9P
C2_2 Via12 Via15 Via13
2

ECMF_LN_U5506 ECMF_LP_U5507
12013-00054300
15 13 16 14 GND
Via15 Via13 Via16 Via14
ECMF_LP_U5506 ECMF_LN_U5507
16 14 GND 17 +5V_USB4
Via16 Via14
ECMF_LN_U5506
Via17
R1_1
18 R5206 1 @ 2 0OHM USB3.1 Gen1 Port 2
GND 17 USB_PP6 nbs_r0201_h10_000s L5210 J5202
Via17 19
18 R5204 1 @ 2 0OHM R5207 1 @ 2 0OHM 1 2 1
R1_1 R2_1 VBUS
USB_PP5 nbs_r0201_h10_000s USB_PN6 nbs_r0201_h10_000s E_5V_USB4_60 2
D-
19 R5205 1 @ 2 0OHM 80Ohm/100Mhz USB_PN6_X1 3 USB2.0: USB Port6
R2_1 20 D+

1
USB_PN5 nbs_r0201_h10_000s R1_2 C5241 USB_PP6_X1 4
GND
USB_PP6_X1 + C5224 C5222 C5204 5
STDA_SSRX- USB3.0: USB Port2
20 21 100UF/6.3V 0.1UF/25V U3_U3RXDN2_C 6
R1_2 R2_2 47UF/6.3V 22UF/6.3V STDA_SSRX+

2
USB_PP5_X1 USB_PN6_X1 @ U3_U3RXDP2_C 7
GND_DRAIN

2
21 nbs_empass_ecmf_8p_13v_005;nbs_empass_ecmf_8p_13v_005_t;nbs_empass_ecmf_8p_13v_005_b 8
CO-LAY
R2_2
USB_PN5_X1 temp_M08_000010 U3_U3TXDN2_C 9
STDA_SSTX-
STDA_SSTX+
Right connector
nbs_empass_ecmf_8p_13v_005;nbs_empass_ecmf_8p_13v_005_t;nbs_empass_ecmf_8p_13v_005_b U3_U3TXDP2_C
/NA
temp_M08_000010 GND GND 10
P_GND1
/NA USB3.0_Port1 & USB3.0_Port2 GND 11
12
P_GND3 12013-00054300
P_GND4
13
P_GND2

USB_CON_9P
12013-00054300
GND

Note : 1. This part & symbol only apply for standard PCB stack-up listed in datasheet appendix I
C5210 0.1UF/16V
21 U3_U3TXDP1
Please check your project must matching the thickness , DF and DK value of PCB every layer 21 U3_U3TXDN1
C5209 1 2 0.1UF/16V U3_U3TXDP1_IAP U3_U3TXDP1_OAP U3_U3TXDP1_X3
1 2 U3_U3TXDN1_IAN U3_U3TXDN1_OAN U3_U3TXDN1_X3
2. C5504&C5503 / C5505&C5506 must replaced with 18pF 0201 capacitors and the tolerance of capacitance value is 5%
R5208 N/A 0Ohm
21 U3_U3RXDP1
3. Pin7 & Pin8 & Pin11 & Pin12 must be connected to system ground 21 U3_U3RXDN1
R5209 1 N/A 2 0Ohm U3_U3RXDP1_OBP U3_U3RXDP1_IBP U3_U3RXDP1_X2
@20200601_RF RD要求新增L5205~08 1 2 U3_U3RXDN1_OBN U3_U3RXDN1_IBN U3_U3RXDN1_X2
4. Pin13 to Pin16 are floated in regular scheme @20200608_重新叫零件for layout footprint C5211 0.1UF/16V
@20200615_L5211~14 重新叫零件for layout footprint & 修改排組名稱 21 U3_U3TXDN2
C5212 1 2 0.1UF/16V U3_U3TXDN2_ICN U3_U3TXDN2_OCN U3_U3TXDN2_X3
21 U3_U3TXDP2
1 2 U3_U3TXDP2_ICP U3_U3TXDP2_OCP U3_U3TXDP2_X3

R5210 N/A 0Ohm


21 U3_U3RXDN2
R5211 1 N/A 2 0Ohm U3_U3RXDN2_ODN U3_U3RXDN2_IDN U3_U3RXDN2_X2
21 U3_U3RXDP2
1 2 U3_U3RXDP2_ODP U3_U3RXDP2_IDP U3_U3RXDP2_X2

L5205 L5207
GND GND
1.87OHM 1.87OHM
8
6

8
6
GND4
GND2

GND4
GND2

SIG_IN- SIG_OUT- SIG_IN- SIG_OUT-


4 3 4 3

SIG_IN+ SIG_OUT+ SIG_IN+ SIG_OUT+


1 2 1 2
+3VA

USB3.0 ESD-Protection USB2.0 ESD-Protection HALL SENSOR


GND3
GND1

GND3
GND1

06033-00210000 06045-00040000 --> 06033-00210000


/RF/X /RF/X @20190830A
7
5

7
5

1
D5203 D5207

2
R5202
2 1 2 1 0Ohm R5203
U3_U3TXDN1_C U3_U3RXDP2_C 100KOhm
D5202 @

2
GND GND AZ5B6S-01B AZ5B6S-01B U5201

1
I/O3 I/O2
1 2 RN5202A 1 2 RN5204A USB_PP5_X1 4 3 USB_PN5_X1 1
0OHM 0OHM D5204 D5208 +5V_U5505 VDD GND VDD
5 2 3
I/O4 I/O1 GND
2 1 2 1 6 1 R5201 33Ohm 2
25,30,45,56 LID_SW# OUTPUT
U3_U3TXDN1_X3 U3_U3TXDN1_C U3_U3TXDN2_X3 U3_U3TXDN2_C U3_U3TXDP1_C U3_U3RXDN2_C GND LID_SW# 1 2 LID_SW#_OUT
ESD5485E-6/TR

1
D5201
AZ5B6S-01B AZ5B6S-01B APX8132AI-TRG

1
USB_PP6_X1 USB_PN6_X1
06033-00210000
4

C5202 C5201 @
D5205 D5209
L5214 L5212 0.1UF/6.3V 0.1UF/6.3V

2
2 1 2 1
90OHM 90OHM 1st Source: P/N:07024-02160000 ESD PROTECTION ESD5485E-6/TR
Irat=160mA Irat=160mA U3_U3RXDN1_C U3_U3TXDP2_C VPORT0402L331V05

2
3

@/EMI @/EMI 07024-01170000


AZ5B6S-01B AZ5B6S-01B
GND
D5206 D5210
U3_U3TXDP1_X3 U3_U3TXDP1_C U3_U3TXDP2_X3 U3_U3TXDP2_C GND GND
GND
3 4 RN5202B 3 4 RN5204B 2 1 2 1
0OHM 0OHM U3_U3RXDP1_C U3_U3TXDN2_C

AZ5B6S-01B AZ5B6S-01B current: 1mA


1 2 RN5201A 1 2 RN5203A
0OHM 0OHM
GND GND
U3_U3RXDN1_X2 U3_U3RXDN1_C U3_U3RXDN2_X2 U3_U3RXDN2_C
[0911]
ESD PROTECTION D5202,D5203,D5204,D5205
D5206,D5207,D5208,D5209
4

EMI Change(For USB3.1 Gen2)


L5213 L5211 1st Source: P/N:07024-01360000 ESD PROTECTION AZ5B6S-01B
90OHM 90OHM
Irat=160mA Irat=160mA
3

@/EMI @/EMI

U3_U3RXDP1_X2 U3_U3RXDP1_C U3_U3RXDP2_X2 U3_U3RXDP2_C


3 4 RN5201B 3 4 RN5203B
0OHM 0OHM

L5206 L5208
1.87OHM GND 1.87OHM GND
8
6

8
6
GND4
GND2

GND4
GND2

<Variant Name>
SIG_IN- SIG_OUT- SIG_IN- SIG_OUT-
4 3 4 3 Project Name Rev
SIG_IN+ SIG_OUT+ SIG_IN+ SIG_OUT+
1 2 1 2 UX482 R0.1

Title : AI_BD
GND3
GND1

GND3
GND1

Size
Custom
Dept.: NB1-RD3EE2 Engineer: EE
/RF/X /RF/X
7
5

7
5

Date: Monday, July 13, 2020 Sheet 52 of 102

USB3.0 EMI-Protection
GND GND
BOM

Project Name Rev

UX482 R0.1

Title :
Size
Dept.: NB1-RD3EE2 Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 61 of 102
<Variant Name>

Project Name Rev

UX482 R0.1

Title : NFC
Size
Dept.: NB1-RD3EE2 Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 63 of 102
Main Board

BOM

Project Name Rev

UX482 R0.1

Title :
Size
B
Dept.: NB1-RD3EE2 Engineer: EE
Date: Monday, July 13, 2020 Sheet 64 of 102
Main Board
Main Board

Project Name Rev

UX482 R0.1

Title : MCU STM32F205REY6TR


Size
Dept.: NB1-RD3EE2 Engineer: EE
C
Date: Monday, July 13, 2020 Sheet 55 of 102
Main Board

Justin : Removed no used Discharge circuit


1.8V ,VCCIO,+5VS load switch already build in 180~260 ohm discharge function

+1.1V DISCHARGE
+1.2V +1.8VS

@20200611_R5722 改不上件for UX482

1
R5722 R5703
+3VA /X 330Ohm +3VA 330Ohm

2
2

1
R5723 R5728
100KOhm +1.1V_DSG 100KOhm +1.8VS_DISCHRG

3
Q5708B Q5701B

2
1
5 EM6K1-G-T2R 5 EM6K1-G-T2R
Q5708.5 SUSB_EC

4
6

6
Q5708A Q5701A
2 EM6K1-G-T2R 2 EM6K1-G-T2R
27,30,58,86 PM_SUSC# 26,27,30,70,88,96 SUSB_EC#
1

1
@20200611_R5702 改不上件for UX482
+3VS

+VCCSTG

1
R5702
330Ohm
/X
1

2
26 VCCSTG_EN_12V 270Ohm

SR Check R5705 Q5701_PIN5


2

@
2

3
Q5702A Q5702B
R5706 2 5
EM6K1-G-T2R EM6K1-G-T2R
220KOhm SUSB_EC

4
+VCCSTG_DIG
3
1

Q5703B
Use 12VS_GATE and VCCSTG_EN_12V 5 EM6K1-G-T2R
for layout optimization
VCCSTG_DIS_G N/A
4
6

Q5703A
+12VS_GATE 2 EM6K1-G-T2R
1

N/A C5701
1

0.1UF/16V
N/A
+12VS_GATE DISCHARGE
2

+12VS_GATE

R1.1B Justin: for VCCSTG and VCCPLL_OC cannot be


cut off in S0 C10 with USB attached condition

2
VccSTG should have a discharge circuit,recommended nominal Rdischarge <= 300 to GND. R5707
And activated when the VccSTG load switch is disabled
+12VSUS
100KOhm

1
2
R5704
100KOhm +12VS_GATE_DSG

3
Q5704B

1
5 EM6K1-G-T2R
Q5703.5

4
6
Q5704A
2 EM6K1-G-T2R
27,88 C10_PWR_GATE#
1

<Variant Name>

Project Name Rev

UX482 R0.1

Title : DSG_Discharge
Size
Dept.: NB1-RD3EE2 Engineer: EE
B
Date: Monday, July 13, 2020 Sheet 57 of 102
EMI1 SPRING (4.7H) 13060-00570000*1 EMI2 SPRING (2.6H) *3 @20200708_SI CPU PI DC&AC sol: add 6PCS 0.1uF
13NB0I50M01011 +1.2V

U6906 U6910 change to 13040-00440000(SMT Gasket H=2.5mm)


@20190213A
C5936 C5937 C5938 C5940 C5941

2
C5939

2
2
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
U5902 U5908 U5901 0.1UF/16V
U5903 U5909 N/A N/A N/A N/A N/A

1
N/A

1
1
1 1 1
1 1 1 1 1
1 1

SMD98X118 SMD79X79 SMD79X79


SMD79X79 SMD157X118
13040-00920000 13NB0I40T01011 13NB0I40T01011
13NB0I40T01011 13040-00510000
/EMI /EMI /EMI
/EMI
GND GND GND GND GND
GND GND
GND

U6907 U6909 change to 13040-00920000(SMT Gasket H=3mm) +3VA


P_SMB0_CLK 30,60,89,90
@20190213A P_SMB0_DAT 30,60,89,90

U5906 U5905 EMI request @20181026A

1
1 1
1 1
D5901 D5902 D5903

SMD98X118 SMD98X118
AZ5325-01F AZ5325-01F AZ5325-01F 將U6904, U6908(改裸銅), U6905(改裸銅) 移除
BAT_CON
13040-00920000 13040-00920000
@
@20181122C

2
/EMI /EMI
GND GND

1
C5906 C5922 C5928 C5931 GND GND GND
0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V

2
4/2 for EMI
2017/04/05 EMI
GND G_PWR_SRC_NVVDD G_PWR_SRC_NVVDD
AC_BAT_SYS
AC_BAT_SYS

1
C5901
0.1UF/25V C5902 C5903
1

1
C5932 C5933 C5934 C5929 C5930 C5904 C5905 C5907 C5908 C5909 2.2UF/25V 2.2UF/25V

2
0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V
@ @
2

2
GND GND GND

GND GND
TOP side

2016/07/27 EMI
+NVVDD AC_BAT_SYS 58,86 1.2V_PWRGD

1
C5919
100PF/50V

2
1

1
C5913 C5914 C5915 C5916 C5917 C5918 C5920 C5921 C5923 C5924 C5925
C5910 C5911 C5912 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V
10PF/50V 10PF/50V 10PF/50V @ @
2

2
GND
@ @ @

GND
GND
GX501VI 1.1H
+5VS_PWR

C5935 10PF/50V
4,30,58,80 ALL_SYSTEM_PWRGD 27,30,32,33,40,41,58,70 BUF_PLT_RST#
1 2
@
1

GND
C5926 C5927 2017.05.02 EMI Reserve
<Core Design>
100PF/50V 100PF/50V
2

@
Title : OTH_EMI
Delete@ 20181015K
GND GND Engineer: EE
2016/11/09 EMI ASUSTeK COMPUTER
Size Project Name Rev

B GX502GX 1.0

Date: Monday, July 13, 2020 Sheet 59 of 102


Main Board
DC-IN Connector

DC Jack使用請詢用River_Hsu

New 6 Phi 4 Pin DC_Jack


+V_DCJACK A/D_DOCK_IN
J6001 PL6001

POWER(+) 3 1 2
4
CS 9
35OHM
1
GND(-) 2 89 A/D_MAX_POWER_R_10

1
5

1
SHELL 6 PC6007 PC6006 + PCE6000
7 0.1UF/25V 0.1UF/25V 15UF/25V
8

2
DETECT 10

89 P_DC_JACK_DETEC_10
DC_PWR_JACK_6P

GND GND
GND

CHIP Cap (H=2.1)


3.4CH 1.55CH
J6001
12033-00020200 12033-00020300

Battery Connector

BAT_CON

7A
WTOB_CON_8P

1
1
SIDE1 2
9 2
3
3
4 P_SMB0_CLK 30,59,89,90
4
5 P_SMB0_DAT 30,59,89,90
5
6
6
SIDE2 7
1

10 7 PC6001
8
8 0.1UF/25V
J6003
2

Project Name Rev

GA502IV R1.0

Title : DC & BAT IN


12017-00080400 GND Size
Dept.: NB_Power team Engineer: CS Lin
A3
Note:Battery Connector 正確性與BAT1_IN_OC#是否預留! Date: Monday, July 13, 2020 Sheet 60 of 104
<Core Design>

Title : I/O board(1-1)_CR_RTS5139


ASUSTeK COMPUTER
Engineer: EE
Size Project Name Rev

A GX502GX R1.2

Date: Monday, July 13, 2020 Sheet 62 of 102


GPU
TOP 3.7/6.5, BOT 3.7/4.7

H6511
1 @
CT256CB185D146

H6512
1 @
C146D146N

H6513
1 @
CT256CB185D146
H6504
H6514
1 @
C146D146N
CT236CB176D146

13020-01371400

GND CPU
TOP 3.7/6.5, BOT 3.7/4.7

H6517
H6503 1 @
CT256CB185D146

H6518
CT236CB176D146 1 @
CT256CB185D146
13020-05070100
H6519
1 @
GND CT256CB185D146

H6520
1 @
CT256CB185D146

@20200707_Modify H6533&H6535
H6533 /@

GND 1 2
GND NP_NC

2D_D138_D94N

H6535 /@
H6507
GND 1 2
GND NP_NC
TOP&BOT 2.4/8 TOP&BOT 3.5/8
Change @20181023F 1
NP_NC
H6531 GND 2 5
GND 1 H6525 C315D94 @ GND 1 H6523 C315D138 GND1 GND4 GND 2D_D138_D94N
1 GND 3 4
GND2 GND3 GND
GND 1 H6529 C315D94 @ GND 1
@
H6524 C315D138 C79D79N
NC @20181030B
@ /@
GND 1 H6521 C315D94 @

GND 1
H6522 CT236D79N
s12526 @20200629_del H6534
C236D91
@
change H6501 & H6502
GND 1 H6527 C315D94 @ Change @20181023F H6530
H6505
H6501
H6502
H6506 1
H6526 1 GND 1
GND 1 H6528 C315D94 @ 1 GND 1
NP_NC C94D94N
GND 2 5 C94D94N C276D138
GND1 GND4 GND C276D138
1 3 4 /@
GND /@ /@
NP_NC GND2 GND3 GND /@
GND 1 H6515 C315D94 @ GND 2 5
GND1 GND4 GND
GND 3 4
GND2 GND3 GND

GND 1 H6516 C315D94 @


CT236D79N
/@ s12526
@
@20200706_del H6532 change H6506 & H6505
<Core Design>
C315D94N
add H6507
Title : I/O board FUNC key
Add @20181029C
ASUSTeK COMPUTER
Engineer: EE
Size Project Name Rev

B GX502GX 1.0

Date: Monday, July 13, 2020 Sheet 65 of 102


Connected to MB Page56
OS LED (PWRBTN)
CON5501 change to J5501
@20190712B +3VSUS_PB Change @20181026B
100mA

1
R6601 H6601
+3VSUS_PB 330Ohm 7
GND4
1 6 H6604
J6601 NP_NC1 GND3
2 1

2
NP_NC2
3 5 C43D43N
GND2 4 NP_NC3 GND2
6 4 4
3 GND1 /@
3 PB_OS_LED +5VSUS_OSLED#
2
2 PB_PWR_SW#

+ 1
GND1 1
5 1 3D_2D205N_D43N
LED6601 /@ PB_GND
FPC_CON_4P
ORANGE
12018-00082000
07G015L00024

2
PB_GND PB_GND

PB_OS_LED

+5VSUS_PB --> +3VSUS_PB


R5510 750 OHM --> 330 OHM
@20190708A

POWER button
SW6601
1 2
PB_PWR_SW#
1

TACT_SWITCH_2P C6601
0.1UF/16V
12009-00103900 @
2

PB_GND PB_GND

C6602 1 2 0.1UF/16V @
+3VSUS_PB
C6603 1 2 0.1UF/16V @
<Core Design>
PB_OS_LED

Title : IO Con. to MB
PB_GND
ASUSTeK COMPUTER
Engineer: EE
Size Project Name Rev
A GX502GX 1.0

Date: Monday, July 13, 2020 Sheet 66 of 102


<Variant Name>

Title : IO_BD-2

ASUSTeK COMPUTER INC.


Engineer: Levi_Wang
Size Project Name Rev
Custom UX334 R1.0

Date: Monday, July 13, 2020 Sheet 67 of 102


BOM

Project Name Rev

UX482 R0.1

Title :
Size
Dept.: NB1-RD3EE2 Engineer: EE
B
Date: Monday, July 13, 2020 Sheet 68 of 102
Main Board

+1V8_AON
GN20E7: 02004-00650000
D7001
GPU POWER GOOD Signal 1 EMI
+1V8_AON

1
3
22,25,77,78 DGPU_PWROK R7001
2 +3VS

1
10KOhm C7009
+3VS +3VS @ 3 x 10uF
6 x 1.0 uF

1
PCH_GPIO17 BAT54CTB
R7005 GND 1UF/6.3V U7001A
2 x 22uF

2
R7007 1 2 10KOhm

2
+PEX_VDD +PEX_VDD
10KOhm
1/24 PCI_EXPRESS
2 x 4.7uF Place near GPU balls
Place between GPU & PS

2
R7013 R7010 C7026 0.022UF/16V
GND SL7010 1 2
@ BR31
10KOhm 10KOhm 1 2
0402 PEX_WAKE* Max:??mA
GPU_PEX_WAKE#_R GPU_PEX_WAKE# BF32
PEX_DVDD_1
SL7002 1 2
@ BT30 BF34
D7002 PEX_RST* PEX_DVDD_2

2
0402

1
1 GPU_PEX_RST# PEX_RST# BF35 C7044 C7043 C7010
97 PEXVDD_PWRGD PEX_DVDD_3
3 SL7003 1 2
@ BP31 BF37 C7021 C7022 C7025 C7027 10UF/25V 10UF/25V 10UF/25V
0402 PEX_CLKREQ* PEX_DVDD_4
2 PEX_CLK_REQ0#_R PEX_CLK_REQ0#_C BG32 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V N/A N/A N/A
PEX_DVDD_5

2
91 NVVDD_PWRGD SL7001 1 2
@ BJ30 BG34
22 GPU_PCIE_CLKP 0402 PEX_REFCLK PEX_DVDD_6
SL7004 1 2
@ PCIE_REFCLKP_C BK30 BG35
BAT54AW 22 GPU_PCIE_CLKN PEX_REFCLK* PEX_DVDD_7
0402 BG37
R7003 2 1 0Ohm PCIE_REFCLKN_C
94 FBVDDQ_PWRGD 07G004068410 PEX_DVDD_8
C7090 0.22UF/6.3V BL31 BH32
21 PCIENB_RXP5 PEX_TX0 PEX_DVDD_9

1
C7091 1 2 0.22UF/6.3V PCIEG_TXP0 BM31 BH34
21 PCIENB_RXN5 PEX_TX0* PEX_DVDD_10

1
1 2 PCIEG_TXN0 BH35 C7029 C7032 C7024 C7013
PEX_DVDD_11
BR32 BH37 1UF/6.3V 1UF/6.3V 22UF/6.3V 22UF/6.3V
21 PCIEG_RXP5 PEX_RX0 PEX_DVDD_12

2
PCIEG_RXP0 BT32 N/A N/A
21 PCIEG_RXN5 PEX_RX0*

2
PCIEG_RXN0
C7092 0.22UF/6.3V BJ32
21 PCIENB_RXP6 PEX_TX1
C7093 1 2 0.22UF/6.3V PCIEG_TXP1 BK32
21 PCIENB_RXN6 PEX_TX1*

1
1 2 PCIEG_TXN1 BF31 GND
PEX_CVDD_1
BP33 BG31 C7015 C7045
21 PCIEG_RXP6 PEX_RX1 PEX_CVDD_2 因Layout因素SIZE從0805更改為0603
PCIEG_RXP1 BR33 BH31 4.7UF/6.3V 4.7UF/6.3V
21 PCIEG_RXN6 PEX_RX1* PEX_CVDD_3

2
PCIEG_RXN1
C7094 0.22UF/6.3V BL33
21 PCIENB_RXP7 PEX_TX2
C7095 1 2 0.22UF/6.3V PCIEG_TXP2 BM33
21 PCIENB_RXN7 PEX_TX2*
1 2 PCIEG_TXN2
BR34
21 PCIEG_RXP7 PEX_RX2
PCIEG_RXP2 BT34
21 PCIEG_RXN7 PEX_RX2*
PCIEG_RXN2
C7096 0.22UF/6.3V BJ34
GPU POWER SEQUENCE CONTROL 21
21
PCIENB_RXP8
PCIENB_RXN8
C7097 1
1
2
2
0.22UF/6.3V PCIEG_TXP3
PCIEG_TXN3
BK34
PEX_TX3
PEX_TX3*
GND
BP35
21 PCIEG_RXP8 PEX_RX3
PCIEG_RXP3 BR35
21 PCIEG_RXN8 PEX_RX3*
PCIEG_RXN3
BL35
PEX_TX4
BM35
PEX_TX4*
@20200622_Change for TGL PCIe Lan 0~3
BR36
PEX_RX4
BT36
PEX_RX4*

BJ36
PEX_TX5
BK36 +1V8_AON
PEX_TX5*
+1V8_AON
BP37
PEX_RX5 PEX_HVDD_1
BF38 9 x 1.0 uF 3 x 10uF
R7034
1 2
10KOhm BR37
PEX_RX5* PEX_HVDD_2
BF40
BF41 +1V8_AON 2 x 4.7uF Place near GPU balls
2 x 22uF Place between GPU & PS
PEX_HVDD_3
BL37 BG38
PEX_TX6 PEX_HVDD_4
BM37 BG40 因Layout因素SIZE從0805更改為0603
77,78 GPU_PEX_RST# PEX_TX6* PEX_HVDD_5
BG41
78,98 GC6FBEN PEX_HVDD_6 Max:??mA
BR38 BG43
25,30 GC_STATE_EC PEX_RX6 PEX_HVDD_7
BT38 BG44
PEX_RX6* PEX_HVDD_8
+3VSUS

1
BH38 C7016 C7005 C7008
PEX_HVDD_9
BJ38 BH40 C7001 C7054 C7046 C7047 C7017 C7012 10UF/6.3V 10UF/25V 10UF/25V
PEX_TX7 PEX_HVDD_10
BK38 BH41 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 4.7UF/6.3V N/A N/A N/A
PEX_TX7* PEX_HVDD_11

2
BH43
PEX_HVDD_12
20
19
18

U7004 BP39 BH44


PEX_RX7 PEX_HVDD_13
1

BR39
GC_STATE_EC
GC6FBEN
GPU_PEX_RST#

PEX_RX7*
C7011 C7006 +1V8_AON GND

1
0.1UF/6.3V 1UF/6.3V BL39
PEX_TX8
2

1
BM39 C7048 C7014 C7049 C7020 C7004
PEX_TX8*
BF43 R7009 1 2 0Ohm 1UF/6.3V 1UF/6.3V 1UF/6.3V 22UF/6.3V 22UF/6.3V
PEX_PLL_HVDD

2
1 17 1 T7003 @ BR40 +PEX_PLL_HVDD N/A N/A
VDD 1V8_Main_EN PEX_RX8

2
1
GND 2 16 GPAK17_1V8M_EN 1 T7001 @ BT40
77,78 NVVDD_EN 1V8MAINEN_GPU NET17 PEX_RX8*
PCH_GPPK5 FUNCTION 3 15 GPAK16 C7053
71,94 1V8_AON_EN 1V8_AON_EN NVVDD_EN NVVDD_PWR_EN 78,91
4 14 GPAK15_NVVDD_EN 1 T7002 @ BJ40 1UF/6.3V
77 GC6FBEN_PCH GC6FBEN_3V3 GPU_PWR_EN PEX_TX9

1
H enter GC OFF 5 13 GPAK14_GPU_PWR_EN BK40 GND
NVVDD_PG PEX_VDD_EN PEXVDD_PWR_EN 97 PEX_TX9*
PCH_GPPK5 NVVDD_PWRGD 6
SUSB_EC# FBVDDQ_EN
12 PEXVDD_PWR_EN
DGPU_FBVDDQ_EN 94
C7051 C7052 因Layout因素SIZE從0805更改為0603
L exit GC OFF 7 11 GPAK12_MEM_EN BP41 1UF/6.3V 1UF/6.3V
25 DGPU_PWR_EN# DGPU_PWR_EN# GND PEX_RX9

2
BR41
BUF_PLT_RST#

PEX_RX9*
DISCHARGER

GND
GPU_RST#

BL41
PEX_TX10
R7016 1 2 0Ohm BM41
26,27,30,57,88,96 SUSB_EC# PEX_TX10*
GND
R7021 1 @ 2 0Ohm BR42 GND
26,27,30,58,88,96 PM_SUSB# PEX_RX10
SUSB#_PWR_R SLG4U43572V BT42
8
9
10

PEX_RX10*
06004-01490100 BJ42
PEX_TX11
BK42
PEX_TX11*
27,30,32,33,40,41,58,59 BUF_PLT_RST#
BP43
71 GPU_DISCHRG PEX_RX11
BR43
25 GPU_RST# PEX_RX11*

BL43
PEX_TX12
20190327 change CPLD LOGIC SLG4U42939V BM43
20200115 change SLG4U42939V part to 06004-01490100 PEX_TX12*

BR44
PEX_RX12
BT44
PEX_RX12*

BJ44
PEX_TX13
BK44
PEX_TX13*

BP45
PEX_RX13
BR45
PEX_RX13*

BL45
PEX_TX14
BM45 BK46
PEX_TX14* PEX_CVDD_SENSE PS_PEXDVDD_FB_R 97
PS_PEXDVDD_FB_R
BR46
PEX_RX14
BT46
PEX_RX14*

BL47
PEX_TX15
BM47
PEX_TX15*

BP47 BT50 R7002 1 1% 2 2.49KOhm


PEX_RX15 PEX_TERMP
BR47 PEX_TERMP
PEX_RX15*

GND

GB5-256
02004-00650000
+1V8_AON

R7006
5

0Ohm
2 1 Project Name Rev
27,33 PCIE_WAKE#
GPU_WAKE#_R @ GPU_PEX_WAKE#_R
GX502GX
3 4
R1.2
Q7009B
PJX8838_R1_00002
07005-02020000
For EMI Title : GPU_PCIE I/F
@ Size
Dept.: Engineer:
ASUSTeK COMPUTER INC. NB1
Custom
C7033 1 2 680PF/50V
Date: Monday, July 13, 2020 Sheet 70 of 102
GPU_PEX_RST#
C7031 1 2 680PF/50V
GPU_RST#

GND

DGPU_PWROK
R7042
2

0Ohm
2 1
22 CLKREQ0_PEGA#
PEXCLK_REQ0#_R @ PEX_CLK_REQ0#_R
6 1

Q7009A
07005-02020000
PJX8838_R1_00002
@
Main Board
+PEX_VDD +PEX_VDD_IFP_IOVDD
+1V8_AON

SL7901
1 2
0805
@
HDMI
1

2
4
C7903 C7905
4.7UF/6.3V 4.7UF/6.3V U7001R U7001S RN7902B
RN7902A
8/24 IFPC 2.2KOhm
2

7/24 IFPAB R7901 2.2KOhm


+1V8_AON 1KOhm BH20
GND
2 1% 1 IFPCD_RSET
IFPCD_RSET
DVI/HDMI DP
@20200625_Add HDMI Port

1
3
IFP_PLLVDD
PLACE CLOSE GPU
BT10 RN7903B 3 4 BH19 BM10
IFPA_AUX_SDA* 2.2KOhm IFPCD_PLLVDD SDA IFPC_AUX_SDA*
GND BT11 IFPA_AUX_SDA RN7903A 1 2 IFP_PLLVDD BL10 IFPC_HDMI_DDC_DATA
IFPA_AUX_SCL 2.2KOhm SCL IFPC_AUX_SCL
IFPA_AUX_SCL Max:660 mA IFPC_HDMI_DDC_CLK

1
C7902
R7923 BR20 1UF/6.3V BK17
IFPA_L3* TXC IFPC_L3* IFPC_HDMI_CLKN 48
1KOhm BH23 BP20 PLACE AT BALLS BL17
GND IFPAB_RSET IFPA_L3 TXC IFPC_L3 IFPC_HDMI_CLKP 48

2
2 1% 1 IFPAB_RSET
+1V8_AON_PLLVDD BL19
TXD0 IFPC_L2* IFPC_HDMI_TXN0 48
BP22 BM19
IFPA_L2* TXD0 IFPC_L2 IFPC_HDMI_TXP0 48
BR22 GND
IFPA_L2 IFPC
R7924 1 2 0Ohm BH22 TXD1 BK19
IFPAB_PLLVDD IFPC_L1* IFPC_HDMI_TXN1 48
IFP_PLLVDD TXD1 BJ19
IFPC_L1 IFPC_HDMI_TXP1 48

1
C7912 BT22
Max:660 mA IFPA_L1*
+PEX_VDD_IFP_IOVDD
1UF/6.3V BT23 BK20
IFPA_L1 TXD2 IFPC_L0* IFPC_HDMI_TXN2 48
PLACE AT BALLS BL20
TXD2 IFPC_L0 IFPC_HDMI_TXP2 48

2
BR23
IFPA_L0* Max:305mA
BP23 BF19
IFPA_L0 IFP_IOVDD_5
GND BF20
IFP_IOVDD_6
+1V8_AON

1
C7921 C7920 C7908 C7907 GB5-256
4.7UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 02004-00650000

2
BR11 RN7904B 3 4 PLACE AT BALLS
IFPB_AUX_SDA* 2.2KOhm
BP11 IFPB_AUX_SDA RN7904A 1 2 GND GND GND GND
IFPB_AUX_SCL 2.2KOhm
IFPB_AUX_SCL
PLACE CLOSE GPU
+PEX_VDD_IFP_IOVDD BL22
IFPB_L3*
BF14 BM22
IFP_IOVDD_2 IFPB_L3
BF13
IFP_IOVDD_1
Max:305mA GB5-256
BF16 BK22

EDP(4Lane Panel)
IFP_IOVDD_3 IFPB_L2*
BF17 BJ22
IFP_IOVDD_4 IFPB_L2
+1V8_AON
1

1
1

C7906 C7917 C7934 C7933 BK23


IFPB_L1*
4.7UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V BL23 U7001T
IFPB_L1
2

9/24 IFPD R7905 1 N/A 2 100KOhm


R7907 1 N/A 2 100KOhm
BK25
IFPB_L0*
GND GND GND BJ25 DVI/HDMI DP
IFPB_L0
PLACE CLOSE GPU PLACE AT BALLS
BL11
SDA IFPD_AUX_SDA*
BM11
SCL IFPD_AUX_SCL
02004-00650000

BT16
TXC
TXC
IFPD_L3*
BT17 @20200625_remove Port
IFPD_L3

BR17
TXD0 IFPD_L2*
BP17
TXD0 IFPD_L2
IFPD
TXD1 BP19
IFPD_L1*
TXD1 BR19
IFPD_L1
+PEX_VDD_IFP_IOVDD BT19
TXD2 IFPD_L0*
BT20
TXD2 IFPD_L0

Max:305mA
BF22
IFP_IOVDD_7
BF23
IFP_IOVDD_8

1
C7910 C7911 GB5-256
1UF/6.3V 1UF/6.3V 02004-00650000

2
IFPD 要接eDP
PLACE CLOSE GPU PLACE AT BALLS
GND

+1V8_AON

DP 1
R7928
100KOhm
2
U7001U 1 2
10/24 IFPE
R7929
DVI/HDMI DP 100KOhm
R7902
1KOhm BH17 SDA BJ11
GND IFPEF_RSET IFPE_AUX_SDA*
2 1% 1 IFPE_RSET SCL BK11
IFPE_AUX_SCL
IFP_PLLVDD

BH16
TXC IFPE_L3*
BL13
BM13
@20200625_remove Port
IFPEF_PLLVDD TXC IFPE_L3
IFP_PLLVDD

1
C7904 BK13
Max:660 mA TXD0 IFPE_L2*
1UF/6.3V TXD0 BJ13
IFPE_L2
PLACE AT BALLS

2
TXD1 BK14
IFPE_L1*
TXD1 BL14
IFPE_L1
IFPE
GND BL16
TXD2 IFPE_L0*
+PEX_VDD_IFP_IOVDD BM16
TXD2 IFPE_L0

Max:305mA
BG13
IFP_IOVDD_9
BG14
IFP_IOVDD_10
BG23
IFP_IOVDD_15

1
C7915
1UF/6.3V GB5-256

2
02004-00650000

PLACE AT BALLS
GND

IFPF(not used)
@20200625_Add HDMI Port U7001V
6/24 IFPF

+1V8_AON
DVI/HDMI DP

BK10 RN7901A 1 2
+1V8_AON +3VS +3VS SDA IFPF_AUX_SDA* 2.2KOhm
BJ10 IFPF_AUX_SDA RN7901B 3 4
SCL IFPF_AUX_SCL 2.2KOhm
IFPF_AUX_SCL
R7903 @ 0Ohm
R7913 1 N/A 2 0Ohm BP13
TXC IFPF_L3*
2

1 2
BR13
R7911 R7912 TXC IFPF_L3
10KOhm 10KOhm BT13
TXD0 IFPF_L2*
to GPU IFPF
TXD0 IFPF_L2
BT14
1

Q7901A
2

BR14
UM6K1N TXD1 IFPF_L1*
+PEX_VDD_IFP_IOVDD BP14
R7904 1 2 @ 1 6 R7906 1 2 @ TXD1 IFPF_L1
0402 0402 IFPC_HDMI_DDC_DATA_3V 48
IFPC_HDMI_DDC_DATA BP16
TXD2 IFPF_L0*
BR16
R7908 1 2 @ 4 3 R7910 1 2 @ Max:305mA TXD2 IFPF_L0
0402 0402 IFPC_HDMI_DDC_CLK_3V 48 BG19
IFPC_HDMI_DDC_CLK IFP_IOVDD_13
BG20
Q7901B IFP_IOVDD_14
BG16
UM6K1N IFP_IOVDD_11
1

BG17
5

IFP_IOVDD_12
C7923 C7922 C7913 C7909
4.7UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

GB5-256

Q7814只用07G005107010 Vth 1.5V Ciss 13pF與07G005905021 Vth 1.5V Ciss 7.8pF GND GND GND GND
02004-00650000

PLACE AT BALLS PLACE AT BALLS

Project Name Rev

GX502GX R1.2

Title : GPU_DP/EDP/HDMI/LVDS/CRT
Size
Custom
Dept.: ASUSTeK COMPUTER INC. Engineer: EE
Date: Monday, July 13, 2020 Sheet 79 of 102
@20200705_Memory P/N
Samsung_256*32_K4Z80325BC : 03014-00010600(目前
Micron_256M*32_MT61K256M32JE: 03014-00010500

40 OHm_NET
40 OHm_NET 72 FBA_D[63..32]
FBA Partition 64..32
72 FBA_D[31..0]
FBA Partition 31..0 +FBVDDQ MF=0 Normal +FBVDDQ

72 FBA_CMD[52..0]
MF=1 Mirror

U73002
U73001 N4
VDDQ1
N4 B4 T4
VDDQ1 DQ0_A VDDQ2
B4 T4 FBA_D41 A3 N11
DQ0_A VDDQ2 DQ1_A VDDQ3
FBA_D9 A3 N11 FBA_D40 B3 T11
DQ1_A VDDQ3 DQ2_A VDDQ4
FBA_D8 B3 T11 FBA_D42 B2 F11
DQ2_A VDDQ4 DQ3_A VDDQ5
FBA_D13 B2 F11 FBA_D44 E3 F4
DQ3_A VDDQ5 DQ4_A VDDQ6
FBA_D10 E3 F4 FBA_D47 E2 J13
DQ4_A VDDQ6 DQ5_A VDDQ7
FBA_D14 E2 J13 FBA_D46 F2 J2
DQ5_A VDDQ7 DQ6_A VDDQ8
FBA_D11 F2 J2 FBA_D43 G2 U5
DQ6_A VDDQ8 DQ7_A VDDQ9
FBA_D15 G2 U5 FBA_D45 B11 U10
DQ7_A VDDQ9 DQ8_A VDDQ10
FBA_D12 B11 U10 FBA_D60 A12 P1
DQ8_A VDDQ10 DQ9_A VDDQ11
FBA_D24 A12 P1 FBA_D61 B12 P14
DQ9_A VDDQ11 DQ10_A VDDQ12
FBA_D27 B12 P14 FBA_D62 B13 T1
DQ10_A VDDQ12 DQ11_A VDDQ13
FBA_D25 B13 T1 FBA_D58 E12 T14
DQ11_A VDDQ13 DQ12_A VDDQ14
FBA_D30 E12 T14 FBA_D63 E13 L1
DQ12_A VDDQ14 DQ13_A VDDQ15
FBA_D26 E13 L1 FBA_D59 F13 L14
DQ13_A VDDQ15 DQ14_A VDDQ16
FBA_D31 F13 L14 FBA_D57 G13 C1
DQ14_A VDDQ16 DQ15_A VDDQ17
FBA_D28 G13 C1 FBA_D56 C4
DQ15_A VDDQ17 VDDQ18
FBA_D29 C4 C11
VDDQ18 VDDQ19
C11 H3 C14
VDDQ19 CA0_A VDDQ20
H3 C14 FBA_CMD33 G11 E1
CA0_A VDDQ20 CA1_A VDDQ21
FBA_CMD1 G11 E1 FBA_CMD45 G4 E14
CA1_A VDDQ21 CA2_A VDDQ22
FBA_CMD13 G4 E14 FBA_CMD35 H12 K2
CA2_A VDDQ22 CA3_A VDDQ23
FBA_CMD12 H12 K2 FBA_CMD46 H5 K13
CA3_A VDDQ23 CA4_A VDDQ24
FBA_CMD24 H5 K13 FBA_CMD36 H10 B5
CA4_A VDDQ24 CA5_A VDDQ25
FBA_CMD11 H10 B5 FBA_CMD43 J12 B10
CA5_A VDDQ25 CA6_A VDDQ26
FBA_CMD15 J12 B10 FBA_CMD48 J11 H1
CA6_A VDDQ26 CA7_A VDDQ27
FBA_CMD22 J11 H1 FBA_CMD47 J4 H14
CA7_A VDDQ27 CA8_A VDDQ28
FBA_CMD23 J4 H14 FBA_CMD34 J3
CA8_A VDDQ28 CA9_A
FBA_CMD0 J3 FBA_CMD32 J5
CA9_A CABI_n_A
FBA_CMD2 J5 FBA_CMD37 G10 P5
CABI_n_A CKE_n_A VDD1
FBA_CMD10 G10 P5 FBA_CMD44 E5
CKE_n_A VDD1 VDD2
FBA_CMD14 E5 E10
VDD2 VDD3
E10 D2 L2
VDD3 72 FBA_DBI5 DBI0_n_A VDD4
D2 L2 D13 L13
72 FBA_DBI1 DBI0_n_A VDD4 72 FBA_DBI7 DBI1_n_A VDD5
D13 L13 A1
72 FBA_DBI3 DBI1_n_A VDD5 VDD6
A1 D4 A14
VDD6 72 FBA_WCKB45 WCK_t_A VDD7
D4 A14 D5 H2
72 FBA_WCKB01 WCK_t_A VDD7 72 FBA_WCKB45# WCK_c_A VDD8
D5 H2 H13
72 FBA_WCKB01# WCK_c_A VDD8 VDD9
H13 P10
VDD9 VDD10
P10 C2 V1
VDD10 72 FBA_EDC5 EDC0_A VDD11
C2 V1 C13 V14
72 FBA_EDC1 EDC0_A VDD11 72 FBA_EDC7 EDC1_A VDD12
C13 V14 MEM_VPP
72 FBA_EDC3 EDC1_A VDD12
MEM_VPP
A5
VPP1
A5 A10
VPP1 VPP2
A10 V5
VPP2 VPP3
V5 U4 V10
VPP3 DQ0_B VPP4
U4 V10 FBA_D32 V3
DQ0_B VPP4 DQ1_B
FBA_D4 V3 FBA_D33 U3
DQ1_B DQ2_B
FBA_D2 U3 FBA_D36 U2 E11
DQ2_B DQ3_B VSS1
FBA_D6 U2 E11 FBA_D39 P3 A13
DQ3_B VSS1 DQ4_B VSS2
FBA_D5 P3 A13 FBA_D34 P2 A11
DQ4_B VSS2 DQ5_B VSS3
FBA_D7 P2 A11 FBA_D38 N2 E4
DQ5_B VSS3 DQ6_B VSS4
FBA_D0 N2 E4 FBA_D35 M2 A2
DQ6_B VSS4 DQ7_B VSS5
FBA_D3 M2 A2 FBA_D37 U11 A4
DQ7_B VSS5 DQ8_B VSS6
FBA_D1 U11 A4 FBA_D55 V12 H11
DQ8_B VSS6 DQ9_B VSS7
FBA_D17 V12 H11 FBA_D48 U12 H4
DQ9_B VSS7 DQ10_B VSS8
FBA_D21 U12 H4 FBA_D53 U13 P4
DQ10_B VSS8 DQ11_B VSS9
FBA_D16 U13 P4 FBA_D49 P12 G3
DQ11_B VSS9 DQ12_B VSS10
FBA_D18 P12 G3 FBA_D54 P13 G12
DQ12_B VSS10 DQ13_B VSS11
FBA_D19 P13 G12 FBA_D51 N13 B1
DQ13_B VSS11 DQ14_B VSS12
FBA_D20 N13 B1 FBA_D52 M13 B14
DQ14_B VSS12 DQ15_B VSS13
FBA_D22 M13 B14 FBA_D50 D1
DQ15_B VSS13 VSS14
FBA_D23 D1 D3
VSS14 VSS15
D3 D12
VSS15 VSS16
D12 L3 D14
VSS16 CA0_B VSS17
L3 D14 FBA_CMD29 M11 F1
CA0_B VSS17 CA1_B VSS18
FBA_CMD5 M11 F1 FBA_CMD52 M4 F3
CA1_B VSS18 CA2_B VSS19
FBA_CMD18 M4 F3 FBA_CMD40 L12 F12
CA2_B VSS19 CA3_B VSS20
FBA_CMD7 L12 F12 FBA_CMD50 L5 F14
CA3_B VSS20 CA4_B VSS21
FBA_CMD20 L5 F14 FBA_CMD39 L10 M1
CA4_B VSS21 CA5_B VSS22
FBA_CMD8 L10 M1 FBA_CMD42 K12 M3
CA5_B VSS22 CA6_B VSS23
FBA_CMD16 K12 M3 FBA_CMD49 K11 M12
CA6_B VSS23 CA7_B VSS24
FBA_CMD21 K11 M12 FBA_CMD51 K4 M14
CA7_B VSS24 CA8_B VSS25
FBA_CMD19 K4 M14 FBA_CMD28 K3 T3
CA8_B VSS25 CA9_B VSS26
FBA_CMD6 K3 T3 FBA_CMD30 K5 T12
CA9_B VSS26 CABI_n_B VSS27
FBA_CMD4 K5 T12 FBA_CMD38 M10 C5
CABI_n_B VSS27 CKE_n_B VSS28
FBA_CMD9 M10 C5 FBA_CMD41 C10
CKE_n_B VSS28 VSS29
FBA_CMD17 C10 G1
VSS29 VSS30
G1 R2 G14
VSS30 72 FBA_DBI4 DBI0_n_B VSS31
R2 G14 R13 L4
72 FBA_DBI0 DBI0_n_B VSS31 72 FBA_DBI6 DBI1_n_B VSS32
R13 L4 L11
72 FBA_DBI2 DBI1_n_B VSS32 VSS33
L11 P11
VSS33 VSS34
P11 R11 C3
VSS34 72 FBA_WCK67 WCK_t_B VSS35
R11 C3 R10 C12
72 FBA_WCK23 WCK_t_B VSS35 72 FBA_WCK67# WCK_c_B VSS36
R10 C12 N1
72 FBA_WCK23# WCK_c_B VSS36 VSS37
N1 N3
VSS37 VSS38
N3 T2 N12
VSS38 72 FBA_EDC4 EDC0_B VSS39
T2 N12 T13 N14
72 FBA_EDC0 EDC0_B VSS39 72 FBA_EDC6 EDC1_B VSS40
T13 N14 R1
72 FBA_EDC2 EDC1_B VSS40 VSS41
R1 R3
VSS41 VSS42
R3 R12
VSS42 VSS43
R12 R14
VSS43 VSS44
R14 K10 U1
VSS44 72 FBA_CLK1# CK_c VSS45
K10 U1 J10 U14
72 FBA_CLK0# CK_c VSS45 72 FBA_CLK1 CK_t VSS46
J10 U14 T5
72 FBA_CLK0 CK_t VSS46 VSS47
T5 T10
VSS47 VSS48
T10 V2
VSS48 VSS49
V2 V4
VSS49 VSS50
V4 J1 V11
VSS50 RESET_n VSS51
J1 V11 FBA_CMD31 V13
RESET_n VSS51 VSS52
FBA_CMD3 V13
VSS52

D11 GND
NC1 FBA_WCKB67 72
D11 GND D10
NC1 FBA_WCKB23 72 NC5 FBA_WCKB67# 72
D10 N5 R4
NC5 FBA_WCKB23# 72 TCK NC4 FBA_WCK45 72
N5 R4 F10 R5
TCK NC4 FBA_WCK01 72 TDI NC2 FBA_WCK45# 72
F10 R5 N10 G5
TDI NC2 FBA_WCK01# 72 TDO NC6
N10 G5 F5 M5
TDO NC6 TMS NC3
F5 M5
TMS NC3

J14 121Ohm 2 1% 1 R73003


ZQ_A GND
J14 121Ohm 2 1% 1 R73001 FBA_ZQ_2A /GPU_KA
ZQ_A GND
FBA_ZQ_1A /GPU_KA K1 K14 121Ohm 2 1% 1 R73004
VREFC ZQ_B GND
K1 K14 121Ohm 2 1% 1 R73002 FBA_VREFC_H FBA_ZQ_2B /GPU_KA
VREFC ZQ_B GND
FBA_VREFC_L FBA_ZQ_1B /GPU_KA
2
2

R73006
R73005 1KOhm MT61K256M32JE-14:A
1KOhm MT61K256M32JE-14:A 1% 03014-00010600
1% 03014-00010600 /GPU_KA
1

/GPU_KA
1

GND
GND

Project Name Rev

GX502GX R1.2

Title : VRAM_Channel_A
Size
Dept.: Engineer:
ASUSTeK COMPUTER INC. NB1
Custom
Date: Monday, July 13, 2020 Sheet 73 of 101
TGL IMVP9 (1) Power [For CPU]

81 P_IMVP9_TEMP_10

1
PR8032 PC8014
49.9KOhm 1UF/6.3V
N/A N/A

2
2
+3VS_PWR
PR8031
4.7OHM
N/A
nbs_r0603_h39_000s
89 P_IMVP9_PSYS_INFO
2 1

1
Psys FF=0.8V

1
PR8005 PC8001
0Ohm 0.01UF/50V 33W - 5.1K / 10G212510114030
45W - 5.36K / 10G212536114030

1
N/A N/A PC8013
65W - 5.36K / 10G212536114030

2
4.7UF/6.3V

2
90W - 4.02K / 10G2124021140300 N/A
120W - 4.02K / 10G212402114030

2
PR8034
2MOhm
N/A

81 P_IMVP9_VINSEN_R_10 P_IMVP9_PWM1_10 81
1 2
P_IMVP9_PWM2_10 81
P_IMVP9_PWM3_10 81

1
PR8035 PC8015
133KOhm 0.01UF/50V
N/A N/A

2
2
PR8007
1.5KOHM
N/A
1 2 PSL8006
P_VCCIN_CS_SUM_10 @
1 2
0402 ALL_SYSTEM_PWRGD 4,30,58,59
81 P_VCCIN_CS3_10
PR8002
1.5KOHM
N/A
1 2
P_VCCIN_CS_SUM_10 PSL8007

P_IMVP9_VINSEN_10
@

P_IMVP9_VDD33_10
P_IMVP9_PWM1_10
P_IMVP9_PWM2_10
P_IMVP9_PWM3_10
P_IMVP9_TEMP_10
P_IMVP9_PSYS_10
1 2
81 P_VCCIN_CS2_10 0402
PR8003
1.5KOHM
N/A
1 2
P_VCCIN_CS_SUM_10

81 P_VCCIN_CS1_10 P_IMVP9_STB_10 81
PU8001 PR8025

33
32
31
30
29
28
27
26
25
24
23
22
MP2940AGRT-1076-C787-Z 0Ohm
N/A

AGND5
AGND4
AGND3
AGND2
AGND1
VIN_SEN
PSYS
TEMP
VDD33
PWM1
PWM2
PWM3
P_SMB2_CLK_50OHM 28
2 1
P_SMB2_DATA_50OHM 28
2 1
1 21 PR8026
CS3 EN
P_IMVP9_CS3_10 2 20 P_IMVP9_EN_10 0Ohm
CS2 PE
P_IMVP9_CS2_10 3 19 P_IMVP9_PE_10 N/A
1

CS1 STB IMVP9_VRHOT# 23


1

PR8004 PC8016 P_IMVP9_CS1_10 4 18 P_IMVP9_STB_10


VDIFF SCL_P
806Ohm 560PF/50V P_IMVP9_VDIFFA_10 5 17 P_IMVP9_SCL_10 PSL8005
VFB SDA_P
N/A @ P_IMVP9_VFBA_10 6 16 P_IMVP9_SDA_10 @
VOSEN VRHOT#
2

P_VCCIN_VCCSENSE_R_50OHM 7 15 P_IMVP9_VR_HOT#_10 1 2
2

VORTN VRRDY 0201 IMVP9_PWRGD 27,30

SCLK/VID0
SDIO/VID1
P_VCCIN_VSSSENSE_R_50OHM P_IMVP9_PWRGD_10
VCCIN

CS_SUM
LL=2mohm

VDD18
IMON

ALT#
IREF
+VCCIN PJ8004 PR8060 PR8024

8
9
10
11
12
13
14
SHORT_PAD 100Ohm 1Ohm 5%
@ N/A N/A +1.05V_VCCST
1 2 1 2

P_SVID_ALERT#_50OHM_X1
P_IMVP9_SVID_VCC_10 2 1

P_IMVP9_VCCIN_IOUT_10

P_SVID_DATA_50OHM_X1
P_SVID_CLK_50OHM_X1
P_VCCIN_CS_SUM_10

P_IMVP9_VDD18_10
P_IMVP9_IREF_10

1
PSL8003
P_VCCIN_VCCSENSE_L_50OHM PC8011

1
@ PR8022 0.1UF/25V

1
1 2 45.3Ohm PR8023 N/A

2
9 P_VCCIN_VCCSENSE_50OHM 0402
N/A 100Ohm
N/A

2
1

PC8003 @ PR8021
1000PF/50V PSL8011 0Ohm
@ 1 2 N/A
P_SVID_ALERT#_50OHM_X2 9
2

PSL8004 0402 1 2
P_SVID_DATA_50OHM_X2 9
@ 1 2
P_SVID_CLK_50OHM_X2 9
1 2 PR8020
9 P_VCCIN_VSSSENSE_50OHM 0402
0Ohm
N/A

P_VCCIN_VSSENSE_L_50OHM
PJ8005 PR8061
SHORT_PAD 100Ohm
@ N/A
1
1

1 2 1 2 PR8015 PR8017 PC8010


1

57.6KOHM PC8008 73.2KOhm 1UF/6.3V


N/A 390PF/50V N/A
2

Place Close to CPU


2
2

PT800* 請放置 PU8001旁;並請放置Trace 上!

ICCMAX=65A PT8001
1 @
P_IMVP9_PE_10
NB_TPC20T

<Variant Name>

Project Name Rev

FX516 R0.1

Title : PW_TGL_UP3_MPS_+VCCIN(1)
Size
Dept.: NB1-RD3EE2 Engineer: Matt
A2
Date: Monday, July 13, 2020 Sheet 80 of 102
@20200705_Memory P/N
Samsung_256*32_K4Z80325BC : 03014-00010600(目前
Micron_256M*32_MT61K256M32JE: 03014-00010500

40 OHm_NET 72 FBC_D[63..32] 40 OHm_NET


72 FBC_D[31..0]
FBC Partition 31..0 FBC Partition 64..32
MF=1 Mirror +FBVDDQ MF=0 Normal +FBVDDQ
72 FBC_CMD[52..0]

U75003 U75004
N4 N4
VDDQ1 VDDQ1
B4 T4 B4 T4
DQ0_A VDDQ2 DQ0_A VDDQ2
FBC_D9 A3 N11 FBC_D45 A3 N11
DQ1_A VDDQ3 DQ1_A VDDQ3
FBC_D8 B3 T11 FBC_D44 B3 T11
DQ2_A VDDQ4 DQ2_A VDDQ4
FBC_D15 B2 F11 FBC_D40 B2 F11
DQ3_A VDDQ5 DQ3_A VDDQ5
FBC_D10 E3 F4 FBC_D46 E3 F4
DQ4_A VDDQ6 DQ4_A VDDQ6
FBC_D13 E2 J13 FBC_D42 E2 J13
DQ5_A VDDQ7 DQ5_A VDDQ7
FBC_D12 F2 J2 FBC_D41 F2 J2
DQ6_A VDDQ8 DQ6_A VDDQ8
FBC_D14 G2 U5 FBC_D43 G2 U5
DQ7_A VDDQ9 DQ7_A VDDQ9
FBC_D11 B11 U10 FBC_D47 B11 U10
DQ8_A VDDQ10 DQ8_A VDDQ10
FBC_D25 A12 P1 FBC_D62 A12 P1
DQ9_A VDDQ11 DQ9_A VDDQ11
FBC_D31 B12 P14 FBC_D60 B12 P14
DQ10_A VDDQ12 DQ10_A VDDQ12
FBC_D24 B13 T1 FBC_D61 B13 T1
DQ11_A VDDQ13 DQ11_A VDDQ13
FBC_D30 E12 T14 FBC_D58 E12 T14
DQ12_A VDDQ14 DQ12_A VDDQ14
FBC_D27 E13 L1 FBC_D63 E13 L1
DQ13_A VDDQ15 DQ13_A VDDQ15
FBC_D29 F13 L14 FBC_D57 F13 L14
DQ14_A VDDQ16 DQ14_A VDDQ16
FBC_D26 G13 C1 FBC_D59 G13 C1
DQ15_A VDDQ17 DQ15_A VDDQ17
FBC_D28 C4 FBC_D56 C4
VDDQ18 VDDQ18
C11 C11
VDDQ19 VDDQ19
H3 C14 H3 C14
CA0_A VDDQ20 CA0_A VDDQ20
FBC_CMD1 G11 E1 FBC_CMD33 G11 E1
CA1_A VDDQ21 CA1_A VDDQ21
FBC_CMD13 G4 E14 FBC_CMD45 G4 E14
CA2_A VDDQ22 CA2_A VDDQ22
FBC_CMD12 H12 K2 FBC_CMD35 H12 K2
CA3_A VDDQ23 CA3_A VDDQ23
FBC_CMD24 H5 K13 FBC_CMD46 H5 K13
CA4_A VDDQ24 CA4_A VDDQ24
FBC_CMD11 H10 B5 FBC_CMD36 H10 B5
CA5_A VDDQ25 CA5_A VDDQ25
FBC_CMD15 J12 B10 FBC_CMD43 J12 B10
CA6_A VDDQ26 CA6_A VDDQ26
FBC_CMD22 J11 H1 FBC_CMD48 J11 H1
CA7_A VDDQ27 CA7_A VDDQ27
FBC_CMD23 J4 H14 FBC_CMD47 J4 H14
CA8_A VDDQ28 CA8_A VDDQ28
FBC_CMD0 J3 FBC_CMD34 J3
CA9_A CA9_A
FBC_CMD2 J5 FBC_CMD32 J5
CABI_n_A CABI_n_A
FBC_CMD10 G10 P5 FBC_CMD37 G10 P5
CKE_n_A VDD1 CKE_n_A VDD1
FBC_CMD14 E5 FBC_CMD44 E5
VDD2 VDD2
E10 E10
VDD3 VDD3
D2 L2 D2 L2
72 FBC_DBI1 DBI0_n_A VDD4 72 FBC_DBI5 DBI0_n_A VDD4
D13 L13 D13 L13
72 FBC_DBI3 DBI1_n_A VDD5 72 FBC_DBI7 DBI1_n_A VDD5
A1 A1
VDD6 VDD6
D4 A14 D4 A14
72 FBC_WCKB01 WCK_t_A VDD7 72 FBC_WCKB45 WCK_t_A VDD7
D5 H2 D5 H2
72 FBC_WCKB01# WCK_c_A VDD8 72 FBC_WCKB45# WCK_c_A VDD8
H13 H13
VDD9 VDD9
P10 P10
VDD10 VDD10
C2 V1 C2 V1
72 FBC_EDC1 EDC0_A VDD11 72 FBC_EDC5 EDC0_A VDD11
C13 V14 C13 V14
72 FBC_EDC3 EDC1_A VDD12 72 FBC_EDC7 EDC1_A VDD12
MEM_VPP MEM_VPP

A5 A5
VPP1 VPP1
A10 A10
VPP2 VPP2
V5 V5
VPP3 VPP3
U4 V10 U4 V10
DQ0_B VPP4 DQ0_B VPP4
FBC_D5 V3 FBC_D33 V3
DQ1_B DQ1_B
FBC_D6 U3 FBC_D32 U3
DQ2_B DQ2_B
FBC_D2 U2 E11 FBC_D36 U2 E11
DQ3_B VSS1 DQ3_B VSS1
FBC_D0 P3 A13 FBC_D34 P3 A13
DQ4_B VSS2 DQ4_B VSS2
FBC_D4 P2 A11 FBC_D39 P2 A11
DQ5_B VSS3 DQ5_B VSS3
FBC_D7 N2 E4 FBC_D37 N2 E4
DQ6_B VSS4 DQ6_B VSS4
FBC_D3 M2 A2 FBC_D35 M2 A2
DQ7_B VSS5 DQ7_B VSS5
FBC_D1 U11 A4 FBC_D38 U11 A4
DQ8_B VSS6 DQ8_B VSS6
FBC_D19 V12 H11 FBC_D49 V12 H11
DQ9_B VSS7 DQ9_B VSS7
FBC_D18 U12 H4 FBC_D51 U12 H4
DQ10_B VSS8 DQ10_B VSS8
FBC_D17 U13 P4 FBC_D48 U13 P4
DQ11_B VSS9 DQ11_B VSS9
FBC_D21 P12 G3 FBC_D54 P12 G3
DQ12_B VSS10 DQ12_B VSS10
FBC_D22 P13 G12 FBC_D55 P13 G12
DQ13_B VSS11 DQ13_B VSS11
FBC_D20 N13 B1 FBC_D52 N13 B1
DQ14_B VSS12 DQ14_B VSS12
FBC_D16 M13 B14 FBC_D53 M13 B14
DQ15_B VSS13 DQ15_B VSS13
FBC_D23 D1 FBC_D50 D1
VSS14 VSS14
D3 D3
VSS15 VSS15
D12 D12
VSS16 VSS16
L3 D14 L3 D14
CA0_B VSS17 CA0_B VSS17
FBC_CMD5 M11 F1 FBC_CMD29 M11 F1
CA1_B VSS18 CA1_B VSS18
FBC_CMD18 M4 F3 FBC_CMD52 M4 F3
CA2_B VSS19 CA2_B VSS19
FBC_CMD7 L12 F12 FBC_CMD40 L12 F12
CA3_B VSS20 CA3_B VSS20
FBC_CMD20 L5 F14 FBC_CMD50 L5 F14
CA4_B VSS21 CA4_B VSS21
FBC_CMD8 L10 M1 FBC_CMD39 L10 M1
CA5_B VSS22 CA5_B VSS22
FBC_CMD16 K12 M3 FBC_CMD42 K12 M3
CA6_B VSS23 CA6_B VSS23
FBC_CMD21 K11 M12 FBC_CMD49 K11 M12
CA7_B VSS24 CA7_B VSS24
FBC_CMD19 K4 M14 FBC_CMD51 K4 M14
CA8_B VSS25 CA8_B VSS25
FBC_CMD6 K3 T3 FBC_CMD28 K3 T3
CA9_B VSS26 CA9_B VSS26
FBC_CMD4 K5 T12 FBC_CMD30 K5 T12
CABI_n_B VSS27 CABI_n_B VSS27
FBC_CMD9 M10 C5 FBC_CMD38 M10 C5
CKE_n_B VSS28 CKE_n_B VSS28
FBC_CMD17 C10 FBC_CMD41 C10
VSS29 VSS29
G1 G1
VSS30 VSS30
R2 G14 R2 G14
72 FBC_DBI0 DBI0_n_B VSS31 72 FBC_DBI4 DBI0_n_B VSS31
R13 L4 R13 L4
72 FBC_DBI2 DBI1_n_B VSS32 72 FBC_DBI6 DBI1_n_B VSS32
L11 L11
VSS33 VSS33
P11 P11
VSS34 VSS34
R11 C3 R11 C3
72 FBC_WCK23 WCK_t_B VSS35 72 FBC_WCK67 WCK_t_B VSS35
R10 C12 R10 C12
72 FBC_WCK23# WCK_c_B VSS36 72 FBC_WCK67# WCK_c_B VSS36
N1 N1
VSS37 VSS37
N3 N3
VSS38 VSS38
T2 N12 T2 N12
72 FBC_EDC0 EDC0_B VSS39 72 FBC_EDC4 EDC0_B VSS39
T13 N14 T13 N14
72 FBC_EDC2 EDC1_B VSS40 72 FBC_EDC6 EDC1_B VSS40
R1 R1
VSS41 VSS41
R3 R3
VSS42 VSS42
R12 R12
VSS43 VSS43
R14 R14
VSS44 VSS44
K10 U1 K10 U1
72 FBC_CLK0# CK_c VSS45 72 FBC_CLK1# CK_c VSS45
J10 U14 J10 U14
72 FBC_CLK0 CK_t VSS46 72 FBC_CLK1 CK_t VSS46
T5 T5
VSS47 VSS47
T10 T10
VSS48 VSS48
V2 V2
VSS49 VSS49
V4 V4
VSS50 VSS50
J1 V11 J1 V11
RESET_n VSS51 RESET_n VSS51
FBC_CMD3 V13 FBC_CMD31 V13
VSS52 VSS52

D11 GND D11 GND


NC1 FBC_WCKB23 72 NC1 FBC_WCKB67 72
D10 D10
NC5 FBC_WCKB23# 72 NC5 FBC_WCKB67# 72
N5 R4 N5 R4
TCK NC4 FBC_WCK01 72 TCK NC4 FBC_WCK45 72
F10 R5 F10 R5
TDI NC2 FBC_WCK01# 72 TDI NC2 FBC_WCK45# 72
N10 G5 N10 G5
TDO NC6 TDO NC6
F5 M5 F5 M5
TMS NC3 TMS NC3

J14 121Ohm 2 1% 1 R75005 J14 121Ohm 2 1% 1 R75007


ZQ_A GND ZQ_A GND
FBC_ZQ_1A /V4G FBC_ZQ_2A /V4G
K1 K14 121Ohm 2 1% 1 R75006 K1 K14 121Ohm 2 1% 1 R75008
VREFC ZQ_B GND VREFC ZQ_B GND
FBC_VREFC_L FBC_ZQ_1B /V4G FBC_VREFC_H FBC_ZQ_2B /V4G
2

R75009 R75010
1KOhm MT61K256M32JE-14:A 1KOhm MT61K256M32JE-14:A
1% 03014-00010600 1% 03014-00010600
/GPU_KC /GPU_KC
1

GND GND

Project Name Rev

GX502GX R1.2

Title : VRAM_Channel_C
Size
Dept.: Engineer:
ASUSTeK COMPUTER INC. NB1
Custom
Date: Monday, July 13, 2020 Sheet 75 of 101
TGL IMVP9 (2) Power [For CPU]
PSP8101
SHORT_PAD
@
80 P_IMVP9_VINSEN_R_10
1 2
AC_BAT_SYS
+3VS_PWR
+3VS_PWR

1
AC_BAT_SYS

1
PC8167 PC8103 PC8102 PC8101 PC8115 + PCE8101

1
4.7UF/25V 4.7UF/25V 4.7UF/25V PC8112 PC8113 PC8114

1
PC8106 0.1UF/25V 10UF/25V 15UF/25V PC8107 PC8116
4.7UF/25V 4.7UF/25V 4.7UF/25V

1
1UF/6.3V N/A N/A N/A N/A N/A N/A PC8105 0.1UF/25V 10UF/25V

2
N/A nbs_c0402_h22_000s nbs_c0603_h39_000s nbs_c7343d_h79_000s 1UF/6.3V N/A N/A N/A N/A N/A

2
nbs_c0603_h39_000s nbs_c0603_h39_000s N/A nbs_c0603_h39_000s
nbs_c0402_h22_000s

2
H=2.1mm nbs_c0603_h39_000s nbs_c0603_h39_000s

PU8101
MP86941GQVT-Z PU8103

14
N/A MP86941GQVT-Z

1
Imax = 65A

14
20 PC8189 N/A PC8104

1
VIN2
VIN1
VCC
PSL8111 0.1UF/25V 20 0.1UF/25V
PWM與CS隔20mil

VIN2
VIN1
VCC
@ nbs_c0402_h22_000s PL8101 PSL8103 N/A
PWM與CS隔20mil
80 P_IMVP9_PWM1_10
2
0402
1 15
PWM BST
21 0.15UH
+VCCIN @ nbs_c0402_h22_000s PL8103

80 P_VCCIN_CS1_10
P_IMVP9_VCCIN_PWM1_10 18
CS
2
P_IMVP9_VCCIN1_BST_30 1 2
N/A
Irat=45A
N/A
80 P_IMVP9_PWM3_10
2
0402
1
P_IMVP9_VCCIN_PWM3_10
15
18
PWM BST
21
P_IMVP9_VCCIN3_BST_30 1 2
0.15UH
Irat=45A
+VCCIN
SW1 80 P_VCCIN_CS3_10 CS
16 3 1 2 2 N/A
80 P_IMVP9_STB_10 SYNC SW2 SW1
17 4 P_IMVP9_VCCIN1_LX_S 16 3 1 2
80 P_IMVP9_TEMP_10 VTEMP/FLT SW3 SYNC SW2
10.5x5.8x4mm P_IMVP9_STB_10 17 4 P_IMVP9_VCCIN3_LX_S
VTEMP/FLT SW3
19 P_IMVP9_TEMP_10 10.5x5.8x4mm
AGND
19
AGND

PGND1
PGND2
PGND3

PGND1
PGND2
PGND3
5
12
13

5
12
13
teknisi indonesia

+3VS_PWR

1
AC_BAT_SYS
+ PCE8103
1

1
PC8194 PC8108 PC8109 PC8111 PC8117 15UF/25V
4.7UF/25V 4.7UF/25V 4.7UF/25V
1

PC8193 0.1UF/25V 10UF/25V N/A

2
1UF/6.3V N/A N/A N/A N/A N/A
nbs_c7343d_h79_000s
2

2
N/A nbs_c0603_h39_000s
nbs_c0402_h22_000s
2

nbs_c0603_h39_000s nbs_c0603_h39_000s H=2.1mm

PU8102
MP86941GQVT-Z
14

N/A PC8110
1

20 0.1UF/25V
VIN2
VIN1

VCC
PSL8102 N/A
PWM與CS隔20mil @ nbs_c0402_h22_000s PL8102

80 P_IMVP9_PWM2_10
2
0402
1
P_IMVP9_VCCIN_PWM2_10
15
18
PWM BST
21
P_IMVP9_VCCIN2_BST_30 1 2
0.15UH
Irat=45A
+VCCIN
80 P_VCCIN_CS2_10 CS
2 N/A
SW1
16 3 1 2
SYNC SW2
P_IMVP9_STB_10 17 4 P_IMVP9_VCCIN2_LX_S
VTEMP/FLT SW3
P_IMVP9_TEMP_10 10.5x5.8x4mm
19
AGND
PGND1
PGND2
PGND3
5
12
13

+VCCIN 15PCS / 15PCS


1

PC8118 PC8119 PC8120 PC8121 PC8122 PC8123 PC8124 PC8125 PC8126 PC8127
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
N/A @ N/A N/A @ N/A N/A N/A N/A N/A
2

nbs_c0603_h39_000s nbs_c0603_h39_000s nbs_c0603_h39_000s nbs_c0603_h39_000s


nbs_c0603_h39_000s
nbs_c0603_h39_000s nbs_c0603_h39_000s nbs_c0603_h39_000s nbs_c0603_h39_000s nbs_c0603_h39_000s

+VCCIN
1

PC8128 PC8129 PC8130 PC8131 PC8132


22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
N/A N/A @ N/A N/A
2

nbs_c0603_h39_000s nbs_c0603_h39_000s nbs_c0603_h39_000s


nbs_c0603_h39_000s nbs_c0603_h39_000s

For VRTT Dummy Load


+VCCIN

+VCCIN
1

PCE8104 PCE8102
+ +
470UF/2.5V 470UF/2.5V
2

N/A N/A
PR8114
3
2

3
2

1KOhm

N/A
1

BOM

Project Name Rev

FX516 R0.1

Title : PW_TGL_UP3_MPS_+VCCIN(2)
Size
Dept.: NB1-RD3EE2 Engineer: Matt
A2
Date: Monday, July 13, 2020 Sheet 81 of 102
@20200705_Memory P/N
Samsung_256*32_K4Z80325BC : 03014-00010600(目前
Micron_256M*32_MT61K256M32JE: 03014-00010500

40 OHm_NET 40 OHm_NET
72 FBD_D[31..0]
FBD Partition 31..0 72 FBD_D[63..32]
FBDPartition 64..32
72 FBD_CMD[52..0]
MF=1 Mirror +FBVDDQ
MF=0 Normal +FBVDDQ

U76003
N4 U76004
VDDQ1
B4 T4 N4
DQ0_A VDDQ2 VDDQ1
FBD_D14 A3 N11 B4 T4
DQ1_A VDDQ3 DQ0_A VDDQ2
FBD_D10 B3 T11 FBD_D42 A3 N11
DQ2_A VDDQ4 DQ1_A VDDQ3
FBD_D15 B2 F11 FBD_D45 B3 T11
DQ3_A VDDQ5 DQ2_A VDDQ4
FBD_D9 E3 F4 FBD_D40 B2 F11
DQ4_A VDDQ6 DQ3_A VDDQ5
FBD_D13 E2 J13 FBD_D44 E3 F4
DQ5_A VDDQ7 DQ4_A VDDQ6
FBD_D8 F2 J2 FBD_D43 E2 J13
DQ6_A VDDQ8 DQ5_A VDDQ7
FBD_D12 G2 U5 FBD_D46 F2 J2
DQ7_A VDDQ9 DQ6_A VDDQ8
FBD_D11 B11 U10 FBD_D41 G2 U5
DQ8_A VDDQ10 DQ7_A VDDQ9
FBD_D26 A12 P1 FBD_D47 B11 U10
DQ9_A VDDQ11 DQ8_A VDDQ10
FBD_D25 B12 P14 FBD_D61 A12 P1
DQ10_A VDDQ12 DQ9_A VDDQ11
FBD_D24 B13 T1 FBD_D56 B12 P14
DQ11_A VDDQ13 DQ10_A VDDQ12
FBD_D27 E12 T14 FBD_D62 B13 T1
DQ12_A VDDQ14 DQ11_A VDDQ13
FBD_D28 E13 L1 FBD_D58 E12 T14
DQ13_A VDDQ15 DQ12_A VDDQ14
FBD_D31 F13 L14 FBD_D63 E13 L1
DQ14_A VDDQ16 DQ13_A VDDQ15
FBD_D30 G13 C1 FBD_D60 F13 L14
DQ15_A VDDQ17 DQ14_A VDDQ16
FBD_D29 C4 FBD_D59 G13 C1
VDDQ18 DQ15_A VDDQ17
C11 FBD_D57 C4
VDDQ19 VDDQ18
H3 C14 C11
CA0_A VDDQ20 VDDQ19
FBD_CMD1 G11 E1 H3 C14
CA1_A VDDQ21 CA0_A VDDQ20
FBD_CMD13 G4 E14 FBD_CMD33 G11 E1
CA2_A VDDQ22 CA1_A VDDQ21
FBD_CMD12 H12 K2 FBD_CMD45 G4 E14
CA3_A VDDQ23 CA2_A VDDQ22
FBD_CMD24 H5 K13 FBD_CMD35 H12 K2
CA4_A VDDQ24 CA3_A VDDQ23
FBD_CMD11 H10 B5 FBD_CMD46 H5 K13
CA5_A VDDQ25 CA4_A VDDQ24
FBD_CMD15 J12 B10 FBD_CMD36 H10 B5
CA6_A VDDQ26 CA5_A VDDQ25
FBD_CMD22 J11 H1 FBD_CMD43 J12 B10
CA7_A VDDQ27 CA6_A VDDQ26
FBD_CMD23 J4 H14 FBD_CMD48 J11 H1
CA8_A VDDQ28 CA7_A VDDQ27
FBD_CMD0 J3 FBD_CMD47 J4 H14
CA9_A CA8_A VDDQ28
FBD_CMD2 J5 FBD_CMD34 J3
CABI_n_A CA9_A
FBD_CMD10 G10 P5 FBD_CMD32 J5
CKE_n_A VDD1 CABI_n_A
FBD_CMD14 E5 FBD_CMD37 G10 P5
VDD2 CKE_n_A VDD1
E10 FBD_CMD44 E5
VDD3 VDD2
D2 L2 E10
72 FBD_DBI1 DBI0_n_A VDD4 VDD3
D13 L13 D2 L2
72 FBD_DBI3 DBI1_n_A VDD5 72 FBD_DBI5 DBI0_n_A VDD4
A1 D13 L13
VDD6 72 FBD_DBI7 DBI1_n_A VDD5
D4 A14 A1
72 FBD_WCKB01 WCK_t_A VDD7 VDD6
D5 H2 D4 A14
72 FBD_WCKB01# WCK_c_A VDD8 72 FBD_WCKB45 WCK_t_A VDD7
H13 D5 H2
VDD9 72 FBD_WCKB45# WCK_c_A VDD8
P10 H13
VDD10 VDD9
C2 V1 P10
72 FBD_EDC1 EDC0_A VDD11 VDD10
C13 V14 C2 V1
72 FBD_EDC3 EDC1_A VDD12 72 FBD_EDC5 EDC0_A VDD11
MEM_VPP C13 V14
72 FBD_EDC7 EDC1_A VDD12
MEM_VPP
A5
VPP1
A10 A5
VPP2 VPP1
V5 A10
VPP3 VPP2
U4 V10 V5
DQ0_B VPP4 VPP3
FBD_D7 V3 U4 V10
DQ1_B DQ0_B VPP4
FBD_D6 U3 FBD_D36 V3
DQ2_B DQ1_B
FBD_D4 U2 E11 FBD_D33 U3
DQ3_B VSS1 DQ2_B
FBD_D5 P3 A13 FBD_D35 U2 E11
DQ4_B VSS2 DQ3_B VSS1
FBD_D3 P2 A11 FBD_D32 P3 A13
DQ5_B VSS3 DQ4_B VSS2
FBD_D0 N2 E4 FBD_D34 P2 A11
DQ6_B VSS4 DQ5_B VSS3
FBD_D2 M2 A2 FBD_D39 N2 E4
DQ7_B VSS5 DQ6_B VSS4
FBD_D1 U11 A4 FBD_D38 M2 A2
DQ8_B VSS6 DQ7_B VSS5
FBD_D16 V12 H11 FBD_D37 U11 A4
DQ9_B VSS7 DQ8_B VSS6
FBD_D22 U12 H4 FBD_D49 V12 H11
DQ10_B VSS8 DQ9_B VSS7
FBD_D20 U13 P4 FBD_D48 U12 H4
DQ11_B VSS9 DQ10_B VSS8
FBD_D21 P12 G3 FBD_D50 U13 P4
DQ12_B VSS10 DQ11_B VSS9
FBD_D18 P13 G12 FBD_D51 P12 G3
DQ13_B VSS11 DQ12_B VSS10
FBD_D23 N13 B1 FBD_D55 P13 G12
DQ14_B VSS12 DQ13_B VSS11
FBD_D17 M13 B14 FBD_D52 N13 B1
DQ15_B VSS13 DQ14_B VSS12
FBD_D19 D1 FBD_D54 M13 B14
VSS14 DQ15_B VSS13
D3 FBD_D53 D1
VSS15 VSS14
D12 D3
VSS16 VSS15
L3 D14 D12
CA0_B VSS17 VSS16
FBD_CMD5 M11 F1 L3 D14
CA1_B VSS18 CA0_B VSS17
FBD_CMD18 M4 F3 FBD_CMD29 M11 F1
CA2_B VSS19 CA1_B VSS18
FBD_CMD7 L12 F12 FBD_CMD52 M4 F3
CA3_B VSS20 CA2_B VSS19
FBD_CMD20 L5 F14 FBD_CMD40 L12 F12
CA4_B VSS21 CA3_B VSS20
FBD_CMD8 L10 M1 FBD_CMD50 L5 F14
CA5_B VSS22 CA4_B VSS21
FBD_CMD16 K12 M3 FBD_CMD39 L10 M1
CA6_B VSS23 CA5_B VSS22
FBD_CMD21 K11 M12 FBD_CMD42 K12 M3
CA7_B VSS24 CA6_B VSS23
FBD_CMD19 K4 M14 FBD_CMD49 K11 M12
CA8_B VSS25 CA7_B VSS24
FBD_CMD6 K3 T3 FBD_CMD51 K4 M14
CA9_B VSS26 CA8_B VSS25
FBD_CMD4 K5 T12 FBD_CMD28 K3 T3
CABI_n_B VSS27 CA9_B VSS26
FBD_CMD9 M10 C5 FBD_CMD30 K5 T12
CKE_n_B VSS28 CABI_n_B VSS27
FBD_CMD17 C10 FBD_CMD38 M10 C5
VSS29 CKE_n_B VSS28
G1 FBD_CMD41 C10
VSS30 VSS29
R2 G14 G1
72 FBD_DBI0 DBI0_n_B VSS31 VSS30
R13 L4 R2 G14
72 FBD_DBI2 DBI1_n_B VSS32 72 FBD_DBI4 DBI0_n_B VSS31
L11 R13 L4
VSS33 72 FBD_DBI6 DBI1_n_B VSS32
P11 L11
VSS34 VSS33
R11 C3 P11
72 FBD_WCK23 WCK_t_B VSS35 VSS34
R10 C12 R11 C3
72 FBD_WCK23# WCK_c_B VSS36 72 FBD_WCK67 WCK_t_B VSS35
N1 R10 C12
VSS37 72 FBD_WCK67# WCK_c_B VSS36
N3 N1
VSS38 VSS37
T2 N12 N3
72 FBD_EDC0 EDC0_B VSS39 VSS38
T13 N14 T2 N12
72 FBD_EDC2 EDC1_B VSS40 72 FBD_EDC4 EDC0_B VSS39
R1 T13 N14
VSS41 72 FBD_EDC6 EDC1_B VSS40
R3 R1
VSS42 VSS41
R12 R3
VSS43 VSS42
R14 R12
VSS44 VSS43
K10 U1 R14
72 FBD_CLK0# CK_c VSS45 VSS44
J10 U14 K10 U1
72 FBD_CLK0 CK_t VSS46 72 FBD_CLK1# CK_c VSS45
T5 J10 U14
VSS47 72 FBD_CLK1 CK_t VSS46
T10 T5
VSS48 VSS47
V2 T10
VSS49 VSS48
V4 V2
VSS50 VSS49
J1 V11 V4
RESET_n VSS51 VSS50
FBD_CMD3 V13 J1 V11
VSS52 RESET_n VSS51
FBD_CMD31 V13
VSS52

D11 GND
NC1 FBD_WCKB23 72
D10 D11 GND
NC5 FBD_WCKB23# 72 NC1 FBD_WCKB67 72
N5 R4 D10
TCK NC4 FBD_WCK01 72 NC5 FBD_WCKB67# 72
F10 R5 N5 R4
TDI NC2 FBD_WCK01# 72 TCK NC4 FBD_WCK45 72
N10 G5 F10 R5
TDO NC6 TDI NC2 FBD_WCK45# 72
F5 M5 N10 G5
TMS NC3 TDO NC6
F5 M5
TMS NC3

J14 121Ohm 2 1% 1 R76005


ZQ_A GND
FBD_ZQ_1A /V6G J14 121Ohm 2 1% 1 R76007
ZQ_A GND
K1 K14 121Ohm 2 1% 1 R76006 FBD_ZQ_2A /V6G
VREFC ZQ_B GND
FBD_VREFC_L FBD_ZQ_1B /V6G K1 K14 121Ohm 2 1% 1 R76008
VREFC ZQ_B GND
FBD_VREFC_H FBD_ZQ_2B /V6G
2

R76009
2

1KOhm MT61K256M32JE-14:A
1% 03014-00010600 R76010 MT61K256M32JE-14:A
/GPU_KD 1KOhm 03014-00010600
1

1%
/GPU_KD
1

GND

GND

Project Name Rev

GX502GX R1.2

Title : VRAM_Channel_D
Size
Dept.: Engineer:
ASUSTeK COMPUTER INC. NB1
Custom
Date: Monday, July 13, 2020 Sheet 76 of 101
<Variant Name>

Project Name Rev

UX482 R0.1

Title : POWER
Size
Dept.: NB1-RD3EE2 Engineer: Andy
Custom
Date: Monday, July 13, 2020 Sheet 83 of 102
@20200701 Q7802 Q7808改用VTH=1V @20200707_Q7802 由1V8 改DGPU_PWROK
0Ohm @ R7818
+1V8_AON
1 2
+1V8_AON
R7842 0Ohm
DGPU_PWROK 22,25,70,77
20200611 GN20E update 16Mb ROM 1 2

+1V8_AON
VGA INT. Thermal sensor
U7001W address 0x9E and 0x9C

5
14/24 MISC 2
U7001Q 4 3
SMB1_CLK_S 28,48,50

1
BM5 BP7 R7815 1 2 33Ohm R7806 12/24 MISC 1

2
STRAP0 ROM_CS* Q7802B
VGA_STRAP0 BN5 ROM_CS_G ROM_CS# 10KOhm
STRAP1
VGA_STRAP1 BP4 BR7 R7805 1 2 33Ohm N/A BK7 BL8 1 6 PJX8838_R1_00002
STRAP2 ROM_SI OVERT I2CS_SCL SMB1_DAT_S 28,48,50
VGA_STRAP2 BP3 BT8 ROM_SI ROM_SI_ROM +1V8_AON OVERT# BL7 SMB1_CLK_S_L

2
STRAP3 ROM_SO I2CS_SDA
VGA_STRAP3 BR3 BT7 ROM_SO R7807 1 2 33Ohm U7802 C7803 SMB1_DAT_S_L

2
STRAP4 ROM_SCLK Q7802A
VGA_STRAP4 BR4 ROM_SCLK ROM_SCLK_ROM 1 8 0.1UF/10V @ T7817 1 BG8
STRAP5 CS# VCC TS_VREF
VGA_STRAP5 ROM_CS# 2 7 TS_VREF BM7 1 6 PJX8838_R1_00002
DO(IO1) HOLD#/RESET#(IO3) GND I2CC_SCL
ROM_SO 3 6 1 2 BN7 SCL_L
WP#(IO2) CLK I2CC_SDA
ROM_WP# 4 5 SDA_L RN7804B
GND DI(IO0) Q7808A 33OHM GPU_SCL 91,98
3 4

5
W25Q16JWSNIQ BN8 PJX8838_R1_00002
I2CB_SCL
ROM_SCLK_ROM BM8 4 3 RN7804A
I2CB_SDA 33OHM GPU_SDA 91,98
ROM_SI_ROM 1 2

BR8 Q7808B
THERMDN NVVDD_PSI:10K pull high to 1V8(P.91)
GND PJX8838_R1_00002
BP8 I2CB_SCL
THERMDP

GB5-256 I2CB_SDA +3VS

02004-00650000 Ref DG-7875 Table 14.3


BP2 RN7806B 4.7KOhm
GPIO0 NVVDD_PWM_VID 91
BN3 NVVDD_PWM_VID GPU_SCL RN7806A 4 3 4.7KOhm
GPIO1 GC6FBEN 70,98
BN2 GC6FBEN GPU_SDA 2 1
GPIO2
BP10 BM4 GPU_GPIO2 1 T7838 @
98 GPU_ADC_IN ADC_IN GPIO3
BR10 BM3 DISP_MUX_CNTL
98 GPU_ADC_IN# ADC_IN* GPIO4 NVVDD_EN 70,77
+1V8_AON +1V8_AON_PLLVDD BM2 NVVDD_EN
GPIO5
N/A U7001X BM1 FRAME_LOCK# 準位要再確定
GPIO6 NVVDD_PSI 91
L7802 13/24 XTAL/PLL BL1 NVVDD_PSI
GPIO7
30Ohm/100Mhz BK6 LCD_BL_PWM_GPU
GPIO8 MEM_VDD_CTL 94
1 2 BG22 BK5 MEM_VDD_CTL +1V8_AON
SP_PLLVDD GPIO9
BK4 VGA_ALERT_P#
GPIO10
FERRITE BEAD(0603)30 OHM/1A BG25 @ T7818 1 BP25 BK3 FBVREF_SEL RN7801B 3 4
VID_PLLVDD JTAG_TCK GPIO11 2.2KOhm
1

C7808 C7806 @ T7819 1 JTAG_TCK BN25 BK2 LCD_VDD_GPU SCL_L RN7801A 1 2


JTAG_TMS GPIO12 2.2KOhm

1
22UF/6.3V 4.7UF/6.3V @ T7820 1 JTAG_TMS BT25 BK1 PWR_LEVEL# SDA_L
JTAG_TDI GPIO13
N/A C7805 C7804 @ T7821 1 JTAG_TDI BR25 BJ6 GPU_GPIO13 RN7803A 1 2
JTAG_TDO GPIO14 2.2KOhm
2

1UF/6.3V 1UF/6.3V @ T7822 1 JTAG_TDO BM25 BJ5 HPD_IFPA_GPU# SMB1_CLK_S_L RN7803B 3 4


JTAG_TRST* GPIO15 2.2KOhm

2
JTAG_TRST BJ4 HPD_IFPB_GPU# SMB1_DAT_S_L
GPIO16
因Layout因素SIZE從0805更改為0603 BJ3 DISP_MUX_PWM_CNTL +1V8_AON
GPIO17
BJ2 HPD_IFPD_GPU#
GPIO18 R7848 10KOhm
GND GND GND @ T7823 1 BL25 BJ1 HPD_IFPE_GPU#
NVJTAG_SEL GPIO19 FRAME_LOCK# @ 11 2
2
NVJTAG_SEL BH1 GPU_GPIO19 1 T7829 @ R7824 100KOhm
GPIO20
BF9 BG7 GPU_GPIO20 1 T7839 @ GPU_GPIO13 N/A R7855 1 2 10KOhm
GPCADC_AVDD GPIO21

2
BG6 LCD_BL_EN_GPU NVVDD_EN N/A R7820 1 2 10KOhm
GPIO22 ADC_MUX_SEL 98
R7844 R7812 BG5 ADC_MUX_SEL HPD_IFPA_GPU# N/A R7873 1 2 10KOhm
GPIO23

1
10KOhm 10KOhm BG4 GPU_RASTER_SYNC1 1 T7830 @ HPD_IFPB_GPU# N/A R7856 1 2 10KOhm
GPIO24
C7802 C7807 BF25 BG3 HPD_IFPF HPD_IFPD_GPU# N/A R7860 1 2 10KOhm
CORE_PLL_AVDD GPIO25 FBVDDQ_PSI 94
BG2 FBVDDQ_PSI HPD_IFPF N/A R7869 1 2 10KOhm
1UF/6.3V 1UF/6.3V GPIO26

1
BG1 ROM_WP# HPD_IFPC_GPU# N/A R7802 1 2 10KOhm
GPIO27
PLACE AT BALLS BF1 HPD_IFPC_GPU# HPD_IFPE_GPU# R7827 1 2 10KOhm
GPIO28
GND GND BF2 MSVDD_PWM_VID 1 T7831 @ PWR_LEVEL# R7823 1 2 10KOhm
GPIO29
BF3 GPU_GPIO29 1 T7824 @ VGA_ALERT_P# N/A R7803 1 2 2.2kOHM
GPIO30
BF4 MSVDD_PSI# 1 T7815 @ ADC_MUX_SEL
GPIO31
GND BF5 GPU_GPIO31 1 T7832 @ RN7802A 1 2
GPIO32 2.2KOhm
BF6 GPU_GPIO32 1 T7833 @ I2CB_SDA RN7802B 3 4
GPIO33 2.2KOhm
BF7 GPU_GPIO33 1 T7834 @ I2CB_SCL
GPIO34
BF8 GPU_GPIO34 1 T7835 @ @ R7822 1 2 10KOhm
GPIO35
GPU_GPIO35 1 T7836 @ MEM_VDD_CTL @ R7836 1 2 10KOhm
BK8 BP5 FBVDDQ_PSI
EXT_REFCLK_FL XTAL_OUTBUFF
XTAL_SSIN XTAL_OUTBUFF GB5-256 R7841 10KOhm

2
BT5 BR5 ROM_WP# 1 2
XTAL_IN XTAL_OUT 02004-00650000
XTALOUT_GPU R7831
100KOhm Thermal Protection

1
R7838 1%
1

R7801 1KOhm +1.8V_AON +3VS

1
10KOhm GB5-256 +1V8_AON
+1V8_AON GPU_PEX_RST# 70,77
1% X7801 1% R7837 1 2 100KOhm

2
02004-00650000
27MHZ FBVREF_SEL
2

1
GND
3 1 20180111 modify R7810 @ R7821 1 2 100KOhm
XTALIN +/-10ppm/10PF XTALOUT 10KOhm LCD_BL_PWM_GPU @ R7847 1 2 100KOhm
07G010262700 +3VS LCD_BL_EN_GPU @ R7808 10KOhm
X7801: 27MHZ +/-10ppm/10pF (3225)

2
1

1
GND C7811 C7801 LCD_VDD_GPU 1 2

2
1
4

2
1st: P/N:07G010262700 TXC/7V27000050 12PF/50V 15PF/50V R7833 1 6 R7804 10KOhm
10KOhm @ PWR_LEVEL# dGPU_PD# GC6FBEN R7846 1 2 10KOhm

1
2

2
PJX8838_R1_00002

3
2nd: P/N:07G010952701 HOSONIC/E3FB27.0000F10E11 R7874 MEM_VDD_CTL 1 2
Q7803A
10KOhm

2
GND GND GND GND PJX8838_R1_00002 5 @ R7858 10KOhm
DGPU_LIMIT 30
FBVDDQ_PSI 1 2

2
2

4
RAMCFG[4:0] DENSITY WIDTH VENDOR @ R7814 10KOhm
------------------------------------------ Q7803B DISP_MUX_CNTL 1 2
1 6 @ R7830 10KOhm
00000 8Gb 256BIT SAMSUNG DGPU_THERML_SHDWN# 32 20180111 modify
00001 8Gb 256BIT MICRON OVERT# DISP_MUX_PWM_CNTL 1 2
00010 8Gb 256BIT HYNIX 89 dGPU_PD#
20180111 modify GND
00110 16Gb 256BIT HYNIX Q7806A
00111 16Gb 256BIT SAMSUNG GND
01000 16Gb 256BIT MICRON PJX8838_R1_00002

+1V8_AON
STRAP PIN @20200705_follow NV FAE: LLH @20200705_follow NV FAE: LLH (Default) 1
讓OVR-M 跟著GPU開關
BAT54CTB 3
NVVDD_PWR_EN 70,91 1.P.98加off page
D7802 2
+1V8_AON
2.10k pull down 改不上件
20190715 Sherwin Follow GL704GW
1

R7819 R7817 R7829 R7845 R7825 R7850


100KOhm 100KOhm 100KOhm 100KOhm 100KOhm 100KOhm
@/VRAM @/VRAM @/VRAM @ @ /G-sync
2

R7816 R7828 R7809


10KOhm 100KOhm 100KOhm
VGA_STRAP0 @ @

HPD Invert
2

VGA_STRAP1

VGA_STRAP2 ROM_SO

VGA_STRAP3 ROM_SI

VGA_STRAP4 ROM_SCLK

VGA_STRAP5

GPU GPIO INPUT


1

R7835 R7832 R7813


對應Samsung 03014-00010600 10KOhm 100KOhm 100KOhm
@
2

2
1

R7834 R7811 R7826 R7885 R7851 R7839


100KOhm 100KOhm 100KOhm 100KOhm 100KOhm 100KOhm
/VRAM /VRAM /VRAM @/non G-sync
2

DEFULT : L L L
GND NVIDIA GC6 2.0 follow DG-07290-001_v01
GPU_GPIO 5 --> FRAME_LOCK# (Input, Open Drain)
High -->driver display ,Low Normal

FRAME_LOCK#_C Pull High +3VS_LCD at Panel side

GND

For EMI
@
C7813 1000PF/50V
GPU_PEX_RST# 1 2

1:SMB_ALT_ADDR ENABLE

0:SMB_ALT_ADDR DISABLE HPD_IFPC_GPU# R7849 1 @ 2 0Ohm


23 HDMI_HDP_EN_dGPU#

1:DEVID_SEL REBRAND
6
R7865

3
Q7804A 0Ohm
0:DEVID_SEL ORIGNAL EM6K1-G-T2R 2 1 2 Q7804B
IFPC_HDMI_HPD 48
EM6K1-G-T2R 5
1

IFPC_HDMI_HPD

4
1:PCIE_CFG LOW POWER R7866
100KOhm
0:PCIE_CFG HIGH POWER
2

1:VGA_DEVICE ENABLE
GND GND
0:VGA_DEVICE DISABLE GND

DEFULT : L L H

Project Name Rev

GX502GX R1.2

Title : GPU_CLOCK/STRAP/GPIO
Size
Dept.: ASUSTeK COMPUTER INC. Engineer: EE
Custom
Date: Monday, July 13, 2020 Sheet 78 of 102
+1.8VSUS [For PCH]
GND
Imax= 7.775A
OCP=12A
PU8401
HPA02240RVER
+1.8VSUS

14
13
12

10
11
PJP8401 N/A
AC_BAT_SYS 1MM_SHORT_PIN

PGND5
PGND4
PGND3
PGND2
PGND1
@ PL8401
1 2 1 2
1 2 VIN1 SW4
P_1P8VSUS_VIN_S 15 9 P_1P8VSUS_LX_30 PC8405 PR8406
VIN2 SW3

1
PCI8402 PCI8403 16 8 0.1UF/25V 0Ohm 1.0UH
VIN3 SW2

SHORT_PAD

1
10UF/25V 10UF/25V 17 7 N/A N/A PC8404 PC8410 PC8411 PC8402 + PCE8401
V5 SW1 POWER INDUCTOR 1.0UH/15A 20%
@ N/A P_1P8VSUS_5V_10 18 6 1 2 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 470U/2V
GND BST
2

2
MLCC 10UF/25V (0805) X6S 10% 19 5 P_1P8VSUS_BST_20 1 2 7x7x3mm N/A N/A @ @ N/A
TRIP NC

2
20 4

PSP8402
MLCC 10UF/25V (0805) X6S 10% P_1P8VSUS_OC_10 nbs_c7343d_h83_000s
SLEW MODE
P_1P8VSUS_SLEW_10 21 3 PSL8402 P_1P8VSUS_BST_R_20
VSNS LP#

2
GND GND P_1P8VSUS_VSENS_5 22 2 2 1
GSNS PGOOD 0402 1.8VSUS_PWRGD 58,82
23 1 P_1P8VSUS_PG_10 GND GND GND GND GND
@

REFIN2

@
REFIN

GND1
GND2
GND3
GND4
GND5
VREF
PC8406

NU
EN
3300PF/50V

1
N/A

24
25
26
27
28
29
30
31
32
33
+5VSUS PR8408

P_1P8VSUS_LOSENS_5
4.7OHM 5% GND
N/A

P_1P8VSUS_REFIN_10
P_1P8VSUS_VREF_10

P_1P8VSUS_EN_10
1 2 GND GND
1

PC8401
4.7UF/6.3V
N/A
2

PSL8401
@
GND
2 1
0402
+5VSUS PR8401 P_1P8VSUS_VSENS_5
0Ohm
N/A

1
1 2 PR8403
4.02KOHM
N/A
1

1
PR8402 PC8403

2
0Ohm 0.22UF/25V
@ N/A

2
2
2

PR8404
47KOhm
GND N/A
1

GND GND

PD8401
RB520CM-30T2R
@

2 1

PR8407
0Ohm
N/A

30,88 VSUS_ON PT840* 請放置 PU8401旁;並請放置Trace 上!


2 1 P_1P8VSUS_EN_10
1

PC8409 PT8401
0.1UF/25V 1 @
@ P_1P8VSUS_LX_30
TPC20T
2

www.teknisi-indonesia.com

<Variant Name>

Project Name Rev

Project Name R1.0

Title : PW_+1.8VSUS
Size
Dept.: NB Power team Engineer: Power RD
A3
Date: Monday, July 13, 2020 Sheet 84 of 103
Main Board

MEMORY: GPU FB Partition A MEMORY: GPU FB Partition D


U7001E
FBD_CMD[52..0] 76
U7001B 5/24 FBD
FBA_CMD[52..0] 73 76 FBD_D[63..0]
2/24 FBA
73 FBA_D[63..0]
0 AR4 AU1 0
FBD_D0 FBD_CMD0
0 AC51 Y53 0 1 FBD_D0 AP8 AU4 FBD_CMD0 1
FBA_D0 FBA_CMD0 FBD_D1 FBD_CMD1
1 FBA_D0 AB48 AA56 FBA_CMD0 1 2 FBD_D1 AP6 AT1 FBD_CMD1 2 +FBVDDQ
FBA_D1 FBA_CMD1 FBD_D2 FBD_CMD2
2 FBA_D1 AC52 AB55 FBA_CMD1 2 +FBVDDQ +FBVDDQ 3 FBD_D2 AR6 AR2 FBD_CMD2 3 +FBVDDQ
FBA_D2 FBA_CMD2 FBD_D3 FBD_CMD3
3 FBA_D2 AC49 AB56 FBA_CMD2 3 4 FBD_D3 AM6 AR1 FBD_CMD3 4
FBA_D3 FBA_CMD3 FBD_D4 FBD_CMD4
4 FBA_D3 AF52 AC56 FBA_CMD3 4 5 FBD_D4 AP3 AP1 FBD_CMD4 5
FBA_D4 FBA_CMD4 FBD_D5 FBD_CMD5
5 FBA_D4 AC54 AC53 FBA_CMD4 5 6 FBD_D5 AP5 AP4 FBD_CMD5 6
FBA_D5 FBA_CMD5 FBD_D6 FBD_CMD6
6 FBA_D5 AE51 AD56 FBA_CMD5 6 7 FBD_D6 AM9 AN1 FBD_CMD6 7

1
FBA_D6 FBA_CMD6 FBD_D7 FBD_CMD7
7 FBA_D6 AF51 AE55 FBA_CMD6 7 8 FBD_D7 AU5 AM2 FBD_CMD7 8 R7206 R7230 R7232 R7233

1
FBA_D7 FBA_CMD7 FBD_D8 FBD_CMD8
8 FBA_D7 W51 AE56 FBA_CMD7 8 R7213 R7204 R7205 R7207 9 FBD_D8 AV6 AM1 FBD_CMD8 9 10KOhm 10KOhm 10KOhm 10KOhm
FBA_D8 FBA_CMD8 FBD_D9 FBD_CMD9
FBA_D8 W50 AF56 FBA_CMD8 FBD_D9 AV9 AL1 FBD_CMD9 1% 1% 1% 1%
9
FBA_D9 W53
FBA_D9 FBA_CMD9
AF53 FBA_CMD9
9 10KOhm
1%
10KOhm
1%
10KOhm
1%
10KOhm
1%
10
FBD_D10 AU3
FBD_D10 FBD_CMD10
AL4 FBD_CMD10
10
CKE#_A /V6G /V6G
CKE_B N/A N/A
10 10
CKE_A CKE_B 11 11

2
FBA_D10 FBA_CMD10 FBD_D11 FBD_CMD11
11 FBA_D10 Y54 AG56 FBA_CMD10 11 N/A N/A N/A N/A 12 FBD_D11 AU6 AK1 FBD_CMD11 12

2
FBA_D11 FBA_CMD11 FBD_D12 FBD_CMD12
12 FBA_D11 Y52 AH55 FBA_CMD11 12 13 FBD_D12 AU8 AJ2 FBD_CMD12 13 FBD_CMD14 FBD_CMD17
FBA_D12 FBA_CMD12 FBD_D13 FBD_CMD13
13 FBA_D12 Y51 AH56 FBA_CMD12 13 FBA_CMD14 FBA_CMD17 14 FBD_D13 AU10 AJ1 FBD_CMD13 14 FBD_CMD44 FBD_CMD41
FBA_D13 FBA_CMD13 FBD_D14 FBD_CMD14
14 FBA_D13 Y49 AJ56 FBA_CMD13 14 FBA_CMD44 FBA_CMD41 15 FBD_D14 AR7 AH1 FBD_CMD14 15
FBA_D14 FBA_CMD14 FBD_D15 FBD_CMD15
15 FBA_D14 AB51 AJ53 FBA_CMD14 15 16 FBD_D15 AF6 AH4 FBD_CMD15 16 FBD_CMD3
FBA_D15 FBA_CMD15 FBD_D16 FBD_CMD16
16 FBA_D15 AM54 AK56 FBA_CMD15 16 FBA_CMD3 17 FBD_D16 AH5 AG1 FBD_CMD16 17 FBD_CMD31
FBA_D16 FBA_CMD16 FBD_D17 FBD_CMD17
FBA_D16 AL51 AL55 FBA_CMD16 FBA_CMD31 FBD_D17 AH3 AF2 FBD_CMD17
17 17 18 18
RST#

1
FBA_D17 FBA_CMD17 FBD_D18 FBD_CMD18
FBA_D17 AM52 AL56 FBA_CMD17 FBD_D18 AF9 AF1 FBD_CMD18 R7229 R7215
18 18
RST# 19 19

1
FBA_D18 FBA_CMD18 FBD_D19 FBD_CMD19
19 FBA_D18 AJ54 AM56 FBA_CMD18 19 R7222 R7225 20 FBD_D19 AE6 AE1 FBD_CMD19 20 10KOhm 10KOhm
FBA_D19 FBA_CMD19 FBD_D20 FBD_CMD20
20 FBA_D19 AM47 AM53 FBA_CMD19 20 10KOhm 10KOhm 21 FBD_D20 AE8 AE4 FBD_CMD20 21 1% 1%
FBA_D20 FBA_CMD20 FBD_D21 FBD_CMD21
21 FBA_D20 AM51 AN56 FBA_CMD20 21 1% 1% 22 FBD_D21 AE5 AD1 FBD_CMD21 22 /V6G /V6G

2
FBA_D21 FBA_CMD21 FBD_D22 FBD_CMD22
22 FBA_D21 AP50 AP55 FBA_CMD21 22 N/A N/A 23 FBD_D22 AE10 AC2 FBD_CMD22 23

2
FBA_D22 FBA_CMD22 FBD_D23 FBD_CMD23
23 FBA_D22 AM49 AP56 FBA_CMD22 23 24 FBD_D23 AL6 AC1 FBD_CMD23 24
FBA_D23 FBA_CMD23 FBD_D24 FBD_CMD24
24 FBA_D23 AF54 AR56 FBA_CMD23 24 25 FBD_D24 AL3 AB1 FBD_CMD24
FBA_D24 FBA_CMD24 FBD_D25 FBD_CMD25_NC
25 FBA_D24 AF49 AR53 FBA_CMD24 26 FBD_D25 AL5 AB4 GND
FBA_D25 FBA_CMD25_NC FBD_D26 FBD_CMD26_NC
26 FBA_D25 AH51 AT56 GND 27 FBD_D26 AL8 AB2 27
FBA_D26 FBA_CMD26_NC FBD_D27 FBD_CMD27
27 FBA_D26 AF47 AR55 27 28 FBD_D27 AJ6 G2 28
FBA_D27 FBA_CMD27 FBD_D28 FBD_CMD28
28 FBA_D27 AJ52 BM56 28 29 FBD_D28 AL10 G1 FBD_CMD28 29 GND
FBA_D28 FBA_CMD28 FBD_D29 FBD_CMD29
29 FBA_D28 AJ51 BM55 FBA_CMD28 29 GND 30 FBD_D29 AH6 G3 FBD_CMD29 30
FBA_D29 FBA_CMD29 FBD_D30 FBD_CMD30
30 FBA_D29 AH48 BL56 FBA_CMD29 30 31 FBD_D30 AH8 H1 FBD_CMD30 31
FBA_D30 FBA_CMD30 FBD_D31 FBD_CMD31
31 FBA_D30 AJ49 BK55 FBA_CMD30 31 32 FBD_D31 T5 H2 FBD_CMD31 32
FBA_D31 FBA_CMD31 FBD_D32 FBD_CMD32
32 FBA_D31 BA49 BK56 FBA_CMD31 32 33 FBD_D32 T6 J1 FBD_CMD32 33
FBA_D32 FBA_CMD32 FBD_D33 FBD_CMD33
33 FBA_D32 BD47 BJ56 FBA_CMD32 33 34 FBD_D33 P6 K4 FBD_CMD33 34
FBA_D33 FBA_CMD33 FBD_D34 FBD_CMD34
34 FBA_D33 BD54 BJ55 FBA_CMD33 34 35 FBD_D34 T8 K1 FBD_CMD34 35
FBA_D34 FBA_CMD34 FBD_D35 FBD_CMD35
35 FBA_D34 BD52 BH56 FBA_CMD34 35 36 FBD_D35 T3 K2 FBD_CMD35 36
FBA_D35 FBA_CMD35 FBD_D36 FBD_CMD36
36 FBA_D35 BC51 BG53 FBA_CMD35 36 37 FBD_D36 N5 L1 FBD_CMD36 37
FBA_D36 FBA_CMD36 FBD_D37 FBD_CMD37
37 FBA_D36 BD51 BG56 FBA_CMD36 37 38 FBD_D37 N3 L2 FBD_CMD37 38
FBA_D37 FBA_CMD37 FBD_D38 FBD_CMD38
38 FBA_D37 BF51 BF56 FBA_CMD37 38 39 FBD_D38 N6 M1 FBD_CMD38 39
FBA_D38 FBA_CMD38 FBD_D39 FBD_CMD39
39 FBA_D38 BD49 BF55 FBA_CMD38 39 40 FBD_D39 L6 N4 FBD_CMD39 40
FBA_D39 FBA_CMD39 FBD_D40 FBD_CMD40
40 FBA_D39 BG52 BE56 FBA_CMD39 40 41 FBD_D40 N8 N1 FBD_CMD40 41
FBA_D40 FBA_CMD40 FBD_D41 FBD_CMD41
41 FBA_D40 BG51 BD53 FBA_CMD40 41 42 FBD_D41 K6 P1 FBD_CMD41 42
FBA_D41 FBA_CMD41 FBD_D42 FBD_CMD42
42 FBA_D41 BG54 BD56 FBA_CMD41 42 43 FBD_D42 L9 P2 FBD_CMD42 43
FBA_D42 FBA_CMD42 FBD_D43 FBD_CMD43
43 FBA_D42 BF49 BC56 FBA_CMD42 43 44 FBD_D43 K3 R1 FBD_CMD43 44
FBA_D43 FBA_CMD43 FBD_D44 FBD_CMD44
44 FBA_D43 BJ54 BC55 FBA_CMD43 44 45 FBD_D44 K5 T4 FBD_CMD44 45
FBA_D44 FBA_CMD44 FBD_D45 FBD_CMD45
45 FBA_D44 BG50 BB56 FBA_CMD44 45 46 FBD_D45 J2 T1 FBD_CMD45 46
FBA_D45 FBA_CMD45 FBD_D46 FBD_CMD46
46 FBA_D45 BJ52 BA53 FBA_CMD45 46 47 FBD_D46 K8 U1 FBD_CMD46 47
FBA_D46 FBA_CMD46 FBD_D47 FBD_CMD47
47 FBA_D46 BK53 BA56 FBA_CMD46 47 48 FBD_D47 AC7 U2 FBD_CMD47 48
FBA_D47 FBA_CMD47 FBD_D48 FBD_CMD48
48 FBA_D47 AP51 AY56 FBA_CMD47 48 49 FBD_D48 AE3 V1 FBD_CMD48 49
FBA_D48 FBA_CMD48 FBD_D49 FBD_CMD49
49 FBA_D48 AP53 AY55 FBA_CMD48 49 50 FBD_D49 AC6 W4 FBD_CMD49 50
FBA_D49 FBA_CMD49 FBD_D50 FBD_CMD50
50 FBA_D49 AR52 AW56 FBA_CMD49 50 51 FBD_D50 AC4 W1 FBD_CMD50 51
FBA_D50 FBA_CMD50 FBD_D51 FBD_CMD51
51 FBA_D50 AR54 AV53 FBA_CMD50 51 52 FBD_D51 AB3 Y1 FBD_CMD51 52
FBA_D51 FBA_CMD51 FBD_D52 FBD_CMD52
52 FBA_D51 AU51 AV56 FBA_CMD51 52 53 FBD_D52 AB5 Y2 FBD_CMD52
FBA_D52 FBA_CMD52 FBD_D53 FBD_CMD53_NC
53 FBA_D52 AR51 AU56 FBA_CMD52 54 FBD_D53 AB6 AA1
FBA_D53 FBA_CMD53_NC FBD_D54 FBD_CMD54_NC
54 FBA_D53 AV51 AU55 55 FBD_D54 AB8 W2
FBA_D54 FBA_CMD54_NC FBD_D55 FBD_CMD55
55 FBA_D54 AR49 AV55 56 FBD_D55 W6
FBA_D55 FBA_CMD55 FBD_D56
56 FBA_D55 AV49 57 FBD_D56 W8 GND
FBA_D56 FBD_D57
57 FBA_D56 AV54 GND 58 FBD_D57 W5
FBA_D57 FBD_D58
58 FBA_D57 AY51 59 FBD_D58 Y6
FBA_D58 FBD_D59
59 FBA_D58 AV52 60 FBD_D59 W3
FBA_D59 FBD_D60
60 FBA_D59 AY48 61 FBD_D60 U9
FBA_D60 FBD_D61
61 FBA_D60 BA54 62 FBD_D61 U6 AC10
FBA_D61 FBD_D62 FBD_CLK0 FBD_CLK0 76
62 FBA_D61 BA52 AP48 63 FBD_D62 T10 AC9
FBA_D62 FBA_CLK0 FBA_CLK0 73 FBD_D63 FBD_CLK0* FBD_CLK0# 76
63 FBA_D62 BA51 AP47 FBD_D63 AB10
FBA_D63 FBA_CLK0* FBA_CLK0# 73 FBD_CLK1 FBD_CLK1 76
FBA_D63 AR48 AB9
FBA_CLK1 FBA_CLK1 73 FBD_CLK1* FBD_CLK1# 76
AR47 AM7
FBA_CLK1* FBA_CLK1# 73 76 FBD_DBI0 FBD_DQM0
AE50 AV7
73 FBA_DBI0 FBA_DQM0 76 FBD_DBI1 FBD_DQM1
AB50 AF7 AP9
73 FBA_DBI1 FBA_DQM1 76 FBD_DBI2 FBD_DQM2 FBD_WCK01 FBD_WCK01 76
AL50 AE48 AJ7 AP10
73 FBA_DBI2 FBA_DQM2 FBA_WCK01 FBA_WCK01 73 76 FBD_DBI3 FBD_DQM3 FBD_WCK01* FBD_WCK01# 76
AH50 AE47 P7 AR9
73 FBA_DBI3 FBA_DQM3 FBA_WCK01* FBA_WCK01# 73 76 FBD_DBI4 FBD_DQM4 FBD_WCKB01 FBD_WCKB01 76
BC50 AC48 L7 AR10
73 FBA_DBI4 FBA_DQM4 FBA_WCKB01 FBA_WCKB01 73 76 FBD_DBI5 FBD_DQM5 FBD_WCKB01* FBD_WCKB01# 76
BF50 AC47 Y7 AH10
73 FBA_DBI5 FBA_DQM5 FBA_WCKB01* FBA_WCKB01# 73 76 FBD_DBI6 FBD_DQM6 FBD_WCK23 FBD_WCK23 76
AU50 AL48 U7 AH9
73 FBA_DBI6 FBA_DQM6 FBA_WCK23 FBA_WCK23 73 76 FBD_DBI7 FBD_DQM7 FBD_WCK23* FBD_WCK23# 76
AY50 AL47 AJ10
73 FBA_DBI7 FBA_DQM7 FBA_WCK23* FBA_WCK23# 73 FBD_WCKB23 FBD_WCKB23 76
AJ48 AJ9
FBA_WCKB23 FBA_WCKB23 73 FBD_WCKB23* FBD_WCKB23# 76
AJ47 AM4 P10
FBA_WCKB23* FBA_WCKB23# 73 76 FBD_EDC0 FBD_DQS_WP0 FBD_WCK45 FBD_WCK45 76
AE53 BA47 AV4 P9
73 FBA_EDC0 FBA_DQS_WP0 FBA_WCK45 FBA_WCK45 73 76 FBD_EDC1 FBD_DQS_WP1 FBD_WCK45* FBD_WCK45# 76
AB53 BA48 AF4 N10
73 FBA_EDC1 FBA_DQS_WP1 FBA_WCK45* FBA_WCK45# 73 76 FBD_EDC2 FBD_DQS_WP2 FBD_WCKB45 FBD_WCKB45 76
AL53 BC48 AJ4 N9
73 FBA_EDC2 FBA_DQS_WP2 FBA_WCKB45 FBA_WCKB45 73 76 FBD_EDC3 FBD_DQS_WP3 FBD_WCKB45* FBD_WCKB45# 76
AH53 BC47 P4 Y10
73 FBA_EDC3 FBA_DQS_WP3 FBA_WCKB45* FBA_WCKB45# 73 76 FBD_EDC4 FBD_DQS_WP4 FBD_WCK67 FBD_WCK67 76
BC53 AU48 L4 Y9
73 FBA_EDC4 FBA_DQS_WP4 FBA_WCK67 FBA_WCK67 73 76 FBD_EDC5 FBD_DQS_WP5 FBD_WCK67* FBD_WCK67# 76
BF53 AU47 Y4 W9
73 FBA_EDC5 FBA_DQS_WP5 FBA_WCK67* FBA_WCK67# 73 76 FBD_EDC6 FBD_DQS_WP6 FBD_WCKB67 FBD_WCKB67 76
AU53 AV48 U4 W10
73 FBA_EDC6 FBA_DQS_WP6 FBA_WCKB67 FBA_WCKB67 73 76 FBD_EDC7 FBD_DQS_WP7 FBD_WCKB67* FBD_WCKB67# 76
AY53 AV47
73 FBA_EDC7 FBA_DQS_WP7 FBA_WCKB67* FBA_WCKB67# 73

BP48
GND_0718
BN37 BR1
GND_694 GND_0719
BN38 BR12
GND_695 GND_0720
BN39 BR15 +FB_PLLAVDD
GND_696 GND_0721
BN4 +FB_PLLAVDD +FB_PLLVDD +1V8_AON BR18
GND_697 GND_0722
BN40 GDDR6 CMD Mapping x16 Mode BR2
GND_698 GND_0723
BN41 L7201 Lower 0..31 Lower 32..63 BR21
GND_699 DRAM1 DRAM2 GND_0724 Max:120mA
BN42 30Ohm/100Mhz BR24 T46
GND_700 Max:120mA GND_0725 FB_PLLVDD_6
BN43 AC46 R7210 1 2 0Ohm 1 2
GND_701 FB_PLLVDD_1
AE11 CHB-Byte 0,1 CHB-Byte 4,5
FB_PLLVDD_2

1
AP46 N/A N/A OHM/1A
FERRITE BEAD(0603)30 CA0_A CMD1 CMD33 GND C7203
FB_PLLVDD_3 CA1_A CMD13 CMD45
GND 1UF/6.3V
CA2_A CMD12 CMD35
1

C7201 C7202 C7207 CA3_A CMD24 CMD46

2
1UF/6.3V 1UF/6.3V 1UF/6.3V CA4_A CMD11 CMD36
CA5_A CMD15 CMD43
CA6_A CMD22 CMD48
2

CA7_A CMD23 CMD47


CA8_A CMD0 CMD34
+FB_PLLVDD CA9_A CMD2 CMD32 GB5-256 GND
GB5-256 因Layout因素SIZE從0805更改為0603 CABI_A CMD10 CMD37 02004-00650000 PLACE AT BALLS
CKE_A CMD14 CMD44
02004-00650000
GND GND GND
1

PLACE AT BALLS C7206 1


22UF/6.3V C7208 C7209 CHB-Byte 2,3 CHB-Byte 6,7
N/A 4.7UF/6.3V 4.7UF/6.3V CA0_B CMD5 CMD29
2

CA1_B CMD18 CMD52


CA2_B CMD7 CMD40
CA3_B CMD20 CMD50
CA4_B CMD8 CMD39
CA5_B CMD16 CMD42
CA6_B CMD21 CMD49
GND CA7_B CMD19 CMD51
CA8_B CMD6 CMD28
CA9_B CMD4 CMD30
CABI_B CMD9 CMD38
1 x 22 uF(0805) CKE_B CMD17 CMD41

2 x 4.7uF(0603)
RESET* CMD3 CMD31

PLACE OUTSIDE OF BGA

MEMORY: GPU FB Partition B MEMORY: GPU FB Partition C


U7001C U7001D
FBB_CMD[52..0] 74 FBC_CMD[52..0] 75
3/24 FBB 4/24 FBC
74 FBB_D[63..0] 75 FBC_D[63..0]

0 D37 B37 0 0 F7 B5 0
FBB_D0 FBB_CMD0 FBC_D0 FBC_CMD0
1 FBB_D0 J37 A37 FBB_CMD0 1 1 FBC_D0 H5 A5 FBC_CMD0 1
FBB_D1 FBB_CMD1 FBC_D1 FBC_CMD1
2 FBB_D1 G37 A38 FBB_CMD1 2 2 FBC_D1 F8 C5 FBC_CMD1 2
FBB_D2 FBB_CMD2 FBC_D2 FBC_CMD2
3 FBB_D2 F37 D38 FBB_CMD2 3 +FBVDDQ +FBVDDQ 3 FBC_D2 G5 A6 FBC_CMD2 3
FBB_D3 FBB_CMD3 FBC_D3 FBC_CMD3
4 FBB_D3 H38 A39 FBB_CMD3 4 4 FBC_D3 H8 B7 FBC_CMD3 4 +FBVDDQ
FBB_D4 FBB_CMD4 FBC_D4 FBC_CMD4
5 FBB_D4 E38 B40 FBB_CMD4 5 5 FBC_D4 E8 A7 FBC_CMD4 5 +FBVDDQ
FBB_D5 FBB_CMD5 FBC_D5 FBC_CMD5
6 FBB_D5 F40 A40 FBB_CMD5 6 6 FBC_D5 C8 A8 FBC_CMD5 6
FBB_D6 FBB_CMD6 FBC_D6 FBC_CMD6
7 FBB_D6 D40 A41 FBB_CMD6 7 7 FBC_D6 D10 D8 FBC_CMD6 7
FBB_D7 FBB_CMD7 FBC_D7 FBC_CMD7
8 FBB_D7 F34 D41 FBB_CMD7 8 8 FBC_D7 D2 A9 FBC_CMD7 8
1

1
FBB_D8 FBB_CMD8 FBC_D8 FBC_CMD8
9 FBB_D8 J34 A42 FBB_CMD8 9 R7211 R7217 R7209 R7216 9 FBC_D8 E1 B10 FBC_CMD8 9

1
FBB_D9 FBB_CMD9 FBC_D9 FBC_CMD9
10 FBB_D9 D34 B43 FBB_CMD9 10 10KOhm 10KOhm 10KOhm 10KOhm 10 FBC_D9 C2 A10 FBC_CMD9 10 R7203 R7221 R7234 R7235
FBB_D10 FBB_CMD10 FBC_D10 FBC_CMD10
FBB_D10 G34 A43 FBB_CMD10 1% 1% 1% 1% FBC_D10 D3 A11 FBC_CMD10
11
FBB_D11 E35
FBB_D11 FBB_CMD11
A44 FBB_CMD11
11
CKE#_A N/A N/A
CKE_B N/A N/A
11
FBC_D11 C3
FBC_D11 FBC_CMD11
D11 FBC_CMD11
11 10KOhm
1%
10KOhm
1%
10KOhm
1%
10KOhm
1%
12 12 12 12
CKE#_A CKE_B
2

FBB_D12 FBB_CMD12 FBC_D12 FBC_CMD12


13 FBB_D12 K34 D44 FBB_CMD12 13 13 FBC_D12 B4 A12 FBC_CMD12 13 /V4G /V4G N/A N/A

2
FBB_D13 FBB_CMD13 FBC_D13 FBC_CMD13
14 FBB_D13 H35 A45 FBB_CMD13 14 FBB_CMD14 FBB_CMD17 14 FBC_D13 E4 B13 FBC_CMD13 14
FBB_D14 FBB_CMD14 FBC_D14 FBC_CMD14
15 FBB_D14 K35 B46 FBB_CMD14 15 FBB_CMD44 FBB_CMD41 15 FBC_D14 D5 A13 FBC_CMD14 15 FBC_CMD14 FBC_CMD17
FBB_D15 FBB_CMD15 FBC_D15 FBC_CMD15
16 FBB_D15 G47 A46 FBB_CMD15 16 16 FBC_D15 F17 A14 FBC_CMD15 16 FBC_CMD44 FBC_CMD41
FBB_D16 FBB_CMD16 FBC_D16 FBC_CMD16
17 FBB_D16 E44 A47 FBB_CMD16 17 FBB_CMD3 17 FBC_D16 E14 D14 FBC_CMD16 17
FBB_D17 FBB_CMD17 FBC_D17 FBC_CMD17
18 FBB_D17 F46 D47 FBB_CMD17 18 FBB_CMD31 18 FBC_D17 C14 A15 FBC_CMD17 18
FBB_D18 FBB_CMD18 FBC_D18 FBC_CMD18
FBB_D18 F44 A48 FBB_CMD18 FBC_D18 H14 B16 FBC_CMD18 FBC_CMD3
19 19
RST# 19 19
1

FBB_D19 FBB_CMD19 FBC_D19 FBC_CMD19


20 FBB_D19 E46 B49 FBB_CMD19 20 R7219 R7214 20 FBC_D19 E17 A16 FBC_CMD19 20 FBC_CMD31
FBB_D20 FBB_CMD20 FBC_D20 FBC_CMD20
FBB_D20 C47 A49 FBB_CMD20 FBC_D20 F16 A17 FBC_CMD20
21 21 10KOhm 10KOhm 21 21
RST#

1
FBB_D21 FBB_CMD21 FBC_D21 FBC_CMD21
22 FBB_D21 E47 B50 FBB_CMD21 22 1% 1% 22 FBC_D21 C17 D17 FBC_CMD21 22 R7227 R7231
FBB_D22 FBB_CMD22 FBC_D22 FBC_CMD22
23 FBB_D22 C49 A50 FBB_CMD22 23 N/A N/A 23 FBC_D22 H17 A18 FBC_CMD22 23 10KOhm 10KOhm
2

FBB_D23 FBB_CMD23 FBC_D23 FBC_CMD23


24 FBB_D23 G40 C50 FBB_CMD23 24 24 FBC_D23 F10 B19 FBC_CMD23 24 1% 1%
FBB_D24 FBB_CMD24 FBC_D24 FBC_CMD24
25 FBB_D24 C41 A51 FBB_CMD24 25 FBC_D24 G10 A19 FBC_CMD24 /V4G /V4G

2
FBB_D25 FBB_CMD25_NC FBC_D25 FBC_CMD25_NC
26 FBB_D25 E41 B52 26 FBC_D25 C11 A20
FBB_D26 FBB_CMD26_NC FBC_D26 FBC_CMD26_NC
27 FBB_D26 F41 C52 27 27 FBC_D26 E11 B20 27
FBB_D27 FBB_CMD27 GND FBC_D27 FBC_CMD27
28 FBB_D27 F43 Y56 28 28 FBC_D27 F11 A36 28
FBB_D28 FBB_CMD28 FBC_D28 FBC_CMD28
29 FBB_D28 C44 W56 FBB_CMD28 29 GND 29 FBC_D28 F13 D35 FBC_CMD28 29 GND
FBB_D29 FBB_CMD29 FBC_D29 FBC_CMD29
30 FBB_D29 H41 W55 FBB_CMD29 30 30 FBC_D29 F14 A35 FBC_CMD29 30
FBB_D30 FBB_CMD30 FBC_D30 FBC_CMD30
31 FBB_D30 H44 V56 FBB_CMD30 31 31 FBC_D30 H11 A34 FBC_CMD30 31 GND
FBB_D31 FBB_CMD31 FBC_D31 FBC_CMD31
32 FBB_D31 L51 U53 FBB_CMD31 32 32 FBC_D31 F26 B34 FBC_CMD31 32
FBB_D32 FBB_CMD32 FBC_D32 FBC_CMD32
33 FBB_D32 L52 U56 FBB_CMD32 33 33 FBC_D32 E26 A33 FBC_CMD32 33
FBB_D33 FBB_CMD33 FBC_D33 FBC_CMD33
34 FBB_D33 N51 T56 FBB_CMD33 34 34 FBC_D33 H26 D32 FBC_CMD33 34
FBB_D34 FBB_CMD34 FBC_D34 FBC_CMD34
35 FBB_D34 L49 T55 FBB_CMD34 35 35 FBC_D34 D28 A32 FBC_CMD34 35
FBB_D35 FBB_CMD35 FBC_D35 FBC_CMD35
36 FBB_D35 L54 R56 FBB_CMD35 36 36 FBC_D35 C26 A31 FBC_CMD35 36
FBB_D36 FBB_CMD36 FBC_D36 FBC_CMD36
37 FBB_D36 N47 P53 FBB_CMD36 37 37 FBC_D36 E29 B31 FBC_CMD36 37
FBB_D37 FBB_CMD37 FBC_D37 FBC_CMD37
38 FBB_D37 P51 P56 FBB_CMD37 38 38 FBC_D37 F28 A30 FBC_CMD37 38
FBB_D38 FBB_CMD38 FBC_D38 FBC_CMD38
39 FBB_D38 P49 N56 FBB_CMD38 39 39 FBC_D38 G28 D29 FBC_CMD38 39
FBB_D39 FBB_CMD39 FBC_D39 FBC_CMD39
40 FBB_D39 T51 N55 FBB_CMD39 40 40 FBC_D39 F31 A29 FBC_CMD39 40
FBB_D40 FBB_CMD40 FBC_D40 FBC_CMD40
41 FBB_D40 P52 M56 FBB_CMD40 41 41 FBC_D40 K29 A28 FBC_CMD40 41
FBB_D41 FBB_CMD41 FBC_D41 FBC_CMD41
42 FBB_D41 P54 L53 FBB_CMD41 42 42 FBC_D41 H29 B28 FBC_CMD41 42
FBB_D42 FBB_CMD42 FBC_D42 FBC_CMD42
43 FBB_D42 U47 L56 FBB_CMD42 43 43 FBC_D42 J28 A27 FBC_CMD42 43
FBB_D43 FBB_CMD43 FBC_D43 FBC_CMD43
44 FBB_D43 U51 K56 FBB_CMD43 44 44 FBC_D43 D31 D26 FBC_CMD43 44
FBB_D44 FBB_CMD44 FBC_D44 FBC_CMD44
45 FBB_D44 U52 K55 FBB_CMD44 45 45 FBC_D44 G31 A26 FBC_CMD44 45
FBB_D45 FBB_CMD45 FBC_D45 FBC_CMD45
46 FBB_D45 U54 J56 FBB_CMD45 46 46 FBC_D45 E32 A25 FBC_CMD45 46
FBB_D46 FBB_CMD46 FBC_D46 FBC_CMD46
47 FBB_D46 U49 H53 FBB_CMD46 47 47 FBC_D46 H31 B25 FBC_CMD46 47
FBB_D47 FBB_CMD47 FBC_D47 FBC_CMD47
48 FBB_D47 D52 H56 FBB_CMD47 48 48 FBC_D47 F19 A24 FBC_CMD47 48
FBB_D48 FBB_CMD48 FBC_D48 FBC_CMD48
49 FBB_D48 C53 G56 FBB_CMD48 49 49 FBC_D48 K17 D23 FBC_CMD48 49
FBB_D49 FBB_CMD49 FBC_D49 FBC_CMD49
50 FBB_D49 C54 G55 FBB_CMD49 50 50 FBC_D49 C20 A23 FBC_CMD49 50
FBB_D50 FBB_CMD50 FBC_D50 FBC_CMD50
51 FBB_D50 C55 E56 FBB_CMD50 51 51 FBC_D50 J19 A22 FBC_CMD50 51
FBB_D51 FBB_CMD51 FBC_D51 FBC_CMD51
52 FBB_D51 D55 B54 FBB_CMD51 52 52 FBC_D51 E20 B22 FBC_CMD51 52
FBB_D52 FBB_CMD52 FBC_D52 FBC_CMD52
53 FBB_D52 D54 B53 FBB_CMD52 53 FBC_D52 F20 A21 FBC_CMD52
FBB_D53 FBB_CMD53_NC FBC_D53 FBC_CMD53_NC
54 FBB_D53 F56 A52 54 FBC_D53 K20 D20
FBB_D54 FBB_CMD54_NC FBC_D54 FBC_CMD54_NC
55 FBB_D54 F49 E55 55 FBC_D54 H20 B23
FBB_D55 FBB_CMD55 FBC_D55 FBC_CMD55
56 FBB_D55 G53 56 FBC_D55 G22
FBB_D56 FBC_D56
57 FBB_D56 H49 57 FBC_D56 F22 GND
FBB_D57 FBC_D57
58 FBB_D57 H51 GND 58 FBC_D57 C23
FBB_D58 FBC_D58
59 FBB_D58 G51 59 FBC_D58 D22
FBB_D59 FBC_D59
60 FBB_D59 H52 60 FBC_D59 E23
FBB_D60 FBC_D60
61 FBB_D60 H54 61 FBC_D60 F23
FBB_D61 FBC_D61
62 FBB_D61 K48 K44 62 FBC_D61 F25 K22
FBB_D62 FBB_CLK0 FBB_CLK0 74 FBC_D62 FBC_CLK0 FBC_CLK0 75
63 FBB_D62 K51 J44 63 FBC_D62 H23 J22
FBB_D63 FBB_CLK0* FBB_CLK0# 74 FBC_D63 FBC_CLK0* FBC_CLK0# 75
FBB_D63 J46 FBC_D63 K23
FBB_CLK1 FBB_CLK1 74 FBC_CLK1 FBC_CLK1 75
K46 J23
FBB_CLK1* FBB_CLK1# 74 FBC_CLK1* FBC_CLK1# 75
F38 G7
74 FBB_DBI0 FBB_DQM0 75 FBC_DBI0 FBC_DQM0
F35 E3
74 FBB_DBI1 FBB_DQM1 75 FBC_DBI1 FBC_DQM1
G46 J40 G16 K13
74 FBB_DBI2 FBB_DQM2 FBB_WCK01 FBB_WCK01 74 75 FBC_DBI2 FBC_DQM2 FBC_WCK01 FBC_WCK01 75
G43 K40 G13 J13
74 FBB_DBI3 FBB_DQM3 FBB_WCK01* FBB_WCK01# 74 75 FBC_DBI3 FBC_DQM3 FBC_WCK01* FBC_WCK01# 75
N50 K38 F29 K11
74 FBB_DBI4 FBB_DQM4 FBB_WCKB01 FBB_WCKB01 74 75 FBC_DBI4 FBC_DQM4 FBC_WCKB01 FBC_WCKB01 75
T50 J38 F32 J11
74 FBB_DBI5 FBB_DQM5 FBB_WCKB01* FBB_WCKB01# 74 75 FBC_DBI5 FBC_DQM5 FBC_WCKB01* FBC_WCKB01# 75
E49 J43 G19 J16
74 FBB_DBI6 FBB_DQM6 FBB_WCK23 FBB_WCK23 74 75 FBC_DBI6 FBC_DQM6 FBC_WCK23 FBC_WCK23 75
K50 K43 G25 K16
74 FBB_DBI7 FBB_DQM7 FBB_WCK23* FBB_WCK23# 74 75 FBC_DBI7 FBC_DQM7 FBC_WCK23* FBC_WCK23# 75
K41 J14
FBB_WCKB23 FBB_WCKB23 74 FBC_WCKB23 FBC_WCKB23 75
J41 K14
FBB_WCKB23* FBB_WCKB23# 74 FBC_WCKB23* FBC_WCKB23# 75
C38 P47 D7 K31
74 FBB_EDC0 FBB_DQS_WP0 FBB_WCK45 FBB_WCK45 74 75 FBC_EDC0 FBC_DQS_WP0 FBC_WCK45 FBC_WCK45 75
C35 P48 B3 J31
74 FBB_EDC1 FBB_DQS_WP1 FBB_WCK45* FBB_WCK45# 74 75 FBC_EDC1 FBC_DQS_WP1 FBC_WCK45* FBC_WCK45# 75
D46 T48 D16 K32
74 FBB_EDC2 FBB_DQS_WP2 FBB_WCKB45 FBB_WCKB45 74 75 FBC_EDC2 FBC_DQS_WP2 FBC_WCKB45 FBC_WCKB45 75
D43 T47 D13 J32
74 FBB_EDC3 FBB_DQS_WP3 FBB_WCKB45* FBB_WCKB45# 74 75 FBC_EDC3 FBC_DQS_WP3 FBC_WCKB45* FBC_WCKB45# 75
N53 K47 C29 K25
74 FBB_EDC4 FBB_DQS_WP4 FBB_WCK67 FBB_WCK67 74 75 FBC_EDC4 FBC_DQS_WP4 FBC_WCK67 FBC_WCK67 75
T53 J47 C32 J25
74 FBB_EDC5 FBB_DQS_WP5 FBB_WCK67* FBB_WCK67# 74 75 FBC_EDC5 FBC_DQS_WP5 FBC_WCK67* FBC_WCK67# 75
E53 L47 D19 J26
74 FBB_EDC6 FBB_DQS_WP6 FBB_WCKB67 FBB_WCKB67 74 75 FBC_EDC6 FBC_DQS_WP6 FBC_WCKB67 FBC_WCKB67 75
K53 L48 D25 K26
74 FBB_EDC7 FBB_DQS_WP7 FBB_WCKB67* FBB_WCKB67# 74 75 FBC_EDC7 FBC_DQS_WP7 FBC_WCKB67* FBC_WCKB67# 75

BN44 BP32
GND_702 GND_710
BN45 BP34
GND_703 GND_711
BN46 BP36
GND_704 GND_712
BN47 +FB_PLLAVDD BP38 +FB_PLLAVDD
GND_705 GND_713
BN48 BP40
GND_706 GND_714
BN6 BP42
GND_707 GND_715
BN9 BP44 Max:120mA
GND_708 GND_716
BP1 L17 BP46 L35
GND_709 FB_PLLVDD_4 GND_717 FB_PLLVDD_5
1

GND C7205 GND C7204 Project Name Rev


1UF/6.3V 1UF/6.3V
GX502GX R1.2
2

Title : GPU_FRAME BUFFER


Size
GB5-256 GND GB5-256 GND Dept.: Engineer:
ASUSTeK COMPUTER INC. NB1 EE
Custom
02004-00650000 02004-00650000 PLACE AT BALLS
PLACE AT BALLS Date: Monday, July 13, 2020 Sheet 72 of 101
@20200705_Memory P/N
Samsung_256*32_K4Z80325BC : 03014-00010600(目前
Micron_256M*32_MT61K256M32JE: 03014-00010500

40 OHm_NET 40 OHm_NET
72 FBB_D[31..0]
FBB Partition 31..0 72 FBB_D[63..32]

FBB Partition 64..32


72 FBB_CMD[52..0]
MF=1 Mirror +FBVDDQ
MF=0 Normal +FBVDDQ

U74003
N4 U74004
VDDQ1
B4 T4 N4
DQ0_A VDDQ2 VDDQ1
FBB_D15 A3 N11 B4 T4
DQ1_A VDDQ3 DQ0_A VDDQ2
FBB_D9 B3 T11 FBB_D42 A3 N11
DQ2_A VDDQ4 DQ1_A VDDQ3
FBB_D10 B2 F11 FBB_D41 B3 T11
DQ3_A VDDQ5 DQ2_A VDDQ4
FBB_D11 E3 F4 FBB_D40 B2 F11
DQ4_A VDDQ6 DQ3_A VDDQ5
FBB_D13 E2 J13 FBB_D45 E3 F4
DQ5_A VDDQ7 DQ4_A VDDQ6
FBB_D8 F2 J2 FBB_D46 E2 J13
DQ6_A VDDQ8 DQ5_A VDDQ7
FBB_D14 G2 U5 FBB_D44 F2 J2
DQ7_A VDDQ9 DQ6_A VDDQ8
FBB_D12 B11 U10 FBB_D43 G2 U5
DQ8_A VDDQ10 DQ7_A VDDQ9
FBB_D25 A12 P1 FBB_D47 B11 U10
DQ9_A VDDQ11 DQ8_A VDDQ10
FBB_D26 B12 P14 FBB_D63 A12 P1
DQ10_A VDDQ12 DQ9_A VDDQ11
FBB_D27 B13 T1 FBB_D61 B12 P14
DQ11_A VDDQ13 DQ10_A VDDQ12
FBB_D24 E12 T14 FBB_D58 B13 T1
DQ12_A VDDQ14 DQ11_A VDDQ13
FBB_D29 E13 L1 FBB_D60 E12 T14
DQ13_A VDDQ15 DQ12_A VDDQ14
FBB_D31 F13 L14 FBB_D62 E13 L1
DQ14_A VDDQ16 DQ13_A VDDQ15
FBB_D28 G13 C1 FBB_D56 F13 L14
DQ15_A VDDQ17 DQ14_A VDDQ16
FBB_D30 C4 FBB_D57 G13 C1
VDDQ18 DQ15_A VDDQ17
C11 FBB_D59 C4
VDDQ19 VDDQ18
H3 C14 C11
CA0_A VDDQ20 VDDQ19
FBB_CMD1 G11 E1 H3 C14
CA1_A VDDQ21 CA0_A VDDQ20
FBB_CMD13 G4 E14 FBB_CMD33 G11 E1
CA2_A VDDQ22 CA1_A VDDQ21
FBB_CMD12 H12 K2 FBB_CMD45 G4 E14
CA3_A VDDQ23 CA2_A VDDQ22
FBB_CMD24 H5 K13 FBB_CMD35 H12 K2
CA4_A VDDQ24 CA3_A VDDQ23
FBB_CMD11 H10 B5 FBB_CMD46 H5 K13
CA5_A VDDQ25 CA4_A VDDQ24
FBB_CMD15 J12 B10 FBB_CMD36 H10 B5
CA6_A VDDQ26 CA5_A VDDQ25
FBB_CMD22 J11 H1 FBB_CMD43 J12 B10
CA7_A VDDQ27 CA6_A VDDQ26
FBB_CMD23 J4 H14 FBB_CMD48 J11 H1
CA8_A VDDQ28 CA7_A VDDQ27
FBB_CMD0 J3 FBB_CMD47 J4 H14
CA9_A CA8_A VDDQ28
FBB_CMD2 J5 FBB_CMD34 J3
CABI_n_A CA9_A
FBB_CMD10 G10 P5 FBB_CMD32 J5
CKE_n_A VDD1 CABI_n_A
FBB_CMD14 E5 FBB_CMD37 G10 P5
VDD2 CKE_n_A VDD1
E10 FBB_CMD44 E5
VDD3 VDD2
D2 L2 E10
72 FBB_DBI1 DBI0_n_A VDD4 VDD3
D13 L13 D2 L2
72 FBB_DBI3 DBI1_n_A VDD5 72 FBB_DBI5 DBI0_n_A VDD4
A1 D13 L13
VDD6 72 FBB_DBI7 DBI1_n_A VDD5
D4 A14 A1
72 FBB_WCKB01 WCK_t_A VDD7 VDD6
D5 H2 D4 A14
72 FBB_WCKB01# WCK_c_A VDD8 72 FBB_WCKB45 WCK_t_A VDD7
H13 D5 H2
VDD9 72 FBB_WCKB45# WCK_c_A VDD8
P10 H13
VDD10 VDD9
C2 V1 P10
72 FBB_EDC1 EDC0_A VDD11 VDD10
C13 V14 C2 V1
72 FBB_EDC3 EDC1_A VDD12 72 FBB_EDC5 EDC0_A VDD11
MEM_VPP C13 V14
72 FBB_EDC7 EDC1_A VDD12
MEM_VPP
A5
VPP1
A10 A5
VPP2 VPP1
V5 A10
VPP3 VPP2
U4 V10 V5
DQ0_B VPP4 VPP3
FBB_D1 V3 U4 V10
DQ1_B DQ0_B VPP4
FBB_D7 U3 FBB_D32 V3
DQ2_B DQ1_B
FBB_D6 U2 E11 FBB_D35 U3
DQ3_B VSS1 DQ2_B
FBB_D5 P3 A13 FBB_D33 U2 E11
DQ4_B VSS2 DQ3_B VSS1
FBB_D4 P2 A11 FBB_D39 P3 A13
DQ5_B VSS3 DQ4_B VSS2
FBB_D0 N2 E4 FBB_D36 P2 A11
DQ6_B VSS4 DQ5_B VSS3
FBB_D3 M2 A2 FBB_D38 N2 E4
DQ7_B VSS5 DQ6_B VSS4
FBB_D2 U11 A4 FBB_D34 M2 A2
DQ8_B VSS6 DQ7_B VSS5
FBB_D18 V12 H11 FBB_D37 U11 A4
DQ9_B VSS7 DQ8_B VSS6
FBB_D21 U12 H4 FBB_D55 V12 H11
DQ10_B VSS8 DQ9_B VSS7
FBB_D20 U13 P4 FBB_D49 U12 H4
DQ11_B VSS9 DQ10_B VSS8
FBB_D22 P12 G3 FBB_D54 U13 P4
DQ12_B VSS10 DQ11_B VSS9
FBB_D19 P13 G12 FBB_D48 P12 G3
DQ13_B VSS11 DQ12_B VSS10
FBB_D23 N13 B1 FBB_D52 P13 G12
DQ14_B VSS12 DQ13_B VSS11
FBB_D17 M13 B14 FBB_D51 N13 B1
DQ15_B VSS13 DQ14_B VSS12
FBB_D16 D1 FBB_D53 M13 B14
VSS14 DQ15_B VSS13
D3 FBB_D50 D1
VSS15 VSS14
D12 D3
VSS16 VSS15
L3 D14 D12
CA0_B VSS17 VSS16
FBB_CMD5 M11 F1 L3 D14
CA1_B VSS18 CA0_B VSS17
FBB_CMD18 M4 F3 FBB_CMD29 M11 F1
CA2_B VSS19 CA1_B VSS18
FBB_CMD7 L12 F12 FBB_CMD52 M4 F3
CA3_B VSS20 CA2_B VSS19
FBB_CMD20 L5 F14 FBB_CMD40 L12 F12
CA4_B VSS21 CA3_B VSS20
FBB_CMD8 L10 M1 FBB_CMD50 L5 F14
CA5_B VSS22 CA4_B VSS21
FBB_CMD16 K12 M3 FBB_CMD39 L10 M1
CA6_B VSS23 CA5_B VSS22
FBB_CMD21 K11 M12 FBB_CMD42 K12 M3
CA7_B VSS24 CA6_B VSS23
FBB_CMD19 K4 M14 FBB_CMD49 K11 M12
CA8_B VSS25 CA7_B VSS24
FBB_CMD6 K3 T3 FBB_CMD51 K4 M14
CA9_B VSS26 CA8_B VSS25
FBB_CMD4 K5 T12 FBB_CMD28 K3 T3
CABI_n_B VSS27 CA9_B VSS26
FBB_CMD9 M10 C5 FBB_CMD30 K5 T12
CKE_n_B VSS28 CABI_n_B VSS27
FBB_CMD17 C10 FBB_CMD38 M10 C5
VSS29 CKE_n_B VSS28
G1 FBB_CMD41 C10
VSS30 VSS29
R2 G14 G1
72 FBB_DBI0 DBI0_n_B VSS31 VSS30
R13 L4 R2 G14
72 FBB_DBI2 DBI1_n_B VSS32 72 FBB_DBI4 DBI0_n_B VSS31
L11 R13 L4
VSS33 72 FBB_DBI6 DBI1_n_B VSS32
P11 L11
VSS34 VSS33
R11 C3 P11
72 FBB_WCK23 WCK_t_B VSS35 VSS34
R10 C12 R11 C3
72 FBB_WCK23# WCK_c_B VSS36 72 FBB_WCK67 WCK_t_B VSS35
N1 R10 C12
VSS37 72 FBB_WCK67# WCK_c_B VSS36
N3 N1
VSS38 VSS37
T2 N12 N3
72 FBB_EDC0 EDC0_B VSS39 VSS38
T13 N14 T2 N12
72 FBB_EDC2 EDC1_B VSS40 72 FBB_EDC4 EDC0_B VSS39
R1 T13 N14
VSS41 72 FBB_EDC6 EDC1_B VSS40
R3 R1
VSS42 VSS41
R12 R3
VSS43 VSS42
R14 R12
VSS44 VSS43
K10 U1 R14
72 FBB_CLK0# CK_c VSS45 VSS44
J10 U14 K10 U1
72 FBB_CLK0 CK_t VSS46 72 FBB_CLK1# CK_c VSS45
T5 J10 U14
VSS47 72 FBB_CLK1 CK_t VSS46
T10 T5
VSS48 VSS47
V2 T10
VSS49 VSS48
V4 V2
VSS50 VSS49
J1 V11 V4
RESET_n VSS51 VSS50
FBB_CMD3 V13 J1 V11
VSS52 RESET_n VSS51
FBB_CMD31 V13
VSS52

D11 GND
NC1 FBB_WCKB23 72
D10 D11 GND
NC5 FBB_WCKB23# 72 NC1 FBB_WCKB67 72
N5 R4 D10
TCK NC4 FBB_WCK01 72 NC5 FBB_WCKB67# 72
F10 R5 N5 R4
TDI NC2 FBB_WCK01# 72 TCK NC4 FBB_WCK45 72
N10 G5 F10 R5
TDO NC6 TDI NC2 FBB_WCK45# 72
F5 M5 N10 G5
TMS NC3 TDO NC6
F5 M5
TMS NC3

J14 121Ohm 2 1% 1 R74005


ZQ_A GND
FBB_ZQ_1A /GPU_KA J14 121Ohm 2 1% 1 R74007
ZQ_A GND
K1 K14 121Ohm 2 1% 1 R74006 FBB_ZQ_2A /GPU_KA
VREFC ZQ_B GND
FBB_VREFC_L FBB_ZQ_1B /GPU_KA K1 K14 121Ohm 2 1% 1 R74008
VREFC ZQ_B GND
FBB_VREFC_H FBB_ZQ_2B /GPU_KA
2

R74009
1KOhm MT61K256M32JE-14:A R74010
1% 03014-00010600 1KOhm MT61K256M32JE-14:A
/GPU_KB 1% 03014-00010600
1

/GPU_KB
1

GND
GND

Project Name Rev

GX502GX R1.2

Title : VRAM_Channel_B
Size
Dept.: Engineer:
ASUSTeK COMPUTER INC. NB1
Custom
Date: Monday, July 13, 2020 Sheet 74 of 101
+3VA_DSW / +5VSUS [System Power]

Colay RT +5VAO
P_5VSUS_BST_RC_20

AC_BAT_SYS AC_BAT_SYS

2
PJP8700 @ PJP8703 @

1
3MM_SHORT_PIN PR8708 PR8704 3MM_SHORT_PIN

2
1 2 0Ohm PC8704 1Ohm 2 1
1 2 2 1
P_5VSUS_VIN_S @ 0.1UF/25V P_3VADSW_VIN_S

1
nbs_r0603_h24_000s

2
MLCC 0.1UF/25V (0402) X7R 10%

1
1

1
PCI8701 PCI8702 PCI8703 PCI8704 H=2.1mm
H=2.1mm 10UF/25V 10UF/25V 10UF/25V 10UF/25V Chip
1

1
Chip N/A
nbs_c0805_h57_000s @
nbs_c0805_h57_000s @
nbs_c0805_h57_000s N/A
nbs_c0805_h57_000s
2

2
+ PCE8700 + PCE8703
15UF/25V 15UF/25V
nbs_c7343d_h79_000s
N/A PQH8701 nbs_c7343d_h79_000s
N/A

P_12VSUS_VCLK_20
1
2

2
P_5VSUS_BST_20
NTMFS4C09NBT1G PR8709

P_5VSUS_HG_30
P_5VSUS_EN_10

P_5VSUS_LX_30
3
nbs_powerpak_3p_001c PR8705 0Ohm PR8706

5
D D

nbs_powerpak_5p_011
PEA16BA
PQH8702
0Ohm @ 0Ohm 5%
nbs_r0603_h24_000s AC_BAT_SYS

2
2 4
S G P_5VSUS_HG_R_30 2 1 P_5VSUS_HG_30 1
P_3VADSW_HG_30 2 P_3VADSW_HG_R_30 G S

PU8701 Imax= 8A

1
2
3
1

23
22
21
20
19
18
17
16
SN51285ARUKR
Imax= 15A OCP= 12A

GND3
GND2
GND1
EN1
VCLK
SW1
VBST1
DRVH1
OCP= 20A 1 15
CS1 DRVL1
PL8701 P_5VSUS_CS_10 2 14 P_5VSUS_LG_30 PL8702
+5VSUS 1UH P_5VSUS_FB_5 3
VFB1 VO1
13 +5VSUS 2.2UH
+3VA_DSW
VREG3 VREG5
Irat=25A +3VAO 4 12 +5VAO Irat=10A
VFB2 VIN
1 2 P_3VADSW_FB_5 5 11 1 2
CS2 DRVL2

PGOOD
P_5VSUS_LX_30 P_3VADSW_CS_10 P_3VADSW_LG_30 P_3VADSW_LX_30

DRVH2
VBST2
+3VA_DSW_PWR

1
SW2
10x10x4mm 7x7x3mm

EN2
1

1
PR8700 PR8701 PC8700 PC8702 PC8703 PC8709 + PCE8704 PSL8705 @
1

1
4.12KOhm N/A 15KOhm 2.2UF/6.3V 2.2UF/6.3V 0.1UF/25V 22UF/6.3V 150UF/6.3V SHORT_LAND

6
7
8
9
10
1

+ PCE8701 PC8701 PC8723 PQL8701 PQL8702 nbs_r0402_h16_000s @ PC8724 nbs_c0603_h39_000s nbs_c7343d_h79_000s 1 2

2
0402
150UF/6.3V 22UF/6.3V 1000PF/50V NTMFS4983NBFT1G NTMFS4983NBFT1G @ +5V CS +3.3V CS 1000PF/50V

2
2

2
2

3
nbs_c7343d_h79_000s nbs_c0603_h39_000s nbs_powerpak_3p_001c nbs_powerpak_3p_001c

5
D D D
2

nbs_powerpak_5p_011
PEA16BA
PQL8703
PSP8701

P_3VADSW_BST_20
P_3VADSW_HG_30
P_3VADSW_EN_10

P_3VADSW_LX_30

2
SHORT_PAD P_3VADSW_SNB_40
P_5VSUS_SNB_40 2 2 4 PSP8704

1
@ S G P_5VSUS_LG_30 S G P_5VSUS_LG_30 P_3VADSW_LG_30 G S PR8703 SHORT_PAD
1

PR8702 1Ohm
1

1
1Ohm PC8705 PC8712 nbs_r0805_h24_000s @

1
2
3
1

1
nbs_r0805_h24_000s 2200PF/50V @ 2200PF/50V @ PC8718

1
2200PF/50V
2

2
@

P_5VSUS_VSENS_5 27,30,58 3VA_DSW_PWRGD


P_3VADSW_VSENS_5
1
1

PC8711 PRFB8701 PC8710

1
1
0.1UF/25V @ 10KOhm 150PF/50V @ PR8707 PC8717 PRFB8703 PC8716

2
PC8715 1Ohm 150PF/50V @ 6.8KOhm 0.1UF/25V @
2
2

0.1UF/25V nbs_r0603_h24_000s nbs_c0402_h22_000s


2

2
2

2
MLCC 0.1UF/25V (0402) X7R 10%
P_5VSUS_FB_5
P_3VADSW_FB_5
P_3VADSW_BST_RC_20
1

PRFB8702

1
6.49KOhm PRFB8704
10KOhm
2

2
Colay RT

PR8710
PSL8701 @
1 0Ohm 2
@ PC8719 SHORT_LAND
P_3VADSW_LG_30 0.1UF/25V 1 2
PR8711 30,88 3VADSW_ON 0402
nbs_c0402_h22_000s PD8700 P_3VADSW_EN_10
1 0Ohm 2 2 1 BAT54SDW
+12VSUS P_12VSUS_VCLK_20 P_12VSUS_CP_CLK_20 P_12VSUS_CP1_20 6 1 PSL8702 @
PSL8700 @ +5VSUS SHORT_LAND
1 2 5 2 1 2
0603 30 5VSUS_ON 0402
P_12VSUS_CP4_20 P_12VSUS_CP3_20 P_5VSUS_EN_10
1

4 3
+3VA
1

PC8722 PSL8703 @
0.1UF/25V PC8721 PC8720 SHORT_LAND
2

0.1UF/25V 0.1UF/25V 1 2
2

0603
nbs_c0402_h22_000s +3VAO
nbs_c0402_h22_000s 2 1
P_12VSUS_CP2_20 nbs_c0402_h22_000s

請 check 整份線路 +12VSUS total 並聯對地電阻不得小於10kOhm

PT870* 請放置 PU8700旁;並請放置Trace 上!


Adaptor Mode (IMVP8) Battery Mode (IMVP8)

S0 CS S3 DS3 S4 S5 S5 with USB Charger+ S0 CS S3 DS3 S4 S5 S5 with USB Charger+

PS_ON 1 - 1 - 1 - 1 PS_ON 1 - - 1 0 0 1 1 PT8701 @ 1 PT8704 @


P_5VSUS_HG_30 TPC20T P_3VADSW_HG_30 TPC20T
3VADSW_ON 1 - 1 - 1 - 1 3VADSW_ON 1 - - 1 0 0 0

3VSUS_ON 1 - 1 - 1 - 1 3VSUS_ON 1 - - 0 0 0 0
<Variant Name>
1 PT8702 @ 1 PT8705 @
5VSUS_ON 1 - 1 - 1 - 1 5VSUS_ON 1 - - 1 0 0 1 P_5VSUS_LX_30 TPC20T P_3VADSW_LX_30 TPC20T Project Name Rev

1.35V_ON 1 - 1 - 0 - 0 1.35V_ON 1 - - 1 0 0 0 FX516 R1.0

SUSC_EC# 1 - 1 - 0 - 0 SUSC_EC# 1 - - 0 0 0 0 1 PT8703 @ 1 PT8706 @ Title : PW_+3VA_DSW/+5VSUS


P_5VSUS_LG_30 TPC20T P_3VADSW_LG_30 TPC20T
Size
SUSB_EC# 1 - 0 - 0 - 0 SUSB_EC# 1 - - 0 0 0 0 A2
Dept.: NB Power team Engineer: Matt
Date: Monday, July 13, 2020 Sheet 87 of 103
FBVDDQ FBVDDQ
VRAM side GPU side

VRAM PWR_FBVDDQ
Channel A
+FBVDDQ 因Layout因素SIZE從0603更改為0402 (C77002,C77189,C77214) +FBVDDQ +FBVDDQ

Close to DRAM Close to DRAM 1uF x 6pcs(0402)


1

1
C77001 C77002 C77003 C77004 C77005 C77006 C77033 C77034 C77035 C77036 C77037 C77038 C77257 C77258 C77259 C77350 C77351 C77352 C77263 C77264
10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V
10UF/6.3V
VRAM A0 VRAM A0
10UF/6.3V
VRAM A0
10UF/6.3V
VRAM A0
10UF/6.3V
VRAM A0
10UF/6.3V
VRAM A0
1uF x 18pcs(0402) 10UF/6.3V
VRAM A1
10UF/6.3V
VRAM A1
10UF/6.3V
VRAM A1
10UF/6.3V
VRAM A1
10UF/6.3V
VRAM A1
10UF/6.3V
VRAM A1
1uF x 18pcs(0402) Partition A /GPU_KA /GPU_KA /GPU_KA /GPU_KA /GPU_KA /GPU_KA /GPU_KA /GPU_KA
10uF x 2pcs(0603)
2

2
10uF x 4pcs(0603) 10uF x 4pcs(0603) under GPU

1uF x 6pcs(0402)
1

1
C77007 C77008 C77009 C77010 C77011 C77012 C77039 C77040 C77041 C77042 C77043 C77044 C77265 C77266 C77267 C77353 C77354 C77355 C77271 C77833
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V Around DRAM 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V Around DRAM Partition B 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V
10uF x 2pcs(0603)
VRAM A0 VRAM A0 VRAM A0 VRAM A0 VRAM A0 VRAM A0 VRAM A1 VRAM A1 VRAM A1 VRAM A1 VRAM A1 VRAM A1 /GPU_KB /GPU_KB /GPU_KB /GPU_KB /GPU_KB /GPU_KB /GPU_KB /GPU_KB
2

2
22uF x 6pcs(0603) 22uF x 6pcs(0603) under GPU
10uF x 2pcs(0603) 10uF x 2pcs(0603)

Close to DRAM 1uF x 6pcs(0402)

1
C77273 C77274 C77275 C77276 C77356 C77357 C77279 C77834
1

1
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V
C77013 C77014 C77015 C77016 C77017 C77018 C77045 C77046 C77047 C77048 C77049 C77050
Partition C /GPU_KC /GPU_KC /GPU_KC /GPU_KC /GPU_KC /GPU_KC /GPU_KC /GPU_KC
10uF x 2pcs(0603)

2
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V under GPU
2

2
VRAM A0 VRAM A0 VRAM A0 VRAM A0 VRAM A0 VRAM A0 VRAM A1 VRAM A1 VRAM A1 VRAM A1 VRAM A1 VRAM A1
1

1
1uF x 6pcs(0402)

1
C77019 C77020 C77021 C77022 C77024 C77025 C77051 C77052 C77053 C77054 C77571 C77569 C77281 C77282 C77283 C77284 C77358 C77359 C77287 C77835
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V Partition D 10uF x 2pcs(0603)
2

2
VRAM A0 VRAM A0 VRAM A0 VRAM A0 VRAM A0 VRAM A0 VRAM A1 VRAM A1 VRAM A1 VRAM A1 VRAM A1 VRAM A1 /GPU_KD /GPU_KD /GPU_KD /GPU_KD /GPU_KD /GPU_KD /GPU_KD /GPU_KD

2
under GPU
1

1
C77026 C77027 C77028 C77029 C77402 C77400 C77570 C77572 C77577 C77575 C77576 C77578
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10uF x 5pcs(0603)
2

1
VRAM A0 VRAM A0 VRAM A0 VRAM A0 VRAM A0 VRAM A0 VRAM A1 VRAM A1 VRAM A1 VRAM A1 VRAM A1 VRAM A1 C77289 C77290 C77291 C77292 C7723 C77296

Close GPU 10UF/6.3V


N/A
10UF/6.3V
N/A
10UF/6.3V
N/A
10UF/6.3V
N/A
10UF/6.3V
N/A
22UF/6.3V
N/A
22uF x 9pcs(0603)

2
1
1

+ CE7704
+ CE7703 330UF/2.5V
330UF/2.5V

2
11020-0073B000
2

1
11020-0073B000 C77297 C77298 C77299 C77300 C77301 C77293 C77294 C77295

Close GPU 22UF/6.3V


N/A
22UF/6.3V
N/A
22UF/6.3V
N/A
22UF/6.3V
N/A
22UF/6.3V
N/A
22UF/6.3V
N/A
22UF/6.3V
N/A
22UF/6.3V
N/A

2
GND
GND

GND

MEM_VPP MEM_VPP

Close to DRAM Close to DRAM


1

1
C77030 C77031 C77479 C77480
1uF x 4pcs(0402) C77062 C77063 C77566 C77567
1uF x 4pcs(0402)
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

2
VRAM A0 VRAM A0 VRAM A0 VRAM A0 VRAM A1 VRAM A1 VRAM A1 VRAM A1

GND GND

Channel B
+FBVDDQ +FBVDDQ

Close to DRAM Close to DRAM


1

1
C7728 C7729 C77083 C77084 C77085 C77086 C7752 C7726 C77115 C77116 C77117 C77118
10UF/6.3V
VRAM B0
10UF/6.3V
VRAM B0
10UF/6.3V
VRAM B0
10UF/6.3V
VRAM B0
10UF/6.3V
VRAM B0
10UF/6.3V
VRAM B0
1uF x 18pcs(0402) 10UF/6.3V
VRAM B1
10UF/6.3V
VRAM B1
10UF/6.3V
VRAM B1
10UF/6.3V
VRAM B1
10UF/6.3V
VRAM B1
10UF/6.3V
VRAM B1
1uF x 18pcs(0402)
2

2
10uF x 4pcs(0603) 10uF x 4pcs(0603)

For power sequence measurement


1

1
C77286 C77288 C77302 C77090 C77091 C77093 C77119 C77120 C77121 C77122 C77123 C77124
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V Around DRAM 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V Around DRAM
VRAM B0 VRAM B0 VRAM B0 VRAM B0 VRAM B0 VRAM B0 VRAM B1 VRAM B1 VRAM B1 VRAM B1 VRAM B1 VRAM B1
2

22uF x 6pcs(0603) 22uF x 6pcs(0603) 1 T7702 @


70,78 GPU_PEX_RST#
GPU_PEX_RST#
10uF x 2pcs(0603) 10uF x 2pcs(0603) 1 T7703 @
70,78 NVVDD_EN
NVVDD_EN
1 T7704 @
70 GC6FBEN_PCH
1

GC6FBEN_PCH
C77081 C77082 C77065 C77066 C77067 C77068 C77097 C77098 C77099 C77100 C77101 C77102 1 T7705 @
22,25,70,78 DGPU_PWROK
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V DGPU_PWROK
2

VRAM B0 VRAM B0 VRAM B0 VRAM B0 VRAM B0 VRAM B0 VRAM B1 VRAM B1 VRAM B1 VRAM B1 VRAM B1 VRAM B1
1

C77069 C77070 C77071 C77072 C77073 C77074 C77103 C77104 C77105 C77106 C77107 C77108
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

VRAM B0 VRAM B0 VRAM B0 VRAM B0 VRAM B0 VRAM B0 VRAM B1 VRAM B1 VRAM B1 VRAM B1 VRAM B1 VRAM B1
1

C77075 C77076 C77077 C77078 C77079 C77080 C77109 C77110 C77111 C77112 C77113 C77114
GDDR6 VPP power +1.8V
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

VRAM B0 VRAM B0 VRAM B0 VRAM B0 VRAM B0 VRAM B0 VRAM B1 VRAM B1 VRAM B1 VRAM B1 VRAM B1 VRAM B1

+1V8_AON MEM_VPP
1

+ CE7705
1

330UF/2.5V + CE7706 SL7701 1 2 @


0805
330UF/2.5V
2

11020-0073B000
2

11020-0073B000

GND
GND

MEM_VPP MEM_VPP

Close to DRAM Close to DRAM


1

C77094 C77095 C7750 C7751


1uF x 4pcs(0402) C77254 C77255 C77619 C77620
1uF x 4pcs(0402)
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

VRAM B0 VRAM B0 VRAM B0 VRAM B0 VRAM B1 VRAM B1 VRAM B1 VRAM B1

GND GND

Channel C
因Layout因素SIZE從0603更改為0402
+FBVDDQ +FBVDDQ

Close to DRAM Close to DRAM


1

C77157 C77550 C77147 C77148 C77149 C77150 C77189 C77747 C77179 C77180 C77181 C77182
10UF/6.3V
10UF/6.3V
VRAM C0
10UF/6.3V
VRAM C0
10UF/6.3V
VRAM C0
10UF/6.3V
VRAM C0
10UF/6.3V
VRAM C0
10UF/6.3V
VRAM C0
1uF x 18pcs(0402) VRAM C1
10UF/6.3V
VRAM C1
10UF/6.3V
VRAM C1
10UF/6.3V
VRAM C1
10UF/6.3V
VRAM C1
10UF/6.3V
VRAM C1
1uF x 18pcs(0402)
2

10uF x 4pcs(0603) 10uF x 4pcs(0603)


1

C77151 C77152 C77153 C77154 C77155 C77156 C77183 C77184 C77185 C77186 C77187 C77188
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V Around DRAM 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V Around DRAM
VRAM C0 VRAM C0 VRAM C0 VRAM C0 VRAM C0 VRAM C0 VRAM C1 VRAM C1 VRAM C1 VRAM C1 VRAM C1 VRAM C1
2

22uF x 6pcs(0603) 22uF x 6pcs(0603)


10uF x 2pcs(0603) 10uF x 2pcs(0603)
1

C77129 C77130 C77131 C77132 C77133 C77134 C77161 C77162 C77163 C77164 C77165 C77166
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

VRAM C0 VRAM C0 VRAM C0 VRAM C0 VRAM C0 VRAM C0 VRAM C1 VRAM C1 VRAM C1 VRAM C1 VRAM C1 VRAM C1
1

C77135 C77136 C77137 C77138 C77139 C77140 C77167 C77168 C77169 C77170 C77171 C77172
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

VRAM C0 VRAM C0 VRAM C0 VRAM C0 VRAM C0 VRAM C0 VRAM C1 VRAM C1 VRAM C1 VRAM C1 VRAM C1 VRAM C1
1

C77141 C77142 C77143 C77144 C77145 C77146 C77173 C77174 C77175 C77176 C77177 C77178
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

VRAM C0 VRAM C0 VRAM C0 VRAM C0 VRAM C0 VRAM C0 VRAM C1 VRAM C1 VRAM C1 VRAM C1 VRAM C1 VRAM C1
1

+ CE7707 + CE7708
330UF/2.5V 330UF/2.5V
2

11020-0073B000 11020-0073B000

GND
GND

MEM_VPP MEM_VPP

Close to DRAM Close to DRAM


1

C77158 C77159 C77672 C77673


1uF x 4pcs(0402) C77190 C77191 C77778 C77779
1uF x 4pcs(0402)
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

VRAM C0 VRAM C0 VRAM C0 VRAM C0 VRAM C1 VRAM C1 VRAM C1 VRAM C1

GND GND

Channel D

+FBVDDQ +FBVDDQ

Close to DRAM Close to DRAM


1

C77221 C77694 C77211 C77212 C77213 C77214 C77253 C77800 C77243 C77244 C77245 C77246
10UF/6.3V 22UF/6.3V
10UF/6.3V
/VRAM D0
10UF/6.3V
/VRAM D0
10UF/6.3V
/VRAM D0
10UF/6.3V
/VRAM D0
10UF/6.3V
/VRAM D0 /VRAM D0
1uF x 18pcs(0402) 10UF/6.3V
/VRAM D1
10UF/6.3V
/VRAM D1
10UF/6.3V
/VRAM D1
10UF/6.3V
/VRAM D1 /VRAM D1
10UF/6.3V
/VRAM D1
1uF x 18pcs(0402)
2

10uF x 4pcs(0603) 10uF x 4pcs(0603)


1

C77215 C77216 C77217 C77218 C77219 C77220 C77247 C77248 C77249 C77250 C77251 C77252
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V Around DRAM 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V Around DRAM
/VRAM D0 /VRAM D0 /VRAM D0 /VRAM D0 /VRAM D0 /VRAM D0 /VRAM D1 /VRAM D1 /VRAM D1 /VRAM D1 /VRAM D1 /VRAM D1
2

22uF x 6pcs(0603) 22uF x 6pcs(0603)


10uF x 2pcs(0603) 10uF x 2pcs(0603)
1

C77193 C77194 C77195 C77196 C77197 C77198 C77225 C77226 C77227 C77228 C77229 C77230
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

/VRAM D0 /VRAM D0 /VRAM D0 /VRAM D0 /VRAM D0 /VRAM D0 /VRAM D1 /VRAM D1 /VRAM D1 /VRAM D1 /VRAM D1 /VRAM D1
1

C77199 C77200 C77201 C77202 C77203 C77204 C77231 C77232 C77233 C77234 C77235 C77236
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

/VRAM D0 /VRAM D0 /VRAM D0 /VRAM D0 /VRAM D0 /VRAM D0 /VRAM D1 /VRAM D1 /VRAM D1 /VRAM D1 /VRAM D1 /VRAM D1
1

C77205 C77206 C77207 C77208 C77209 C77210 C77237 C77238 C77239 C77240 C77241 C77242
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

/VRAM D0 /VRAM D0 /VRAM D0 /VRAM D0 /VRAM D0 /VRAM D0 /VRAM D1 /VRAM D1 /VRAM D1 /VRAM D1 /VRAM D1 /VRAM D1
1

+ CE7709
330UF/2.5V + CE7710
330UF/2.5V
2

11020-0073B000
2

11020-0073B000

GND
GND

MEM_VPP MEM_VPP

Close to DRAM Close to DRAM


1

C77222 C77223 C77725 C77726


1uF x 4pcs(0402) C77654 C77655 C77831 C77832
1uF x 4pcs(0402)
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

/VRAM D0 /VRAM D0 /VRAM D0 /VRAM D0 /VRAM D1 /VRAM D1 /VRAM D1 /VRAM D1

GND GND

Project Name Rev

GX502GX R1.2

Title : VRAM
Size
Dept.: Engineer:
ASUSTeK COMPUTER INC. NB1 EE
Custom
Date: Monday, July 13, 2020 Sheet 77 of 101
<Variant Name>

Project Name Rev

UX482 R0.1

Title : POWER
Size
Dept.: NB1-RD3EE2 Engineer: Andy
Custom
Date: Monday, July 13, 2020 Sheet 85 of 102
+1.2V / +VTT / +2.5V[For Memory]

PR8607 PJP8600 AC_BAT_SYS


620KOhm 3MM_SHORT_PIN
N/A @
1 2 1 2
1 2
P_DDR_VIN_S

1
PCI8601 PCI8603
+VTT 10UF/25V 10UF/25V + PCE8601 H=2.1mm
@ N/A 15UF/25V Chip

2
MLCC 10UF/25V (0805) X6S 10% N/A

2
MLCC 10UF/25V (0805) X6S 10% nbs_c7343d_h79_000s

1
PC8615 PC8601 PC8600
0.1UF/25V 10UF/6.3V 10UF/6.3V GND GND GND
N/A @ N/A

2
PR8630 PD8600 GND

P_DDR_VTTREF_10
0Ohm BAT54ATB +1.2V

P_DDR_VSENS_5
N/A N/A PSL8601
1 2 1 @
27,30,57,58 PM_SUSC#
3 1 2 PQH8602
2 0603
P_DDR_EN_10 NTMFS4C09NBT1G
30 1.2V_ON

1
PC8604 P_DDR_HG_R_30
PR8605 N/A D

3
1
PC8613 2.2UF/6.3V 0Ohm
0.22UF/10V PU8601 GND N/A N/A

2
PR8613 N/A RT8248AGQW GND 1 2 2

5
4
3
2
1
2
1 2 N/A G S

VDDQ
VTTREF
GND1
VTTSNS
VTTGND
GND
150KOHM 23
Imax= 8.66A

1
GND4
22
GND3
21 PR8606 PC8603
P_DDR_BST_R_20
6
GND2
20 1Ohm 0.1UF/25V PL8601 OCP= 15A
FB VTT
PD8601 P_DDR_FB_5 7 19 +VTT N/A N/A 1UH
RB520CM-30T2R P_DDR_LDO_EN_10 8
S3 VLDOIN
18 P_DDR_LDOIN_30 N/A
+1.2V
S5 BOOT
@ P_DDR_EN_10 9 17 P_DDR_BST_20 1 2 1 2 Irat=25A
TON UGATE
P_DDR_TON_10 10 16 P_DDR_HG_30 1 2
58,59 1.2V_PWRGD PGOOD PHASE
P_DDR_LX_30
2 1 10x10x4mm

LGATE
PGND

1
VDD
PR8616 PC8609

VID

CS
0Ohm N/A 1000PF/50V

2
PQL8602 N/A

11
12
13
14
15
4 DDR_PG_CTRL

@
SHORT_PAD
PSP8601

@
SHORT_PAD
PSP8603
2 1 P_DDR_LDO_EN_10 NTMFS4C06NBT1G
GND
1

1
N/A D

1
PC8614 PC8610 + PCE8602

P_DDR_SNB_40
0.1UF/25V @ 22UF/6.3V 470U/2V
2

2 N/A N/A

P_DDR_VDD_30

1
2

2
G S

P_DDR_CS_10

P_DDR_LG_30

1
PR8608 Local Remote
+5VSUS

1
PR8601 PC8608 1Ohm

1
4.7OHM 5% 2200PF/50V @ N/A
N/A

2
2
1 2
PR8604 PR8614
76.8KOhm N/A 56KOhm N/A VFB=0.75V GND GND GND GND GND

1
1
2 1 2 1 PC8602 PR8603
P_DDR_FB_OV_L_10 P_DDR_FB_OV_10 P_DDR_FB_5 4.7UF/6.3V 130KOhm
N/A N/A

2
1
6

PQ8603A PC8622 PQ8603B


3

2 EM6K1-G-T2R N/A 0.1UF/25V N/A GND GND GND


30 EC_OV_DDR
2

5 EM6K1-G-T2R N/A
1

PC8612 PR8609
820PF/50V @ 0Ohm
2 1 N/A
GND GND
PRFB8601 2 1 P_DDR_LOSENS_5
VFB=0.75V 6.2KOhm
N/A

PT860* 請放置 PU8600旁;並請放置Trace 上! P_DDR_FB_5 2 1 P_DDR_VSENS_5 PR8610


0Ohm
1 PT8601 @
P_DDR_HG_30 TPC20T @

1
1 PT8602 PRFB8602 PC8611 2 1 P_DDR_REMOTE_5
P_DDR_LX_30 TPC20T @ 10KOhm 0.1UF/25V
1 PT8603 @ N/A @

2
P_DDR_LG_30 TPC20T

teknisi indonesia
2

GND GND

PJP8604
3MM_SHORT_PIN +3VA_DSW
@

2 1
2 1
P_2.5V_IN_S
1

PC8623 PC8616 PD8603 PR8633


22UF/6.3V 22UF/6.3V BAT54ATB 0Ohm
nbs_c0603_h39_000s nbs_c0603_h39_000s @ @
2

@ N/A 2 1
2 PM_SUSC#
3
1

PR8617 1 1.2V_ON
2.2Ohm
P_2.5V_FB_5

N/A 2 1
2

PC8620 PR8620
PU8602 0.1UF/25V 0Ohm Imax= 1A
RT5768AGQW @ N/A
OCP= 3A
2

N/A PL8602
2.2UH
6
FB EN
5 P_2.5V_RCEN_10 Irat=6.5A
+2.5V
NC PGOOD 2.5V_PWRGD 58
7 4 N/A
SVIN LX3
P_2.5V_SVIN_20 8 3 1 2
PVIN1 LX2
9 2 P_2.5V_LX_S
PVIN2 LX1
1

PC8617 10 1 5x5x3mm
GND1
1UF/25V 11
GND2
N/A 12 PC8621 PSP8604 PC8624 PC8619
1

GND3
2

1
13 100PF/50V SHORT_PAD 10UF/6.3V 10UF/6.3V
N/A @ nbs_c0805_h57_000s nbs_c0805_h57_000s
@ N/A
2

2 1
PR8618
2

FB=0.6V 40.2KOhm
N/A
2 1
P_2.5V_FB_5 P_2.5V_SENSE_5
1

PR8619
12.7KOHM <Core Design>
N/A
Project Name Rev
2

Tiger Lake-H R1.0

Title : PW_+1.2V/+VTT/+2.5V
Size
A2
Dept.: NB Power team Engineer: Power RD
Date: Monday, July 13, 2020 Sheet 86 of 103
Load Switch

Imax = 4.54A
+3VA_DSW PR8801
+3VSUS
1Ohm
Imax = 0.2A N/A
+3VA PR8802
+3VA_EC
1Ohm PSL8804 1 2

1
N/A @ PC8801 PC8803
1 2 0.1UF/25V 1UF/6.3V
1 2 0603
N/A N/A

2
1

1
PC8805 PC8809
0.1UF/25V 0.1UF/25V
N/A @

2
+3VA_DSW
PU8803
UP9030PQSAA
+3VA N/A PU8804

1
5 11 PC8810 UP9030PQSAA
VDD VOUT
P_LS_3VA_EC_VCC_10 +3VA_ECO 10UF/6.3V N/A
N/A 5 11
VDD VOUT

2
1 4 P_LS_3VSUS_VCC_10
VIN ILIM/LPM
P_LS_3VA_EC_ILIM_10
PSL8801 9 8 1 4
POK SS VIN ILIM/LPM
@ P_LS_3VA_EC_SS_10 P_LS_3VSUS_ILIM_10
32 PS_ON 1 2 3 10 9 8
EN IMON POK SS

GND1
GND2
0603 58 P_3VSUS_PWRGD
P_LS_3VA_EC_ON_10 P_LS_3VA_EC_IMON_10 P_3VSUS_PWRGD P_LS_3VSUS_SS_10
PR8805 PD8804 3 10

1
EN IMON

GND1
GND2
1
10KOhm BAT54CTB PR8813 PR8803 PC8811 PR8804 RB751CS40 P_LS_3VSUS_ON_10 P_LS_3VSUS_IMON_10

6
7
N/A N/A 0Ohm 1KOhm 4700pF/50V 0Ohm PD8801

1
1
1 2 1 N/A @ N/A N/A @ PR8809 PC8812 PR8811

6
7
2
30,32 PS_ON_EC 3 1 2 1 2 PR8824 1KOhm 1000PF/50V 0Ohm

2
1 2 2 PS_ON_EC 0Ohm @ N/A @

2
12 PS_ON_PD N/A

2
1

1
PR8819 PR8820 PC8813 1 2
0Ohm 1MOhm 0.01UF/50V 30,84 VSUS_ON

1
N/A N/A @ PR8825 PC8814

2
0Ohm 0.01UF/50V
2

@ @

2
1 2
30,87 3VADSW_ON

uP9030 ILIM/LPM Se�ng 對應表

ILIM PIN LPM (C10) LIMIT Current


GND Off 3A
1M to GND Off 5A
Float/VDD On 8A

PR8840
+5VSUS 1Ohm
Imax =5A nbs_r0603_h24_000s
OCP=8A +5VSUS
N/A
1 2 P_LS_5VS_VCC_10

For MPS Soluction Imax = 0.2A Imax = 4.82A

1
PR8841 PC8818
+3VA_DSW 1Ohm 0.1UF/25V
nbs_r0603_h24_000s +1.8VS N/A +5VS +5VS_PWR

2
+1.8VSUS

1
N/A PC8802 nbs_c0402_h22_000s @
+3VA_DSW PQ8809A
1 2 P_LS_3VS_VCC1_10 10UF/6.3V PU8805 PSL8803
+3VS_PWR PE532DX
1

PC8831 N/A 5 11 1 2
VDD VOUT

2
0805
0.1UF/25V nbs_c0603_h37_000s
N/A +3VS 6 D S 1
PSL8808請放置PQ8804旁
2
1

1
PC8832 nbs_c0402_h22_000s 1 4 PC8825
VIN ILIM/LPM
22UF/6.3V PU8807 PSL8802 @ P_LS_5VS_ILIM_10 1UF/6.3V

1
N/A 5 11 1 2 G 9 8 N/A
VDD VOUT POK SS
2

2
0603
nbs_c0603_h39_000s PC8808 P_LS_5VS_SS_10 nbs_c0603_h37_000s

2
@0.1UF/25V 1 2 3 10
EN IMON

GND1
GND2
2
26,27,30,57,70,96 SUSB_EC#
1

1 4 PC8833 P_LS_5VS_IMON_10
VIN ILIM/LPM
P_LS_3VS_ILIM1_10 1UF/6.3V PR8810 P_LS_5VS_ON_10

1
+12VS

1
9 8 N/A 0Ohm PC8829 UP9030PQSAA PR8814 PC8830 PR8812

6
7
POK SS
2

P_LS_3VS_SS_10 nbs_c0603_h37_000s 0.01UF/25V 1KOhm 1000PF/50V 1MOHM


PQ8809B
1 2 3 10 1 2 @ @ @
EN IMON
GND1
GND2

2
26,27,30,57,70,96 SUSB_EC# P_LS_3VS_ON_10 P_LS_3VS_IMON1_10 PE532DX P_LS_1.8VS_RC_10 2 1 26,27,30,58,70,96 PM_SUSB#

2
1
PR8807 PR8808 PR8815 @
1

1
1

0Ohm PC8804 UP9030PQSAA PR8817 PC8806 PR8816 5 S 3 PC8807 100KOhm 0Ohm


6
7

D
0.01UF/25V 1KOhm 1000PF/50V 1MOHM 0.01UF/50V

2
1 2 @ @ @
2

26,27,30,58,70,96 PM_SUSB# G
2

EE SEQ CHECK
PR8818
4

0Ohm

EE SEQ CHECK
@

PQ8801
+12VSUS EMD62
+12VS_GATE
20mil TR2
20mil
4 3
+12VS_FAN
PR8821 @
+12VS R2 R1

0Ohm 5%

1
nbs_r0603_h24_000s P__C10_EN_10 5 2 PR8822
+12VS 的 Vin 對應 BOM 表 1 2
R1
R2

1MOhm

6 1
TR1

2
+12VSUS PQ8814
+12VS_FAN +12VSUS
EMD62 PD8802
PR8821 N/A @ 20mil TR2
20mil BAT54CTB
4 3 1
26 VCCST_OVRD_LV 3
PR8826 @ N/A R2 R1

2 P__C10_EN_10_R
1

27,57 C10_PWR_GATE#

2
P_LS_12VS_EN_10 5 2 PR8826
PQ8814 @ N/A R1

1MOHM PR8823
R2

1MOhm
6 1
TR1
2

1 2

1
BOM

EE SEQ CHECK
PR8806
26,27,30,57,70,96 SUSB_EC# 0Ohm Project Name Rev
@
FX516 R0.1

Title : PW_LOAD_SWITCH
Size
A2
Dept.: NB1-RD3EE2 Engineer: Matt
Date: Monday, July 13, 2020 Sheet 88 of 102
TGL IMVP9 (3) Power [For CPU]

AC_BAT_SYS
PSL8201 @
1 2
26 VCCINAUX_CORE_VID1 0402
PSL8202 @
1 2
26 VCCINAUX_CORE_VID0 0402

1
PD8201 @ PC8212 PC8206
BAT54CTB 4.7UF/25V 4.7UF/25V PC8205 PCI8201 PCI8202 + PCE8202
1 N/A N/A N/A
0.1UF/25V 10UF/25V 10UF/25V 15UF/25V

2
3 nbs_c0603_h39_000s N/A

2
2 nbs_c0603_h39_000s nbs_c3528_h79_000s
nbs_c0402_h22_000s N/A
nbs_c0805_h57_000s N/A
nbs_c0805_h57_000s
PR8207 H=2.1mm
1 2
58,84 1.8VSUS_PWRGD
PSL8205 @

P_VCCIN_AUX_VID0_R_10

P_VCCIN_AUX_VID1_R_10
0Ohm 1 2
nbs_r0402_h16_000s
0402 廠商建議 GND

1
N/A PC8209
0.1UF/25V

2
@
nbs_c0402_h22_000s

Imax = 27A
AGND GND GND

19
PU8201 P_VCCIN_AUX_BST1_R_30 PL8201
請單點下地

4
3
1
PR8209 PC8210 0.15UH +VCCIN_AUX

VID0

VID1

VIN

PGND3
PGND2
PGND1
PGND4
2.2OHM 0.22UF/25V Irat=45A
+3VA_DSW_PWR nbs_r0402_h16_000s nbs_c0402_h22_000s N/A
PR8208 8 13 1 2 1 2
EN BST1
4.7Ohm 5% P_VCCIN_AUX_EN_10 P_VCCIN_AUX_BST1_30 1 2
N/A 10.5x5.8x4mm
18 12
3V3 SW1

1
1 2 P_VCCIN_AUX_3V3_10 P_VCCIN_AUX_LX1_30 N/A
N/A PCE8203
+
1

1
PC8211 16 11 470UF/2.5V PCO8202 PCO8203 PC8201 PC8202 PC8203 PC8204
VOUT SW2
1UF/6.3V P_VCCIN_AUX_VCCSENSE_R_50OHM P_VCCIN_AUX_LX2_30 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
nbs_c0402_h22_000s N/A
nbs_c0603_h39_000s,nb_c0603_h39
nbs_c0603_h39_000s,nb_c0603_h39
N/A N/A nbs_c0603_h39_000s
N/A nbs_c0603_h39_000s
N/A nbs_c0603_h39_000s
N/A nbs_c0603_h39_000s
N/A
2

3
2

2
N/A 17 10 1 2
RGND BST2
P_VCCIN_AUX_VSSSENSE_R_50OHM P_VCCIN_AUX_BST2_30 1 2

MODE

CLM
PR8204 PC8208

PG
FS
AGND 2.2OHM 0.22UF/25V
@ MP2941GL-Z N/A nbs_r0402_h16_000s N/A
nbs_c0402_h22_000s
請在PIN19單點下地

15

14

9
+VCCIN_AUX PR8206
SHORT_PAD N/A
100Ohm

P_VCCIN_AUX_FS_10

P_VCCIN_AUX_MODE_10

P_VCCIN_AUX_CLM_10
1 2 1 2 P_VCCIN_AUX_BST2_R_30

PSP8201 N/A

P_VCCIN_AUX_VCCSENSE_L_50OHM
@

26 P_VCCIN_AUX_VCCSENSE_50OHM
1 2 +VCCIN_AUX
0402

PSL8203

90.9KOhm

150KOhm

240KOhm
1

PR8201

PR8203

PR8202
PC8207

2
@ 1000PF/50V @ @

1
2

1
@ PC8219 PC8220 PR8210
1 2 22UF/6.3V 22UF/6.3V 1KOhm
26 P_VCCIN_AUX_VSSSENSE_50OHM 0402
nbs_c0603_h39_000s nbs_c0603_h39_000s

2
N/A N/A N/A

2
PSL8204

1
@

@
P_VCCIN_AUX_VSSSENSE_L_50OHM PR8205
SHORT_PAD 100Ohm PSL8209 @

For VRTT Dummy Load


1 2 1 2 1 2
0402 VCCIN_AUX_PWRG 27,58

PSP8202 N/A GND GND GND

Close CPU MLCC

<Variant Name>

Project Name Rev

FX516 R0.1

Title : ICE LAKE IMVP9


Size
Custom
Dept.: NB1-RD3EE2 Engineer: Matt
Date: Monday, July 13, 2020 Sheet 82 of 102
ADP<120W ADP<=230W ADP>230W ADP>330W Main Board
PRS8901 TBD 5m 5m 2m
TBD 10125-0008B100 10108-0006B000 10108-0008B000

ADP=120W ADP=150W ADP=180W ADP=230W ADP=240W ADP=280W ADP=330W


PRS8903
255mOHM @
PRS8903 200m 255m X X 330m X 560m
nbs_r0805_h24_000s 10114-0018B000 10114-00221000 X X 10G2150R3311010 X 10114-00211000
PQ8902 1 2
PQ8901
QM3058M6AC
A/D_DOCK_IN PKCH2BB PRS8901 AC_BAT_SYS
5mOHM

S
S
480mil 1 3 1 2

D
D
3 1 P_CHG_ACMOS_S_20 P_CHG_PATH_19V_SHAPE nbs_r0612_h28_000s
N/A

G
G
N/A

2
2
PJ8900.PJ8901

1
請從PR8921內側中間拉線。

1
PR8920 PC8916 PR8902
4.7MOhm 0.015uF/50V 100KOhm

2
N/A @

2
PC8915 N/A PSP8901 PSP8902

2
1000PF/50V SHORT_PAD SHORT_PAD 240mil

1 2 P_CHG_ACMOS_G_20 @ @
N/A

1
PC8902
0.1UF/25V
90 P_CHG_ACMOS_G_20
P_CHG_ACMOS_G_20
1 2

3
D

nbs_powerpak_3p_001c
QM3058M6AC
PQ8903
PR8918 PR8917 PC8903 N/A PC8901
4.02KOHM 4.02KOHM 0.1UF/25V 0.1UF/25V
N/A N/A 2

2
G S
If you support Slave CHG, please select Green Box and check N/A N/A

2
off-page net name with EE. PR8922
4.02KOHM N/A

1
1 2

P_CHG_BATDRV_G_20
EE提需求S5要能PD充電 PR8941
P_CHG_BATDRV_20
( 判斷ADP有插入⽤ ) N/A
P_CHG_REGN_20 PR8901 PR8903
30 ADAPTER_IN#
2 1 P_CHG_ACOK_L_10 100KOhm 0Ohm
0Ohm N/A 1 2
EE提需求S5要能PD充電 1 2 P_CHG_ACOK_R_10
( 拉AC_IN_OC#⽤ ) PSL8900 N/A N/A AC_BAT_SYS
2 1 1 2
30 MANCHG_AC_IN_OC# 0402
200mil PC8921
N/A

1
@ 0.01UF/25V
PC8904 H=2.1mm
PQ8905A 0.1UF/25V Chip

2
EM6K1-G-T2R @

2
P_CHG_VCC_R_30

1
P_CHG_CMSRC_20
P_CHG_ACDRV_20

1
+ PCE8901

P_CHG_ACOK_10
PR8923

P_CHG_ACN_5
P_CHG_ACP_5
P_CHG_ACOK_L_10 6 1 PCI8901 15UF/25V 10OHM

3
D
A/D_DOCK_IN

nbs_powerpak_3p_001c
NTMFS4C09NBT1G
PQH8901
N/A PR8916 10UF/25V nbs_c7343d_h79_000s
N/A nbs_r0603_h39_000s

2
4.7OHM 1%
MLCC 10UF/25V (0805) X6S 10%
1 2 2 P_CHG_BATSRC_20 1 2 240mil
PR8929 10KOhm P_CHG_ACDET_10 1 2 G S N/A
P_CHG_RSENS_SHAPE

1
PR8904 N/A 2 N/A 1 P_CHG_IADP_10 N/A
127KOhm PD8908 N/A

1
PU8900
KDZVTR30B
1

BQ24800RUYR
1

1
PR8905 PC8905 PC8906 P_CHG_RSENS_SHAPE
AD : 17.8V

7
6
5
4
3
2
1
20KOhm 0.1UF/25V 0.047UF/50V

IADP
ACDET
ACOK
ACDRV
CMSRC
ACP
ACN
BAT

2
N/A N/A PRS8902 PJP8901 BAT_CON
2

1
N/A nbs_c0603_h37_000s 33 PC8914 PL8901 2.2UH 10mOHM 3MM_SHORT_PIN @
2

GND6
32 2.2UF/25V 1 2 1 2
GND5 2 1
31 P_CHG_LX_30 2 1
GND4

2
30 N/A 10x10x4mm nbs_r2512_h37_000s
90 P_CHG_ACDET_10 GND3

1
29 PC8913
GND2

1
8 28 0.047UF/50V PC8924
IDCHG VCC

1
P_CHG_IDCHG_10 9 27 P_CHG_VCC_30 N/A 1000PF/50V + PCE8904 PC8925 PC8926 PC8927 PC8928
PMON PHASE PR8915

2
80 P_IMVP9_PSYS_INFO 10 26 P_CHG_LX_30 15UF/25V 10UF/25V 10UF/25V 10UF/25V 10UF/25V
PROCHOT# HIDRV
P_CHG_PROCHOT#_10 11 25 P_CHG_HG_30 nbs_c7343d_h83_000sN/A N/A N/A N/A

3
SDA BTST D

2
nbs_powerpak_3p_001c
NTMFS4C09NBT1G
PQL8901
P_CHG_SDA_5 12 24 P_CHG_BST_20 2 1 P_CHG_BST_R_20 @
SCL REGN MLCC 10UF/25V (0805)
MLCCX5R
10UF/25V
10% (0805)
MLCCX5R
10UF/25V
10% (0805)
MLCCX5R
10UF/25V
10% (0805) X5R 10%
30 P_IADP_10

2
P_CHG_SCL_5 13 23 P_CHG_REGN_20 1Ohm P_CHG_SNB_40
CMPIN LODRV
1

PC8907 14 22 P_CHG_LG_30 PD8901 2 PSP8904 PSP8903


CMPOUT GND1

1
47PF/50V P_CHG_LG_30
RB520CM-30T2R G S SHORT_PAD SHORT_PAD

1
N/A PC8912 P_CHG_REGN_20 PR8926

1
2

BATPRES#
PR8925 N/A 1Ohm @ @

TB_STAT#
2.2UF/16V

1
2

1
BATSRC
BATDRV
N/A 10KOhm nbs_r0805_h24_000s

1
SRN
SRP
nbs_c0603_h35_000s @

ILIM

2
PSL8901 @

2
1 2

15
16
17
18
19
20
21
30,59,60,90 P_SMB0_DAT 0402 +3VA
PR8913
PSL8902 @ 120KOhm
1 2
30,59,60,90 P_SMB0_CLK 0402 2 1
P_CHG_ILIM_10

P_CHG_BATPRES#_10
P_CHG_TB_STAT#_10
I limit : Charge 6A

P_CHG_BATSRC_20
P_CHG_BATDRV_20

1
90 P_CHG_CMPIN_10 DisCharge 24A

P_CHG_SRN_5

1
P_CHG_SRP_5
PR8914 PC8911
68KOhm 0.1UF/25V
N/A

2
90 P_CHG_CMPOUT_10

2
PC8910

2
0.1UF/25V
PR8912 N/A

1
PSL8903 @ 10OHM
1 2 2 1
30 BAT1_IN_OC# 0402 P_CHG_SRP_L_5
N/A
nbs_r0603_h39_000s

1
PC8909
+3VS PR8910 PR8911 0.1UF/25V
10KOhm 10OHM N/A

2
1 2 2 1
P_CHG_SRN_L_5
N/A N/A
nbs_r0603_h39_000s

1
PC8908
0.1UF/25V
N/A

2
93 P_CHG_SRP_L_5

93 P_CHG_SRN_L_5

HW_Throttle

+5VS_PWR

1 2 PWRLIMIT#_CPU 23
PWRLIMIT#_CPU_L
PR8921
100Ohm

1
PR8928 PR8956
PT890* 請放置 PU8900旁;並請放置Trace 上! AC limit = 100% ADP 150KOhm 150KOhm

Bat limit = byte 7 x 1.7

6
PQ8907A
PT8901 2 EM6K1-G-T2R
1 @ P_PL_AC_THROTTLE_10

1
P_CHG_HG_30

1
TPC20T
PQ8906A PR8974

6
PSL8906 @ EM6K1-G-T2R 1MOhm
PT8902 1 2 2
1 0402
@ P_CHG_PROCHOT#_10 P_CHG_PROCHOT#_R_10

2
P_CHG_LX_30
TPC20T

1
PT8903
@
dGPU_PD# ---> GPIO12(EE page 75 or 78)
P_CHG_LG_30
TPC20T
Plug HW Throttle(Out) dGPU_PD# 78

3
PQ8907B
5 EM6K1-G-T2R

4
+5VS_PWR
PR8933 PC8931
3

100KOhm 0.022UF/25V PQ8905B

Adaptor select 1 2
1 2 P_PLUG_OUT_R_10
5 EM6K1-G-T2R
4

total power = 90% ADP


1

PR8919
1

Adaptor select P_PLUG_OUT_L_10 PR8931


1MOhm
0Ohm
@ POP window
+5VS_PWR
2
2

+3VA
AD : 17.5V
P_DC_JACK_DETEC_U_10

N Series G Series
@ @ Place Close to PU8901

1
PR8952 PR8973

1
100KOhm 1Ohm @ PR8909

2.2UF/6.3V
nbs_r0603_h24_000s PR8908 A/D_DOCK_IN
PRS8901 10m 5m Plug HW Throttle(In) A/D_DOCK_IN 100KOhm
+3VACC +3VACC 10MOhm

2
PC8920
A/D_MAX_POWER_R_10 60 2 1

2
P_COMP_VCC_30
P_COMP_IN-_10

P_DC_JACK_DETEC_R_10
PR8936

EM6K1-G-T2R
14K @ @ @
1

ADP_INSERT_NG# 30
10G212140214030 PR8906 PU8904 PR8975
0.4V 45W 120W
1

PQ8904B
PR8937 PR8935 1.2MOhm TS391CG-AF5-R 1MOHM
100KOhm 100KOhm PD8907 5 1
31.6K VCC IN-

1
N/A 10G212316214030 BAT54CW PQ8904A PQ8906B @
0.8V 150W 150W
2

3
+5VS_PWR
3

EM6K1-G-T2R EM6K1-G-T2R GND 2 PR8954


2

GND
PR8924 56K 2 P_PLUG_OUT_L_10 100KOhm 5
1 2 10G212560214030 60 P_DC_JACK_DETEC_10 3 2 5 4 3 2 1
1.2V 180W 180W

4
OUTPUT IN+
30 AD_MAX_POWER 30 MB_MAX_POWER 1 P_DC_JACK_DETEC_R_10 P_AC_LOSS_PROCHOT_10 2 1 P_COMP_OUT_10 P_COMP_IN+_10
1

4
1

200Ohm 93.1K PC8930


1

1
PD8902 PR8938 PR8936 10G212931214031 @ 0.022UF/25V @ @
1.6V 65W 230W
1

1
1

1
TFZV3.3B 100KOhm 93.1KOHM PC8917 PR8971 @ PC8919 PR8972 PC8918
1% N/A 150K PR8907 0.1UF/25V 1MOhm 0.1UF/25V 45.3KOhm 0.1UF/25V

2
10G212150314031 200KOhm
2.0V NA 280W
2

2
2

2
2

2
Project Name Rev
270K
10G212270314030 200W
2.4V 90W FX516 R1.0

560K
10G212560314030
GND GND GND GND GND GND GND GND GND Title : PW_CHARGER
2.8V 120W 240W
Size
Dept.: NB Power Team Engineer: Matt
A1
Date: Monday, July 13, 2020 Sheet 89 of 103
PEX_VDD [For GPU]

GND

Imax= 4.2A
PU9702
HPA02240RVER PL9702 OCP=8A

14
13
12

10
11
PJP9702 N/A 1UH
+PEX_VDD
AC_BAT_SYS 1MM_SHORT_PIN N/A

PGND5
PGND4
PGND3
PGND2
PGND1
@ Irat=11A
1 2 1 2
1 2 VIN1 SW4
P_PEX_VDD_VIN_S 15 9 P_PEX_VDD_LX_30 PC9710 PR9707
VIN2 SW3
1

1
PCI9703 PCI9704 16 8 0.1UF/25V 0Ohm 5x5x3mm
VIN3 SW2

SHORT_PAD

1
10UF/25V 10UF/25V 17 7 N/A N/A PC9714 PC9707 PC9709 PC9713 PC9715
V5 SW1
@ N/A P_PEX_VDD_5V_10 18 6 1 2 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
GND BST
2

2
MLCC 10UF/25V (0805) X6S 10% 19 5 P_PEX_VDD_BST_30 1 2 @ N/A N/A N/A N/A
TRIP NC

2
20 4

PSP9702
P_PEX_VDD_OC_10
SLEW MODE
P_PEX_VDD_SLEW_10 21 3 PSL9702 P_PEX_VDD_BST_R_30
VSNS LP#

2
GND GND P_PEX_VDD_VSENS_5 22 2 2 1
GSNS PGOOD 0402 PEXVDD_PWRGD 70
23 1 P_PEXVDD_PG_10 GND GND GND GND GND
@

REFIN2

@
REFIN

GND1
GND2
GND3
GND4
GND5
VREF
PC9711

NU
EN
3300PF/50V

1
N/A
1

24
25
26
27
28
29
30
31
32
33
+5VSUS PR9709

P_PEX_VDD_LOSENS_5
4.7OHM 5% GND
N/A

P_PEX_VDD_REFIN_10
P_PEX_VDD_VREF_10

P_PEX_VDD_EN_10
1 2 GND GND
1

PC9706
4.7UF/6.3V
N/A
2

PR9711
10Ohm
GND N/A

+5VSUS PR9703 P_PEX_VDD_VSENS_5 2 1


0Ohm
@ PR9712

1
1 2 PR9705 0Ohm
39KOhm N/A
N/A
1

PS_PEXDVDD_FB_R 70

1
PR9704 PC9708 2 1

2
0Ohm 0.22UF/25V
N/A N/A

2
2
2

PR9706
36KOhm
GND N/A
1

GND GND

PD9703
RB520CM-30T2R
@

2 1

PR9708
0Ohm
N/A

70 PEXVDD_PWR_EN PT840* 請放置 PU8401旁;並請放置Trace 上!


2 1 P_PEX_VDD_EN_10
1

PC9712 PT9701
0.1UF/25V 1 @
@ P_PEX_VDD_LX_30
TPC20T
2

Project Name Rev

Project Name R1.0

Title : *****
Size
Dept.: ASUSTeK COMPUTER INC. Engineer: Power RD
B
Date: Monday, July 13, 2020 Sheet 97 of 103
+NVVDD [For DGPU]
92 P_NVVDD_EN_M_10
1
PSL9114

0402
2
@

GPU_SCL 78,98
請放靠近PU9101
Phase訊號請和周圍線、Via盡量保持30mil
+5VS_PWR

1
PD9101 PR9172 P_NVVDD_CSP1_ISEN+_4 92
GPU_SDA 78,98
RB520CM-30T2R 100KOhm P_NVVDD_CSP1_ISEN+_4

2
@ N/A PR9148 PSP9101

6
1 2 PQ9102A 10Ohm SHORT_PAD PR9115

2
2 EM6K1-G-T2R PR9147 N/A @ 3.24KOhm
PR9153 P_NVVDD_EN_R_10 N/A 4.7KOhm 2 1 N/A

1
1KOhm 1% N/A 1 2

1
1
N/A PQ9102B PR9173 PC9120
5 EM6K1-G-T2R 10KOhm 2 1 1000PF/50V P_NVVDD_LX1_ISEN+_4
70,78 NVVDD_PWR_EN

2
1 2 P_NVVDD_EN_L_10 N/A N/A @ P_NVVDD_VSN_R_5

2
1

1
PC9125 PR9151 PR9118 PC9140

2
0.01UF/25V 0Ohm 5% 3.01KOHM 0.068UF/16V
N/A N/A @ N/A

2
1
2 1 NVVDD_VSSSENSE 71 P_NVVDD_CSNSUM_4 92

Phase訊號請和周圍線、Via盡量保持30mil
P_NVVDD_CSNSUM_4
+1V8_AON PR9154
10KOhm
N/A PC9123 PC9121

2
4700PF/50V 4700PF/50V
1 2 PR9164 @ PR9150 @ P_NVVDD_CSP2_ISEN+_4 92

1
1KOhm 0Ohm 5% P_NVVDD_CSP2_ISEN+_4

2
PSL9110 @ N/A N/A
1 2 2 1 PR9119
78 NVVDD_PSI 0402 P_NVVDD_VSP_L_5 2 1 NVVDD_VCCSENSE 71 3.24KOhm
2

N/A

1
PR9174 PR9108

1
10KOhm 0Ohm 5% PC9105 P_NVVDD_COMP_RC_5
PR9163 PR9149 PSP9102 +NVVDD
N/A @ 33PF/50V 0Ohm 5% 10Ohm SHORT_PAD P_NVVDD_LX2_ISEN+_4

2
@ @ N/A @

2
1

1
1 2 2 1 PR9120 PC9141
1 2 1 2 3.01KOHM 0.068UF/16V

P_NVVDD_COMP_R_10
PSL9112 @ @ N/A

2
1
2 1 PC9122

1
70 NVVDD_PWRGD

1
0402
PR9107 1000PF/50V P_NVVDD_VSP_R_5

Phase訊號請和周圍線、Via盡量保持30mil
PSL9111 @ 0Ohm 5% @ P_NVVDD_CSNSUM_4 P_NVVDD_CSNSUM_4

2
1 2 N/A
78 NVVDD_PWM_VID 0402

2
PR9103
6.19KOhm
N/A P_NVVDD_CSP3_ISEN+_4 92
P_NVVDD_CSP3_ISEN+_4

2
P_NVVDD_REFIN_R_10 2 1
Vboot = 0.8V
R1 PR9121

P_NVVDD_COMP_L_10
P_NVVDD_COMP_R_10 3.24KOhm
2

N/A
1

1
PR9104 PR9105 PC9103 PC9118

1
R3 4.32KOhm R2 20.5KOhm 4700PF/50V 0.015UF/16V
N/A N/A @ N/A P_NVVDD_LX3_ISEN+_4

1
2

2
2

1
PC9117 PR9122 PC9142

2
0.068UF/16V 3.01KOHM 0.068UF/16V

2
P_NVVDD_REFIN_10 @ @ N/A

2
PR9145

1
2.4KOhm
1

P_NVVDD_PWM_VID_10
Phase訊號請和周圍線、Via盡量保持30mil
1

PR9102 PC9101 N/A P_NVVDD_CSNSUM_4 P_NVVDD_CSNSUM_4

P_NVVDD_TSENSE_10
P_NVVDD_PGOOD_10
R4 16.5KOhm 0.01UF/50V

1
P_NVVDD_PSI_10
N/A N/A

P_NVVDD_SDA_5

P_NVVDD_VSN_5
P_NVVDD_VSP_5
P_NVVDD_EN_10
P_NVVDD_SCL_5
2

C
2

P_NVVDD_CSP4_ISEN+_4 92
P_NVVDD_VSN_L_10 P_NVVDD_CSP4_ISEN+_4

2
PU9101 PR9168
1

1
1

PR9101 PC9102 PR9106 UP9027RQGJ 0Ohm 5% PR9123


R5 309Ohm 1% 1UF/6.3V 69.8KOhm N/A 3.24KOhm

45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
N/A N/A N/A LL= 0 mohm N/A
2

1 2
2

GND5
GND4
GND3
GND2
GND1
REFADJ
VID
PGOOD
PSI
EN
SCL
SDA
TSENSE
FBRTN
FB

1
Per Limit=70A PR9146 PC9119 PC9106
0Ohm 5% 0.068UF/16V 0.1UF/25V P_NVVDD_LX4_ISEN+_4

2
P_NVVDD_VSN_5 1 30 N/A @ N/A PR9161
REFIN COMP G_PWR_SRC_NVVDD

1
P_NVVDD_REFIN_10 2 29 P_NVVDD_COMP_10 1 2 1 2 90.9KOhm 1% PR9124 PC9143
VREF EAP
P_NVVDD_VREF_10 3 28 P_NVVDD_EAP_10 1 2 P_NVVDD_EAP_RC_10 P_NVVDD_VSN_5 N/A 3.01KOHM 0.068UF/16V
CH_OC DAC
P_NVVDD_FSW_10 4 27 P_NVVDD_SS_10 @ N/A
PWM8/T_RAMP VINMON

2
PSL9101 5 26 P_NVVDD_VINMON_10 2 1
PWM7/RMP_SLP ADDR/FSW

1
PSL9105 1 2 6 25 P_NVVDD_ADDR_FSW_10

1
92 P_NVVDD_PWM6_10 0402 PWM6/APL4 IMON

Phase訊號請和周圍線、Via盡量保持30mil

1
PSL9106 1 2 P_NVVDD_PWM6_R_10 7 24 P_NVVDD_IOUT_10 PR9144 PC9104 P_NVVDD_CSNSUM_4 P_NVVDD_CSNSUM_4
92 P_NVVDD_PWM5_10 0402 PWM5/APL3 LPC
PSL9107 1 2 @ P_NVVDD_PWM5_R_10 8 23 P_NVVDD_LPC_10 10KOhm 1% 0.1UF/25V
92 P_NVVDD_PWM4_10 0402 PWM4/APL2 VOUT
PSL9108 1 2 @ P_NVVDD_PWM4_R_10 9 22 P_NVVDD_VOUT_4 N/A N/A
92 P_NVVDD_PWM3_10 PWM3/APL1 CSPSUM

2
1 2 0402 10 21
@ P_NVVDD_PWM3_R_10 P_NVVDD_CSPSUM_10

2
92 P_NVVDD_PWM2_10 0402 PWM2/APL_HYS/MID_BUF CSNSUM
@ P_NVVDD_PWM2_R_10 P_NVVDD_CSNSUM_R_10
@ P_NVVDD_CSP5_ISEN+_4 92
PWM1/LL

< HW Strap Function setting >


P_NVVDD_CSP5_ISEN+_4
5VCC
CSP8
CSP7
CSP6
CSP5
CSP4
CSP3
CSP2
CSP1

2
PWM2 : APL_Hys = 14.2A PR9127
127KOhm
+5VS_PWR PR9125
3.24KOhm
PWM3 : VAPL1 = 17.1A ( 1 Phase )
11
12
13
14
15
16
17
18
19
20
1

PR9175 PR9176 PR9155 PR9156 PR9157 N/A N/A

PWM4 : VAPL2 = 33.3A ( 2 Phase ) 56KOhm 78.7KOHM 57.6KOHM 48.7KOhm 48.7KOhm 1 2

1
N/A N/A N/A N/A N/A
PWM5 : VAPL3 = 68.5A ( 4 Phase )

1
PR9142 PC9116 P_NVVDD_LX5_ISEN+_4
P_NVVDD_PWM1_R_10
2

2
29.4KOhm 0.5PF/50V PR9128
P_NVVDD_CSP7_10

P_NVVDD_CSP5_10

P_NVVDD_CSP1_10
P_NVVDD_CSP6_10

P_NVVDD_CSP4_10
P_NVVDD_CSP3_10
P_NVVDD_CSP2_10
P_NVVDD_VCC_30

1
N/A @ 113KOhm 1% Fsw=300kHz(Discrete) PR9131 PC9144

2
N/A Address:0x40 3.01KOHM 0.068UF/16V

2
@ N/A

2
1
Phase訊號請和周圍線、Via盡量保持30mil
Total OC =350A PR9167 +5VS_PWR P_NVVDD_CSNSUM_4 P_NVVDD_CSNSUM_4
PSL9109 84.5KOhm
1 2 N/A
92 P_NVVDD_PWM1_10 0402 1 2
@
P_NVVDD_CSP6_ISEN+_4 92

1
PR9166 P_NVVDD_CSP6_ISEN+_4

2
220KOhm 1% Cold Boot:6Phase
+5VS_PWR PR9152 N/A Warm Boot:5Phase PR9132
2.2Ohm 5% 3.24KOhm

2
N/A N/A
1 2 PSL9113 @

1
1 2
0402
1

PC9124 P_NVVDD_CSNSUM_4 P_NVVDD_LX6_ISEN+_4

2
1
4.7UF/10V PC9113

1
0.1UF/25V PR9133 PC9145
2

N/A 3.01KOHM 0.068UF/16V

2
@ N/A

2
1
PR9110 P_NVVDD_CSNSUM_4 P_NVVDD_CSNSUM_4
49.9KOhm 1%
2 N/A 1
PR9109 P_NVVDD_CSP1_ISEN+_4
49.9KOhm 1%
2 N/A 1

P_NVVDD_CSNSUM_L_10
PR9111 P_NVVDD_CSP2_ISEN+_4
49.9KOhm 1%

1
PR9139 2 N/A 1
15KOhm PR9112 P_NVVDD_CSP3_ISEN+_4
+5VS_PWR PR9126
N/A 49.9KOhm 1%
100KOhm 1% 2 1
N/A
2
PR9113 P_NVVDD_CSP4_ISEN+_4
1

1
1 2
1

PR9171 PC9114 PC9115 PR9140 49.9KOhm 1%


499OHM 3900pF/50V 0.033UF/16V 100KOhm 1% 2 N/A 1
N/A N/A N/A N/A PR9114 P_NVVDD_CSP5_ISEN+_4
2

49.9KOhm 1%
2

2
2 N/A 1
1

PTRL9101 P_NVVDD_CSP6_ISEN+_4
100kOhm
N/A
2

P_NVVDD_CSNSUM_4

PSL9120 @
PSL9121 @1 2
0402
PSL9118 @ PSL9122 @1 2 P_NVVDD_LX1_ISEN+_4
1 2 0402
PSL9119 @ PSL9123 @1 2 P_NVVDD_LX2_ISEN+_4
P_NVVDD_LX6_ISEN+_4 0402 1 2 1 2 0402 P_NVVDD_LX3_ISEN+_4
0402 0402
P_NVVDD_LX5_ISEN+_4 P_NVVDD_LX4_ISEN+_4

<Variant Name>

Project Name Rev

G711GW R1.0

Title : PW_+NVVDD (1)


Size
Dept.: NB Power team Engineer: Neil
A1
Date: Monday, July 13, 2020 Sheet 91 of 103
+NVVDD [For DGPU]

G_PWR_SRC_NVVDD G_PWR_SRC_NVVDD

1
1

1
PCI9211 PCI9201 + PCE9201 + PCE9203 + PCE9204

1
10UF/25V 10UF/25V 15UF/25V 15UF/25V 15UF/25V PCI9216 PCI9210
N/A N/A N/A N/Anbs_c7343d_h79_000s nbs_c7343d_h79_000s
N/A 10UF/25V 10UF/25V
H=2mm

2
N/A N/A
V-Chip

2
PR9201 P_NVVDD_LX1_R_30
1Ohm 1% PR9202

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