A

Major Project Report On

Performance Evaluation of Multilevel Inverter

Submitted in the partial fulfillment of award of the Fourth Year
Bachelor of Engineering in Electrical Engineering
Submitted by

Mr. VIVEK VITTHAL RAJNE

Miss. PUNAM DEVRAM RAMTEKE
Miss. AMISHA LATARI SHENDE
Mr. MAYUR PUNDLIK RAJANHIRE
Miss. DHANSHREE RAVINDRA PIDURKAR

Guided by

Prof. A. R. SAKHARE
Assistant Professor
Department of Electrical Engineering

Department of Electrical Engineering

Government College of Engineering
Ballarpur Road, Chandrapur
2022-2023
 Government College of Engineering
Ballarpur Road, Chandrapur

Certificate
This is to certify that project report entitled “Performance Evaluation of Multilevel Inverter” is
submitted by
Mr. VIVEK VITTHAL RAJNE
Miss. PUNAM DEVRAM RAMTEKE
Miss. AMISHA LATARI SHENDE
Mr. MAYUR PUNDLIK RAJANHIRE
Miss. DHANSHREE RAVINDRA PIDURKAR

Students of Fourth year B.E. Electrical Engineering. They have completed the said work satisfactorily
during the academic session 2022-23. The work is submitted in the partial fulfillment of award of the
degree of Bachelor of Engineering in Electrical Engineering by Gondwana University, Gadchiroli.

(Prof. A. R. Sakhare) (Dr. T.F. MORE)

Guide H.O.D.
Assistant Professor Professor and HoD
Department of Electrical Engineering Department of Electrical Engineering

(Dr. S. G. Akojwar)
Principal Government College of Engineering
Chandrapur Date: /06/2023
 Government College of Engineering
Ballarpur Road, Chandrapur

Vision of the Institute

“To excel in technical education having focus on innovative design, entrepreneurship
development, enhancing employability rate and developing environment friendly society.”

Mission of the Institute

• To educate and train undergraduate and research students for practicing professionalism,
ethical approach, leadership and entrepreneurship ability.
• To nurture conducive environment for learning.
• To develop proficient technocrats catering to the needs of industry, society and environment.
• To enhance rapport with distinguished institutes, industries and alumni for excellence in
education, research, and consultancy.
Vision of the Department of Electrical Engineering
“The department of Electrical engineering will be the center for excellence in education,
training and research that fosters entrepreneurship, employability, environment and societal
development.”
Mission of the Department of Electrical Engineering
“To impart education to undergraduate and research students for development of globally
competent technical manpower for industry, entrepreneurship and sustainable growth of
society”
M 1 To educate and train students in to globally competent Electrical Engineers;
M 2 To provide excellent learning facilities for development of technical manpower through
interaction with industries, R&D centers and academia;
M 3 To provide knowledge base and consultancy services to rural and tribal community around us
for their uplift and well being.
 Government College of Engineering
Ballarpur Road, Chandrapur

Program Outcomes

PO1: Engineering knowledge: Apply the knowledge of mathematics, science, engineering

fundamentals, and an engineering specialization to the solution of complex engineering problems.
PO2: Problem analysis: Identify, formulate, review research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of mathematics,
natural sciences, and engineering sciences.
PO3: Design/development of solutions: Design solutions for complex engineering problems and
design system components or processes that meet the specified needs with appropriate
consideration for the public health and safety, and the cultural, societal, and environmental
considerations. PO4: Conduct investigations of complex problems: Use research-based knowledge
and research methods including design of experiments, analysis and interpretation of data, and
synthesis of the information to provide valid conclusions.
PO5: Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modeling to complex engineering activities with
an understanding of the limitations.
PO6: The engineer and society: Apply reasoning informed by the contextual knowledge to assess
societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to the
professional engineering practice.
PO7: Environment and sustainability: Understand the impact of the professional engineering
solutions in societal and environmental contexts, and demonstrate the knowledge of, and need for
sustainable development.
PO8: Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.
PO9: Individual and team work: Function effectively as an individual, and as a member or leader
in diverse teams, and in multidisciplinary settings.
PO10: Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend and write
effective reports and design documentation, make effective presentations, and give and receive
clear instructions.

Program Educational Objectives (PEOs)

PEO 1: Graduate Engineers to serve Electrical power industry as employee/self employment;

PEO 2: Graduate engineers equipped with fundamental knowledge and global competencies
(PO) to solve industrial/societal problems;
PEO 3: Graduates will exhibit professionalism and humane;
PEO 4: Graduates with ability to engage in research and independent life-long learning to keep the
pace with ever changing technology.
Course Outcome (COs) of Major Project

After completing the course the student shall be able to

1. Perceive the idea and decide the objectives of project from literature survey
2. Formulate the procedure to meet the objectives
3. Implement the idea with effective leadership in prescribed schedule
4. Analyze the results and the ideas for future scope
5. Prepare the effective technical document related to work carried out
 Acknowledgement

Completion of this major project report on “Performance Evaluation Of

Multilevel Inverter” has given immense pleasure and knowledge to us. we avail
this opportunity to express our deep sense of gratitude and whole hearted thanks
to our guide Prof. A. R. SAKHARE for giving his valuable guidance inspiration
and encouragement to embark on this project.

We also acknowledge overwhelming gratitude and immense respect to the HoD

Prof.T.F.MORE for providing all facility needed.

We are thankful to the principal Dr. S. G. AKOJWAR who is a constant source

of inspiration to us. We are also thankful to all the teaching and non-teaching staff
of electrical engineering department who help us directly or indirectly in all phases
of our major project work and thus in completion of this project.

Mr. VIVEK VITTHAL RAJNE

Miss. PUNAM DEVRAM RAMTEKE
Miss. AMISHA LATARI SHENDE
Mr. MAYUR PUNDLIK RAJANHIRE
Miss. DHANSHREE RAVINDRA PIDURKAR

6
 Abstract

Multilevel inverters are increasingly being used in high power medium

voltage applications due to their superior performance compared to two level
inverters, such lower common mode voltage, lower dv/dt, lower harmonics in
output voltage and current and reduced voltage on the power switches. Especially
for use in high power applications, some medium voltage motor drives and utility
applications require medium voltage and megawatt power level.
For medium voltage grid, it is troublesome to connect only one power
semiconductor switch directly. As a result, multilevel power converter structure
has been introduced as an alternative in high power and medium voltage situations.
All the matters are that minimize the Total Harmonics Distortion (THD) in
conventional two level voltage source inverter towards various PWM techniques.
However, this trend invited problems like the increase of switching frequency,
increased switching losses, generating a common mode voltage which becomes
significant at high power levels. Multilevel power converters have gained much
attention in recent years due to the proven mitigation of various problems stated
above.
The general structure of multilevel inverter is such as to synthesize a
sinusoidal voltage from several levels of DC voltage. Increasing the number of
levels produces a fine staircase waveform approaching close to a sinusoidal wave
with minimum harmonics distortion. In this simulation of five level Cascaded H-
bridge inverter is carried out and the performance of this inverter with Sinusoidal
Pulse Width Modulation (SPWM) control scheme. The work mainly focuses on the
improvement in THD of both voltage and current waveforms.

7
 CONTENTS

Sr. No Topic Name Page No.

ACKNOWLEDGEMENT 6
ABSTRACT 7
LIST OF FIGURES 10
LIST OF TABLES 11

CHAPTER-1: INTRODUCTION
1.1 General Introduction 12
1 13
1.2 Problem Statement
1.3 Project Objectives 14
1.4 Literature Review 15

CHAPTER-2: MULTILEVEL POWER

2
CONVERTER TOPOLOGIES
2.1 Multilevel power converter topologies 16
2.2 NPC Inverter 16-18
2.3 Flying Capacitor Multilevel Inverter 19-21
22-23
2.4 Cascaded Multilevel Inverter

CHAPTER-3: MODULATION AND

CONTROL STRATEGIES
3.1 Multilevel power converter strategies24-25
3.2 Selective Harmonic Elimination Pulse 25-26
Width Modulation.
3
3.3 Sinusoidal Pulse Width Modulation 26-28
29
3.4 Third Harmonic Injection PWM
3.5 Space Vector Control 29-31

8
 CHAPTER-4:PERFORMANCE
EVALUATION OF MULTILEVEL
INVERTER
4.1 Simulation Model 32-35
4 36-37
4.2 Simulation Results

CHAPTER-5: ADVANTAGES OF
5 PROPOSED SCHEME 38-39

6 CHAPTER-6: FINAL CONCLUSION

AND FUTURE WORK
6.1 Overview of Work 40-41
6.2 Conclusion
6.3 Future Work

7 REFERENCES

9
LIST OF FIGURES

Figure No. Figure Description Page No.

2.1 Classification of multilevel inverter 16

2.2 one phase of a five level Diode clamped inverter 17

2.3 one phase of a five-level flying capacitor multilevel 20

inverter
2.4 Single phase cascaded multilevel inverter 22

3.1 Classification of pulse width modulation technique 24

3.2 Generalized stepped voltage waveform 26

3.3(a) Sinusoidal pulse width modulation (SPWM) 27

3.3(b) Inverter cell voltages 28

3.3(c) Total voltages of three phase cells in series 28

connection for different phase displacement in the
carriers.
3.4 Modulating wave VmA with third harmonic injection 29
3.5(a) Load voltage space vector generated by an 11-level 30
inverter
3.5(b) Voltages generated by an 11-level inverter with SVC. 30
4.1(a) Simulink block diagram of three phase five level 33
multilevel inverter.
4.1(b) modulating singal generation. 33

4.1(c) Simulink block diagram of control signal 34

generation.

4.1(d) Cascaded five level inverter 35

4.2(a) Three phase sinusoidal modulating signal. 36

4.2(b) Pulse width modulation signal generation 37

4.2(c) Simulation Output voltage 37

10
LIST OF TABLES

Table No. Table Description Page No.

2.2 The switching states of diode clamped multilevel 18
inverter

2.3 The switching states of flying capacitor multilevel 21

inverter

2.4 The switching states for cascaded multilevel inverter 23

11
 Chapter 1
Introduction

1.1 General Introduction

Recent advances high power and high voltage conversion systems have become
very important issues for the power electronic industry handling the large AC drive
and electrical power applications at both the transmission and distribution. A
multilevel converter not only achieves high power ratings, but also enables the use of
renewable energy sources. The concept of multilevel inverter has been introduced
since 1975. The elementary concept of a multilevel inverter is to achieve higher power
by using a series of power semiconductor switches with several lower voltage sources.
The power conversion is performed by synthesizing a staircase voltage waveform.

There are several advantages to this approach when compared with traditional(two-
level) power conversion. The smaller voltage steps lead to the production of higher power
quality waveforms and also reduce the dv/dt stresses on the load and reduce the
electromagnetic (EMC) concerns. Another important feature of multilevel converter is that
the semiconductors are wired in a series connection, which allows operation at higher
voltages. However, the series connection is typically made with clamping diodes, which
eliminates overvoltage concerns. Furthermore, since the switches are not truly series
connected, their switching can be staggered, which reduces the switching frequency and
thus the switching losses.

12
 1.2 Problem Statement
The objective of this project is to design and implement a three-phase five-level multilevel
inverter using the Sinusoidal Pulse Width Modulation (SPWM) method in Simulink. The
multilevel inverter should be capable of generating high-quality sinusoidal output waveforms
with reduced harmonic distortion. The project aims to achieve the following specific goals:
1. System Design: Design a three-phase five-level multilevel inverter topology that consists of
multiple levels of voltage sources, switches, and diodes. Determine the appropriate voltage
levels and the configuration of the power electronic components to achieve the desired
output waveform.
2. SPWM Control Strategy : Develop a control strategy based on the Sinusoidal Pulse Width
Modulation (SPWM) technique. The control strategy should generate the required pulse
width modulation signals for the multilevel inverter switches, ensuring accurate replication
of the desired sinusoidal output waveform.
3. Simulation Setup: Implement the designed multilevel inverter system in Simulink.
Configure the system with the appropriate power electronic components,
control algorithm, and SPWM signals. Simulate the system to verify its performance
and observe the generated output waveform.
4. Performance Evaluation: Analyze the performance of the designed multilevel inverter
system. Evaluate parameters such as output voltage quality, total harmonic distortion
(THD), efficiency, and switching losses. Compare the simulation results with theoretical
expectations and assess the system's performance under different operating conditions.
5. Optimization and Improvement: Identify potential areas for optimization and improvement
in the multilevel inverter system. Explore techniques to reduce THD, enhance efficiency,
mitigate switching losses, or improve the control strategy. Implement the identified
improvements and evaluate their impact on system performance.
6. Experimental Validation (optional): If feasible, implement the designed multilevel inverter
system in a hardware setup to validate its performance. Compare the simulation results
with the experimental results to ensure the accuracy and effectiveness of the designed
system.

13
 1.3 Project Objectives
1. Understanding Multilevel Inverters: Gain a thorough understanding of multilevel inverter
topologies, their advantages, and their applications in power electronics.
2. Study Sinusoidal Pulse Width Modulation (SPWM): Learn about the SPWM technique,
which is commonly used to generate multilevel inverter output waveforms. Understand
the principles behind SPWM and its implementation in generating accurate sinusoidal
waveforms.
3. Simulate a Five-Level Inverter: Use Simulink, a simulation environment in MATLAB, to
design and simulate a three-phase five-level multilevel inverter. Implement the required
power electronic components, such as voltage sources, switches, and diodes, and configure
the system to operate in the desired configuration.
4. SPWM Control Strategy: Develop a SPWM control strategy to generate the required
pulse width modulation signals for the multilevel inverter switches. Implement the control
algorithm in Simulink and validate its effectiveness in producing accurate sinusoidal
output waveforms.
5. Performance Analysis: Analyze the performance of the designed multilevel inverter system
using SPWM. Evaluate parameters such as output voltage quality, total harmonic distortion
(THD), efficiency, and switching losses. Compare the results with theoretical expectations
and evaluate the system's performance under various operating conditions.
6. Experimental Validation: If feasible, implement the designed multilevel inverter system
in a hardware setup to validate its performance. Compare the simulation results with the
experimental results to ensure the accuracy and effectiveness of the designed system.
7. Optimization and Improvements: Identify potential areas for optimization and improvement
in the multilevel inverter system. Explore techniques to reduce THD enhance efficiency,
mitigate switching losses, or improve control strategies. Implement the identified
improvements and evaluate their impact on system performance.

14
 1.4 Literature Review
The results of a patent search show that multilevel inverter circuits have been around
for more than 35 years. An early traceable patent appeared in 1975, in which the cascade
inverter was first defined with a format that connects separately dc-sourced full bridge
cells in series to synthesize a staircase ac output voltage. Through manipulation of the
cascade inverter, with diode blocking the sources, the diode-clamped multilevel inverter
when was derived. Although the cascade inverter was invented earlier, its applications
did not prevail until the mid-1990s. Two major patents were filled to indicate the
superiority of cascade inverters for motor drive and utility applications. Due to great
demand of medium-voltage high-power inverters, the cascade inverter has drawn
tremendous interest ever since. Several patents were found for the use of cascade inverter
in regenerative-type motor drive applications include use in laminators, mills, conveyors,
pumps, fans, blowers, compressors, and so on.

15
 Chapter 2
Multilevel Power Converter Topologies

This chapter focuses on the design, operation and classification of

multilevel inverters and obtaining of multilevel wave forms, which includes some of
recently developed circuit topologies the salient features of all these topologies have
been presented and comparison also been made, application, advantages, feature and
disadvantages are discussed.

2.1 Multilevel power Converter Topologies:

Fig.2.1 classification of multilevel inverter.

2.2 Neutral-point-clamped (NPC) Multilevel Inverter

The neutral point converter proposed by Nabae, Takahashi, and Akagi in 1981 was
essentially a three-level diode clamped inverter. The main concept of this inverter is to
use diodes to limit the power devices voltage stress. The voltage over each capacitor and
each switch is Vdc.
An ‘n’ level inverter needs:

 Number of voltage sources Ndc= (n-1)

16
 Number of switching devices Nsd = 2(n-1)

 Number of clamping diodes Ncd = (n-1) (n-2)

 Number of DC bus capacitors Nc = (n-1)

In a five level diode clamped inverter:

N=5

Therefore:

Ndc = (5-1) = 4

Nsd = 2(5-1) = 8

Ncd = (5-1) (5-2) = 12

Nc = (5-1) = 4

Fig.2.2.One phase of a five level diode clamped inverter

17
To produce a staircase output voltage, let us consider only one leg of the five level inverter,
as shown in Figure. The steps to synthesize the five level voltages are as follows:

 For an output voltage level V0 = Vdc, turn on all upper half switches S1 through S4.

 For an output voltage level V0 = Vdc/2, turn on three upper switches S2 through S4 and
one lower switch S5.

 For an output voltage level V0 = 0, turn on two upper switches S3 & S4 and two lower
switch S5 & S6.

 For an output voltage level V0 = -Vdc/2, turn on one upper switch S4 and three lower
switches S5 through S7.

 For an output voltage level V0 = -Vdc, turn on all lower half switches S5 through S8.

Table 2.1 shows the voltage levels and their corresponding switch states. State condition
1 means the switch is on, and state 0 means the switch is off.

Table 2.2 The switching states of diode clamped multilevel inverter

Advantages:

 Inverter efficiency is high because all devices are switched at the fundamental frequency.

 The control method is simple.

18
Disadvantages:

 Excessive clamped diodes are required when the number of levels is high.

 It is difficult to control the real power flow of the individual converter in multilevel
inverter systems.

2.3 FLYING CAPACITOR MULTILEVEL INVERTER

Maynard and Foch introduced a flying capacitor based inverter in 1992. This inverter
uses capacitors to limit the voltage of the power devices. The configuration of the
flying capacitor multilevel inverter is like a diode clamped multilevel inverter except
that capacitors are used to divide the input DC voltage. The voltage over each capacitor
and each switch is Vdc.

An ‘n’ level inverter needs:

 Number of voltage sources Ndc = (n-1)

 Number of switching devices Nsd = 2(n-1)

 Number of balancing capacitors Nbc = (n-1) (n-2)/2

 Number of DC bus capacitors Nc = (n-1)

In a five level flying capacitor inverter:

N=5

Therefore:

Ndc = (5-1) = 4

Nsd = 2(5-1) = 8

Nbc = (5-1) (5-2)/2 = 6

Nc = (5-1) = 4
19
 Figure 2.3 One phase of a five level flying capacitor multilevel inverter

To produce a staircase output voltage, let us consider only one leg of the five
level inverter, as shown in Figure 2.2. The steps to synthesize the five level voltages
are as follows:

 For an output voltage level V0 = Vdc, turn on all upper half switches S1 through S4.

 For an output voltage level V0 = Vdc/2, turn on three upper switches S1 through S3
and one lower switch S5.

 For an output voltage level V0 = 0, turn on two upper switches S1 & S2 and two lower
switch S5 & S6.

 For an output voltage level V0 = -Vdc/2, turn on one upper switch S1 and three lower
switches S5 through S7.

 For an output voltage level V0 = -Vdc, turn on all lower half switches S5 through S8.

Table 2.3 shows the voltage levels and their corresponding switch states. State condition
1 means the switch is on, and state 0 means the switch is off.
20
 Table 2.3 The switching states of flying capacitor multilevel inverter

Advantages:

 Large amount of storage capacitors can provide capabilities during power outages.

 Both real and reactive power flow can be controlled. Disadvantages:

 Excessive number of storage capacitors are required when the number of levels are high.

 The inverter control is very complicated, and the switching frequency and switching
losses are high for real power transmission.

21
 2.4. CASCADED MULTILEVEL INVERTER

A cascaded multilevel inverter consists of a series of H-bridge (single phase, full bridge)
inverter units. The general function of this multilevel inverter is to synthesize a desired voltage
from several separate DC sources. A single-phase structure of a five level cascaded inverter is
illustrated in Figure 2.4. Each separate DC source is connected to an H-bridge inverter. Each
inverter level can generate three different voltage outputs +Vdc, 0, and –Vdc by connecting the
dc source to the ac output by different combinations of the four switches, S1, S2, S3, and S4. To
obtain +Vdc, switches S1, S2, S5 and S6 are turned on, whereas –Vdc can be obtained by turning
on switches S3, S4, S7 and S8. By turning on S1 and S3 or S2 and S4, ‘0’ output voltage can be
obtained. The AC outputs of each of the different full-bridge inverter levels are connected in series
such that the synthesized voltage waveform is the sum of the inverter outputs. The number of
output phase voltage levels ‘n’ in a cascade inverter is defined by n = 2s+1, where s is the number
of separate dc sources .

Figure 2.4 Single phase cascaded multilevel inverter

Table 2.4shows the voltage levels and their corresponding switch states. State condition
1 means the switch is on, and state 0 means the switch is off.

22
 Table 2.4 The switching states for cascaded multilevel inverter

Advantages:

 The number of possible output voltage levels are more than twice the number of dc
sources (m = 2s + 1).

 The series of H-bridges make for modularized layout and packaging. This will enable
the manufacturing process to be done more quickly and cheaply. 21

 Compared with the diode clamped and flying capacitor inverters, it requires the least
number of components to achieve the same number of voltage levels.

In the research work cascaded multilevel inverters have been used, since they require
less components and have complexity in design. The cascaded multilevel inverter
synthesizes its output, is nearly sinusoidal voltage waveforms by combining many isolated
voltage levels.

23
 Chapter 3
Modulation And Control Strategies

This chapter focuses on various PWM techniques available for multilevel Inverters and
their Implementation. The main objective of this chapter is implementation of Sinusoidal
Pulse Width Modulation for five level cascaded inverter.

3.1 Multilevel power converter strategies

The pulse width modulation inverters make use of different scheme such as classification
of PWM multilevel converter modulation strategies as shown below

Fig.3.1 Classification of Pulse Width Modulation Techniques.

24
 The following are some major concerns when comparing different PWM techniques:

 Good utilization of DC power supply i.e. to deliver a higher output voltage with the
same DC supply
 Good linearity in voltage and or current control.
 Low harmonics contents in the output voltages especially in the low-frequency
region.
 Low switching losses.

The advantage of PWM based switching power converter over linear power amplifier is:

 Easy to implement and control

 No temperature variation and aging-caused drifting or degradation in linearity.
 Compatible with today's digital micro-processors
 Lower power dissipation.

3.2 Selective Harmonic Elimination Pulse Width Modulation (SHE PWM)

Selective harmonic elimination PWM technique is introduced by Patel. The SHE

technique can be applied to three-phase VSIs. In this case, the power valves of each leg
of the inverter are switched so as to eliminate a given number of harmonics and to
control the fundamental phase voltage amplitude. The idea of such a method is that the
basic square-wave
output is "chopped" a number of times, which are obtained by proper off-line calculations.
Fig. 3.2 shows a generalized quarter-wave symmetric stepped voltage waveform synthesized
by a (2m+1)-level inverter,

25
 Fig.3.2 Generalized stepped-voltage waveform.

where m is the number of switching angles. By applying Fourier series analysis, the amplitude of
any odd harmonic of the stepped waveform can be expressed as 3.1, whereas the amplitudes of
all even harmonics are zero.

Where N is no. of switching angles, n odd harmonic order, ak is kth switching angle,
According to fig 3.2 a, to am must satisfy al< a2<.......< am <n/2. To minimize harmonic
distortion and to achieve adjustable amplitude of the fundamental component, up to
M-1 harmonic contents can be removed from the voltage waveform. In general, the
most significant low-frequency harmonics are chosen for elimination by properly
selecting angles among different level inverters, and high-frequency harmonic components
can be readily removed by using additional filter circuits.

3.3 SINUSOIDAL Pulse Width Modulation (SPWM)

The principle of the sinusoidal PWM scheme for the two-level inverter is illustrated in
Fig. 3.3, where VmA, V, and Vmc are the three-phase sinusoidal modulating waves and Vcr
is the triangular carrier wave. The fundamental-frequency component in the inverter output
voltage can be controlled by amplitude modulation index

26
 Figure 3.3(a) Sinusoidal pulse-width modulation (SPWM).

where Vm and Vcr are the peak values of the modulating and carrier waves, respectively.
The amplitude modulation index ma is usually adjusted by varying Vm while keeping Vcr fixed.
The frequency modulation index is defined by

where fm and f are the frequencies of the modulating and carrier waves, respectively.

Several multicarrier techniques have been developed to reduce the distortion in

multilevel inverters, based on the classical SPWM with triangular carriers. Some methods use
carrier disposition and others use phase shifting of multiple carrier signals. Fig. 3.4(a) shows the
typical voltage generated by one cell for the inverter shown in Fig. 3.5 by comparing a sinusoidal
reference with a triangular carrier signal. A number of Nc—cascaded cells in one phase with
their carriers shifted by 0 c =360/Neand using the same control voltage produce a load voltage
with the smallest distortion. The effect of this carrier phase-shifting technique can be clearly
observed in Fig3.3(c) This result has been obtained for the multi-cell inverter in a seven-level
configuration, which uses three series-connected cells in each phase. The smallest distortion is
27
obtained when the carriers are shifted by an angle of 0 c =360/3=120. A very common practice
in industrial applications for the multilevel inverter is the injection of a third harmonic in each
cell, as shown in Fig. 3.3(b), to increase the output voltage. Another advantageous feature of
multilevel SPWM is that the effective switching frequency of the load voltage is times the
switching frequency of each cell, as determined by its carrier signal. This property allows a
reduction in the switching frequency of each cell, thus reducing the switching' losses.

Fig. 3.3(b)Inverter cell voltages. (a) Output voltage and reference with SPWM. (b) Output
voltage and reference with injection of sinusoidal third harmonic.

Fig:3.3(c) Total voltage of three cells in series connection for different phase Displacement
in the carriers.

28
3.4 Third Harmonic Injection PWM

The inverter fundamental voltage VAB can also be increased by adding a third harmonic
component to the three-phase sinusoidal modulating wave without causing over modulation.
This modulation technique is known as third harmonic injection PWM. Figure 3.6 illustrates the
principle of this PWM scheme, where the modulating wave VmA is composed of a fundamental
component Vml and a third harmonic component Vm3, making VmA somewhat flattened on
the top. As a result, the peak fundamental component Vml can be higher than the peak
triangular carrier wave Vcr, which boosts the fundamental voltage vABI. In the meantime the
peak modulating wave VmA can be kept lower than Vcr, avoiding the problems caused by
overmodulation. The maximum amount of VAB1 that can be increased by this scheme is 15.5%
[22, 23].

fig.3.4 Modulating wave VmA with third harmonic injection

3.5 Space Vector Control

A conceptually different control method for multilevel inverters, based on the spacevector
theory, has been introduced . This control strategy, called SVC, works with low switching
frequencies and does not generate the mean value of the desired load voltage in every switching
interval, as is the principle of SVM. Fig. 3.5(a) shows the 311 different space vectors generated
by an 11-level inverter. The reference load voltage vector V,pf is also included in this figure. The
main idea in SVC is to deliver to the, load a voltage vector that minimizes the space error or
distance to the reference vector . The high density of vectors produced by the 11-level inverter
(see Fig. 3.5(a).) will generate only small errors in relation to the reference vector V,~f ; it is,
29
therefore, " unnecessary to use a more complex modulation scheme involving the three vectors
adjacent to the reference.

Fig. 3.5(a). Load voltage space vectors generated by an 11-level inverter.

The shaded hexagon of Fig. 3.5(a) shows the boundary of highest proximity, which means that
when the reference voltage is located in this area, vector V, must be selected, because it has the
greatest proximity to the reference. Fig. 3.5 (b) presents the voltage generated by one cell in an
eleven-level multicell inverter with five cells per phase and an output frequency of 50 Hz. The
load voltage of the inverter for the same frequency and modulation index 0.99 is shown in Fig.
3.5(b).

Fig. 3.5(b) Voltages generated by an 11-level inverter with SVC. (a) One-cell voltage.
(b) Resulting load voltage.
30
 This method is simple and attractive for high number of levels. As the number of levels
decreases, the error in terms of the generated vectors with respect to the reference will be
higher; this will increase the load current ripple.

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 Chapter 4
Performance Evaluation of Multilevel Inverter

4.1 Simulation Model

The whole research has been carried out to find out about the performance of three
phase cascaded multilevel inverter employing PWM techniques. The main focus of this
part is on the simulation model of three phase multilevel inverter with separate DC
source using MATLAB/SIMULINK simulation software by applying PWM techniques.

Matlab /Simulink is software for modeling, simulating, and analyzing. It supports

linear and nonlinear systems, modeled in continuous time, sampled time. For modeling,
Simulink provides a graphical user interface (GUI) for building models as block diagrams,
using click-and-drag mouse operations.

The simulation circuits for multilevel inverters are divided into two main parts
such as
(i) Three phase cascaded multilevel inverter.
(ii) Pulse width modulation techniques.

The Simulink block diagram for three phase multilevel inverter is shown in fig.4.1(a).
The modulating signal generator is used to generate modulating signal. The modulating
signal is given to control block for each phases. The control block generates PWM signal
which is given to five level inverters.

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Fig.4.1(a) Simulink block diagram of three phase five level multilevel inverter.

Fig 4.1(b). modulating singal generation.

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 Fig 4.1(c) Simulink block diagram of control signal generation.

The modulating signal is represented by a simple sine wave block, Figure 4.1(b) shows
the modulating signal system which utilizes three sinusoidal signals of the similar
amplitude and frequency with phase shifted by 120º. While to produce carrier wave,
it utilizes repeating sequence block is shown in Figure 4.1(c). The relational operator
block will produce 1 when the reference signal is greater than carrier signal, 0 when
both signals are equal and -1 when the reference signal less than carrier signal. In this
model, the NOT gate block reverse the signal from the switch block. Figure 4.1(d)
shows the cascaded multilevel inverter block.

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Fig 4.1(d) Cascaded five level inverter

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4.2 Simulation Results

To verify the simulation model, a three phase five level cascaded H-Bridge inverter is
implemented using MATLAB/SIMULINK. The simulation parameters for cascaded
multilevel inverter are as follows:

 Inverter rating = 600VA

 Three-phase load R = 100 Ohms & L = 20 mH
 Voltage level of each source Vdc = 100V
 Fundamental frequency = 50Hz
 Switching frequency = 2 kHz
 Modulation index = 0.9

Figure.4.2(a) show the simulated results of the three phase sinusoidal modulating
signal.

Fig.4.2(a) Three phase sinusoidal modulating signal.

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Fig 4.2(b) Pulse width modulation signal generation

Fig 4.2(c) Simulation Output voltage

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 Chapter 5
Advantages of Proposed Scheme

The proposed scheme of a 5-level Cascaded H-bridge multilevel inverter offers

several advantages compared to traditional inverters.

 Increased Power Quality: Multilevel inverters provide high-quality output voltage

with reduced Total Harmonic Distortion (THD). The 5-level Cascaded H-bridge inverter
achieves this by synthesizing the desired output voltage waveform using multiple DC
voltage sources and carefully switching the power devices. This results in a cleaner
output voltage waveform, which is beneficial for various applications that require high
power quality.

 Higher Voltage Levels: The multilevel inverter topology enables the generation of
higher voltage levels by combining the voltages of individual DC sources. With the
5-level configuration, you can achieve five different voltage levels, including zero,
positive, and negative voltage levels. This capability is advantageous in applications
such as renewable energy systems, electric vehicles, and high-voltage motor drives.

 Reduced Switching Losses: In a multilevel inverter, the voltage across each power
device is lower compared to a traditional two-level inverter. This lower voltage stress
reduces the switching losses and enhances the overall efficiency of the system. By
distributing the voltage across multiple power devices, the proposed 5-level Cascaded
H-bridge inverter can minimize the voltage stress on individual devices, leading to lower
power losses during switching transitions.

 Lower Electromagnetic Interference (EMI): Multilevel inverters can help reduce

electromagnetic interference (EMI) due to their improved waveform quality. The
multilevel topology provides smoother transitions between voltage levels, resulting
in reduced EMI compared to the abrupt switching of traditional inverters. This
advantage is particularly valuable in applications where EMI compliance is crucial,
such as power electronics for sensitive equipment and electromagnetic compatibility
(EMC) requirements.

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 Improved Modulation Techniques: The proposed scheme of a 5-level Cascaded
H-bridge multilevel inverter offers flexibility in choosing modulation techniques.
Different modulation techniques can be employed to control the output voltage
waveform and achieve specific requirements such as optimal harmonic distribution
or specific voltage levels. This versatility enables the inverter to adapt to various load
conditions and optimize performance accordingly.

Overall, the advantages of the proposed 5-level Cascaded H-bridge multilevel inverter
scheme include enhanced power quality, higher voltage levels, reduced switching losses,
lower EMI, and improved modulation techniques. These benefits make it a promising
solution for a wide range of applications requiring efficient and high-quality power
conversion.

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 Chapter 6
Final Conclusion and Future work

In conclusion, the 5-level Cascaded H-bridge multilevel inverter scheme offers

significant advantages such as improved power quality, higher voltage levels, reduced
switching losses, lower electromagnetic interference, and flexibility in modulation
techniques. These advantages make it a promising solution for various applications in
power electronics and renewable energy systems.

There are still opportunities for future work and research in this area. Some potential
directions for further development and investigation include:

 Control Strategies: Developing advanced control strategies for the 5-level Cascaded H-
bridge inverter can improve its performance and efficiency further. Investigating new
modulation techniques, predictive control algorithms, and advanced control algorithms
such as model predictive control (MPC) or artificial intelligence-based control can be
explored to optimize the inverter's operation under different operating conditions and
loads.

 Fault Diagnosis and Protection: Enhancing the fault diagnosis and protection mechanisms
for the inverter is crucial for its reliable operation. Future work can focus on developing
effective fault detection and diagnosis techniques that can identify and mitigate faults
such as short circuits, open circuits, or device failures in real-time. This would improve
the overall system reliability and minimize downtime.

 Integration with Energy Storage Systems: Integrating the 5-level Cascaded H-bridge
inverter with energy storage systems, such as batteries or supercapacitors, can enable
better utilization of renewable energy sources and provide energy management
capabilities. Future research can explore the integration aspects, including control
strategies for seamless interaction between the inverter and energy storage systems,
optimizing energy flow, and improving overall system efficiency.
 Scalability and Multi-Level Extension: While the 5-level Cascaded H-bridge inverter offers
advantages, future work can focus on exploring the scalability of the scheme to higher
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 voltage levels or extending it to multilevel configurations with more levels. Investigating
the design, control, and operational aspects of larger-scale multilevel inverters can open
new possibilities for high-power applications.

 Cost and Component Optimization: Another area for future work is the optimization of
the inverter's cost and component selection. Research efforts can focus on finding cost-
effective solutions for the various components, such as power devices, capacitors, and
control circuitry, without compromising performance or reliability. This can make the
inverter more commercially viable and accessible for a broader range of applications.

By addressing these areas of future work, researchers and engineers can further
enhance the capabilities and performance of the 5-level Cascaded H-bridge multilevel
inverter, making it even more attractive for various power electronics applications and
accelerating the adoption of renewable energy systems.

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