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Proceedings of 2015 3rd International Conference on Advances in Electrical Engineering

17-19 December, 2015, Dhaka, Bangladesh

Design of a Single Chip Digital Weighing Machine


Using ATmega32 Microcontroller Architecture
Golam Mostafa
Department of Electrical and Electronic Engineering, Ahsanullah University of Science and Technology
141-142 Love Road, Tejgaon Industrial Area, Dhaka-1208, Bangladesh, Email: krdcbdgm@yahoo.com

Abstract – Now-a-days, the sales centres are using Digital The Control Program (CP) allows the user entering the rate
Weighing Machines (DWM) for precision measurement of digit-by-digit in the ‘Right Entry Left Shift’ type display unit
weight, acquisition of rate from keypad and computation of cost. of the ‘Rate Field (Fig. 2)’. A digit always appears at the
The weight, rate and cost are shown on 7-segment bright display right-most position of the display. At each entry of the digits
devices. The implementation of a DWM can be carried out using
of the rate, the CP takes the ‘reading of rate field’ as a current
various types of hardware topologies and accordingly the cost
varies. The FPGA based DWM is the most competitive one; but, rate, receives weight from the interrupt subroutine (Fig. 6),
the technology is beyond affordability of the small business computes cost and then shows them on the display unit. The
houses due to very high initial capital investment for the design weight of the goods is sampled at every 2-sec interval after
and fabrication of the FPGA chip. It is possible to realize a being interrupted by the ‘Timer-1 Overflow Flag’.
DWM of moderate cost using an ATmega32 microcontroller, The display is of multiplexed type (Fig. 2) and hence the
which provides almost a single chip design particularly owing to MCU must refresh it once a while. This has been achieved by
its high-power (20mA) 32-IO lines, which can directly drive 7- careful design of the CP, which periodically refreshes the
segment display devices, ADC, and Keypad. In this paper, we display (Fig. 6) during its looping in the processing chain.
have presented the design methodology of an ATmega32 based
DWM, which has been prototyped and tested using RMCKIT.
III. THINGS TO BE DESIGINED AND DEVELOPED
Keywords – DWM, ATmega32, FPGA, microcontroller, load Besides from the mechanical fixtures (Fig. 8) of the DWM,
cell, HX710B serial ADC. the design involves the development and implementation of
the following hardware and software tasks:
I. INTRODUCTION
• Calibration of the input device against two known weights
With the advent of low-cost microcontrollers, high says 1Kg, 1.5Kg so that the machine measures the
resolution serial ADC [1] and precision load cell [2], the unknown weight correctly.
mechanical weighing scales are being replaced very rapidly • Acquire rate of the goods interactively from a Keypad.
by electronic digital weighing machines (DWM). A scale just • Compute cost and display it on 7-segment display unit
measures the weight of the goods; but, a machine measures along with rate and weight.
weight, accepts rate from keypad, and computes the cost.
• Generation of 2-sec Time Tick to acquire weight at every
There are many brands of DWM in the market, which have
2-sec interval and then computing the cost based on the
been designed using FPGAs. The user manual just covers the
entered rate.
operational procedures of the DWM; there is no information
• Discrete components based Keypad and associated
on the technical design aspects. Little information are
electronics (Fig. 2) [5].
available in the literatures except [3, 4], which have
discussed designs using 89S52 and 8086 architectures with • 16-digit direct driven multiplexed display unit using CC-
academic interest only. This paper has presented a practically type 7-segmentd display devices.
realizable design methodology of a DWM using ATmega32 • Interfacing of the Load cell and 24-bit serial ADC; these
microcontroller (MCU) with a view to cover both the have been borrowed from a commercial DWM (Fig. 7, 8).
academic and practical interests. Fig. 1 depicts the
hypothetical pictorial view of an ATmega32 based DWM. IV. REQUIREMENTS OF DEVELOPMENT TOOLS
The following tools/resources would be required to design
and develop various hardware modules and software routines
of the ATmega32 based DWM.
• IBMPC with WINXP Operating System: It offers a
W e ig h t ( k g ) R a te ( T k /k g ) K eypad 645a platform for developing software and downloading binary
2 3 5 9 2 3 4 7 5 7 8 9 codes into the flash of the target MCU.
4 5 6
D W M -3 0
T o t a l C o s t (T k ) 1 2 3
• AVR Studio 4: Assembler for creating source codes,
K A R IG H A R 5 5 3 7 8 0 ZER RST binary codes for the ATmega architecture.
• RMCKIT [6]: Trainer/Write Kit for Atmega32. It comes
Fig. 1 Hypothetical pictorial view of the Digital Weighing Machine with a SCC (Serial Communication Controller), target
MCU, edge connectors and breadboards. The SCC
II. BRIEF FUNCTIONAL DESCRIPTION receives binary code from the IBMPC and fuses them into
At power up and without any load on the pane, the Rate the flash of the target MCU. The edge connectors and
Field shows 0.00, Weight Field shows 0.000 and Cost Field breadboards provide the facilities for circuit prototyping.
shows 0.00. In case, the weight field shows any idle weight, • TOP2005: A commercial ROM programmer to configure
the user may press the ZERO button to nullify it and bring the the internal Fuse Bits of the ATmega32 microcontroller.
weight field showing 0.000.

978-1-4673-9695-0/15/$31.00 ©2015 IEEE 93


Proceedings of 2015 3rd International Conference on Advances in Electrical Engineering
17-19 December, 2015, Dhaka, Bangladesh

V. HARDWARE/SCHEMATIC DIAGRAM OF THE DIGITAL WEIGHING MACHINE


Cost (Tk) Rate (Tk/kg) Weight (kg)
U1: ATmega32 DP0 DP1 DP2 DP3 DP4 DP5 DP6 DP7 DP8 DP9 DP10 DP11 DP12 DP13 DP14 DP15
PB7, -----, PB0
8, ---------, 1
0V 11
DGND PBR
8 2 4 8 4. 0 7 1 6 0. 7 5 1 5. 4 5 3
+5V 10
Vcc p, g, f, e, d, c, b, a
5, 10, 9, 1, 2, 4, 6, 7
cc0 cc1 cc2 cc3 cc4 cc5 cc6 cc7 cc8 cc9 cc10 cc11 cc12 cc13 cc14 cc15
R5
4k7 PC7, -------, PC0
PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7
29, ----------, 22
9 8
RST/ PCR
C5
100uF PD7, ---, PD0
RST

21, -----, 14 8
PDR
Load Cell (0-30kg)
0V 31
AGND
U2
VREF
1
+5V
LC (0 – 10mV) +5V
NC 32 HX710B 8
AVREF (24-Bit) AVDD 0.1uF Q2
NC 30 7 R4 1k
AVcc DVDD EX+ 327 R3
2x100 ohm AGND 2 EX- 1k Q1
33 6 DO INP 4
PA7 OUT+ 327
34 5 SCK INN 3
PA6 OUT-
NC 12
XT2 2x90 ohm R1
NC 13 XT1 PA5(RDY)
35
0V
36 2x47pF 0.1uF 1k
PA4 (Reset)

0V RN1 : 8x1k R2
13
1k
CLR/ 12
1 MHz

14
D2 GS 0V Keypad
C6 +5V 16 Vcc
10uF 6 7 5 4
R6 EI D7
F3 7 8 9 F1
Q2 33k D6 3 F2
330mS

2 5 F1
D5 4 5 6 F2
9
Q2 CK2
11 12
Q2/ 2A
9 15
EO D4 1 4 ZERO
37 13 3 9
Scan Code

PA3 0V 8 GND D3 1 2 3 F3
PA2
38 U5:74LS74 U4: 74LS123 6 Q2 D2
12 2 8
39 7 11 1 7
PA1 Q1 D1 0 ZERO RST RST
PA0
40 9
Q0 D0
10 0 6

atmegadwmkbd U3: 4532

Fig. 2 Hardware/Schematic diagram of the ATmega32 based Digital Weighing Machine

A. Calibration of Input Device Validity check of Eqn. (1):


The input device is composed of (i) the pane that holds the 108*W = 03CAH*040CD8H-066851E0H (for 1.5Kg)
goods (Fig. 8), (ii) the holding frame that supports the pane ⇒108*W = F58AA70H – 066851E0H
(Fig. 8), (iii) the load cell, (iv) the wiring between the load ⇒108*W = 8F05890H = 149969040=1.49969040Kg
cell and the ADC, and (iv) the ADC. The calibration tasks ⇒W = 1.500 Kg (after rounding)
finds the gain and offset against known weights W1 (say,
1Kg) and W2 (say, 1.5Kg) and then deriving equation (1) for B. Weight Acquisition
the unknown weight (W) in terms of the ADC output. Now, we may chalk out the following algorithm to
Calibration transforms a ‘real system’ into an ‘ideal system’ evaluate the Eqn. (1) and display the weight on DP11-DP15
by imposing gain and offset on the real response (Fig. 3). positions of the 7-segment display unit.
ADC Count ADC Count 645x L1-L1A: Initialize Stack Top by instructions
Idel Response Real Response Initialize the rest as needed: rcall INIT
L1B: Refresh multiplexed display: rcall CCX7SD
P(W , C) B(1.5kg, 040CD 8H) L1C: if (2-sec interrupt has not occurred)
P(W , C ) B(W 2, C2)
= B(W 2, C 2) Goto L1B
offset
A(1kg, 034383H) L1D: Acquire weight, save BINWT and show BCDWT at:
A(W 1, C1)
=A (W 1, C1) DP11-DP15 positions of display in the format with
gain
45

weight W eight (kg)


rounding xx.xxx : rcall ACQWT
L1E: Acquire next sample : rjmp L1B
0,0 0,0
ACQWT: ; at every 2-sec Time Interval on Interrupt Request
Fig. 3 Ideal and Real Responses of a System
acqwt
Load Cell
ADC <r18 r17 r16>
The counts for points A(1Kg, 034383H) and B(1.5Kg, 0-30Kg
MULT <r7 r6 r5 r4>
040CD8H) are the averages of 10 readings each sampled in 03CAh
2-sec interval. The equation for W based on Fig. 3 is:
W 2 −W1 W 2 −W
C 2 − C1
=
C2 − C
066851E0h - (10*E+8 )BINWT = <r7 r6 r5 r4> BIN2BCD

1 .5 − 1 1 .5 − W
⇒ =
040 CD 8 H − 034383 H 040 CD 8 H − C (10*E+8)BCDWT = <B8 B7 B6 B5 B4> ROUNDING
<B8 B7 B6>
=BCDWT
0 . 5 * ( 040 CD 8 H − C )
⇒ 1W = 1 . 5 −
C 955 H
0 . 5 * ( 265432 − C ) BCD2CC
<82 83 84 85 86 87>
SHIFING
<83 84 85 86 87>
⇒ W = 1 .5 − = BCWT =BCDWT
51541
⇒ 1 . 5 − 2 . 5750 + 9 . 701015 * 10 − 6 * C DP11 DP15
<A7 A8 A9>
⇒ W = 9 . 701015 * 10 − 6 * C − 1 . 075 = 970 * 10 − 8 * C − 1 . 075 BCD2BIN
=BINWT 1 4. 7 5 8 CCX7SD

⇒ W * 10 8
= 970 * C − 1 . 075 * 10 8

Fig. 4 Data structure for weight acquisition, calibration and display


⇒ W * 10 8 = 03 CAH * C − 066851 E 0 H .......... .......... ....( 1)

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Proceedings of 2015 3rd International Conference on Advances in Electrical Engineering
17-19 December, 2015, Dhaka, Bangladesh

L29: Compute BCDRATE from the CC-code data of rate field


C. Keyboard Hardware by consulting LUT3
The schematic of the keypad of the DWM has been L30: Convert BCDRATE to BINRATE
borrowed from the literatures of MIDAS Engineering Co. of LUT2 : Location Vs CC-code
S. Korea [5]. The interfacing of the keypad and its acquisition Location Content Digit to Print
(CC code)
software are the sole works of the author of this paper. The Adr Base Scan Code
working principle of the keypad: PA3 PA2 PA1 PA0
90 90 0 0 0 0 3F 0
• When a key is pressed down, its 4-bit code called ‘Scan 91 90 0 0 0 1 06 1
Code’ goes to the MCU via PA3-PA0 port pins. 92 90 0 0 1 0 5B 2
93 90 0 0 1 1 4F 3
• The lower 3-bit of the scan codes comes from the output 94 90 0 1 0 0 66 4
(Q2-Q0) of the Priority Encoder, U3. The upper 1-bit of 95 90 0 1 0 1 6D 5
the scan codes comes from the emitter point of transistor, 98 90 1 0 0 0 7D 6
99 90 1 0 0 1 07 7
Q1. For example: Scan code for key 3 is 0011, for key 4 9A 90 1 0 1 0 7F 8
0100 and the like for other keys. 9B 90 1 0 1 1 6F 9
• The de-bouncing of a pressed down key comes from the
LUT3 : Location Vs Unpacked Digit of Form 0X (X = 0 to 9)
≈330mS delay of the oneshot, U4. Location Content Digit
• The availability of the jitter free 4-scan codes is announced Adr Base CC-code of Digit of Rate Field
(Unpacked BCD)
by LH-state of the Q2 of U5 latch, which is connected with 013F 0100 3F 00 0
PA5-pin of the MCU. After reading of the scan code, the 0106 0100 06 01 1
015B 0100 5B 02 2
user resets the keypad by clearing the U5 latch using the 014F 0100 4F 03 3
PA4-pin of the MCU. 0166 0100 66 04 4
016D 0100 6D 05 5
017D 0100 7D 06 6
D. Right-Entry Left-Shift Display Unit for Rate Field 0107 0100 07 07 7
017F 0100 7F 08 8
R a te ( T k /k g )
7 8 9 F1 016F 0100 6F 09 9
D P 6 D P 7 D P 8 DP9 DP10

4 5 6 F2
PBR 1 6 0. 7 5 VI. CONTROL PROGRAM FLOW CHART
1 2 3 F3
cc6 cc7 cc8 cc9 cc10 Mainline Program Interrupt Subroutine
kbd PC6 PC7 PD0 PD1 PD2
0 ZERO R ST RST START: nop ISRT1OV:

L1:
Fig. 5 Right Entry Left Shift Display Unit for Rate Field and the Keypad
Initialize
Everything as needed
In a right-entry left-shift display unit, the digit entered L2:
from the keypad always appears at the right-most position of CCX7SD
N
Refresh Display ADC Rdy
the display. Before the digit is displayed, the digits at the left ?
Y
are shifted to the left by one position with the provision of ISL1:
N
suppressing the leading zeros and keeping the blanks. Scan Code Rdy Read 24-bit from ADC
?
Initially, ‘Rate Field’ shows 0.00. Now, let us enter a rate L3:
Y
ISL2:
of Tk 160.75. We press the digit ‘1’ on the keypad and it Left shift digits of RateFld Compute
appears at the right-most (DP10) position of the display. The Show Digit on display BINWT

rate field display shows 0.01. Next, we press ‘6’; the display L4: ISL3:

CCX7SD BCD2CC BIN2BCD


Compute BCDRATE BNWT to
shows 0.16. Next we press ‘0’; the display shows 1.60. Next Form display Readings BCDWT
we press ‘7’; the display shows 16.07. Next we press ‘5’; the L5: ISL4:
BCD2BIN

display shows 160.75. BCDRATE to BCDWT to


After each entry of the digits of the rate, the Control BINRATE CCWT
L6: ISL5:
Program takes the reading of the ‘Rate Field’ as the ‘Current
MULT

BINCOST=
Rate’ and multiplies it with the ‘Weight’ and then displays BINRATE*BINWT CCWT to display

the ‘Cost’. Thus, as the digits 1, 6, 0, 7 and 5 are entered one L7: ISL6:
BCD2CC BIN2BCD

after another, we see the following figures on the ‘Rate Field’ BINCOST to
Return from ISR
BCDCOST
and ‘Cost Field’. Assume that the weight is 15.453 Kg.
L8:
Digit Entered Current Rate Weight Cost Displayed BCDCOST to
0.00 (initial) 0.00 15.453 0.00 CCCOST
1 0.01 15.453 0.15
6 0.16 15.453 2.47 cpflow
0 1.60 15.453 24.72
Fig. 6 Flow Chart for the Control Program of DWM (MLP and ISR)
7 16.07 15.453 248.33
5 160.75 15.453 2484.07
In the Mainline Program (MLP), the MCU regularly, at 2-
sec time interval, computes and displays the product cost by
E. Control Structures to Acquire Rate
L21: Initialize everything as needed taking rate from the Keypad and the weight from the interrupt
L22:
L23:
Clear U5 (Fig. 2) and then Enable U5
Refresh display : rcall CCX7SD
subroutine.
L24: if (PA5 !=LH) Timer-1 of ATmega32 has been configured to generate 2-
Goto L22
L25: Read Scan code from PA3-PA0 sec Time Tick interrupt. On interrupt, the MCU goes to
L26: Use Scan code as ‘Key’ and consult LUT2 to collect ISRT1OV (Interrupt Subroutine due Timer-1 Overflow),
CC-code for the digit entered from Keypad
L27: Shift digits of Rate Field to left by one position acquires weight, computes BINWT, and saves it into data
L28: Display the digit at DP10 position
structure (Fig. 4) as an input variable to be used by the MLP.

95
Proceedings of 2015 3rd International Conference on Advances in Electrical Engineering
17-19 December, 2015, Dhaka, Bangladesh

VII. DEVELOPMENT METHODOLOGY

C o s t F ie ld R a t e F ie ld

A Tm ega32
B ased W e ig h t F ie ld
RM CKT

2 4 - B it A D C

acqw t

Fig. 7 RMCKIT – ATmega32 Based Trainer/Writer Kit Fig. 8 ‘Pane Holding Frame’, ‘Load Cell’ and ‘Pane with Load’

To develop the hardware circuits and the software routines The RMCKIT (Fig. 7) provides an excellent platform to
of the DWM, we shall follow ‘Small Start Strategy (SSS)’ develop the DWM. We can build the hardware on the
approach. In SSS methodology, a basic circuit and its breadboards as per Fig. 2, write the codes for the
associated software are tested and then another incremental routines/subroutines using ASM/C in the IBMPC as per Fig.
amount is added with the previous one. This process keeps 4-6, create binary codes for the programs, and then transfer
going on until the whole system comes into picture. the program codes into the flash of the MCU for execution.
A. Data Structure-I
C o s t F ie ld R a te F ie ld W e ig h t F ie ld C C 7SD D
DP0 DP1 DP2 DP3 DP4 DP5 DP6 DP7 DP8 DP9 D P10 D P11 D P12 D P13 D P14 D P15 U n it
M u ltip le x e d ccF
cc0 cc1 ccE
C C -c o d e
D P10
PC0/ PC 1/ CCX7SDD PD 6/ P D 7/
DPE
PB DP0 DP1
D P 0 -D P F D P 0 -D P F DPF

D P 0 -D P F

C C -C o d e
DP0 DP1 DP2 DP3 DP4 DP5 DP6 DP7 DP8 DP9 DPA DPB DPC DPD DPE DPF
T a b le
C C -C o d e d C o s t F ie ld C C -c o d e d R a t e F ie ld C C -c o d e d W e ig h t F ie ld
(C C C T )
In te r n a l R A M 78 79 7A 7B 7C 7D 7E 7F 80 81 82 83 84 85 86 87
In te r n a l R A M
C C -C o d e
LUT
D ig it 60 C C -0
H EX2C C Vs
C C code 6F C C -F

D P0D P1 D P2D P3 D P4D P5 D P6D P7 D P8D P9 DPA DPB DPC DPD DPEDPF H e x T a b le
In p u t (H E X T )
B C D C o s t F ie ld B C D R a te F ie ld B C D W T F ie ld

In te r n a l R A M 70H 71H 72H 73H 74H 75H 76H 77H 52xz : 20112014

Fig. 9 Data Structure-I for the ATmega32 Based Digital Weighing Machine

B. Data Structure-II Where: IPBCD stands for Initial Partial BCD and is 00.
Register File Structure Data RAM Structure Control Structure for Computation:
Register File (32 Data RAM IO Register (64) IO Register (64) for (x=39 to 0)
Symbolic Names Address Symbolic Names Data RAM Address {
(Port Address) Valid with lds/sts
R0
R1
$0000
$0001 Valid with in/out Ins Ins IPBCD * 2+bx → IPBCD (incorrect BCD)
TWBR ($0000) $0020 Perform BCD adjustment on the incorrect BCD
}
-----

-----

SREG ($003F) $005F VIII. CONCLUSIONS


User Data RAM
$0060 LUT1
Digit Vs
This project has produced realistic results, which will work
System RAM

$006F CCcode as a reference to learn the methodology of system design and


R26 X
$0090 LUT2 the programming of ATmega32 and HX710B. Use of a single
Scode Vs
R27 Pointer $0099 CCcode ATmega32 MCU for simultaneous handling of the display
R28 Y
R29 Pointer $0800 unit, load cell, and Keypad is a remarkable achievement.
R30 Z $000E
Stack
R31 Pointer $000F Top of Stack $085F Filled Up
REFERNECES
Fig. 10 Data Structure-II of Digital Weighing Machine [1] www.aviaic.com for the data sheets of HX710B serial ADC.
[2] www.nbeastbright for the details of Load Cell.
C. Binary to BCD Conversion Algorithm using Horner Rule [3] Mostafa, Golam, “Development of a Digital Weighing Machine Using
89S52 Microcontroller Architecture”, NCICT 2013, CUET,
BIN = b39b38b37,……………,b2b1b0 [4] Mostafa, Golam, “8086 Microprocessor Interfacing and System
BCD = b39x239+b38x238+b37x237+..…+b2x22+b1x21+b0x20 Design’, 1st Edition, 2009, pp407-434.
…………………………………………………………… [5] Midas Engineering Co. of South Korea, www.midas.com.
BCD=(((….(IPBCDx2+b39)+ b38)2+……+b2)2+b1)2+b0 [6] krdcbdgm@yahoo.com for the details of RMCKIT.

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