U. ROLL No.

CLASS TEST-I, SESSION 2023- 2024 (ODD SEM.)

COURSE- MCA DEPTT.- MCA
YEAR: - 1st(1 SEM)
SUBJECT NAME:- COMPUTER ORGANIZATION AND ARCHITECTURE (KCA-105) SET-A
TIME: 2.00 Hour MAX MARKS: 30
Note: Answer all questions. Draw neat sketch, wherever necessary. Suitably assume missing data, if any.

SECTION A
Question 1: Attempt all parts in brief. [1X5=5]

a. Why do we need Bus Arbitration? 1 [CO1], K2

b. Explain the concept of 3-state Buffer. 1 [CO1], K3

c. What is an Array Multiplier? 1 [CO2], K2

d. Write down the read and write micro-operations required for Memory transfer 1 [CO1], K3

e. Write down the 2’s complement of 110010101. 1 [CO2], K4

SECTION B
Question 2: Attempt any 05 out of the following. [3X5=15]
a. Draw the diagram that represents 4 bit-by 3-bit array Multiplier. 3 [CO2],K4
Show the block diagram and timing diagram that implements following Register transfer
b. statement. 3
P: R2 <---- R1 [CO1],K3
Convert following arithmetic expression from infix to reverse polish notation-
c. 3
A+ (B*C+ (D / E ^ F) *G) *H)
[CO1],K3
d. Explain Polling or Rotating priority Bus Arbitration with suitable diagram. 3 [CO1],K2
Define-System Bus. What are the different types of buses used in computer
e. architecture? 3
[CO1],K2
f. Explain the functional units of Computer system and their interconnection. 3 [CO1],K2
Draw the block diagram that represents the hardware implementation of Signed
g. 3
Operand Multiplication. [CO2],K2

SECTION C
Question 3: Attempt any 02 out of the following. [5X2=10]

Explain how Common bus is created using Multiplexor for transferring data between
a. 5 [CO1],K3
registers.

1
 b. Show the systematic multiplication of (12) X (-9) using Booths Algorithm. 5 [CO2],K4
c. What is Register? Explain general register organization with the help of diagram. 5 [CO1],K2
KL
Bloom’s Taxonomy:
K1 K2 K3 K4 K5 K6
Remember Understand Apply Analyze Evaluate Create