Microprocessors &

Microcontrollers
Lecture 20
20/04/2022
 Programmable Peripheral Interface
8255: 40 pin IC
Used by the micro-processor
General purpose programmable I/O devices
IN AL,15
OUT 15,AL
8255 Architecture
 8255 Architecture

CS A1 A0 Result
0 0 0 Port A
0 0 1 Port B
0 1 0 Port C
0 1 1 Control Register
1 x X No selection
 8255 Modes
• BSR Mode
• I/O Mode
 BSR Mode Example
MOV AL,OF
OUT CWR, AL
 8255 Modes
• I/O Mode
 Input Output Mode
• Mode 0: simple I/O mode
• Mode 1: I/O mode with handshaking

• Mode 2: Bidirectional I/O with handshaking

 8253 Timer/Counter
Applications
• To generate accurate time delay
• As a event counter
• Square waveform generator
• Rate generator

Initialized using control word register

3counters- counter 0, counter 1 and counter 2 (16 bit)
Clock- up to 0-2.5MHz
Compatible with almost all microprocessor

Counters
• Each counter consists of a single, 16 bit-down counter, which can be operated in
either binary or BCD. Its input and output is configured by the selection of modes
stored in the control word register. The programmer can read the contents of any
of the three counters without disturbing the actual count in process.
8253 Timer/Counter
 8253 Timer/Counter

CS A1 A0 Result
0 0 0 C0
0 0 1 C1
0 1 0 C2
0 1 1 Control Register
 Difference Between 8253 & 8254

8253 8254

Its operating frequency is 0 - 2.6 Its operating frequency is 0 - 10

MHz MHz

It uses N-MOS technology It uses H-MOS technology

Read-Back command is not Read-Back command is available

available

Reads and writes of the same Reads and writes of the same
counter cannot be interleaved. counter can be interleaved.

8254 has a powerful command called READ BACK command, which allows the user to check the
count value, the programmed mode, the current mode, and the current status of the counter.
 Keyboard and Display Counter 8279
 8279 programmable keyboard/display controller is designed by Intel
that interfaces a keyboard with the CPU
 The keyboard first scans the keyboard and identifies if any key has
been pressed
 It then sends their relative response of the pressed key to the CPU
and vice-a-versa
• How Many Ways the Keyboard is Interfaced with the
CPU?
 Interrupt or the pole mode
 In the Interrupt mode, the processor is requested service only if
any key is pressed, otherwise the CPU will continue with its main
task.
 In the Polled mode, the CPU periodically reads an internal flag of
8279 to check whether any key is pressed or not with key pressure.
 Keyboard and Display Counter 8279
How Does 8279 Keyboard Work?
• The keyboard consists of maximum 64 keys, which are
interfaced with the CPU by using the key-codes. These key-
codes are de-bounced and stored in an 8-byte FIFORAM,
which can be accessed by the CPU. If more than 8
characters are entered in the FIFO, then it means more
than eight keys are pressed at a time. This is when the
overrun status is set.
• If a FIFO contains a valid key entry, then the CPU is
interrupted in an interrupt mode else the CPU checks the
status in polling to read the entry. Once the CPU reads a key
entry, then FIFO is updated, and the key entry is pushed out
of the FIFO to generate space for new entries.
 Keyboard and Display Counter 8279
Divide into 4 sections:
• Keyboard section
• Scan section
• Display section
• CPU interfaced
Keyboard and Display Counter 8279
 Serial data transfer (USART 8251)
• Universal Synchronous & Asynchronous Receiver
Transmitter
• Microprocessor communicate with peripheral
devices using USART
Serial data transfer (USART 8251)
Serial data transfer (USART 8251)
Thank you