Programmable Interval Timer 8254

Special Purpose Programmable Peripheral

Devices
 General purpose peripheral devices provides interface
between CPU and slow electromechanical processes/devices
 All these interfaces were taken care of by CPU using interrupt
mechanism or polling techniques
 Due to low speed of processes significant amount of CPU time
gets consumed in the interface and communication activities
 Dedicated programmable peripheral devices have been
introduced
 Once initiated by CPU these programmable peripheral devices
take care of all interface activities
 CPU becomes free from interface activities and perform its
main task more efficiently
 8253/8254

 Intel’s programmable timer 8253/8254 will generate an

accurate time delay
 8253/8254 are capable of taking care of the time delays and
timing of the process
 This reduces the software overhead on the microprocessor
Functional Block Diagram of 8253
Pin Configuration of Intel 8253
 Architecture and Signal Description

• Three identical independent 16-bit counter with a maximum

count rate of 10 MHz
• Presettable down counter able to operate in
BCD/Hexadecimal mode
• All the three counters independently controlled by
programming the control word register
• On the fly reading of counter
– Can be read online without disturbing the clock input to
the counter
 Architecture and Signal Description
• 8-bit bidirectional data bus buffer
– Used to interface the timer 8253 to the system data bus
– Data is transmitted/received upon execution of IN/OUT
instruction
– IN instruction read data from the peripheral
– OUT instruction writes data to a peripheral
• Read/write logic control the direction of data buffer
• A1,A0 - Used to select one of the three Counters or the Control
Word Register for read or write operations
– Normally connected to the system address bus
Selected Operations for Various Control
Inputs of 8254
 Control Word Register

• 8-bit control word written by 8086

Control Word Register
 Operating Modes

• Mode 0 - Interrupt on terminal Count

Used to generate an interrupt to the μP after a certain interval
• Mode 1 – Programmable One Shot
Used as a mono stable multi-vibrator
• Mode 2 – Rate Generator or divide by N counter
• Mode 3 – Square Wave Generator
Similar to Mode 2 except the output remains low for half of
the timer period and high for the other half of the period
• Mode 4 − Software Triggered Mode
• Mode 5 – Hardware Triggered Mode
Interfacing Interval Timer with 8086
Interfacing 8254 with 8086
Port address mapping
 (i) Generating square wave

• 8254 in mode 3
• Let us use counter 0
• Operate in BCD count mode
• Number of T states

• Control word
ALP to generate square wave of 1 ms
 (ii) Generating Interrupt to the Processor
after 10 ms
• 8254 in mode 0
• Let use counter 1
• OUT1 pin of 8254 is connected to interrupt input of 8086
• Operate in HEX count mode
ALP to Interrupt the Processor
Generate a monoshot pulse with Quasi stable
state duration of 5 ms
• 8254 in mode 1
• Let use counter 2
• Operate in HEX count mode
ALP to generate a monoshot pulse
 References
• https://www.youtube.com/watch?v=3i24dWbWFvc
• A.K. Ray and K.M. Bhurchandi Advanced Microprocessors and
Peripherals, third Edition, Tata McGraw Hill, 2012.