PROGRAMMABLE INTERVAL TIMER

8254

BY
FAHIMA AKTER ANNI
ID: 181120012
 WHY WE USE 8254?
In 8086,
It is not possible to
generate accurate
time delays using
delay routines
In 8254,
Facilitates:
 Accurate Time Delays
 Minimizes Load On mp
 Real Time Clock
 Event Counter
 Digital One Shot
 Square Wave Generator
 Complex Waveform
Generator
 INTRODUCTION

• The Intel 8254 is a counter/timer device designed to solve the common

timing control problems in microcomputer system design.
• The 8254 is an advanced version of 8253.
• Used for controlling real-time events such as real-time clock, events
counter, and motor speed and direction control.
 FEATURES OF 8254
• Provides three independent 16-bit counters, called channels.
• Each channel can be programmed to operate in one of six modes. All modes are
software programmable.
• Counting facility in both BCD and Binary number systems.
• It has powerful command which is Read back Command.
• It operates in +5V regulated power supply and has 24 pin signals.
• It uses HMOS technology.
 8253 VS. 8254
8253
Its operating frequency is 0 - 2.6
MHz
It uses N-MOS technology
Read-Back command is not
available
Reads and writes of the same
counter cannot be interleaved.
8254 - ADVANCED VERSION OF
8253
 Its operating frequency is 0 - 10
MHz
 It uses H-MOS technology
 Read-Back command is
available
 Reads and writes of the same
counter can be interleaved.
 8254 Block Diagram and Pin Configuration

Figure-1 : 8254 Block Diagram Figure-2 : 8254 Pin Configuration

 PIN DESCRIPTION
Symbol Pin Type Name and Function
No.
D7–D0 1 -8 I/O DATA:Bi-directional threestatedatabuslines, connected tosystemdatabus.

CLK 0 9 I CLOCK0:Clock inputofCounter0.

OUT 0 10 O OUTPUT0:OutputofCounter0.

GATE 0 11 I GATE0:GateinputofCounter0.

GND 12 - GROUND:Powersupplyconnection.

Vcc 24 - POWER: A5Vpowersupplyconnection.

WR 23 I WRITECONTROL:ThisinputislowduringCPUwriteoperations.

RD 22 I READCONTROL:ThisinputislowduringCPUreadoperations.

CS 21 I CHIP SELECT : A low on this input enables the 8254 to respond to RD and WR signals. RD
andWRareignored otherwise.
 PIN DESCRIPTION
Symbol Pin Type Name and Function
No.
A1, A0 20 –29 ADDRESS : Used to select one of the three Counters or the Control Word Register for read or
I writeoperations. Normally connected tothesystemaddressbus.
A1 A0 Selects
0 0 Counter 0
0 1 Counter 1
1 0 Counter 2
1 1 Control Word Register
CLK 2 18 I CLOCK2:Clock inputofCounter2.
OUT 2 17 O OUT2:OutputofCounter 2.
GATE 2 16 I GATE2:GateinputofCounter2.
CLK 1 15 I CLOCK1:Clock inputofCounter1.
GATE 1 14 I GATE1:GateinputofCounter1.
OUT 1 13 O OUT1:OutputofCounter 1.
 COUNTERS:
• Three Counters – C1,C2 & C3
• Each 16 Bit Identical Presentable
• Each counters has two input signals (CLK & GATE) and one output signal (OUT)
• Down Counter Operates In BCD /Hex
• Control word registers and counters are selected using A1 and A0
• Programmed by writing a Control Word

CONTROL LOGIC:
• CS – Logic 0 – Enables 8254
• RD – Logic 0 – Tells Microprocessor Reads Count From 8254
• WR – Logic 0 – Tells Microprocessor Writes Count/ Command Into 8254
• A1,A0 – Address Input Pins To Select Modes And Counters
 BLOCK DIAGRAM

DATA BUS BUFFER:

8 Bit Bidirectional D0-D7 Connected To Data Bus Of Microprocessor
Data is transmitted or received by two instruction :
In - Reads Data From Peripheral
Out - Writes Data To Peripheral
READ/WRITE LOGIC:
It controls the reading and the writing of the counter registers.
The control section has five signals
1. RD (Read signal)
2. WR (Write signal)
3. CS (Chip Select signal)
4. Address line A1
5. Address line A0
CONTROL WORD REGISTER:
Accepts 8 Bit Control Word Written By Microprocessor
Can Only Be Written ( Not Read)
Control Word Chooses One Of The Six Modes Of Operation
 CONTROL WORD FORMAT
D7 D6 D5 D4 D3 D2 D1 D0
SC1 SC0 RW1 RW0 M2 M1 M0 BCD / Binary

SC - Selection Counter M - Mode

SC1 SC0 M2 M1 M0
0 0 Select Counter 0 0 0 0 Mode 0
0 1 Select Counter 1 0 0 1 Mode 1
1 0 Select Counter 2 X 1 0 Mode 2
X 1 1 Mode 3
1 1 Read-Back
Command 1 0 0 Mode 4
1 0 1 Mode 5
RW - Read / Write
RW1 RW0
0 0 Counter Latch Command
BCD / Binary
0 1 Read/Write least significant byte only 0 Binary Counter 16-bits
1 0 Read/Write most significant byte only 1 Binary Coded Decimal (BCD)
1 1 Read/Write least significant byte first, Counter
then most significant byte
 Mode 0
Interrupt On
Terminal
Count
Mode 5 Mode 1
Hardware Hardware
Triggered Retriggerable
Strobe One-Shot
8254
Modes of
Operation
Mode 4
Mode 2
Software
Rate
Triggered
Generator
Strobe
Mode 3
Square
Wave
Generator
 Mode 0 : Interrupt On Terminal Count
In this mode, initially the OUT is low.
Once the count is loaded in the register, the counter is decremented in every
cycle and when the count reaches zero, the OUT goes high.
This can be used as an interrupt
The OUT remains high until a new count or a command word is loaded.
Mode 1: Hardware Retriggerable One-Shot
In this mode, the OUT is initially high
When the Gate is triggered, the OUT goes low, and at the end of the count,
the OUT goes high again, thus generating a ones hot pulse.
 Mode 2 : Rate Generator (Divide-by-N counter)
In Mode2, if GATE=1, OUT will be high for N*T, goes low only for one
clock pulse, then counter is reloaded automatically.
The cycle is repeated until reprogrammed or G pin set to 0.
Mode 3 : Square Wave Generator
In this mode, when a count is loaded, the OUT is high.
The count is decremented by two at every clock cycle, and when it reaches
zero, the OUT goes low, and the count is reloaded again.
This is repeated continuously; thus a continuous square wave with period
equal to the period of the count is generated.
The frequency of the square wave is equal to the frequency of the clock
divided by the count
 Mode 4 : Software Triggered Strobe
 In this mode, the OUT is initially high; it goes low for one clock period at
the end of the count.
The count must be reloaded for subsequent outputs.
Mode 5 : Hardware Triggered Strobe
This mode is similar to Mode 4, except that it is triggered by the rising pulse
at the gate
Initially, the OUT is low, and when the Gate pulse is triggered from low to
high, the count begins.
At the end of the count, the OUT goes low for one clock period.
 Read Operations:
There are three possible methods for reading the counters:
1. A simple read operation
2. The Counter Latch Command
3. The Read-Back Command
1.Simple read operation :
The Counter which is selected with the A1, A0 inputs, the CLK input of the
selected Counter must be inhibited by using either the GATE input or
external logic.
Otherwise, the count may be in the process of changing when it is read, giving
an undefined result.
2. Counter Latch Command:
SC0, SC1 bits select one of the three
counters
Two other bits, D5 and D4, distinguish this
command from a control word
If a counter is latched and then, some time
later, latched again before the count is read,
the second counter latch command is
ignored.
The count read will be the count at the time
the first counter latch command was issued.
3. Read-back control command:
The read-back control, word is used,
when it is necessary for the contents of
more than one counter to be read at a
same time.
Count : logic 0, select one of the
Counter to be latched
Status : logic 0, Status must be latched
to be read status of a counter and is
accessed by a read from that counter
Counter Status format:
Shows the state of the output pin
Check the counter is in null state (0) or not
How the counter is programmed
 INTERFACING INTERVAL TIMER 8254 WITH
8086 MICROPROCESSOR
Problem Statement:
Design a programmable timer using 8254 and 8086. Interface 8254 at an
address 0040H for counter 0 and write the following ALPs. The 8086 and 8254
run at 6MHz and 1.5MHz respectfully.

1. To generate a square wave of period

1ms.

2. To interrupt the processor after 10ms.

3. To drive monoshot pulse with

quasistable state duration 5ms.
8086 – 6 MHz

8254 – 1.5 MHz

6MHz/4 = 1.5MHz
READ

WRITE
DATA LINES
Selecting
Counter 0
Counter 1
Counter 2
CWR
Generating
Chip Select
Address Mapping:
A7 A6 A5 A4 A3 A2 A1 A0

0 1 0 0 0 0 0 0 = 40H Counter 0

0 1 0 0 0 0 1 0 = 42H Counter 1

0 1 0 0 0 1 0 0 = 44H Counter 2

0 1 0 0 0 1 1 0 = 46H CWR
 • Selecting counter 0 of this section of the
solution
1. To generate a square
wave of period 1ms.
 • Selecting counter 0 of this section of the
solution
1. To generate a square
• Will be operating the counter in BCD Mode
wave of period 1ms.
(can also be HEX)
• Given,
f = 1.5MHz
1
T= = 0.66𝜇𝑠
1.5×10−6

• If N is the number, T states required for 1ms

1×10−3
N= = 1.5× 103 = 1500 states
0.66×10−6
 • T = 0.66µs
1. To generate a square • N = 1500 states
wave of period 1ms. • Control word register
SC1 SC0 RL1 RL0 M2 M1 M0 BCD
0 0

SC1 SC0 OPERATION

0 0 Select Counter 0
0 1 Select Counter 1
1 0 Select Counter 2
1 1 Illegal
 • T = 0.66µs
1. To generate a square • N = 1500 states
wave of period 1ms. • Control word register
SC1 SC0 RW1 RW0 M2 M1 M0 BCD
0 0 1 1

RL1 RL0 OPERATION

0 0 Latch Counter for ‘ON THE FLY’
reading
0 1 Read/Write least Significant Byte only
1 0 Read/Write MSB only
1 1 Read/Write LSB first then MSB
 • T = 0.66µs
1. To generate a square • N = 1500 states
wave of period 1ms. • Control word register
SC1 SC0 RW1 RW0 M2 M1 M0 BCD
0 0 1 1 0 1 1

M2 M1 M0
0 0 0 Mode 0
0 0 1 Mode 1
X 1 0 Mode 2
X 1 1 Mode 3
1 0 0 Mode 4
1 0 1 Mode 5
 • T = 0.66µs
1. To generate a square • N = 1500 states
wave of period 1ms. • Control word register

SC1 SC0 RW1 RW0 M2 M1 M0 BCD

0 0 1 1 0 1 1 1 = 37H

BCD Operation
0 Hexadecimal Count
1 BCD Count
 • T = 0.66µs CODE SEGMENT
ASSUME CS:CODE
1. To generate a • N = 1500 states
START: MOV AL,37H
square wave of • Control word register OUT 46H,AL
period 1ms. • CWR = 37H MOV AL,00
• Program: OUT 40H,AL
MOV AL,15
MOV 40H,AL
MOV AH,4CH
CODE INT 21H
ENDS END
START
 • To generate an interrupt we will have to operate
8254 in Mode 0.
2. To interrupt the
• We use timer 1 for this part of the solution.
processor after 10ms.
• Gate 1 of 8254 is connected to interrupt input
of microprocessor.
 • To generate an interrupt we will have to operate 8254 in
Mode 0.
2. To interrupt the • We use timer 1 for this part of the solution.
processor after 10ms. • Gate 1 of 8254 is connected to interrupt input of
microprocessor.
• Number of T states required for 10ms delay
10×10−3
= = 15 × 103 = 15000 = 3A98H
0.66×10−6

𝟏
From solution part 1 : T = = 𝟎. 𝟔𝟔𝝁𝒔
𝟏.𝟓×𝟏𝟎−𝟔

SC1 SC0 RW1 RW0 M2 M1 M0 BCD

0 0 1 1 0 1 1 1 = 70H

Select Read Write Mode 0 HEX

Counter 1 LSB & MSB Interrupt
 • To generate an interrupt we will have to operate 8254 in Mode 0.
• We use timer 1 for this part of the solution.
2. To • Gate 1 of 8254 is connected to interrupt input of microprocessor.
interrupt the 10×10−3
processor • Number of T states required for 10ms delay =
0.66×10−6
= 15 ×
103 = 15000 = 3A98H
after 10ms.
• CWR = 70H CODE SEGMENT
CS:CODE
• Program: ASSUME
MOV AL,70H
START:
OUT 46H,AL
MOV AL,98H
OUT 42H,AL
MOV AL,3AH
MOV 42H,AL
MOV AH,4CH
CODE INT 21H
ENDS END
START
3. To drive monoshot • We will use counter 2 for this solution.
pulse with • Operating mode should be Mode 1 for selecting
quasistable state programmable monoshot.
duration 5ms. • Out 2 remains high at the beginning. When trigger
is applied output goes low. Countdown starts.
When count reaches 0, the output again goes high.
3. To drive monoshot • We will use counter 2 for this solution.
• Operating mode should be Mode 1 for selecting
pulse with programmable monoshot.
quasistable state • Out 2 remains high at the beginning. When trigger is applied
output goes low. Countdown starts. When count reaches 0,
duration 5ms. the output again goes high.
5×10−3
• Number of T states required for delay = 0.66×10−6
= 7500 states
= 1D4CH
SC1 SC0 RW1 RW0 M2 M1 M0 BCD
1 0 1 1 0 0 1 0 = B2H

Select Read Write Mode 0

Counter 2 LSB & MSB HEX
Interrupt
 • We will use counter 2 for this solution.
3. To drive monoshot • Operating mode should be Mode 1 for selecting programmable
monoshot.
pulse with • Out 2 remains high at the beginning. When trigger is applied output
goes low. Countdown starts. When count reaches 0, the output again
quasistable state goes high.

duration 5ms. 5×10 −3

• Number of T states required for delay = 0.66×10−6

= 7500 states = 1D4CH

• CWR = B2H
CODE SEGMENT
• Program: ASSUME
CS:CODE
MOV AL,70H
START:
OUT 46H,AL
MOV AL,98H
OUT 42H,AL
MOV AL,3AH
MOV 42H,AL
MOV AH,4CH
CODE INT 21H
ENDS END
START
 APPLICATIONS
 Real time clock
 To generate accurate time delay
 Event counter
 Binary rate multiplier
 Square wave generator
 Rate generator
 Complex waveform generator
 Complex motor generator
 Digital one-shot
Thank You