AEC - Q100 - What Changed From Rev H To Rev J

Automotive Electronics Council
Component Technical Committee
AEC-Q100 Rev. J
Introduction to New Revision
October 04th, 2023

Table of contents
1 Overview 3
2 Changes Rev. H to Rev. J 5
3 Release and Publication 39

18 Mrz 2023
Table of contents
1 Overview 3

18 Mrz 2023
Overview of changes
AEC-Q100 Rev. J is the complete revision with editorial updates,
clarification as well as major and minor content changes.
Major changes are:

• Q006 data for Cu wire products is now mandatory prerequisite
for product qualification
• Product release possible even with reliability related
qualification failures if complete 8D, including proven
corrective action in place, is available.
• Grade 0 TC requirement changed from 2000 cylces to 1500
cycles.
• PTC trigger criteria reworked
• New ESD target levels for advanced CMOS (28 nm and
below) and RF pins: HBM 1kV & CDM Test Condition 250 
Slide 30 & 31
18 Mrz 2023
Table of contents
1 Overview 3

18 Mrz 2023
Change: References
• Correction of typos
• Rearranged sorting
• New references:
• AEC-Q006
• SAE J1879
• J-STD-002
• JESD94
• JESD671
• JEP155
• JEP157
• JEP178

18 Mrz 2023
Change: Definition of „AEC Q100 qualified“
Clarification on the reporting of ESD levels

Reference to new ESD target levels for advanced CMOS nodes (see also changes to
HBM/CDM ESD test requirements in table 2)

18 Mrz 2023
NEW: Definition of Flip-Chip Ball Grid Array
‒ Rev. J explicitly adressed FC-BGA packages now

‒ Added section is inteded to clarify what is covered by that term

18 Mrz 2023
Change: Reference to Zero Defect
Approach
Clarification of wording and alignment with official document title (AEC-Q004 changed the
title with its official release from „Guideline“ to „Framework“)

18 Mrz 2023
NEW: Section on the Role of Misson
Profiles
Up to Rev. H, AEC-Q100 does mention mission profiles only in App. 7

New section 2.3 now provides an entry point in the main body of the document to the
mission profile use description in App. 7 as well as a reference to the Knowledge-Based-
Test-Methodology presented in JESD94. JESD94 is also the foundation of Robustness
Validation.
The use and role of mission profiles in qualification is described in more detail still in App. 7
(which also got an update, see respective slide).
18 Mrz 2023
Change: Molding to assembly lots
“Molding lots” changed to “assembly lots” to include also flip chip packages with lid on die

18 Mrz 2023
Change: Use of generic data in qualification
Rev. H wording: „Justification for the use of generic data, whenever it is used, must be
demonstrated by the supplier and approved by the user.”
New wording reflects the state of the art business processes where development projects
are closed after prodcut release to production.

18 Mrz 2023
Change: Specified criteria for release after
qual fails
3.3 in previous revision was only addressing requalification

New wording allows release of new product with reliability related fails during qualification if
complete 8D is available.
Nevertheless, after completion of 8D a repeating of the failed qualification test is possible
and allowed.

18 Mrz 2023
Change: Clarification on user approval
requirements
Clarification that user approval procedure (PPAP, PCN process) is outside the scope of
AEC-Q100

18 Mrz 2023
NEW: AEC-Q006 mandatory for product
release
Although not accepted by users, AEC-Q100 Rev. H theoretically had the possibility for
product release without Q006 data.
Rev. makes Q006 data (qualification data or sufficient volume referencing data) mandatory
for product release based on Q100.

18 Mrz 2023
Changed: Clarified wording on ED
ED has already been a device specific test.

Clarification in wording, no change in practical applicability.
“Device specific data” (first sentence of section) allowance still applies.

18 Mrz 2023
NEW: Technology qual requirement and
NBTIBTI
A technology qual prior to a product qual becomes mandatory.

No requirements on the technology qual defined besides the focus on automotive as this is
strongly knowledge based and not feasible to cover efficiently in a checklist based
requirement.
NBTI changed to BTI to cover both NBTI and PBTI for modern CMOS technologies.
18 Mrz 2023
NEW and change: Notes added and
rephrased
Notes C, F and W added

Notes B, H, L, P and S changed: “only” skipped, as many tests are applicable for more than
one category addressed by these notes
18 Mrz 2023
Change: Additional Requirements for
Preconditioning
Added TH as passive humidity test (editorial)

Corrected test method standard number (JA113  JESD11-A113)
Additional delam reporting requirement (die attach and wire bond surface delamination)

18 Mrz 2023
Change: THB/HAST intermediate read point
conditions
Interim readouts during THB or HAST shall be teste at room temperature only and not at
room and hot like final readout.
Skipping hot testing for interim readouts is supposed to prevent the DUTs from drying and
so reducing the effective test time.

18 Mrz 2023
Change: Recommendation on UHAST
AEC recognizes the industry known fact that Autoclave testing results in a lot of test
artefacts.
Therefore AEC strongly recommends to use UHAST as fast unbiased humidity testing.

18 Mrz 2023
Change and NEW: TC test conditions and
requirements
Grade 0 requirement changed from 2000 to 1500 cycle (background see next slide)
Room and hot test required after TC instead of hot only to increase the probability to identify
intermittent contacts.
AM data on 3x3 devices shall be available after TC upon request.
18 Mrz 2023
Background on new TC grade 0
requirement
All calculations are done with Coffin Manson model (n = 4)
Grade Q100H Q100G Q100G vs Q100H Q100H Grade 1 1
equivalent Equivalent
Grade 0 -55 to 150°C: 2000 c -50 to 150°C: 2000 c 2208 c (+10%) -55 to 150°C: 1758 c 
-40 to 150 °C -50 to 175°C: 1000 c 1378 c (+38%)
-65 to 175°C: 500 c 1065 c (+113%)
Grade 1 -55 to 150°C: 1000 c -50 to 150°C: 1000 c 1104 c (+10%) -55 to 150°C: 1000 c
-40 to 125 °C -65 to 150°C : 500 c -65 to 150°C: 500 c 500 c (0% 2) (reference)
-40 to 105 °C -50 to 150°C: 500 c 656 c (+ 31%) -55 to 125°C: 1003 c 
-40 to 85 °C -50 to 105°C: 1000 c 909 c (-9%) -55 to 125°C: 554 c 
Note 1: based on acceleration factor calculated from the temperature swing of the grade for which calculation is made compared to grade 1
Note 2: 1000 c (-55 to 150°C) equals 827 c (-65 to 150°C) OR 500 c (-65 to 150 °C) equals 600 c (-55 to 150 °C)
Conclusions
1. Requirement Grade 0 too stringent: proposal to reduce from 2000 c to 1500 c
(aligned with 2x in Q006)
2. Two cycle conditions and requirements for grade 1 are not in line
18 Mrz 2023
Change: PTC trigger criteria
PTC is applicable for products with regular fast and high changes of power dissipation due to the
intended use in the application
The result is an temperature gradient across the die which is a different stress compared to TC
Trigger criteria have been adapted in Rev. J to focus on relevant products

18 Mrz 2023
Change and NEW: Additional requirement
for HTOL

18 Mrz 2023
Change and NEW: Additional requirement
for HTOL
Test temperature sequence: Room test
first, sequence of other two
temperatures may be chosen to
optimize implementation
Drift analysis:
Generic requirement for drift analysis
after HTOL
The selection of the parameters for drift
analysis depends on product,
technology and target application and
therefore is not feasible to specify in a
checklist approach.
Therefore it is in the suppliers
responsibility.
18 Mrz 2023
Change: Solderability criteria
Solderability test is now directly referring to J-STD-002

18 Mrz 2023
NEW: Bump Shear Test
New test to address FC-BGA robustness of (internal) bumps an pillars

JESD22-B117 is just cited as a reference (example) test method. The supplier must define
his own method to address this topic.
Typically done during technology development.

18 Mrz 2023
NEW: ESD target levels for advanced CMOS
devices
Advanced CMOS nodes and RF pins cannot be designed to meet their target performance
and legacy AEC ESD target levels at the same time.
Regularly user agreement was necessary to release such kind of products which increases
effort on both sides.
Therefore for 28 nm and below as well as RF pins HBM target level was adapted to 1kV
No user agreement is necessary for product release based on these criteria but it must be
stated in the data sheet.
18 Mrz 2023
NEW: ESD target levels for advanced CMOS
devices
Same background as HBM target levels.

For 28 nm and below as well as RF pins CDM target level was adapted to Test Condition 250.
No user agreement is necessary for product release based on these criteria but it must be stated in the data sheet.

18 Mrz 2023
Change: LU sample size
Change from 6 to 3 DUTs for latch-up testing to be in line with JEDEC

Latch-up is a design and technology related test. Therefore 3 DUTs will reliably uncover any
design weakness and still ensure reproducibility of the test.

18 Mrz 2023
NEW: Note “W”
New note “W” indicates tests only for devices wires not embedded in mold compound in
cavity packages
18 Mrz 2023
NEW: Types of Change for FC-BGA
Introduction of new types of change to the delta qualification matrix to address flip chip
devices and their bump/pillar based interconnect system.
18 Mrz 2023
New: Referencing criteria for FC-BGA
To fully address FC-BGA
products, flip chip specific
attributes have been added
to the list of criteria to be
considered during the
definition of product
qualification family.
Bare die products and WL-
CSP are excluded from the
scope of this list of attributes
but not from the standard
itself.
Suppliers need to define their
own set of attributes to
address these kind of
products.
18 Mrz 2023
NEW: FC-BGA specific criteria in CDCQ
CDCQ got a new section to cover wafer bump attributes for FC-BGA

18 Mrz 2023
Changed: Content of QTR
The possibility for release with reliability relevant failures based no a completed 8D (see 3.3)
is now also reflected in requirements for data submission in the QTR.

18 Mrz 2023
Change: Clarification on Mission Profile
Assessment
Appendix 7 describes the use and role of mission profiles in setting up a

qualification test plan.
The appendix has been reworked for better understanding and clarification.
Appropriate references have been added.
No change in the intended procedure and flow.

18 Mrz 2023
Table of contents
1 Overview 3

18 Mrz 2023
Release and Publication
• AEC-Q100 Rev. J passed ballot without
rejects.
• After editorial rework, layout finalization and

internal and external review the document is
ready for publication.
• Available for download at the AEC website

now.
http://www.aecouncil.com/AECDocuments.html

18 Mrz 2023

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Automotive Electronics Council

Component Technical Committee

Automotive Electronics Council

2 Changes Rev. H to Rev. J 5

3 Release and Publication 39

Automotive Electronics Council

2 Changes Rev. H to Rev. J 5

3 Release and Publication 39

Automotive Electronics Council

Major changes are:

2 Changes Rev. H to Rev. J 5

3 Release and Publication 39

Automotive Electronics Council

Automotive Electronics Council

Clarification on the reporting of ESD levels

Automotive Electronics Council

‒ Rev. J explicitly adressed FC-BGA packages now

Automotive Electronics Council

Automotive Electronics Council

Up to Rev. H, AEC-Q100 does mention mission profiles only in App. 7

Automotive Electronics Council

Automotive Electronics Council

3.3 in previous revision was only addressing requalification

Automotive Electronics Council

Automotive Electronics Council

Automotive Electronics Council

ED has already been a device specific test.

Automotive Electronics Council

A technology qual prior to a product qual becomes mandatory.

Notes C, F and W added

Added TH as passive humidity test (editorial)

Automotive Electronics Council

Automotive Electronics Council

Automotive Electronics Council

Automotive Electronics Council

Automotive Electronics Council

Solderability test is now directly referring to J-STD-002

Automotive Electronics Council

New test to address FC-BGA robustness of (internal) bumps an pillars

Automotive Electronics Council

Same background as HBM target levels.

Automotive Electronics Council

Change from 6 to 3 DUTs for latch-up testing to be in line with JEDEC

Automotive Electronics Council

Automotive Electronics Council

Automotive Electronics Council

Appendix 7 describes the use and role of mission profiles in setting up a

Automotive Electronics Council

2 Changes Rev. H to Rev. J 5

3 Release and Publication 39

Automotive Electronics Council

• After editorial rework, layout finalization and

• Available for download at the AEC website

Automotive Electronics Council

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