Synchronization strategy for single phase inverters
for feeding renewable energy in South African
National Grid
Maxwell Sibanyoni
Dept. of Electrical Engineering
Tshwane University of Technology
Pretoria, South Africa
mm.sibanyoni@webmail.co.za
Abstract— Phase locked loop inverter synchronization method
is the mostly used synchronization method for both single phase
and three phase systems. Recent research has focused on the
improvement of the performance of the phase lock loop inverter
synchronization method under different grid conditions. The
common phase locked loop synchronization techniques such as
the Second Order Generalized Integrator based PLL (SOGI-
OSG), Enhanced PLL (EPLL) all have certain disadvantages
compared to each other and other synchronization techniques.
Factors such as noise, low voltage ride and harmonics are part of
the faults that inverters need to be able to control. A lot has been
done recently to improve the performance of the phase lock loop
such as using adaptive filters and other synchronization
techniques together with phase lock loop synchronization.
Index Terms-- Phase locked loop (PLL), Point of common
coupling (PCC), Photo voltaic, solar inverter, Synchronization
I. INTRODUCTION
Electricity production in the world has moved to integrate
renewable energy sources as an integral part of the energy mix
due to the effects of global warming and the depletion of fossil
fuels. In South Africa an energy mix that includes coal energy,
renewable energy sources and nuclear energy is being pursued.
The renewable energy generation target for South Africa is
17800MW from 2010 to 2030 [13]. Due to the recent energy
crisis in South Africa a lot of households and commercial
buildings were fitted with photovoltaic energy systems.
Municipalities such as the Cape Town municipality and
EThekwini municipality allow for domestic and commercial
978-1-5386-2344-2/17/$31.00 ©2017 IEEE
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SP Daniel Chowdhury
Dept. of Electrical Engineering
Tshwane University of Technology
Pretoria, South Africa
Spchowdhury2010@gmail.com
buildings to feedback energy to the grid which helped solve the
problem of load shedding however more still needs to be done
to avoid such a crisis happening again. Photovoltaic solar
systems are dependent on solar inverters for the conversion of
direct current voltage to alternating current voltage and the
synchronization of the photovoltaic solar system to the grid at
the point of common coupling. Due to the high degree of
penetration of renewable energy sources in the South African
distribution/transmission grid, problems such harmonics and
unbalanced current compensation are presented to the
distribution/transmission grid. This paper therefore reviews
techniques to improve the performance of the phase lock loop
synchronization methods for single phase systems.
II. COMMON PHASE LOCKED LOOP
SYNCRHONICATION TECHNIQUES
A Phase Locked Loop is a closed loop control mechanism
that acts on the oscillator when phase error builds, it reduces
the phase error to zero thereby ensuring that the output phase
signal is locked to the phase signal of the input. Fig 1 shows
the basic structure of the Phase Locked Loop which consists of
a phase detector which is used to measure the difference in
phase angle of the input (grid) and the output. The second part
in the structure of the Phase Locked Loop is a loop filter often
based on proportional integral control and the last part of the
structure is the voltage controlled oscillator [2, 12]. Recent
research studies conducted have proven that the commonly
used phase locked loop techniques such as the Inverse Park
Transform Phase Locked Loop, Enhanced Phase Locked Loop,
Second Order Generalized Integrator Phase Locked Loop and
others show poor performance under harmonic conditions and
unbalanced currents [3]. Other techniques such as adaptive or
notch filters and multi harmonic decoupling cell have been
proven to have higher complexities and the dynamic response
is compromised [4].
Figure 1: Basic Structure of Phase Locked Loop
In [9] a Second Order Generalized Integrator Frequency
Locked Loop (SOGI-FLL) is presented. A Simulink model of
the SOGI-FLL is shown in fig 2.
Figure 2: Basic Structure of Phase Locked Loop
The orthogonal voltage waveforms generated from fig 2 are
shown in the below fig 3. The orthogonal output voltage v’ has
the same amplitude and phase as the input voltage v. The
orthogonal output voltage qv’ has a phase shift of 90Û with
respect to the orthogonal voltage v’. Methods to improve the
settling time and overshoot of such synchronization methods
are constantly being developed.
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Figure 3: Basic Structure of Phase Locked Loop
When the input frequency and the resonant frequency is not the
same then the system loses precision as shown in the below fig
4. Therefore it is necessary to find synchronization methods that
will be able to adjust the resonant frequency to the input
frequency.
Figure 4: Basic Structure of Phase Locked Loop
III. CASCADED GENERALIZED INTERGRATOR
PHASE LOCKED LOOP
In [10] a Cascaded Generalized Integrator Phase Locked
Loop with fixed gain parameters is presented. A Cascaded
Generalized Integrator Phase Locked Loop is made up of two
blocks of second order generalized integrator in cascaded form
and connected to an embedded synchronous reference frame
phase locked loop as shown in fig 5.
 principle that makes it possible to separate different
frequencies that occur in the same time space. The Delayed
Signal Cancellation operator transfer function is given by

ͳ ܶ
‫ ݄ ߚߙݒ‬ሺ‫ݐ‬ሻ ൌ ሺ‫ ݄ ߚߙݒ‬ሺ‫ݐ‬ሻ ൅ ݁െ݆ߠ‫ ݄ ߚߙݒ ݎ‬ቀ‫ ݐ‬െ ቁ
ʹ ݊

‫ ݄ ߚߙݒ‬ሺ‫ݐ‬ሻ ൌ ‫ ݄ ߚߙݒܩ‬ሺ‫ݐ‬ሻ (2)

G represents the harmonic gain, T represents the fundamental

period and ߠ‫ ݎ‬is the chosen rotational vector.

ଵା௘ షೕሺఏೝାఏ೙ሻ
‫ܩ‬ൌ
ଶ

‫ ܩ‬ൌ ‫ ݁ܩ‬௝ఏ (3)

Figure 5: Structure of cascaded generalized integrator PLL (CGI-PLL).
The Cascaded Delayed Signal Cancellation method achieves
The cascaded generalized integrator phase locked loop achieves the attenuation of unwanted harmonics by making the
the dc offset because the dc gain in the transfer functions of both harmonic gain equal to zero for all instances except for when
orthogonal voltages is zero hence the dc offset will not show on the harmonic order is equal to the targeted harmonic order for
the embedded synchronous reference frame phase locked loop. which then results in a harmonic gain of unity.
The transfer functions for the orthogonal voltages are as follows
ʹߨ݄‫כ‬
௩ ሺ௞௪ ௦ሻమ ߠ‫ ݎ‬ൌ െ (4)
‫ܩ‬ఈǡ௖ ሺ‫ݏ‬ሻ ൌ ௩ഀ ሺ‫ݏ‬ሻ ൌ ሺ௦మ ା௞௪ ೚௦ା௪ మ ሻమ (1) ݊
೒ ೚ ೚ ‫כ‬
݄ Represents the harmonic order and ݄ represents the targeted
harmonic order

஼௢௦ሺఏೝ ାఏ೙ ሻ
௩ഁ ௞ మ ௪೚ య ௦ ‫ܩ‬ൌ (5)
‫ܩ‬ఈǡ௖ ሺ‫ݏ‬ሻ ൌ ௩ ሺ‫ݏ‬ሻ ൌ ሺ௦ ା௞௪೚ ௦ା௪೚ మ ሻమ
మ (2) ଶ
೒
ఏ ାఏ
‫׎‬ൌെ ೝ ೙ (6)
ଶ
In order to eliminate unwanted harmonic, the harmonic gain G
= 0 in equation (5) then n = 2(h -݄‫) כ‬.

The cascaded generalized integrator achieves a total harmonic

distortion of less than one percent by determining the highest
bandwidth that gives a total harmonic distortion of one percent
or less than one percent and because the second order
generalized integrator subsystem each reduces the harmonic
distortion.

IV. CASCADED DELAYED SIGNAL

CANCELLATION PHASE LOCKED LOOP (CDSC-PLL)

In [5] a Cascaded Delayed Signal Cancellation Phase Locked

Loop is presented which is able to compensate a wider range
of harmonics and current imbalances with relative ease of
computation with less complexity. The structure of the
Cascaded Delayed Signal Cancellation Phase Locked Loop is
shown in fig 6. The Cascaded Delayed Signal Cancellation
Figure 6: Structure of cascaded delayed signal cancellation phase locked loop
Phase Locked Loop is made up of a cascaded connection of (CDSC-PLL).
delayed cancellation blocks which achieves the requirement of
unwanted harmonic attenuation by using a delayed operation

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 V. CONCLUSION
The Cascaded Generalized Integrator Phase Locked Loop
synchronization technique offers an improvement in the
performance of the common Second Order Generalized
Integrator Phase Locked Loop by simply adding another
Second Order Generalized Integrator which reduces the
harmonic effects to less than one percent with less
computational complexity. The Cascaded Delayed Signal
Cancellation Phase Locked Loop synchronization technique
improves the performance of the common Phase Locked Loop
by catering for a wider range of harmonics as the number of
CDSC subsystems selected equal the number of harmonics to
be detected. The development of the CGI-PLL and CDSC-PLL
will assist in the development of better single phase inverters
to alleviate the current problems of grid synchronization with
higher level of solar PV generation to the national grid. Such
developments will surpass the difficulties of higher noise
sensitivity, harmonics and current imbalances of the
conventional single phase PLL systems for synchronization
thereby addressing the problems of high degree of penetration
of renewable energy sources on the distribution/transmission
grid.
ACKNOWLEDGMENT
Authors would like to thank the Department of Electrical
Engineering of the Tshwane University of Technology (TUT)
for the support extended for this work.
VI. REFERRENCES
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[2] Hua Geng, Jianbo Sun, Shuai Xiao and Geng Yang. Modelling and
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Phase Detection. IEEE transactions on industrial informatics, vol. 9, no.
2, may 2013
[3] Abhijit Kulkarni and Vinod John. A Novel Design Method for SOGI-
PLL for Minimum Settling Time and Low Unit Vector Distortion. IEEE,
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[4] Yongheng Yang, Frede Blaabjerg, Lenos Hadjidemetriou and Elias
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[5] Jing Wang, Dalia D. Konikkara, A. Monti. A Generalized Approach for
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[8] K.Arulkumar, P.Manojbharath, S.Meikandasivam, D.Vijayakumar.
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Maxwell Sibanyoni (B.Tech) is currently studying for the
M.Tech, at the Tshwane University of Technology. He has been
in the renewable energy field for over 3 years focusing on solar
energy and currently managing one of the solar plants in South
Africa producing 75 MW.
Professor SP Daniel Chowdhury (M’02-SM’11, PhD(Eng),
CEng, FIET, FIE, FIETE, SMIEEE, SMSAIEE) is presently
with the Electrical Engineering Department, Tshwane
University of Technology, Pretoria West, Staatsartillerie Road,
Building 6-411A, Private Bag X680, Pretoria-0001, Phone:-
+27 (0) 123825149; Cell:+27 (0) 713519332; Fax:-+27 (0)
123825688. (Email: spchowdhury2010@gmail.com). He has
been in the profession of Electrical engineering for about three
decades. He has graduated 10 Doctoral, 35 Masters, 48
Graduate students from Jadavpur University, Calcutta,
University of Cape Town, Cape Town and Tshwane University
of Technology, Pretoria with more than 10 current PG students.
He has published more than 320 research papers in accredited
international peer reviewed journals and conferences. He has
co-authored the pioneering research book “Microgrids and
Active Distribution Networks” published by the IET(UK) in
2009 in the renewable energy series and it has become the
founding stone of global research in Renewable energy and grid
integration as evidenced by its more than 540 Citations with its
Chinese edition since 2015. He has successfully conducted and
completed research projects in the area of energy research
worth more than 2.5M Rupees in India, more than 11M ZAR in
South Africa. He is presently directing his research and project
works to alleviate energy poverty in Africa through smart
Microgrids.