2018 7th International Conference on Computer and Communication Engineering (ICCCE)
Improvement of Active Power Factor Correction
Circuit for Switch Mode Power Supply Using Fly
Back and Boost Topology
Md. Walid Bin Mahmud
Dept. of Electrical and Computer Dept. of Electrical and Computer
Engineering
International Islamic University Malaysia International Islamic University Malaysia
Kuala Lumpur, Malaysia Kuala Lumpur, Malaysia
sajid1319061@gmail.com zahirulalam@iium.edu.my
Abstract—At present there is expanding requests of high
power component and low total harmonic distortion (THD) in
the current drawn from the source. Additionally there is a
necessity of good power quality. Striking endeavors have been
made for the improvement of the PFC converters. This paper
aims to improve the power factor near to unity by using Fly
Back Topology and Boost topology. Fly Back topology is called
an isolated topology due to the use of transformer. It begins
with simple circuits with a gradual increase in complexity by
inclusion of new components and their subsequent effects on
the current and voltage waveforms. The advantages of this
method are fast response time, absence of switching problem
and correction of power factor efficiently.
Keywords— power factor, power factor correction (PFC), fly
back topology, boost topology, switch mode power supply (SMPS)
I. INTRODUCTION
The main limitations of diode rectifier are the low power
factor and high pulsating current drawn from the main AC
network. Serious power harmonics are generated by these
circuits in the transmission or distribution system. The
current harmonics and power harmonics like reactive power
cause distortion in line voltage [1]. The input power factor by
the use of rectification circuit is poor. These types of
problems with power quality can be eliminated using
different approaches. Among them Fly Back Topology and
Boost topology in different AC/DC and DC/DC applications
can be effective for correction of power factor [2]. The use of
diode rectifier is found in SMPS. So, very poor power factor
is obtained in SMPS. Often the use of passive filter is found
for improving the power factor since it has a simple
configuration. But passive elements, fixed compensation
characteristics, series and parallel resonances are the main
drawbacks of this approach [3]. Different topologies have
been developed and assessed to improve the power quality.
There has been development of active power control
technique. The technique has both active filters like shunt,
series and hybrid active filters and PFC circuits like buck,
boost, fly back converters.
The power quality is improved by an active filter by
elimination of bad harmonics. It can distinguish the nonlinear
load current and voltage wave shapes and thus the input
supply current is controlled by it [4].
978-1-5386-6992-1/18/$31.00 ©2018 IEEE
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AHM Zahirul Alam Dewan Atiqur Rahman
Dept. of Electrical and Computer
Engineering Engineering
International Islamic University Malaysia
Kuala Lumpur, Malaysia
eeeatiq @gmail.com
This paper involves simulation of basic SMPS circuit
using Fly Back topology and Boost topology and the analysis
of the current and voltage waveforms. Initially it is started
with simple circuits and then switched to advanced circuits
by implementation of active PFC and their subsequent effect
on the current and voltage waveforms for achieving better
power factor. All the simulations are performed using
PSPICE.
II. BACKGROUND
For an AC circuit power factor means the cosine value of
the angle which is in between the current and voltage. Ø is
the phase difference between current and voltage in case of
AC circuit. Cos Ø is the power factor of the circuit. Power
factor is a dimensionless number between 0 and 1. For a
circuit that is inductive, since the current falls behind the
voltage, power factor in this case is said to be lagging. But in
a circuit which is capacitive since current guides the voltage
and the power factor here referred to as leading. For input
line current (I) and input voltage (V) in a circuit, VI Cos Ø is
known as real power, VI Sin Ø is the reactive and VI is the
apparent power. The measurement of the effectiveness of the
real power utilization of the system can be obtained from
power factor. It gives the measurement of distortion or
impairment in line current, the line voltage and the phase
shift between them. Power Factor can be calculated from
Real power /Apparent power. The ability of doing work in
circuit in a specific time is real power and the apparent
power can be obtained from the current and voltage product
[5]. The following formula can be used for determining the
power factor:
(1)
”—‡‘™‡”ൌൌ ሺʹሻ
’’ƒ”‡–‘™‡”ൌൌ ሺ͵ሻ
The term Power factor correction means restoring the
power factor almost to unity so that it is economically viable.
Since the early part of 20th century it has been in action. PFC
is done by the connection of additional capacitors to the
electrical network which can balance the demand of reactive
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power of the inductive load and the load on the supply is thus
reduced. On the operation of the equipment there should not
be any effect. For the purpose of reducing bad harmonics in
the distribution system and for having less electricity bill
PFC is needed. PFC is added normally as capacitors so that
as much of the magnetizing current as possible is reduced
[5].
The best possible way for correction of the bad power
factor and power quality of electronic power supplies is the
use of active approach topology. The method has both active
filters like series, shunt and hybrid active filters and PFC
circuits like buck, boost and fly back converters. The power
quality is improved by an active filter by elimination of
current harmonics. The nonlinear load current and voltage
waveforms are identified by it and thus input supply current
is easily regulated. Generally the use of Active filters are
found in high power three phase power systems because they
are much expensive and some complicated control circuits
are also needed. By using a PFC circuit in between line and
nonlinear load high power factor can be obtained and DC
voltage is also stable [6].
Fig. 1. The traditional (poor power factor- current leading or lagging).
Fig. 2. The poor power factor occurring in electronic loads generates odd
harmonics.
Fig. 3. Correction of poor power factor using active approach.
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The most uncomplicated form of Power factor correction
is passive PFC. For improving poor power factor passive
PFC makes use of a filter at the AC input. Only passive
components are used by the passive PFC circuitry which
include an inductor and some capacitor circuits. Only a few
components are required for increasing efficiency which are
large due to their operation at the line power frequency. Even
though passive PFC is simple and robust it hardly achieves
low THD (Total Harmonic Distortion). The passive elements
are usually bulky and heavy since the operation of the circuit
takes place at the low line power frequency of 50Hz or 60Hz.
III. CIRCUIT TOPOLOGIES
In Fig. 4 the SMPS using Fly Back topology is shown.
Since it has a transformer it is called isolated topology.
Again in Fig. 5 SMPS using Boost topology is shown and it
does not have transformer. So, it is called non-isolated
topology [7].
Fig. 4. SMPS using Fly Back topology [7].
Fig. 5. SMPS using Boost topology [7].
Since both topologies have pulsating type input current,
the power factor is very poor for both of them and thus
improvement of power factor is needed.
 IV. SIMULATIONS AND RESULTS cycles power factor is improved with a 46% improvement
This paper involves simulations for SMPS using Fly compared to existing work [7].
Back topology as well as Boost topology. PSPICE has been
used for performing the simulations. The parameters have
been changed and the outputs have been compared for the
changed values. Parametric sweep has been performed for
different periods and duty cycles and the outputs have been
included and analyzed.

A. SMPS using Fly Back Topology

In Fig. 6 the voltage has been measured across the
transformer and the capacitors for 50%, duty cycle. From
Fig. 7 it is observed that the output voltage across the
secondary capacitor is 8V with different ripples for different
capacitance values and it gives a power factor of 0.80. So a
41% improvement in power factor is achieved compared to
existing work which has power factor of 0.390 only.
Fig. 8. Voltage vs time across the primary capacitor for different duty
cycles.

Fig. 6. SMPS using Fly Back Topology.

Fig. 9. Voltage vs time across the Transformer for different duty cycles.

Fig. 7. Voltage vs time across the secondary capacitor for

different capacitance values.
The voltage has been measured across the transformer
and the capacitors for 50%, 40% and 20% duty cycles
respectively. It is observed from Fig. 8 that for different
duty cycles the voltage across the primary capacitor is 8.5V
with a power factor of 0.85. In Fig. 9 it is seen that the
output voltage across the transformer is 9V for different
duty cycles. Again it is observed from Fig. 10 that the
maximum voltage across the secondary capacitor is 8.5V
with a power factor of 0.85. So by decreasing the duty
Fig. 10. Voltage VS Time across the secondary capacitor for different duty
cycles.
B. SMPS using Boost Topology
In Fig. 11 Boost topology has been used for power
factor correction which has a MOSFET, an inductor and two
capacitors. It is observed from Fig. 12 that the voltage
across the primary capacitor is 8V. Across the inductor the
voltage is 7.5V as seen from Fig. 13. Again from Fig. 14 it

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is observed that the output voltage across the secondary
capacitor is 8V. The inductor maintains constant current.
From this topology a power factor of 0.8 obtained. So the
power factor is improved by 22.63% compared to the
existing work with Boost topology which gives a power
factor of only 0.619 [7].
Fig. 11. SMPS using Boost Topology.
Fig. 12. Voltage vs time across the primary capacitor.
Fig. 13. Voltage vs time across the inductor.
Fig. 14. Voltage vs time across the secondary capacitor.
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The simulated results of this work on Active PFC have
been illustrated in Table 1.
TABLE I. SIMULATED POWER FACTOR
No. SMPS Topology Power Factor
1. Fly Back Topology 0.85
2. Boost Topology 0.80
V. CONCLUSION
In this study the single-phase power factor correction of
nonlinear loads has been focused on using active filter. For
achieving the objectives of minimum or no power loss at the
output terminal the power factor by using Fly Back
Topology and Boost topology have been analyzed and
compared. Both the circuits have been simulated to observe
the output voltage to make sure that there is minimum
harmonics. These are depicted from the results and
discussions which have been made in the previous chapter.
The flowcharts provided have been followed as a guideline
throughout the project and the objectives of this project have
been achieved successfully. The Fly Back topology has been
analyzed by changing the parameters and it has been
possible to obtain acceptable results for active power factor
correction. Simulations have been performed using Boost
topology as well and the power factor is improved. As
explained in the results it is possible to control the power
factor by changing various parameters and thus high-power
factor has been achieved.
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