IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 33, NO.
10, OCTOBER 2018
A Novel Parameter Tuning Method for a
Double-Sided LCL Compensated WPT System With
Better Comprehensive Performance
Yousu Yao , Yijie Wang , Senior Member, IEEE, Xiaosheng Liu, Member, IEEE, Fanfan Lin
and Dianguo Xu , Fellow, IEEE
Abstract—Wireless power transfer (WPT) has attracted a large
amount of attention owing to its inherent advantages such as
convenience, safety, low maintenance, being weather proof, etc.
A parameter tuning method is crucial for a WPT system due to
its function of reducing reactive power and improving system
efficiency. Three deficiencies of the conventional double-sided
inductor–capacitor–inductor (DS-LCL) compensated system,
i.e., low design freedom, weak high-order harmonic suppression
capability, and discontinuous input current of a full-wave diode
rectifier (FDR), are first analyzed by means of theoretical deriva-
tion, numerical calculation, and Pspice simulation. In order to
overcome these disadvantages, a novel parameter tuning method
is proposed. The characteristic of constant current output of
the proposed DS-LCL system is analyzed, followed by a detailed
derivation about secondary compensation inductance. Theoretical
analysis indicates that the proposed system has four attractive
characteristics: higher design freedom, reduced coil current,
enhanced high-order harmonic suppression capability, and con-
tinuous input current of the FDR. The overall efficiencies of two
comparative WPT prototypes, tuned by conventional and proposed
methods, are 87.3% and 90.2%, respectively. Experimental results
show great coincidence with theoretical analysis, demonstrating
the superiority of the newly proposed parameter tuning method.
Index Terms—Constant current output (CCO), discontinuous
input current of a full-wave diode rectifier (FDR), double-sided
inductor–capacitor–inductor (DS-LCL) compensation topology,
harmonic suppression, wireless power transfer (WPT).
I. INTRODUCTION
OWER transfer via a conductor shows some salient
P demerits. Messy winding of electric wires impairs the
appearance of the city. Induced touch spark endangers both
human and equipment, especially in some special applications
such as mining. In addition, a buried cable may cause electric
Manuscript received July 31, 2017; revised October 24, 2017; accepted
November 25, 2017. Date of publication November 29, 2017; date of current
version July 15, 2018. This work was supported in part by the National Natural
Science Foundation of China under Grant 51777038, in part by the Fundamental
Research Funds for the Central Universities under Grant HIT.BRETIII.201510,
and in part by the National High Technology Research and Development Pro-
gram 863 of China under Grant 2015AA050603. Recommended for publication
by Associate Editor X. Ruan. (Corresponding author: Yijie Wang.)
The authors are with the School of Electrical Engineering and Automation,
Harbin Institute of Technology, Harbin 150001, China (e-mail: yaoyousu@163.
com; wangyijie@hit.edu.cn; liuxsh@hit.edu.cn; fanfancomeon18@163.com;
xudiang@hit.edu.cn).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2017.2778255
0885-8993 © 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications standards/publications/rights/index.html for more information.
8525
,
shock on a rainy day. Contact gear of rotating electrome-
chanical equipment drastically shortens equipment’s lifespan.
Moreover, wired power transfer is inappropriate for biomedical
implantation since the patient will suffer from reoperation. On
the contrary, wireless power transfer (WPT) provides a lot of
inherent advantages, such as safety, convenience, flexibility,
galvanic isolation, low maintenance, and unnecessity of bulky
cable and heavy plugs, as well as the ability to operate in harsh
environment and inclement weather [1]–[3]. Thanks to the
merits mentioned earlier, WPT has attracted more and more
attention in recent years [4].
WPT can be divided into four categories based on power
transfer principle. They are electromagnetic radiation WPT (typ-
ically by means of radio wave and laser), electrically coupled
WPT, magnetically coupled WPT, and ultrasonic WPT. Magnet-
ically coupled WPT is further split into magnetically coupled
inductive WPT (MCI-WPT) and magnetically coupled resonant
WPT (MCR-WPT). Compared with MCR-WPT, MCI-WPT
shows numerous benefits, including convenience of implemen-
tation because of significantly lower operation frequency, higher
power level, and system efficiency along with less severe elec-
tromagnetic interference (EMI) issue. Owing to these benefits,
MCI-WPT is selected in this research. For convenience and
brevity, MCI-WPT is simplified as WPT from now on.
The compensation network and circuit analysis play a vital
role in the WPT system as they directly determine resonant
frequency, power factor, and output characteristics. Accord-
ing to published literature, four basic compensation topologies,
series–series (SS), series–parallel (SP), parallel–series (PS), and
parallel–parallel (PP), are mostly researched in various applica-
tions [4], [5]. Among four basic compensation topologies, SS
and SP are more suitable for WPT, since the input of the compen-
sation topology is usually square wave voltage. The voltage on
the primary parallel compensation capacitor rises to source volt-
age instantaneously when the voltage polarity changes, causing
instant large current and impairing lifespan of the capacitor. In
order to handle this problem, an additional inductor is inserted
between the inverted voltage source and the parallel compen-
sation capacitor when the PS or PP compensation topology is
employed [6]–[8]. The SS compensation topology provides the
characteristic of constant current output (CCO), whereas SP
possesses neither CCO nor constant voltage output (CVO), both
with a self-inductance compensation manner [9], [10]. SS and
8526
SP compensation topologies have two serious drawbacks. First,
the maximum output power cannot be altered unless employ-
ing another loosely coupled transformer (LCT) with different
parameters. In practical applications, the LCT is usually space
limited, making it difficult to manufacture a desirable LCT ful-
filling all requirements [11]. Second, these two compensation
topologies are highly sensitive to misalignment. Relative shift
between primary and secondary coupling coils substantially de-
teriorates system performance. Assuming an extreme situation
when the coupling coefficient of the employed LCT decreases
to zero, the current flowing through primary coil and compen-
sation capacitor will be infinite in theory, which will destroy the
whole system.
Apart from these four basic compensation topologies, several
novel compensation topologies with some appealing traits are
proposed, such as primary series and secondary series–parallel
(S/SP) [12], [13], inductor–capacitor–inductor (LCL) [14]–[19],
and inductor–capacitor–capacitor (LCC) [20], [21]. The S/SP
compensation topology can be regarded as a combination of
SS and SP. The first and second series capacitors, respectively,
compensate primary and secondary leakage inductances, while
the parallel capacitor compensates the mutual inductance of the
LCT. Results of the study indicate that the S/SP compensation
topology provides the characteristic of CVO and achieves both
high efficiency and good output controllability. Nevertheless,
the two drawbacks of SS and SP still exist in S/SP, contributing
to its narrow application in practical projects. The LCL com-
pensation network can be employed in either one side or two
sides. Hou et al. [14] developed an iterative model to acquire
soft switching and decrease reactive power under the premise of
determined LCL parameters. A parameter tuning method pre-
sented in [15] is the most classical method. It is called as the
conventional parameter tuning method in later sections. A num-
ber of LCL-compensated WPT systems are designed in this
way [15]–[18]. In order to achieve larger constant current and
higher intensity of excitation, an additional capacitor is added
in series with a coupling coil, and they constitute a modified
LCL compensation topology [19]. If the coupling coil in the
LCL compensation topology is partially compensated by an ad-
ditional capacitor, LCL will evolve into LCC. Therefore, the
compensation topology employed in [19] is more well known
as LCC. LCC can also be used in either one or two sides. More
and more researchers have realized that LCC is a T-type resonant
network in essence [21]. Compared with the double-sided LCL
(DS-LCL) compensation topology, double-sided LCC needs two
extra compensation capacitors, leading to increased system cost
and reduced power density. On the basis of previous discussion,
the DS-LCL compensation network is selected in this research.
The conventional DS-LCL system has three major deficien-
cies. First, system design freedom is low [22]. The system is
constrained by LCT parameters, which further causes large coil
current and low system efficiency. Second, the output current of
a full-bridge inverter (FBI) is seriously distorted because it con-
tains a large quantity of high-order harmonics. Distorted current
leads to extra power loss as high-order harmonics only produce
reactive power. To the best of authors’ knowledge, this problem
has appeared in previous studies, but it has not been deeply
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 33, NO. 10, OCTOBER 2018
Fig. 1. Practical circuit of a conventional DS-LCL system.
analyzed [23], [24]. Third, the input current of a full-wave diode
rectifier (FDR) is discontinuous in some scenarios [25]. It results
in larger diode current and higher diode loss. Detailed analysis
regarding these three deficiencies is presented in Section II-B.
The remainder of this paper is organized as follows.
Section II-A briefly introduces a conventional parameter tuning
method for the DS-LCL system. Detailed analysis on problems
of the conventional DS-LCL system is presented in Section II-B.
In order to overcome these problems, a novel parameter tuning
method for the DS-LCL system is proposed in Section III.
The characteristic of CCO is subsequently analyzed on the
basis of inductor–capacitor (LC) and capacitor–inductor (CL)
resonant tanks. The parameter determination method for sec-
ondary compensation inductance is also involved in this part.
Section IV compares conventional and proposed DS-LCL
systems in terms of coil current, harmonic suppression capabil-
ity, and diode current continuity. Based on previous analysis,
two WPT prototypes, respectively, tuned by conventional and
proposed methods, are built in Section V. Diverse comparative
experiments are then conducted and discussed. The last section
summarizes several findings of this paper.
II. PARAMETER TUNING METHOD AND PROBLEMS OF THE
CONVENTIONAL DS-LCL SYSTEM
A. Parameter Tuning Method
The circuit diagram of a conventional DS-LCL system is
shown in Fig. 1. Uin is original dc input voltage and Q 1 − Q 4
are four MOSFETs constituting an FBI. L 1 , L 2 , C1 , and C2 are
primary and secondary compensation inductors and capacitors,
respectively. L P and L S are primary and secondary inductances
of the LCT, while k is the corresponding coupling coefficient.
L 1 , C1 , and L P form a primary LCL resonant tank, while L S , C2 ,
and L 2 make up a secondary LCL resonant tank. D1 − D4 are
four Schottky diodes comprising the FDR. CF and RL are the
filter capacitor and the resistive load, respectively. u AB is the
instantaneous output voltage of the inverter, while u ab is the
instantaneous input voltage of the rectifier. The RMS values
of these two voltages are UAB and Uab , respectively, when only
fundamental harmonic is considered. ILP and ILS (both are RMS
values) are the currents flowing through primary and secondary
coupling coils, respectively. i ab is the instantaneous input current
of the FDR. IRL is the dc current flowing through the load RL ,
and URL is the dc voltage.
Owing to the filtering function of the compensation network,
the current flowing through the primary coil is nearly sinu-
soidal, which contains only a fundamental component. As a
YAO et al.: NOVEL PARAMETER TUNING METHOD FOR A DS-LCL COMPENSATED WPT SYSTEM 8527

Fig. 2. Analytical circuit of a conventional DS-LCL system.

result, fundamental harmonic approximation is employed [26].

Accordingly, Uin and FBI can be substituted with a sinusoidal
voltage source, whose amplitude (RMS value) and frequency
are, respectively, UAB and f 0 , equaling the working frequency
of the FBI. For analytic simplification, LCT is replaced with its
mutual inductance model, shown in Fig. 2 and circled by red
short dashed line. M is the mutual inductance of the LCT, and Fig. 3. Profiles of ILP , ILS , IGM , and Pind against L P .
it is generally defined as

M = k L P L S. (1)
In fact, the power computed by (8) is consumed by RL . There-
The rectifier, filter, and resistor circuit surrounded by blue fore, the load current IRL can be deduced as follows:
dashed line in Fig. 1 can be replaced by an equivalent resistance √
2 2 kUAB
RE [27] IRL = · √ . (9)
π ω0 L P L S
8
RE = RL . (2) The coupling coefficient k mainly depends on the size of LCT
π2
and the distance of power transfer, which are predetermined
The compensation components of a conventional DS-LCL by the application and cannot be altered, so k keeps nearly
system, L 1 , C1 , L 2 , and C2 , can be tuned in terms of (3) and invariable throughout the design of the target WPT system.
(4) [28]. ω0 is the operation angular frequency of the system. It
is usually determined by the application, so it is regarded as a B. Problems of the Conventional DS-LCL System
constant in this paper
Equation (9) implies that the conventional DS-LCL system
1
ω0 L 1 = ω0 L P = (3) only possesses one degree of freedom—L P or L S [22]. Low
ω0 C1 degree of freedom will cause two serious problems—being
1 constrained by LCT parameters and high currents through
ω0 L 2 = ω0 L S = . (4) coupling coils. Being constrained by LCT parameters means
ω0 C2
system output current cannot be altered unless the LCT is
Equations (3) and (4) indicate that both primary and sec- substituted [11]. This drawback will significantly reduce system
ondary LCL resonant tanks are symmetric, which means the applicability. In other words, the conventional DS-LCL system
reactance of the compensation inductor, the compensation ca- cannot be employed in some applications due to strict size
pacitor, and the corresponding coupling coil (L P or L S ) is equal. limits.
This symmetric T-type network provides two attractive features: High currents through coupling coils, resulted from small L P
impedance transformation and voltage–current conversion [21]. and L S in essence, can be intuitively explained with profiles
Based on these two features and the mutual inductance model describing correlations among ILP , ILS , and L P , and L S . Fig. 3
of LCT, ILP , jω0 M ILP , and IRE can be expressed as follows: presents the curves of ILP , ILS , IGM , and Pind against L P when
UAB UAB IRL , RL , k, UAB , and ω0 equal 1 A, 200 , 0.2, 42 V, and 5.34 ×
ILP = = −j (5)
jω0 L P ω0 L P 105 rad/s, respectively. IGM stands for geometric mean of ILP
  and ILS , while Pind is defined by (10), which is proportional to
UAB M
jω0 M ILP = jω0 M · − j = UAB (6) power loss on L P and L S
ω0 L P LP  
M k Pind = ILP
2
L P + ILS
2
L S. (10)
IRE = − j UAB = − j √ UAB . (7)
ω0 L P L S ω0 L P L S On the basis of (9), the product of L P and L S keeps constant
when IRL , k, UAB , and ω0 are determined, and hence, only L P is
The power consumed on the equivalent resistance RE can be
presented in Fig. 3. ILP decreases with L P , but ILS increases with
obtained in light of Joule’s law
it, resulting in invariable IGM . The coordinates of intersection
8 k 2 UAB 2 are (6, 12.12), which means the geometric mean of ILP and ILS is
PRE = IRE 2 RE = · RL . (8) 12.12 A when L P equals 6 μH. Based on possessed experience,
π 2 ω0 2 L P L S
8528
Fig. 4. Curves of input impedance versus working frequency with different
L P and L S combinations. (a) Amplitude characteristic. (b) Phase characteristic.
the currents through coupling coils are quite big for a 200-W
system when input voltage, output voltage, and coupling coef-
ficient are 42 V, 200 V, and 0.2, respectively. The curve of Pind
against L P , the smallest ordinate of which is 1.062 when L P
equals 5 μH, is also given in Fig. 3. It will be compared with
the proposed WPT system in Section IV.
Another serious issue for a conventional DS-LCL system is
high-order current harmonics at the output terminal of the FBI.
This drawback can be evidently seen in many existing WPT
systems, for example, [28, Figs. 7 and 8], [29, Fig. 16], and [30,
Figs. 5, 13, 15, and 16]. The fundamental reason for this problem
is undesired response of input impedance to working frequency.
Fig. 4 shows several profiles describing system input impedance
characteristic versus working frequency. Four basic parameters,
input and output voltages, load resistance, and coupling coeffi-
cient, are identical to those given in Fig. 3.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 33, NO. 10, OCTOBER 2018
Fig. 5. Pspice simulation results of URL , UC2 , and i ab when L P equals 12 μH.
Define two variables as follows:
Z in−85 kHz
R1−3 = (11)
Z in−255 kHz
Z in−85 kHz
R1−5 = . (12)
Z in−425 kHz
R1−3 stands for the input impedance ratio of fundamental
harmonic (85 kHz) to third harmonic (255 kHz). R1−5 repre-
sents the input impedance ratio of fundamental harmonic to
fifth harmonic (425 kHz). Fig. 4(a) indicates that R1−3 and
R1−5 decrease when L P is increased; thus, larger L P is better
for high-order harmonic suppression. Nevertheless, larger L P
means higher power loss (see Fig. 3). Therefore, L P should not
be too big. Under the condition that L P equals 6 μH, which is
very close to the lowest power loss case, R1−3 and R1−5 are
0.85 and 0.47, respectively. Both ratios are not much smaller
than 1, resulting in relatively large harmonics in the current
flowing through a primary compensation inductor, deteriorating
MOSFET switching and increasing system power loss.
Fig. 4(b) suggests that the input impedance angle always
equals zero at system operation frequency regardless of L P . It
means zero phase angle (ZPA) can always be achieved as long
as the parameter tuning method expressed by (3) and (4) is
followed. The input impedance angles of both third and fifth
harmonics equal 90°, no matter which L P (6, 9, or 12 μH) is
taken into account, and hence, only reactive power is produced
and delivered, which does no good for normal power transfer.
The third deficiency of a conventional DS-LCL system is
discontinuous input current of the FDR (i ab ) resulting from rel-
atively high voltage ratio of URL to UC2 . In light of the analysis
in [25] and [31], when the ratio of URL to UC2 is bigger than
0.7595, the input current of the FDR is discontinuous. When
the ratio is smaller than 0.7595, the input current is continu-
ous. As a result, the ratio of 0.7595 is regarded as the critical
value. This deficiency is intuitively exhibited in Fig. 5 when
L P equals 6 μH. Other parameters are identical to those given
before. The voltage ratio in Fig. 5 is about 1.122, much bigger
than the critical value 0.7595 so i ab is discontinuous. The duty
cycle of the rectifier diode, defined as the ratio of conduction
time to total duration per cycle, is solely 0.59, which means
YAO et al.: NOVEL PARAMETER TUNING METHOD FOR A DS-LCL COMPENSATED WPT SYSTEM 8529

the second LC resonant tank I2−LC can be derived as follows:


C1
I1−LC = − jUAB (15)
L1

C1 L PL
UC L = −UAB (16)
L 1 C1

Fig. 6. Analytical circuit of the proposed DS-LCL system. C1 L PL C2−P
I2−LC = jUAB . (17)
L 1 C1 L SL−P
Substituting (14) into (17), I2−LC can be simplified as
almost four-tenths of the time is not utilized and causes great
waste of employed diodes. In terms of Fig. 5, the peak value of UAB
I2−LC = j . (18)
i ab is 2.53 A, much larger than expected peak current of 1.57 A. ω0 L 1
Discontinuous current enlarges power loss on L 2 and D1 − D4 The average power consumed by RE−P can be subsequently
and drives down system efficiency. More seriously, precise theo- deduced
retical analysis on the output current becomes more difficult due
to discontinuity and distortion of the rectifier’s input current. As 8 UAB 2 L P
PRE−P = · RL . (19)
can be seen in Fig. 5, simulation result of the system output π 2 (ω0 L 1 )2 L S
current is 0.9 A, though the designed system output current is In fact, the power described by (19) is consumed by RL . In
1 A. terms of the energy conservation principle, the direct current
through RL can be acquired
III. PROPOSED PARAMETER TUNING METHOD FOR THE √ 
DS-LCL SYSTEM 2 2UAB L P
IRL = . (20)
π ω0 L 1 LS
The circuit structure discussed in this section is totally iden-
tical to Fig. 1, but the parameter tuning method is significantly Equation (20) suggests that system output current IRL is irrel-
different. Fig. 6 shows the analytical circuit of the proposed evant with load. This attractive feature is called as CCO charac-
DS-LCL system. The parameters with subscript P indicate that teristic in this paper. In some published literature works, it is also
they have been reduced to the primary side. C1 and C1 are split termed as load-independent characteristic. This desirable char-
by C1 . L PL , L M−P , and L SL−P are primary leakage inductance, acteristic remarkably simplifies control circuit design, improves
primary-converted mutual inductance, and primary-converted system reliability, and reduces system cost. Equation (20) also
secondary leakage inductance of the LCT, respectively. Other indicates that IRL has nothing to do with L 2 . The only function
parameters have the same meanings as those in Fig. 2. of L 2 is adjusting system input impedance angle to zero, aimed
According to the fundamental circuit principle and previous at minimizing reactive power demand from dc voltage source;
discussion, the following equations can be obtained: therefore, L 2 is called as phase-shift inductance hereafter.
⎧ For clearness and emphasis, the proposed parameter tuning
⎪
⎪ C1 = C1  + C1 methods for L 1 , C1 , and C2 are rearranged by (21)–(23), respec-
⎪
⎪
⎪
⎪ L PL = L P (1 − k) tively:
⎪
⎪
⎨ L M−P = k L P √ 
L SL−P = L PL (13) 2 2 UAB LP
⎪
⎪ L1 = · · (21)
⎪
⎪ C 2−P = C L
2 S /L P π ω0 IRL LS
⎪
⎪
⎪
⎪ L 2−P = L 2 L P /L S

⎩ 1 1
RE−P = 8L P RL / π 2 L S . C1 = + 2 (22)
ω0 2 L 1 ω0 [(1 − k) L P ]
L 1 resonates with C1 at system operation frequency, com-
1
prising an LC resonant tank. Similarly, C1 resonates with L PL C2 = . (23)
and L SL−P resonates with C2−P , constituting a CL and an LC ω0 2 [(1 − k) L S ]
resonant tank, respectively, both at system operation frequency. What follows is detailed deduction of phase-shift inductance
The following equation can then be attained: leading to ZPA. For analytic simplification, an intermediate
impedance Z int is defined by (24), which represents equiva-
1 1 1 lent impedance of the circuit surrounded by purple short dashed
ω0 2 =  =  = . (14)
L 1 C1 L PL C1 L SL−P C2−P line in Fig. 6
  
On the basis of Kirchhoff’s voltage and current laws, the (RE−P + jω0 L 2−P )
Z int = + jω0 L SL−P //jω0 L M−P .
output current of the first LC resonant tank I1−LC , the output // jω0 1C2−P
voltage of the CL resonant tank UC L , and the output current of (24)
8530 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 33, NO. 10, OCTOBER 2018

Substituting (14) into (24), Z int can be simplified as shows. Part of C1 , the first term on the right-hand side of (22)
AB AC and denoted as C1 hereafter, should be resonant with L 1 , while
Z int == +j 2 . (25) the other part of C1 , the second term on the right-hand side of
B2 + C 2 B + C2
(22) and represented by C1 from now on, should be resonant
The expanded forms of A, B, and C are as follows: with the primary leakage inductance of the LCT. C2 is tuned to
⎧
⎪ resonate with the secondary leakage inductance of the LCT.
⎨ A = ω0 L SL−P L M−P
B = ω0 L M−P C2−P RE−P (26)
⎪
⎩C = L
M−P + L SL−P − ω0 L M−P L 2−P C 2−P .
2
IV. PERFORMANCE COMPARISON WITH THE CONVENTIONAL
DS-LCL SYSTEM
On the basis of Fig. 6 and (24), system input impedance Z in
can be further derived as follows: In order to select appropriate L P and L S and reduce coupling
   coil loss, the correlations among ILP , ILS , Pind and L P , L S for the
1 1
Z in = (Z int + jω0 L PL ) // // + jω0 L 1 . proposed DS-LCL system are explored and exhibited in Fig. 7.
jω0 C1 jω0 C1
(27) With space limitation, coupling coefficient, coil current, and
Substitution of (13) and (14) into (27) gives much simpler manufacturing complexity incorporated into the LCT design,
expression of Z in the upper bounds for both L P and L S are determined as 100 μH.
Fig. 7(a) indicates that ILP decreases with both L P and L S . When
ω0 L 1 C1 Z int L P and L S are 100 μH, minimum ILP —4.66 A—is obtained,
Z in = . (28)
ω0 L PL C1 − jC1 Z int much smaller than its counterpart in a conventional DS-LCL
In order to achieve ZPA, hence lower reactive power demand, system. The variation tendency of ILS with respect to L P and
the following equation must be fulfilled by means of combining L S is the same as ILP . Therefore, minimum ILS —7.7 A—is
(25) with (28): also acquired when both L P and L S are 100 μH. Even ILS is
much bigger than ILP , it is only three quarters as big as that
αC 3 + βC 2 + γ C + δ = 0 (29) of a conventional DS-LCL system. Apart from current, coil
where the coefficients α, β, γ , and δ can be computed as follows: loss is also associated with parasitic resistance, and hence, the
⎧ correlation among Pind , L P and L S is researched. In terms of

⎪α = ω0 L PL C1
⎪
⎨ Fig. 7(c), minimum Pind , 0.8096 A2 H0.5 , is achieved when both
β = C1 A = ω0 L SL−P L M−P C1 L P and L S are 100 μH. Compared to the result presented in
(30)
⎪
⎪ γ = ω0 L PL C1 B 2 = ω03 L PL L 2M−P RE−P
2
C1 C2−P
2
Fig. 3, Pind has been dropped by 21.9%. In other words, the
⎩
δ = C1 AB 2 = ω03 L 3M−P L SL−P RE−P2 2
C1 C2−P . coupling coil loss of the proposed system is only 78.1% of the
Equation (29) can be solved according to Cardano’s formula conventional system.
[32], [33]. Assuming C1st , C2nd , and C3r d are three solutions What follows is high-order harmonic suppression capacity
to (29), L 2−P can be finally derived by substituting these three of the proposed DS-LCL system. L P is set to be equal to L S ,
solutions to (26) and three cases—L P equals 60, 80, and 100 μH, respectively—
are taken into account. The amplitude–frequency and phase–
L M−P + L SL−P − Cnth
2−P =
L nth , n = 1, 2, 3. (31) frequency curves are shown in Fig. 8. When L P equals
ω0 2 L M−P C2−P 100 μH,R1−3 and R1−5 are, respectively, 0.075 and 0.043, much
Although (31) implies that L 2−P has three mathematical so- smaller than their counterparts in a conventional DS-LCL sys-
lutions, only the positive real number solution is really wanted. tem. The proposed DS-LCL system has excellent high-order
The other two conjugate complex solutions are abandoned when harmonic suppression capacity, resulting in near-sinusoidal out-
the discriminant of (29) is positive. put current of the FBI, reduced power loss, and improved system
The proposed parameter tuning method for L 2 should be bro- efficiency.
ken down into three steps. First, solve the third-order equation The third drawback of a conventional DS-LCL system, dis-
presented in (29) so as to acquire three mathematical solutions continuous input current of the FDR, dissolves into nothingness
of intermediate variable C. Second, derive possible phase-shift in the proposed system, since the voltage ratio of URL to UC2 has
inductances in terms of (31) and select the physically meaning- significantly reduced. Fig. 9 presents Pspice simulation wave-
ful one. Third, reduce calculated L 2−P to the secondary side forms of i ab , URL , and UC2 when L P and L S are both 100 μH.
using (13) and yield the final solution of L 2 . The voltage ratio can be calculated as 0.5108, much smaller than
The parameter tuning methods for conventional and proposed the critical value 0.7595 [25]. The peak value of i ab in the pro-
DS-LCL systems are completely different. In a conventional DS- posed system is 1.61 A. It is only three-fifths of its counterpart
LCL system, in order to form a symmetric T-type network, L 1 in a conventional DS-LCL system. Larger input current leads
should be the same as L P and C1 should resonate with L 1 at to more power loss and higher current stress, and hence, better
system operation frequency. The tuning method of L 2 and C2 is semiconductor components are needed, driving up overall cost
similar to that of L 1 and C1 . In the proposed DS-LCL system, L 1 of the system.
is not necessarily equal to L P , since the circuit is not analyzed As presented earlier, the proposed DS-LCL topology has three
from the perspective of the symmetric T-type network. L 1 should aspects of improvement in comparison with the conventional
be tuned to fulfill the output current requirement instead, as (21) DS-LCL topology. What follows is further discussion on the
YAO et al.: NOVEL PARAMETER TUNING METHOD FOR A DS-LCL COMPENSATED WPT SYSTEM 8531

Fig. 8. Amplitude–frequency and phase–frequency curves of the proposed

system under different cases.

Fig. 7. Profiles of (a) ILP , (b) ILS , and (c) Pind against L P and L S when system
performance indices are listed in Table I.

fundamental reasons for these improvements. The first aspect

of improvement, higher design freedom, from one degree to two
degrees, is resulted from the modification of parameter tuning
method. With regard to the conventional topology, all compen-
sation parameters (L 1 , C1 , L 2 , and C2 ) are determined once
L P , L S , and ω0 are set. In contrast, L 1 and C1 , a part of C1 , in
the proposed topology do not depend on L P , L S , and ω0 ; there-
fore, another degree of design freedom is created. The increase Fig. 9. Pspice simulation waveforms of i ab , URL , and UC2 when both L P and
of design freedom makes the proposed topology free from the L S equal 100 μH for the proposed DS-LCL system.
8532 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 33, NO. 10, OCTOBER 2018

TABLE I TABLE II
CRUCIAL PERFORMANCE INDICES OF THE TARGET SYSTEM DESIGNED AND PRACTICAL VALUES OF EACH PARAMETER EMPLOYED IN THE
CONVENTIONAL DS-LCL SYSTEM
Symbol Parameter Value
Symbol Designed value Practical value
Uin Original dc input voltage 42 V
f System operation frequency 85 kHz L1 4.65 μH 4.25 μH
IRL System output current 1A C1 754 nF 810.5 nF
PRL Rated output power 200 W LPa 4.65 μH 4.42 μH
D Power transfer distance 60 mm LS 28.2 μH 26.95 μH
L/W/H Size limitation of the LCT 200/200/5 mm k 0.2 0.209
C2 124.3 nF 119.3 nF
L2 28.2 μH 26.98 μH
Q1 − Q4 SPW35N60CFD SPW35N60CFD
D1 − D4 MBR40200PT MBR40200PT
constraints imposed by the LCT. The proposed topology has CF 220 μF 208.8 μF
two degrees of design freedom; thus, L P and L S can be selected
a
as large as possible, resulting in the reduction of coil currents L P is designed in terms of Pind and Maxwell simulation. Pind in Fig. 3
suggests an optimum L P of 5 μH. Maxwell simulation indicates an inductance
and loss. of 4.65 μH when the number of turns is 3 and an inductance of 7.5 μH when the
The essential reason for the second aspect of improvement— number of turns increases to 4. Therefore, the number of turns is determined
better high-order harmonic suppression capability—is larger as 3. Moreover, the ordinate corresponding to an abscissa of 4 μH for Pind is
only 0.28% larger than the optimum point. As a result, L P is designed to be
series-connected inductance and smaller parallel-connected ca- 4.65 μH.
pacitance, both of which are beneficial for suppressing high-
order harmonics. The structure of the proposed topology is TABLE III
identical to that of the conventional topology, but the values of DESIGNED AND PRACTICAL VALUES OF THE PARAMETERS EMPLOYED IN THE
compensation parameters are quite different. On the one hand, PROPOSED DS-LCL SYSTEM
L 1 and L 2 , series connected to the load, in the proposed topol-
ogy are much larger than their counterparts in the conventional Symbol Designed value Practical value
topology. On the other hand, C1 and C2 , parallel connected to L1 57.9 μH 56.6 μH
the load, in the proposed topology are much smaller than their C1 104.3 nF 109.1 nF
counterparts in the conventional topology. Thanks to these two LP 100 μH 97.7 μH
LS 100 μH 97.7 μH
points, the proposed topology provides better performance in k 0.2 0.232
high-order harmonic suppression. Although L P and L S in the C2 43.8 nF 46.3 nF
proposed topology are much larger than their counterparts in L2 400 μHa 404 μH
CF 220 μF 208.8 μF
the conventional topology, they make little contribution to en-
hancing the capability of high-order harmonic suppression as a
Calculated L 2 corresponding to ZPA should be 538 μH. In order to achieve
the mutual inductance L M is also much bigger, offsetting the ZVS, it is decreased to 400 μH based on Pspice simulation results.
benefits resulted from larger L P and L S .
The third aspect of improvement, continuous input current of
the FDR (i ab ), mainly owes to much larger L 2 . In terms of Fig. 1, For the proposed DS-LCL system, designed output current IRL
UC2 equals the voltage over L 2 plus u ab . Neglecting the voltage should be larger than 1 A when power loss on each component
drop on rectifier diodes, u ab is equal to URL in amplitude. URL is involved. It is set to be 1.1 A. In terms of system performance
is almost constant, since IRL and RL keep invariable. Hence, indices and the proposed parameter tuning method, the param-
the larger L 2 , the smaller URL /UC2 . As elaborated earlier, if eters employed in the proposed DS-LCL system are obtained.
URL /UC2 is less than the critical value (0.7595), i ab will be Designed and practical values of the parameters are tabulated in
continuous. In the proposed topology, L 2 is large enough to Table III. Inverter MOSFETs and rectifier diodes are the same
drive URL /UC2 below 0.7595; thus, continuous i ab is achieved. as those utilized in the conventional DS-LCL system, so they
are not listed.
Fig. 10 is a photograph of the proposed DS-LCL system. It
V. DESIGN EXAMPLE AND EXPERIMENT VERIFICATION consists of a dc voltage source, a primary printed circuit board
Table I lists several crucial performance indices of the target (PCB), handmade LCT, a secondary PCB, a resistive load, and
system. It is worth realizing these indices are in correspondence an oscilloscope, respectively, marked by 1–6 in order. Two dc
with those employed in Figs. 3–5 and 7–9. For the conventional voltage sources are employed: one for the main circuit, while
DS-LCL system, designed output current IRL , which is substi- the other for the driving circuit. Therefore, the power loss on the
tuted to (9) for computing the product of L P and L S , should be driving circuit can be readily read off. L 1 and L 2 are not soldered
larger than 1 A, since discontinuous input current of the FDR to corresponding PCBs for current measurement convenience.
and power loss on diverse components lower practical system The conventional DS-LCL system looks highly like the proposed
output current. With abovementioned two factors incorporated one, so the picture of that is not provided.
into the system design, IRL is determined as 1.2 A. Designed and Output voltage and current waveforms of the FBI are shown
practical values of each parameter employed in the conventional in Fig. 11, where (a) and (b), respectively, correspond to
DS-LCL system are given in Table II. the conventional and proposed DS-LCL systems. Zero-voltage
YAO et al.: NOVEL PARAMETER TUNING METHOD FOR A DS-LCL COMPENSATED WPT SYSTEM
Fig. 10. Photograph of the conventional DS-LCL system.
Fig. 11. Output voltage and current waveforms of the FBI. (a) Conventional
DS-LCL system. (b) Proposed DS-LCL system.
switching (ZVS) is achieved in both systems, since the current
is negative when voltage polarity changes from negative to pos-
itive [35]. Output current of the conventional DS-LCL system
contains a large quantity of high-order harmonics so the wave-
form is nonsinusoidal. In contrast, output current of the proposed
DS-LCL system encompasses very small high-order harmonics,
and hence, the current waveform is near-sinusoidal. Experimen-
tal results show great agreement with theoretical analysis. As
shown in Fig. 4(b), high-order harmonics only produce reactive
power, causing extra power loss on each component and driving
down the system’s efficiency. High-order harmonics also deteri-
orate electromagnetic environment, so more effort is needed to
handle with the EMI issue. All in all, high-order harmonics do
8533
Fig. 12. Primary and secondary coupling coil currents. (a) Conventional DS-
LCL system. (b) Proposed DS-LCL system.
no good to normal power transfer. From the perspectives of high-
order harmonic suppression, system’s efficiency improvement,
and EMI alleviation, the proposed DS-LCL system performs
better than the conventional system.
Coil current comparison between the conventional and the
proposed DS-LCL systems is conducted. Fig. 12 presents cur-
rent waveforms of primary and secondary coupling coils. The
peak values of i LP and i LS for the conventional DS-LCL system
are about 22.7 and 10.6 A, respectively. In contrast, the peak
values of i LP and i LS for the proposed DS-LCL system are, re-
spectively, only nearly 6.2 and 8.8 A. It is important to note that
the output power of the conventional system is 121 W, but the
output power of the proposed system is 188 W. Taking output
power difference into consideration, coil currents of the pro-
posed system are much smaller than those of the conventional
system in general. Experimental results keep a good coincidence
with the theoretical ones, indicating the rightness of the previous
analysis.
Fig. 13 exhibits input current of the FDR (i ab ) and system
output current (IRL ) under different load conditions for the con-
ventional DS-LCL system. When the load is 20 , i ab is contin-
uous because URL is relatively low. The ratio of URL to UC2 is
below the critical value. When the load increases to 50 , i ab
becomes discontinuous, since the ratio of URL to UC2 has been
larger than the critical value. The duty cycle of the rectifier diode
can be calculated as 0.76 in this situation. When RL equals its
rated value (200 ), the ratio of URL to UC2 becomes larger;
thus, the duty cycle of the rectifier diode decreases to 0.56. The
third deficiency of the conventional DS-LCL system, discontin-
uous input current of the FDR, is demonstrated by experiment.
8534
Fig. 13. Waveforms of i ab and IRL under different load conditions for the
conventional DS-LCL system. (a) RL = 20 . (b) RL = 50 . (c) RL = 200 .
Another important remark is that IRL decreases when the load is
increased. This phenomenon is mainly caused by two reasons.
On the one hand, increase of load results in higher current flow-
ing through intermediate components and, hence, larger voltage
drop. On the other hand, it also lowers the duty cycle of the
rectifier diode, which further diminishes system output current.
The waveforms of i ab and IRL in the proposed DS-LCL sys-
tem are shown in Fig. 14, where i ab keeps continuous regard-
less of change of RL , so rectifier diodes are fully utilized. This
characteristic is beneficial to diode current and loss reduction.
In the conventional DS-LCL system with 200− load, i ab− p
(peak value of i ab ) is 1.9 A when IRL equals 0.7 A. In the pro-
posed DS-LCL system with the same load, i ab− p is only 1.5 A,
though IRL has increased to 0.98 A. In this sense, the proposed
DS-LCL system is better than the conventional one. In the pro-
posed DS-LCL system, IRL also decreases with RL , but the
decreasing rate is smaller than that of the conventional system,
since only the first reason—higher voltage drop on intermedi-
ate components—exists. The other reason—discontinuous input
current of the FDR—dissolves into nothingness here.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 33, NO. 10, OCTOBER 2018
Fig. 14. Waveforms of i ab and IRL in the proposed DS-LCL system with
different load. (a) RL = 20 . (b) RL = 50 . (c) RL = 200 .
Compensation capacitor voltages of conventional and pro-
posed systems are presented in Fig. 15. Voltage stresses of the
conventional system are lower than those of the other. Neverthe-
less, the capacitances of the proposed system are smaller than
those of the conventional system. Smaller capacitance makes for
improvement of withstand voltage. In addition, the peak volt-
age stresses of C1 and C2 in the proposed system are only 250
and 390 V, respectively, which can be easily satisfied. Due to
these two factors, the advantage of low capacitor voltage of the
conventional DS-LCL system is insignificant for target system
in this work.
Fig. 16 displays input and output voltage and current of both
systems, according to which the input power, output power, and
system overall efficiency can be derived. For the conventional
system, input and output power is, respectively, calculated as
110.2 and 98 W. The driving circuit power, 2.1 W, is directly read
on the digital panel of the employed dc voltage source. The end-
to-end efficiency of the conventional system can be subsequently
computed as 87.3%. For the proposed system, input and output
power is, respectively, calculated as 200.1 and 182.4 W. The
power dissipated in the driving circuit equals 2.1 W. Therefore,
YAO et al.: NOVEL PARAMETER TUNING METHOD FOR A DS-LCL COMPENSATED WPT SYSTEM
Fig. 15. Compensation capacitor voltage comparison. (a) Conventional DS-
LCL system. (b) Proposed DS-LCL system.
Fig. 16. Input and output voltage and current waveforms. (a) Conventional
DS-LCL system. (b) Proposed DS-LCL system.
the overall efficiency of the proposed system can be obtained
as 90.2%. The proposed system provides higher efficiency than
the conventional system, which mainly results from smaller coil
and diode currents. Relatively larger input power of this system
also contributes to higher overall efficiency as driving circuit
keeps constant loss.
8535
VI. CONCLUSION
This paper proposes a novel and modified parameter tuning
method for the DS-LCL system in order to overcome three seri-
ous deficiencies of the conventional parameter tuning method.
The proposed system does not suffer from the constraints im-
posed by LCT parameters, since system output power can be
readily altered by changing compensation parameters instead of
replacing the LCT, which remarkably enhances the applicability
of the DS-LCL compensation network. Both primary and sec-
ondary coil currents have been significantly reduced, leading
to decreased coil loss and improved system efficiency. Com-
pared to the conventional system, the proposed system provides
much better high-order harmonic suppression capability. The
output current of the FBI in this system is near-sinusoidal, but
the current in the conventional system has serious distortion.
This attractive trait significantly simplifies the EMC design and
diminishes the system’s cost. The issue of discontinuous diode
current dissolves into nothingness in the proposed system, low-
ering power loss and withstand current of the rectifier diode.
Two WPT prototypes, respectively, tuned by conventional and
proposed methods, are designed and built for performance com-
parison. Experimental results agree well with theoretical anal-
ysis, demonstrating the superiority of the proposed parameter
tuning method.
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 33, NO. 10, OCTOBER 2018
Yousu Yao was born in Jiangsu, China, in 1991.
He received the B.S. degree in electrical engineer-
ing in 2014 from the Harbin Institute of Technology,
Harbin, China, where he is currently working toward
the Ph.D. degree in electrical engineering.
His current research interests include wireless
power transfer and wireless communication.
Mr. Yao was a recipient of the Best Paper Award
from the 2017 IEEE Transportation Electrification
Conference and Expo, Asia-Pacific.
Yijie Wang (S’09–M’15–SM’15) was born in
Heilongjiang, China, in 1982. He received the B.S.,
M.S., and Ph.D. degrees in electrical engineering
from the Harbin Institute of Technology, Harbin,
China, in 2005, 2007, and 2012, respectively.
From 2012 to 2014, he was a Lecturer with the
Department of Electrical and Electronics Engineer-
ing, Harbin Institute of Technology, where he has
been an Associate Professor since 2015. His cur-
rent research interests include dc–dc converters, soft-
switching power converters, power factor correction
circuits, digital control electronic ballasts, and LED lighting systems.
Xiaosheng Liu (M’14) was born in Heilongjiang,
China, in 1966. He received the B.S. and M.S. de-
grees in electrical engineering in 1988 and 1993,
respectively, and the Ph.D. degree in mechatronics
engineering in 1999, all from the Harbin Institute of
Technology, Harbin, China.
He has been a Professor with the Department of
Electrical Engineering, Harbin Institute of Technol-
ogy, since 2006. His current research interests include
power line communication and its routing methods,
communication networks and control technology, and
information and communication of smart grids.
Fanfan Lin was born in Fujian, China, in 1996. She
has been working toward the B.S. degree in electrical
engineering with the Harbin Institute of Technology,
Harbin, China, since 2014.
Her current research interests include wireless
power transfer.
Dianguo Xu (M’97–SM’12–F’17) received the B.S.
degree in control engineering from Harbin Engineer-
ing University, Harbin, China, in 1982, and the M.S.
and Ph.D. degrees in electrical engineering from the
Harbin Institute of Technology (HIT), Harbin, China,
in 1984 and 1989, respectively.
In 1984, he joined the Department of Electrical
Engineering, HIT, as an Assistant Professor. Since
1994, he has been a Professor with the Department
of Electrical Engineering, HIT. He was the Dean of
the School of Electrical Engineering and Automa-
tion, HIT, from 2000 to 2010. He is currently the Vice President of the HIT. He
authored or coauthored more than 600 technical papers. His research interests
include renewable energy generation technology, power quality mitigation, sen-
sorless vector-controlled motor drives, and high-performance permanent magnet
synchronous motor servo systems.
Dr. Xu is an Associate Editor for the IEEE TRANSACTIONS ON INDUSTRIAL
ELECTRONICS and the IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN
POWER ELECTRONICS. He serves as the Chairman of the IEEE Harbin Section.