IEEJ Journal of Industry Applications

Vol.8 No.5 pp.849–856 DOI: 10.1541/ieejjia.8.849

Paper

Boost Inverter Topology with High-Frequency Link Transformer for PV

Grid-Tied Applications
Hamdy Radwan∗ Non-member, Mahmoud A. Sayed∗∗ Non-member
Takaharu Takeshita∗∗∗ Member, Adel A. Elbaset∗∗∗∗ Non-member
∗
G. Shabib Non-member

(Manuscript received Sep. 6, 2018, revised May 31, 2019)

This paper proposes a new topology for single-phase photovoltaic PV grid-tied applications. The whole system con-
sists of a two-stage, high-frequency boost inverter cascaded by rectifier–inverter system. A single-phase high-frequency
transformer is used to link both stages and provide galvanic isolation between the AC and DC sides. A single-stage
high-frequency boost inverter (HFBI), in the first stage, boosts and converts the DC output voltage of the PV array to
a high-frequency single-phase square waveform and achieves maximum power point tracking (MPPT). In the second
stage, the rectifier-inverter system (RIS) interfaces HFBI to the grid. The proposed topology has many advantages
such as increasing the inverter output voltage level, MPPT, high reliability, small size, and light weight. In addition,
a proportional integral current control (PI) is used to inject a sinusoidal current into the grid at unity power factor.
The proposed topology has been verified analytically using PSIM software and experimentally by using a laboratory
prototype.

Keywords: photovoltaic, grid connected, boost inverter, high frequency transformer

1. Introduction
In the last few years’ renewable energy has the greatest
growth compared to other energy resources due to its relia-
bility, availability, maintainability and safety (1)–(3) . One of the
promising sources of renewable energy is photovoltaic en-
ergy. Therefore, the research is driven in this direction to
improve the reliability of photovoltaic energy resources.
The proper PV grid-connected system should perform
some functions such as maximum power point tracking
(MPPT), voltage boosting, galvanic isolation for safety pur-
poses, injection of low harmonics high quality AC power to
the grid with unity power factor, and using high efficient im-
plementation (4)–(7) . Several topologies for PV grid connected
inverter have been presented; generally, there are two types of
grid-connected PV systems, those with and without galvanic
isolation.
Galvanic isolation can be implemented by using a line fre-
quency transformer (LFT) or a high frequency transformer
(HFT). By contrast, topologies without galvanic isolation are
transformerless topologies.
Transformerless topologies (8)–(12) are lighter, more efficient,
∗ transformer is considered as a poor solution, which is bet-
Faculty of Energy Engineering, Aswan University
Aswan, Egypt
∗∗
Department of Electrical Power and Machines Engineering,
Faculty of Engineering, South Valley University
Qena, Egypt
∗∗∗
Dept. of Electrical and Mechanical Engineering, Nagoya In-
stitute of Technology
Japan
∗∗∗∗
Dept. of Electrical Engineering, Minia University
El-Minia, Egypt
less costly, and less footprint than the galvanic isolated in-
verters. However, the main drawback that must be overcome
in non-isolated PV inverters is the leakage ground currents
through the solar module parasitic capacitance, in addition to
dc current injected to the grid (13) .
Dangerous leakage current increases system losses, re-
duces the grid-connected current quality, induces severe con-
ducted and radiated electromagnetic interface and causes per-
sonal safety problems. To keep the leakage and dc currents
injected to the grid under control, complex solutions are re-
quired.
In order to interface the low output voltage of the PV
module to the grid, high voltage boosting technique is re-
quired; therefore, the use of a line frequency transformer is
widespread (14) (15) . In addition to voltage stepping up, it pro-
vides galvanic isolation between the grid and the PV system,
that plays an important role in safety purpose and personal
protection. Thus avoiding dc current injection into the grid
and eliminating leakage current. Nevertheless, the line fre-
quency transforms are large, heavy, and expensive, the whole
system is bulky and hard to install as a result of its low fre-
quency (16) (17) . Therefore, the topology with line frequency
ter to replace by high-frequency transformers (HFT). Using
HFT (18)–(20) guarantees galvanic isolation between the grid and
the PV system, in addition to overcoming the disadvantages
of using conventional line frequency transformer (21) (22) . How-
ever, there is a rarity in scientific research for using HFT with
PV systems in a way that performs all the required functions,
especially MPPT.
This paper presents a new topology for interfacing PV


c 2019 The Institute of Electrical Engineers of Japan. 849
 Boost Inverter Topology with High-Frequency Link Transformer（Hamdy Radwan et al.）

Fig. 1. The proposed system

array with the grid. The topology is designed to provide a

10-kHz square wave voltage that enables HFT to be used for
galvanic isolation between the AC and DC sides and con-
figure a multi-featured system such as MPPT and boosting
the DC voltage of the PV module in one stage with reduced
power switches. therefore, the overall system is more effi-
cient compared with the conventional topologies.
This paper is organized as follows; first, the circuit config-
uration of the proposed system is described. Second, the op-
eration modes of the proposed topology are presented. Third,
MPPT and PI controller are discussed. Finally, simulations
and experiments consider the fundamental operation wave-
forms of the proposed system.
Fig. 2. Configuration of the single-stage HFBI
2. Proposed System
2.1 Proposed Topology (basic version) The pro-
posed system consists of two stages, High-frequency boost
inverter (HFBI) cascaded by rectifier-inverter system (RIS)
as shown in Fig. 1. In addition, the implemented switching
control strategies are shown in the figure. The first stage is
a redesign of the topology given in (6) to obtain a 10-kHz
square wave output voltage instead of the fundamental grid
voltage. The topology consists of two buck-boost converters
connected, as shown in Fig. 2, as the second stage is simply
approximated by a resistor. Each of these converters oper-
ates sequentially in discontinuous conduction mode (DCM) Fig. 3. The switching pulses at the gates of controllable
switches
for one half cycle of the targeted 10 kHz square waveform.
DCM operation prevents the circulating currents between the
inductor and the parallel-connected switch in the next oper- “L1 ” (or L2 ) by the PV source. When SW1 (or SW3 ) is
ating half cycle. The power MOSFETS SW1 and SW3 are OFF, D1 (or D2 ) gets forward biased, discharging the induc-
switched at high frequency of 100 kHz while SW2 (or SW4 ) tor stored energy into capacitor Cbi , which continuously feeds
is continuously turning ON during the positive half cycle current to the load. The switched gate signals for SW1 , SW2 ,
(or negative half cycle) of the targeted 10 kHz square wave- SW3 and SW4 are shown in Fig. 3.
form. Switches SW1 and SW2 operate to provide the positive 2.2 Modified Proposed Topology The target of the
boosted half-cycle, whereas SW3 and SW4 operate to provide proposed topology is a 10 kHz square waveform output volt-
the negative boosted half-cycle. age that is linked to RIS by HFT. Therefore, the topology is
When SW1 is ON (or SW3 ), energy is stored in the inductor designed to achieve many features of the complete system as

850 IEEJ Journal IA, Vol.8, No.5, 2019

 Boost Inverter Topology with High-Frequency Link Transformer（Hamdy Radwan et al.）

Fig. 4. The modified switching pulses at the gates of

switches (a) Mode 1

mentioned previously. But at the instant of turning the opera-

tion between the two buck boost, the polarity of the capacitor
voltage VCbi cannot change instantaneously. Although this
time is very short (2 ns), two paths of surge current appear
due to high value of VCbi compared to the input voltage. As-
suming the polarity of VCbi changed from the positive half
cycle to negative half cycle and by referring to Fig. 2, the
first path of surge current flows through capacitor Cbi , switch
SW4 and body diode of switch SW2 . The second path of
surge current flows through capacitor Cbi , switch SW4 , input
capacitor Cp and body diode of switch SW3 . In order to limit (b) Mode 2

this surge current, two stages of modification have been pro-

posed. The first one considers reverse blocking IGBT (23) for
SW2 and SW4 instead of conventional IGBT and adding se-
ries diode in opposite direction of the body diode of SW1 and
SW3 .
Consequently, the capacitor current ICbi is limited by flow-
ing through inductor L2 . Although, the surge current is lim-
ited, it is added to the source current in inductor L2 (SW3 is
ON) at the instant of changing the polarity of Vcbi , resulting
in rising the output voltage at the begging of each half cycle.
In order to obtain proper square wave shape, the second stage
of modification was done by keeping SW1 and SW3 in OFF (c) Mode 3
state at this instant. The modified switched gate signals for Fig. 5. Operation modes (a) when SW1 ‘on’, (b) when
SW1 and SW3 are shown in Fig. 4. SW1 ‘off’, D1 ‘on’, (c) when SW1 ‘off’, D1 ‘off’
3. Operation Modes and Parameters Design
source is the following:
The operation modes of the boost inverter are similar for
1 2
the basic version and the modified version of the proposed Epv (t) =
L1 I · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · (1)
topology. The basic version topology has three modes of op- 2 L1
eration based on the switching of SW1 during the positive The peak value of the inductor current can be formulated as
half-cycle, since the switch SW2 is always ON during these follows;
three modes. In Mode1, switch SW1 is ON and energy is Vpv
stored in the buck boost inductor L1 by the PV source. In IL1 = DTs · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · (2)
L1
Mode2, switch SW1 is OFF and D1 is forward biased, dis-
charging the inductor stored energy into capacitor Cbi , which Substituting by (2) in (1) yields:
feeds current to the load (R). In Mode3, both SW1 and D1 are V2pv
OFF as a result of DCM operation. The operation modes are Epv (t) = D2 Ts 2 · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · (3)
shown in Fig. 5. As a result of DCM operation during each L1
cycle of the output voltage, the stored energy in the buck- The energy transferred into the load during switching period
boost inductor L1 (or L2 ) is completely discharged into ca- Ts is given by:
pacitor Cbi . Then the capacitor Cbi feeds the stored energy
Vo2
into the load. Therefore, the energy delivered into the load Eo (t) = Vo Io Ts = Ts · · · · · · · · · · · · · · · · · · · · · · · · · · (4)
Eo (t) is equal to the energy drown from the source Epv (t) dur- R
ing the switching time period Ts . Equalizing (3) and (4) yields the formula of the boost con-
According to Mode 1, the extracted energy from the PV verter voltage gain as follows,

851 IEEJ Journal IA, Vol.8, No.5, 2019

 Boost Inverter Topology with High-Frequency Link Transformer（Hamdy Radwan et al.）
 
Vo R 2
= D Ts · · · · · · · · · · · · · · · · · · · · · · · · · · · · (5)
Vpv 2L1
As a result of DCM operation, the energy stored of the in-
ductor L1 is completely transferred into capacitor Cbi which
feeds it into the load during each switching period. There-
fore, (5) is used to determine the value of the inductor L1 ,
which results the following expression:
V2pv
L1 ≤ D2 Ts · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · (6)
2P
where P is the rated power transferred into the load.
To determine the value of Cbi , the energy stored in the in-
ductor L1 during the ON mode can be equated to the change
in capacitor energy during the OFF mode, yields the follow-
ing expression:
L1 I2pk L1 Vo Ts
Cbi ≤ ≤ · · · · · · · · · · · · · · · · · · · · · · · · · (7)
4Vo ΔV 2RΔV
where ΔV is the ripple of the capacitor voltage.
In the second stage the DC-link capacitor (Cdc ) is sized ac-
cording to (17)
Pg
Cdc = · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · (8)
2ωVdc Δvdc
Where Pg is the average active power injected into the grid,
ω is the line angular frequency in rad/sec and Δvdc is the am-
plitude of the DC-link voltage ripple.
4. Control Strategies
The control of the proposed system is divided in two major
strategies; PV side control and grid side control. The func-
tion of the PV side control is extracting the maximum power
of the PV source. The grid side control is assigned to inject
sinusoidal current into the grid with minimum total harmonic
distortion and unity power factor. The grid side control is
achieved by Current control.
4.1 PV Side Control The operating point of the PV
sources may change randomly during the operation of the
system according to the environmental conditions. There-
fore, MPPT algorithm is needed to extract maximum instan-
taneous power. Several MPPT techniques have been pro-
posed in the last decades. P&O MPPT algorithm (24) is one
of simple hill-climbing algorithms, which extensively used
in practical PV systems because of its simplicity. Moreover,
prior study or modeling of PV characteristics is not required.
Although the implementation of the algorithm is simple, it
has some drawbacks such as the oscillation of the operating
point around the MPP at steady state, which raises the waste
of some amount of available energy. In addition, the P&O
algorithm can be confused by rapidly changing atmospheric
conditions. In some literatures (25) (26) , the negative effects of
the P&O algorithm drawbacks are limited by optimizing the
P&O algorithm parameters by customizing them to the dy-
namic behavior of the PV system.
The flow chart of P&O MPPT algorithm is depicted on
Fig. 6. The algorithm starts by reading PV output voltage and
current to calculate PV output power P(k). Then compares
the calculated power with that of the previous perturbation
852
Fig. 6. Flowchart of the P&O algorithm
cycle P(k-1). Depending on the result of the comparison, the
algorithm perturbs the PV output voltage by increasing or de-
creasing. If the perturbation causes an increase in PV power,
the subsequent perturbation is made in the same direction.
Otherwise, the subsequent perturbation is made in the oppo-
site direction. When the perturbation of the algorithm has
three-level at steady state, it indicates the algorithm is stable
and swings around the MPP.
4.2 Grid Side Control Current control is more ef-
ficient than voltage control for controlling grid inverter (27) .
Current controller has fast response and less sensitive to dis-
tortion in grid voltage. Linear proportional-integral (PI) con-
troller is widely used in current control; it provides proper re-
sponse low harmonic content, constant switching frequency.
PI controller calculates the error between a sensed inverter
output current and a desired injected current to the grid, and
then the controller minimizes this error. The control scheme
of the inverter connected with the grid is shown in Fig. 1. The
inverter connected with the grid through L filter that is used
to eliminate the current ripple.
The reference grid current Ig∗ is obtained by multiplying
the unity grid voltage signal with the maximum value of the
reference current, which is determined from the input power
and the grid voltage in order to achieve unity power factor in
addition to synchronizing the inverter output voltage and cur-
rent with the grid. Therefore, the grid voltage and current are
detected. The actual grid current is subtracted from the ref-
erence grid current and the error between them is minimized
by using conventional PI controller.
5. Simulation Results
In order to validate the operation of the proposed system,
it has been carried out in PSIM software (ver. 10.0). 250 W
PV module is simulated at 25◦ C temperature and 1000 W/m2
radiation. The simulated circuit parameters and the electrical
characteristics of PV module at MPP are listed in Table 1.
Switches SW1 and SW3 are responsible of boosting the input
voltage. Therefore, they switched by 100 kHz and their duty
cycles are modulated by MPPT algorithm. Switches SW2
and SW4 are responsible of inverting process; hence they are
IEEJ Journal IA, Vol.8, No.5, 2019
 Boost Inverter Topology with High-Frequency Link Transformer（Hamdy Radwan et al.）
Table 1. Proposed simulated circuit parameters
Fig. 7. Simulation Results of Ipv , Vpv and Ppv of PV
module at MPP and the duty cycle perturbation
switched by 10 kHz 0.5 duty cycle.
Figure 7 shows the PV outputs (Vpv , Ipv and Ppv ) at MPP
and the duty cycle perturbation (output of MPPT algorithm).
It is clear that the duty cycle perturbation has three-level at
steady state, which indicates that P&O MPPT algorithm is
stable and swings around the MPP.
Switches signals of H-bridge grid inverter are generated by
comparing the controlled signal, which is obtained by con-
ventional PI controller with a 20 kHz saw tooth carrier sig-
nal to generate Sinusoidal Pulse width modulation (SPWM)
pulses. In order to decrease switching losses without affect-
ing the performance of the inverter output, a Hybrid Pulse
Width Modulation (HPWM) is used. The strategy consist
of a simple combinational logic circuits that generate gat-
ing signal for switches with two different frequencies, Two
switches (SW5 , SW7 ) are modulated at switching frequency
20 kHz and the other two switches (SW6 , SW8 ) are operated
at 60 Hz. Thus switching losses of switches SW6 and SW8
can be neglected and switching losses of switches SW5 and
SW7 can be reduced by half (each one is operated at one half
of the fundamental grid voltage. In order to show HPWM
operation, the grid voltage is sensed and reduced to a unit
amplitude sine wave then multiplied by 0.8 modulation index
(open loop case) before comparing with a 1 kHz saw tooth
signal. The operation is illustrated in Fig. 8.
Figure 9 shows the grid voltage and current at steady-state
MPPT algorithm. It is clear that the injected grid current is
853
Fig. 8. Waveforms describing the HPWM switch oper-
ation
Fig. 9. Simulation Results of grid voltage, grid current,
dc link voltage & current and primary voltage of HFT
in-phase with the grid voltage. The figure also shows Vdc
and Idc of RIS. The frequency of the primary voltage Vp of
HFT is high frequency, as shown in Fig. 9, which is the out-
put of the proposed HFBI topology therefore, Fig. 9 is mag-
nified to show this waveform and other high frequency signal
waveforms in suitable view, as shown in Fig. 10. Switch gate
signal SW1 is 100 kHz and Switch gate signal SW2 is 10 kHz
0.5 duty cycle. The boost inverter capacitor voltage VCbi (Vp )
is square waves at 10 kHz. The inductor current IL1 is DCM
to avoid the circulating current between the inductor and the
parallel-connected switch in the next operating half cycle.
6. Experimental Results
A200-W experimental prototype has been carried out in the
laboratory to verify the operation of the proposed configura-
tion. A photograph of the experimental set up used is shown
in Fig. 11. The circuit parameters are listed in Table 2.
For the first stage HFBI, (STP42N60M2-EP) Power MOS-
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 Boost Inverter Topology with High-Frequency Link Transformer（Hamdy Radwan et al.）
Fig. 10. HFBI switches gate signals, HFBI filter capac-
itor voltage, and inductor current and primary voltage of
HFT
Fig. 11. Photograph of the experimental prototype
Table 2. Proposed experimented circuit parameters
FET was used as the controllable switching device for SW1
and SW3 . For switches SW2 and SW4 , reverse blocking
IGBT (85G60RB) was used. For H-bridge, grid inverter
IGBT (50G60HD) was used.
The control circuit uses the PE-Expert 3 system, which
consists of DSP board, PEV board, AD board and FPGA
board. The control program is created in DSP by C language.
The program inputs are the grid voltage and current sensed
signals through PEV board. The output-controlled signals of
DSP are sent to FPGA board to generate the gate signals with
dead time. Then, the gate signals converted into an optical
signal before transmitted to the gate drive circuit.
854
Fig. 12. Experimental results of the proposed system
with resistive load
Fig. 13. Experimental results of the proposed system
with grid connected
Two cases of test were performed, one of them the inverter
connected to a standalone resistive load of 50 Ω and the sec-
ond, the inverter connected to Grid. The PV source is re-
placed by dc source.
Figures 12 and 13 show the experimental results of 10%
of the rated power of the prototype in case of connecting
to resistive load and connecting to grid, respectively both in
closed loop operation. In both cases, the output voltage and
current are in-phase with law THD. In addition, the figures
demonstrate a boosting of the HFBI more than 4 times.
Figure 14 is the magnification of Fig. 13 to show the high
frequency signal waveforms of HFBI in suitable view. As
shown in Fig. 14, the capacitor voltage Vcbi (the primary volt-
age of HFT) and primary current Ip of HFT are square wave
at 10 kHz. Also, The inductor current L1 of HFBI is DCM to
guarantee discharging all its energy and no circulated current
between the inductor and the parallel-connected switch in the
next operating half cycle.
IEEJ Journal IA, Vol.8, No.5, 2019
 Boost Inverter Topology with High-Frequency Link Transformer（Hamdy Radwan et al.）
Fig. 14. The magnification of Fig. 13
7. Conclusion
This paper has proposed a new single-stage high-frequency
boost inverter cascaded by Rectifier-inverter system for PV
grid-tie applications. The topology has been analyzed, de-
signed, simulated and implemented in laboratory. The topol-
ogy performs many features such as MPPT, boosting PV
voltage in addition to the high frequency square wave out-
put voltage that allows the use of HFT to guarantee gal-
vanic isolation between the grid and the PV system, in ad-
dition to overcoming the drawbacks of conventional line fre-
quency transformer. The proposed HFBI topology is one
stage with reduced power switches compared with the con-
ventional topologies. The functionality and switching opera-
tion of the proposed system in closed loop have been depicted
with simulation and experimental.
The presented experimental results demonstrate a boosting
of more than 4 times, therefore, low PV array voltages (typi-
cally 40–100 V range) can be stepped up to levels commensu-
rate with the grid voltage (110–230 V ac). Consequently, the
use of a few series connected solar panels is sufficient. This
avoids environmental changes such as shadow, which reduces
the utilization of solar panels. Simulation and experimental
results, which emphasizing the performance of the proposed
topology of proposed system, have been validated.
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(2006)
IEEJ Journal IA, Vol.8, No.5, 2019
 Boost Inverter Topology with High-Frequency Link Transformer（Hamdy Radwan et al.）

Hamdy Radwan (Non-member) was born in Luxor, Egypt, in 1982.
He received the B.Sc. degree in electrical engineering
from Faculty of Energy Engineering, Aswan Univer-
sity, Egypt in 2005. From 2010–2013, he was with
Aswan Power Electronic Application Research Cen-
ter (APEARC), as a research Assistantand received
the M.Sc. degree in electrical engineering in 2013. He
is currently working toward the Ph.D. degree. Since
2014, he has been with Aswan University, Aswan,
Egypt, where he was assistant lecturer in the Depart-
ment of Electrical Engineering, faculty of Energy engineering. In 2016, he
joined Nagoya Institute of Technology, Japan as a Ph.D. special research
student. His current research interests include digital Control, renewable
energy, and PV Grid-Tie Applications.
Mahmoud A. Sayed (Non-member) was born in Qena Prefecture,
Egypt, in 1974. He received the B.Sc. and M.Sc.
degrees in electrical engineering from Minia Univer-
sity, Minya, Egypt, in 1997 and 2001, respectively,
and the Ph.D. degree in electrical engineering from
Nagoya Institute of Technology, Nagoya, Japan, in
2010. Since 1999, he has been with the Department
of Electrical Engineering, Faculty of Energy Engi-
neering, Aswan University, Aswan, Egypt, first as an
Administrator and since 2001 as a Lecturer. Since
2010, he has been with the Faculty of Engineering, South Valley University,
Qena, Egypt, first as an Assistant Professor and since 2015 as an Associate
Professor. His research interests include voltage regulation and loss mini-
mization of electrical distribution systems using series and shunt pulse-width
modulation (PWM) converters, PWM techniques for bidirectional ac/dc and
direct ac/ac converters, modular multilevel converters (MMxC), machine
drives for electrical vehicles applications, in addition to renewable energy
applications and machine drives. Dr. Sayed is a senior member of the IEEE
Power Electronics and Industry Application Societies.
Adel A. Elbaset (Non-member) was born in Nag Hamadi, Qena-
Egypt, on October 24, 1971. He received the B.Sc.,
M.Sc., and Ph.D. at the Faculty of Engineering, De-
partment of Electrical Engineering, Minia University,
Egypt, in 1995, 2000 and 2006, respectively. He is a
staff member of the Faculty of Engineering, Electri-
cal Engineering Dept., Minia University, Egypt. He
wasvisiting assistant professor at Kumamoto Univer-
sity, Japan, until August 2009. Presently, he is Profes-
sor at the Department of Electrical Engineering. His
research interests are in the area of power electronics, power system, neural
network, fuzzy systems and renewable energy and Optimization.
G. Shabib (Non-member) received his B.Sc. degree in electrical en-
gineering from Al Azhar University. In October
1982, he joined the electrical engineering depart-
ment, King Fahad University of Petroleum and Min-
erals, Dhahran Saudi Arabia as research assistant.
In December 1985, he received his M.Sc. degree
in electrical engineering at King Fahad University
of Petroleum and Minerals. In November 1987, he
joined Qassim Royal Institute, Qassim, Saudi Ara-
bia aslecturer. He received his Ph.D. degree from
Menoufia University, Egypt, in 2001. He joined Aswan High Institute of
Energy, South Valley University, Aswan, Egypt in 1999. He joined Digital
Control Laboratory, Tsukuba University, Japan asvisiting Professor in 2006–
2007. His research interests are power system stability, control, Self-tuning
control, Fuzzy logic techniques, digital control techniques, all as applied to
power systems.

Takaharu Takeshita (Member) was born in Aichi, Japan, on August

23, 1959. He received the B.S. and M.S. degrees
in Electrical Engineering from Nagoya Institute of
Technology, Nagoya, Japan, in 1982 and 1984, re-
spectively, and the Ph.D. degree in Electrical Engi-
neering from Nagoya University, Nagoya, Japan, in
1990. Since 1991, he has been with Nagoya Institute
of Technology, where he is currently a Full Profes-
sor and is involved in research on power converters
and motor drives. Dr. Takeshita is a member of the
Society of Instrument and Control Engineers (SICE), Society of Signal Pro-
cessing Applications and Technology of Japan (SSPATJ), and Institute of
Electrical Engineers of Japan (IEEJ).

856 IEEJ Journal IA, Vol.8, No.5, 2019