L2 RST

Annexe : Jeu d’instructions ARM

Instructions Arithmétiques & logiques Instructions de comparaison

Syntaxe Syntaxe
OP {cond} Rn, op2
op{S}{cond} Rd, Rn, op2

ADD r0, r1, r2 r0 = r1 + r2

CMP r0, r1 cpsr  r0 - r1
ADC r0, r1, r2 r0 = r1 + r2 + C
CMN r0, r1 cpsr  r0 + r1
SUB r0, r1, r2 r0 = r1 – r2
TST r0, r1 cpsr  r0 & r1
SBC r0, r1, r2 r0 = r1 – r2 – C +1
TEQ r0,r1 cpsr  r0 ⊕ r1
RSB r0, r1, r2 r0 = r2 – r1
RSC r0, r1, r2 r0 = r2 – r1 – C +1

Instructions de décalage
AND r0, r1, r2 r0 = r1 & r2
ORR r0, r1, r2 r0 = r1 | r2 Syntaxe
EOR r0, r1, r2 r0 = r1 ^ r2 op{S}{cond} Rd, Rm, Rs
BIC r0, r1, r2 r0 = r1 & !r2 op{S}{cond} Rd, Rm, #sh
RRX{S}{cond} Rd, Rm

Instructions de movement de données

ASR rd , rs, #sh rd = rs >> sh
LSR rd , rs, #sh rd = rs >> sh
Syntaxe
LSL rd , rs, #sh rd = rs << sh
OP{S}{cond} Rd, op2 ROR rd , rs, #sh rotation on the right by sh bits
RRX rd , rs rotation on the right by 1 bit
MOV rd, rm Rd = rm with the carry flag
MVN rd, rm Rd = ! rm

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Annexe : Assembleur ARM Mme Emna Amouri
 L2 RST

Exécution Conditionnelle
EQ Equal
NEQ Not Equal
LT Signed Less Than
GT Signed Greater Than
LE Signed Less than or Equal
GE Signed Greater than or Equal
LO Unsigned Lower
HI Unsigned Higher

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Annexe : Assembleur ARM Mme Emna Amouri